diff --git a/.gitignore b/.gitignore
deleted file mode 100644
index bc25ba1..0000000
--- a/.gitignore
+++ /dev/null
@@ -1,53 +0,0 @@
-# Compiled Object files
-*.slo
-*.lo
-*.o
-*.gch
-
-# Python stuff
-*.pyc
-__init__.py
-__init__.pyc
-.pydevproject
-*Config.py
-
-# Compiled Dynamic libraries
-*.so
-*.dylib
-
-# Compiled Static libraries
-*.lai
-*.la
-*.a
-
-# Eclipse projects
-.project
-.cproject
-.settings
-Makefile.*
-Debug
-Release
-
-# Some usual extensions and folders
-.DS_Store
-*~
-*.bak
-.player
-.svn
-*.suo
-*.ncb
-*.user
-*.tmp
-doc
-data
-
-# ROS specific
-CMakeFiles
-CMakeCache.txt
-cmake_install.cmake
-build/
-bin/
-lib/
-docs/
-msg_gen
-srv_gen
diff --git a/CMakeLists.txt b/CMakeLists.txt
deleted file mode 100644
index b01d820..0000000
--- a/CMakeLists.txt
+++ /dev/null
@@ -1,2 +0,0 @@
-cmake_minimum_required(VERSION 2.4.6)
-include($ENV{ROS_ROOT}/core/rosbuild/rosbuild.cmake)
diff --git a/Makefile b/Makefile
deleted file mode 100644
index a818cca..0000000
--- a/Makefile
+++ /dev/null
@@ -1 +0,0 @@
-include $(shell rospack find mk)/cmake_stack.mk
\ No newline at end of file
diff --git a/README b/README
deleted file mode 100644
index 258cd57..0000000
--- a/README
+++ /dev/null
@@ -1 +0,0 @@
-todo
diff --git a/asctec_autopilot/.gitignore b/asctec_autopilot/.gitignore
deleted file mode 100644
index 4848492..0000000
--- a/asctec_autopilot/.gitignore
+++ /dev/null
@@ -1,6 +0,0 @@
-build/
-bin/
-lib/
-*~
-CMakeCache.txt
-msg/
diff --git a/asctec_autopilot/CMakeLists.txt b/asctec_autopilot/CMakeLists.txt
index 895ee0d..616d9d9 100644
--- a/asctec_autopilot/CMakeLists.txt
+++ b/asctec_autopilot/CMakeLists.txt
@@ -1,34 +1,48 @@
-cmake_minimum_required(VERSION 2.4.6)
-include($ENV{ROS_ROOT}/core/rosbuild/rosbuild.cmake)
-
-# Set the build type.  Options are:
-#  Coverage       : w/ debug symbols, w/o optimization, w/ code-coverage
-#  Debug          : w/ debug symbols, w/o optimization
-#  Release        : w/o debug symbols, w/ optimization
-#  RelWithDebInfo : w/ debug symbols, w/ optimization
-#  MinSizeRel     : w/o debug symbols, w/ optimization, stripped binaries
-set(ROS_BUILD_TYPE RelWithDebInfo)
-
-rosbuild_init()
-
-set(EXECUTABLE_OUTPUT_PATH ${PROJECT_SOURCE_DIR}/bin)
-set(LIBRARY_OUTPUT_PATH ${PROJECT_SOURCE_DIR}/lib)
-
-include_directories (${CMAKE_CURRENT_BINARY_DIR})
-
-# create autopilot library
-
-rosbuild_add_library (autopilot src/autopilot.cpp
-                                src/serial_interface.cpp
-                                src/crc16.cpp 
-                                src/telemetry.cpp)
-
-# create autopilot_nodelet library
-
-rosbuild_add_library (autopilot_nodelet src/autopilot_nodelet.cpp)
-target_link_libraries (autopilot_nodelet autopilot)
-
-# create autopilot_node executable
-
-rosbuild_add_executable(autopilot_node src/autopilot_node.cpp)
-target_link_libraries (autopilot_node autopilot)
+cmake_minimum_required(VERSION 2.8.3)
+project(asctec_autopilot)
+
+find_package(catkin REQUIRED COMPONENTS
+  asctec_msgs
+  diagnostic_updater
+  geometry_msgs
+  nav_msgs
+  nodelet
+  sensor_msgs
+  roscpp)
+
+catkin_package(
+  INCLUDE_DIRS include
+  LIBRARIES autopilot
+  CATKIN_DEPENDS
+    asctec_msgs
+    diagnostic_updater
+    nodelet
+    roscpp
+  )
+
+include_directories(include ${catkin_INCLUDE_DIRS})
+
+add_library(autopilot
+  src/autopilot.cpp
+  src/autopilot_nodelet.cpp
+  src/serial_interface.cpp
+  src/crc16.cpp
+  src/telemetry.cpp
+  )
+target_link_libraries(autopilot ${catkin_LIBRARIES})
+add_dependencies(autopilot ${catkin_EXPORTED_TARGETS})
+
+add_executable(autopilot_node
+  src/autopilot_node.cpp
+  )
+target_link_libraries(autopilot_node autopilot ${catkin_LIBRARIES})
+
+install(TARGETS autopilot autopilot_node
+  RUNTIME DESTINATION ${CATKIN_PACKAGE_BIN_DESTINATION}
+  LIBRARY DESTINATION ${CATKIN_PACKAGE_LIB_DESTINATION}
+  ARCHIVE DESTINATION ${CATKIN_PACKAGE_LIB_DESTINATION}
+  )
+
+install(DIRECTORY include/${PROJECT_NAME}/
+  DESTINATION ${CATKIN_PACKAGE_INCLUDE_DESTINATION}
+  )
diff --git a/asctec_autopilot/Makefile b/asctec_autopilot/Makefile
deleted file mode 100755
index b75b928..0000000
--- a/asctec_autopilot/Makefile
+++ /dev/null
@@ -1 +0,0 @@
-include $(shell rospack find mk)/cmake.mk
\ No newline at end of file
diff --git a/asctec_autopilot/gpl.txt b/asctec_autopilot/gpl.txt
deleted file mode 100644
index 10926e8..0000000
--- a/asctec_autopilot/gpl.txt
+++ /dev/null
@@ -1,675 +0,0 @@
-                    GNU GENERAL PUBLIC LICENSE
-                       Version 3, 29 June 2007
-
- Copyright (C) 2007 Free Software Foundation, Inc. <http://fsf.org/>
- Everyone is permitted to copy and distribute verbatim copies
- of this license document, but changing it is not allowed.
-
-                            Preamble
-
-  The GNU General Public License is a free, copyleft license for
-software and other kinds of works.
-
-  The licenses for most software and other practical works are designed
-to take away your freedom to share and change the works.  By contrast,
-the GNU General Public License is intended to guarantee your freedom to
-share and change all versions of a program--to make sure it remains free
-software for all its users.  We, the Free Software Foundation, use the
-GNU General Public License for most of our software; it applies also to
-any other work released this way by its authors.  You can apply it to
-your programs, too.
-
-  When we speak of free software, we are referring to freedom, not
-price.  Our General Public Licenses are designed to make sure that you
-have the freedom to distribute copies of free software (and charge for
-them if you wish), that you receive source code or can get it if you
-want it, that you can change the software or use pieces of it in new
-free programs, and that you know you can do these things.
-
-  To protect your rights, we need to prevent others from denying you
-these rights or asking you to surrender the rights.  Therefore, you have
-certain responsibilities if you distribute copies of the software, or if
-you modify it: responsibilities to respect the freedom of others.
-
-  For example, if you distribute copies of such a program, whether
-gratis or for a fee, you must pass on to the recipients the same
-freedoms that you received.  You must make sure that they, too, receive
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-know their rights.
-
-  Developers that use the GNU GPL protect your rights with two steps:
-(1) assert copyright on the software, and (2) offer you this License
-giving you legal permission to copy, distribute and/or modify it.
-
-  For the developers' and authors' protection, the GPL clearly explains
-that there is no warranty for this free software.  For both users' and
-authors' sake, the GPL requires that modified versions be marked as
-changed, so that their problems will not be attributed erroneously to
-authors of previous versions.
-
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-products.  If such problems arise substantially in other domains, we
-stand ready to extend this provision to those domains in future versions
-of the GPL, as needed to protect the freedom of users.
-
-  Finally, every program is threatened constantly by software patents.
-States should not allow patents to restrict development and use of
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-avoid the special danger that patents applied to a free program could
-make it effectively proprietary.  To prevent this, the GPL assures that
-patents cannot be used to render the program non-free.
-
-  The precise terms and conditions for copying, distribution and
-modification follow.
-
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-works, such as semiconductor masks.
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-"recipients" may be individuals or organizations.
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-  13. Use with the GNU Affero General Public License.
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-the "copyright" line and a pointer to where the full notice is found.
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-    Copyright (C) <year>  <name of author>
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-    it under the terms of the GNU General Public License as published by
-    the Free Software Foundation, either version 3 of the License, or
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-    but WITHOUT ANY WARRANTY; without even the implied warranty of
-    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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-parts of the General Public License.  Of course, your program's commands
-might be different; for a GUI interface, you would use an "about box".
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-if any, to sign a "copyright disclaimer" for the program, if necessary.
-For more information on this, and how to apply and follow the GNU GPL, see
-<http://www.gnu.org/licenses/>.
-
-  The GNU General Public License does not permit incorporating your program
-into proprietary programs.  If your program is a subroutine library, you
-may consider it more useful to permit linking proprietary applications with
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-Public License instead of this License.  But first, please read
-<http://www.gnu.org/philosophy/why-not-lgpl.html>.
-
diff --git a/asctec_autopilot/launch/test.launch b/asctec_autopilot/launch/test.launch
new file mode 100644
index 0000000..b23cc5a
--- /dev/null
+++ b/asctec_autopilot/launch/test.launch
@@ -0,0 +1,9 @@
+<?xml version="1.0"?>
+<launch>
+
+  <node pkg="asctec_autopilot" type="autopilot_node" name="asctec_autopilot_node" output="screen">
+    <param name="port" value="/dev/ftdi_A7048I9H"/>
+    <param name="enable_CONTROL" value="true"/>
+  </node>
+
+</launch>
diff --git a/asctec_autopilot/mainpage.dox b/asctec_autopilot/mainpage.dox
deleted file mode 100644
index 243d786..0000000
--- a/asctec_autopilot/mainpage.dox
+++ /dev/null
@@ -1,27 +0,0 @@
-/**
-\mainpage
-\htmlinclude manifest.html
-
-\b asctec_autopilot is a driver for the Ascending Technologies Pelican and Hummingbird Quadrotor aircraft. It provides access to the sensor information as ros messages and has an interface for sending commands to the aircraft.
-
-<!-- 
-Provide an overview of your package.
--->
-
-\section codeapi Code API
-
- - \ref Telemetry::enablePolling() : Enable telemetry polling
- - \ref Telemetry::buildRequest() : Builds the request message for sending to the autopilot.
-
-<!--
-Provide links to specific auto-generated API documentation within your
-package that is of particular interest to a reader. Doxygen will
-document pretty much every part of your code, so do your best here to
-point the reader to the actual API.
-
-If your codebase is fairly large or has different sets of APIs, you
-should use the doxygen 'group' tag to keep these APIs together. For
-example, the roscpp documentation has 'libros' group.
--->
-
-*/
diff --git a/asctec_autopilot/manifest.xml b/asctec_autopilot/manifest.xml
deleted file mode 100644
index f6e5944..0000000
--- a/asctec_autopilot/manifest.xml
+++ /dev/null
@@ -1,25 +0,0 @@
-<package>
-  <description brief="asctec_autopilot">
-This is the hardware driver for the AscTec AutoPilot built by Ascending Technologies GmbH. http://www.asctec.de
-
-It should be compatible with the Hummingbird and Pelican quadrotor aircraft.
-
-This driver is not yet complete and the interfaces are not yet finalized. Full functionality will be supported in the near future. Contributions are welcome.
-  </description>
-  <author>William Morris, Ivan Dryanovski, Steven Bellens, Patrick Bouffard et al.</author>
-  <license>GPL</license>
-  <review status="experimental" notes="This is unstable and under active development."/>
-  <url>http://ros.org/wiki/asctec_autopilot</url>
-  <depend package="roscpp"/>
-  <depend package="nodelet"/>
-  <depend package="geometry_msgs"/>
-  <depend package="sensor_msgs"/>
-  <depend package="nav_msgs"/>
-  <depend package="asctec_msgs"/>
-  <depend package="diagnostic_updater"/>
-
-  <export>
-    <nodelet plugin="${prefix}/autopilot_nodelet.xml" />
-  </export>
-
-</package>
diff --git a/asctec_autopilot/package.xml b/asctec_autopilot/package.xml
new file mode 100644
index 0000000..04fc6fd
--- /dev/null
+++ b/asctec_autopilot/package.xml
@@ -0,0 +1,36 @@
+<package>
+  <name>asctec_autopilot</name>
+  <version>0.0.0</version>
+  <description>AscTec Autopilot Hardware Driver</description>
+
+  <author>William Morris, Ivan Dryanovski, Steven Bellens, Patrick Bouffard et al.</author>
+  <author email="pbovbel@clearpathrobotics.com">Paul Bovbel</author>
+  <maintainer email="pbovbel@clearpathrobotics.com">Paul Bovbel</maintainer>
+
+  <url type="website">http://ros.org/wiki/asctec_drivers</url>
+  <url type="bugtracker">https://github.com/clearpathrobotics/asctec_drivers/issues</url>
+  <url type="repository">https://github.com/clearpathrobotics/asctec_drivers</url>
+
+  <license>GPL</license>
+
+  <buildtool_depend>catkin</buildtool_depend>
+  <build_depend>asctec_msgs</build_depend>
+  <build_depend>diagnostic_updater</build_depend>
+  <build_depend>geometry_msgs</build_depend>
+  <build_depend>nav_msgs</build_depend>
+  <build_depend>nodelet</build_depend>
+  <build_depend>sensor_msgs</build_depend>
+  <build_depend>roscpp</build_depend>
+  <run_depend>asctec_msgs</run_depend>
+  <run_depend>diagnostic_updater</run_depend>
+  <run_depend>geometry_msgs</run_depend>
+  <run_depend>nav_msgs</run_depend>
+  <run_depend>nodelet</run_depend>
+  <run_depend>sensor_msgs</run_depend>
+  <run_depend>roscpp</run_depend>
+
+  <export>
+    <nodelet plugin="${prefix}/autopilot_nodelet.xml" />
+  </export>
+
+</package>
diff --git a/asctec_autopilot/src/.gitignore b/asctec_autopilot/src/.gitignore
deleted file mode 100644
index 578a25b..0000000
--- a/asctec_autopilot/src/.gitignore
+++ /dev/null
@@ -1 +0,0 @@
-asctec_autopilot/
diff --git a/asctec_autopilot/src/tags b/asctec_autopilot/src/tags
deleted file mode 100644
index f1159e6..0000000
--- a/asctec_autopilot/src/tags
+++ /dev/null
@@ -1,51 +0,0 @@
-!_TAG_FILE_FORMAT	2	/extended format; --format=1 will not append ;" to lines/
-!_TAG_FILE_SORTED	1	/0=unsorted, 1=sorted, 2=foldcase/
-!_TAG_PROGRAM_AUTHOR	Darren Hiebert	/dhiebert@users.sourceforge.net/
-!_TAG_PROGRAM_NAME	Exuberant Ctags	//
-!_TAG_PROGRAM_URL	http://ctags.sourceforge.net	/official site/
-!_TAG_PROGRAM_VERSION	5.8	//
-AutoPilot	autopilot.cpp	/^  AutoPilot::AutoPilot ()$/;"	f	class:asctec::AutoPilot
-SerialInterface	serial_interface.cpp	/^  SerialInterface::SerialInterface (std::string port, uint32_t speed):serialport_name_ (port), serialport_speed_ (speed)$/;"	f	class:asctec::SerialInterface
-Telemetry	telemetry.cpp	/^  Telemetry::Telemetry ()$/;"	f	class:asctec::Telemetry
-asctec	autopilot.cpp	/^namespace asctec$/;"	n	file:
-asctec	crc16.cpp	/^namespace asctec$/;"	n	file:
-asctec	serial_interface.cpp	/^namespace asctec$/;"	n	file:
-asctec	telemetry.cpp	/^namespace asctec$/;"	n	file:
-bitrate	serial_interface.cpp	/^  speed_t SerialInterface::bitrate (int Bitrate)$/;"	f	class:asctec::SerialInterface
-buildRequest	telemetry.cpp	/^  void Telemetry::buildRequest ()$/;"	f	class:asctec::Telemetry
-cmd	serial_interface.cpp	/^    unsigned char cmd[] = ">*>di";$/;"	m	namespace:asctec	file:
-copyCONTROLLER_OUTPUT	telemetry.cpp	/^  void Telemetry::copyCONTROLLER_OUTPUT() {$/;"	f	class:asctec::Telemetry
-copyGPS_DATA	telemetry.cpp	/^  void Telemetry::copyGPS_DATA() {$/;"	f	class:asctec::Telemetry
-copyGPS_DATA_ADVANCED	telemetry.cpp	/^  void Telemetry::copyGPS_DATA_ADVANCED() {$/;"	f	class:asctec::Telemetry
-copyIMU_CALCDATA	telemetry.cpp	/^  void Telemetry::copyIMU_CALCDATA() {$/;"	f	class:asctec::Telemetry
-copyIMU_RAWDATA	telemetry.cpp	/^  void Telemetry::copyIMU_RAWDATA(){$/;"	f	class:asctec::Telemetry
-copyLL_STATUS	telemetry.cpp	/^  void Telemetry::copyLL_STATUS() {$/;"	f	class:asctec::Telemetry
-copyRC_DATA	telemetry.cpp	/^  void Telemetry::copyRC_DATA() {$/;"	f	class:asctec::Telemetry
-crc16	crc16.cpp	/^  unsigned short crc16 (void *data, unsigned short cnt)$/;"	f	namespace:asctec
-crc_update	crc16.cpp	/^  unsigned short crc_update (unsigned short crc, unsigned char data)$/;"	f	namespace:asctec
-crc_valid	crc16.cpp	/^  bool crc_valid (unsigned short packet_crc, void *data, unsigned short cnt)$/;"	f	namespace:asctec
-drain	serial_interface.cpp	/^  void SerialInterface::drain ()$/;"	f	class:asctec::SerialInterface
-dumpCONTROLLER_OUTPUT	telemetry.cpp	/^  void Telemetry::dumpCONTROLLER_OUTPUT() {$/;"	f	class:asctec::Telemetry
-dumpCTRL_INPUT	telemetry.cpp	/^  void Telemetry::dumpCTRL_INPUT() {$/;"	f	class:asctec::Telemetry
-dumpGPS_DATA	telemetry.cpp	/^  void Telemetry::dumpGPS_DATA() {$/;"	f	class:asctec::Telemetry
-dumpGPS_DATA_ADVANCED	telemetry.cpp	/^  void Telemetry::dumpGPS_DATA_ADVANCED() {$/;"	f	class:asctec::Telemetry
-dumpIMU_CALCDATA	telemetry.cpp	/^  void Telemetry::dumpIMU_CALCDATA() {$/;"	f	class:asctec::Telemetry
-dumpIMU_RAWDATA	telemetry.cpp	/^  void Telemetry::dumpIMU_RAWDATA() {$/;"	f	class:asctec::Telemetry
-dumpLL_STATUS	telemetry.cpp	/^  void Telemetry::dumpLL_STATUS() {$/;"	f	class:asctec::Telemetry
-dumpRC_DATA	telemetry.cpp	/^  void Telemetry::dumpRC_DATA() {$/;"	f	class:asctec::Telemetry
-enableCommanding	telemetry.cpp	/^void Telemetry::enableCommanding (uint8_t interval, uint8_t offset)$/;"	f	class:asctec::Telemetry
-enablePolling	telemetry.cpp	/^  void Telemetry::enablePolling (RequestType msg, uint8_t interval, uint8_t offset)$/;"	f	class:asctec::Telemetry
-flush	serial_interface.cpp	/^  void SerialInterface::flush ()$/;"	f	class:asctec::SerialInterface
-getPacket	serial_interface.cpp	/^  bool SerialInterface::getPacket (char *spacket, unsigned char &packet_type, unsigned short &packet_crc,$/;"	f	class:asctec::SerialInterface
-main	autopilot.cpp	/^int main (int argc, char **argv)$/;"	f
-main	teletest.cpp	/^int main (int argc, char **argv)$/;"	f
-publishPackets	telemetry.cpp	/^  void Telemetry::publishPackets()$/;"	f	class:asctec::Telemetry
-requestToString	telemetry.cpp	/^std::string Telemetry::requestToString(RequestTypes::RequestType t)$/;"	f	class:asctec::Telemetry
-result	serial_interface.cpp	/^      bool result = false;$/;"	m	namespace:asctec	file:
-spin	autopilot.cpp	/^  void AutoPilot::spin (const ros::TimerEvent& e)$/;"	f	class:asctec::AutoPilot
-stall	serial_interface.cpp	/^  void SerialInterface::stall (bool wait)$/;"	f	class:asctec::SerialInterface
-write	serial_interface.cpp	/^  void SerialInterface::write (char *output, int len)$/;"	f	class:asctec::SerialInterface
-write	serial_interface.cpp	/^  void SerialInterface::write (unsigned char *output, int len)$/;"	f	class:asctec::SerialInterface
-~AutoPilot	autopilot.cpp	/^  AutoPilot::~AutoPilot ()$/;"	f	class:asctec::AutoPilot
-~SerialInterface	serial_interface.cpp	/^  SerialInterface::~SerialInterface ()$/;"	f	class:asctec::SerialInterface
-~Telemetry	telemetry.cpp	/^  Telemetry::~Telemetry ()$/;"	f	class:asctec::Telemetry
diff --git a/asctec_autopilot/udev/99-ftdi.rules b/asctec_autopilot/udev/99-ftdi.rules
new file mode 100644
index 0000000..21a6af9
--- /dev/null
+++ b/asctec_autopilot/udev/99-ftdi.rules
@@ -0,0 +1 @@
+SUBSYSTEMS=="usb", ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6001", MODE="0666", SYMLINK+="ftdi_%s{serial}"
diff --git a/asctec_description/CMakeLists.txt b/asctec_description/CMakeLists.txt
new file mode 100644
index 0000000..bc49727
--- /dev/null
+++ b/asctec_description/CMakeLists.txt
@@ -0,0 +1,13 @@
+cmake_minimum_required(VERSION 2.8.3)
+project(asctec_description)
+
+find_package(catkin REQUIRED COMPONENTS roslaunch)
+
+catkin_package()
+
+roslaunch_add_file_check(launch)
+
+install(
+  DIRECTORY launch meshes urdf
+  DESTINATION ${CATKIN_PACKAGE_SHARE_DESTINATION}
+)
\ No newline at end of file
diff --git a/asctec_description/launch/view_model.rviz b/asctec_description/launch/view_model.rviz
new file mode 100644
index 0000000..bd37503
--- /dev/null
+++ b/asctec_description/launch/view_model.rviz
@@ -0,0 +1,155 @@
+Panels:
+  - Class: rviz/Displays
+    Help Height: 78
+    Name: Displays
+    Property Tree Widget:
+      Expanded:
+        - /Global Options1
+        - /Status1
+      Splitter Ratio: 0.5
+    Tree Height: 521
+  - Class: rviz/Selection
+    Name: Selection
+  - Class: rviz/Tool Properties
+    Expanded:
+      - /2D Pose Estimate1
+      - /2D Nav Goal1
+      - /Publish Point1
+    Name: Tool Properties
+    Splitter Ratio: 0.588679
+  - Class: rviz/Views
+    Expanded:
+      - /Current View1
+    Name: Views
+    Splitter Ratio: 0.5
+  - Class: rviz/Time
+    Experimental: false
+    Name: Time
+    SyncMode: 0
+    SyncSource: ""
+Visualization Manager:
+  Class: ""
+  Displays:
+    - Alpha: 0.5
+      Cell Size: 1
+      Class: rviz/Grid
+      Color: 160; 160; 164
+      Enabled: true
+      Line Style:
+        Line Width: 0.03
+        Value: Lines
+      Name: Grid
+      Normal Cell Count: 0
+      Offset:
+        X: 0
+        Y: 0
+        Z: 0
+      Plane: XY
+      Plane Cell Count: 10
+      Reference Frame: <Fixed Frame>
+      Value: true
+    - Alpha: 1
+      Class: rviz/RobotModel
+      Collision Enabled: false
+      Enabled: true
+      Links:
+        All Links Enabled: true
+        Expand Joint Details: false
+        Expand Link Details: false
+        Expand Tree: false
+        Link Tree Style: Links in Alphabetic Order
+        base_footprint:
+          Alpha: 1
+          Show Axes: false
+          Show Trail: false
+          Value: true
+        base_link:
+          Alpha: 1
+          Show Axes: false
+          Show Trail: false
+          Value: true
+        leg_1:
+          Alpha: 1
+          Show Axes: false
+          Show Trail: false
+          Value: true
+        leg_2:
+          Alpha: 1
+          Show Axes: false
+          Show Trail: false
+          Value: true
+        leg_3:
+          Alpha: 1
+          Show Axes: false
+          Show Trail: false
+          Value: true
+        leg_4:
+          Alpha: 1
+          Show Axes: false
+          Show Trail: false
+          Value: true
+      Name: RobotModel
+      Robot Description: robot_description
+      TF Prefix: ""
+      Update Interval: 0
+      Value: true
+      Visual Enabled: true
+  Enabled: true
+  Global Options:
+    Background Color: 48; 48; 48
+    Fixed Frame: base_footprint
+    Frame Rate: 30
+  Name: root
+  Tools:
+    - Class: rviz/Interact
+      Hide Inactive Objects: true
+    - Class: rviz/MoveCamera
+    - Class: rviz/Select
+    - Class: rviz/FocusCamera
+    - Class: rviz/Measure
+    - Class: rviz/SetInitialPose
+      Topic: /initialpose
+    - Class: rviz/SetGoal
+      Topic: /move_base_simple/goal
+    - Class: rviz/PublishPoint
+      Single click: true
+      Topic: /clicked_point
+  Value: true
+  Views:
+    Current:
+      Class: rviz/Orbit
+      Distance: 1.1685
+      Enable Stereo Rendering:
+        Stereo Eye Separation: 0.06
+        Stereo Focal Distance: 1
+        Swap Stereo Eyes: false
+        Value: false
+      Focal Point:
+        X: 0
+        Y: 0
+        Z: 0
+      Name: Current View
+      Near Clip Distance: 0.01
+      Pitch: 0.935397
+      Target Frame: <Fixed Frame>
+      Value: Orbit (rviz)
+      Yaw: 0.140399
+    Saved: ~
+Window Geometry:
+  Displays:
+    collapsed: false
+  Height: 846
+  Hide Left Dock: false
+  Hide Right Dock: false
+  QMainWindow State: 000000ff00000000fd00000004000000000000013c0000029ffc0200000008fb0000001200530065006c0065006300740069006f006e00000001e10000009b0000006400fffffffb0000001e0054006f006f006c002000500072006f007000650072007400690065007302000001ed000001df00000185000000a3fb000000120056006900650077007300200054006f006f02000001df000002110000018500000122fb000000200054006f006f006c002000500072006f0070006500720074006900650073003203000002880000011d000002210000017afb000000100044006900730070006c00610079007301000000430000029f000000de00fffffffb0000002000730065006c0065006300740069006f006e00200062007500660066006500720200000138000000aa0000023a00000294fb00000014005700690064006500530074006500720065006f02000000e6000000d2000003ee0000030bfb0000000c004b0069006e0065006300740200000186000001060000030c00000261000000010000010f0000029ffc0200000003fb0000001e0054006f006f006c002000500072006f00700065007200740069006500730100000041000000780000000000000000fb0000000a0056006900650077007301000000430000029f000000b800fffffffb0000001200530065006c0065006300740069006f006e010000025a000000b200000000000000000000000200000490000000a9fc0100000001fb0000000a00560069006500770073030000004e00000080000002e10000019700000003000004b000000044fc0100000002fb0000000800540069006d00650100000000000004b00000025800fffffffb0000000800540069006d00650100000000000004500000000000000000000002590000029f00000004000000040000000800000008fc0000000100000002000000010000000a0054006f006f006c00730100000000ffffffff0000000000000000
+  Selection:
+    collapsed: false
+  Time:
+    collapsed: false
+  Tool Properties:
+    collapsed: false
+  Views:
+    collapsed: false
+  Width: 1200
+  X: 42
+  Y: 44
diff --git a/asctec_description/launch/view_pelican.launch b/asctec_description/launch/view_pelican.launch
new file mode 100644
index 0000000..cf22667
--- /dev/null
+++ b/asctec_description/launch/view_pelican.launch
@@ -0,0 +1,14 @@
+<?xml version="1.0"?>
+<launch>
+
+  <!-- Send the Husky A200 Robot URDF/XACRO to param server -->
+  <param name="robot_description" command="$(find xacro)/xacro.py '$(find asctec_description)/urdf/pelican.urdf.xacro'" />
+
+  <node name="robot_state_publisher" pkg="robot_state_publisher" type="robot_state_publisher" />
+  <node name="joint_state_publisher" pkg="joint_state_publisher" type="joint_state_publisher">
+    <param name="use_gui" value="true" />
+  </node>
+
+  <node name="rviz" pkg="rviz" type="rviz" args="-d $(find asctec_description)/launch/view_model.rviz" />
+
+</launch>
\ No newline at end of file
diff --git a/pelican_urdf/data/pelican.stl b/asctec_description/meshes/pelican.stl
similarity index 100%
rename from pelican_urdf/data/pelican.stl
rename to asctec_description/meshes/pelican.stl
diff --git a/asctec_description/package.xml b/asctec_description/package.xml
new file mode 100644
index 0000000..4cd2065
--- /dev/null
+++ b/asctec_description/package.xml
@@ -0,0 +1,25 @@
+<?xml version="1.0"?>
+<package>
+  <name>asctec_description</name>
+  <version>0.0.0</version>
+  <description>AscTec Quadrotor Descriptions</description>
+
+  <author>William Morris, Ivan Dryanovski</author>
+  <author email="pbovbel@clearpathrobotics.com">Paul Bovbel</author>
+  <maintainer email="pbovbel@clearpathrobotics.com">Paul Bovbel</maintainer>
+
+  <url type="website">http://ros.org/wiki/asctec_drivers</url>
+  <url type="bugtracker">https://github.com/clearpathrobotics/asctec_drivers/issues</url>
+  <url type="repository">https://github.com/clearpathrobotics/asctec_drivers</url>
+
+  <license>GPL</license>
+
+  <buildtool_depend>catkin</buildtool_depend>
+  <build_depend>roslaunch</build_depend>
+  <run_depend>robot_state_publisher</run_depend>
+  <run_depend>urdf</run_depend>
+  <run_depend>xacro</run_depend>
+
+  <export>
+  </export>
+</package>
diff --git a/asctec_description/urdf/materials.urdf b/asctec_description/urdf/materials.urdf
new file mode 100644
index 0000000..d3b2ff6
--- /dev/null
+++ b/asctec_description/urdf/materials.urdf
@@ -0,0 +1,35 @@
+<?xml version="1.0"?>
+<robot name="asctec_materials">
+
+  <material name="Black">
+    <color rgba="0.1 0.1 0.1 1.0"/>
+  </material>
+
+  <material name="Blue">
+    <color rgba="0.0 0.0 0.8 1.0"/>
+  </material>
+
+  <material name="Green">
+    <color rgba="0.0 0.8 0.0 1.0"/>
+  </material>
+
+  <material name="Grey">
+    <color rgba="0.7 0.7 0.7 1.0"/>
+  </material>
+
+  <material name="DarkGrey">
+    <color rgba="0.3 0.3 0.3 1.0"/>
+  </material>
+
+  <material name="Red">
+    <color rgba="0.8 0.0 0.0 1.0"/>
+  </material>
+
+  <material name="White">
+    <color rgba="1.0 1.0 1.0 1.0"/>
+  </material>
+
+  <material name="Yellow">
+    <color rgba="0.8 0.8 0.0 1.0"/>
+  </material>
+</robot>
\ No newline at end of file
diff --git a/asctec_description/urdf/pelican.urdf.xacro b/asctec_description/urdf/pelican.urdf.xacro
new file mode 100644
index 0000000..b209d96
--- /dev/null
+++ b/asctec_description/urdf/pelican.urdf.xacro
@@ -0,0 +1,68 @@
+<?xml version="1.0"?>
+<robot name="pelican" xmlns:xacro="http://ros.org/wiki/xacro">
+
+  <xacro:include filename="$(find asctec_description)/urdf/materials.urdf" />
+
+  <property name="M_PI" value="3.14159"/>
+
+  <link name="base_footprint">
+    <collision>
+      <origin xyz="0.0 0.0 0.0" rpy="${M_PI/2} 0.0 ${M_PI}"/>
+      <geometry>
+        <cylinder radius="1.0" length="1.0"/>
+      </geometry>
+    </collision>
+  </link>
+
+  <joint name="base_link_to_base_footprint" type="fixed">
+    <parent link="base_link"/>
+    <child link="base_footprint"/>
+    <origin xyz="0.00 0.00 -0.195" rpy="0.0 0.0 0.0"/>
+  </joint>
+
+  <link name="base_link">
+    <visual>
+      <origin xyz="0.0 0.0 0.0" rpy="${M_PI/2} 0.0 ${M_PI}"/>
+      <geometry>
+        <mesh filename="package://asctec_description/meshes/pelican.stl" scale="0.001 0.001 0.001"/>
+      </geometry>
+      <material name="Blue"/>
+    </visual>
+  </link>
+
+  <xacro:macro name="pelican_leg" params="name *origin">
+
+    <link name="leg_${name}">
+      <visual>
+        <geometry>
+          <box size="0.044 0.007 0.114"/>
+        </geometry>
+        <xacro:insert_block name="origin"/>
+        <material name="Green"/>
+      </visual>
+    </link>
+    <joint name="base_link_to_leg_${name}" type="fixed">
+      <parent link="base_link"/>
+      <child link="leg_${name}"/>
+      <origin xyz="0.00 0.00 -0.083" rpy="0.0 0.0 0.0"/>
+    </joint>
+
+  </xacro:macro>
+
+  <xacro:pelican_leg name="1">
+    <origin xyz="0.089 0.00 -0.057" rpy="0.0 0.0 0.0"/>
+  </xacro:pelican_leg>
+
+  <xacro:pelican_leg name="2">
+    <origin xyz="-0.089 0.00 -0.057" rpy="0.0 0.0 0.0"/>
+  </xacro:pelican_leg>
+
+  <xacro:pelican_leg name="3">
+    <origin xyz="0.00 0.089 -0.057" rpy="0.0 0.0 1.5708"/>
+  </xacro:pelican_leg>
+
+  <xacro:pelican_leg name="4">
+    <origin xyz="0.00 -0.089 -0.057" rpy="0.0 0.0 1.5708"/>
+  </xacro:pelican_leg>
+
+</robot>
\ No newline at end of file
diff --git a/asctec_mon/CMakeLists.txt b/asctec_mon/CMakeLists.txt
deleted file mode 100644
index 80dfea2..0000000
--- a/asctec_mon/CMakeLists.txt
+++ /dev/null
@@ -1,30 +0,0 @@
-cmake_minimum_required(VERSION 2.4.6)
-include($ENV{ROS_ROOT}/core/rosbuild/rosbuild.cmake)
-
-# Set the build type.  Options are:
-#  Coverage       : w/ debug symbols, w/o optimization, w/ code-coverage
-#  Debug          : w/ debug symbols, w/o optimization
-#  Release        : w/o debug symbols, w/ optimization
-#  RelWithDebInfo : w/ debug symbols, w/ optimization
-#  MinSizeRel     : w/o debug symbols, w/ optimization, stripped binaries
-set(ROS_BUILD_TYPE RelWithDebInfo)
-
-rosbuild_init()
-
-#set the default path for built executables to the "bin" directory
-set(EXECUTABLE_OUTPUT_PATH ${PROJECT_SOURCE_DIR}/bin)
-#set the default path for built libraries to the "lib" directory
-set(LIBRARY_OUTPUT_PATH ${PROJECT_SOURCE_DIR}/lib)
-
-#uncomment if you have defined messages
-#rosbuild_genmsg()
-#uncomment if you have defined services
-#rosbuild_gensrv()
-
-#common commands for building c++ executables and libraries
-#rosbuild_add_library(${PROJECT_NAME} src/example.cpp)
-#target_link_libraries(${PROJECT_NAME} another_library)
-#rosbuild_add_boost_directories()
-#rosbuild_link_boost(${PROJECT_NAME} thread)
-#rosbuild_add_executable(example examples/example.cpp)
-#target_link_libraries(example ${PROJECT_NAME})
diff --git a/asctec_mon/Makefile b/asctec_mon/Makefile
deleted file mode 100644
index b75b928..0000000
--- a/asctec_mon/Makefile
+++ /dev/null
@@ -1 +0,0 @@
-include $(shell rospack find mk)/cmake.mk
\ No newline at end of file
diff --git a/asctec_mon/gpl.txt b/asctec_mon/gpl.txt
deleted file mode 100644
index 10926e8..0000000
--- a/asctec_mon/gpl.txt
+++ /dev/null
@@ -1,675 +0,0 @@
-                    GNU GENERAL PUBLIC LICENSE
-                       Version 3, 29 June 2007
-
- Copyright (C) 2007 Free Software Foundation, Inc. <http://fsf.org/>
- Everyone is permitted to copy and distribute verbatim copies
- of this license document, but changing it is not allowed.
-
-                            Preamble
-
-  The GNU General Public License is a free, copyleft license for
-software and other kinds of works.
-
-  The licenses for most software and other practical works are designed
-to take away your freedom to share and change the works.  By contrast,
-the GNU General Public License is intended to guarantee your freedom to
-share and change all versions of a program--to make sure it remains free
-software for all its users.  We, the Free Software Foundation, use the
-GNU General Public License for most of our software; it applies also to
-any other work released this way by its authors.  You can apply it to
-your programs, too.
-
-  When we speak of free software, we are referring to freedom, not
-price.  Our General Public Licenses are designed to make sure that you
-have the freedom to distribute copies of free software (and charge for
-them if you wish), that you receive source code or can get it if you
-want it, that you can change the software or use pieces of it in new
-free programs, and that you know you can do these things.
-
-  To protect your rights, we need to prevent others from denying you
-these rights or asking you to surrender the rights.  Therefore, you have
-certain responsibilities if you distribute copies of the software, or if
-you modify it: responsibilities to respect the freedom of others.
-
-  For example, if you distribute copies of such a program, whether
-gratis or for a fee, you must pass on to the recipients the same
-freedoms that you received.  You must make sure that they, too, receive
-or can get the source code.  And you must show them these terms so they
-know their rights.
-
-  Developers that use the GNU GPL protect your rights with two steps:
-(1) assert copyright on the software, and (2) offer you this License
-giving you legal permission to copy, distribute and/or modify it.
-
-  For the developers' and authors' protection, the GPL clearly explains
-that there is no warranty for this free software.  For both users' and
-authors' sake, the GPL requires that modified versions be marked as
-changed, so that their problems will not be attributed erroneously to
-authors of previous versions.
-
-  Some devices are designed to deny users access to install or run
-modified versions of the software inside them, although the manufacturer
-can do so.  This is fundamentally incompatible with the aim of
-protecting users' freedom to change the software.  The systematic
-pattern of such abuse occurs in the area of products for individuals to
-use, which is precisely where it is most unacceptable.  Therefore, we
-have designed this version of the GPL to prohibit the practice for those
-products.  If such problems arise substantially in other domains, we
-stand ready to extend this provision to those domains in future versions
-of the GPL, as needed to protect the freedom of users.
-
-  Finally, every program is threatened constantly by software patents.
-States should not allow patents to restrict development and use of
-software on general-purpose computers, but in those that do, we wish to
-avoid the special danger that patents applied to a free program could
-make it effectively proprietary.  To prevent this, the GPL assures that
-patents cannot be used to render the program non-free.
-
-  The precise terms and conditions for copying, distribution and
-modification follow.
-
-                       TERMS AND CONDITIONS
-
-  0. Definitions.
-
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-
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-works, such as semiconductor masks.
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diff --git a/asctec_mon/launch/monitor.launch b/asctec_mon/launch/monitor.launch
deleted file mode 100644
index 8152013..0000000
--- a/asctec_mon/launch/monitor.launch
+++ /dev/null
@@ -1,6 +0,0 @@
-<launch>
-  <node name="monitor" pkg="asctec_mon" type="monitor.py" respawn="false" required="true" output="screen">
-    <param name="record_cmd" type="string" value="rosbag record -a -o foo"/>
-    <param name="record_dir" type="string" value="~/ros/bags"/>
-  </node>
-</launch>
diff --git a/asctec_mon/mainpage.dox b/asctec_mon/mainpage.dox
deleted file mode 100644
index ab4b208..0000000
--- a/asctec_mon/mainpage.dox
+++ /dev/null
@@ -1,26 +0,0 @@
-/**
-\mainpage
-\htmlinclude manifest.html
-
-\b asctec_mon is ... 
-
-<!-- 
-Provide an overview of your package.
--->
-
-
-\section codeapi Code API
-
-<!--
-Provide links to specific auto-generated API documentation within your
-package that is of particular interest to a reader. Doxygen will
-document pretty much every part of your code, so do your best here to
-point the reader to the actual API.
-
-If your codebase is fairly large or has different sets of APIs, you
-should use the doxygen 'group' tag to keep these APIs together. For
-example, the roscpp documentation has 'libros' group.
--->
-
-
-*/
diff --git a/asctec_mon/manifest.xml b/asctec_mon/manifest.xml
deleted file mode 100644
index 77f61cf..0000000
--- a/asctec_mon/manifest.xml
+++ /dev/null
@@ -1,15 +0,0 @@
-<package>
-	<description brief="AscTec AutoPilot Console Monitor">
-		AscTec AutoPilot Console Monitor
-		This is a curses based groundstation.
-  </description>
-  <author>William Morris</author>
-  <license>GPL</license>
-  <review status="unreviewed" notes=""/>
-  <url>http://ros.org/wiki/asctec_mon</url>
-  <depend package="std_msgs"/>
-  <depend package="rospy"/>
-  <depend package="asctec_msgs"/>
-</package>
-
-
diff --git a/asctec_mon/nodes/monitor.py b/asctec_mon/nodes/monitor.py
deleted file mode 100755
index 9d8d364..0000000
--- a/asctec_mon/nodes/monitor.py
+++ /dev/null
@@ -1,441 +0,0 @@
-#!/usr/bin/env python
-# AscTec Autopilot Console Monitor
-# Copyright (C) 2010, CCNY Robotics Lab
-# William Morris <morris@ee.ccny.cuny.edu>
-#
-# http://robotics.ccny.cuny.edu
-#
-# This program is free software: you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation, either version 3 of the License, or
-# (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program.  If not, see <http://www.gnu.org/licenses/>.
-
-################################
-# This code may not be pretty but is seems to work.
-# Commands
-# q = Quit
-# r = Record Bag File
-# f = Test flashing the screen
-# b = Test the terminal bell
-
-import roslib; roslib.load_manifest('asctec_mon')
-import rospy
-import curses
-import subprocess
-import os
-import signal
-
-from asctec_msgs.msg import LLStatus
-from asctec_msgs.msg import IMUCalcData
-from asctec_msgs.msg import GPSData
-
-myscreen = curses.initscr()
-curses.start_color()
-curses.halfdelay(1)
-curses.noecho()
-curses.curs_set(0)
-(maxx,maxy) = myscreen.getmaxyx()
-llwin = curses.newwin(11, maxy, maxx-11, 0)
-gpswin = curses.newwin(3, maxy, maxx-14, 0)
-recwin = curses.newwin(3, maxy, maxx-17, 0)
-imuwin = curses.newwin(maxx-17, maxy, 0, 0)
-alarm = 0
-alarm_count = 0
-alarm_interval = 10
-gps_lock = 1
-imu_lock = 1
-ll_lock = 1
-rec_status = 0
-rec_enable = 0
-rec_cmd = ["rosbag", "record", "-a", "-o","asctec"]
-rec_dir = str(os.environ['HOME'])+"/ros/bags"
-rec_process = None
-bag_name = None
-
-def drawSignedVal(r,c,w,val,val_max,val_min,big):
-    center = int(w/2)
-    if (val > val_max):
-        val = val_max
-    if (val < val_min):
-        val = val_min
-    if big:
-        # Draw Top
-        imuwin.addch(r, c, curses.ACS_ULCORNER)
-        for n in range(c+1, c+w):
-            if (n == c+center):
-                imuwin.addch(r, n, curses.ACS_TTEE)
-            else:
-                imuwin.addch(r, n, curses.ACS_HLINE)
-        imuwin.addch(r, c+w, curses.ACS_URCORNER)
-        r = r + 1
-
-    # Draw Middle
-    imuwin.addch(r, c, curses.ACS_VLINE)
-    bar = int(float(val / val_max * center))
-    if (bar == 0):
-        imuwin.addch(r, c+center, curses.ACS_VLINE)
-    elif (bar >= 0):
-        imuwin.addstr(r, c+center, " "*bar, curses.color_pair(4))
-        imuwin.addch(r, c+center, curses.ACS_VLINE,curses.color_pair(4))
-    else:
-        imuwin.addstr(r, c+center+bar+1, " "*(-1*bar), curses.color_pair(4))
-        imuwin.addch(r, c+center, curses.ACS_VLINE,curses.color_pair(4))
-    imuwin.addch(r, c+w, curses.ACS_VLINE)
-    r = r + 1
-
-    if big:
-        # Draw Bottom
-        imuwin.addch(r, c, curses.ACS_LLCORNER)
-        for n in range(c+1, c+w):
-            if (n == c+center):
-                imuwin.addch(r, n, curses.ACS_BTEE)
-            else:
-                imuwin.addch(r, n, curses.ACS_HLINE)
-        imuwin.addch(r, c+w, curses.ACS_LRCORNER)
-
-def drawBattery(r,c,w,battery_val):
-    global alarm
-    # Battery Settings
-    # Taken from http://en.wikipedia.org/wiki/Lithium-ion_polymer_battery
-    battery_max = 12.7   # Maximum Voltage
-    battery_warn = 10.0  # Warning Voltage
-    battery_min = 8.4    # Minimum Voltage
-
-    # Draw Top
-    llwin.addch(r, c, curses.ACS_ULCORNER)
-    for n in range(c+1, c+w):
-        llwin.addch(r, n, curses.ACS_HLINE)
-    llwin.addch(r, c+w, curses.ACS_URCORNER)
-    r = r + 1
-
-    # Draw Middle
-    llwin.addch(r, c, curses.ACS_VLINE)
-    b = int((battery_val - battery_min)/(battery_max-battery_min)*w)
-    if battery_val > battery_warn: 
-        alarm = 0
-        llwin.addstr(r, c+1, " " * b, curses.color_pair(4))
-    else:
-        alarm = 1
-        llwin.addstr(r, c+1, " " * b, curses.color_pair(5))
-    llwin.addch(r, c+w, curses.ACS_VLINE)
-    r = r + 1
-
-    # Draw Bottom
-    llwin.addch(r, c, curses.ACS_LLCORNER)
-    for n in range(c+1, c+w):
-        llwin.addch(r, n, curses.ACS_HLINE)
-    llwin.addch(r, c+w, curses.ACS_LRCORNER)
-
-def drawStatusMode(r,c,w,data):
-    # Draw Top
-    size = int(w / 3)-1
-    llwin.addch(r, c, curses.ACS_ULCORNER)
-    for n in range(c+1, c+w):
-        if ((n%(size+c))-2):
-          llwin.addch(r, n, curses.ACS_HLINE)
-        else:
-          llwin.addch(r, n, curses.ACS_TTEE)
-    llwin.addch(r, c+w, curses.ACS_URCORNER)
-    r = r + 1
-
-    size = size + 2
-    pos = c+(size*0)
-    llwin.addch(r, pos, curses.ACS_VLINE)
-    if (data.compass_enabled):
-        llwin.addstr(r,pos+1,"Compass",curses.color_pair(3)|curses.A_BOLD)
-    else:
-        llwin.addstr(r,pos+1,"Compass",curses.color_pair(0))
-
-    pos = c+(size*1)
-    llwin.addch(r, pos, curses.ACS_VLINE)
-    llwin.addstr(r,pos+1,"Flight Time: "+str(data.up_time)+" sec",curses.color_pair(0))
-
-    pos = c+(size*2)
-    llwin.addch(r, pos, curses.ACS_VLINE)
-    llwin.addstr(r,pos+1,"CPU: "+str(data.cpu_load),curses.color_pair(0))
-
-    pos = c+w
-    llwin.addch(r, pos, curses.ACS_VLINE)
-    r = r + 1
-
-    # Draw Bottom
-    size = int(w / 3)-1
-    llwin.addch(r, c, curses.ACS_LLCORNER)
-    for n in range(c+1, c+w):
-        if ((n%(size+c))-2):
-          llwin.addch(r, n, curses.ACS_HLINE)
-        else:
-          llwin.addch(r, n, curses.ACS_BTEE)
-    llwin.addch(r, c+w, curses.ACS_LRCORNER)
-
-def drawFlightMode(r,c,w,flightMode):
-    # Draw Top
-    size = int(w / 5)-2
-    llwin.addch(r, c, curses.ACS_ULCORNER)
-    for n in range(c+1, c+w):
-        if (((n%(size+c))-2) or (n/size+c) > 6):
-          llwin.addch(r, n, curses.ACS_HLINE)
-        else:
-          llwin.addch(r, n, curses.ACS_TTEE)
-    llwin.addch(r, c+w, curses.ACS_URCORNER)
-    r = r + 1
-
-    size = size + 2
-    # There are 5 Flight Modes but the bit index of the serial active
-    # mode is currently unknown
-    pos = c+(size*0)
-    llwin.addch(r, pos, curses.ACS_VLINE)
-    if ((flightMode|0b01111111)!=0b11111111):
-        llwin.addstr(r,pos+1,"Emergency",curses.color_pair(0))
-    else:
-        llwin.addstr(r,pos+1,"Emergency",curses.color_pair(2)|curses.A_BOLD)
-
-    pos = c+(size*1)
-    llwin.addch(r, pos, curses.ACS_VLINE)
-    if ((flightMode|0b11111101)!=0b11111111):
-        llwin.addstr(r,pos+1,"Height Control",curses.color_pair(0))
-    else:
-        llwin.addstr(r,pos+1,"Height Control",curses.color_pair(3)|curses.A_BOLD)
-
-    pos = c+(size*2)
-    llwin.addch(r, pos, curses.ACS_VLINE)
-    if ((flightMode|0b11111011)!=0b11111111):
-        llwin.addstr(r,pos+1,"GPS Mode",curses.color_pair(0))
-    else:
-        llwin.addstr(r,pos+1,"GPS Mode",curses.color_pair(3)|curses.A_BOLD)
-
-    pos = c+(size*3)
-    llwin.addch(r, pos, curses.ACS_VLINE)
-    if ((flightMode|0b11011111)!=0b11111111):
-        llwin.addstr(r,pos+1,"Serial Enable",curses.color_pair(0))
-    else:
-        llwin.addstr(r,pos+1,"Serial Enable",curses.color_pair(3)|curses.A_BOLD)
-
-    pos = c+(size*4)
-    llwin.addch(r, pos, curses.ACS_VLINE)
-    # FIXME: This is probably the wrong bitmask
-    if ((flightMode|0b10111111)!=0b11111111):
-        llwin.addstr(r,pos+1,"Serial Active",curses.color_pair(0))
-    else:
-        llwin.addstr(r,pos+1,"Serial Active",curses.color_pair(3)|curses.A_BOLD)
-    pos = c+w
-    llwin.addch(r, pos, curses.ACS_VLINE)
-    r = r + 1
-
-    # Draw Bottom
-    size = int(w / 5)-2
-    llwin.addch(r, c, curses.ACS_LLCORNER)
-    for n in range(c+1, c+w):
-        if (((n%(size+c))-2) or (n/size+c) > 6):
-          llwin.addch(r, n, curses.ACS_HLINE)
-        else:
-          llwin.addch(r, n, curses.ACS_BTEE)
-    llwin.addch(r, c+w, curses.ACS_LRCORNER)
-
-def record_update():
-    global rec_status
-    global rec_cmd
-    global rec_dir
-    global rec_process
-    global rec_enable
-    global bag_name
-
-    recwin.clear()
-    if rec_status:
-        recattr = curses.color_pair(2)
-    else:
-        recattr = curses.color_pair(0)
-    recwin.attrset(recattr)
-    (rec_maxx,rec_maxy) = recwin.getmaxyx()
-    rec_maxy = rec_maxy - 2 # remove space for left and right border
-    recwin.border(0)
-    
-    if rec_enable != rec_status:
-        if rec_enable:
-            rec_process = subprocess.Popen(rec_cmd, shell=False, stdin=subprocess.PIPE, stdout=subprocess.PIPE, stderr=subprocess.STDOUT, cwd=rec_dir)
-        else:
-            bag_name = None
-        rec_status = rec_enable
-          
-    if rec_status:
-        if (bag_name == None or bag_name == ''):
-            process = subprocess.Popen(['lsof -c record -Fn -- | grep active | cut -c2-'], shell=True, stdin=subprocess.PIPE, stdout=subprocess.PIPE, stderr=subprocess.STDOUT, cwd=rec_dir)
-            bag_name = process.stdout.readline().rstrip()
-        recwin.addstr(0,2,"Flight Data Recording",curses.color_pair(2)|curses.A_BOLD)
-        recwin.attrset(curses.color_pair(0))
-        recwin.addstr(1, 2, "Filename: ")
-        recwin.addstr(1,12,bag_name)
-    else:
-        if (rec_process != None):
-            rec_process.send_signal(signal.SIGINT)
-        recwin.addstr(0,2,"Flight Data Recorder",curses.color_pair(1)|curses.A_BOLD)
-        recwin.attrset(curses.color_pair(0))
-        recwin.addstr(1, 2, "Command: ")
-        recwin.addstr(1,11,' '.join(rec_cmd))
-    if rec_process != None:
-      if rec_process.poll() == 0:
-        rec_process = None
-def gps_callback(data):
-    global gps_lock
-    gps_lock = 1
-    gpswin.clear()
-    (gps_maxx,gps_maxy) = imuwin.getmaxyx()
-    gps_maxy = gps_maxy - 2 # remove space for left and right border
-    gcol = 25
-    gpswin.border(0)
-    gpswin.addstr(0, 2, "GPS", curses.color_pair(1)|curses.A_BOLD)
-    lat_val = float(data.latitude)/float(10**7)
-    gpswin.addstr(1, 2, 'Lat: {0:+012.7f}'.format(lat_val))
-    lon_val = float(data.longitude)/float(10**7)
-    gpswin.addstr(1, 21, 'Lon: {0:+012.7f}'.format(lon_val))
-    height_val = float(data.height)/1000.0
-    gpswin.addstr(1, 40, 'Height: {0: 7.3f}m'.format(height_val))
-    heading_val = float(data.heading)/1000.0
-    gpswin.addstr(1, 58, 'Heading: {0: 7.3f}'.format(heading_val))
-    gps_lock = 0
-
-def imu_callback(data):
-    global imu_lock
-    imu_lock = 1
-    imuwin.clear()
-    (imu_maxx,imu_maxy) = imuwin.getmaxyx()
-    imu_maxy = imu_maxy - 2 # remove space for left and right border
-    gcol = 25
-    imuwin.border(0)
-    imuwin.addstr(0, 2, "AscTec Quadrotor Console Monitor", curses.color_pair(1)|curses.A_BOLD)
-
-    pos = 1
-    if (imu_maxx > 16):
-        pos_inc = 3
-        big = 1
-    else:
-        pos_inc = 1
-        big = 0
-
-    # Height Graph
-    ################################
-    height = float(data.height)/1000.0
-    imuwin.addstr(pos+big, 2, 'Height:    {0: 8.3f}m'.format(height))
-    drawSignedVal(pos,gcol,imu_maxy-(gcol+1),height,10.0,-10.0,big)
-    pos = pos + pos_inc
-    
-    # Roll Graph
-    ################################
-    roll = float(data.angle_roll)/1000.0
-    imuwin.addstr(pos+big, 2, "Roll:      %+08.3f"%roll)
-    imuwin.addch(pos+big, 21, curses.ACS_DEGREE)
-    drawSignedVal(pos,gcol,imu_maxy-(gcol+1),roll,90.0,-90.0,big)
-    pos = pos + pos_inc
-
-    # Pitch Graph
-    ################################
-    pitch = float(data.angle_nick)/1000.0
-    imuwin.addstr(pos+big, 2, "Pitch:     %+08.3f"%pitch)
-    imuwin.addch(pos+big, 21, curses.ACS_DEGREE)
-    drawSignedVal(pos,gcol,imu_maxy-(gcol+1),pitch,180.0,-180.0,big)
-    pos = pos + pos_inc
-
-    # Yaw Graph
-    ################################
-    yaw = float(data.angle_yaw)/1000.0 -180
-    imuwin.addstr(pos+big, 2, "Fused Yaw: %+08.3f"%yaw)
-    imuwin.addch(pos+big, 21, curses.ACS_DEGREE)
-    drawSignedVal(pos,gcol,imu_maxy-(gcol+1),yaw,180.0,-180.0,big)
-    pos = pos + pos_inc
-
-    # Compass Graph
-    ################################
-    mag = float(data.mag_heading)/1000.0 -180
-    imuwin.addstr(pos+big, 2, "Compass:   %+08.3f"%mag)
-    imuwin.addch(pos+big, 21, curses.ACS_DEGREE)
-    drawSignedVal(pos,gcol,imu_maxy-(gcol+1),mag,180.0,-180.0,big)
-    pos = pos + pos_inc
-
-    imu_lock = 0
-
-def callback(data):
-    global ll_lock
-    ll_lock = 1
-    llwin.clear()
-    (maxx,maxy) = llwin.getmaxyx()
-    maxy = maxy - 2 # remove space for left and right border
-    gcol = 20
-    llwin.border(0)
-    llwin.addstr(0, 2, "Status", curses.color_pair(1)|curses.A_BOLD)
-
-    # Battery Monitor
-    ################################
-    battery_val = float(data.battery_voltage_1)/1000.0
-    llwin.addstr(2, 2, 'Battery: {0:.3f}V'.format(battery_val))
-    drawBattery(1,gcol,maxy-(gcol+1),float(data.battery_voltage_1)/1000)
-
-    # Flight Mode Monitor
-    ################################
-    drawFlightMode(4,2,maxy-3,data.flightMode)
-
-    # Status Monitor
-    ################################
-    drawStatusMode(7,2,maxy-3,data)
-
-    ll_lock = 0
-
-def listener():
-    global imuwin, maxx, maxy
-    global alarm, alarm_count, alarm_interval
-    global rec_enable
-
-    rospy.init_node('asctec_monitor')
-    rospy.Subscriber("asctec/LL_STATUS", LLStatus, callback)
-    rospy.Subscriber("asctec/IMU_CALCDATA", IMUCalcData, imu_callback)
-    rospy.Subscriber("asctec/GPS_DATA", GPSData, gps_callback)
-    curses.init_pair(1, curses.COLOR_MAGENTA, curses.COLOR_BLACK)
-    curses.init_pair(2, curses.COLOR_RED, curses.COLOR_BLACK)
-    curses.init_pair(3, curses.COLOR_GREEN, curses.COLOR_BLACK)
-    curses.init_pair(4, curses.COLOR_BLACK, curses.COLOR_WHITE)
-    curses.init_pair(5, curses.COLOR_BLACK, curses.COLOR_RED)
-    r = rospy.Rate(10) # Hz
-    (maxx,maxy) = myscreen.getmaxyx()
-    while not rospy.is_shutdown():
-        c = myscreen.getch()
-        if c == ord('f'): curses.flash()
-        elif c == ord('b'): curses.beep()
-        elif c == ord('r'): rec_enable = not rec_enable
-        elif c == ord('q'): break  # Exit the while()
-        elif c == curses.KEY_HOME: x = y = 0
-        (current_maxx,current_maxy) = myscreen.getmaxyx()
-        if (current_maxx != maxx or current_maxy != maxy):
-            (maxx,maxy) = myscreen.getmaxyx()
-            gpswin.mvwin(maxx-14, 0)
-            llwin.mvwin(maxx-11, 0)
-            imuwin = curses.newwin(maxx-14, maxy, 0, 0)
-            #imuwin.refresh()
-            #llwin.refresh()
-            #gpswin.refresh()
-        if (alarm):
-	    alarm_count = alarm_count + 1
-            if (alarm_count == alarm_interval):
-                alarm_count = 0
-                curses.flash()
-                curses.beep()
-        if (not gps_lock):
-            gpswin.refresh()
-        if (not imu_lock):
-            imuwin.refresh()
-        if (not ll_lock):
-            llwin.refresh()
-        record_update()
-        recwin.refresh()
-        r.sleep()
-    curses.nocbreak(); myscreen.keypad(0); curses.echo(); curses.curs_set(1)
-    curses.endwin()
-
-if __name__ == '__main__':
-    listener()
diff --git a/asctec_msgs/.gitignore b/asctec_msgs/.gitignore
deleted file mode 100644
index 872a51d..0000000
--- a/asctec_msgs/.gitignore
+++ /dev/null
@@ -1 +0,0 @@
-msg_gen/
diff --git a/asctec_msgs/CMakeLists.txt b/asctec_msgs/CMakeLists.txt
index 4a14e9d..b894dee 100644
--- a/asctec_msgs/CMakeLists.txt
+++ b/asctec_msgs/CMakeLists.txt
@@ -1,23 +1,36 @@
-cmake_minimum_required(VERSION 2.4.6)
-include($ENV{ROS_ROOT}/core/rosbuild/rosbuild.cmake)
+cmake_minimum_required(VERSION 2.8.3)
+project(asctec_msgs)
 
-# Set the build type.  Options are:
-#  Coverage       : w/ debug symbols, w/o optimization, w/ code-coverage
-#  Debug          : w/ debug symbols, w/o optimization
-#  Release        : w/o debug symbols, w/ optimization
-#  RelWithDebInfo : w/ debug symbols, w/ optimization
-#  MinSizeRel     : w/o debug symbols, w/ optimization, stripped binaries
-set(ROS_BUILD_TYPE RelWithDebInfo)
+find_package(catkin REQUIRED COMPONENTS
+  std_msgs
+  message_generation
+)
 
-rosbuild_init()
+add_message_files(
+  FILES
+  ControllerOutput.msg
+  CtrlInput.msg
+  GPSData.msg
+  GPSDataAdvanced.msg
+  IMUCalcData.msg
+  IMURawData.msg
+  LLStatus.msg
+  RCData.msg
+)
 
-#set the default path for built executables to the "bin" directory
-set(EXECUTABLE_OUTPUT_PATH ${PROJECT_SOURCE_DIR}/bin)
-#set the default path for built libraries to the "lib" directory
-set(LIBRARY_OUTPUT_PATH ${PROJECT_SOURCE_DIR}/lib)
+generate_messages(
+  DEPENDENCIES std_msgs
+)
 
-#uncomment if you have defined messages
-rosbuild_genmsg()
-#uncomment if you have defined services
-#rosbuild_gensrv()
+catkin_package(
+  INCLUDE_DIRS include
+  CATKIN_DEPENDS std_msgs message_runtime
+  )
 
+include_directories(include
+   ${catkin_INCLUDE_DIRS}
+)
+
+install(DIRECTORY include/${PROJECT_NAME}/
+  DESTINATION ${CATKIN_PACKAGE_INCLUDE_DESTINATION}
+)
diff --git a/asctec_msgs/Makefile b/asctec_msgs/Makefile
deleted file mode 100644
index bbd3fc6..0000000
--- a/asctec_msgs/Makefile
+++ /dev/null
@@ -1 +0,0 @@
-include $(shell rospack find mk)/cmake.mk
diff --git a/asctec_msgs/gpl.txt b/asctec_msgs/gpl.txt
deleted file mode 100644
index 10926e8..0000000
--- a/asctec_msgs/gpl.txt
+++ /dev/null
@@ -1,675 +0,0 @@
-                    GNU GENERAL PUBLIC LICENSE
-                       Version 3, 29 June 2007
-
- Copyright (C) 2007 Free Software Foundation, Inc. <http://fsf.org/>
- Everyone is permitted to copy and distribute verbatim copies
- of this license document, but changing it is not allowed.
-
-                            Preamble
-
-  The GNU General Public License is a free, copyleft license for
-software and other kinds of works.
-
-  The licenses for most software and other practical works are designed
-to take away your freedom to share and change the works.  By contrast,
-the GNU General Public License is intended to guarantee your freedom to
-share and change all versions of a program--to make sure it remains free
-software for all its users.  We, the Free Software Foundation, use the
-GNU General Public License for most of our software; it applies also to
-any other work released this way by its authors.  You can apply it to
-your programs, too.
-
-  When we speak of free software, we are referring to freedom, not
-price.  Our General Public Licenses are designed to make sure that you
-have the freedom to distribute copies of free software (and charge for
-them if you wish), that you receive source code or can get it if you
-want it, that you can change the software or use pieces of it in new
-free programs, and that you know you can do these things.
-
-  To protect your rights, we need to prevent others from denying you
-these rights or asking you to surrender the rights.  Therefore, you have
-certain responsibilities if you distribute copies of the software, or if
-you modify it: responsibilities to respect the freedom of others.
-
-  For example, if you distribute copies of such a program, whether
-gratis or for a fee, you must pass on to the recipients the same
-freedoms that you received.  You must make sure that they, too, receive
-or can get the source code.  And you must show them these terms so they
-know their rights.
-
-  Developers that use the GNU GPL protect your rights with two steps:
-(1) assert copyright on the software, and (2) offer you this License
-giving you legal permission to copy, distribute and/or modify it.
-
-  For the developers' and authors' protection, the GPL clearly explains
-that there is no warranty for this free software.  For both users' and
-authors' sake, the GPL requires that modified versions be marked as
-changed, so that their problems will not be attributed erroneously to
-authors of previous versions.
-
-  Some devices are designed to deny users access to install or run
-modified versions of the software inside them, although the manufacturer
-can do so.  This is fundamentally incompatible with the aim of
-protecting users' freedom to change the software.  The systematic
-pattern of such abuse occurs in the area of products for individuals to
-use, which is precisely where it is most unacceptable.  Therefore, we
-have designed this version of the GPL to prohibit the practice for those
-products.  If such problems arise substantially in other domains, we
-stand ready to extend this provision to those domains in future versions
-of the GPL, as needed to protect the freedom of users.
-
-  Finally, every program is threatened constantly by software patents.
-States should not allow patents to restrict development and use of
-software on general-purpose computers, but in those that do, we wish to
-avoid the special danger that patents applied to a free program could
-make it effectively proprietary.  To prevent this, the GPL assures that
-patents cannot be used to render the program non-free.
-
-  The precise terms and conditions for copying, distribution and
-modification follow.
-
-                       TERMS AND CONDITIONS
-
-  0. Definitions.
-
-  "This License" refers to version 3 of the GNU General Public License.
-
-  "Copyright" also means copyright-like laws that apply to other kinds of
-works, such as semiconductor masks.
-
-  "The Program" refers to any copyrightable work licensed under this
-License.  Each licensee is addressed as "you".  "Licensees" and
-"recipients" may be individuals or organizations.
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-  To "modify" a work means to copy from or adapt all or part of the work
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-
diff --git a/asctec_msgs/manifest.xml b/asctec_msgs/manifest.xml
deleted file mode 100644
index ce1bef7..0000000
--- a/asctec_msgs/manifest.xml
+++ /dev/null
@@ -1,17 +0,0 @@
-<package>
-	<description brief="asctec_msgs">
-		Common messages for the AscTec AutoPilot
-  </description>
-  <author>William Morris, Ivan Dryanovski, Steven Bellens, Patrick Bouffard et al.</author>
-  <license>GPL</license>
-  <review status="unreviewed" notes=""/>
-  <url>http://ros.org/wiki/asctec_msgs</url>
-
-  <depend package="roscpp"/>
-
-  <export>
-    <cpp cflags="-I${prefix}/include"/>
-  </export>
-</package>
-
-
diff --git a/asctec_msgs/msg/.gitignore b/asctec_msgs/msg/.gitignore
deleted file mode 100644
index 14fbcc9..0000000
--- a/asctec_msgs/msg/.gitignore
+++ /dev/null
@@ -1,2 +0,0 @@
-lisp
-
diff --git a/asctec_msgs/package.xml b/asctec_msgs/package.xml
new file mode 100644
index 0000000..a33374e
--- /dev/null
+++ b/asctec_msgs/package.xml
@@ -0,0 +1,25 @@
+<?xml version="1.0"?>
+<package>
+  <name>asctec_msgs</name>
+  <version>0.0.0</version>
+  <description>Common messages for the AscTec AutoPilot</description>
+
+  <author>William Morris, Ivan Dryanovski, Steven Bellens, Patrick Bouffard et al.</author>
+  <author email="pbovbel@clearpathrobotics.com">Paul Bovbel</author>
+  <maintainer email="pbovbel@clearpathrobotics.com">Paul Bovbel</maintainer>
+
+  <url type="website">http://ros.org/wiki/asctec_drivers</url>
+  <url type="bugtracker">https://github.com/clearpathrobotics/asctec_drivers/issues</url>
+  <url type="repository">https://github.com/clearpathrobotics/asctec_drivers</url>
+
+  <license>GPL</license>
+
+  <buildtool_depend>catkin</buildtool_depend>
+  <build_depend>message_generation</build_depend>
+  <build_depend>std_msgs</build_depend>
+  <run_depend>message_runtime</run_depend>
+  <run_depend>std_msgs</run_depend>
+
+  <export>
+  </export>
+</package>
diff --git a/asctec_msgs/src/.gitignore b/asctec_msgs/src/.gitignore
deleted file mode 100644
index f934d26..0000000
--- a/asctec_msgs/src/.gitignore
+++ /dev/null
@@ -1,2 +0,0 @@
-asctec_msgs
-
diff --git a/asctec_proc/CMakeLists.txt b/asctec_proc/CMakeLists.txt
index babd9cc..1e32e38 100644
--- a/asctec_proc/CMakeLists.txt
+++ b/asctec_proc/CMakeLists.txt
@@ -1,31 +1,50 @@
-cmake_minimum_required(VERSION 2.4.6)
-include($ENV{ROS_ROOT}/core/rosbuild/rosbuild.cmake)
-
-# Set the build type.  Options are:
-#  Coverage       : w/ debug symbols, w/o optimization, w/ code-coverage
-#  Debug          : w/ debug symbols, w/o optimization
-#  Release        : w/o debug symbols, w/ optimization
-#  RelWithDebInfo : w/ debug symbols, w/ optimization
-#  MinSizeRel     : w/o debug symbols, w/ optimization, stripped binaries
-set(ROS_BUILD_TYPE RelWithDebInfo)
-
-rosbuild_init()
-
-rosbuild_gensrv()
-
-set(EXECUTABLE_OUTPUT_PATH ${PROJECT_SOURCE_DIR}/bin)
-set(LIBRARY_OUTPUT_PATH ${PROJECT_SOURCE_DIR}/lib)
-
-# create autopilot library
-
-rosbuild_add_library (asctec_proc src/asctec_proc.cpp)
-
-# create autopilot_nodelet library
-
-rosbuild_add_library (asctec_proc_nodelet src/asctec_proc_nodelet.cpp)
-target_link_libraries (asctec_proc_nodelet asctec_proc)
-
-# create autopilot_node executable
-
-rosbuild_add_executable(asctec_proc_node src/asctec_proc_node.cpp)
-target_link_libraries (asctec_proc_node asctec_proc)
+cmake_minimum_required(VERSION 2.8.3)
+project(asctec_proc)
+
+find_package(catkin REQUIRED COMPONENTS
+  asctec_msgs
+  mav_msgs
+  nav_msgs
+  nodelet
+  roscpp
+  sensor_msgs
+  std_msgs
+  tf
+  )
+
+catkin_package(
+  INCLUDE_DIRS include
+  LIBRARIES autopilot
+  CATKIN_DEPENDS
+    asctec_msgs
+    mav_msgs
+    nodelet
+    roscpp
+    sensor_msgs
+    std_msgs
+    tf
+  )
+
+include_directories(include ${catkin_INCLUDE_DIRS})
+
+add_library(asctec_proc
+  src/asctec_proc_nodelet.cpp
+  src/asctec_proc.cpp
+  )
+target_link_libraries(asctec_proc ${catkin_LIBRARIES})
+add_dependencies(asctec_proc ${catkin_EXPORTED_TARGETS})
+
+add_executable(asctec_proc_node
+  src/asctec_proc_node.cpp
+  )
+target_link_libraries(asctec_proc_node asctec_proc ${catkin_LIBRARIES})
+
+install(TARGETS asctec_proc_node asctec_proc
+  RUNTIME DESTINATION ${CATKIN_PACKAGE_BIN_DESTINATION}
+  LIBRARY DESTINATION ${CATKIN_PACKAGE_LIB_DESTINATION}
+  ARCHIVE DESTINATION ${CATKIN_PACKAGE_LIB_DESTINATION}
+  )
+
+install(DIRECTORY include/${PROJECT_NAME}/
+  DESTINATION ${CATKIN_PACKAGE_INCLUDE_DESTINATION}
+  )
diff --git a/asctec_proc/Makefile b/asctec_proc/Makefile
deleted file mode 100644
index b75b928..0000000
--- a/asctec_proc/Makefile
+++ /dev/null
@@ -1 +0,0 @@
-include $(shell rospack find mk)/cmake.mk
\ No newline at end of file
diff --git a/asctec_proc/gpl.txt b/asctec_proc/gpl.txt
deleted file mode 100644
index 10926e8..0000000
--- a/asctec_proc/gpl.txt
+++ /dev/null
@@ -1,675 +0,0 @@
-                    GNU GENERAL PUBLIC LICENSE
-                       Version 3, 29 June 2007
-
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-permissions.  However, no additional obligations are imposed on any
-author or copyright holder as a result of your choosing to follow a
-later version.
-
-  15. Disclaimer of Warranty.
-
-  THERE IS NO WARRANTY FOR THE PROGRAM, TO THE EXTENT PERMITTED BY
-APPLICABLE LAW.  EXCEPT WHEN OTHERWISE STATED IN WRITING THE COPYRIGHT
-HOLDERS AND/OR OTHER PARTIES PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY
-OF ANY KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO,
-THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-PURPOSE.  THE ENTIRE RISK AS TO THE QUALITY AND PERFORMANCE OF THE PROGRAM
-IS WITH YOU.  SHOULD THE PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF
-ALL NECESSARY SERVICING, REPAIR OR CORRECTION.
-
-  16. Limitation of Liability.
-
-  IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING
-WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MODIFIES AND/OR CONVEYS
-THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES, INCLUDING ANY
-GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THE
-USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED TO LOSS OF
-DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY YOU OR THIRD
-PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER PROGRAMS),
-EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE POSSIBILITY OF
-SUCH DAMAGES.
-
-  17. Interpretation of Sections 15 and 16.
-
-  If the disclaimer of warranty and limitation of liability provided
-above cannot be given local legal effect according to their terms,
-reviewing courts shall apply local law that most closely approximates
-an absolute waiver of all civil liability in connection with the
-Program, unless a warranty or assumption of liability accompanies a
-copy of the Program in return for a fee.
-
-                     END OF TERMS AND CONDITIONS
-
-            How to Apply These Terms to Your New Programs
-
-  If you develop a new program, and you want it to be of the greatest
-possible use to the public, the best way to achieve this is to make it
-free software which everyone can redistribute and change under these terms.
-
-  To do so, attach the following notices to the program.  It is safest
-to attach them to the start of each source file to most effectively
-state the exclusion of warranty; and each file should have at least
-the "copyright" line and a pointer to where the full notice is found.
-
-    <one line to give the program's name and a brief idea of what it does.>
-    Copyright (C) <year>  <name of author>
-
-    This program is free software: you can redistribute it and/or modify
-    it under the terms of the GNU General Public License as published by
-    the Free Software Foundation, either version 3 of the License, or
-    (at your option) any later version.
-
-    This program is distributed in the hope that it will be useful,
-    but WITHOUT ANY WARRANTY; without even the implied warranty of
-    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-    GNU General Public License for more details.
-
-    You should have received a copy of the GNU General Public License
-    along with this program.  If not, see <http://www.gnu.org/licenses/>.
-
-Also add information on how to contact you by electronic and paper mail.
-
-  If the program does terminal interaction, make it output a short
-notice like this when it starts in an interactive mode:
-
-    <program>  Copyright (C) <year>  <name of author>
-    This program comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
-    This is free software, and you are welcome to redistribute it
-    under certain conditions; type `show c' for details.
-
-The hypothetical commands `show w' and `show c' should show the appropriate
-parts of the General Public License.  Of course, your program's commands
-might be different; for a GUI interface, you would use an "about box".
-
-  You should also get your employer (if you work as a programmer) or school,
-if any, to sign a "copyright disclaimer" for the program, if necessary.
-For more information on this, and how to apply and follow the GNU GPL, see
-<http://www.gnu.org/licenses/>.
-
-  The GNU General Public License does not permit incorporating your program
-into proprietary programs.  If your program is a subroutine library, you
-may consider it more useful to permit linking proprietary applications with
-the library.  If this is what you want to do, use the GNU Lesser General
-Public License instead of this License.  But first, please read
-<http://www.gnu.org/philosophy/why-not-lgpl.html>.
-
diff --git a/asctec_proc/include/asctec_proc/asctec_proc.h b/asctec_proc/include/asctec_proc/asctec_proc.h
index a9777b4..a124dc0 100644
--- a/asctec_proc/include/asctec_proc/asctec_proc.h
+++ b/asctec_proc/include/asctec_proc/asctec_proc.h
@@ -15,8 +15,8 @@
 #include <boost/thread/mutex.hpp>
 #include <tf/transform_datatypes.h>
 
-#include <mav_srvs/SetMotorsOnOff.h>
-#include <mav_srvs/GetMotorsOnOff.h>
+#include <mav_msgs/SetMotorsOnOff.h>
+#include <mav_msgs/GetMotorsOnOff.h>
 
 namespace asctec
 {
@@ -115,10 +115,10 @@ class AsctecProc
     void stopMotors();
     void publishCtrlInputMsg();
 
-    bool setMotorsOnOff(mav_srvs::SetMotorsOnOff::Request  &req,
-                        mav_srvs::SetMotorsOnOff::Response &res);
-    bool getMotorsOnOff(mav_srvs::GetMotorsOnOff::Request  &req,
-                        mav_srvs::GetMotorsOnOff::Response &res);
+    bool setMotorsOnOff(mav_msgs::SetMotorsOnOff::Request  &req,
+                        mav_msgs::SetMotorsOnOff::Response &res);
+    bool getMotorsOnOff(mav_msgs::GetMotorsOnOff::Request  &req,
+                        mav_msgs::GetMotorsOnOff::Response &res);
 
   public:
 
diff --git a/asctec_proc/launch/asctec_driver.launch b/asctec_proc/launch/asctec_driver.launch
index 6121410..1318d84 100644
--- a/asctec_proc/launch/asctec_driver.launch
+++ b/asctec_proc/launch/asctec_driver.launch
@@ -13,6 +13,10 @@
     <param name="interval_IMU_CALCDATA" type="int" value="1"/>
     <param name="offset_IMU_CALCDATA" type="int" value="0"/>
 
+    <param name="enable_GPS_DATA" type="bool" value="true"/>
+    <param name="interval_GPS_DATA" type="int" value="1"/>
+    <param name="offset_GPS_DATA" type="int" value="0"/>
+
     <param name="enable_LL_STATUS" type="bool" value="true"/>
     <param name="interval_LL_STATUS" type="int" value="2"/>
     <param name="offset_LL_STATUS" type="int" value="0"/>
diff --git a/asctec_proc/mainpage.dox b/asctec_proc/mainpage.dox
deleted file mode 100644
index 3be2a07..0000000
--- a/asctec_proc/mainpage.dox
+++ /dev/null
@@ -1,26 +0,0 @@
-/**
-\mainpage
-\htmlinclude manifest.html
-
-\b asctec_proc is ... 
-
-<!-- 
-Provide an overview of your package.
--->
-
-
-\section codeapi Code API
-
-<!--
-Provide links to specific auto-generated API documentation within your
-package that is of particular interest to a reader. Doxygen will
-document pretty much every part of your code, so do your best here to
-point the reader to the actual API.
-
-If your codebase is fairly large or has different sets of APIs, you
-should use the doxygen 'group' tag to keep these APIs together. For
-example, the roscpp documentation has 'libros' group.
--->
-
-
-*/
diff --git a/asctec_proc/manifest.xml b/asctec_proc/manifest.xml
deleted file mode 100644
index 3c628e0..0000000
--- a/asctec_proc/manifest.xml
+++ /dev/null
@@ -1,26 +0,0 @@
-<package>
-  <description brief="asctec_proc">
-
-     The asctec_proc package is a bridge between the asctec_autopilot software and hardware-independent MAV tools.
-
-  </description>
-  <author>Ivan Dryanovski</author>
-  <license>GPL</license>
-  <review status="unreviewed" notes=""/>
-  <url>http://ros.org/wiki/asctec_proc</url>
-  <depend package="roscpp"/>
-  <depend package="nodelet"/>
-  <depend package="mav_msgs"/>
-  <depend package="mav_srvs"/>
-  <depend package="asctec_msgs"/>
-  <depend package="sensor_msgs"/>
-  <depend package="std_msgs"/>
-  <depend package="tf"/>
-
-  <export>
-    <nodelet plugin="${prefix}/asctec_proc_nodelet.xml" />
-  </export>
-
-</package>
-
-
diff --git a/asctec_proc/package.xml b/asctec_proc/package.xml
new file mode 100644
index 0000000..8a6a46b
--- /dev/null
+++ b/asctec_proc/package.xml
@@ -0,0 +1,38 @@
+<package>
+  <name>asctec_proc</name>
+  <version>0.0.0</version>
+  <description>Bridge between asctec_autopilot and hardware-independent MAV tools</description>
+
+  <author>Ivan Dryanovski</author>
+  <author email="pbovbel@clearpathrobotics.com">Paul Bovbel</author>
+  <maintainer email="pbovbel@clearpathrobotics.com">Paul Bovbel</maintainer>
+
+  <url type="website">http://ros.org/wiki/asctec_drivers</url>
+  <url type="bugtracker">https://github.com/clearpathrobotics/asctec_drivers/issues</url>
+  <url type="repository">https://github.com/clearpathrobotics/asctec_drivers</url>
+
+  <license>GPL</license>
+
+  <buildtool_depend>catkin</buildtool_depend>
+  <build_depend>asctec_msgs</build_depend>
+  <build_depend>mav_msgs</build_depend>
+  <build_depend>nav_msgs</build_depend>
+  <build_depend>nodelet</build_depend>
+  <build_depend>roscpp</build_depend>
+  <build_depend>sensor_msgs</build_depend>
+  <build_depend>std_msgs</build_depend>
+  <build_depend>tf</build_depend>
+  <run_depend>asctec_msgs</run_depend>
+  <run_depend>mav_msgs</run_depend>
+  <run_depend>nav_msgs</run_depend>
+  <run_depend>nodelet</run_depend>
+  <run_depend>roscpp</run_depend>
+  <run_depend>sensor_msgs</run_depend>
+  <run_depend>std_msgs</run_depend>
+  <run_depend>tf</run_depend>
+
+  <export>
+    <nodelet plugin="${prefix}/asctec_proc_nodelet.xml" />
+  </export>
+
+</package>
diff --git a/asctec_proc/src/asctec_proc.cpp b/asctec_proc/src/asctec_proc.cpp
index 2980f16..f7bb13c 100644
--- a/asctec_proc/src/asctec_proc.cpp
+++ b/asctec_proc/src/asctec_proc.cpp
@@ -25,10 +25,10 @@ namespace asctec
 {
 
 AsctecProc::AsctecProc(ros::NodeHandle nh, ros::NodeHandle nh_private):
-  nh_(nh), 
+  nh_(nh),
   nh_private_(nh_private)
 {
-  ROS_INFO("Starting AsctecProc"); 
+  ROS_INFO("Starting AsctecProc");
 
   ros::NodeHandle nh_rawdata  (nh_, asctec::ROS_NAMESPACE);
   ros::NodeHandle nh_procdata (nh_, "mav");
@@ -48,7 +48,7 @@ AsctecProc::AsctecProc(ros::NodeHandle nh, ros::NodeHandle nh_private):
   ctrl_thrust_ = 0;
 
   assembleCtrlCommands();
-  
+
   // *** register publishers
 
   imu_publisher_  = nh_procdata.advertise<sensor_msgs::Imu>(
@@ -102,7 +102,7 @@ AsctecProc::AsctecProc(ros::NodeHandle nh, ros::NodeHandle nh_private):
 
 AsctecProc::~AsctecProc()
 {
-  ROS_INFO("Destroying AsctecProc"); 
+  ROS_INFO("Destroying AsctecProc");
 
 }
 
@@ -130,8 +130,8 @@ void AsctecProc::initializeParams()
     max_ctrl_yaw_ = 600;
 }
 
-bool AsctecProc::setMotorsOnOff(mav_srvs::SetMotorsOnOff::Request  &req,
-                                mav_srvs::SetMotorsOnOff::Response &res)
+bool AsctecProc::setMotorsOnOff(mav_msgs::SetMotorsOnOff::Request  &req,
+                                mav_msgs::SetMotorsOnOff::Response &res)
 {
   state_mutex_.lock();
   engaging_ = true;
@@ -155,8 +155,8 @@ bool AsctecProc::setMotorsOnOff(mav_srvs::SetMotorsOnOff::Request  &req,
   return (req.on == motors_on_);
 }
 
-bool AsctecProc::getMotorsOnOff(mav_srvs::GetMotorsOnOff::Request  &req,
-                                mav_srvs::GetMotorsOnOff::Response &res)
+bool AsctecProc::getMotorsOnOff(mav_msgs::GetMotorsOnOff::Request  &req,
+                                mav_msgs::GetMotorsOnOff::Response &res)
 {
   state_mutex_.lock();
   res.on = motors_on_;
@@ -176,7 +176,7 @@ void AsctecProc::cmdRollCallback(const std_msgs::Float64ConstPtr& cmd_roll_msg)
   if (!motors_on_ || engaging_) return;
 
   state_mutex_.lock();
- 
+
   // translate from cmd_roll [-1.0 to 1.0] to ctrl_roll [-2047 .. 2047],
   ctrl_roll_ = (int)(cmd_roll_msg->data * asctec::ROS_TO_ASC_ROLL);
 
@@ -204,7 +204,7 @@ void AsctecProc::cmdPitchCallback(const std_msgs::Float64ConstPtr& cmd_pitch_msg
   if (!motors_on_ || engaging_) return;
 
   state_mutex_.lock();
- 
+
   // translate from cmd_pitch [-1.0 to 1.0] to ctrl_pitch [-2047 .. 2047],
   ctrl_pitch_ = (int)(cmd_pitch_msg->data * asctec::ROS_TO_ASC_PITCH);
 
@@ -312,7 +312,7 @@ void AsctecProc::createHeightMsg(const asctec_msgs::IMUCalcDataConstPtr& imu_cal
   height_msg->header.frame_id = "imu"; // the frame seems arbitrary here
 
   height_msg->height = imu_calcdata_msg->height_reference  * asctec::ASC_TO_ROS_HEIGHT;
-  height_msg->climb  = imu_calcdata_msg->dheight_reference * asctec::ASC_TO_ROS_HEIGHT;   
+  height_msg->climb  = imu_calcdata_msg->dheight_reference * asctec::ASC_TO_ROS_HEIGHT;
 }
 
 void AsctecProc::createHeightFilteredMsg(const asctec_msgs::IMUCalcDataConstPtr& imu_calcdata_msg,
@@ -323,10 +323,10 @@ void AsctecProc::createHeightFilteredMsg(const asctec_msgs::IMUCalcDataConstPtr&
   height_filtered_msg->header.frame_id = "imu"; // the frame seems arbitrary here
 
   height_filtered_msg->height = imu_calcdata_msg->height  * asctec::ASC_TO_ROS_HEIGHT;
-  height_filtered_msg->climb  = imu_calcdata_msg->dheight * asctec::ASC_TO_ROS_HEIGHT;   
+  height_filtered_msg->climb  = imu_calcdata_msg->dheight * asctec::ASC_TO_ROS_HEIGHT;
 }
 
-void AsctecProc::createImuMsg(const asctec_msgs::IMUCalcDataConstPtr& imu_calcdata_msg, 
+void AsctecProc::createImuMsg(const asctec_msgs::IMUCalcDataConstPtr& imu_calcdata_msg,
                                     sensor_msgs::ImuPtr& imu_msg)
 {
   // set header info
@@ -353,7 +353,7 @@ void AsctecProc::createImuMsg(const asctec_msgs::IMUCalcDataConstPtr& imu_calcda
   // copy over angular_velocity - minus signs convert to ENU frame
   imu_msg->angular_velocity.x = imu_calcdata_msg->angvel_roll * asctec::ASC_TO_ROS_ANGVEL * -1.0;
   imu_msg->angular_velocity.y = imu_calcdata_msg->angvel_nick * asctec::ASC_TO_ROS_ANGVEL;
-  imu_msg->angular_velocity.z = imu_calcdata_msg->angvel_yaw  * asctec::ASC_TO_ROS_ANGVEL * -1.0; 
+  imu_msg->angular_velocity.z = imu_calcdata_msg->angvel_yaw  * asctec::ASC_TO_ROS_ANGVEL * -1.0;
 
 /* // Uncomment these if you use covariances
   // define angular_velocity variance
@@ -382,7 +382,7 @@ void AsctecProc::createImuMsg(const asctec_msgs::IMUCalcDataConstPtr& imu_calcda
 
 void AsctecProc::startMotors()
 {
-  // set the stick to lower left, wait for motors to engage, 
+  // set the stick to lower left, wait for motors to engage,
   // and reset stick
 
   ROS_INFO ("Starting motors...");
@@ -404,7 +404,7 @@ void AsctecProc::startMotors()
 
 void AsctecProc::stopMotors()
 {
-  // set the stick to lower left, wait for motors to disengage, 
+  // set the stick to lower left, wait for motors to disengage,
   // and reset stick
 
   ROS_INFO ("Stopping motors...");
@@ -436,8 +436,8 @@ void AsctecProc::assembleCtrlCommands()
   ctrl_input_toggle_msg_->yaw    = -2047;
   ctrl_input_toggle_msg_->ctrl   = int(0b1100);
 
-  ctrl_input_toggle_msg_->chksum = ctrl_input_toggle_msg_->roll + ctrl_input_toggle_msg_->pitch  + 
-                                   ctrl_input_toggle_msg_->yaw  + ctrl_input_toggle_msg_->thrust + 
+  ctrl_input_toggle_msg_->chksum = ctrl_input_toggle_msg_->roll + ctrl_input_toggle_msg_->pitch  +
+                                   ctrl_input_toggle_msg_->yaw  + ctrl_input_toggle_msg_->thrust +
                                    ctrl_input_toggle_msg_->ctrl - 21846;
 
   // **** Assemble zero message
@@ -450,8 +450,8 @@ void AsctecProc::assembleCtrlCommands()
   ctrl_input_zero_msg_->yaw    = 0;
   ctrl_input_zero_msg_->ctrl   = int(0b1100);
 
-  ctrl_input_zero_msg_->chksum = ctrl_input_zero_msg_->roll + ctrl_input_zero_msg_->pitch  + 
-                                 ctrl_input_zero_msg_->yaw  + ctrl_input_zero_msg_->thrust + 
+  ctrl_input_zero_msg_->chksum = ctrl_input_zero_msg_->roll + ctrl_input_zero_msg_->pitch  +
+                                 ctrl_input_zero_msg_->yaw  + ctrl_input_zero_msg_->thrust +
                                  ctrl_input_zero_msg_->ctrl - 21846;
 }
 
@@ -461,23 +461,23 @@ void AsctecProc::publishCtrlInputMsg()
 
   // **** Assemble the generic control input message
 
-  asctec_msgs::CtrlInputPtr ctrl_input_msg;  
+  asctec_msgs::CtrlInputPtr ctrl_input_msg;
   ctrl_input_msg = boost::make_shared<asctec_msgs::CtrlInput>();
-  
+
   ctrl_input_msg->thrust = ctrl_thrust_;
   ctrl_input_msg->roll   = ctrl_roll_;
   ctrl_input_msg->pitch  = ctrl_pitch_;
   ctrl_input_msg->yaw    = ctrl_yaw_;
   ctrl_input_msg->ctrl  = int(0b0000);
 
-  if (enable_ctrl_thrust_) ctrl_input_msg->ctrl |= 0b1000; // These are from CtrlInput.msg 
+  if (enable_ctrl_thrust_) ctrl_input_msg->ctrl |= 0b1000; // These are from CtrlInput.msg
   if (enable_ctrl_yaw_)    ctrl_input_msg->ctrl |= 0b0100;
   if (enable_ctrl_roll_)   ctrl_input_msg->ctrl |= 0b0010;
   if (enable_ctrl_pitch_)  ctrl_input_msg->ctrl |= 0b0001;
 
   // update checksum and timestamp, and publish
-  ctrl_input_msg->chksum = ctrl_input_msg->roll + ctrl_input_msg->pitch  + 
-                            ctrl_input_msg->yaw  + ctrl_input_msg->thrust + 
+  ctrl_input_msg->chksum = ctrl_input_msg->roll + ctrl_input_msg->pitch  +
+                            ctrl_input_msg->yaw  + ctrl_input_msg->thrust +
                             ctrl_input_msg->ctrl - 21846;
   ctrl_input_msg->header.stamp = ros::Time::now();
   ctrl_input_publisher_.publish(ctrl_input_msg);
diff --git a/ccny_asctec_firmware/.cproject b/ccny_asctec_firmware/.cproject
deleted file mode 100644
index 6f44e65..0000000
--- a/ccny_asctec_firmware/.cproject
+++ /dev/null
@@ -1,240 +0,0 @@
-<?xml version="1.0" encoding="UTF-8" standalone="no"?>
-<?fileVersion 4.0.0?>
-
-<cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
-	<storageModule moduleId="org.eclipse.cdt.core.settings">
-		<cconfiguration id="0.1074116139">
-			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="0.1074116139" moduleId="org.eclipse.cdt.core.settings" name="Default">
-				<externalSettings/>
-				<extensions>
-					<extension id="org.eclipse.cdt.core.VCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
-					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
-					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
-					<extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
-					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
-					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
-				</extensions>
-			</storageModule>
-			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
-				<configuration artifactName="ccny_asctec_firmware" buildProperties="" description="" id="0.1074116139" name="Default" parent="org.eclipse.cdt.build.core.prefbase.cfg">
-					<folderInfo id="0.1074116139." name="/" resourcePath="">
-						<toolChain id="org.eclipse.cdt.build.core.prefbase.toolchain.676623506" name="No ToolChain" resourceTypeBasedDiscovery="false" superClass="org.eclipse.cdt.build.core.prefbase.toolchain">
-							<targetPlatform id="org.eclipse.cdt.build.core.prefbase.toolchain.676623506.267380396" name=""/>
-							<builder id="org.eclipse.cdt.build.core.settings.default.builder.314348906" keepEnvironmentInBuildfile="false" managedBuildOn="false" name="Gnu Make Builder" superClass="org.eclipse.cdt.build.core.settings.default.builder"/>
-							<tool id="org.eclipse.cdt.build.core.settings.holder.libs.926437784" name="holder for library settings" superClass="org.eclipse.cdt.build.core.settings.holder.libs"/>
-							<tool id="org.eclipse.cdt.build.core.settings.holder.822877595" name="Assembly" superClass="org.eclipse.cdt.build.core.settings.holder">
-								<option id="org.eclipse.cdt.build.core.settings.holder.undef.incpaths.1434511063" name="Undefined Include Paths" superClass="org.eclipse.cdt.build.core.settings.holder.undef.incpaths" valueType="undefIncludePath">
-									<listOptionValue builtIn="false" value="c:/WinARM/arm-elf/include"/>
-									<listOptionValue builtIn="false" value="c:/WinARM/lib/gcc/arm-elf/4.1.1/include"/>
-								</option>
-								<option id="org.eclipse.cdt.build.core.settings.holder.incpaths.2057674559" name="Include Paths" superClass="org.eclipse.cdt.build.core.settings.holder.incpaths" valueType="includePath">
-									<listOptionValue builtIn="false" value="&quot;C:\WinARM\arm-elf\include&quot;"/>
-									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/ccny_asctec_firmware/include/ccny_asctec_firmware}&quot;"/>
-									<listOptionValue builtIn="false" value="&quot;C:\Users\idryanov\Documents\ros\ccny_experimental\mav_common\include&quot;"/>
-									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/ccny_asctec_firmware/external/Common_WinARM/inc}&quot;"/>
-								</option>
-								<inputType id="org.eclipse.cdt.build.core.settings.holder.inType.367932988" languageId="org.eclipse.cdt.core.assembly" languageName="Assembly" sourceContentType="org.eclipse.cdt.core.asmSource" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>
-							</tool>
-							<tool id="org.eclipse.cdt.build.core.settings.holder.815875827" name="GNU C++" superClass="org.eclipse.cdt.build.core.settings.holder">
-								<option id="org.eclipse.cdt.build.core.settings.holder.undef.incpaths.594669839" name="Undefined Include Paths" superClass="org.eclipse.cdt.build.core.settings.holder.undef.incpaths" valueType="undefIncludePath">
-									<listOptionValue builtIn="false" value="c:/WinARM/arm-elf/include"/>
-									<listOptionValue builtIn="false" value="c:/WinARM/lib/gcc/arm-elf/4.1.1/include"/>
-								</option>
-								<option id="org.eclipse.cdt.build.core.settings.holder.incpaths.1218124766" name="Include Paths" superClass="org.eclipse.cdt.build.core.settings.holder.incpaths" valueType="includePath">
-									<listOptionValue builtIn="false" value="&quot;C:\WinARM\arm-elf\include&quot;"/>
-									<listOptionValue builtIn="false" value="&quot;C:\Users\idryanov\Documents\ros\ccny_experimental\mav_common\include&quot;"/>
-								</option>
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diff --git a/ccny_asctec_firmware/.dep/LL_HL_comm.o.d b/ccny_asctec_firmware/.dep/LL_HL_comm.o.d
deleted file mode 100644
index 4f9d081..0000000
--- a/ccny_asctec_firmware/.dep/LL_HL_comm.o.d
+++ /dev/null
@@ -1,110 +0,0 @@
-src/LL_HL_comm.o: src/LL_HL_comm.c include/ccny_asctec_firmware/main.h \
-  include/ccny_asctec_firmware/util.h C:\WinARM\arm-elf\include/stdint.h \
-  include/ccny_asctec_firmware/LPC214x.h \
-  include/ccny_asctec_firmware/LL_HL_comm.h \
-  include/ccny_asctec_firmware/system.h \
-  include/ccny_asctec_firmware/gpsmath.h \
-  include/ccny_asctec_firmware/sdk.h C:\WinARM\arm-elf\include/inttypes.h \
-  c:\winarm\bin\../lib/gcc/arm-elf/4.1.1/include/stddef.h \
-  include/ccny_asctec_firmware/pid.h \
-  ../mav_common/include/mav_common/comm.h \
-  ../mav_common/include/mav_common/comm_packets.h \
-  ../mav_common/include/mav_common/comm_types.h \
-  ../mav_common/include/mav_common/comm_types.h \
-  include/ccny_asctec_firmware/sdk.h \
-  include/ccny_asctec_firmware/LL_HL_comm.h \
-  include/ccny_asctec_firmware/uart.h \
-  include/ccny_asctec_firmware/hardware.h \
-  include/ccny_asctec_firmware/main.h \
-  include/ccny_asctec_firmware/system.h external/Common_WinARM/inc/irq.h \
-  include/ccny_asctec_firmware/kalman.h \
-  ../mav_common/include/mav_common/comm_util.h \
-  C:\WinARM\arm-elf\include/math.h C:\WinARM\arm-elf\include/sys/reent.h \
-  C:\WinARM\arm-elf\include/_ansi.h C:\WinARM\arm-elf\include/newlib.h \
-  C:\WinARM\arm-elf\include/sys/config.h \
-  C:\WinARM\arm-elf\include/machine/ieeefp.h \
-  C:\WinARM\arm-elf\include/sys/_types.h \
-  C:\WinARM\arm-elf\include/sys/lock.h C:\WinARM\arm-elf\include/_ansi.h \
-  include/ccny_asctec_firmware/matrices.h \
-  C:\WinARM\arm-elf\include/stdlib.h \
-  C:\WinARM\arm-elf\include/machine/stdlib.h \
-  C:\WinARM\arm-elf\include/alloca.h include/ccny_asctec_firmware/ssp.h \
-  include/ccny_asctec_firmware/comm_util_LL.h
-
-include/ccny_asctec_firmware/main.h:
-
-include/ccny_asctec_firmware/util.h:
-
-C:\WinARM\arm-elf\include/stdint.h:
-
-include/ccny_asctec_firmware/LPC214x.h:
-
-include/ccny_asctec_firmware/LL_HL_comm.h:
-
-include/ccny_asctec_firmware/system.h:
-
-include/ccny_asctec_firmware/gpsmath.h:
-
-include/ccny_asctec_firmware/sdk.h:
-
-C:\WinARM\arm-elf\include/inttypes.h:
-
-c:\winarm\bin\../lib/gcc/arm-elf/4.1.1/include/stddef.h:
-
-include/ccny_asctec_firmware/pid.h:
-
-../mav_common/include/mav_common/comm.h:
-
-../mav_common/include/mav_common/comm_packets.h:
-
-../mav_common/include/mav_common/comm_types.h:
-
-../mav_common/include/mav_common/comm_types.h:
-
-include/ccny_asctec_firmware/sdk.h:
-
-include/ccny_asctec_firmware/LL_HL_comm.h:
-
-include/ccny_asctec_firmware/uart.h:
-
-include/ccny_asctec_firmware/hardware.h:
-
-include/ccny_asctec_firmware/main.h:
-
-include/ccny_asctec_firmware/system.h:
-
-external/Common_WinARM/inc/irq.h:
-
-include/ccny_asctec_firmware/kalman.h:
-
-../mav_common/include/mav_common/comm_util.h:
-
-C:\WinARM\arm-elf\include/math.h:
-
-C:\WinARM\arm-elf\include/sys/reent.h:
-
-C:\WinARM\arm-elf\include/_ansi.h:
-
-C:\WinARM\arm-elf\include/newlib.h:
-
-C:\WinARM\arm-elf\include/sys/config.h:
-
-C:\WinARM\arm-elf\include/machine/ieeefp.h:
-
-C:\WinARM\arm-elf\include/sys/_types.h:
-
-C:\WinARM\arm-elf\include/sys/lock.h:
-
-C:\WinARM\arm-elf\include/_ansi.h:
-
-include/ccny_asctec_firmware/matrices.h:
-
-C:\WinARM\arm-elf\include/stdlib.h:
-
-C:\WinARM\arm-elf\include/machine/stdlib.h:
-
-C:\WinARM\arm-elf\include/alloca.h:
-
-include/ccny_asctec_firmware/ssp.h:
-
-include/ccny_asctec_firmware/comm_util_LL.h:
diff --git a/ccny_asctec_firmware/.dep/LPC2k_ee.o.d b/ccny_asctec_firmware/.dep/LPC2k_ee.o.d
deleted file mode 100644
index ad96fd3..0000000
--- a/ccny_asctec_firmware/.dep/LPC2k_ee.o.d
+++ /dev/null
@@ -1,6 +0,0 @@
-src/LPC2k_ee.o: src/LPC2k_ee.c external/Common_WinARM/inc/LPC214x.h \
-  include/ccny_asctec_firmware/LPC2k_ee.h
-
-external/Common_WinARM/inc/LPC214x.h:
-
-include/ccny_asctec_firmware/LPC2k_ee.h:
diff --git a/ccny_asctec_firmware/.dep/adc.o.d b/ccny_asctec_firmware/.dep/adc.o.d
deleted file mode 100644
index c869883..0000000
--- a/ccny_asctec_firmware/.dep/adc.o.d
+++ /dev/null
@@ -1,13 +0,0 @@
-src/adc.o: src/adc.c external/Common_WinARM/inc/LPC214x.h \
-  external/Common_WinARM/inc/type.h external/Common_WinARM/inc/irq.h \
-  external/Common_WinARM/inc/target.h include/ccny_asctec_firmware/adc.h
-
-external/Common_WinARM/inc/LPC214x.h:
-
-external/Common_WinARM/inc/type.h:
-
-external/Common_WinARM/inc/irq.h:
-
-external/Common_WinARM/inc/target.h:
-
-include/ccny_asctec_firmware/adc.h:
diff --git a/ccny_asctec_firmware/.dep/comm_util.o.d b/ccny_asctec_firmware/.dep/comm_util.o.d
deleted file mode 100644
index 537e0db..0000000
--- a/ccny_asctec_firmware/.dep/comm_util.o.d
+++ /dev/null
@@ -1,38 +0,0 @@
-../mav_common/src/comm_util.o: ../mav_common/src/comm_util.c \
-  ../mav_common/include/mav_common/comm_util.h \
-  C:\WinARM\arm-elf\include/stdint.h C:\WinARM\arm-elf\include/math.h \
-  C:\WinARM\arm-elf\include/sys/reent.h C:\WinARM\arm-elf\include/_ansi.h \
-  C:\WinARM\arm-elf\include/newlib.h \
-  C:\WinARM\arm-elf\include/sys/config.h \
-  C:\WinARM\arm-elf\include/machine/ieeefp.h \
-  C:\WinARM\arm-elf\include/sys/_types.h \
-  C:\WinARM\arm-elf\include/sys/lock.h \
-  c:\winarm\bin\../lib/gcc/arm-elf/4.1.1/include/stddef.h \
-  C:\WinARM\arm-elf\include/_ansi.h \
-  ../mav_common/include/mav_common/comm_types.h
-
-../mav_common/include/mav_common/comm_util.h:
-
-C:\WinARM\arm-elf\include/stdint.h:
-
-C:\WinARM\arm-elf\include/math.h:
-
-C:\WinARM\arm-elf\include/sys/reent.h:
-
-C:\WinARM\arm-elf\include/_ansi.h:
-
-C:\WinARM\arm-elf\include/newlib.h:
-
-C:\WinARM\arm-elf\include/sys/config.h:
-
-C:\WinARM\arm-elf\include/machine/ieeefp.h:
-
-C:\WinARM\arm-elf\include/sys/_types.h:
-
-C:\WinARM\arm-elf\include/sys/lock.h:
-
-c:\winarm\bin\../lib/gcc/arm-elf/4.1.1/include/stddef.h:
-
-C:\WinARM\arm-elf\include/_ansi.h:
-
-../mav_common/include/mav_common/comm_types.h:
diff --git a/ccny_asctec_firmware/.dep/comm_util_LL.o.d b/ccny_asctec_firmware/.dep/comm_util_LL.o.d
deleted file mode 100644
index 12a81d9..0000000
--- a/ccny_asctec_firmware/.dep/comm_util_LL.o.d
+++ /dev/null
@@ -1,35 +0,0 @@
-src/comm_util_LL.o: src/comm_util_LL.c \
-  include/ccny_asctec_firmware/comm_util_LL.h \
-  C:\WinARM\arm-elf\include/stdint.h C:\WinARM\arm-elf\include/math.h \
-  C:\WinARM\arm-elf\include/sys/reent.h C:\WinARM\arm-elf\include/_ansi.h \
-  C:\WinARM\arm-elf\include/newlib.h \
-  C:\WinARM\arm-elf\include/sys/config.h \
-  C:\WinARM\arm-elf\include/machine/ieeefp.h \
-  C:\WinARM\arm-elf\include/sys/_types.h \
-  C:\WinARM\arm-elf\include/sys/lock.h \
-  c:\winarm\bin\../lib/gcc/arm-elf/4.1.1/include/stddef.h \
-  C:\WinARM\arm-elf\include/_ansi.h
-
-include/ccny_asctec_firmware/comm_util_LL.h:
-
-C:\WinARM\arm-elf\include/stdint.h:
-
-C:\WinARM\arm-elf\include/math.h:
-
-C:\WinARM\arm-elf\include/sys/reent.h:
-
-C:\WinARM\arm-elf\include/_ansi.h:
-
-C:\WinARM\arm-elf\include/newlib.h:
-
-C:\WinARM\arm-elf\include/sys/config.h:
-
-C:\WinARM\arm-elf\include/machine/ieeefp.h:
-
-C:\WinARM\arm-elf\include/sys/_types.h:
-
-C:\WinARM\arm-elf\include/sys/lock.h:
-
-c:\winarm\bin\../lib/gcc/arm-elf/4.1.1/include/stddef.h:
-
-C:\WinARM\arm-elf\include/_ansi.h:
diff --git a/ccny_asctec_firmware/.dep/gpsmath.o.d b/ccny_asctec_firmware/.dep/gpsmath.o.d
deleted file mode 100644
index fd37291..0000000
--- a/ccny_asctec_firmware/.dep/gpsmath.o.d
+++ /dev/null
@@ -1,32 +0,0 @@
-src/gpsmath.o: src/gpsmath.c C:\WinARM\arm-elf\include/math.h \
-  C:\WinARM\arm-elf\include/sys/reent.h C:\WinARM\arm-elf\include/_ansi.h \
-  C:\WinARM\arm-elf\include/newlib.h \
-  C:\WinARM\arm-elf\include/sys/config.h \
-  C:\WinARM\arm-elf\include/machine/ieeefp.h \
-  C:\WinARM\arm-elf\include/sys/_types.h \
-  C:\WinARM\arm-elf\include/sys/lock.h \
-  c:\winarm\bin\../lib/gcc/arm-elf/4.1.1/include/stddef.h \
-  C:\WinARM\arm-elf\include/_ansi.h \
-  include/ccny_asctec_firmware/gpsmath.h
-
-C:\WinARM\arm-elf\include/math.h:
-
-C:\WinARM\arm-elf\include/sys/reent.h:
-
-C:\WinARM\arm-elf\include/_ansi.h:
-
-C:\WinARM\arm-elf\include/newlib.h:
-
-C:\WinARM\arm-elf\include/sys/config.h:
-
-C:\WinARM\arm-elf\include/machine/ieeefp.h:
-
-C:\WinARM\arm-elf\include/sys/_types.h:
-
-C:\WinARM\arm-elf\include/sys/lock.h:
-
-c:\winarm\bin\../lib/gcc/arm-elf/4.1.1/include/stddef.h:
-
-C:\WinARM\arm-elf\include/_ansi.h:
-
-include/ccny_asctec_firmware/gpsmath.h:
diff --git a/ccny_asctec_firmware/.dep/hardware.o.d b/ccny_asctec_firmware/.dep/hardware.o.d
deleted file mode 100644
index 26f9101..0000000
--- a/ccny_asctec_firmware/.dep/hardware.o.d
+++ /dev/null
@@ -1,35 +0,0 @@
-src/hardware.o: src/hardware.c include/ccny_asctec_firmware/hardware.h \
-  include/ccny_asctec_firmware/LPC214x.h \
-  include/ccny_asctec_firmware/main.h include/ccny_asctec_firmware/util.h \
-  C:\WinARM\arm-elf\include/stdint.h \
-  include/ccny_asctec_firmware/system.h \
-  include/ccny_asctec_firmware/uart.h \
-  C:\WinARM\arm-elf\include/inttypes.h \
-  c:\winarm\bin\../lib/gcc/arm-elf/4.1.1/include/stddef.h \
-  ../mav_common/include/mav_common/comm_packets.h \
-  ../mav_common/include/mav_common/comm_types.h \
-  external/Common_WinARM/inc/irq.h
-
-include/ccny_asctec_firmware/hardware.h:
-
-include/ccny_asctec_firmware/LPC214x.h:
-
-include/ccny_asctec_firmware/main.h:
-
-include/ccny_asctec_firmware/util.h:
-
-C:\WinARM\arm-elf\include/stdint.h:
-
-include/ccny_asctec_firmware/system.h:
-
-include/ccny_asctec_firmware/uart.h:
-
-C:\WinARM\arm-elf\include/inttypes.h:
-
-c:\winarm\bin\../lib/gcc/arm-elf/4.1.1/include/stddef.h:
-
-../mav_common/include/mav_common/comm_packets.h:
-
-../mav_common/include/mav_common/comm_types.h:
-
-external/Common_WinARM/inc/irq.h:
diff --git a/ccny_asctec_firmware/.dep/i2c.o.d b/ccny_asctec_firmware/.dep/i2c.o.d
deleted file mode 100644
index ef7d6a1..0000000
--- a/ccny_asctec_firmware/.dep/i2c.o.d
+++ /dev/null
@@ -1,11 +0,0 @@
-src/i2c.o: src/i2c.c external/Common_WinARM/inc/LPC214x.h \
-  external/Common_WinARM/inc/type.h external/Common_WinARM/inc/irq.h \
-  include/ccny_asctec_firmware/i2c.h
-
-external/Common_WinARM/inc/LPC214x.h:
-
-external/Common_WinARM/inc/type.h:
-
-external/Common_WinARM/inc/irq.h:
-
-include/ccny_asctec_firmware/i2c.h:
diff --git a/ccny_asctec_firmware/.dep/interrupt_utils.o.d b/ccny_asctec_firmware/.dep/interrupt_utils.o.d
deleted file mode 100644
index 6063956..0000000
--- a/ccny_asctec_firmware/.dep/interrupt_utils.o.d
+++ /dev/null
@@ -1,5 +0,0 @@
-external/Common_WinARM/src/interrupt_utils.o:  \
- external/Common_WinARM/src/interrupt_utils.c \
-  external/Common_WinARM/inc/interrupt_utils.h
-
-external/Common_WinARM/inc/interrupt_utils.h:
diff --git a/ccny_asctec_firmware/.dep/irq.o.d b/ccny_asctec_firmware/.dep/irq.o.d
deleted file mode 100644
index 8c25def..0000000
--- a/ccny_asctec_firmware/.dep/irq.o.d
+++ /dev/null
@@ -1,6 +0,0 @@
-external/Common_WinARM/src/irq.o: external/Common_WinARM/src/irq.c \
-  external/Common_WinARM/inc/LPC214x.h external/Common_WinARM/inc/irq.h
-
-external/Common_WinARM/inc/LPC214x.h:
-
-external/Common_WinARM/inc/irq.h:
diff --git a/ccny_asctec_firmware/.dep/kalman.o.d b/ccny_asctec_firmware/.dep/kalman.o.d
deleted file mode 100644
index 6ca21d6..0000000
--- a/ccny_asctec_firmware/.dep/kalman.o.d
+++ /dev/null
@@ -1,98 +0,0 @@
-src/kalman.o: src/kalman.c include/ccny_asctec_firmware/kalman.h \
-  C:\WinARM\arm-elf\include/inttypes.h C:\WinARM\arm-elf\include/stdint.h \
-  c:\winarm\bin\../lib/gcc/arm-elf/4.1.1/include/stddef.h \
-  ../mav_common/include/mav_common/comm_packets.h \
-  ../mav_common/include/mav_common/comm_types.h \
-  ../mav_common/include/mav_common/comm_util.h \
-  C:\WinARM\arm-elf\include/math.h C:\WinARM\arm-elf\include/sys/reent.h \
-  C:\WinARM\arm-elf\include/_ansi.h C:\WinARM\arm-elf\include/newlib.h \
-  C:\WinARM\arm-elf\include/sys/config.h \
-  C:\WinARM\arm-elf\include/machine/ieeefp.h \
-  C:\WinARM\arm-elf\include/sys/_types.h \
-  C:\WinARM\arm-elf\include/sys/lock.h C:\WinARM\arm-elf\include/_ansi.h \
-  ../mav_common/include/mav_common/comm_types.h \
-  include/ccny_asctec_firmware/matrices.h \
-  C:\WinARM\arm-elf\include/stdlib.h \
-  C:\WinARM\arm-elf\include/machine/stdlib.h \
-  C:\WinARM\arm-elf\include/alloca.h \
-  include/ccny_asctec_firmware/LL_HL_comm.h \
-  include/ccny_asctec_firmware/sdk.h include/ccny_asctec_firmware/pid.h \
-  ../mav_common/include/mav_common/comm.h \
-  include/ccny_asctec_firmware/uart.h \
-  include/ccny_asctec_firmware/hardware.h \
-  include/ccny_asctec_firmware/LPC214x.h \
-  include/ccny_asctec_firmware/main.h include/ccny_asctec_firmware/util.h \
-  include/ccny_asctec_firmware/system.h external/Common_WinARM/inc/irq.h \
-  include/ccny_asctec_firmware/kalman.h \
-  include/ccny_asctec_firmware/comm_util_LL.h \
-  include/ccny_asctec_firmware/ssp.h
-
-include/ccny_asctec_firmware/kalman.h:
-
-C:\WinARM\arm-elf\include/inttypes.h:
-
-C:\WinARM\arm-elf\include/stdint.h:
-
-c:\winarm\bin\../lib/gcc/arm-elf/4.1.1/include/stddef.h:
-
-../mav_common/include/mav_common/comm_packets.h:
-
-../mav_common/include/mav_common/comm_types.h:
-
-../mav_common/include/mav_common/comm_util.h:
-
-C:\WinARM\arm-elf\include/math.h:
-
-C:\WinARM\arm-elf\include/sys/reent.h:
-
-C:\WinARM\arm-elf\include/_ansi.h:
-
-C:\WinARM\arm-elf\include/newlib.h:
-
-C:\WinARM\arm-elf\include/sys/config.h:
-
-C:\WinARM\arm-elf\include/machine/ieeefp.h:
-
-C:\WinARM\arm-elf\include/sys/_types.h:
-
-C:\WinARM\arm-elf\include/sys/lock.h:
-
-C:\WinARM\arm-elf\include/_ansi.h:
-
-../mav_common/include/mav_common/comm_types.h:
-
-include/ccny_asctec_firmware/matrices.h:
-
-C:\WinARM\arm-elf\include/stdlib.h:
-
-C:\WinARM\arm-elf\include/machine/stdlib.h:
-
-C:\WinARM\arm-elf\include/alloca.h:
-
-include/ccny_asctec_firmware/LL_HL_comm.h:
-
-include/ccny_asctec_firmware/sdk.h:
-
-include/ccny_asctec_firmware/pid.h:
-
-../mav_common/include/mav_common/comm.h:
-
-include/ccny_asctec_firmware/uart.h:
-
-include/ccny_asctec_firmware/hardware.h:
-
-include/ccny_asctec_firmware/LPC214x.h:
-
-include/ccny_asctec_firmware/main.h:
-
-include/ccny_asctec_firmware/util.h:
-
-include/ccny_asctec_firmware/system.h:
-
-external/Common_WinARM/inc/irq.h:
-
-include/ccny_asctec_firmware/kalman.h:
-
-include/ccny_asctec_firmware/comm_util_LL.h:
-
-include/ccny_asctec_firmware/ssp.h:
diff --git a/ccny_asctec_firmware/.dep/main.o.d b/ccny_asctec_firmware/.dep/main.o.d
deleted file mode 100644
index aa2ea25..0000000
--- a/ccny_asctec_firmware/.dep/main.o.d
+++ /dev/null
@@ -1,163 +0,0 @@
-src/main.o: src/main.c C:\WinARM\arm-elf\include/stdio.h \
-  C:\WinARM\arm-elf\include/_ansi.h C:\WinARM\arm-elf\include/newlib.h \
-  C:\WinARM\arm-elf\include/sys/config.h \
-  C:\WinARM\arm-elf\include/machine/ieeefp.h \
-  c:\winarm\bin\../lib/gcc/arm-elf/4.1.1/include/stddef.h \
-  c:\winarm\bin\../lib/gcc/arm-elf/4.1.1/include/stdarg.h \
-  C:\WinARM\arm-elf\include/sys/reent.h C:\WinARM\arm-elf\include/_ansi.h \
-  C:\WinARM\arm-elf\include/sys/_types.h \
-  C:\WinARM\arm-elf\include/sys/lock.h \
-  C:\WinARM\arm-elf\include/sys/types.h \
-  C:\WinARM\arm-elf\include/machine/_types.h \
-  C:\WinARM\arm-elf\include/limits.h \
-  c:\winarm\bin\../lib/gcc/arm-elf/4.1.1/include/limits.h \
-  C:\WinARM\arm-elf\include/machine/types.h \
-  C:\WinARM\arm-elf\include/sys/features.h \
-  C:\WinARM\arm-elf\include/sys/stdio.h \
-  include/ccny_asctec_firmware/main.h include/ccny_asctec_firmware/util.h \
-  C:\WinARM\arm-elf\include/stdint.h \
-  include/ccny_asctec_firmware/LPC214x.h \
-  include/ccny_asctec_firmware/system.h \
-  include/ccny_asctec_firmware/uart.h \
-  C:\WinARM\arm-elf\include/inttypes.h \
-  ../mav_common/include/mav_common/comm_packets.h \
-  ../mav_common/include/mav_common/comm_types.h \
-  C:\WinARM\arm-elf\include/math.h \
-  include/ccny_asctec_firmware/hardware.h \
-  include/ccny_asctec_firmware/main.h \
-  include/ccny_asctec_firmware/system.h \
-  include/ccny_asctec_firmware/uart.h external/Common_WinARM/inc/irq.h \
-  external/Common_WinARM/inc/irq.h include/ccny_asctec_firmware/i2c.h \
-  include/ccny_asctec_firmware/gpsmath.h \
-  include/ccny_asctec_firmware/adc.h include/ccny_asctec_firmware/uart1.h \
-  include/ccny_asctec_firmware/ssp.h \
-  include/ccny_asctec_firmware/LL_HL_comm.h \
-  include/ccny_asctec_firmware/sdk.h include/ccny_asctec_firmware/pid.h \
-  ../mav_common/include/mav_common/comm.h \
-  ../mav_common/include/mav_common/comm_types.h \
-  include/ccny_asctec_firmware/sdk.h \
-  include/ccny_asctec_firmware/LL_HL_comm.h \
-  include/ccny_asctec_firmware/hardware.h \
-  include/ccny_asctec_firmware/kalman.h \
-  ../mav_common/include/mav_common/comm_util.h \
-  include/ccny_asctec_firmware/matrices.h \
-  C:\WinARM\arm-elf\include/stdlib.h \
-  C:\WinARM\arm-elf\include/machine/stdlib.h \
-  C:\WinARM\arm-elf\include/alloca.h include/ccny_asctec_firmware/ssp.h \
-  include/ccny_asctec_firmware/comm_util_LL.h \
-  C:\WinARM\arm-elf\include/unistd.h \
-  C:\WinARM\arm-elf\include/sys/unistd.h
-
-C:\WinARM\arm-elf\include/stdio.h:
-
-C:\WinARM\arm-elf\include/_ansi.h:
-
-C:\WinARM\arm-elf\include/newlib.h:
-
-C:\WinARM\arm-elf\include/sys/config.h:
-
-C:\WinARM\arm-elf\include/machine/ieeefp.h:
-
-c:\winarm\bin\../lib/gcc/arm-elf/4.1.1/include/stddef.h:
-
-c:\winarm\bin\../lib/gcc/arm-elf/4.1.1/include/stdarg.h:
-
-C:\WinARM\arm-elf\include/sys/reent.h:
-
-C:\WinARM\arm-elf\include/_ansi.h:
-
-C:\WinARM\arm-elf\include/sys/_types.h:
-
-C:\WinARM\arm-elf\include/sys/lock.h:
-
-C:\WinARM\arm-elf\include/sys/types.h:
-
-C:\WinARM\arm-elf\include/machine/_types.h:
-
-C:\WinARM\arm-elf\include/limits.h:
-
-c:\winarm\bin\../lib/gcc/arm-elf/4.1.1/include/limits.h:
-
-C:\WinARM\arm-elf\include/machine/types.h:
-
-C:\WinARM\arm-elf\include/sys/features.h:
-
-C:\WinARM\arm-elf\include/sys/stdio.h:
-
-include/ccny_asctec_firmware/main.h:
-
-include/ccny_asctec_firmware/util.h:
-
-C:\WinARM\arm-elf\include/stdint.h:
-
-include/ccny_asctec_firmware/LPC214x.h:
-
-include/ccny_asctec_firmware/system.h:
-
-include/ccny_asctec_firmware/uart.h:
-
-C:\WinARM\arm-elf\include/inttypes.h:
-
-../mav_common/include/mav_common/comm_packets.h:
-
-../mav_common/include/mav_common/comm_types.h:
-
-C:\WinARM\arm-elf\include/math.h:
-
-include/ccny_asctec_firmware/hardware.h:
-
-include/ccny_asctec_firmware/main.h:
-
-include/ccny_asctec_firmware/system.h:
-
-include/ccny_asctec_firmware/uart.h:
-
-external/Common_WinARM/inc/irq.h:
-
-external/Common_WinARM/inc/irq.h:
-
-include/ccny_asctec_firmware/i2c.h:
-
-include/ccny_asctec_firmware/gpsmath.h:
-
-include/ccny_asctec_firmware/adc.h:
-
-include/ccny_asctec_firmware/uart1.h:
-
-include/ccny_asctec_firmware/ssp.h:
-
-include/ccny_asctec_firmware/LL_HL_comm.h:
-
-include/ccny_asctec_firmware/sdk.h:
-
-include/ccny_asctec_firmware/pid.h:
-
-../mav_common/include/mav_common/comm.h:
-
-../mav_common/include/mav_common/comm_types.h:
-
-include/ccny_asctec_firmware/sdk.h:
-
-include/ccny_asctec_firmware/LL_HL_comm.h:
-
-include/ccny_asctec_firmware/hardware.h:
-
-include/ccny_asctec_firmware/kalman.h:
-
-../mav_common/include/mav_common/comm_util.h:
-
-include/ccny_asctec_firmware/matrices.h:
-
-C:\WinARM\arm-elf\include/stdlib.h:
-
-C:\WinARM\arm-elf\include/machine/stdlib.h:
-
-C:\WinARM\arm-elf\include/alloca.h:
-
-include/ccny_asctec_firmware/ssp.h:
-
-include/ccny_asctec_firmware/comm_util_LL.h:
-
-C:\WinARM\arm-elf\include/unistd.h:
-
-C:\WinARM\arm-elf\include/sys/unistd.h:
diff --git a/ccny_asctec_firmware/.dep/matrices.o.d b/ccny_asctec_firmware/.dep/matrices.o.d
deleted file mode 100644
index 9bab750..0000000
--- a/ccny_asctec_firmware/.dep/matrices.o.d
+++ /dev/null
@@ -1,39 +0,0 @@
-src/matrices.o: src/matrices.c include/ccny_asctec_firmware/matrices.h \
-  C:\WinARM\arm-elf\include/math.h C:\WinARM\arm-elf\include/sys/reent.h \
-  C:\WinARM\arm-elf\include/_ansi.h C:\WinARM\arm-elf\include/newlib.h \
-  C:\WinARM\arm-elf\include/sys/config.h \
-  C:\WinARM\arm-elf\include/machine/ieeefp.h \
-  C:\WinARM\arm-elf\include/sys/_types.h \
-  C:\WinARM\arm-elf\include/sys/lock.h \
-  c:\winarm\bin\../lib/gcc/arm-elf/4.1.1/include/stddef.h \
-  C:\WinARM\arm-elf\include/_ansi.h C:\WinARM\arm-elf\include/stdlib.h \
-  C:\WinARM\arm-elf\include/machine/stdlib.h \
-  C:\WinARM\arm-elf\include/alloca.h
-
-include/ccny_asctec_firmware/matrices.h:
-
-C:\WinARM\arm-elf\include/math.h:
-
-C:\WinARM\arm-elf\include/sys/reent.h:
-
-C:\WinARM\arm-elf\include/_ansi.h:
-
-C:\WinARM\arm-elf\include/newlib.h:
-
-C:\WinARM\arm-elf\include/sys/config.h:
-
-C:\WinARM\arm-elf\include/machine/ieeefp.h:
-
-C:\WinARM\arm-elf\include/sys/_types.h:
-
-C:\WinARM\arm-elf\include/sys/lock.h:
-
-c:\winarm\bin\../lib/gcc/arm-elf/4.1.1/include/stddef.h:
-
-C:\WinARM\arm-elf\include/_ansi.h:
-
-C:\WinARM\arm-elf\include/stdlib.h:
-
-C:\WinARM\arm-elf\include/machine/stdlib.h:
-
-C:\WinARM\arm-elf\include/alloca.h:
diff --git a/ccny_asctec_firmware/.dep/pid.o.d b/ccny_asctec_firmware/.dep/pid.o.d
deleted file mode 100644
index 7a58515..0000000
--- a/ccny_asctec_firmware/.dep/pid.o.d
+++ /dev/null
@@ -1,98 +0,0 @@
-src/pid.o: src/pid.c include/ccny_asctec_firmware/pid.h \
-  C:\WinARM\arm-elf\include/inttypes.h C:\WinARM\arm-elf\include/stdint.h \
-  c:\winarm\bin\../lib/gcc/arm-elf/4.1.1/include/stddef.h \
-  ../mav_common/include/mav_common/comm.h \
-  ../mav_common/include/mav_common/comm_packets.h \
-  ../mav_common/include/mav_common/comm_types.h \
-  ../mav_common/include/mav_common/comm_types.h \
-  include/ccny_asctec_firmware/sdk.h include/ccny_asctec_firmware/pid.h \
-  include/ccny_asctec_firmware/uart.h \
-  include/ccny_asctec_firmware/hardware.h \
-  include/ccny_asctec_firmware/LPC214x.h \
-  include/ccny_asctec_firmware/main.h include/ccny_asctec_firmware/util.h \
-  include/ccny_asctec_firmware/system.h external/Common_WinARM/inc/irq.h \
-  include/ccny_asctec_firmware/kalman.h \
-  ../mav_common/include/mav_common/comm_util.h \
-  C:\WinARM\arm-elf\include/math.h C:\WinARM\arm-elf\include/sys/reent.h \
-  C:\WinARM\arm-elf\include/_ansi.h C:\WinARM\arm-elf\include/newlib.h \
-  C:\WinARM\arm-elf\include/sys/config.h \
-  C:\WinARM\arm-elf\include/machine/ieeefp.h \
-  C:\WinARM\arm-elf\include/sys/_types.h \
-  C:\WinARM\arm-elf\include/sys/lock.h C:\WinARM\arm-elf\include/_ansi.h \
-  include/ccny_asctec_firmware/matrices.h \
-  C:\WinARM\arm-elf\include/stdlib.h \
-  C:\WinARM\arm-elf\include/machine/stdlib.h \
-  C:\WinARM\arm-elf\include/alloca.h \
-  include/ccny_asctec_firmware/LL_HL_comm.h \
-  include/ccny_asctec_firmware/ssp.h \
-  include/ccny_asctec_firmware/comm_util_LL.h
-
-include/ccny_asctec_firmware/pid.h:
-
-C:\WinARM\arm-elf\include/inttypes.h:
-
-C:\WinARM\arm-elf\include/stdint.h:
-
-c:\winarm\bin\../lib/gcc/arm-elf/4.1.1/include/stddef.h:
-
-../mav_common/include/mav_common/comm.h:
-
-../mav_common/include/mav_common/comm_packets.h:
-
-../mav_common/include/mav_common/comm_types.h:
-
-../mav_common/include/mav_common/comm_types.h:
-
-include/ccny_asctec_firmware/sdk.h:
-
-include/ccny_asctec_firmware/pid.h:
-
-include/ccny_asctec_firmware/uart.h:
-
-include/ccny_asctec_firmware/hardware.h:
-
-include/ccny_asctec_firmware/LPC214x.h:
-
-include/ccny_asctec_firmware/main.h:
-
-include/ccny_asctec_firmware/util.h:
-
-include/ccny_asctec_firmware/system.h:
-
-external/Common_WinARM/inc/irq.h:
-
-include/ccny_asctec_firmware/kalman.h:
-
-../mav_common/include/mav_common/comm_util.h:
-
-C:\WinARM\arm-elf\include/math.h:
-
-C:\WinARM\arm-elf\include/sys/reent.h:
-
-C:\WinARM\arm-elf\include/_ansi.h:
-
-C:\WinARM\arm-elf\include/newlib.h:
-
-C:\WinARM\arm-elf\include/sys/config.h:
-
-C:\WinARM\arm-elf\include/machine/ieeefp.h:
-
-C:\WinARM\arm-elf\include/sys/_types.h:
-
-C:\WinARM\arm-elf\include/sys/lock.h:
-
-C:\WinARM\arm-elf\include/_ansi.h:
-
-include/ccny_asctec_firmware/matrices.h:
-
-C:\WinARM\arm-elf\include/stdlib.h:
-
-C:\WinARM\arm-elf\include/machine/stdlib.h:
-
-C:\WinARM\arm-elf\include/alloca.h:
-
-include/ccny_asctec_firmware/LL_HL_comm.h:
-
-include/ccny_asctec_firmware/ssp.h:
-
-include/ccny_asctec_firmware/comm_util_LL.h:
diff --git a/ccny_asctec_firmware/.dep/sdk.o.d b/ccny_asctec_firmware/.dep/sdk.o.d
deleted file mode 100644
index 9574208..0000000
--- a/ccny_asctec_firmware/.dep/sdk.o.d
+++ /dev/null
@@ -1,140 +0,0 @@
-src/sdk.o: src/sdk.c ../mav_common/include/mav_common/comm_packets.h \
-  C:\WinARM\arm-elf\include/inttypes.h C:\WinARM\arm-elf\include/stdint.h \
-  c:\winarm\bin\../lib/gcc/arm-elf/4.1.1/include/stddef.h \
-  ../mav_common/include/mav_common/comm_types.h \
-  ../mav_common/include/mav_common/comm.h \
-  ../mav_common/include/mav_common/comm_types.h \
-  include/ccny_asctec_firmware/sdk.h include/ccny_asctec_firmware/pid.h \
-  include/ccny_asctec_firmware/sdk.h \
-  include/ccny_asctec_firmware/LL_HL_comm.h \
-  include/ccny_asctec_firmware/uart.h \
-  include/ccny_asctec_firmware/hardware.h \
-  include/ccny_asctec_firmware/LPC214x.h \
-  include/ccny_asctec_firmware/main.h include/ccny_asctec_firmware/util.h \
-  include/ccny_asctec_firmware/system.h external/Common_WinARM/inc/irq.h \
-  include/ccny_asctec_firmware/kalman.h \
-  ../mav_common/include/mav_common/comm_util.h \
-  C:\WinARM\arm-elf\include/math.h C:\WinARM\arm-elf\include/sys/reent.h \
-  C:\WinARM\arm-elf\include/_ansi.h C:\WinARM\arm-elf\include/newlib.h \
-  C:\WinARM\arm-elf\include/sys/config.h \
-  C:\WinARM\arm-elf\include/machine/ieeefp.h \
-  C:\WinARM\arm-elf\include/sys/_types.h \
-  C:\WinARM\arm-elf\include/sys/lock.h C:\WinARM\arm-elf\include/_ansi.h \
-  include/ccny_asctec_firmware/matrices.h \
-  C:\WinARM\arm-elf\include/stdlib.h \
-  C:\WinARM\arm-elf\include/machine/stdlib.h \
-  C:\WinARM\arm-elf\include/alloca.h include/ccny_asctec_firmware/ssp.h \
-  include/ccny_asctec_firmware/comm_util_LL.h \
-  include/ccny_asctec_firmware/main.h \
-  include/ccny_asctec_firmware/system.h \
-  include/ccny_asctec_firmware/LL_HL_comm.h \
-  include/ccny_asctec_firmware/uart.h C:\WinARM\arm-elf\include/time.h \
-  C:\WinARM\arm-elf\include/machine/time.h \
-  C:\WinARM\arm-elf\include/sys/types.h \
-  C:\WinARM\arm-elf\include/machine/_types.h \
-  C:\WinARM\arm-elf\include/limits.h \
-  c:\winarm\bin\../lib/gcc/arm-elf/4.1.1/include/limits.h \
-  C:\WinARM\arm-elf\include/machine/types.h \
-  C:\WinARM\arm-elf\include/sys/features.h \
-  external/Common_WinARM/inc/irq.h external/Common_WinARM/inc/LPC214x.h \
-  include/ccny_asctec_firmware/gpsmath.h
-
-../mav_common/include/mav_common/comm_packets.h:
-
-C:\WinARM\arm-elf\include/inttypes.h:
-
-C:\WinARM\arm-elf\include/stdint.h:
-
-c:\winarm\bin\../lib/gcc/arm-elf/4.1.1/include/stddef.h:
-
-../mav_common/include/mav_common/comm_types.h:
-
-../mav_common/include/mav_common/comm.h:
-
-../mav_common/include/mav_common/comm_types.h:
-
-include/ccny_asctec_firmware/sdk.h:
-
-include/ccny_asctec_firmware/pid.h:
-
-include/ccny_asctec_firmware/sdk.h:
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-include/ccny_asctec_firmware/LL_HL_comm.h:
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-include/ccny_asctec_firmware/uart.h:
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-include/ccny_asctec_firmware/hardware.h:
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-include/ccny_asctec_firmware/LPC214x.h:
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-include/ccny_asctec_firmware/main.h:
-
-include/ccny_asctec_firmware/util.h:
-
-include/ccny_asctec_firmware/system.h:
-
-external/Common_WinARM/inc/irq.h:
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-include/ccny_asctec_firmware/kalman.h:
-
-../mav_common/include/mav_common/comm_util.h:
-
-C:\WinARM\arm-elf\include/math.h:
-
-C:\WinARM\arm-elf\include/sys/reent.h:
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-include/ccny_asctec_firmware/matrices.h:
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-C:\WinARM\arm-elf\include/machine/stdlib.h:
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-C:\WinARM\arm-elf\include/alloca.h:
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-include/ccny_asctec_firmware/ssp.h:
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-include/ccny_asctec_firmware/comm_util_LL.h:
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-include/ccny_asctec_firmware/main.h:
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-include/ccny_asctec_firmware/system.h:
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-include/ccny_asctec_firmware/LL_HL_comm.h:
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-include/ccny_asctec_firmware/uart.h:
-
-C:\WinARM\arm-elf\include/time.h:
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-C:\WinARM\arm-elf\include/machine/time.h:
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-C:\WinARM\arm-elf\include/sys/types.h:
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-C:\WinARM\arm-elf\include/machine/_types.h:
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-C:\WinARM\arm-elf\include/limits.h:
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-c:\winarm\bin\../lib/gcc/arm-elf/4.1.1/include/limits.h:
-
-C:\WinARM\arm-elf\include/machine/types.h:
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-C:\WinARM\arm-elf\include/sys/features.h:
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-external/Common_WinARM/inc/irq.h:
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-external/Common_WinARM/inc/LPC214x.h:
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-include/ccny_asctec_firmware/gpsmath.h:
diff --git a/ccny_asctec_firmware/.dep/ssp.o.d b/ccny_asctec_firmware/.dep/ssp.o.d
deleted file mode 100644
index 3ae933a..0000000
--- a/ccny_asctec_firmware/.dep/ssp.o.d
+++ /dev/null
@@ -1,27 +0,0 @@
-src/ssp.o: src/ssp.c external/Common_WinARM/inc/LPC214x.h \
-  external/Common_WinARM/inc/type.h external/Common_WinARM/inc/irq.h \
-  include/ccny_asctec_firmware/ssp.h include/ccny_asctec_firmware/main.h \
-  include/ccny_asctec_firmware/util.h C:\WinARM\arm-elf\include/stdint.h \
-  include/ccny_asctec_firmware/LPC214x.h \
-  include/ccny_asctec_firmware/system.h \
-  include/ccny_asctec_firmware/LL_HL_comm.h
-
-external/Common_WinARM/inc/LPC214x.h:
-
-external/Common_WinARM/inc/type.h:
-
-external/Common_WinARM/inc/irq.h:
-
-include/ccny_asctec_firmware/ssp.h:
-
-include/ccny_asctec_firmware/main.h:
-
-include/ccny_asctec_firmware/util.h:
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-C:\WinARM\arm-elf\include/stdint.h:
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-include/ccny_asctec_firmware/LPC214x.h:
-
-include/ccny_asctec_firmware/system.h:
-
-include/ccny_asctec_firmware/LL_HL_comm.h:
diff --git a/ccny_asctec_firmware/.dep/syscalls.o.d b/ccny_asctec_firmware/.dep/syscalls.o.d
deleted file mode 100644
index 9b3cff2..0000000
--- a/ccny_asctec_firmware/.dep/syscalls.o.d
+++ /dev/null
@@ -1,76 +0,0 @@
-src/syscalls.o: src/syscalls.c C:\WinARM\arm-elf\include/stdlib.h \
-  C:\WinARM\arm-elf\include/_ansi.h C:\WinARM\arm-elf\include/newlib.h \
-  C:\WinARM\arm-elf\include/sys/config.h \
-  C:\WinARM\arm-elf\include/machine/ieeefp.h \
-  c:\winarm\bin\../lib/gcc/arm-elf/4.1.1/include/stddef.h \
-  C:\WinARM\arm-elf\include/sys/reent.h C:\WinARM\arm-elf\include/_ansi.h \
-  C:\WinARM\arm-elf\include/sys/_types.h \
-  C:\WinARM\arm-elf\include/sys/lock.h \
-  C:\WinARM\arm-elf\include/machine/stdlib.h \
-  C:\WinARM\arm-elf\include/alloca.h C:\WinARM\arm-elf\include/reent.h \
-  C:\WinARM\arm-elf\include/machine/types.h \
-  C:\WinARM\arm-elf\include/sys/stat.h C:\WinARM\arm-elf\include/time.h \
-  C:\WinARM\arm-elf\include/machine/time.h \
-  C:\WinARM\arm-elf\include/sys/types.h \
-  C:\WinARM\arm-elf\include/machine/_types.h \
-  C:\WinARM\arm-elf\include/limits.h \
-  c:\winarm\bin\../lib/gcc/arm-elf/4.1.1/include/limits.h \
-  C:\WinARM\arm-elf\include/sys/features.h \
-  include/ccny_asctec_firmware/uart.h \
-  C:\WinARM\arm-elf\include/inttypes.h C:\WinARM\arm-elf\include/stdint.h \
-  ../mav_common/include/mav_common/comm_packets.h \
-  ../mav_common/include/mav_common/comm_types.h
-
-C:\WinARM\arm-elf\include/stdlib.h:
-
-C:\WinARM\arm-elf\include/_ansi.h:
-
-C:\WinARM\arm-elf\include/newlib.h:
-
-C:\WinARM\arm-elf\include/sys/config.h:
-
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-
-c:\winarm\bin\../lib/gcc/arm-elf/4.1.1/include/stddef.h:
-
-C:\WinARM\arm-elf\include/sys/reent.h:
-
-C:\WinARM\arm-elf\include/_ansi.h:
-
-C:\WinARM\arm-elf\include/sys/_types.h:
-
-C:\WinARM\arm-elf\include/sys/lock.h:
-
-C:\WinARM\arm-elf\include/machine/stdlib.h:
-
-C:\WinARM\arm-elf\include/alloca.h:
-
-C:\WinARM\arm-elf\include/reent.h:
-
-C:\WinARM\arm-elf\include/machine/types.h:
-
-C:\WinARM\arm-elf\include/sys/stat.h:
-
-C:\WinARM\arm-elf\include/time.h:
-
-C:\WinARM\arm-elf\include/machine/time.h:
-
-C:\WinARM\arm-elf\include/sys/types.h:
-
-C:\WinARM\arm-elf\include/machine/_types.h:
-
-C:\WinARM\arm-elf\include/limits.h:
-
-c:\winarm\bin\../lib/gcc/arm-elf/4.1.1/include/limits.h:
-
-C:\WinARM\arm-elf\include/sys/features.h:
-
-include/ccny_asctec_firmware/uart.h:
-
-C:\WinARM\arm-elf\include/inttypes.h:
-
-C:\WinARM\arm-elf\include/stdint.h:
-
-../mav_common/include/mav_common/comm_packets.h:
-
-../mav_common/include/mav_common/comm_types.h:
diff --git a/ccny_asctec_firmware/.dep/system.o.d b/ccny_asctec_firmware/.dep/system.o.d
deleted file mode 100644
index 4a6ba34..0000000
--- a/ccny_asctec_firmware/.dep/system.o.d
+++ /dev/null
@@ -1,131 +0,0 @@
-src/system.o: src/system.c external/Common_WinARM/inc/LPC214x.h \
-  include/ccny_asctec_firmware/system.h \
-  include/ccny_asctec_firmware/uart.h \
-  C:\WinARM\arm-elf\include/inttypes.h C:\WinARM\arm-elf\include/stdint.h \
-  c:\winarm\bin\../lib/gcc/arm-elf/4.1.1/include/stddef.h \
-  ../mav_common/include/mav_common/comm_packets.h \
-  ../mav_common/include/mav_common/comm_types.h \
-  include/ccny_asctec_firmware/uart1.h \
-  include/ccny_asctec_firmware/main.h include/ccny_asctec_firmware/util.h \
-  include/ccny_asctec_firmware/LPC214x.h \
-  include/ccny_asctec_firmware/hardware.h \
-  include/ccny_asctec_firmware/main.h \
-  include/ccny_asctec_firmware/system.h \
-  include/ccny_asctec_firmware/uart.h external/Common_WinARM/inc/irq.h \
-  include/ccny_asctec_firmware/LPC2k_ee.h \
-  external/Common_WinARM/inc/type.h external/Common_WinARM/inc/irq.h \
-  include/ccny_asctec_firmware/i2c.h include/ccny_asctec_firmware/ssp.h \
-  include/ccny_asctec_firmware/adc.h include/ccny_asctec_firmware/sdk.h \
-  include/ccny_asctec_firmware/pid.h \
-  ../mav_common/include/mav_common/comm.h \
-  ../mav_common/include/mav_common/comm_types.h \
-  include/ccny_asctec_firmware/sdk.h \
-  include/ccny_asctec_firmware/LL_HL_comm.h \
-  include/ccny_asctec_firmware/hardware.h \
-  include/ccny_asctec_firmware/kalman.h \
-  ../mav_common/include/mav_common/comm_util.h \
-  C:\WinARM\arm-elf\include/math.h C:\WinARM\arm-elf\include/sys/reent.h \
-  C:\WinARM\arm-elf\include/_ansi.h C:\WinARM\arm-elf\include/newlib.h \
-  C:\WinARM\arm-elf\include/sys/config.h \
-  C:\WinARM\arm-elf\include/machine/ieeefp.h \
-  C:\WinARM\arm-elf\include/sys/_types.h \
-  C:\WinARM\arm-elf\include/sys/lock.h C:\WinARM\arm-elf\include/_ansi.h \
-  include/ccny_asctec_firmware/matrices.h \
-  C:\WinARM\arm-elf\include/stdlib.h \
-  C:\WinARM\arm-elf\include/machine/stdlib.h \
-  C:\WinARM\arm-elf\include/alloca.h include/ccny_asctec_firmware/ssp.h \
-  include/ccny_asctec_firmware/comm_util_LL.h
-
-external/Common_WinARM/inc/LPC214x.h:
-
-include/ccny_asctec_firmware/system.h:
-
-include/ccny_asctec_firmware/uart.h:
-
-C:\WinARM\arm-elf\include/inttypes.h:
-
-C:\WinARM\arm-elf\include/stdint.h:
-
-c:\winarm\bin\../lib/gcc/arm-elf/4.1.1/include/stddef.h:
-
-../mav_common/include/mav_common/comm_packets.h:
-
-../mav_common/include/mav_common/comm_types.h:
-
-include/ccny_asctec_firmware/uart1.h:
-
-include/ccny_asctec_firmware/main.h:
-
-include/ccny_asctec_firmware/util.h:
-
-include/ccny_asctec_firmware/LPC214x.h:
-
-include/ccny_asctec_firmware/hardware.h:
-
-include/ccny_asctec_firmware/main.h:
-
-include/ccny_asctec_firmware/system.h:
-
-include/ccny_asctec_firmware/uart.h:
-
-external/Common_WinARM/inc/irq.h:
-
-include/ccny_asctec_firmware/LPC2k_ee.h:
-
-external/Common_WinARM/inc/type.h:
-
-external/Common_WinARM/inc/irq.h:
-
-include/ccny_asctec_firmware/i2c.h:
-
-include/ccny_asctec_firmware/ssp.h:
-
-include/ccny_asctec_firmware/adc.h:
-
-include/ccny_asctec_firmware/sdk.h:
-
-include/ccny_asctec_firmware/pid.h:
-
-../mav_common/include/mav_common/comm.h:
-
-../mav_common/include/mav_common/comm_types.h:
-
-include/ccny_asctec_firmware/sdk.h:
-
-include/ccny_asctec_firmware/LL_HL_comm.h:
-
-include/ccny_asctec_firmware/hardware.h:
-
-include/ccny_asctec_firmware/kalman.h:
-
-../mav_common/include/mav_common/comm_util.h:
-
-C:\WinARM\arm-elf\include/math.h:
-
-C:\WinARM\arm-elf\include/sys/reent.h:
-
-C:\WinARM\arm-elf\include/_ansi.h:
-
-C:\WinARM\arm-elf\include/newlib.h:
-
-C:\WinARM\arm-elf\include/sys/config.h:
-
-C:\WinARM\arm-elf\include/machine/ieeefp.h:
-
-C:\WinARM\arm-elf\include/sys/_types.h:
-
-C:\WinARM\arm-elf\include/sys/lock.h:
-
-C:\WinARM\arm-elf\include/_ansi.h:
-
-include/ccny_asctec_firmware/matrices.h:
-
-C:\WinARM\arm-elf\include/stdlib.h:
-
-C:\WinARM\arm-elf\include/machine/stdlib.h:
-
-C:\WinARM\arm-elf\include/alloca.h:
-
-include/ccny_asctec_firmware/ssp.h:
-
-include/ccny_asctec_firmware/comm_util_LL.h:
diff --git a/ccny_asctec_firmware/.dep/uart.o.d b/ccny_asctec_firmware/.dep/uart.o.d
deleted file mode 100644
index 8a0821c..0000000
--- a/ccny_asctec_firmware/.dep/uart.o.d
+++ /dev/null
@@ -1,92 +0,0 @@
-src/uart.o: src/uart.c C:\WinARM\arm-elf\include/string.h \
-  C:\WinARM\arm-elf\include/_ansi.h C:\WinARM\arm-elf\include/newlib.h \
-  C:\WinARM\arm-elf\include/sys/config.h \
-  C:\WinARM\arm-elf\include/machine/ieeefp.h \
-  C:\WinARM\arm-elf\include/sys/reent.h C:\WinARM\arm-elf\include/_ansi.h \
-  C:\WinARM\arm-elf\include/sys/_types.h \
-  C:\WinARM\arm-elf\include/sys/lock.h \
-  c:\winarm\bin\../lib/gcc/arm-elf/4.1.1/include/stddef.h \
-  C:\WinARM\arm-elf\include/sys/string.h \
-  ../mav_common/include/mav_common/comm.h \
-  external/Common_WinARM/inc/LPC214x.h \
-  external/Common_WinARM/inc/interrupt_utils.h \
-  include/ccny_asctec_firmware/system.h \
-  include/ccny_asctec_firmware/main.h include/ccny_asctec_firmware/util.h \
-  C:\WinARM\arm-elf\include/stdint.h \
-  include/ccny_asctec_firmware/LPC214x.h \
-  include/ccny_asctec_firmware/uart.h \
-  C:\WinARM\arm-elf\include/inttypes.h \
-  ../mav_common/include/mav_common/comm_packets.h \
-  ../mav_common/include/mav_common/comm_types.h \
-  external/Common_WinARM/inc/irq.h \
-  include/ccny_asctec_firmware/hardware.h \
-  include/ccny_asctec_firmware/main.h \
-  include/ccny_asctec_firmware/system.h \
-  include/ccny_asctec_firmware/uart.h external/Common_WinARM/inc/irq.h \
-  include/ccny_asctec_firmware/gpsmath.h \
-  include/ccny_asctec_firmware/ssp.h \
-  include/ccny_asctec_firmware/lpcUART.h
-
-C:\WinARM\arm-elf\include/string.h:
-
-C:\WinARM\arm-elf\include/_ansi.h:
-
-C:\WinARM\arm-elf\include/newlib.h:
-
-C:\WinARM\arm-elf\include/sys/config.h:
-
-C:\WinARM\arm-elf\include/machine/ieeefp.h:
-
-C:\WinARM\arm-elf\include/sys/reent.h:
-
-C:\WinARM\arm-elf\include/_ansi.h:
-
-C:\WinARM\arm-elf\include/sys/_types.h:
-
-C:\WinARM\arm-elf\include/sys/lock.h:
-
-c:\winarm\bin\../lib/gcc/arm-elf/4.1.1/include/stddef.h:
-
-C:\WinARM\arm-elf\include/sys/string.h:
-
-../mav_common/include/mav_common/comm.h:
-
-external/Common_WinARM/inc/LPC214x.h:
-
-external/Common_WinARM/inc/interrupt_utils.h:
-
-include/ccny_asctec_firmware/system.h:
-
-include/ccny_asctec_firmware/main.h:
-
-include/ccny_asctec_firmware/util.h:
-
-C:\WinARM\arm-elf\include/stdint.h:
-
-include/ccny_asctec_firmware/LPC214x.h:
-
-include/ccny_asctec_firmware/uart.h:
-
-C:\WinARM\arm-elf\include/inttypes.h:
-
-../mav_common/include/mav_common/comm_packets.h:
-
-../mav_common/include/mav_common/comm_types.h:
-
-external/Common_WinARM/inc/irq.h:
-
-include/ccny_asctec_firmware/hardware.h:
-
-include/ccny_asctec_firmware/main.h:
-
-include/ccny_asctec_firmware/system.h:
-
-include/ccny_asctec_firmware/uart.h:
-
-external/Common_WinARM/inc/irq.h:
-
-include/ccny_asctec_firmware/gpsmath.h:
-
-include/ccny_asctec_firmware/ssp.h:
-
-include/ccny_asctec_firmware/lpcUART.h:
diff --git a/ccny_asctec_firmware/.dep/uart1.o.d b/ccny_asctec_firmware/.dep/uart1.o.d
deleted file mode 100644
index e942c7b..0000000
--- a/ccny_asctec_firmware/.dep/uart1.o.d
+++ /dev/null
@@ -1,57 +0,0 @@
-src/uart1.o: src/uart1.c external/Common_WinARM/inc/LPC214x.h \
-  external/Common_WinARM/inc/interrupt_utils.h \
-  include/ccny_asctec_firmware/system.h \
-  include/ccny_asctec_firmware/main.h include/ccny_asctec_firmware/util.h \
-  C:\WinARM\arm-elf\include/stdint.h \
-  include/ccny_asctec_firmware/LPC214x.h \
-  include/ccny_asctec_firmware/uart1.h external/Common_WinARM/inc/irq.h \
-  include/ccny_asctec_firmware/hardware.h \
-  include/ccny_asctec_firmware/main.h \
-  include/ccny_asctec_firmware/system.h \
-  include/ccny_asctec_firmware/uart.h \
-  C:\WinARM\arm-elf\include/inttypes.h \
-  c:\winarm\bin\../lib/gcc/arm-elf/4.1.1/include/stddef.h \
-  ../mav_common/include/mav_common/comm_packets.h \
-  ../mav_common/include/mav_common/comm_types.h \
-  external/Common_WinARM/inc/irq.h include/ccny_asctec_firmware/gpsmath.h \
-  include/ccny_asctec_firmware/ssp.h
-
-external/Common_WinARM/inc/LPC214x.h:
-
-external/Common_WinARM/inc/interrupt_utils.h:
-
-include/ccny_asctec_firmware/system.h:
-
-include/ccny_asctec_firmware/main.h:
-
-include/ccny_asctec_firmware/util.h:
-
-C:\WinARM\arm-elf\include/stdint.h:
-
-include/ccny_asctec_firmware/LPC214x.h:
-
-include/ccny_asctec_firmware/uart1.h:
-
-external/Common_WinARM/inc/irq.h:
-
-include/ccny_asctec_firmware/hardware.h:
-
-include/ccny_asctec_firmware/main.h:
-
-include/ccny_asctec_firmware/system.h:
-
-include/ccny_asctec_firmware/uart.h:
-
-C:\WinARM\arm-elf\include/inttypes.h:
-
-c:\winarm\bin\../lib/gcc/arm-elf/4.1.1/include/stddef.h:
-
-../mav_common/include/mav_common/comm_packets.h:
-
-../mav_common/include/mav_common/comm_types.h:
-
-external/Common_WinARM/inc/irq.h:
-
-include/ccny_asctec_firmware/gpsmath.h:
-
-include/ccny_asctec_firmware/ssp.h:
diff --git a/ccny_asctec_firmware/.dep/util.o.d b/ccny_asctec_firmware/.dep/util.o.d
deleted file mode 100644
index ce72ce0..0000000
--- a/ccny_asctec_firmware/.dep/util.o.d
+++ /dev/null
@@ -1,9 +0,0 @@
-src/util.o: src/util.c include/ccny_asctec_firmware/util.h \
-  C:\WinARM\arm-elf\include/stdint.h \
-  include/ccny_asctec_firmware/LPC214x.h
-
-include/ccny_asctec_firmware/util.h:
-
-C:\WinARM\arm-elf\include/stdint.h:
-
-include/ccny_asctec_firmware/LPC214x.h:
diff --git a/ccny_asctec_firmware/.project b/ccny_asctec_firmware/.project
deleted file mode 100644
index 8f4a996..0000000
--- a/ccny_asctec_firmware/.project
+++ /dev/null
@@ -1,77 +0,0 @@
-<?xml version="1.0" encoding="UTF-8"?>
-<projectDescription>
-	<name>ccny_asctec_firmware</name>
-	<comment></comment>
-	<projects>
-	</projects>
-	<buildSpec>
-		<buildCommand>
-			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
-			<triggers>clean,full,incremental,</triggers>
-			<arguments>
-				<dictionary>
-					<key>?name?</key>
-					<value></value>
-				</dictionary>
-				<dictionary>
-					<key>org.eclipse.cdt.make.core.append_environment</key>
-					<value>true</value>
-				</dictionary>
-				<dictionary>
-					<key>org.eclipse.cdt.make.core.autoBuildTarget</key>
-					<value>all</value>
-				</dictionary>
-				<dictionary>
-					<key>org.eclipse.cdt.make.core.buildArguments</key>
-					<value></value>
-				</dictionary>
-				<dictionary>
-					<key>org.eclipse.cdt.make.core.buildCommand</key>
-					<value>make</value>
-				</dictionary>
-				<dictionary>
-					<key>org.eclipse.cdt.make.core.cleanBuildTarget</key>
-					<value>clean</value>
-				</dictionary>
-				<dictionary>
-					<key>org.eclipse.cdt.make.core.contents</key>
-					<value>org.eclipse.cdt.make.core.activeConfigSettings</value>
-				</dictionary>
-				<dictionary>
-					<key>org.eclipse.cdt.make.core.enableAutoBuild</key>
-					<value>false</value>
-				</dictionary>
-				<dictionary>
-					<key>org.eclipse.cdt.make.core.enableCleanBuild</key>
-					<value>true</value>
-				</dictionary>
-				<dictionary>
-					<key>org.eclipse.cdt.make.core.enableFullBuild</key>
-					<value>true</value>
-				</dictionary>
-				<dictionary>
-					<key>org.eclipse.cdt.make.core.fullBuildTarget</key>
-					<value>all</value>
-				</dictionary>
-				<dictionary>
-					<key>org.eclipse.cdt.make.core.stopOnError</key>
-					<value>true</value>
-				</dictionary>
-				<dictionary>
-					<key>org.eclipse.cdt.make.core.useDefaultBuildCmd</key>
-					<value>true</value>
-				</dictionary>
-			</arguments>
-		</buildCommand>
-		<buildCommand>
-			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
-			<arguments>
-			</arguments>
-		</buildCommand>
-	</buildSpec>
-	<natures>
-		<nature>org.eclipse.cdt.core.cnature</nature>
-		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
-		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
-	</natures>
-</projectDescription>
diff --git a/ccny_asctec_firmware/ROS_NOBUILD b/ccny_asctec_firmware/ROS_NOBUILD
deleted file mode 100644
index e69de29..0000000
diff --git a/ccny_asctec_firmware/external/Common_WinARM/LPC2138-RAM.ld b/ccny_asctec_firmware/external/Common_WinARM/LPC2138-RAM.ld
deleted file mode 100644
index e3c6062..0000000
--- a/ccny_asctec_firmware/external/Common_WinARM/LPC2138-RAM.ld
+++ /dev/null
@@ -1,156 +0,0 @@
-/***********************************************************************/
-/*  ROM.ld:  Linker Script File                                        */
-/***********************************************************************/
-
-/* modified and extended by Martin Thomas */
-
-/* ENTRY(_boot)
-STACK_SIZE = 0x800; */
-
-/* Memory Definitions */
-MEMORY
-{
-  ROM (rx) : ORIGIN = 0x00000000, LENGTH = 512k
-  RAM (rw) : ORIGIN = 0x40000000, LENGTH = 32k
-}
-
-/* Section Definitions */
-SECTIONS
-{
-  /* first section is .text which is used for code */
-   .text :
-  {
-	/* *crt0.o (.text) */           /* Startup code */
-	KEEP(*(.vectorg))
-	. = ALIGN(4);
-	KEEP(*(.init))             /* Startup code from .init-section */
-	*(.text .text.*)           /* remaining code */
-	*(.gnu.linkonce.t.*)
-	*(.glue_7)
-	*(.glue_7t)
-	*(.gcc_except_table)
-	*(.rodata)                 /* read-only data (constants) */
-	*(.rodata*)
-	*(.gnu.linkonce.r.*)
-	. = ALIGN(4);
-  } > RAM
-  
-  /***** old: 
-  .text :
-  {
-    *crt0.o (.text)            
-    *(.text)                   
-    *(.rodata)                 
-    *(.rodata*)
-    *(.glue_7)
-    *(.glue_7t)
-  } > ROM 
-  *****/
-
-  . = ALIGN(4);
-  
-	/* .ctors .dtors are used for c++ constructors/destructors */
-	/* added by Martin Thomas 4/2005 based on Anglia Design example */
-	.ctors :
-	{
-		PROVIDE(__ctors_start__ = .);
-		KEEP(*(SORT(.ctors.*)))
-		KEEP(*(.ctors))
-		. = ALIGN(4);
-		PROVIDE(__ctors_end__ = .);
-		. = ALIGN(4);
-	} >ROM
-	
-	.dtors :
-	{
-		PROVIDE(__dtors_start__ = .); 
-		KEEP(*(SORT(.dtors.*)))
-		KEEP(*(.dtors))
-		. = ALIGN(4);
-		PROVIDE(__dtors_end__ = .);
-		. = ALIGN(4);
-	} >ROM
-  
-    . = ALIGN(4);
-	/* mthomas - end */
-   
-  _etext = . ;
-  PROVIDE (etext = .);
-
-  /* .data section which is used for initialized data */
-  .data : AT (_etext)
-  {
-    _data = .;
-	*(.fastrun) /* mthomas: for "RAMFUNC" */
-	. = ALIGN(4);
-	SORT(CONSTRUCTORS) /* mt 4/2005 */
-	. = ALIGN(4);
-    *(.data)
-	*(.data.*)
-	*(.gnu.linkonce.d*)
-	. = ALIGN(4);
-  } > RAM
- 
-  . = ALIGN(4);
-  _edata = . ;
-  PROVIDE (edata = .);
-
-  /* .bss section which is used for uninitialized data */
-  .bss (NOLOAD) :
-  {
-    __bss_start = . ;
-    __bss_start__ = . ;
-    *(.bss)
-	*(.gnu.linkonce.b*)
-    *(COMMON)
-    . = ALIGN(4);
-  } > RAM
-
-  . = ALIGN(4);
-  __bss_end__ = . ;
-  PROVIDE (__bss_end = .);
-
-  .stack ALIGN(256) :
-  {
-    *(.stack)
-    PROVIDE (_stack = .);
-	. = ALIGN(4);
-  } > RAM
-
-  _end = . ;
-  PROVIDE (end = .);
-
-  /* Stabs debugging sections.  */
-  .stab          0 : { *(.stab) }
-  .stabstr       0 : { *(.stabstr) }
-  .stab.excl     0 : { *(.stab.excl) }
-  .stab.exclstr  0 : { *(.stab.exclstr) }
-  .stab.index    0 : { *(.stab.index) }
-  .stab.indexstr 0 : { *(.stab.indexstr) }
-  .comment       0 : { *(.comment) }
-  /* DWARF debug sections.
-     Symbols in the DWARF debugging sections are relative to the beginning
-     of the section so we begin them at 0.  */
-  /* DWARF 1 */
-  .debug          0 : { *(.debug) }
-  .line           0 : { *(.line) }
-  /* GNU DWARF 1 extensions */
-  .debug_srcinfo  0 : { *(.debug_srcinfo) }
-  .debug_sfnames  0 : { *(.debug_sfnames) }
-  /* DWARF 1.1 and DWARF 2 */
-  .debug_aranges  0 : { *(.debug_aranges) }
-  .debug_pubnames 0 : { *(.debug_pubnames) }
-  /* DWARF 2 */
-  .debug_info     0 : { *(.debug_info .gnu.linkonce.wi.*) }
-  .debug_abbrev   0 : { *(.debug_abbrev) }
-  .debug_line     0 : { *(.debug_line) }
-  .debug_frame    0 : { *(.debug_frame) }
-  .debug_str      0 : { *(.debug_str) }
-  .debug_loc      0 : { *(.debug_loc) }
-  .debug_macinfo  0 : { *(.debug_macinfo) }
-  /* SGI/MIPS DWARF 2 extensions */
-  .debug_weaknames 0 : { *(.debug_weaknames) }
-  .debug_funcnames 0 : { *(.debug_funcnames) }
-  .debug_typenames 0 : { *(.debug_typenames) }
-  .debug_varnames  0 : { *(.debug_varnames) }
-}
diff --git a/ccny_asctec_firmware/external/Common_WinARM/LPC2138-ROM.ld b/ccny_asctec_firmware/external/Common_WinARM/LPC2138-ROM.ld
deleted file mode 100644
index c73b006..0000000
--- a/ccny_asctec_firmware/external/Common_WinARM/LPC2138-ROM.ld
+++ /dev/null
@@ -1,164 +0,0 @@
-/***********************************************************************/
-/*  ROM.ld:  Linker Script File                                        */
-/***********************************************************************/
-
-/* 
-   Based on scripts found in the LPC yahoo-group and the Keil examples 
-   modified by Martin Thomas, Kaiserslautern, Germany
-   http://www.siwawi.arubi.uni-kl.de/avr_projects
-*/
-
-/* 
-ENTRY(_boot)
-STACK_SIZE = 0x800; -> see startup-file and .stack-section 
-*/
-
-/* Memory Definitions */
-MEMORY
-{
-  ROM (rx) : ORIGIN = 0x00000000, LENGTH = 512k
-  RAM (rw) : ORIGIN = 0x40000000, LENGTH = 32k
-}
-
-/* Section Definitions */
-SECTIONS
-{
-  /* first section is .text which is used for code */
-   .text :
-  {
-	/* *crt0.o (.text) */           /* Startup code */
-	KEEP(*(.vectorg))
-	. = ALIGN(4);
-	KEEP(*(.init))             /* Startup code from .init-section */
-	*(.text .text.*)           /* remaining code */
-	*(.gnu.linkonce.t.*)
-	*(.glue_7)
-	*(.glue_7t)
-	*(.gcc_except_table)
-	*(.rodata)                 /* read-only data (constants) */
-	*(.rodata*)
-	*(.gnu.linkonce.r.*)
-	. = ALIGN(4);
-  } > ROM
-  
-  /***** old: 
-  .text :
-  {
-    *crt0.o (.text)            
-    *(.text)                   
-    *(.rodata)                 
-    *(.rodata*)
-    *(.glue_7)
-    *(.glue_7t)
-  } > ROM 
-  *****/
-
-  . = ALIGN(4);
-  
-	/* .ctors .dtors are used for c++ constructors/destructors */
-	/* added by Martin Thomas 4/2005 based on Anglia Design example */
-	.ctors :
-	{
-		PROVIDE(__ctors_start__ = .);
-		KEEP(*(SORT(.ctors.*)))
-		KEEP(*(.ctors))
-		. = ALIGN(4);
-		PROVIDE(__ctors_end__ = .);
-		. = ALIGN(4);
-	} >ROM
-	
-	.dtors :
-	{
-		PROVIDE(__dtors_start__ = .); 
-		KEEP(*(SORT(.dtors.*)))
-		KEEP(*(.dtors))
-		. = ALIGN(4);
-		PROVIDE(__dtors_end__ = .);
-		. = ALIGN(4);
-	} >ROM
-  
-    . = ALIGN(4);
-	/* mthomas - end */
-   
-  _etext = . ;
-  PROVIDE (etext = .);
-
-  /* .data section which is used for initialized data */
-  .data : AT (_etext)
-  {
-	_data = .;
-	KEEP(*(.vectmapped)) /* mthomas: when code in ROM and vectors remapped */
-	. = ALIGN(4);
-	*(.fastrun) /* mthomas: for "RAMFUNC" */
-	. = ALIGN(4);
-	SORT(CONSTRUCTORS) /* mt 4/2005 */
-	. = ALIGN(4);
-	*(.data)
-	*(.data.*)
-	*(.gnu.linkonce.d*)
-	. = ALIGN(4);
-  } > RAM
- 
-  . = ALIGN(4);
-  _edata = . ;
-  PROVIDE (edata = .);
-
-  /* .bss section which is used for uninitialized data */
-  .bss (NOLOAD) :
-  {
-    __bss_start = . ;
-    __bss_start__ = . ;
-    *(.bss)
-    *(.gnu.linkonce.b*)
-    *(COMMON)
-    . = ALIGN(4);
-  } > RAM
-
-  . = ALIGN(4);
-  __bss_end__ = . ;
-  PROVIDE (__bss_end = .);
-
-  .stack ALIGN(256) :
-  {
-    *(.stack)
-    PROVIDE (_stack = .);
-    . = ALIGN(4);
-  } > RAM
-
-  _end = . ;
-  PROVIDE (end = .);
-
-  /* Stabs debugging sections.  */
-  .stab          0 : { *(.stab) }
-  .stabstr       0 : { *(.stabstr) }
-  .stab.excl     0 : { *(.stab.excl) }
-  .stab.exclstr  0 : { *(.stab.exclstr) }
-  .stab.index    0 : { *(.stab.index) }
-  .stab.indexstr 0 : { *(.stab.indexstr) }
-  .comment       0 : { *(.comment) }
-  /* DWARF debug sections.
-     Symbols in the DWARF debugging sections are relative to the beginning
-     of the section so we begin them at 0.  */
-  /* DWARF 1 */
-  .debug          0 : { *(.debug) }
-  .line           0 : { *(.line) }
-  /* GNU DWARF 1 extensions */
-  .debug_srcinfo  0 : { *(.debug_srcinfo) }
-  .debug_sfnames  0 : { *(.debug_sfnames) }
-  /* DWARF 1.1 and DWARF 2 */
-  .debug_aranges  0 : { *(.debug_aranges) }
-  .debug_pubnames 0 : { *(.debug_pubnames) }
-  /* DWARF 2 */
-  .debug_info     0 : { *(.debug_info .gnu.linkonce.wi.*) }
-  .debug_abbrev   0 : { *(.debug_abbrev) }
-  .debug_line     0 : { *(.debug_line) }
-  .debug_frame    0 : { *(.debug_frame) }
-  .debug_str      0 : { *(.debug_str) }
-  .debug_loc      0 : { *(.debug_loc) }
-  .debug_macinfo  0 : { *(.debug_macinfo) }
-  /* SGI/MIPS DWARF 2 extensions */
-  .debug_weaknames 0 : { *(.debug_weaknames) }
-  .debug_funcnames 0 : { *(.debug_funcnames) }
-  .debug_typenames 0 : { *(.debug_typenames) }
-  .debug_varnames  0 : { *(.debug_varnames) }
-}
diff --git a/ccny_asctec_firmware/external/Common_WinARM/LPC2146-ROM.ld b/ccny_asctec_firmware/external/Common_WinARM/LPC2146-ROM.ld
deleted file mode 100644
index c73b006..0000000
--- a/ccny_asctec_firmware/external/Common_WinARM/LPC2146-ROM.ld
+++ /dev/null
@@ -1,164 +0,0 @@
-/***********************************************************************/
-/*  ROM.ld:  Linker Script File                                        */
-/***********************************************************************/
-
-/* 
-   Based on scripts found in the LPC yahoo-group and the Keil examples 
-   modified by Martin Thomas, Kaiserslautern, Germany
-   http://www.siwawi.arubi.uni-kl.de/avr_projects
-*/
-
-/* 
-ENTRY(_boot)
-STACK_SIZE = 0x800; -> see startup-file and .stack-section 
-*/
-
-/* Memory Definitions */
-MEMORY
-{
-  ROM (rx) : ORIGIN = 0x00000000, LENGTH = 512k
-  RAM (rw) : ORIGIN = 0x40000000, LENGTH = 32k
-}
-
-/* Section Definitions */
-SECTIONS
-{
-  /* first section is .text which is used for code */
-   .text :
-  {
-	/* *crt0.o (.text) */           /* Startup code */
-	KEEP(*(.vectorg))
-	. = ALIGN(4);
-	KEEP(*(.init))             /* Startup code from .init-section */
-	*(.text .text.*)           /* remaining code */
-	*(.gnu.linkonce.t.*)
-	*(.glue_7)
-	*(.glue_7t)
-	*(.gcc_except_table)
-	*(.rodata)                 /* read-only data (constants) */
-	*(.rodata*)
-	*(.gnu.linkonce.r.*)
-	. = ALIGN(4);
-  } > ROM
-  
-  /***** old: 
-  .text :
-  {
-    *crt0.o (.text)            
-    *(.text)                   
-    *(.rodata)                 
-    *(.rodata*)
-    *(.glue_7)
-    *(.glue_7t)
-  } > ROM 
-  *****/
-
-  . = ALIGN(4);
-  
-	/* .ctors .dtors are used for c++ constructors/destructors */
-	/* added by Martin Thomas 4/2005 based on Anglia Design example */
-	.ctors :
-	{
-		PROVIDE(__ctors_start__ = .);
-		KEEP(*(SORT(.ctors.*)))
-		KEEP(*(.ctors))
-		. = ALIGN(4);
-		PROVIDE(__ctors_end__ = .);
-		. = ALIGN(4);
-	} >ROM
-	
-	.dtors :
-	{
-		PROVIDE(__dtors_start__ = .); 
-		KEEP(*(SORT(.dtors.*)))
-		KEEP(*(.dtors))
-		. = ALIGN(4);
-		PROVIDE(__dtors_end__ = .);
-		. = ALIGN(4);
-	} >ROM
-  
-    . = ALIGN(4);
-	/* mthomas - end */
-   
-  _etext = . ;
-  PROVIDE (etext = .);
-
-  /* .data section which is used for initialized data */
-  .data : AT (_etext)
-  {
-	_data = .;
-	KEEP(*(.vectmapped)) /* mthomas: when code in ROM and vectors remapped */
-	. = ALIGN(4);
-	*(.fastrun) /* mthomas: for "RAMFUNC" */
-	. = ALIGN(4);
-	SORT(CONSTRUCTORS) /* mt 4/2005 */
-	. = ALIGN(4);
-	*(.data)
-	*(.data.*)
-	*(.gnu.linkonce.d*)
-	. = ALIGN(4);
-  } > RAM
- 
-  . = ALIGN(4);
-  _edata = . ;
-  PROVIDE (edata = .);
-
-  /* .bss section which is used for uninitialized data */
-  .bss (NOLOAD) :
-  {
-    __bss_start = . ;
-    __bss_start__ = . ;
-    *(.bss)
-    *(.gnu.linkonce.b*)
-    *(COMMON)
-    . = ALIGN(4);
-  } > RAM
-
-  . = ALIGN(4);
-  __bss_end__ = . ;
-  PROVIDE (__bss_end = .);
-
-  .stack ALIGN(256) :
-  {
-    *(.stack)
-    PROVIDE (_stack = .);
-    . = ALIGN(4);
-  } > RAM
-
-  _end = . ;
-  PROVIDE (end = .);
-
-  /* Stabs debugging sections.  */
-  .stab          0 : { *(.stab) }
-  .stabstr       0 : { *(.stabstr) }
-  .stab.excl     0 : { *(.stab.excl) }
-  .stab.exclstr  0 : { *(.stab.exclstr) }
-  .stab.index    0 : { *(.stab.index) }
-  .stab.indexstr 0 : { *(.stab.indexstr) }
-  .comment       0 : { *(.comment) }
-  /* DWARF debug sections.
-     Symbols in the DWARF debugging sections are relative to the beginning
-     of the section so we begin them at 0.  */
-  /* DWARF 1 */
-  .debug          0 : { *(.debug) }
-  .line           0 : { *(.line) }
-  /* GNU DWARF 1 extensions */
-  .debug_srcinfo  0 : { *(.debug_srcinfo) }
-  .debug_sfnames  0 : { *(.debug_sfnames) }
-  /* DWARF 1.1 and DWARF 2 */
-  .debug_aranges  0 : { *(.debug_aranges) }
-  .debug_pubnames 0 : { *(.debug_pubnames) }
-  /* DWARF 2 */
-  .debug_info     0 : { *(.debug_info .gnu.linkonce.wi.*) }
-  .debug_abbrev   0 : { *(.debug_abbrev) }
-  .debug_line     0 : { *(.debug_line) }
-  .debug_frame    0 : { *(.debug_frame) }
-  .debug_str      0 : { *(.debug_str) }
-  .debug_loc      0 : { *(.debug_loc) }
-  .debug_macinfo  0 : { *(.debug_macinfo) }
-  /* SGI/MIPS DWARF 2 extensions */
-  .debug_weaknames 0 : { *(.debug_weaknames) }
-  .debug_funcnames 0 : { *(.debug_funcnames) }
-  .debug_typenames 0 : { *(.debug_typenames) }
-  .debug_varnames  0 : { *(.debug_varnames) }
-}
diff --git a/ccny_asctec_firmware/external/Common_WinARM/inc/LPC214x.h b/ccny_asctec_firmware/external/Common_WinARM/inc/LPC214x.h
deleted file mode 100644
index b648a45..0000000
--- a/ccny_asctec_firmware/external/Common_WinARM/inc/LPC214x.h
+++ /dev/null
@@ -1,399 +0,0 @@
-/******************************************************************************
- *   LPC214X.h:  Header file for Philips LPC214x Family Microprocessors
- *   The header file is the super set of all hardware definition of the 
- *   peripherals for the LPC214x family microprocessor.
- *
- *   Copyright(C) 2006, Philips Semiconductor
- *   All rights reserved.
-
- *   History
- *   2005.10.01  ver 1.00    Prelimnary version, first Release
- *   2005.10.13  ver 1.01    Removed CSPR and DC_REVISION register.
- *                           CSPR can not be accessed at the user level,
- *                           DC_REVISION is no long available.
- *                           All registers use "volatile unsigned long". 
-******************************************************************************/
-
-#ifndef __LPC214x_H
-#define __LPC214x_H
-
-/* Vectored Interrupt Controller (VIC) */
-#define VIC_BASE_ADDR	0xFFFFF000
-
-#define VICIRQStatus   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x000))
-#define VICFIQStatus   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x004))
-#define VICRawIntr     (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x008))
-#define VICIntSelect   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x00C))
-#define VICIntEnable   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x010))
-#define VICIntEnClr    (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x014))
-#define VICSoftInt     (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x018))
-#define VICSoftIntClr  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x01C))
-#define VICProtection  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x020))
-#define VICVectAddr    (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x030))
-#define VICDefVectAddr (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x034))
-#define VICVectAddr0   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x100))
-#define VICVectAddr1   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x104))
-#define VICVectAddr2   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x108))
-#define VICVectAddr3   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x10C))
-#define VICVectAddr4   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x110))
-#define VICVectAddr5   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x114))
-#define VICVectAddr6   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x118))
-#define VICVectAddr7   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x11C))
-#define VICVectAddr8   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x120))
-#define VICVectAddr9   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x124))
-#define VICVectAddr10  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x128))
-#define VICVectAddr11  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x12C))
-#define VICVectAddr12  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x130))
-#define VICVectAddr13  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x134))
-#define VICVectAddr14  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x138))
-#define VICVectAddr15  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x13C))
-#define VICVectCntl0   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x200))
-#define VICVectCntl1   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x204))
-#define VICVectCntl2   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x208))
-#define VICVectCntl3   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x20C))
-#define VICVectCntl4   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x210))
-#define VICVectCntl5   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x214))
-#define VICVectCntl6   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x218))
-#define VICVectCntl7   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x21C))
-#define VICVectCntl8   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x220))
-#define VICVectCntl9   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x224))
-#define VICVectCntl10  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x228))
-#define VICVectCntl11  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x22C))
-#define VICVectCntl12  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x230))
-#define VICVectCntl13  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x234))
-#define VICVectCntl14  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x238))
-#define VICVectCntl15  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x23C))
-
-/* Pin Connect Block */
-#define PINSEL_BASE_ADDR	0xE002C000
-#define PINSEL0        (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x00))
-#define PINSEL1        (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x04))
-#define PINSEL2        (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x14))
-
-/* General Purpose Input/Output (GPIO) */
-#define GPIO_BASE_ADDR		0xE0028000
-#define IOPIN0         (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x00))
-#define IOSET0         (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x04))
-#define IODIR0         (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x08))
-#define IOCLR0         (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x0C))
-#define IOPIN1         (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x10))
-#define IOSET1         (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x14))
-#define IODIR1         (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x18))
-#define IOCLR1         (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x1C))
-
-/* Fast I/O setup */
-#define FIO_BASE_ADDR		0x3FFFC000
-#define FIO0DIR        (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x00)) 
-#define FIO0MASK       (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x10))
-#define FIO0PIN        (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x14))
-#define FIO0SET        (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x18))
-#define FIO0CLR        (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x1C))
-#define FIO1DIR        (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x20)) 
-#define FIO1MASK       (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x30))
-#define FIO1PIN        (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x34))
-#define FIO1SET        (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x38))
-#define FIO1CLR        (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x3C))
-
-/* System Control Block(SCB) modules include Memory Accelerator Module,
-Phase Locked Loop, VPB divider, Power Control, External Interrupt, 
-Reset, and Code Security/Debugging */
-
-#define SCB_BASE_ADDR	0xE01FC000
-
-/* Memory Accelerator Module (MAM) */
-#define MAMCR          (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x000))
-#define MAMTIM         (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x004))
-#define MEMMAP         (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x040))
-
-/* Phase Locked Loop (PLL) */
-#define PLLCON         (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x080))
-#define PLLCFG         (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x084))
-#define PLLSTAT        (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x088))
-#define PLLFEED        (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x08C))
-
-/* PLL48 Registers */
-#define PLL48CON       (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x0A0))
-#define PLL48CFG       (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x0A4))
-#define PLL48STAT      (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x0A8))
-#define PLL48FEED      (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x0AC))
-
-/* Power Control */
-#define PCON           (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x0C0))
-#define PCONP          (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x0C4))
-
-/* VPB Divider */
-#define VPBDIV         (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x100))
-
-/* External Interrupts */
-#define EXTINT         (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x140))
-#define INTWAKE        (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x144))
-#define EXTMODE        (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x148))
-#define EXTPOLAR       (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x14C))
-
-/* Reset */
-#define RSIR           (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x180))
-
-/* System Controls and Status */
-#define SCS            (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x1A0))	
-
-/* Timer 0 */
-#define TMR0_BASE_ADDR		0xE0004000
-#define T0IR           (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x00))
-#define T0TCR          (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x04))
-#define T0TC           (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x08))
-#define T0PR           (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x0C))
-#define T0PC           (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x10))
-#define T0MCR          (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x14))
-#define T0MR0          (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x18))
-#define T0MR1          (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x1C))
-#define T0MR2          (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x20))
-#define T0MR3          (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x24))
-#define T0CCR          (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x28))
-#define T0CR0          (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x2C))
-#define T0CR1          (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x30))
-#define T0CR2          (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x34))
-#define T0CR3          (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x38))
-#define T0EMR          (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x3C))
-#define T0CTCR         (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x70))
-
-/* Timer 1 */
-#define TMR1_BASE_ADDR		0xE0008000
-#define T1IR           (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x00))
-#define T1TCR          (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x04))
-#define T1TC           (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x08))
-#define T1PR           (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x0C))
-#define T1PC           (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x10))
-#define T1MCR          (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x14))
-#define T1MR0          (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x18))
-#define T1MR1          (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x1C))
-#define T1MR2          (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x20))
-#define T1MR3          (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x24))
-#define T1CCR          (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x28))
-#define T1CR0          (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x2C))
-#define T1CR1          (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x30))
-#define T1CR2          (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x34))
-#define T1CR3          (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x38))
-#define T1EMR          (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x3C))
-#define T1CTCR         (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x70))
-
-/* Pulse Width Modulator (PWM) */
-#define PWM_BASE_ADDR		0xE0014000
-#define PWMIR          (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x00))
-#define PWMTCR         (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x04))
-#define PWMTC          (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x08))
-#define PWMPR          (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x0C))
-#define PWMPC          (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x10))
-#define PWMMCR         (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x14))
-#define PWMMR0         (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x18))
-#define PWMMR1         (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x1C))
-#define PWMMR2         (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x20))
-#define PWMMR3         (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x24))
-#define PWMMR4         (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x40))
-#define PWMMR5         (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x44))
-#define PWMMR6         (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x48))
-#define PWMEMR         (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x3C))
-#define PWMPCR         (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x4C))
-#define PWMLER         (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x50))
-
-/* Universal Asynchronous Receiver Transmitter 0 (UART0) */
-#define UART0_BASE_ADDR		0xE000C000
-#define U0RBR          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x00))
-#define U0THR          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x00))
-#define U0DLL          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x00))
-#define U0DLM          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x04))
-#define U0IER          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x04))
-#define U0IIR          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x08))
-#define U0FCR          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x08))
-#define U0LCR          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x0C))
-#define U0MCR          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x10))
-#define U0LSR          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x14))
-#define U0MSR          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x18))
-#define U0SCR          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x1C))
-#define U0ACR          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x20))
-#define U0FDR          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x28))
-#define U0TER          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x30))
-
-/* Universal Asynchronous Receiver Transmitter 1 (UART1) */
-#define UART1_BASE_ADDR		0xE0010000
-#define U1RBR          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x00))
-#define U1THR          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x00))
-#define U1DLL          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x00))
-#define U1DLM          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x04))
-#define U1IER          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x04))
-#define U1IIR          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x08))
-#define U1FCR          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x08))
-#define U1LCR          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x0C))
-#define U1MCR          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x10))
-#define U1LSR          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x14))
-#define U1MSR          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x18))
-#define U1SCR          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x1C))
-#define U1ACR          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x20))
-#define U1FDR          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x28))
-#define U1TER          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x30))
-
-/* I2C Interface 0 */
-#define I2C0_BASE_ADDR		0xE001C000
-#define I20CONSET      (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x00))
-#define I20STAT        (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x04))
-#define I20DAT         (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x08))
-#define I20ADR         (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x0C))
-#define I20SCLH        (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x10))
-#define I20SCLL        (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x14))
-#define I20CONCLR      (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x18))
-
-/* I2C Interface 1 */
-#define I2C1_BASE_ADDR		0xE005C000
-#define I21CONSET      (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x00))
-#define I21STAT        (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x04))
-#define I21DAT         (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x08))
-#define I21ADR         (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x0C))
-#define I21SCLH        (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x10))
-#define I21SCLL        (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x14))
-#define I21CONCLR      (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x18))
-
-/* SPI0 (Serial Peripheral Interface 0) */
-#define SPI0_BASE_ADDR		0xE0020000
-#define S0SPCR         (*(volatile unsigned long *)(SPI0_BASE_ADDR + 0x00))
-#define S0SPSR         (*(volatile unsigned long *)(SPI0_BASE_ADDR + 0x04))
-#define S0SPDR         (*(volatile unsigned long *)(SPI0_BASE_ADDR + 0x08))
-#define S0SPCCR        (*(volatile unsigned long *)(SPI0_BASE_ADDR + 0x0C))
-#define S0SPINT        (*(volatile unsigned long *)(SPI0_BASE_ADDR + 0x1C))
-
-/* SSP Controller */
-#define SSP_BASE_ADDR		0xE0068000
-#define SSPCR0         (*(volatile unsigned long * )(SSP_BASE_ADDR + 0x00))
-#define SSPCR1         (*(volatile unsigned long * )(SSP_BASE_ADDR + 0x04))
-#define SSPDR          (*(volatile unsigned long * )(SSP_BASE_ADDR + 0x08))
-#define SSPSR          (*(volatile unsigned long * )(SSP_BASE_ADDR + 0x0C))
-#define SSPCPSR        (*(volatile unsigned long * )(SSP_BASE_ADDR + 0x10))
-#define SSPIMSC        (*(volatile unsigned long * )(SSP_BASE_ADDR + 0x14))
-#define SSPRIS         (*(volatile unsigned long * )(SSP_BASE_ADDR + 0x18))
-#define SSPMIS         (*(volatile unsigned long * )(SSP_BASE_ADDR + 0x1C))
-#define SSPICR         (*(volatile unsigned long * )(SSP_BASE_ADDR + 0x20))
-
-/* Real Time Clock */
-#define RTC_BASE_ADDR		0xE0024000
-#define ILR            (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x00))
-#define CTC            (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x04))
-#define CCR            (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x08))
-#define CIIR           (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x0C))
-#define AMR            (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x10))
-#define CTIME0         (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x14))
-#define CTIME1         (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x18))
-#define CTIME2         (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x1C))
-#define SEC            (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x20))
-#define MIN            (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x24))
-#define HOUR           (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x28))
-#define DOM            (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x2C))
-#define DOW            (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x30))
-#define DOY            (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x34))
-#define MONTH          (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x38))
-#define YEAR           (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x3C))
-#define ALSEC          (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x60))
-#define ALMIN          (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x64))
-#define ALHOUR         (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x68))
-#define ALDOM          (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x6C))
-#define ALDOW          (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x70))
-#define ALDOY          (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x74))
-#define ALMON          (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x78))
-#define ALYEAR         (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x7C))
-#define PREINT         (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x80))
-#define PREFRAC        (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x84))
-
-/* A/D Converter 0 (AD0) */
-#define AD0_BASE_ADDR		0xE0034000
-#define AD0CR          (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x00))
-#define AD0GDR         (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x04))
-#define AD0STAT        (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x30))
-#define AD0INTEN       (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x0C))
-#define AD0DR0         (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x10))
-#define AD0DR1         (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x14))
-#define AD0DR2         (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x18))
-#define AD0DR3         (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x1C))
-#define AD0DR4         (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x20))
-#define AD0DR5         (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x24))
-#define AD0DR6         (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x28))
-#define AD0DR7         (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x2C))
-
-#define ADGSR          (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x08))
-/* A/D Converter 1 (AD1) */
-#define AD1_BASE_ADDR		0xE0060000
-#define AD1CR          (*(volatile unsigned long *)(AD1_BASE_ADDR + 0x00))
-#define AD1GDR         (*(volatile unsigned long *)(AD1_BASE_ADDR + 0x04))
-#define AD1STAT        (*(volatile unsigned long *)(AD1_BASE_ADDR + 0x30))
-#define AD1INTEN       (*(volatile unsigned long *)(AD1_BASE_ADDR + 0x0C))
-#define AD1DR0         (*(volatile unsigned long *)(AD1_BASE_ADDR + 0x10))
-#define AD1DR1         (*(volatile unsigned long *)(AD1_BASE_ADDR + 0x14))
-#define AD1DR2         (*(volatile unsigned long *)(AD1_BASE_ADDR + 0x18))
-#define AD1DR3         (*(volatile unsigned long *)(AD1_BASE_ADDR + 0x1C))
-#define AD1DR4         (*(volatile unsigned long *)(AD1_BASE_ADDR + 0x20))
-#define AD1DR5         (*(volatile unsigned long *)(AD1_BASE_ADDR + 0x24))
-#define AD1DR6         (*(volatile unsigned long *)(AD1_BASE_ADDR + 0x28))
-#define AD1DR7         (*(volatile unsigned long *)(AD1_BASE_ADDR + 0x2C))
-
-/* D/A Converter */
-#define DAC_BASE_ADDR		0xE006C000
-#define DACR           (*(volatile unsigned long *)(DAC_BASE_ADDR + 0x00))
-
-/* Watchdog */
-#define WDG_BASE_ADDR		0xE0000000
-#define WDMOD          (*(volatile unsigned long *)(WDG_BASE_ADDR + 0x00))
-#define WDTC           (*(volatile unsigned long *)(WDG_BASE_ADDR + 0x04))
-#define WDFEED         (*(volatile unsigned long *)(WDG_BASE_ADDR + 0x08))
-#define WDTV           (*(volatile unsigned long *)(WDG_BASE_ADDR + 0x0C))
-
-/* USB Controller */
-#define USB_BASE_ADDR		0xE0090000			/* USB Base Address */
-/* Device Interrupt Registers */
-#define DEV_INT_STAT    (*(volatile unsigned long *)(USB_BASE_ADDR + 0x00))
-#define DEV_INT_EN      (*(volatile unsigned long *)(USB_BASE_ADDR + 0x04))
-#define DEV_INT_CLR     (*(volatile unsigned long *)(USB_BASE_ADDR + 0x08))
-#define DEV_INT_SET     (*(volatile unsigned long *)(USB_BASE_ADDR + 0x0C))
-#define DEV_INT_PRIO    (*(volatile unsigned long *)(USB_BASE_ADDR + 0x2C))
-
-/* Endpoint Interrupt Registers */
-#define EP_INT_STAT     (*(volatile unsigned long *)(USB_BASE_ADDR + 0x30))
-#define EP_INT_EN       (*(volatile unsigned long *)(USB_BASE_ADDR + 0x34))
-#define EP_INT_CLR      (*(volatile unsigned long *)(USB_BASE_ADDR + 0x38))
-#define EP_INT_SET      (*(volatile unsigned long *)(USB_BASE_ADDR + 0x3C))
-#define EP_INT_PRIO     (*(volatile unsigned long *)(USB_BASE_ADDR + 0x40))
-
-/* Endpoint Realization Registers */
-#define REALIZE_EP      (*(volatile unsigned long *)(USB_BASE_ADDR + 0x44))
-#define EP_INDEX        (*(volatile unsigned long *)(USB_BASE_ADDR + 0x48))
-#define MAXPACKET_SIZE  (*(volatile unsigned long *)(USB_BASE_ADDR + 0x4C))
-
-/* Command Reagisters */
-#define CMD_CODE        (*(volatile unsigned long *)(USB_BASE_ADDR + 0x10))
-#define CMD_DATA        (*(volatile unsigned long *)(USB_BASE_ADDR + 0x14))
-
-/* Data Transfer Registers */
-#define RX_DATA         (*(volatile unsigned long *)(USB_BASE_ADDR + 0x18))
-#define TX_DATA         (*(volatile unsigned long *)(USB_BASE_ADDR + 0x1C))
-#define RX_PLENGTH      (*(volatile unsigned long *)(USB_BASE_ADDR + 0x20))
-#define TX_PLENGTH      (*(volatile unsigned long *)(USB_BASE_ADDR + 0x24))
-#define USB_CTRL        (*(volatile unsigned long *)(USB_BASE_ADDR + 0x28))
-
-/* DMA Registers */
-#define DMA_REQ_STAT        (*((volatile unsigned long *)USB_BASE_ADDR + 0x50))
-#define DMA_REQ_CLR         (*((volatile unsigned long *)USB_BASE_ADDR + 0x54))
-#define DMA_REQ_SET         (*((volatile unsigned long *)USB_BASE_ADDR + 0x58))
-#define UDCA_HEAD           (*((volatile unsigned long *)USB_BASE_ADDR + 0x80))
-#define EP_DMA_STAT         (*((volatile unsigned long *)USB_BASE_ADDR + 0x84))
-#define EP_DMA_EN           (*((volatile unsigned long *)USB_BASE_ADDR + 0x88))
-#define EP_DMA_DIS          (*((volatile unsigned long *)USB_BASE_ADDR + 0x8C))
-#define DMA_INT_STAT        (*((volatile unsigned long *)USB_BASE_ADDR + 0x90))
-#define DMA_INT_EN          (*((volatile unsigned long *)USB_BASE_ADDR + 0x94))
-#define EOT_INT_STAT        (*((volatile unsigned long *)USB_BASE_ADDR + 0xA0))
-#define EOT_INT_CLR         (*((volatile unsigned long *)USB_BASE_ADDR + 0xA4))
-#define EOT_INT_SET         (*((volatile unsigned long *)USB_BASE_ADDR + 0xA8))
-#define NDD_REQ_INT_STAT    (*((volatile unsigned long *)USB_BASE_ADDR + 0xAC))
-#define NDD_REQ_INT_CLR     (*((volatile unsigned long *)USB_BASE_ADDR + 0xB0))
-#define NDD_REQ_INT_SET     (*((volatile unsigned long *)USB_BASE_ADDR + 0xB4))
-#define SYS_ERR_INT_STAT    (*((volatile unsigned long *)USB_BASE_ADDR + 0xB8))
-#define SYS_ERR_INT_CLR     (*((volatile unsigned long *)USB_BASE_ADDR + 0xBC))
-#define SYS_ERR_INT_SET     (*((volatile unsigned long *)USB_BASE_ADDR + 0xC0))    
-#define MODULE_ID           (*((volatile unsigned long *)USB_BASE_ADDR + 0xFC))
-
-#endif  // __LPC214x_H
-
diff --git a/ccny_asctec_firmware/external/Common_WinARM/inc/interrupt_utils.h b/ccny_asctec_firmware/external/Common_WinARM/inc/interrupt_utils.h
deleted file mode 100644
index e64c5be..0000000
--- a/ccny_asctec_firmware/external/Common_WinARM/inc/interrupt_utils.h
+++ /dev/null
@@ -1,289 +0,0 @@
-/*
- *  Defines and Macros for Interrupt-Service-Routines
- *  collected and partly created by
- *  Martin Thomas <mthomas@rhrk.uni-kl.de>
- *
- *  Copyright 2005 M. Thomas
- *  No guarantees, warrantees, or promises, implied or otherwise.
- *  May be used for hobby or commercial purposes provided copyright
- *  notice remains intact.
- */
-
-/* 
-   Warning: The enable- and disable-functions can not be used
-   in USR-mode which is the default for the Philips-examples
-   (see Startup.S). cpsr can not be written in USR-mode. 
-   If you need to enable or disable interrupts use the 
-   SWI-calls (see example SWI/swi.c/swi_handler.S). The 
-   functions can be used in SYS-mode to start the system
-   in SYS-mode the startup-code must be changed.
-
-   The macros in this file are useful if interrupt-service-routines
-   when using thumb-mode and/or optimisation without an addtional
-   "assembler-wrapper". The gcc-attribute interrupt("IRQ") does 
-   not work reliably here. See timer.c for an example implementation 
-   of an ISR that uses macros. For the gcc-port of the Philips-examples 
-   the macros are not needed, all functionality has been integrated 
-   into isr_wrapper (see Startup.S).
-*/
-
-#ifndef interrupt_utils_
-#define interrupt_utils_
-
-/* 
-   The following defines are usefull for 
-   interrupt service routine declarations.
-*/
-
-/* 
-   RAMFUNC 
-   Attribute which defines a function to be located 
-   in memory section .fastrun and called via "long calls". 
-   See linker-skript and startup-code to see how the
-   .fastrun-section is handled.
-   The definition is not only useful for ISRs but since
-   ISRs should be executed fast the macro is defined in
-   this header.
-*/
-#define RAMFUNC __attribute__ ((long_call, section (".fastrun")))
-
-
-/*
-  INTFUNC
-  standard attribute for arm-elf-gcc which marks
-  a function as ISR (for the VIC). Since gcc seems
-  to produce wrong code if this attribute is used in
-  thumb/thumb-interwork and/or activated optimisation
-  the attribute should only be used for "pure ARM-mode" 
-  binaries.
-*/
-#define INTFUNC __attribute__ ((interrupt("IRQ"))) 
-
-
-/*
-  NACKEDFUNC
-  gcc will not add any code to a function declared
-  "nacked". The user has to take care to save registers
-  and add the needed code for ISR functions. Some
-  macros for this tasks are provided below.
-*/
-#define NACKEDFUNC __attribute__((naked))
-
-
-/******************************************************************************
- *
- * MACRO Name: ISR_STORE()
- *
- * Description:
- *    This MACRO is used upon entry to an ISR with interrupt nesting.  
- *    Should be used together with ISR_ENABLE_NEST(). The MACRO
- *    performs the following steps:
- *
- *    1 - Save the non-banked registers r0-r12 and lr onto the IRQ stack.
- *
- *****************************************************************************/
-#define ISR_STORE() asm volatile( \
- "STMDB SP!,{R0-R12,LR}\n" )
- 
- /******************************************************************************
- *
- * MACRO Name: ISR_RESTORE()
- *
- * Description:
- *    This MACRO is used upon exit from an ISR with interrupt nesting.  
- *    Should be used together with ISR_DISABLE_NEST(). The MACRO
- *    performs the following steps:
- *
- *    1 - Load the non-banked registers r0-r12 and lr from the IRQ stack.
- *    2 - Adjusts resume adress
- *
- *****************************************************************************/
-#define ISR_RESTORE()  asm volatile( \
- "LDMIA SP!,{R0-R12,LR}\n" \
- "SUBS  R15,R14,#0x0004\n" ) 
-
-/******************************************************************************
- *
- * MACRO Name: ISR_ENABLE_NEST()
- *
- * Description:
- *    This MACRO is used upon entry from an ISR with interrupt nesting.  
- *    Should be used after ISR_STORE. 
- *
- *****************************************************************************/
-#define ISR_ENABLE_NEST() asm volatile( \
- "MRS     LR, SPSR \n"  \
- "STMFD   SP!, {LR} \n" \
- "MSR     CPSR_c, #0x1F \n" \
- "STMFD   SP!, {LR} " )
-
-/******************************************************************************
- *
- * MACRO Name: ISR_DISABLE_NEST()
- *
- * Description:
- *    This MACRO is used upon entry from an ISR with interrupt nesting.  
- *    Should be used before ISR_RESTORE. 
- *
- *****************************************************************************/
-#define ISR_DISABLE_NEST() asm volatile(  \
- "LDMFD   SP!, {LR} \n" \
- "MSR     CPSR_c, #0x92 \n" \
- "LDMFD   SP!, {LR} \n" \
- "MSR     SPSR_cxsf, LR \n" )
-
-
- 
-/*
- * The following marcos are from the file "armVIC.h" by:
- *
- * Copyright 2004, R O SoftWare
- * No guarantees, warrantees, or promises, implied or otherwise.
- * May be used for hobby or commercial purposes provided copyright
- * notice remains intact.
- * 
- */ 
- 
-/******************************************************************************
- *
- * MACRO Name: ISR_ENTRY()
- *
- * Description:
- *    This MACRO is used upon entry to an ISR.  The current version of
- *    the gcc compiler for ARM does not produce correct code for
- *    interrupt routines to operate properly with THUMB code.  The MACRO
- *    performs the following steps:
- *
- *    1 - Adjust address at which execution should resume after servicing
- *        ISR to compensate for IRQ entry
- *    2 - Save the non-banked registers r0-r12 and lr onto the IRQ stack.
- *    3 - Get the status of the interrupted program is in SPSR.
- *    4 - Push it onto the IRQ stack as well.
- *
- *****************************************************************************/
-#define ISR_ENTRY() asm volatile(" sub   lr, lr,#4\n" \
-                                 " stmfd sp!,{r0-r12,lr}\n" \
-                                 " mrs   r1, spsr\n" \
-                                 " stmfd sp!,{r1}")
-
-/******************************************************************************
- *
- * MACRO Name: ISR_EXIT()
- *
- * Description:
- *    This MACRO is used to exit an ISR.  The current version of the gcc
- *    compiler for ARM does not produce correct code for interrupt
- *    routines to operate properly with THUMB code.  The MACRO performs
- *    the following steps:
- *
- *    1 - Recover SPSR value from stack       
- *    2 - and restore  its value                   
- *    3 - Pop the return address & the saved general registers from
- *        the IRQ stack & return
- *
- *****************************************************************************/
-#define ISR_EXIT()  asm volatile(" ldmfd sp!,{r1}\n" \
-                                 " msr   spsr_c,r1\n" \
-                                 " ldmfd sp!,{r0-r12,pc}^") 
-  
-/******************************************************************************
- *
- * Function Name: disableIRQ()
- *
- * Description:
- *    This function sets the IRQ disable bit in the status register
- *
- * Calling Sequence: 
- *    void
- *
- * Returns:
- *    previous value of CPSR
- *
- *****************************************************************************/
-unsigned disableIRQ(void);
-
-/******************************************************************************
- *
- * Function Name: enableIRQ()
- *
- * Description:
- *    This function clears the IRQ disable bit in the status register
- *
- * Calling Sequence: 
- *    void
- *
- * Returns:
- *    previous value of CPSR
- *
- *****************************************************************************/
-unsigned enableIRQ(void);
-
-/******************************************************************************
- *
- * Function Name: restoreIRQ()
- *
- * Description:
- *    This function restores the IRQ disable bit in the status register
- *    to the value contained within passed oldCPSR
- *
- * Calling Sequence: 
- *    void
- *
- * Returns:
- *    previous value of CPSR
- *
- *****************************************************************************/
-unsigned restoreIRQ(unsigned oldCPSR);
-
-/******************************************************************************
- *
- * Function Name: disableFIQ()
- *
- * Description:
- *    This function sets the FIQ disable bit in the status register
- *
- * Calling Sequence: 
- *    void
- *
- * Returns:
- *    previous value of CPSR
- *
- *****************************************************************************/
-unsigned disableFIQ(void);
-
-/******************************************************************************
- *
- * Function Name: enableFIQ()
- *
- * Description:
- *    This function clears the FIQ disable bit in the status register
- *
- * Calling Sequence: 
- *    void
- *
- * Returns:
- *    previous value of CPSR
- *
- *****************************************************************************/
-unsigned enableFIQ(void);
-
-/******************************************************************************
- *
- * Function Name: restoreFIQ()
- *
- * Description:
- *    This function restores the FIQ disable bit in the status register
- *    to the value contained within passed oldCPSR
- *
- * Calling Sequence: 
- *    void
- *
- * Returns:
- *    previous value of CPSR
- *
- *****************************************************************************/
-unsigned restoreFIQ(unsigned oldCPSR);
-
-
-#endif
-
diff --git a/ccny_asctec_firmware/external/Common_WinARM/inc/irq.h b/ccny_asctec_firmware/external/Common_WinARM/inc/irq.h
deleted file mode 100644
index 5f3e14d..0000000
--- a/ccny_asctec_firmware/external/Common_WinARM/inc/irq.h
+++ /dev/null
@@ -1,127 +0,0 @@
-/******************************************************************************
- *   irq.h:  Interrupt related Header file for Philips LPC214x Family 
- *   Microprocessors
- *
- *   Copyright(C) 2006, Philips Semiconductor
- *   All rights reserved.
- *
- *   History
- *   2005.10.01  ver 1.00    Prelimnary version, first Release
- *
- *   21. Apr. 2006 - modified for gnu/gcc by Martin Thomas
- ******************************************************************************/
-#ifndef __IRQ_H 
-#define __IRQ_H
-
-// #define __irq __attribute__ ((interrupt("IRQ")))
-// #define __fiq __attribute__ ((interrupt("FIQ")))
-#define __irq
-#define __fiq
-
-
-/* if nested interrupt is used, NEST_INTERRUPT needs to be set to 1, otherwise 0 */
-// mthomas : macros disabled for now 
-// nesting is the default in the current arm-elf-gcc/WinARM-port
-// see Startup.S function IRQ_Wrapper
-//#define NESTED_INTERRUPT	1
-#define NESTED_INTERRUPT	0
-
-#define I_Bit			0x80
-#define F_Bit			0x40
-
-#define SYS32Mode		0x1F
-#define IRQ32Mode		0x12
-#define FIQ32Mode		0x11
-
-#define	WDT_INT			0
-#define SWI_INT			1
-#define ARM_CORE0_INT		2
-#define	ARM_CORE1_INT		3
-#define	TIMER0_INT		4
-#define TIMER1_INT		5
-#define UART0_INT		6
-#define	UART1_INT		7
-#define	PWM0_INT		8
-#define I2C0_INT		9
-#define SPI0_INT		10
-#define	SPI1_INT		11
-#define	PLL_INT			12
-#define RTC_INT			13
-#define EINT0_INT		14
-#define EINT1_INT		15
-#define EINT2_INT		16
-#define EINT3_INT		17
-#define	ADC0_INT		18
-#define I2C1_INT		19
-#define BOD_INT			20
-#define ADC1_INT		21
-#define USB_INT			22
-
-#define IRQ_SLOT_EN		0x20	/* bit 5 in Vector control register */
-#define VIC_SIZE		16
-
-#define VECT_ADDR_INDEX	0x100
-#define VECT_CNTL_INDEX 0x200
-
-/* Be aware that, from compiler to compiler, nested interrupt will have to
-be handled differently. More details can be found in Philips LPC2000
-family app-note AN10381 */
- 
-/* unlike Keil Compiler, don't save and restore registers into the stack
-in RVD as the compiler does that for you. See RVD ARM compiler Inline and
-embedded assemblers, "Rules for using __asm and asm keywords. */
-// static DWORD sysreg;		/* used as LR register */
-
-#if 0
-#if NESTED_INTERRUPT 
-#define IENABLE __asm { MRS LR, SPSR } \
-				__asm { STMFD SP!, {LR} } \
-				__asm { MSR CPSR_c, #SYS32Mode } \
-				__asm { STMFD SP!, {LR} }
-#else
-#define IENABLE ;	/* do nothing */
-#endif
-
-#if NESTED_INTERRUPT
-#define IDISABLE	__asm { LDMFD SP!, {LR} } \
-					__asm { MSR CPSR_c, #(IRQ32Mode|I_Bit) } \
-					__asm { LDMFD SP!, {LR} } \
-					__asm { MSR SPSR_cxsf, LR }
-#else
-#define IDISABLE ;	/* do nothing */
-#endif
-#endif
-
-#if NESTED_INTERRUPT 
-#warning "Macros not tested successfully with arm-elf-gcc
-#define IENABLE asm volatile( \
- "MRS     LR, SPSR \n"  \
- "STMFD   SP!, {LR} \n" \
- "MSR     CPSR_c, #0x1F \n" \
- "STMFD   SP!, {LR} " )
-#else
-#define IENABLE ;	/* do nothing */
-#endif
-
-#if NESTED_INTERRUPT
-#define IDISABLE asm volatile(  \
- "LDMFD   SP!, {LR} \n" \
- "MSR     CPSR_c, #0x92 \n" \
- "LDMFD   SP!, {LR} \n" \
- "MSR     SPSR_cxsf, LR \n" )
-#else
-#define IDISABLE ;	/* do nothing */
-#endif
-
-
-void init_VIC( void );
-unsigned long install_irq( unsigned long IntNumber, void *HandlerAddr );
-unsigned long uninstall_irq( unsigned long IntNumber );
-
-
-
-#endif /* end __IRQ_H */
-
-/******************************************************************************
-**                            End Of File
-******************************************************************************/
diff --git a/ccny_asctec_firmware/external/Common_WinARM/inc/swi.h b/ccny_asctec_firmware/external/Common_WinARM/inc/swi.h
deleted file mode 100644
index 78ab310..0000000
--- a/ccny_asctec_firmware/external/Common_WinARM/inc/swi.h
+++ /dev/null
@@ -1,15 +0,0 @@
-#ifndef SWI_H_
-#define SWI_H_
-
-extern unsigned long IntGetCPSR(void);
-
-extern unsigned long IntDisable(void);
-extern unsigned long IntEnable(void);
-extern void IntRestore(unsigned long oldstate);
-
-extern unsigned long FiqDisable(void);
-extern unsigned long FiqEnable(void);
-extern void FiqRestore(unsigned long oldstate);
-
-#endif
-
diff --git a/ccny_asctec_firmware/external/Common_WinARM/inc/target.h b/ccny_asctec_firmware/external/Common_WinARM/inc/target.h
deleted file mode 100644
index bd61d6b..0000000
--- a/ccny_asctec_firmware/external/Common_WinARM/inc/target.h
+++ /dev/null
@@ -1,43 +0,0 @@
-/*****************************************************************************
- *   target.h:  Header file for Philips LPC214x Family Microprocessors
- *
- *   Copyright(C) 2006, Philips Semiconductor
- *   All rights reserved.
- *
- *   History
- *   2005.10.01  ver 1.00    Prelimnary version, first Release
- *
-******************************************************************************/
-#ifndef __TARGET_H 
-#define __TARGET_H
-
-#ifdef __cplusplus
-   extern "C" {
-#endif
-
-/* System configuration: Fosc, Fcclk, Fcco, Fpclk must be defined */
-/* Crystal frequence,10MHz~25MHz should be the same as actual status. */
-#define Fosc	12000000
-
-/* System frequence,should be (1~32)multiples of Fosc,and should be equal or 
-less than 60MHz. */
-#define Fcclk	(Fosc * 5)
-
-/* CCO frequence,should be 2/4/8/16 multiples of Fcclk, ranged from 156MHz to 
-320MHz. */
-#define Fcco	(Fcclk * 4)
-
-/* VPB clock frequence , must be 1/2/4 multiples of (Fcclk / 4). */
-#define Fpclk	(Fcclk / 4) * 1
-
-extern void TargetInit(void);
-extern void TargetResetInit(void);
-
-#ifdef __cplusplus
-   }
-#endif
- 
-#endif /* end __TARGET_H */
-/******************************************************************************
-**                            End Of File
-******************************************************************************/
diff --git a/ccny_asctec_firmware/external/Common_WinARM/inc/timer.h b/ccny_asctec_firmware/external/Common_WinARM/inc/timer.h
deleted file mode 100644
index 8ed6018..0000000
--- a/ccny_asctec_firmware/external/Common_WinARM/inc/timer.h
+++ /dev/null
@@ -1,26 +0,0 @@
-/*****************************************************************************
- *   timer.h:  Header file for Philips LPC214x Family Microprocessors
- *
- *   Copyright(C) 2006, Philips Semiconductor
- *   All rights reserved.
- *
- *   History
- *   2005.10.01  ver 1.00    Prelimnary version, first Release
- *
-******************************************************************************/
-#ifndef __TIMER_H 
-#define __TIMER_H
-
-#define INTERVAL_10MS	149999			/* 10mSec = 150.000-1 counts */
-
-extern DWORD init_timer(void);
-extern void enable_timer( BYTE timer_num );
-extern void disable_timer( BYTE timer_num );
-extern void reset_timer( BYTE timer_num );
-
-extern volatile DWORD timer_counter;
-
-#endif /* end __TIMER_H */
-/*****************************************************************************
-**                            End Of File
-******************************************************************************/
diff --git a/ccny_asctec_firmware/external/Common_WinARM/inc/type.h b/ccny_asctec_firmware/external/Common_WinARM/inc/type.h
deleted file mode 100644
index f9a0470..0000000
--- a/ccny_asctec_firmware/external/Common_WinARM/inc/type.h
+++ /dev/null
@@ -1,32 +0,0 @@
-/*****************************************************************************
- *   type.h:  Type definition Header file for Philips LPC214x Family 
- *   Microprocessors
- *
- *   Copyright(C) 2006, Philips Semiconductor
- *   All rights reserved.
- *
- *   History
- *   2005.10.01  ver 1.00    Prelimnary version, first Release
- *
-******************************************************************************/
-#ifndef __TYPE_H__
-#define __TYPE_H__
-
-#ifndef NULL
-#define NULL    ((void *)0)
-#endif
-
-#ifndef FALSE
-#define FALSE   (0)
-#endif
-
-#ifndef TRUE
-#define TRUE    (1)
-#endif
-
-typedef unsigned char  BYTE;
-typedef unsigned short WORD;
-typedef unsigned long  DWORD;
-typedef unsigned int   BOOL;
-
-#endif  /* __TYPE_H__ */
diff --git a/ccny_asctec_firmware/external/Common_WinARM/src/Startup.S b/ccny_asctec_firmware/external/Common_WinARM/src/Startup.S
deleted file mode 100644
index 76f46ca..0000000
--- a/ccny_asctec_firmware/external/Common_WinARM/src/Startup.S
+++ /dev/null
@@ -1,632 +0,0 @@
-/***********************************************************************/
-/*  This file is part of the uVision/ARM development tools             */
-/*  Copyright KEIL ELEKTRONIK GmbH 2002-2005                           */
-/***********************************************************************/
-/*                                                                     */
-/*  STARTUP.S:  Startup file for Philips LPC2000 device series         */
-/*                                                                     */
-/***********************************************************************/
-
-/* 
-   This file has been heavily modified for the GNU-Toolchain by:
-   Martin Thomas, Kaiserslautern, Germany
-   <mthomas@rhrk.uni-kl.de>
-   http://www.siwawi.arubi.uni-kl.de/avr_projects
-   
-   If it does not work for you: don't blame Keil or Philips. 
-*/
-
-/* 
-//*** <<< Use Configuration Wizard in Context Menu >>> *** 
-*/
-
-
-/*
- *  The STARTUP.S code is executed after CPU Reset. This file may be 
- *  translated with the following SET symbols. In uVision these SET 
- *  symbols are entered under Options - ASM - Set.
- *
- *  REMAP: when set the startup code initializes the register MEMMAP 
- *  which overwrites the settings of the CPU configuration pins. The 
- *  startup and interrupt vectors are remapped from:
- *     0x00000000  default setting (not remapped)
- *     0x80000000  when EXTMEM_MODE is used
- *     0x40000000  when RAM_MODE is used
- *
- *  EXTMEM_MODE: when set the device is configured for code execution
- *  from external memory starting at address 0x80000000. The startup
- *  vectors are located to 0x80000000.
- *
- *  RAM_MODE: when set the device is configured for code execution
- *  from on-chip RAM starting at address 0x40000000. The startup
- *  vectors are located to 0x40000000.
- */
-
-/* Map Preprocessor definitions to assembler definitions/symbols */
-
-.set EXTMEM_MODE, 0
-
-.set RAM_MODE, 0
-#ifdef VECTORS_IN_RAM
-.set REMAP, 1
-.set VECTREMAPPED, 1
-#else
-.set REMAP, 0
-.set VECTREMAPPED, 0
-#endif
-
-/*
-#ifdef ROM_RUN
-.set RAM_MODE, 0
-#ifdef VECTORS_IN_RAM
-.set REMAP, 1
-.set VECTREMAPPED, 1
-#else
-.set REMAP, 0
-.set VECTREMAPPED, 0
-#endif
-#endif
-*/
-
-
-#ifdef RAM_RUN
-.set RAM_MODE, 1
-.set REMAP, 1
-.set VECTREMAPPED, 0
-#endif
-
-.if (RAM_MODE)
-.print "RAM_MODE enabled"
-.else
-.print "ROM_MODE enabled"
-.endif
-
-.if (REMAP)
-.print "remapping enabled"
-.endif
-
-.if (VECTREMAPPED)
-.print "Vectors at start of RAM"
-.else
-.print "Vectors at start of Code"
-.endif
-
-
-// Standard definitions of Mode bits and Interrupt (I & F) flags in PSRs
-
-        .set Mode_USR, 0x10
-        .set Mode_FIQ, 0x11
-        .set Mode_IRQ, 0x12
-        .set Mode_SVC, 0x13
-        .set Mode_ABT, 0x17
-        .set Mode_UND, 0x1B
-        .set Mode_SYS, 0x1F
-
-        .set I_Bit, 0x80    /* when I bit is set, IRQ is disabled */
-        .set F_Bit, 0x40    /* when F bit is set, FIQ is disabled */
-
-
-/*
-// <h> Stack Configuration (Stack Sizes in Bytes)
-//   <o0> Undefined Mode      <0x0-0xFFFFFFFF:4>
-//   <o1> Supervisor Mode     <0x0-0xFFFFFFFF:4>
-//   <o2> Abort Mode          <0x0-0xFFFFFFFF:4>
-//   <o3> Fast Interrupt Mode <0x0-0xFFFFFFFF:4>
-//   <o4> Interrupt Mode      <0x0-0xFFFFFFFF:4>
-//   <o5> User/System Mode    <0x0-0xFFFFFFFF:4>
-// </h>
-*/
-        .set UND_Stack_Size, 0x00000080
-        .set SVC_Stack_Size, 0x00000800
-        .set ABT_Stack_Size, 0x00000080
-        .set FIQ_Stack_Size, 0x00000080
-        .set IRQ_Stack_Size, 0x00000080
-        .set USR_Stack_Size, 0x00001000
-
-#if 0
-AREA   STACK, DATA, READWRITE, ALIGN=2 
-        DS   (USR_Stack_Size+3)&~3  ; Stack for User/System Mode 
-        DS   (SVC_Stack_Size+3)&~3  ; Stack for Supervisor Mode
-        DS   (IRQ_Stack_Size+3)&~3  ; Stack for Interrupt Mode
-        DS   (FIQ_Stack_Size+3)&~3  ; Stack for Fast Interrupt Mode 
-        DS   (ABT_Stack_Size+3)&~3  ; Stack for Abort Mode
-        DS   (UND_Stack_Size+3)&~3  ; Stack for Undefined Mode
-#endif
-
-.arm
-.section .stack, "w"
-.align 4
-        .space (USR_Stack_Size+3)&~3  // Stack for User/System Mode 
-        .space (SVC_Stack_Size+3)&~3  // Stack for Supervisor Mode
-        .space (IRQ_Stack_Size+3)&~3  // Stack for Interrupt Mode
-        .space (FIQ_Stack_Size+3)&~3  // Stack for Fast Interrupt Mode 
-        .space (ABT_Stack_Size+3)&~3  // Stack for Abort Mode
-        .space (UND_Stack_Size+3)&~3  // Stack for Undefined Mode
-Top_Stack:
-
-
-// VPBDIV definitions
-        .set VPBDIV, 0xE01FC100  /* VPBDIV Address */
-
-/*
-// <e> VPBDIV Setup
-// <i> Peripheral Bus Clock Rate
-//   <o1.0..1>   VPBDIV: VPB Clock
-//               <0=> VPB Clock = CPU Clock / 4
-//               <1=> VPB Clock = CPU Clock
-//               <2=> VPB Clock = CPU Clock / 2
-//   <o1.4..5>   XCLKDIV: XCLK Pin
-//               <0=> XCLK Pin = CPU Clock / 4
-//               <1=> XCLK Pin = CPU Clock
-//               <2=> XCLK Pin = CPU Clock / 2
-// </e>
-*/
-        .set VPBDIV_SETUP, 1
-        .set VPBDIV_Val, 0x00000000
-
-
-// Phase Locked Loop (PLL) definitions
-        .set PLL_BASE,      0xE01FC080  /* PLL Base Address */
-        .set PLLCON_OFS,    0x00        /* PLL Control Offset*/
-        .set PLLCFG_OFS,    0x04        /* PLL Configuration Offset */
-        .set PLLSTAT_OFS,   0x08        /* PLL Status Offset */
-        .set PLLFEED_OFS,   0x0C        /* PLL Feed Offset */
-        .set PLLCON_PLLE,   (1<<0)      /* PLL Enable */
-        .set PLLCON_PLLC,   (1<<1)      /* PLL Connect */
-        .set PLLCFG_MSEL,   (0x1F<<0)   /* PLL Multiplier */
-        .set PLLCFG_PSEL,   (0x03<<5)   /* PLL Divider */
-        .set PLLSTAT_PLOCK, (1<<10)     /* PLL Lock Status */
-
-/*
-// <e> PLL Setup
-// <i> Phase Locked Loop
-// <i> CCLK - Processor Clock
-// <i> Fcco - PLL Oscillator
-//   <o1.0..4>   MSEL: PLL Multiplier Selection
-//               <1-32><#-1>
-//               <i> PLL Multiplier "M" Value
-//               <i> CCLK = M * Fosc
-//   <o1.5..6>   PSEL: PLL Divider Selection
-//               <0=> 1   <1=> 2   <2=> 4   <3=> 8
-//               <i> PLL Divider "P" Value
-//               <i> Fcco = CCLK * 2 * P
-//               <i> 156MHz <= Fcco <= 320MHz
-// </e>
-*/
-        .set PLL_SETUP,  1
-        .set PLLCFG_Val, 0x00000024
-
-
-// Memory Accelerator Module (MAM) definitions
-        .set MAM_BASE,   0xE01FC000  /* MAM Base Address */
-        .set MAMCR_OFS,  0x00        /* MAM Control Offset*/
-        .set MAMTIM_OFS, 0x04        /* MAM Timing Offset */
-
-/*
-// <e> MAM Setup
-// <i> Memory Accelerator Module
-//   <o1.0..1>   MAM Control
-//               <0=> Disabled
-//               <1=> Partially Enabled
-//               <2=> Fully Enabled
-//               <i> Mode
-//   <o2.0..2>   MAM Timing
-//               <0=> Reserved  <1=> 1   <2=> 2   <3=> 3
-//               <4=> 4         <5=> 5   <6=> 6   <7=> 7
-//               <i> Fetch Cycles
-// </e>
-*/
-        .set MAM_SETUP,    1
-        .set MAMCR_Val,    0x00000002
-        .set MAMTIM_Val,   0x00000004
-
-
-// Starupt Code must be linked first at Address at which it expects to run.
-
-.if     (EXTMEM_MODE)
-        .set CODE_BASE,  0x80000000
-.elseif (RAM_MODE)
-        .set CODE_BASE,  0x40000000
-.else
-        .set CODE_BASE,  0x00000000
-.endif
-
-#if 0
-AREA   STARTUPCODE, CODE, AT CODE_BASE   // READONLY, ALIGN=4
-       PUBLIC  __startup
-
-       EXTERN  CODE32 (?C?INIT)
-
-__startup       PROC    CODE32
-
-// Pre-defined interrupt handlers that may be directly 
-// overwritten by C interrupt functions
-EXTERN CODE32 (Undef_Handler?A)
-EXTERN CODE32 (SWI_Handler?A)
-EXTERN CODE32 (PAbt_Handler?A)
-EXTERN CODE32 (DAbt_Handler?A)
-EXTERN CODE32 (IRQ_Handler?A)
-EXTERN CODE32 (FIQ_Handler?A)
-#endif
-
-.text
-.arm
-
-.if (VECTREMAPPED)
-.print "Vectors in section .vectmapped -> .data"
-.section .vectmapped, "ax"
-.else
-.print "Vectors in section .vectorg -> .text"
-.section .vectorg, "ax"
-.endif
-
-// Pre-defined interrupt handlers that may be directly 
-// overwritten by C interrupt functions
-.extern Undef_Handler
-.extern SWI_Handler
-.extern PAbt_Handler
-.extern DAbt_Handler
-.extern IRQ_Handler
-.extern FIQ_Handler
-
-
-// Exception Vectors
-// Mapped to Address 0.
-// Absolute addressing mode must be used.
-
-__Vectors:        LDR     PC,Reset_Addr         
-                LDR     PC,Undef_Addr
-                LDR     PC,SWI_Addr
-                LDR     PC,PAbt_Addr
-                LDR     PC,DAbt_Addr
-                NOP                            /* Reserved Vector */
-//                LDR     PC,IRQ_Addr
-//                LDR     PC,[PC, #-0x0FF0]      /* Vector from VicVectAddr */
-                LDR     PC,IRQ_Wrapper_Addr
-                LDR     PC,FIQ_Addr
-
-Reset_Addr:       .word     Reset_Handler
-Undef_Addr:       .word     Undef_Handler
-// SWI_Addr:         .word     SWI_Handler
-// SWI_Wrapper_Addr: .word     SWI_Wrapper
-SWI_Addr:         .word     SoftwareInterrupt      /* in swi_handler.S */
-PAbt_Addr:        .word     PAbt_Handler
-DAbt_Addr:        .word     DAbt_Handler
-                  .word     0                      /* Reserved Address */
-// IRQ_Addr:         .word     __IRQ_Handler
-IRQ_Wrapper_Addr: .word    __IRQ_Wrapper
-FIQ_Addr:         .word     FIQ_Handler
-
-Undef_Handler:  B       Undef_Handler
-/* SWI_Handler:    B       SWI_Handler */
-PAbt_Handler:   B       PAbt_Handler
-DAbt_Handler:   B       DAbt_Handler
-/* IRQ_Handler:    B       IRQ_Handler */
-FIQ_Handler:    B       FIQ_Handler
-
-.size   __Vectors, . - __Vectors
-
-
-
-.arm
-.section .init, "ax"
-
-.if (VECTREMAPPED)
-/* mthomas: Dummy used during startup - mind the nops since the 
-   flash-utility will overwrite the "reserved vector"-address
-   with the checksum */
-				B Reset_Handler
-				NOP
-				NOP
-				NOP
-				NOP
-				NOP  /* Reserved Address */
-				NOP
-				NOP
-.endif
-
-.arm
-.section .init, "ax"
-.global __startup
-.func __startup
-__startup:
-
-Reset_Handler:  
-
-.if (VPBDIV_SETUP)
-                LDR     R0, =VPBDIV
-                LDR     R1, =VPBDIV_Val
-                STR     R1, [R0]
-.endif
-
-
-.if (PLL_SETUP)
-                LDR     R0, =PLL_BASE
-                MOV     R1, #0xAA
-                MOV     R2, #0x55
-
-// Configure and Enable PLL
-                MOV     R3, #PLLCFG_Val
-                STR     R3, [R0, #PLLCFG_OFS] 
-                MOV     R3, #PLLCON_PLLE
-                STR     R3, [R0, #PLLCON_OFS]
-                STR     R1, [R0, #PLLFEED_OFS]
-                STR     R2, [R0, #PLLFEED_OFS]
-
-// Wait until PLL Locked
-PLL_Loop:       LDR     R3, [R0, #PLLSTAT_OFS]
-                ANDS    R3, R3, #PLLSTAT_PLOCK
-                BEQ     PLL_Loop
-
-// Switch to PLL Clock
-                MOV     R3, #(PLLCON_PLLE | PLLCON_PLLC)
-                STR     R3, [R0, #PLLCON_OFS]
-                STR     R1, [R0, #PLLFEED_OFS]
-                STR     R2, [R0, #PLLFEED_OFS]
-.endif
-
-
-.if (MAM_SETUP)
-                LDR     R0, =MAM_BASE
-                MOV     R1, #MAMTIM_Val
-                STR     R1, [R0, #MAMTIM_OFS] 
-                MOV     R1, #MAMCR_Val
-                STR     R1, [R0, #MAMCR_OFS] 
-.endif
-
-
-// Memory Mapping
-                .set MEMMAP, 0xE01FC040  /* Memory Mapping Control */
-
-.if (REMAP)
-                LDR     R0, =MEMMAP
-.if     (EXTMEM_MODE)                
-                MOV     R1, #3
-.elseif (RAM_MODE) || (VECTREMAPPED)
-.print "MEMMAP to 2 on init"
-                MOV     R1, #2
-.else
-                MOV     R1, #1
-.endif
-                STR     R1, [R0]
-.endif
-
-// Setup Stack for each mode
-                LDR     R0, =Top_Stack
-
-// Enter Undefined Instruction Mode and set its Stack Pointer
-                MSR     CPSR_c, #Mode_UND|I_Bit|F_Bit
-                MOV     SP, R0
-                SUB     R0, R0, #UND_Stack_Size
-
-// Enter Abort Mode and set its Stack Pointer
-                MSR     CPSR_c, #Mode_ABT|I_Bit|F_Bit
-                MOV     SP, R0
-                SUB     R0, R0, #ABT_Stack_Size
-
-// Enter FIQ Mode and set its Stack Pointer
-                MSR     CPSR_c, #Mode_FIQ|I_Bit|F_Bit
-                MOV     SP, R0
-                SUB     R0, R0, #FIQ_Stack_Size
-
-// Enter IRQ Mode and set its Stack Pointer
-                MSR     CPSR_c, #Mode_IRQ|I_Bit|F_Bit
-                MOV     SP, R0
-                SUB     R0, R0, #IRQ_Stack_Size
-
-// Enter Supervisor Mode and set its Stack Pointer
-                MSR     CPSR_c, #Mode_SVC|I_Bit|F_Bit
-                MOV     SP, R0
-                SUB     R0, R0, #SVC_Stack_Size
-
-// Enter User Mode and set its Stack Pointer
-                MSR     CPSR_c, #Mode_USR /* Interrupts enabled */
-//				MSR     CPSR_c, #Mode_USR|I_Bit|F_Bit /* Interrupts disabled */
-                MOV     SP, R0
-
-
-.if (RAM_MODE==0)
-/* Relocate .data section (Copy from ROM to RAM) */
-                LDR     R1, =_etext 
-                LDR     R2, =_data 
-                LDR     R3, =_edata 
-                CMP     R2, R3
-                BEQ     DataIsEmpty
-LoopRel:        CMP     R2, R3 
-                LDRLO   R0, [R1], #4 
-                STRLO   R0, [R2], #4 
-                BLO     LoopRel 
-DataIsEmpty:
-.endif
- 
-/* Clear .bss section (Zero init) */
-                MOV     R0, #0 
-                LDR     R1, =__bss_start__ 
-                LDR     R2, =__bss_end__ 
-                CMP     R1,R2
-                BEQ     BSSIsEmpty
-LoopZI:         CMP     R1, R2 
-                STRLO   R0, [R1], #4 
-                BLO     LoopZI 
-BSSIsEmpty:
-
-
-// call C++ constructors of global objects
-		LDR 	r0, =__ctors_start__
-		LDR 	r1, =__ctors_end__
-ctor_loop:
-		CMP 	r0, r1
-		BEQ 	ctor_end
-		LDR 	r2, [r0], #4
-		STMFD 	sp!, {r0-r1}
-		MOV 	lr, pc
-		MOV 	pc, r2
-		LDMFD 	sp!, {r0-r1}
-		B 		ctor_loop
-ctor_end:
-
-// Enter the C code
-                //LDR     R0,=INIT
-                LDR     R0,=main
-                TST     R0,#1             // Bit-0 set: main is Thumb
-                LDREQ   LR,=__exit_ARM    // ARM Mode
-                LDRNE   LR,=__exit_THUMB  // Thumb Mode
-                BX      R0
-
-.size   __startup, . - __startup
-.endfunc
-
-.arm
-.global __exit_ARM
-.func __exit_ARM
-__exit_ARM:
-                B       __exit_ARM
-.size   __exit_ARM, . - __exit_ARM
-.endfunc
-
-.thumb
-.global __exit_THUMB
-.func __exit_THUMB
-__exit_THUMB:
-                B       __exit_THUMB
-.size   __exit_THUMB, . - __exit_THUMB
-.endfunc
-
-
-/* mthomas: the following code is inspired by various examples and
-   documents from ARM, Atmel, Anglia Designs and others */
-
-
-.text
-.arm
-
-.if (VECTREMAPPED)
-.print "Handlers in section .vectmapped -> .data"
-.section .vectmapped, "ax"
-.else
-.print "Handlers in section .vectorg -> .code/.text"
-.section .vectorg, "ax"
-.endif
-
-.set VIC_base_addr, 0xFFFFF000
-.set VIC_vect_offs, 0x30
-
-        .arm
-        .global __IRQ_Wrapper
-        .func   __IRQ_Wrapper
-__IRQ_Wrapper:
-/*- Manage Exception Entry  */
-/*- Adjust and save LR_irq in IRQ stack  */
-            sub         lr, lr, #4
-            stmfd       sp!, {lr}
-
-/*- Save SPSR need to be saved for nested interrupt */
-            mrs         r14, SPSR
-            stmfd       sp!, {r14}
-
-/*- Save and r0 in IRQ stack  */
-            stmfd       sp!, {r0}
-
-/*- Write in the IVR to support Protect Mode  */
-/*- No effect in Normal Mode  */
-/*- De-assert the NIRQ and clear the source in Protect Mode */
-/* R14 = LR */
-            ldr         r14, =VIC_base_addr
-            ldr         r0 , [r14, #VIC_vect_offs]
-            /*str         r14, [r14, #VIC_vect_offs]*/
-
-/*- Enable Interrupt and Switch in Supervisor Mode */
-            msr         CPSR_c, #I_Bit | Mode_SVC
-
-/*- Save scratch/used registers and LR in User Stack */
-            /*stmfd       sp!, { r1-r3, r12, r14}*/
-            stmfd       sp!, { r1-r12, r14 }
-
-/*- Branch to the routine pointed by the VIC-Vector-Address  */
-            mov         r14, pc
-            bx          r0
-/*- Restore scratch/used registers and LR from User Stack*/
-            /* ldmia       sp!, { r1-r3, r12, r14} */
-            ldmia       sp!, { r1-r12, r14 }
-
-/*- Disable Interrupt and switch back in IRQ mode */
-            msr         CPSR_c, #I_Bit | Mode_IRQ
-
-#if 0
-/* VICVectAddr=0 is already done in the ISRs of the Philips-Examples 
-   so commented out here */
-/*- Mark the End of Interrupt on the VIC */
-            ldr         r14, =VIC_base_addr
-            str         r14, [r14, #VIC_vect_offs]
-#endif
-
-/*- Restore SPSR_irq and r0 from IRQ stack */
-            ldmia       sp!, {r0}
-
-/*- Restore SPSR_irq and r0 from IRQ stack */
-            ldmia       sp!, {r14}
-            msr         SPSR_cxsf, r14
-
-/*- Restore adjusted  LR_irq from IRQ stack directly in the PC */
-            ldmia       sp!, {pc}^
-
-.size   __IRQ_Wrapper, . - __IRQ_Wrapper
-.endfunc
-
-
-#if 0
-/* mthomas:
-   Wrapper to call a C swi-Function declared with 
-   void SWI_Handler(int swi_num, int *regs)
-   Inspired by Anglia Designs example 
-   -- not used here - see swi_handler.S
-*/
-        .arm
-        .global __SWI_Wrapper
-        .func   __SWI_Wrapper
-__SWI_Wrapper:                       /* r0 holds swi number */
-        STMFD   sp!,{r0-r12,lr}    /* Save The workspace plus the current return */
-                                   /* address lr_ mode into the stack */
-        MRS     r1, spsr           /* Save the spsr_mode into r1 */
-        STMFD   sp!, {r1}          /* Save spsr */
-        MOV     r1, sp             /* load regs */
-        LDR     r0,=SWI_Handler    
-        MOV     lr, pc
-        BX      r0                 /* call the C-funcktion */
-        LDMFD   sp!, {r1}          /* Restore the saved spsr_mode into r1 */
-        MSR     spsr_cxsf, r1      /* Restore spsr_mode */
-        LDMFD   sp!, {r0-r12,pc}   /* Return to the instruction following */
-                                   /* the exception interrupt */
-        .size   __SWI_Wrapper, . - __SWI_Wrapper
-        .endfunc
-#endif
-
-#if 0
-/* mthomas: not used here - reminder for future tests */
-		.arm
-		.global __IRQ_Wrapper
-		.func __IRQ_Wrapper
-__IRQ_Wrapper:
-		SUB		lr, lr, #4				/* Update the link register */
-		STMFD	sp!,{r0-r12,lr}	        /* Save The workspace plus the current return */
-										/* address lr_ mode into the stack */
-		MRS		r1, spsr				/* Save the spsr_mode into r1 */
-		STMFD	sp!, {r1}				/* Save spsr */
-		LDR		lr, =ReturnAddress		/* Read the return address. */
-		LDR		r0, =VIC_base_addr      /* Load VIC Base-Address */
-		LDR		r1, [r0, #VIC_vect_offs] /* Load ISR-Address from VICVectAddr */
-		bx      r1                      /* Branch to the IRQ handler. */
-ReturnAddress:
-		LDR     r2, =VIC_base_addr      /* clear Interrupt */
-		MOV     r3, #0
-		STR     R3, [R2, #VIC_vect_offs] /* by writing to VICVectAddr */
-		LDMFD	sp!, {r1}				/* Restore the saved spsr_mode into r1 */
-		MSR		spsr_cxsf, r1			/* Restore spsr_mode */
-		LDMFD	sp!, {r0-r12,pc}^	    /* Return to the instruction following */
-										/* the exception interrupt */
-.size   __IRQ_Wrapper, . - __IRQ_Wrapper
-.endfunc
-#endif
-
-.end
-
diff --git a/ccny_asctec_firmware/external/Common_WinARM/src/interrupt_utils.c b/ccny_asctec_firmware/external/Common_WinARM/src/interrupt_utils.c
deleted file mode 100644
index 088611c..0000000
--- a/ccny_asctec_firmware/external/Common_WinARM/src/interrupt_utils.c
+++ /dev/null
@@ -1,84 +0,0 @@
-/******************************************************************************
- *
- * $RCSfile: $
- * $Revision: $
- *
- * This module provides the interface routines for setting up and
- * controlling the various interrupt modes present on the ARM processor.
- * Copyright 2004, R O SoftWare
- * No guarantees, warrantees, or promises, implied or otherwise.
- * May be used for hobby or commercial purposes provided copyright
- * notice remains intact.
- *
- *****************************************************************************/
-#include "interrupt_utils.h"
-
-#define IRQ_MASK 0x00000080
-#define FIQ_MASK 0x00000040
-#define INT_MASK (IRQ_MASK | FIQ_MASK)
-
-static inline unsigned __get_cpsr(void)
-{
-  unsigned long retval;
-  asm volatile (" mrs  %0, cpsr" : "=r" (retval) : /* no inputs */  );
-  return retval;
-}
-
-static inline void __set_cpsr(unsigned val)
-{
-  asm volatile (" msr  cpsr, %0" : /* no outputs */ : "r" (val)  );
-}
-
-unsigned disableIRQ(void)
-{
-  unsigned _cpsr;
-
-  _cpsr = __get_cpsr();
-  __set_cpsr(_cpsr | IRQ_MASK);
-  return _cpsr;
-}
-
-unsigned restoreIRQ(unsigned oldCPSR)
-{
-  unsigned _cpsr;
-
-  _cpsr = __get_cpsr();
-  __set_cpsr((_cpsr & ~IRQ_MASK) | (oldCPSR & IRQ_MASK));
-  return _cpsr;
-}
-
-unsigned enableIRQ(void)
-{
-  unsigned _cpsr;
-
-  _cpsr = __get_cpsr();
-  __set_cpsr(_cpsr & ~IRQ_MASK);
-  return _cpsr;
-}
-
-unsigned disableFIQ(void)
-{
-  unsigned _cpsr;
-
-  _cpsr = __get_cpsr();
-  __set_cpsr(_cpsr | FIQ_MASK);
-  return _cpsr;
-}
-
-unsigned restoreFIQ(unsigned oldCPSR)
-{
-  unsigned _cpsr;
-
-  _cpsr = __get_cpsr();
-  __set_cpsr((_cpsr & ~FIQ_MASK) | (oldCPSR & FIQ_MASK));
-  return _cpsr;
-}
-
-unsigned enableFIQ(void)
-{
-  unsigned _cpsr;
-
-  _cpsr = __get_cpsr();
-  __set_cpsr(_cpsr & ~FIQ_MASK);
-  return _cpsr;
-}
diff --git a/ccny_asctec_firmware/external/Common_WinARM/src/irq.c b/ccny_asctec_firmware/external/Common_WinARM/src/irq.c
deleted file mode 100644
index 17c9cfd..0000000
--- a/ccny_asctec_firmware/external/Common_WinARM/src/irq.c
+++ /dev/null
@@ -1,169 +0,0 @@
-/*****************************************************************************
- *   irq.c: Interrupt handler C file for Philips LPC214x Family Microprocessors
- *
- *   Copyright(C) 2006, Philips Semiconductor
- *   All rights reserved.
- *
- *   History
- *   2005.10.01  ver 1.00    Prelimnary version, first Release
- *
-******************************************************************************/
-#include "LPC214x.h"			/* LPC23XX Peripheral Registers	*/
-#include "irq.h"
-
-#ifndef NULL
-#define NULL    ((void *)0)
-#endif
-
-#ifndef FALSE
-#define FALSE   (0)
-#endif
-
-#ifndef TRUE
-#define TRUE    (1)
-#endif
-
-
-/******************************************************************************
-** Function name:		DefaultVICHandler
-**
-** Descriptions:		Default VIC interrupt handler.
-**				This handler is set to deal with spurious 
-**				interrupt.
-**				If the IRQ service routine reads the VIC
-**				address register, and no IRQ slot responses
-**				as described above, this address is returned.
-** parameters:			None
-** Returned value:		None
-** 
-******************************************************************************/
-// mthomas: inserted static to avoid gcc-warning
-static void DefaultVICHandler (void) __irq 
-{
-    /* if the IRQ is not installed into the VIC, and interrupt occurs, the
-    default interrupt VIC address will be used. This could happen in a race 
-    condition. For debugging, use this endless loop to trace back. */
-    /* For more details, see Philips appnote AN10414 */
-    VICVectAddr = 0;		/* Acknowledge Interrupt */ 
-    while ( 1 );
-}
-
-/* Initialize the interrupt controller */
-/******************************************************************************
-** Function name:		init_VIC
-**
-** Descriptions:		Initialize VIC interrupt controller.
-** parameters:			None
-** Returned value:		None
-** 
-******************************************************************************/
-void init_VIC(void) 
-{
-    unsigned long i = 0;
-    unsigned long *vect_addr, *vect_cntl;
-   	
-    /* initialize VIC*/
-    VICIntEnClr = 0xffffffff;
-    VICVectAddr = 0;
-    VICIntSelect = 0;
-
-    /* set all the vector and vector control register to 0 */
-    for ( i = 0; i < VIC_SIZE; i++ )
-    {
-	vect_addr = (unsigned long *)(VIC_BASE_ADDR + VECT_ADDR_INDEX + i*4);
-	vect_cntl = (unsigned long *)(VIC_BASE_ADDR + VECT_CNTL_INDEX + i*4);
-	*vect_addr = 0;	
-	*vect_cntl = 0;
-    }
-
-    /* Install the default VIC handler here */
-    VICDefVectAddr = (unsigned long)DefaultVICHandler;   
-    return;
-}
-
-/******************************************************************************
-** Function name:		install_irq
-**
-** Descriptions:		Install interrupt handler
-**				The max VIC size is 16, but, there are 32 interrupt
-**				request inputs. Not all of them can be installed into
-**				VIC table at the same time.
-**				The order of the interrupt request installation is
-**				first come first serve.
-** parameters:			Interrupt number and interrupt handler address
-** Returned value:		true or false, when the table is full, return false
-** 
-******************************************************************************/
-unsigned long install_irq( unsigned long IntNumber, void *HandlerAddr )
-{
-    unsigned long i;
-    unsigned long *vect_addr;
-    unsigned long *vect_cntl;
-      
-    VICIntEnClr = 1 << IntNumber;	/* Disable Interrupt */
-    
-    for ( i = 0; i < VIC_SIZE; i++ )
-    {
-	/* find first un-assigned VIC address for the handler */
-
-	vect_addr = (unsigned long *)(VIC_BASE_ADDR + VECT_ADDR_INDEX + i*4);
-	vect_cntl = (unsigned long *)(VIC_BASE_ADDR + VECT_CNTL_INDEX + i*4);
-	if ( *vect_addr == (unsigned long)NULL )
-	{
-	    *vect_addr = (unsigned long)HandlerAddr;	/* set interrupt vector */
-	    *vect_cntl = (unsigned long)(IRQ_SLOT_EN | IntNumber);
-	    break;
-	}
-    }
-    if ( i == VIC_SIZE )
-    {
-	return( FALSE );		/* fatal error, can't find empty vector slot */
-    }
-    VICIntEnable = 1 << IntNumber;	/* Enable Interrupt */
-    return( TRUE );
-}
-
-/******************************************************************************
-** Function name:		uninstall_irq
-**
-** Descriptions:		Uninstall interrupt handler
-**				Find the interrupt handler installed in the VIC
-**				based on the interrupt number, set the location
-**				back to NULL to uninstall it.
-** parameters:			Interrupt number
-** Returned value:		true or false, when the interrupt number is not found, 
-**				return false
-** 
-******************************************************************************/
-unsigned long uninstall_irq( unsigned long IntNumber )
-{
-    unsigned long i;
-    unsigned long *vect_addr;
-    unsigned long *vect_cntl;
-      
-    VICIntEnClr = 1 << IntNumber;	/* Disable Interrupt */
-    
-    for ( i = 0; i < VIC_SIZE; i++ )
-    {
-	/* find first un-assigned VIC address for the handler */
-	vect_addr = (unsigned long *)(VIC_BASE_ADDR + VECT_ADDR_INDEX + i*4);
-	vect_cntl = (unsigned long *)(VIC_BASE_ADDR + VECT_CNTL_INDEX + i*4);
-	if ( (*vect_cntl & ~IRQ_SLOT_EN ) == IntNumber )
-	{
-	    *vect_addr = (unsigned long)NULL;	/* clear the VIC entry in the VIC table */
-	    *vect_cntl &= ~IRQ_SLOT_EN;	/* disable SLOT_EN bit */	
-	    break;
-	}
-    }
-    if ( i == VIC_SIZE )
-    {
-	return( FALSE );		/* fatal error, can't find interrupt number 
-					in vector slot */
-    }
-    VICIntEnable = 1 << IntNumber;	/* Enable Interrupt */
-    return( TRUE );
-}
-
-/******************************************************************************
-**                            End Of File
-******************************************************************************/
diff --git a/ccny_asctec_firmware/external/Common_WinARM/src/swi_handler.S b/ccny_asctec_firmware/external/Common_WinARM/src/swi_handler.S
deleted file mode 100644
index 564ae0e..0000000
--- a/ccny_asctec_firmware/external/Common_WinARM/src/swi_handler.S
+++ /dev/null
@@ -1,280 +0,0 @@
-/*****************************************************************************
-*   swi_handler.s: SWI handler file ARM7TDMI-(S) (not just LPC2000)
-*
-*   by Martin Thomas 
-*   http://www.siwawi.arubi.uni-kl.de/avr_projects
-*   based on information from ARM documents
-*
-*   (I think there is nothing left from the Philips example-code beside
-*   of the filename and some comments.)
-*
-*****************************************************************************/
-
-.set SWI_IRQ_DIS,	0
-.set SWI_IRQ_EN,	1
-.set SWI_FIQ_DIS,	2
-.set SWI_FIQ_EN,	3
-.set SWI_GET_CPSR,	4
-.set SWI_IRQ_REST,	5
-.set SWI_FIQ_REST,	6
-
-.set I_Bit, 0x80
-.set F_Bit, 0x40
-.set T_Bit, 0x20
-
-
-#ifdef ROM_RUN
-#ifdef VECTORS_IN_RAM
-.set VECTREMAPPED, 1
-#else
-.set VECTREMAPPED, 0
-#endif
-#endif
-
-#ifdef RAM_RUN
-.set VECTREMAPPED, 0
-#endif
-
-  
-/*********************************************************************
-*  SWI interrupt handler                                             
-*  Function :  SoftwareInterrupt(SWI_Number)                         
-*              See below "SwiFunction" table                         
-*  Parameters:    None                                               
-*  input  :       SWI_Number (extracted from SWI command automaticly)
-*  output :       states for some SWIs - see below
-**********************************************************************/
-.text
-.arm
-
-.print "SWI-Handler in section .vectorg -> .code/.text"
-.section .vectorg, "ax"
-
-/*
-.if (VECTREMAPPED)
-.print "SWI-Handler in section .vectmapped -> .data"
-.section .vectmapped, "ax"
-.else
-.print "SWI-Handler in section .vectorg -> .code/.text"
-.section .vectorg, "ax"
-.endif
-*/
-
-.global SoftwareInterrupt
-.func   SoftwareInterrupt
-SoftwareInterrupt:
-SWI_HandlerMT:
-	STMFD   sp!, {r4, lr}      /* store regs. */
-	MRS     r4, spsr
-	TST     r4, #T_Bit             /* test for thumb */
-	LDRNEH  r4, [lr, #-2]          /* NE->thumb - get swi instruction code */
-	BICNE   r4, r4, #0xff00        /* NE->thumb - clear top 8 bits leaving swi "comment field"=number */
-	LDREQ   r4, [lr, #-4]          /* EQ->arm - get swi instruction code */
-	BICEQ   r4, r4, #0xff000000    /* EQ->arm - clear top 8 bits leaving swi "comment field"=number */
-	CMP     r4, #MAX_SWI           /* range-check */
-	LDRLS   pc, [pc, r4, LSL #2]   /* jump to routine if <= MAX (LS) */
-SWIOutOfRange:
-	B       SWIOutOfRange
-
-/* Jump-Table */
-SwiTableStart:
-	.word IRQDisable	// 0
-	.word IRQEnable		// 1
-	.word FIQDisable	// 2
-	.word FIQEnable		// 3
-	.word CPSRget		// 4
-	.word IRQRestore	// 5
-	.word FIQRestore	// 6
-SwiTableEnd:
-.set MAX_SWI, ((SwiTableEnd-SwiTableStart)/4)-1
-
-IRQDisable:
-	MRS     r0, SPSR                        /* Get SPSR = return value */
-	ORR     r4, r0, #I_Bit                  /* I_Bit set */
-	MSR     SPSR_c, r4                      /* Set SPSR */
-	B       EndofSWI
-
-IRQEnable:
-	MRS     r0, SPSR                        /* Get SPSR = return value */
-	BIC     r4, r0, #I_Bit                  /* I_Bit clear */
-	MSR     SPSR_c, r4                      /* Set SPSR */
-	B       EndofSWI                       
-
-FIQDisable:
-	MRS     r0, SPSR
-	ORR     r4, r0, #F_Bit
-	AND     r0, r0, #F_Bit
-	MSR     SPSR_c, r4
-	B       EndofSWI
-
-FIQEnable:
-	MRS     r0, SPSR
-	BIC     r4, r0, #F_Bit
-	AND     r0, r0, #F_Bit
-	MSR     SPSR_c, r4
-	B       EndofSWI
-
-CPSRget:
-	// LDR r0, =0xdeadbeef
-	MRS     r0, SPSR                        /* Get SPSR */
-	B       EndofSWI                       
-
-IRQRestore:
-	MRS     r4, SPSR                        /* Get SPSR */
-	AND     r0, r0, #I_Bit
-	TST     r0, #I_Bit             /* Test input for I_Bit */
-	BICEQ   r4, r4, #I_Bit
-	ORRNE   r4, r4, #I_Bit
-	MSR     SPSR_c, r4
-	B       EndofSWI
-
-FIQRestore:
-	MRS     r4, SPSR                        /* Get SPSR */
-	AND     r0, r0, #F_Bit
-	TST     r0, #F_Bit             /* Test input for F_Bit */
-	BICEQ   r4, r4, #F_Bit
-	ORRNE   r4, r4, #F_Bit
-	MSR     SPSR_c, r4
-	B       EndofSWI
-
-EndofSWI:
-	LDMFD   sp!, {r4,pc}^
-.endfunc
-
-
-/**********************************************************************
- *  Call SWI to restore IRQ
- *  Function : void IntEnable(uint32_t)
- *  Parameters:      None
- *  input  :         newstate
- *                   if I_bit in newstate cleared->IRQ on  -> clear I_BIT
- *                   if I_bit in newstate set    ->IRQ off -> set I_Bit
- *  output :         None
- **********************************************************************/
-.arm
-.text
-.section .text, "ax"
-.global IntRestore
-.func   IntRestore
-IntRestore:
-		SWI     SWI_IRQ_REST
-		BX      lr
-.endfunc
-
-/**********************************************************************
- *  Call SWI to restore FIQ
- *  Function : void IntEnable(uint32_t)
- *  Parameters:      None
- *  input  :         newstate
- *                   if F_bit in newstate cleared->FIQ on  -> clear F_BIT
- *                   if F_bit in newstate set    ->FIQ off -> set F_Bit
- *  output :         None
- **********************************************************************/
-.arm
-.text
-.section .text, "ax"
-.global FiqRestore
-.func   FiqRestore
-FiqRestore:
-		SWI     SWI_FIQ_REST
-		BX      lr
-.endfunc
-
-/**********************************************************************
- *  Call SWI to read IRQ/FIQ-status
- *  Function : uint32_t IntEnable(void)
- *  Parameters:      None
- *  input  :         None
- *  output :         CPSR (SPSR_SVC)
- **********************************************************************/
-.arm
-.text
-.section .text, "ax"
-.global IntGetCPSR
-.func   IntGetCPSR
-IntGetCPSR:
-		SWI     SWI_GET_CPSR
-		BX      lr
-.endfunc
-
-/**********************************************************************
- *  Call SWI to enable IRQ
- *  Function : uint32_t IntEnable(void)
- *  Parameters:      None
- *  input  :         None
- *  output :         previous status
- *                   I_Bit clear if IRQs were enabled
- *                   I_Bit set   if IRQs were disabled
- **********************************************************************/
-.arm
-.text
-.section .text, "ax"
-.global IntEnable
-.func   IntEnable
-IntEnable:
-        SWI     SWI_IRQ_EN
-        BX      lr
-.endfunc /* end of IntEnable */
-
-/**********************************************************************
- *  Call SWI to disable IRQ
- *  Function : uint32_t IntDisable(void)
- *  Parameters     : None
- *  input          : None
- *  output :         previous status
- *                   I_Bit clear if IRQs were enabled
- *                   I_Bit set   if IRQs were disabled
- **********************************************************************/
-.arm
-.global IntDisable
-.section .text, "ax"
-.func   IntDisable
-IntDisable:
-        SWI     SWI_IRQ_DIS
-        BX      lr
-.endfunc /* end of IntDisable */
-
-/**********************************************************************
- *  Call SWI to enable FIQ
- *  Function : uint32_t FiqEnable(void)
- *  Parameters:      None
- *  input  :         None
- *  output :         previous status
- *                   F_Bit clear if FIQs were enabled
- *                   F_Bit set   if FIQs were disabled
- **********************************************************************/
-.arm
-.text
-.section .text, "ax"
-.global FiqEnable
-.func   FiqEnable
-FiqEnable:
-        SWI     SWI_FIQ_EN
-        BX      lr
-.endfunc
-
-/**********************************************************************
- *  Call SWI to disable FIQ
- *  Function : uint32_t FiqDisable(void)
- *  Parameters     : None
- *  input          : None
- *  output :         previous status
- *                   F_Bit clear if FIQs were enabled
- *                   F_Bit set   if FIQs were disabled
- **********************************************************************/
-.arm
-.global FiqDisable
-.section .text, "ax"
-.func   FiqDisable
-FiqDisable:
-        SWI     SWI_FIQ_DIS
-        BX      lr
-.endfunc
-
-
-.end
-
-/*************************************************************************
-**                            End Of File
-**************************************************************************/
-
diff --git a/ccny_asctec_firmware/external/Common_WinARM/src/target.c b/ccny_asctec_firmware/external/Common_WinARM/src/target.c
deleted file mode 100644
index c552d70..0000000
--- a/ccny_asctec_firmware/external/Common_WinARM/src/target.c
+++ /dev/null
@@ -1,138 +0,0 @@
-/*****************************************************************************
- *   target.c:  Target C file for Philips LPC214x Family Microprocessors
- *
- *   Copyright(C) 2006, Philips Semiconductor
- *   All rights reserved.
- *
- *   History
- *   2005.10.01  ver 1.00    Prelimnary version, first Release
- *
-*****************************************************************************/
-
-#include "LPC214x.h"
-#include "type.h"
-#include "irq.h"
-#include "target.h"
-
-/*****************************************************************************
-** Function name:		IRQ_Exception
-**
-** Descriptions:		interrupt exceptional handler , change it as needed
-**
-** parameters:			None
-** Returned value:		None
-** 
-*****************************************************************************/
-void IRQ_Exception(void) __irq;
-void IRQ_Exception(void) __irq  
-{
-    while(1);                   /*  change it to your code */
-}
-
-/*****************************************************************************
-** Function name:		FIQ_Exception
-**
-** Descriptions:		Fast interrupt exceptional handler , change it as needed
-**
-** parameters:			None
-** Returned value:		None
-**
-******************************************************************************/
-void FIQ_Exception(void) __fiq;
-void FIQ_Exception(void) __fiq 
-{
-    while(1);                   /* change it to your code */
-}
-
-/******************************************************************************
-** Function name:		TargetInit
-**
-** Descriptions:		Initialize the target board; it is called in a necessary 
-**				place, change it as needed
-**
-** parameters:			None
-** Returned value:		None
-** 
-******************************************************************************/
-void TargetInit(void)
-{
-    /* Add your codes here */
-}
-
-/******************************************************************************
-** Function name:		TargetResetInit
-**
-** Descriptions:		Initialize the target board before running the main() 
-**				function; User may change it as needed, but may not 
-**				deleted it.
-**
-** parameters:			None
-** Returned value:		None
-** 
-******************************************************************************/
-/* mthomas: all reset-initialisation is done in startup.S */
-void TargetResetInit(void)
-{
-#ifdef __DEBUG_RAM    
-    MEMMAP = 0x2;                   /* set remap register */
-#endif
-
-#ifdef __DEBUG_FLASH    
-    MEMMAP = 0x1;                   /* set remap register */
-#endif
-
-#ifdef __IN_CHIP    
-    MEMMAP = 0x1;                   /* set remap register */
-#endif
-
-    /* Set system timers for each component */
-    PLLCON = 1;
-#if (Fpclk / (Fcclk / 4)) == 1
-    VPBDIV = 0;
-#endif
-#if (Fpclk / (Fcclk / 4)) == 2
-    VPBDIV = 2;
-#endif
-#if (Fpclk / (Fcclk / 4)) == 4
-    VPBDIV = 1;
-#endif
-
-#if (Fcco / Fcclk) == 2
-    PLLCFG = ((Fcclk / Fosc) - 1) | (0 << 5);
-#endif
-#if (Fcco / Fcclk) == 4
-    PLLCFG = ((Fcclk / Fosc) - 1) | (1 << 5);
-#endif
-#if (Fcco / Fcclk) == 8
-    PLLCFG = ((Fcclk / Fosc) - 1) | (2 << 5);
-#endif
-#if (Fcco / Fcclk) == 16
-    PLLCFG = ((Fcclk / Fosc) - 1) | (3 << 5);
-#endif
-    PLLFEED = 0xaa;
-    PLLFEED = 0x55;
-    while((PLLSTAT & (1 << 10)) == 0);
-    PLLCON = 3;
-    PLLFEED = 0xaa;
-    PLLFEED = 0x55;
-    
-    /* Set memory accelerater module*/
-    MAMCR = 0;
-#if Fcclk < 20000000
-    MAMTIM = 1;
-#else
-#if Fcclk < 40000000
-    MAMTIM = 2;
-#else
-    MAMTIM = 3;
-#endif
-#endif
-    MAMCR = 2;
-    
-    /* Add your codes here */
-    return;
-}
-
-/******************************************************************************
-**                            End Of File
-******************************************************************************/
diff --git a/ccny_asctec_firmware/external/Common_WinARM/src/timer.c b/ccny_asctec_firmware/external/Common_WinARM/src/timer.c
deleted file mode 100644
index c41eead..0000000
--- a/ccny_asctec_firmware/external/Common_WinARM/src/timer.c
+++ /dev/null
@@ -1,158 +0,0 @@
-/*****************************************************************************
- *   timer.c:  Timer C file for Philips LPC214x Family Microprocessors
- *
- *   Copyright(C) 2006, Philips Semiconductor
- *   All rights reserved.
- *
- *   History
- *   2005.10.01  ver 1.00    Prelimnary version, first Release
- *
-******************************************************************************/
-#include "LPC214x.h"		/* LPC21XX Peripheral Registers	*/
-#include "type.h"
-#include "irq.h"
-#include "timer.h"
-
-#include "interrupt_utils.h"
-
-volatile DWORD timer_counter = 0;
-
-/******************************************************************************
-** Function name:		Timer0Handler
-**
-** Descriptions:		Timer/Counter 0 interrupt handler
-**				executes each 10ms @ 60 MHz CPU Clock
-**
-** parameters:			None
-** Returned value:		None
-** 
-******************************************************************************/
-// mthomas: static inserted to avoid warning by gcc 4.1.0
-#if 1
-static void /*RAMFUNC*/ Timer0Handler (void) __irq
-{  
-    T0IR = 1;			/* clear interrupt flag */
-    IENABLE;			/* handles nested interrupt */
-
-    timer_counter++;
-
-    IDISABLE;
-    VICVectAddr = 0;		/* Acknowledge Interrupt */
-}
-#endif
-
-#if 0
-// mthomas: macro-approach - not needed since there
-// is an assembler-wrapper provided in Startup.S
-static void NACKEDFUNC Timer0Handler (void) __irq
-{  
-	ISR_STORE();
-    T0IR = 1;			/* clear interrupt flag */
-	ISR_ENABLE_NEST();  /* handles nested interrupt */
-
-    timer_counter++;
-
-	ISR_DISABLE_NEST();     /* Disable Interrupt nesting */
-    VICVectAddr = 0;		/* Acknowledge Interrupt */
-	ISR_RESTORE();
-}
-#endif
-
-/******************************************************************************
-** Function name:		enable_timer
-**
-** Descriptions:		Enable timer
-**
-** parameters:			timer number: 0 or 1
-** Returned value:		None
-** 
-******************************************************************************/
-void enable_timer( BYTE timer_num )
-{
-    if ( timer_num == 0 )
-    {
-	T0TCR = 1;
-    }
-    else
-    {
-	T1TCR = 1;
-    }
-    return;
-}
-
-/******************************************************************************
-** Function name:		disable_timer
-**
-** Descriptions:		Disable timer
-**
-** parameters:			timer number: 0 or 1
-** Returned value:		None
-** 
-******************************************************************************/
-void disable_timer( BYTE timer_num )
-{
-    if ( timer_num == 0 )
-    {
-	T0TCR = 0;
-    }
-    else
-    {
-	T1TCR = 0;
-    }
-    return;
-}
-
-/******************************************************************************
-** Function name:		reset_timer
-**
-** Descriptions:		Reset timer
-**
-** parameters:			timer number: 0 or 1
-** Returned value:		None
-** 
-******************************************************************************/
-void reset_timer( BYTE timer_num )
-{
-    DWORD regVal;
-
-    if ( timer_num == 0 )
-    {
-	regVal = T0TCR;
-	regVal |= 0x02;
-	T0TCR = regVal;
-    }
-    else
-    {
-	regVal = T1TCR;
-	regVal |= 0x02;
-	T1TCR = regVal;
-    }
-    return;
-}
-
-/******************************************************************************
-** Function name:		init_timer
-**
-** Descriptions:		Initialize timer, set timer interval, reset timer,
-**				install timer interrupt handler
-**
-** parameters:			None
-** Returned value:		true or false, if the interrupt handler can't be
-**				installed, return false.
-** 
-******************************************************************************/
-DWORD init_timer (void) 
-{
-    timer_counter = 0;
-    T0MR0 = INTERVAL_10MS;	/* 10mSec = 150.000-1 counts */
-    T0MCR = 3;			/* Interrupt and Reset on MR0 */
-    if ( install_irq( TIMER0_INT, (void *)Timer0Handler ) == FALSE )
-    {
-	return (FALSE);
-    }
-    else
-    {
-	return (TRUE);
-    }
-}
-
diff --git a/ccny_asctec_firmware/include/ccny_asctec_firmware/LL_HL_comm.h b/ccny_asctec_firmware/include/ccny_asctec_firmware/LL_HL_comm.h
deleted file mode 100644
index 73c541b..0000000
--- a/ccny_asctec_firmware/include/ccny_asctec_firmware/LL_HL_comm.h
+++ /dev/null
@@ -1,131 +0,0 @@
-#ifndef LL_HL_COMM_
-#define LL_HL_COMM_
-
-//system flags
-#define SF_PAGE_BIT1 				0x01
-#define SF_PAGE_BIT2 				0x02
-#define SF_SSP_ACK					0x04
-#define SF_GPS_NEW					0x08
-#define SF_HL_CONTROL_ENABLED 		0x10
-#define SF_DIRECT_MOTOR_CONTROL 	0x20
-#define SF_WAYPOINT_MODE			0x40
-
-//ctrl_flags
-//scientific control
-#define HL_CTRL_PITCH			0x01
-#define HL_CTRL_ROLL			0x02
-#define HL_CTRL_YAW 			0x04
-#define HL_CTRL_THRUST			0x08
-#define HL_CTRL_HEIGHT_ENABLED	0x10
-#define HL_CTRL_GPS_ENABLED		0x20
-//direct motor control
-#define HL_CTRL_MOTORS_ONOFF_BY_RC	0x01
-
-
-void LL_write_ctrl_data(char);
-int HL2LL_write_cycle(void);
-inline void SSP_rx_handler_HL(unsigned char);
-inline void SSP_data_distribution_HL(void);
-
-struct LL_ATTITUDE_DATA
-{
-	unsigned short system_flags;	//GPS data acknowledge, etc.
-
-	short angle_pitch;	//angles [deg*100]
-	short angle_roll;
-	unsigned short angle_yaw;
-
-	short angvel_pitch;	//angular velocities; bias-free [0.015°/s]
-	short angvel_roll;
-	short angvel_yaw;
-
-				//<-- 14 bytes @ 1kHz
-				//--> 3x 26 bytes @ 333 Hz
-				//=> total = 40 bytes @ 1 kHz
-//-----------------------------PAGE0
-	unsigned char RC_data[10];	//8 channels @ 10 bit
-
-	int latitude_best_estimate;	//GPS data fused with all other sensors
-	int longitude_best_estimate;
-	short acc_x;		//accelerations [mg]
-	short acc_y;
-	short acc_z;
-
-	short dummy_333Hz_1;
-//-----------------------------PAGE1
-	unsigned char motor_data[16];	//speed 0..7, PWM 0..7
-
-	short speed_x_best_estimate;
-	short speed_y_best_estimate;
-	int height;		//height [mm]
-	short dheight;		//differentiated height[mm/s]
-//------------------------------PAGE2
-	short mag_x;
-	short mag_y;
-	short mag_z;
-
-	short cam_angle_pitch;
-	short cam_angle_roll;
-	short cam_status;
-
-	short battery_voltage1;
-	short battery_voltage2;
-	short flightMode;
-	short flight_time;
-	short cpu_load;
-	short status;
-	short status2;
-
-};
-
-extern struct LL_ATTITUDE_DATA LL_1khz_attitude_data;
-
-struct LL_CONTROL_INPUT
-{
-	unsigned short system_flags;
-							//bit 0: page_select
-							//bit 1: reserved (page_select)
-							//bit 2: SSP_ack
-							//bit 3: GPS new
-							//bit 4: HL controller enabled
-							//bit 5: 0 -> "scientific" commands
-							//       1 -> direct motor commands
-							//bit 6: waypoint mode
-
-	unsigned short ctrl_flags;
-							//bit 0..3:
-							// pitch, roll, yaw, height enable bits
-							//bit 4: height control enabled
-							//bit 5: yaw_control enabled
-
-	short pitch, roll, yaw, thrust; 		//"scientific interface"
-	unsigned char direct_motor_control[8];		//direct motor commands: pitch, roll, yaw, throttle, 4xDNC
-							//or motor 0..7 (Falcon)
-
-							//<-- 20 bytes @ 1kHz
-							//--> 2x18 bytes @ 500 Hz
-							//=> total = 38 bytes @ 1kHz
-
-	int latitude;					//data received from GPS-unit
-	int longitude;
-	int height;
-	short speed_x;
-	short speed_y;
-	short status;
-//-----------------------------
-
-	unsigned short hor_accuracy;
-	unsigned short vert_accuracy;
-	unsigned short speed_accuracy;
-	unsigned short numSV;
-	unsigned short heading;
-	short battery_voltage_1, battery_voltage_2; 	//battery voltage read by HL-ADC [mV]
-	short dummy_500Hz_2;
-	short dummy_500Hz_3;
-};
-
-extern struct LL_CONTROL_INPUT LL_1khz_control_input;
-
-
-
-#endif /*LL_HL_COMM_*/
diff --git a/ccny_asctec_firmware/include/ccny_asctec_firmware/LPC214x.h b/ccny_asctec_firmware/include/ccny_asctec_firmware/LPC214x.h
deleted file mode 100644
index b648a45..0000000
--- a/ccny_asctec_firmware/include/ccny_asctec_firmware/LPC214x.h
+++ /dev/null
@@ -1,399 +0,0 @@
-/******************************************************************************
- *   LPC214X.h:  Header file for Philips LPC214x Family Microprocessors
- *   The header file is the super set of all hardware definition of the 
- *   peripherals for the LPC214x family microprocessor.
- *
- *   Copyright(C) 2006, Philips Semiconductor
- *   All rights reserved.
-
- *   History
- *   2005.10.01  ver 1.00    Prelimnary version, first Release
- *   2005.10.13  ver 1.01    Removed CSPR and DC_REVISION register.
- *                           CSPR can not be accessed at the user level,
- *                           DC_REVISION is no long available.
- *                           All registers use "volatile unsigned long". 
-******************************************************************************/
-
-#ifndef __LPC214x_H
-#define __LPC214x_H
-
-/* Vectored Interrupt Controller (VIC) */
-#define VIC_BASE_ADDR	0xFFFFF000
-
-#define VICIRQStatus   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x000))
-#define VICFIQStatus   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x004))
-#define VICRawIntr     (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x008))
-#define VICIntSelect   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x00C))
-#define VICIntEnable   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x010))
-#define VICIntEnClr    (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x014))
-#define VICSoftInt     (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x018))
-#define VICSoftIntClr  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x01C))
-#define VICProtection  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x020))
-#define VICVectAddr    (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x030))
-#define VICDefVectAddr (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x034))
-#define VICVectAddr0   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x100))
-#define VICVectAddr1   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x104))
-#define VICVectAddr2   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x108))
-#define VICVectAddr3   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x10C))
-#define VICVectAddr4   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x110))
-#define VICVectAddr5   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x114))
-#define VICVectAddr6   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x118))
-#define VICVectAddr7   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x11C))
-#define VICVectAddr8   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x120))
-#define VICVectAddr9   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x124))
-#define VICVectAddr10  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x128))
-#define VICVectAddr11  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x12C))
-#define VICVectAddr12  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x130))
-#define VICVectAddr13  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x134))
-#define VICVectAddr14  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x138))
-#define VICVectAddr15  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x13C))
-#define VICVectCntl0   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x200))
-#define VICVectCntl1   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x204))
-#define VICVectCntl2   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x208))
-#define VICVectCntl3   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x20C))
-#define VICVectCntl4   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x210))
-#define VICVectCntl5   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x214))
-#define VICVectCntl6   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x218))
-#define VICVectCntl7   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x21C))
-#define VICVectCntl8   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x220))
-#define VICVectCntl9   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x224))
-#define VICVectCntl10  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x228))
-#define VICVectCntl11  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x22C))
-#define VICVectCntl12  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x230))
-#define VICVectCntl13  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x234))
-#define VICVectCntl14  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x238))
-#define VICVectCntl15  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x23C))
-
-/* Pin Connect Block */
-#define PINSEL_BASE_ADDR	0xE002C000
-#define PINSEL0        (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x00))
-#define PINSEL1        (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x04))
-#define PINSEL2        (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x14))
-
-/* General Purpose Input/Output (GPIO) */
-#define GPIO_BASE_ADDR		0xE0028000
-#define IOPIN0         (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x00))
-#define IOSET0         (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x04))
-#define IODIR0         (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x08))
-#define IOCLR0         (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x0C))
-#define IOPIN1         (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x10))
-#define IOSET1         (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x14))
-#define IODIR1         (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x18))
-#define IOCLR1         (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x1C))
-
-/* Fast I/O setup */
-#define FIO_BASE_ADDR		0x3FFFC000
-#define FIO0DIR        (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x00)) 
-#define FIO0MASK       (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x10))
-#define FIO0PIN        (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x14))
-#define FIO0SET        (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x18))
-#define FIO0CLR        (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x1C))
-#define FIO1DIR        (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x20)) 
-#define FIO1MASK       (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x30))
-#define FIO1PIN        (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x34))
-#define FIO1SET        (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x38))
-#define FIO1CLR        (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x3C))
-
-/* System Control Block(SCB) modules include Memory Accelerator Module,
-Phase Locked Loop, VPB divider, Power Control, External Interrupt, 
-Reset, and Code Security/Debugging */
-
-#define SCB_BASE_ADDR	0xE01FC000
-
-/* Memory Accelerator Module (MAM) */
-#define MAMCR          (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x000))
-#define MAMTIM         (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x004))
-#define MEMMAP         (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x040))
-
-/* Phase Locked Loop (PLL) */
-#define PLLCON         (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x080))
-#define PLLCFG         (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x084))
-#define PLLSTAT        (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x088))
-#define PLLFEED        (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x08C))
-
-/* PLL48 Registers */
-#define PLL48CON       (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x0A0))
-#define PLL48CFG       (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x0A4))
-#define PLL48STAT      (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x0A8))
-#define PLL48FEED      (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x0AC))
-
-/* Power Control */
-#define PCON           (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x0C0))
-#define PCONP          (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x0C4))
-
-/* VPB Divider */
-#define VPBDIV         (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x100))
-
-/* External Interrupts */
-#define EXTINT         (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x140))
-#define INTWAKE        (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x144))
-#define EXTMODE        (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x148))
-#define EXTPOLAR       (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x14C))
-
-/* Reset */
-#define RSIR           (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x180))
-
-/* System Controls and Status */
-#define SCS            (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x1A0))	
-
-/* Timer 0 */
-#define TMR0_BASE_ADDR		0xE0004000
-#define T0IR           (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x00))
-#define T0TCR          (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x04))
-#define T0TC           (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x08))
-#define T0PR           (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x0C))
-#define T0PC           (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x10))
-#define T0MCR          (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x14))
-#define T0MR0          (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x18))
-#define T0MR1          (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x1C))
-#define T0MR2          (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x20))
-#define T0MR3          (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x24))
-#define T0CCR          (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x28))
-#define T0CR0          (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x2C))
-#define T0CR1          (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x30))
-#define T0CR2          (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x34))
-#define T0CR3          (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x38))
-#define T0EMR          (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x3C))
-#define T0CTCR         (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x70))
-
-/* Timer 1 */
-#define TMR1_BASE_ADDR		0xE0008000
-#define T1IR           (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x00))
-#define T1TCR          (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x04))
-#define T1TC           (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x08))
-#define T1PR           (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x0C))
-#define T1PC           (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x10))
-#define T1MCR          (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x14))
-#define T1MR0          (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x18))
-#define T1MR1          (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x1C))
-#define T1MR2          (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x20))
-#define T1MR3          (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x24))
-#define T1CCR          (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x28))
-#define T1CR0          (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x2C))
-#define T1CR1          (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x30))
-#define T1CR2          (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x34))
-#define T1CR3          (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x38))
-#define T1EMR          (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x3C))
-#define T1CTCR         (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x70))
-
-/* Pulse Width Modulator (PWM) */
-#define PWM_BASE_ADDR		0xE0014000
-#define PWMIR          (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x00))
-#define PWMTCR         (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x04))
-#define PWMTC          (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x08))
-#define PWMPR          (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x0C))
-#define PWMPC          (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x10))
-#define PWMMCR         (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x14))
-#define PWMMR0         (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x18))
-#define PWMMR1         (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x1C))
-#define PWMMR2         (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x20))
-#define PWMMR3         (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x24))
-#define PWMMR4         (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x40))
-#define PWMMR5         (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x44))
-#define PWMMR6         (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x48))
-#define PWMEMR         (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x3C))
-#define PWMPCR         (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x4C))
-#define PWMLER         (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x50))
-
-/* Universal Asynchronous Receiver Transmitter 0 (UART0) */
-#define UART0_BASE_ADDR		0xE000C000
-#define U0RBR          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x00))
-#define U0THR          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x00))
-#define U0DLL          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x00))
-#define U0DLM          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x04))
-#define U0IER          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x04))
-#define U0IIR          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x08))
-#define U0FCR          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x08))
-#define U0LCR          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x0C))
-#define U0MCR          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x10))
-#define U0LSR          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x14))
-#define U0MSR          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x18))
-#define U0SCR          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x1C))
-#define U0ACR          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x20))
-#define U0FDR          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x28))
-#define U0TER          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x30))
-
-/* Universal Asynchronous Receiver Transmitter 1 (UART1) */
-#define UART1_BASE_ADDR		0xE0010000
-#define U1RBR          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x00))
-#define U1THR          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x00))
-#define U1DLL          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x00))
-#define U1DLM          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x04))
-#define U1IER          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x04))
-#define U1IIR          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x08))
-#define U1FCR          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x08))
-#define U1LCR          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x0C))
-#define U1MCR          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x10))
-#define U1LSR          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x14))
-#define U1MSR          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x18))
-#define U1SCR          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x1C))
-#define U1ACR          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x20))
-#define U1FDR          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x28))
-#define U1TER          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x30))
-
-/* I2C Interface 0 */
-#define I2C0_BASE_ADDR		0xE001C000
-#define I20CONSET      (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x00))
-#define I20STAT        (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x04))
-#define I20DAT         (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x08))
-#define I20ADR         (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x0C))
-#define I20SCLH        (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x10))
-#define I20SCLL        (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x14))
-#define I20CONCLR      (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x18))
-
-/* I2C Interface 1 */
-#define I2C1_BASE_ADDR		0xE005C000
-#define I21CONSET      (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x00))
-#define I21STAT        (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x04))
-#define I21DAT         (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x08))
-#define I21ADR         (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x0C))
-#define I21SCLH        (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x10))
-#define I21SCLL        (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x14))
-#define I21CONCLR      (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x18))
-
-/* SPI0 (Serial Peripheral Interface 0) */
-#define SPI0_BASE_ADDR		0xE0020000
-#define S0SPCR         (*(volatile unsigned long *)(SPI0_BASE_ADDR + 0x00))
-#define S0SPSR         (*(volatile unsigned long *)(SPI0_BASE_ADDR + 0x04))
-#define S0SPDR         (*(volatile unsigned long *)(SPI0_BASE_ADDR + 0x08))
-#define S0SPCCR        (*(volatile unsigned long *)(SPI0_BASE_ADDR + 0x0C))
-#define S0SPINT        (*(volatile unsigned long *)(SPI0_BASE_ADDR + 0x1C))
-
-/* SSP Controller */
-#define SSP_BASE_ADDR		0xE0068000
-#define SSPCR0         (*(volatile unsigned long * )(SSP_BASE_ADDR + 0x00))
-#define SSPCR1         (*(volatile unsigned long * )(SSP_BASE_ADDR + 0x04))
-#define SSPDR          (*(volatile unsigned long * )(SSP_BASE_ADDR + 0x08))
-#define SSPSR          (*(volatile unsigned long * )(SSP_BASE_ADDR + 0x0C))
-#define SSPCPSR        (*(volatile unsigned long * )(SSP_BASE_ADDR + 0x10))
-#define SSPIMSC        (*(volatile unsigned long * )(SSP_BASE_ADDR + 0x14))
-#define SSPRIS         (*(volatile unsigned long * )(SSP_BASE_ADDR + 0x18))
-#define SSPMIS         (*(volatile unsigned long * )(SSP_BASE_ADDR + 0x1C))
-#define SSPICR         (*(volatile unsigned long * )(SSP_BASE_ADDR + 0x20))
-
-/* Real Time Clock */
-#define RTC_BASE_ADDR		0xE0024000
-#define ILR            (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x00))
-#define CTC            (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x04))
-#define CCR            (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x08))
-#define CIIR           (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x0C))
-#define AMR            (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x10))
-#define CTIME0         (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x14))
-#define CTIME1         (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x18))
-#define CTIME2         (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x1C))
-#define SEC            (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x20))
-#define MIN            (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x24))
-#define HOUR           (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x28))
-#define DOM            (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x2C))
-#define DOW            (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x30))
-#define DOY            (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x34))
-#define MONTH          (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x38))
-#define YEAR           (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x3C))
-#define ALSEC          (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x60))
-#define ALMIN          (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x64))
-#define ALHOUR         (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x68))
-#define ALDOM          (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x6C))
-#define ALDOW          (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x70))
-#define ALDOY          (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x74))
-#define ALMON          (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x78))
-#define ALYEAR         (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x7C))
-#define PREINT         (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x80))
-#define PREFRAC        (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x84))
-
-/* A/D Converter 0 (AD0) */
-#define AD0_BASE_ADDR		0xE0034000
-#define AD0CR          (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x00))
-#define AD0GDR         (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x04))
-#define AD0STAT        (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x30))
-#define AD0INTEN       (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x0C))
-#define AD0DR0         (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x10))
-#define AD0DR1         (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x14))
-#define AD0DR2         (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x18))
-#define AD0DR3         (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x1C))
-#define AD0DR4         (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x20))
-#define AD0DR5         (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x24))
-#define AD0DR6         (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x28))
-#define AD0DR7         (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x2C))
-
-#define ADGSR          (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x08))
-/* A/D Converter 1 (AD1) */
-#define AD1_BASE_ADDR		0xE0060000
-#define AD1CR          (*(volatile unsigned long *)(AD1_BASE_ADDR + 0x00))
-#define AD1GDR         (*(volatile unsigned long *)(AD1_BASE_ADDR + 0x04))
-#define AD1STAT        (*(volatile unsigned long *)(AD1_BASE_ADDR + 0x30))
-#define AD1INTEN       (*(volatile unsigned long *)(AD1_BASE_ADDR + 0x0C))
-#define AD1DR0         (*(volatile unsigned long *)(AD1_BASE_ADDR + 0x10))
-#define AD1DR1         (*(volatile unsigned long *)(AD1_BASE_ADDR + 0x14))
-#define AD1DR2         (*(volatile unsigned long *)(AD1_BASE_ADDR + 0x18))
-#define AD1DR3         (*(volatile unsigned long *)(AD1_BASE_ADDR + 0x1C))
-#define AD1DR4         (*(volatile unsigned long *)(AD1_BASE_ADDR + 0x20))
-#define AD1DR5         (*(volatile unsigned long *)(AD1_BASE_ADDR + 0x24))
-#define AD1DR6         (*(volatile unsigned long *)(AD1_BASE_ADDR + 0x28))
-#define AD1DR7         (*(volatile unsigned long *)(AD1_BASE_ADDR + 0x2C))
-
-/* D/A Converter */
-#define DAC_BASE_ADDR		0xE006C000
-#define DACR           (*(volatile unsigned long *)(DAC_BASE_ADDR + 0x00))
-
-/* Watchdog */
-#define WDG_BASE_ADDR		0xE0000000
-#define WDMOD          (*(volatile unsigned long *)(WDG_BASE_ADDR + 0x00))
-#define WDTC           (*(volatile unsigned long *)(WDG_BASE_ADDR + 0x04))
-#define WDFEED         (*(volatile unsigned long *)(WDG_BASE_ADDR + 0x08))
-#define WDTV           (*(volatile unsigned long *)(WDG_BASE_ADDR + 0x0C))
-
-/* USB Controller */
-#define USB_BASE_ADDR		0xE0090000			/* USB Base Address */
-/* Device Interrupt Registers */
-#define DEV_INT_STAT    (*(volatile unsigned long *)(USB_BASE_ADDR + 0x00))
-#define DEV_INT_EN      (*(volatile unsigned long *)(USB_BASE_ADDR + 0x04))
-#define DEV_INT_CLR     (*(volatile unsigned long *)(USB_BASE_ADDR + 0x08))
-#define DEV_INT_SET     (*(volatile unsigned long *)(USB_BASE_ADDR + 0x0C))
-#define DEV_INT_PRIO    (*(volatile unsigned long *)(USB_BASE_ADDR + 0x2C))
-
-/* Endpoint Interrupt Registers */
-#define EP_INT_STAT     (*(volatile unsigned long *)(USB_BASE_ADDR + 0x30))
-#define EP_INT_EN       (*(volatile unsigned long *)(USB_BASE_ADDR + 0x34))
-#define EP_INT_CLR      (*(volatile unsigned long *)(USB_BASE_ADDR + 0x38))
-#define EP_INT_SET      (*(volatile unsigned long *)(USB_BASE_ADDR + 0x3C))
-#define EP_INT_PRIO     (*(volatile unsigned long *)(USB_BASE_ADDR + 0x40))
-
-/* Endpoint Realization Registers */
-#define REALIZE_EP      (*(volatile unsigned long *)(USB_BASE_ADDR + 0x44))
-#define EP_INDEX        (*(volatile unsigned long *)(USB_BASE_ADDR + 0x48))
-#define MAXPACKET_SIZE  (*(volatile unsigned long *)(USB_BASE_ADDR + 0x4C))
-
-/* Command Reagisters */
-#define CMD_CODE        (*(volatile unsigned long *)(USB_BASE_ADDR + 0x10))
-#define CMD_DATA        (*(volatile unsigned long *)(USB_BASE_ADDR + 0x14))
-
-/* Data Transfer Registers */
-#define RX_DATA         (*(volatile unsigned long *)(USB_BASE_ADDR + 0x18))
-#define TX_DATA         (*(volatile unsigned long *)(USB_BASE_ADDR + 0x1C))
-#define RX_PLENGTH      (*(volatile unsigned long *)(USB_BASE_ADDR + 0x20))
-#define TX_PLENGTH      (*(volatile unsigned long *)(USB_BASE_ADDR + 0x24))
-#define USB_CTRL        (*(volatile unsigned long *)(USB_BASE_ADDR + 0x28))
-
-/* DMA Registers */
-#define DMA_REQ_STAT        (*((volatile unsigned long *)USB_BASE_ADDR + 0x50))
-#define DMA_REQ_CLR         (*((volatile unsigned long *)USB_BASE_ADDR + 0x54))
-#define DMA_REQ_SET         (*((volatile unsigned long *)USB_BASE_ADDR + 0x58))
-#define UDCA_HEAD           (*((volatile unsigned long *)USB_BASE_ADDR + 0x80))
-#define EP_DMA_STAT         (*((volatile unsigned long *)USB_BASE_ADDR + 0x84))
-#define EP_DMA_EN           (*((volatile unsigned long *)USB_BASE_ADDR + 0x88))
-#define EP_DMA_DIS          (*((volatile unsigned long *)USB_BASE_ADDR + 0x8C))
-#define DMA_INT_STAT        (*((volatile unsigned long *)USB_BASE_ADDR + 0x90))
-#define DMA_INT_EN          (*((volatile unsigned long *)USB_BASE_ADDR + 0x94))
-#define EOT_INT_STAT        (*((volatile unsigned long *)USB_BASE_ADDR + 0xA0))
-#define EOT_INT_CLR         (*((volatile unsigned long *)USB_BASE_ADDR + 0xA4))
-#define EOT_INT_SET         (*((volatile unsigned long *)USB_BASE_ADDR + 0xA8))
-#define NDD_REQ_INT_STAT    (*((volatile unsigned long *)USB_BASE_ADDR + 0xAC))
-#define NDD_REQ_INT_CLR     (*((volatile unsigned long *)USB_BASE_ADDR + 0xB0))
-#define NDD_REQ_INT_SET     (*((volatile unsigned long *)USB_BASE_ADDR + 0xB4))
-#define SYS_ERR_INT_STAT    (*((volatile unsigned long *)USB_BASE_ADDR + 0xB8))
-#define SYS_ERR_INT_CLR     (*((volatile unsigned long *)USB_BASE_ADDR + 0xBC))
-#define SYS_ERR_INT_SET     (*((volatile unsigned long *)USB_BASE_ADDR + 0xC0))    
-#define MODULE_ID           (*((volatile unsigned long *)USB_BASE_ADDR + 0xFC))
-
-#endif  // __LPC214x_H
-
diff --git a/ccny_asctec_firmware/include/ccny_asctec_firmware/LPC2k_ee.h b/ccny_asctec_firmware/include/ccny_asctec_firmware/LPC2k_ee.h
deleted file mode 100644
index a4708fb..0000000
--- a/ccny_asctec_firmware/include/ccny_asctec_firmware/LPC2k_ee.h
+++ /dev/null
@@ -1,187 +0,0 @@
-/************************************************************************/
-/*                                                                    	*/
-/*			LPC2k_ee.H:  Header file enabling EEPROM support			*/
-/* 		for Philips LPC2000 microcontroller's on-chip Flash memory		*/
-/*       			(revision 1.0, May 13th, 2005.)						*/
-/*                                                                     	*/
-/*			This file is to be used with LPC2k_ee.c	file 			  	*/
-/*                                                                     	*/
-/* IMPORTANT: on-chip Flash memory sector(s) intended to be used as 	*/
-/* an EEPROM will be unavailable for regular code storage! The smallest	*/
-/* amount of Flash memory that can be used as an EEPROM is a single 	*/
-/* Flash sector (regardless of the Flash sector actual size). 			*/
-/*                                                                     	*/
-/* If size of desired EEPROM requires several Flash sectors, these		*/
-/* sectors must be a consecutive ones.									*/
-/*                                                                     	*/
-/************************************************************************/
-
-#define EE_SEC_L                14                              //Flash sector where EEPROM begins (see UM for details)
-#define EE_SEC_H                14                              //Flash sector where EEPROM ends (see UM for details)
-#define EE_ADDR_L               0x00038000              //Must match the EE_SEC_L Flash sector start address
-#define EE_ADDR_H               0x0003FFFF              //Must match the EE_SEC_H Flash sector end address
-
-#define EE_CCLK			60000			//system clock cclk expressed in kHz (5*12 MHz)
-
-/************************************************************************/
-/*                                                                    	*/
-/* ee_data structure can be defined differently from this example.		*/
-/* The only requirement is to have _id field as it is defined here		*/
-/* since EE_REC_ID character is used to identify a record's presence	*/
-/* in the EEPROM memory.												*/
-/*                                                                     	*/
-/* ====================================================================	*/
-/*                                                                     	*/
-/* IMPORTANT ARM memory access considerations:							*/
-/*                                                                     	*/
-/* char		: byte alligned. Can be accessed at any location in memory.	*/
-/*                                                                     	*/
-/* short int: occupies 2 consecutive bytes. It can be read/write 		*/
-/*			  accessed only when half-word alligned. Therefore, it is	*/
-/* 			  located at addresses ending with 0x0, 0x2, 0x4, 0x6, 0x8,	*/
-/*			  0xA, 0xC or 0xE.											*/
-/*                                                                     	*/
-/* int		: occupies 4 consecutive bytes.	It can be read/write 		*/
-/*			  accessed only when half-word alligned. Therefore, it is	*/
-/* 			  located at addresses ending with 0x0, 0x4, 0x8 or 0xC.	*/
-/*                                                                     	*/
-/* ====================================================================	*/
-/*                                                                     	*/
-/* Due to the LPC2000 Flash memory characteristics, an ee_data 			*/
-/* structure size (EE_REC_SIZE) is limited to the following set:		*/
-/*                                                                     	*/
-/* LPC2101/2/3, LPC2131/2/4/6/8, LPC2141/2/4/6/8: 0x10, 0x20, 0x40,     */ 
-/*                                                0x80 or 0x100         */
-/*                                                                     	*/
-/* LPC2104/5/6, LPC2112/4/9, LPC2124/9, LPC2192/4: 0x10, 0x20, 0x40,    */
-/*                                                 0x80, 0x100 or 0x200 */
-/*                                                                     	*/
-/* ====================================================================	*/
-/*                                                                     	*/
-/* example1:                                                          	*/
-/*                                                                     	*/
-/* struct ee_data{					//structure starts as word alligned	*/
-/*	unsigned char	_id;			//1 byte  - no allignement restr.	*/
-/*                                  //  	    3 BYTE GAP!!!!         	*/		
-/*	unsigned int	_rec_count;		//4 bytes - must be word alligned!	*/
-/*	unsigned char	_cs;			//1 byte  - no allignement restr.	*/
-/*};								// next structure will start as		*/
-/*                                  // word alligned...                 */
-/* Structure in example 1 occupies 12 bytes of memory					*/
-/*                                                                     	*/
-/* --------------------------------------------------------------------	*/
-/*                               
-                                      	*/
-/* example2:                                                          	*/
-/*                                                                     	*/
-/* struct ee_data{					//structure starts as word alligned	*/
-/*	unsigned char	_id;			//1 byte  - no allignement restr.	*/
-/*	unsigned char	_cs;			//1 byte  - no allignement restr.	*/
-/*                                  //  	    2 BYTE GAP!!!!         	*/		
-/*	unsigned int	_rec_count;		//4 bytes - must be word alligned!	*/
-/*};								// next structure will start as		*/
-/*                                  // word alligned...                 */
-/* Structure in example 2 occupies 8 bytes of memory					*/
-/*                                                                     	*/
-/************************************************************************/
-
-struct ee_data{
-	unsigned char	_id;				//  4 bytes: 1 byte (char) + 3 byte GAP!
-	
-	int 	acc_mid_x;
-	int 	acc_mid_y;
-	int 	acc_mid_z;
-	
-	int	acc_scale_x;
-	int	acc_scale_y;
-	int	acc_scale_z;
-	
-	int	mag_offset_x;
-	int	mag_offset_y;
-	int	mag_offset_z;
-
-	int	mag_scale_x;
-	int	mag_scale_y;
-	int	mag_scale_z;
-	
-	int 	gyro_offset_x;
-	int 	gyro_offset_y;
-	int 	gyro_offset_z;
-
-	int	int_mult;
-	int	int_div;
-	
-	int     used;
-	
-//	int FlightParams[sizeof(struct FLIGHT_PARAMETERS)];
-	
-};										// 16 bytes total
-
-struct ee_data2{
-	unsigned char	_id;				//  4 bytes: 1 byte (char) + 3 byte GAP!	
-	int FlightParams[63];
-};
-
-/************************************************************************/
-/*																		*/
-/* 	Disclaimer: all observations presented in example1, example 2 and 	*/
-/*	ee_data structure defined here are based on Keil's ARM compiler. 	*/
-/*	If another compiler is used, memory usage would have to be 		 	*/
-/*	re-examined and verified.										 	*/
-/*																		*/
-/************************************************************************/
-
-
-#define EE_REC_SIZE		0x100		//see restrictions from above
-
-/********************************************************************/
-/*																	*/
-/* 						Valid combinations for 						*/
-/* EE_REC_SIZE, EE_BUFFER_SIZE, EE_BUFFER_MASK and EE_START_MASK	*/
-/*																	*/
-/* EE_BUFFER_SIZE ! EE_START_MASK ! EE_REC_SIZE ! EE_BUFFER_MASK	*/
-/* ----------------------------------------------------------------	*/
-/*    	256			0xFFFFFF00			0x010		  	0xF0		*/
-/*		256			0xFFFFFF00			0x020		 	0xE0		*/
-/*    	256			0xFFFFFF00			0x040		  	0xC0		*/
-/*		256			0xFFFFFF00			0x080		 	0x80		*/
-/*		256			0xFFFFFF00			0x100			0x00		*/
-/* ---------------------------------------------------------------- */
-/*    	512			0xFFFFFE00			0x010		  	0x1F0		*/
-/*		512			0xFFFFFE00			0x020		 	0x1E0		*/
-/*    	512			0xFFFFFE00			0x040		  	0x1C0		*/
-/*		512			0xFFFFFE00			0x080			0x180	 	*/
-/*		512			0xFFFFFE00			0x100		 	0x100		*/
-/*		512			0xFFFFFE00			0x200		 	0x000		*/
-/********************************************************************/
-/*	For LPC2101/2/3, LPC213x and LPC214x EE_BUFFER_SIZE is 256.		*/
-/*	For all other LPC2000 devices EE_BUFFER_SIZE is always 512.		*/
-/********************************************************************/
-#define EE_BUFFER_SIZE	256
-#define EE_START_MASK	0xFFFFFF00
-#define EE_BUFFER_MASK	0x00000000
-
-/********************************************************************/
-/*!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!*/
-/*!!															  !!*/
-/*!!															  !!*/
-/*!! 				DO NOT MODIFY THE FOLLOWING CODE!!!			  !!*/
-/*!!				===================================			  !!*/
-/*!!															  !!*/
-/*!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!*/
-/********************************************************************/
-
-#define EE_REC_ID 				0xAA
-#define EE_SIZE					(EE_ADDR_H+1-EE_ADDR_L)
-#define NO_RECORDS_AVAILABLE	500
-#define NO_SPACE_IN_EEPROM		501
-#define INDEX_OUT_OF_RANGE		502
-
-#ifndef _EEPROM_
-	extern const unsigned char eeprom[];
-	extern void ee_erase(unsigned int , unsigned int []);	//function erases EEPROM
-	extern void ee_write(unsigned int , unsigned int []);	//function adds a record in EEPROM
-	extern void ee_read (unsigned int , unsigned int []);	//function reads the latest valid record in EEPROM
-	extern void ee_readn(unsigned int , unsigned int []);	//function reads n-th record in EEPROM
-	extern void ee_count(unsigned int , unsigned int []);	//function counts records in EEPROM
-#endif
diff --git a/ccny_asctec_firmware/include/ccny_asctec_firmware/adc.h b/ccny_asctec_firmware/include/ccny_asctec_firmware/adc.h
deleted file mode 100644
index 1c1d48d..0000000
--- a/ccny_asctec_firmware/include/ccny_asctec_firmware/adc.h
+++ /dev/null
@@ -1,42 +0,0 @@
-/*****************************************************************************
- *   adc.h:  Header file for Philips LPC214x Family Microprocessors
- *
- *   Copyright(C) 2006, Philips Semiconductor
- *   All rights reserved.
- *
- *   History
- *   2005.10.01  ver 1.00    Prelimnary version, first Release
- *
-******************************************************************************/
-#ifndef __ADC_H 
-#define __ADC_H
-
-#define ADC_INTERRUPT_FLAG	0	/* 1 is interrupt driven, 0 is polling */
-
-#define ADC_OFFSET	0x10
-#define ADC_INDEX	4
-
-#define ADC_DONE	0x80000000
-#define ADC_OVERRUN	0x40000000
-#define ADC_ADINT	0x00010000
-
-#define VOLTAGE_1	2
-#define VOLTAGE_2  	4
-#define CURRENT_2	1
-
-#define ADC_NUM		8		/* for LPC2146/8 */
-#define ADC_CLK		1000000		/* set to 1Mhz */
-
-extern void ADC0Handler( void ) __irq;
-extern void ADC1Handler( void ) __irq;
-extern unsigned int ADCInit( unsigned int ADC_Clk );
-extern unsigned int ADC0Read( unsigned char channelNum );
-extern unsigned int ADC1Read( unsigned char channelNum );
-
-extern volatile unsigned int ADC0Value[ADC_NUM], ADC1Value[ADC_NUM];
-extern volatile unsigned int ADC0IntDone, ADC1IntDone;
-
-#endif /* end __ADC_H */
-/*****************************************************************************
-**                            End Of File
-******************************************************************************/
diff --git a/ccny_asctec_firmware/include/ccny_asctec_firmware/comm_util_LL.h b/ccny_asctec_firmware/include/ccny_asctec_firmware/comm_util_LL.h
deleted file mode 100644
index 3f81a71..0000000
--- a/ccny_asctec_firmware/include/ccny_asctec_firmware/comm_util_LL.h
+++ /dev/null
@@ -1,56 +0,0 @@
-#ifndef COMM_UTIL_LL_H
-#define COMM_UTIL_LL_H
-
-#include <stdint.h>
-#include <math.h>
-
-#define GRAVITY_SI      9.810665            // in SI m/s^2
-//#define GRAVITY_COMM    GRAVITY_SI * 1000.0 // in Comm  mm/s^2
-
-inline float degreesToRadians(float angle);
-inline float radiansToDegrees(float angle);
-
-inline float LLToSIClimb(int16_t climb);
-
-// ****************** accel ***********************
-
-inline float LLToSIAccX(int16_t acc, float g);
-inline float LLToSIAccY(int16_t acc, float g);
-inline float LLToSIAccZ(int16_t acc, float g);
-
-/*
-inline int32_t LLtoCommAccX(int16_t acc, float g);
-inline int32_t LLtoCommAccY(int16_t acc, float g);
-inline int32_t LLtoCommAccZ(int16_t acc, float g);
-*/
-// ****************** angle rate ***********************
-
-inline float LLToSIAngleRateYaw  (int16_t angle_rate);
-inline float LLToSIAngleRateRoll (int16_t angle_rate);
-inline float LLToSIAngleRatePitch(int16_t angle_rate);
-//inline int32_t LLtoCommAngleRateYaw(int16_t angle_rate);
-
-// ****************** angle ***********************
-
-inline float LLToSIAngleRoll(int16_t angle);
-inline float LLToSIAnglePitch(int16_t angle);
-inline float LLToSIAngleYaw(uint16_t angle);
-
-/*
-inline uint16_t LLtoCommAngleRoll (int16_t angle);
-inline uint16_t LLtoCommAnglePitch(int16_t angle);
-inline uint16_t LLtoCommAngleYaw  (uint16_t angle);
-*/
-// **** for direct motor control
-
-inline short SIToLLCmdRoll   (float angle_cmd);
-inline short SIToLLCmdPitch  (float angle_cmd);
-inline short SIToLLCmdYawRate(float yaw_rate_cmd);
-inline short SIToLLCmdThrust (float thrust_cmd);
-/*
-inline short commToLLCmdRoll    (int16_t cmd_roll);
-inline short commToLLCmdPitch   (int16_t cmd_pitch);
-inline short commToLLCmdYawRate (int32_t cmd_yaw_rate);
-inline short commToLLCmdThrust  (int16_t cmd_thrust);
-*/
-#endif // COMM_UTIL_H
diff --git a/ccny_asctec_firmware/include/ccny_asctec_firmware/debug.h b/ccny_asctec_firmware/include/ccny_asctec_firmware/debug.h
deleted file mode 100644
index cfb7ab2..0000000
--- a/ccny_asctec_firmware/include/ccny_asctec_firmware/debug.h
+++ /dev/null
@@ -1,138 +0,0 @@
-/****************************************************************************
-*
-*   Copyright (c) 2006 Carrick Detweiler
-*                      and Massachusetts Institute of Technology
-*
-*   This program is free software; you can redistribute it and/or modify
-*   it under the terms of the GNU General Public License as published by
-*   the Free Software Foundation; either version 2 of the License, or
-*   (at your option) any later version.
-*
-*   This program is distributed in the hope that it will be useful,
-*   but WITHOUT ANY WARRANTY; without even the implied warranty of
-*   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-*   GNU General Public License for more details.
-*
-*   You should have received a copy of the GNU General Public License
-*   along with this program; if not, write to the Free Software
-*   Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
-*
-*   $Id: debug.h 142 2007-01-05 17:10:44Z carrick $
-****************************************************************************/
-
-
-#if !defined( DEBUG_H )
-#define DEBUG_H
-#include "stdio.h"
-//#include "console.h"
-
-/**
- * The default debug level (if not specified in the file itself)
- **/
-#ifndef DEBUG
-#define DEBUG 4
-#endif
-
-/**
- * Where debug printfs should go to
- **/
-//#define DEBUG_PRINTF printf
-#define DEBUG_PRINTF(...) 
-
-/**
- * If the debug output should be pretty (a little nicer to read?), but
- * this requires the allocation of some memory and the use of snprintf
- **/
-//#define DEBUG_PRETTY_PRINT
-
-/**
- * Prints file and line info.
- **/
-#ifndef DEBUG_PRETTY_PRINT
-#define DEBUG_PRINTLINE(pre,...)                       \
-  {                                                    \
-    DEBUG_PRINTF(pre );                                \
-    DEBUG_PRINTF("%s:%d %s() ",                        \
-                 __FILE__,__LINE__,__FUNCTION__);      \
-    DEBUG_PRINTF( __VA_ARGS__ );                       \
-  }
-#else /* DEBUG_PRETTY_PRINT */
-
-#define DEBUG_PRINTLINE(pre,...)                       \
-  { char __debugTmp[45];                               \
-    DEBUG_PRINTF(pre );                                \
-    snprintf(__debugTmp,45,"%-18s %-4d %s()",     \
-                 __FILE__,__LINE__,__FUNCTION__);      \
-    DEBUG_PRINTF("%-45s |  ",__debugTmp);                   \
-    DEBUG_PRINTF( __VA_ARGS__ );                       \
-    DEBUG_PRINTG("\n");
-  }
-#endif
-
-/**
- * Info printing
- **/
-#define PRINTF(...) 
-//#define PRINTF(...) 
-
-
-/**
- * Just a macro to indicate that something still needs to be done
- **/
-#define TBD(...)                                                 \
-  DEBUG_PRINTLINE("TBD:    ",__VA_ARGS__);                       
-
-
-#if DEBUG > 0
-/**
- * Debug printing at level 1 debug.  Usage:
- *   DEBUG1(("value %d",val));
- **/
-#define DEBUG1(...)                             \
-  DEBUG_PRINTLINE("DEBUG1: ",__VA_ARGS__);
-
-#if DEBUG > 1
-/**
- * Debug printing at level 2 debug.  Usage:
- *   DEBUG2("value %d",val);
- **/
-#define DEBUG2(...)                             \
-  DEBUG_PRINTLINE("DEBUG2: ",__VA_ARGS__);
-
-#if DEBUG > 2
-/**
- * Debug printing at level 3 debug.  Usage:
- *   DEBUG3("value %d",val);
- **/
-#define DEBUG3(...)                             \
-  DEBUG_PRINTLINE("DEBUG3: ",__VA_ARGS__);
-
-#if DEBUG > 3
-/**
- * Debug printing at level 4 debug.  Usage:
- *   DEBUG4("value %d",val);
- **/
-#define DEBUG4(...)                             \
-  DEBUG_PRINTLINE("DEBUG4: ",__VA_ARGS__);
-
-#else
-#define DEBUG4(...)
-#endif /* DEBUG > 3 */
-#else
-#define DEBUG4(...)
-#define DEBUG3(...)
-#endif /* DEBUG > 2 */
-#else
-#define DEBUG4(...)
-#define DEBUG3(...)
-#define DEBUG2(...)
-#endif /* DEBUG > 1 */
-#else
-#define DEBUG4(...)
-#define DEBUG3(...)
-#define DEBUG2(...)
-#define DEBUG1(...)
-#endif /* DEBUG > 0 */
-
-
-#endif /* DEBUG_H */
diff --git a/ccny_asctec_firmware/include/ccny_asctec_firmware/gpsmath.h b/ccny_asctec_firmware/include/ccny_asctec_firmware/gpsmath.h
deleted file mode 100644
index fc6e98d..0000000
--- a/ccny_asctec_firmware/include/ccny_asctec_firmware/gpsmath.h
+++ /dev/null
@@ -1,48 +0,0 @@
-#ifndef GPS_MATH_H
-#define GPS_MATH_H
-
-#define GPS_A	6378137.0								// earth semimajor axis in meters
-#define GPS_F 	0.0033528106647474807198455286185206	// reciprocal flattening
-#define GPS_E2 	2*GPS_F-GPS_F*GPS_F									// eccentricity squared
-#define MEAN_EARTH_RADIUS 	6378137.0
-#define MEAN_EARTH_DIAMETER	12756274.0
-#define UMR	0.017453292519943295769236907684886		//PI/180
-
-
-struct GPS_DATA
-{	
-//latitude/longitude in deg * 10^7
-	int latitude;
-	int longitude;
-//GPS height in mm 
-	int height;
-//speed in x (E/W) and y(N/S) in mm/s	
-	int speed_x;
-	int speed_y;
-//GPS heading in deg * 1000
-	int heading; 
-	
-//accuracy estimates in mm and mm/s
-	unsigned int horizontal_accuracy;
-	unsigned int vertical_accuracy;
-	unsigned int speed_accuracy;
-
-//number of satellite vehicles used in NAV solution
-	unsigned int numSV;
-
-// GPS status information; Bit7...Bit3: 0 Bit 2: longitude direction Bit1: latitude direction Bit 0: GPS lock
-	int status; 		
-};
-extern struct GPS_DATA GPS_Data;
-
-struct GPS_TIME 
-{
-	unsigned int time_of_week;	//[ms]
-	unsigned short week;		//[1..52]
-};
-extern struct GPS_TIME GPS_Time;
-
-//trigger's new gps data transmission
-extern unsigned int gpsDataOkTrigger;
-
-#endif // GPS_MATH_H
diff --git a/ccny_asctec_firmware/include/ccny_asctec_firmware/hardware.h b/ccny_asctec_firmware/include/ccny_asctec_firmware/hardware.h
deleted file mode 100644
index 170629c..0000000
--- a/ccny_asctec_firmware/include/ccny_asctec_firmware/hardware.h
+++ /dev/null
@@ -1,23 +0,0 @@
-#ifndef HARDWARE_H
-#define HARDWARE_H
-
-#include "LPC214x.h"
-#include "main.h"
-#include "system.h"
-#include "uart.h"
-#include "irq.h"
-
-#define EXT_NCS 7   //CS outputs on P0
-#define LL_nCS  20	
-#define CTS_RADIO 22
-
-//I/Os on P1
-#define CAMERA_FET	16	
-
-void LED(unsigned char, unsigned char);
-
-void beeper(unsigned char offon);
-
-#endif // HARDWARE_H
-
-
diff --git a/ccny_asctec_firmware/include/ccny_asctec_firmware/i2c.h b/ccny_asctec_firmware/include/ccny_asctec_firmware/i2c.h
deleted file mode 100644
index 145eb13..0000000
--- a/ccny_asctec_firmware/include/ccny_asctec_firmware/i2c.h
+++ /dev/null
@@ -1,64 +0,0 @@
-/*****************************************************************************
- *   i2c.h:  Header file for Philips LPC214x Family Microprocessors
- *
- *   Copyright(C) 2006, Philips Semiconductor
- *   All rights reserved.
- *
- *   History
- *   2005.10.01  ver 1.00    Prelimnary version, first Release
- *
-******************************************************************************/
-#ifndef __I2C_H 
-#define __I2C_H
-
-#define BUFSIZE			0x20
-#define MAX_TIMEOUT		0x00FFFFFF
-
-#define I2CMASTER		0x01
-#define I2CSLAVE		0x02
-
-/* For more info, read Philips's SE95 datasheet */
-#define SE95_ADDR		0x9E
-#define SE95_ID			0x05
-#define SE95_CONFIG		0x01
-#define SE95_TEMP		0x00
-#define RD_BIT			0x01
-
-#define GET_DEVICE_ID		0x01
-#define GET_TEMPERATURE		0x02
-#define SET_CONFIGURATION	0x03
-
-#define I2C_IDLE		0
-#define I2C_STARTED		1
-#define I2C_RESTARTED		2
-#define I2C_REPEATED_START	3
-#define DATA_ACK		4
-#define DATA_NACK		5
-
-#define I2CONSET_I2EN		0x00000040  /* I2C Control Set Register */
-#define I2CONSET_AA		0x00000004
-#define I2CONSET_SI		0x00000008
-#define I2CONSET_STO		0x00000010
-#define I2CONSET_STA		0x00000020
-
-#define I2CONCLR_AAC		0x00000004  /* I2C Control clear Register */
-#define I2CONCLR_SIC		0x00000008
-#define I2CONCLR_STAC		0x00000020
-#define I2CONCLR_I2ENC		0x00000040
-
-#define I2DAT_I2C		0x00000000  /* I2C Data Reg */
-#define I2ADR_I2C		0x00000000  /* I2C Slave Address Reg */
-#define I2SCLH_SCLH		0x00000080  /* I2C SCL Duty Cycle High Reg */
-#define I2SCLL_SCLL		0x00000080  /* I2C SCL Duty Cycle Low Reg */
-
-extern void I2CInit( unsigned int I2cMode );
-extern unsigned int I2CStart( void );
-extern unsigned int I2CStop( void );
-extern unsigned int I2CEngine( void );
-extern void I2C0_send_motordata(void);
-extern void I2C0MasterHandler(void);
-
-#endif /* end __I2C_H */
-/****************************************************************************
-**                            End Of File
-*****************************************************************************/
diff --git a/ccny_asctec_firmware/include/ccny_asctec_firmware/kalman.h b/ccny_asctec_firmware/include/ccny_asctec_firmware/kalman.h
deleted file mode 100644
index d1bbb24..0000000
--- a/ccny_asctec_firmware/include/ccny_asctec_firmware/kalman.h
+++ /dev/null
@@ -1,100 +0,0 @@
-#ifndef KALMAN_H
-#define KALMAN_H
-
-#include <inttypes.h>
-#include <mav_common/comm_packets.h>
-#include <mav_common/comm_util.h>
-#include <mav_common/comm_types.h>
-
-#include "matrices.h"
-#include "LL_HL_comm.h"
-#include "sdk.h"
-#include "ssp.h"
-#include "uart.h"
-#include "comm_util_LL.h"
-
-#define HEIGHT_PKT_TIMEOUT 200000 // 200 ms
-
-typedef struct
-{
-  float A[2][2];
-  float At[2][2];
-  float K[2][2];
-  float P[2][2];
-  float T[2][2];
-  float C[2][2];
-  float I[2][2];
-  float Q[2][2];
-  float R[2][2];
-  float Sigma2Q1;
-  float Sigma2Q2;
-  float Sigma2R1;
-  float Sigma2R2;
-  float B[2];
-  float Input;
-  float State[2];
-  float Correction[2];
-  float Res[2];
-} KalPos;
-
-typedef struct
-{
-  float K;
-  float P;
-  float T;
-  float Q;
-  float R;
-  float Sigma2Q;
-  float Sigma2R;
-  float Input;
-  float State;
-  float Correction;
-} KalYaw;
-
-typedef struct
-{
-  float pos_filtered[3]; // Position
-  float vel_filtered[3]; // linear velocity
-  float yaw_filtered;    //yaw angle
-} KalOut;
-
-typedef struct
-{
-  float sigma2Q1x;
-  float sigma2Q2x;
-  float sigma2R1x;
-  float sigma2R2vx;
-
-  float sigma2Q1y;
-  float sigma2Q2y;
-  float sigma2R1y;
-  float sigma2R2vy;
-
-  float sigma2Q1z;
-  float sigma2Q2z;
-  float sigma2R1z;
-  float sigma2R2vz;
-
-  float sigma2Qyaw;
-  float sigma2Ryaw;
-} Covariance;
-
-KalPos kal_x, kal_y, kal_z;
-KalYaw kal_yaw;
-KalOut kal_out;
-Covariance covariance;
-
-void KFilter(void);
-
-void InitKalPos(KalPos *k);
-void PredictPos(KalPos *k, float dt);
-void CorrectPos(KalPos *k);
-
-void InitKalYaw(KalYaw *k);
-void PredictYaw(KalYaw *k, float dt);
-void CorrectYaw(KalYaw *k);
-
-void resetKalmanFilter(void);
-
-#endif // KALMAN_H
-
diff --git a/ccny_asctec_firmware/include/ccny_asctec_firmware/lpcUART.h b/ccny_asctec_firmware/include/ccny_asctec_firmware/lpcUART.h
deleted file mode 100644
index 4e21d39..0000000
--- a/ccny_asctec_firmware/include/ccny_asctec_firmware/lpcUART.h
+++ /dev/null
@@ -1,122 +0,0 @@
-/******************************************************************************
- *
- * $RCSfile: $
- * $Revision: $
- *
- * Header file for Philips LPC ARM Processors.
- * Copyright 2004 R O SoftWare
- *
- * No guarantees, warrantees, or promises, implied or otherwise.
- * May be used for hobby or commercial purposes provided copyright
- * notice remains intact.
- *
- *****************************************************************************/
-#ifndef INC_LPC_UART_H
-#define INC_LPC_UART_H
-
-// Universal Asynchronous Receiver Transmitter Registers
-//typedef struct
-//{
-//  union
-//    {
-//    REG_8 rbr;                          // Receive Buffer Register
-//    REG_8 thr;                          // Transmit Holding Register
-//    REG_8 dll;                          // Divisor Latch Register (LSB)
-//    REG_8 _pad0[4];
-//    };
-//
-//  union
-//    {
-//    REG_8 ier;                          // Interrupt Enable Register
-//    REG_8 dlm;                          // Divisor Latch Register (MSB)
-//    REG_8 _pad1[4];
-//    };
-//
-//  union
-//    {
-//    REG_8 iir;                          // Interrupt ID Register
-//    REG_8 fcr;                          // FIFO Control Register
-//    REG_8 _pad2[4];
-//    };
-//
-//  REG_8 lcr;                            // Line Control Registe
-//  REG_8 _pad3[3];
-//  REG_8 mcr;                            // MODEM Control Register
-//  REG_8 _pad4[3];
-//  REG_8 lsr;                            // Line Status Register
-//  REG_8 _pad5[3];
-//  REG_8 msr;                            // MODEM Status Register
-//  REG_8 _pad6[3];
-//  REG_8 scr;                            // Scratch Pad Register
-//  REG_8 _pad7[3];
-//} uartRegs_t;
-
-///////////////////////////////////////////////////////////////////////////////
-// UART defines
-
-// Interrupt Enable Register bit definitions
-#define UIER_ERBFI          (1 << 0)    // Enable Receive Data Available Interrupt
-#define UIER_ETBEI          (1 << 1)    // Enable Transmit Holding Register Empty Interrupt
-#define UIER_ELSI           (1 << 2)    // Enable Receive Line Status Interrupt
-#define UIER_EDSSI          (1 << 3)    // Enable MODEM Status Interrupt
-
-// Interrupt ID Register bit definitions
-#define UIIR_NO_INT         (1 << 0)    // NO INTERRUPTS PENDING
-#define UIIR_MS_INT         (0 << 1)    // MODEM Status
-#define UIIR_THRE_INT       (1 << 1)    // Transmit Holding Register Empty
-#define UIIR_RDA_INT        (2 << 1)    // Receive Data Available
-#define UIIR_RLS_INT        (3 << 1)    // Receive Line Status
-#define UIIR_CTI_INT        (6 << 1)    // Character Timeout Indicator
-#define UIIR_ID_MASK        0x0E
-
-// FIFO Control Register bit definitions
-#define UFCR_FIFO_ENABLE    (1 << 0)    // FIFO Enable
-#define UFCR_RX_FIFO_RESET  (1 << 1)    // Reset Receive FIFO
-#define UFCR_TX_FIFO_RESET  (1 << 2)    // Reset Transmit FIFO
-#define UFCR_FIFO_TRIG1     (0 << 6)    // Trigger @ 1 character in FIFO
-#define UFCR_FIFO_TRIG4     (1 << 6)    // Trigger @ 4 characters in FIFO
-#define UFCR_FIFO_TRIG8     (2 << 6)    // Trigger @ 8 characters in FIFO
-#define UFCR_FIFO_TRIG14    (3 << 6)    // Trigger @ 14 characters in FIFO
-
-// Line Control Register bit definitions
-#define ULCR_CHAR_5         (0 << 0)    // 5-bit character length
-#define ULCR_CHAR_6         (1 << 0)    // 6-bit character length
-#define ULCR_CHAR_7         (2 << 0)    // 7-bit character length
-#define ULCR_CHAR_8         (3 << 0)    // 8-bit character length
-#define ULCR_STOP_1         (0 << 2)    // 1 stop bit
-#define ULCR_STOP_2         (1 << 2)    // 2 stop bits
-#define ULCR_PAR_NO         (0 << 3)    // No Parity
-#define ULCR_PAR_ODD        (1 << 3)    // Odd Parity
-#define ULCR_PAR_EVEN       (3 << 3)    // Even Parity
-#define ULCR_PAR_MARK       (5 << 3)    // MARK "1" Parity
-#define ULCR_PAR_SPACE      (7 << 3)    // SPACE "0" Paruty
-#define ULCR_BREAK_ENABLE   (1 << 6)    // Output BREAK line condition
-#define ULCR_DLAB_ENABLE    (1 << 7)    // Enable Divisor Latch Access
-
-// Modem Control Register bit definitions
-#define UMCR_DTR            (1 << 0)    // Data Terminal Ready
-#define UMCR_RTS            (1 << 1)    // Request To Send
-#define UMCR_LB             (1 << 4)    // Loopback
-
-// Line Status Register bit definitions
-#define ULSR_RDR            (1 << 0)    // Receive Data Ready
-#define ULSR_OE             (1 << 1)    // Overrun Error
-#define ULSR_PE             (1 << 2)    // Parity Error
-#define ULSR_FE             (1 << 3)    // Framing Error
-#define ULSR_BI             (1 << 4)    // Break Interrupt
-#define ULSR_THRE           (1 << 5)    // Transmit Holding Register Empty
-#define ULSR_TEMT           (1 << 6)    // Transmitter Empty
-#define ULSR_RXFE           (1 << 7)    // Error in Receive FIFO
-#define ULSR_ERR_MASK       0x1E
-
-// Modem Status Register bit definitions
-#define UMSR_DCTS           (1 << 0)    // Delta Clear To Send
-#define UMSR_DDSR           (1 << 1)    // Delta Data Set Ready
-#define UMSR_TERI           (1 << 2)    // Trailing Edge Ring Indicator
-#define UMSR_DDCD           (1 << 3)    // Delta Data Carrier Detect
-#define UMSR_CTS            (1 << 4)    // Clear To Send
-#define UMSR_DSR            (1 << 5)    // Data Set Ready
-#define UMSR_RI             (1 << 6)    // Ring Indicator
-#define UMSR_DCD            (1 << 7)    // Data Carrier Detect
-
-#endif
diff --git a/ccny_asctec_firmware/include/ccny_asctec_firmware/main.h b/ccny_asctec_firmware/include/ccny_asctec_firmware/main.h
deleted file mode 100644
index e5f4b58..0000000
--- a/ccny_asctec_firmware/include/ccny_asctec_firmware/main.h
+++ /dev/null
@@ -1,167 +0,0 @@
-#ifndef MAIN_H_
-#define MAIN_H_
-
-#include "util.h"
-
-extern void mainloop(void);
-extern void timer0ISR(void);
-extern void timer1ISR(void);
-
-volatile unsigned int GPS_timeout;
-extern unsigned int GPS_cnt_trigger[4];
-unsigned char GPS_init_status;
-
-void calibrate(void);
-
-//#define BATTERY_WARNING_VOLTAGE 10700   //10500 mV, for newer batteries with flatter discharging characteristic, such as TP 5000
-#define BATTERY_WARNING_VOLTAGE 10000   //9800 mV
-#define BAT_DIV 10//(BATTERY_WARNING_VOLTAGE-9000)/100
-
-#define TRIGGER_SERVO_ACTIVE	1800
-#define TRIGGER_SERVO_INACTIVE	3600
-#define CAMER_OFFSET_HUMMINGBIRD	63000
-
-#define ControllerCyclesPerSecond 	1000
-
-//defines for VP_CAMREMOTE (in �s)
-#define VP_SHOOT				2000
-#define VP_LENSCLOSE_SLEEP		1900
-#define VP_REFOCUS_LOCKFOCUS	1800
-#define VP_ZOOM_IN				1700
-#define VP_ZOOM_OUT				1600
-#define VP_NEXT_PROFILE			1500
-#define VP_PREVIOUS_PROFILE		1400
-#define VP_SHUTTER_SPEED_INC	1300
-#define VP_SHUTTER_SPEED_DEC	1200
-#define VP_APERTURE_INC			1100
-#define VP_APERTURE_DEC			1000
-
-#define OFF 0
-#define ON  1
-
-#define NORMAL 0
-
-//reconfigure GPS if needed
-#define GPS_STARTUP 			0
-#define GPS_NEEDS_CONFIGURATION	1
-#define GPS_IS_CONFIGURED		2
-#define GPS_CONFIG_ERROR		3
-
-//packet descriptors
-#define PD_IMURAWDATA       0x01
-#define PD_LLSTATUS        	0x02
-#define PD_IMUCALCDATA      0x03
-#define PD_HLSTATUS        	0x04
-
-#define PD_CTRLOUT			0x11
-#define PD_FLIGHTPARAMS     0x12
-#define PD_CTRLCOMMANDS		0x13
-#define PD_CTRLINTERNAL		0x14
-#define PD_RCDATA       	0x15
-#define PD_CTRLSTATUS		0x16
-
-#define PD_WAYPOINT     	0x20
-#define PD_CURRENTWAY   	0x21
-#define PD_NMEADATA     	0x22
-#define PD_GPSDATA			0x23
-
-#define PD_CAMERACOMMANDS	0x30
-
-#define CAM_TRIGGERED		0x04
-
-struct IMU_CALCDATA {
-//angles derived by integration of gyro_outputs, drift compensated by data fusion; -90000..+90000 pitch(nick) and roll, 0..360000 yaw; 1000 = 1 degree
-    int angle_nick;
-    int angle_roll;
-    int angle_yaw;
-
-//angular velocities, raw values [16 bit], bias free, in 0.0154 �/s (=> 64.8 = 1 �/s)
-    int angvel_nick;
-    int angvel_roll;
-    int angvel_yaw;
-
-//acc-sensor outputs, calibrated: -10000..+10000 = -1g..+1g
-    short acc_x_calib;
-    short acc_y_calib;
-    short acc_z_calib;
-
-//horizontal / vertical accelerations: -10000..+10000 = -1g..+1g
-    short acc_x;
-    short acc_y;
-    short acc_z;
-
-//reference angles derived by accelerations only: -90000..+90000; 1000 = 1 degree
-    int acc_angle_nick;
-    int acc_angle_roll;
-
-//total acceleration measured (10000 = 1g)
-    int acc_absolute_value;
-
-//magnetic field sensors output, offset free and scaled; units not determined, as only the direction of the field vector is taken into account
-    int Hx;
-    int Hy;
-    int Hz;
-
-//compass reading: angle reference for angle_yaw: 0..360000; 1000 = 1 degree
-    int mag_heading;
-
-//pseudo speed measurements: integrated accelerations, pulled towards zero; units unknown; used for short-term position stabilization
-    int speed_x;
-    int speed_y;
-    int speed_z;
-
-//height in mm (after data fusion)
-    int height;
-
-//diff. height in mm/s (after data fusion)
-    int dheight;
-
-//diff. height measured by the pressure sensor [mm/s]
-    int dheight_reference;
-
-//height measured by the pressure sensor [mm]
-    int height_reference;
-};
-extern struct IMU_CALCDATA IMU_CalcData, IMU_CalcData_tmp;
-
-struct IMU_RAWDATA {
-//pressure sensor 24-bit value, not scaled but bias free
-	int pressure;
-
-//16-bit gyro readings; 32768 = 2.5V
-    short gyro_x;
-	short gyro_y;
-	short gyro_z;
-
-//10-bit magnetic field sensor readings
-    short mag_x;
-	short mag_y;
-	short mag_z;
-
-//16-bit accelerometer readings
-    short acc_x;
-	short acc_y;
-    short acc_z;
-
-//16-bit temperature measurement using yaw-gyro internal sensor
-	unsigned short temp_gyro;
-
-//16-bit temperature measurement using ADC internal sensor
-	unsigned int temp_ADC;
-};
-
-extern struct IMU_RAWDATA IMU_RawData;
-
-
-struct SYSTEM_PERMANENT_DATA
-{
-	unsigned int total_uptime;
-	unsigned int total_flighttime;
-	unsigned int onoff_cycles;
-	unsigned int number_of_flights;
-	unsigned int chksum;
-};
-extern struct SYSTEM_PERMANENT_DATA SYSTEM_Permanent_Data;
-
-#endif /*MAIN_H_*/
-
diff --git a/ccny_asctec_firmware/include/ccny_asctec_firmware/matrices.h b/ccny_asctec_firmware/include/ccny_asctec_firmware/matrices.h
deleted file mode 100644
index 0867358..0000000
--- a/ccny_asctec_firmware/include/ccny_asctec_firmware/matrices.h
+++ /dev/null
@@ -1,54 +0,0 @@
-#ifndef MATRICES_H
-#define MATRICES_H
-
-#include <math.h>
-#include <stdlib.h>
-
-typedef float** matrix;  // designate a matrix as an array (2D) of floatsdef Row* Matrix;
-
-void addMatrix2 (float A[2][2], float B[2][2], float C[2][2]);
-void subMatrix2 (float A[2][2], float B[2][2], float C[2][2]);
-void multMatrix2(float A[2][2], float B[2][2], float C[2][2]);
-void subVector2 (float A[2], float B[2], float C[2]);
-void multMatVec2(float A[2][2], float B[2], float C[2]);
-void invert2(float A[2][2], float B[2][2]);
-void VectmultSc2(float V[2], float scl, float V1[2]);
-void addVector2(float V[2], float V1[2], float V2[2]);
-//void allocMatrix(matrix mat, int nrows, int ncolumns);
-void addMatrix (matrix A, matrix B, matrix C, int m, int n);
-void addVector (float* A, float* B, float* C, int m);
-void subMatrix (matrix A, matrix B, matrix C, int m, int n);
-void subVector (float* A, float* B, float* C, int m);
-void negMatrix(matrix A, int m, int n);
-void multMatrix(matrix A, matrix B, matrix C, int Am, int An, int Bn);
-void multMatVec(matrix A, float* B, float* C, int Am, int Bn);
-void transpose(matrix A, matrix B, int Am, int An);
-void invert3(matrix A, matrix B);
-float determinant(matrix A,matrix tmp, int n);
-void getMinor(matrix A, matrix B,int An, int m, int n);
-void invt(matrix A, matrix B, matrix tmp1, matrix tmp2, int An);
-float BhQhBhT(matrix Qh, float* Bh, float* tmp);
-void VectdivSc(float* V, float scl);
-
-/*void allocMatrix(float** mat, int nrows, int ncolumns)
-{
-	mat = (float **)malloc(nrows * ncolumns * sizeof(float));
-
-	float* temp = (float*) malloc(nrows * ncolumns * sizeof(float));
-
-	for(int i = 0; i < nrows; i++)
-		mat[i] = temp + (i * ncolumns);
-
-}*/
-
-/*void allocMatrix(float** mat, int nrows, int ncolumns)
-{
-	mat = malloc(ncolumns * sizeof(float*));
-  for(int i = 0; i < ncolumns; i++)
-   mat[i] = malloc(nrows * sizeof(float));
-}*/
-
-
-#endif /*MATRICES_H_*/
-
-
diff --git a/ccny_asctec_firmware/include/ccny_asctec_firmware/matrices2.h b/ccny_asctec_firmware/include/ccny_asctec_firmware/matrices2.h
deleted file mode 100644
index c53c7a5..0000000
--- a/ccny_asctec_firmware/include/ccny_asctec_firmware/matrices2.h
+++ /dev/null
@@ -1,248 +0,0 @@
-#ifndef MATRICES_H
-#define MATRICES_H
-#include <math.h>
-
-typedef float** matrix;  // designate a matrix as an array (2D) of floats
-
-void addMatrix (matrix A, matrix B, matrix C, int m, int n);
-void addVector (float* A, float* B, float* C, int m);
-void subMatrix (matrix A, matrix B, matrix C, int m, int n);
-void subVector (float* A, float* B, float* C, int m);
-void negMatrix(matrix A, int m, int n);
-void multMatrix(matrix A, matrix B, matrix C, int Am, int An, int Bn);
-void multMatVec(matrix A, float* B, float* C, int Am, int Bn);
-void transpose(matrix A, matrix B, int Am, int An);
-void invert3(matrix A, matrix B);
-void invert2(matrix A, matrix B);
-float determinant(matrix A,matrix tmp, int n);
-void getMinor(matrix A, matrix B,int An, int m, int n);
-void invt(matrix A, matrix B, matrix tmp1, matrix tmp2, int An);
-float BhQhBhT(matrix Qh, float* Bh, float* tmp);
-void VectdivSc(float* V, float scl);
-
-
-void addMatrix (matrix A, matrix B, matrix C, int m, int n){
-	/*C= A+B;
-	 * A,B and C need to be the same size (m by n); function does not check*/
-	int i, j;
-	for(i=0; i<m; ++i){
-		for(j=0; j<n; ++j){
-			C[i][j] = A[i][j] + B[i][j];
-		}//inner for
-	}//outer for
-}//add matrices
-
-void addVector (float* A, float* B, float* C, int m){
-	/*C= A+B;
-	 *  A,B and C need to be the same size (m); function does not check*/
-	int i;
-	for(i=0; i<m; ++i){
-		C[i] = A[i] + B[i];
-	}//for
-}//add Vectors
-
-void subMatrix (matrix A, matrix B, matrix C, int m, int n){
-	/*C= A-B;
-	 * A,B and C need to be the same size (m by n); function does not check*/
-	int i, j;
-	for(i=0; i<m; ++i){
-			for(j=0; j<n; ++j){
-				C[i][j] = A[i][j] - B[i][j];
-			}//inner for
-	}//outer for
-}//sub matrices
-
-void subVector (float* A, float* B, float* C, int m){
-	/*C= A-B;
-	 * A,B and C need to be the same size (m); function does not check*/
-	int i;
-	for(i=0; i<m; ++i){
-		C[i] = A[i] - B[i];
-	}//for
-}//add Vectors
-
-
-
-void negMatrix(matrix A, int m, int n){
-	/*negate matrix*/
-	int i,j;
-	for(i=0; i<m; ++i){
-		for(j=0; j<n; ++j){
-			A[i][j] = -A[i][j];
-		}//inner for
-	}//outer for
-}//negMAtrix
-
-
-void multMatrix(matrix A, matrix B, matrix C, int Am, int An, int Bn){
-	//C = A*B
-	//A,B and C need to be of correct dimensions, function does not check
-    int i,j,k;
-    float sum;
-
-    for(i=0; i < Bn; i++){
-    	for(j=0; j < Am; j++){
-    		sum=0;
-    		for(k=0; k < An; k++)
-    			sum += A[j][k] * B[k][i];
-    		C[j][i] = sum;
-    	}//inner for
-    }//outer for
-}
-
-void multMatVec(matrix A, float* B, float* C, int Am, int Bn){
-	/*C = A*B
-	 *A,B and C need to be of correct dimensions, function does not check */
-
-
-	int j,k;
-	float sum;
-  	for(j=0; j < Am; j++){
-  		sum=0;
-   		for(k=0; k < Bn; k++)
-   			sum += A[j][k] * B[k];
-   		C[j] = sum;
-  		}//for
-}//multMatVec
-
-
-void transpose(matrix A, matrix B, int Am, int An){
-	/*B = A'*/
-	int i,j;
-	 for(i=0; i < Am; i++)
-		for(j=0; j < An; j++)
-		    B[j][i] = A[i][j];
-
-}
-
-void invert3(matrix A, matrix B){
-/* B = A^-1 for 3x3 matrices*/
-	float det = (A[0][0]*A[1][1]*A[2][2]-A[0][0]*A[1][2]*A[2][1]-A[1][0]*A[0][1]*A[2][2]+A[1][0]*A[0][2]*A[2][1]+A[2][0]*A[0][1]*A[1][2]-A[2][0]*A[0][2]*A[1][1]);
-
-	B[0][0]=(A[1][1]*A[2][2]-A[1][2]*A[2][1])/det;
-	B[0][1]=(-A[0][1]*A[2][2]+A[0][2]*A[2][1])/det;
-	B[0][2]=(A[0][1]*A[1][2]-A[0][2]*A[1][1])/det;
-	B[1][0]=(-A[1][0]*A[2][2]+A[1][2]*A[2][0])/det;
-	B[1][1]=(A[0][0]*A[2][2]-A[0][2]*A[2][0])/det;
-	B[1][2]=(-A[0][0]*A[1][2]+A[0][2]*A[1][0])/det;
-	B[2][0]=(A[1][0]*A[2][1]-A[1][1]*A[2][0])/det;
-	B[2][1]=(-A[0][0]*A[2][1]+A[0][1]*A[2][0])/det;
-	B[2][2]=(A[0][0]*A[1][1]-A[0][1]*A[1][0])/det;
-}//invert3
-
-void invert2(matrix A, matrix B){
-/* B = A^-1 for 2x2 matrices*/
-	float det = (A[0][0]*A[1][1]-A[0][1]*A[1][0]);
-
-	B[0][0]=(A[1][1])/det;
-	B[0][1]=(-A[0][1])/det;
-	B[1][0]=(-A[1][0])/det;
-	B[1][1]=(A[0][0])/det;
-}//invert2
-
-float determinant(matrix A,matrix tmp, int n){
-	/*returns determinant of n x n matrix*/
-	int i,j,k;
-	float q;
-	float dtr=1;
-	/* copy A to tmp*/
-	for(i=0; i < n; i++)
-		for(j=0; j < n; j++)
-		    tmp[i][j] = A[j][i];
-
-	/*compute determinant*/
-	for(i=0;i < n;i++){
-		for(j=0;j < n;j++){
-			q=tmp[j][i]/tmp[i][i];
-			for(k=0;k < n;k++){
-				if(i==j) break;
-				tmp[j][k]=(tmp[j][k]-tmp[i][k])*q;
-			}//innermost for
-		}//middle for
-	}//outer for
-	for(i=0;i < n;i++){
-		dtr=dtr*tmp[i][i];
-	}//for
-	return(dtr);
-}//det
-
-
-void getMinor(matrix A, matrix B,int An, int m, int n){
-	/*	use this function to generate a matrix B that is the mn minor of A; A must be square
-	 *  m>=1, n>=1, An is the size of A*/
-	int i,j;
-	int k=0;
-	for(i=0; i < An; i++){
-		if(i!=(m-1)){
-			for(j=0; j < (An-1); j++){
-				if(j<(n-1)){
-					B[k][j] = A[i][j];
-				}
-				else{
-					B[k][j] = A[i][j+1];
-				}
-			}//inner for (column)
-			k++;
-		}//if
-	}//outer for
-}//get minor
-
-
-void invt(matrix A, matrix B, matrix tmp1, matrix tmp2, int An){
-	/*B =  A^-1 ; tmp1 & tmp2 must be at least of size (An-1)x(An-1)
-	 * function does not check if matrix is singular, tried, but even if det(A)==0, it did not escape,
-	 * just reutrned "nan" for some elements, and garbage for others
-	 *  */
-	int i,j;
-	float detA = determinant(A,tmp2,An);
-	for(i=0; i < An; i++){
-		for(j=0; j < An; j++){
-			getMinor(A,tmp1,An,i+1,j+1);
-			if(((i+j)%2)==0){
-				B[j][i]= determinant(tmp1,tmp2,(An-1))/detA;
-			}
-			else{
-				B[j][i]= -determinant(tmp1,tmp2,(An-1))/detA;
-			}
-			 //problem if an element is zero (returns "nan" for zero element)
-		}//inner for
-	}//outer for
-}//invert
-
-float BhQhBhT(matrix Qh, float* Bh, float* tmp){
-	//function returns the value for Bh*Qh*Bh', where Qh is an  3x3 matrix, and Bh is a vector of length 3
-
-
-
-	//Bh*Qh
-	int i,j;
-	float sum;
-	for(i=0; i < 3; i++){
-		sum=0;
-		for(j=0; j < 3; j++)
-			sum += Bh[j]*Qh[j][i];
-		tmp[i] = sum;
-	 }//outer for
-
-	//tmp*BhT
-	sum = 0;
-	for(i=0; i < 3; i++)
-		sum += tmp[i]*Bh[i];
-
-
-
-	return sum;
-}
-
-void VectdivSc(float* V, float scl){
-	//function returns the value of Vector/scalar where vector is 3x1
-
-	int i;
-	for(i=0; i < 3; i++){
-		V[i] = V[i]/scl;
-	 }// for
-}
-
-#endif /*MATRICES_H_*/
-
-
diff --git a/ccny_asctec_firmware/include/ccny_asctec_firmware/pid.h b/ccny_asctec_firmware/include/ccny_asctec_firmware/pid.h
deleted file mode 100644
index b611ded..0000000
--- a/ccny_asctec_firmware/include/ccny_asctec_firmware/pid.h
+++ /dev/null
@@ -1,35 +0,0 @@
-#ifndef PID_H
-#define PID_H
-
-#include <inttypes.h>
-#include <mav_common/comm.h>
-#include <mav_common/comm_packets.h>
-#include <mav_common/comm_types.h>
-
-#include "sdk.h"
-#include "LL_HL_comm.h"
-
-typedef struct
-{
-  float kp;         //  Proportional Const
-  float ki;         //  Integral Const
-  float kd;         //  Derivative Const
-  float kd2;        //  Derivative Const for angular velocity feedback
-  float d_base;
-  float bias;       //  constant term in the PID sum
-  float sum_error;  //  Sums of Errors
-  float max_sum_error; //  integrative saturation to avoid increasing error from the integration
-  float max_error;    // maximum instantaneous error
-
-} PID;
-
-void pidReset(void);
-
-float pidCalc(PID * pid, float error, float d_term, float d_base, float dt);
-
-void processCtrl(void);
-
-void pidParamUpdate(void);
-
-#endif // PID_H
-
diff --git a/ccny_asctec_firmware/include/ccny_asctec_firmware/sdk.h b/ccny_asctec_firmware/include/ccny_asctec_firmware/sdk.h
deleted file mode 100644
index 313ca8f..0000000
--- a/ccny_asctec_firmware/include/ccny_asctec_firmware/sdk.h
+++ /dev/null
@@ -1,186 +0,0 @@
-/*
-
-Copyright (c) 2011, Markus Achtelik, ASL, ETH Zurich, Switzerland
-You can contact the author at <markus dot achtelik at mavt dot ethz dot ch>
-
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-* Redistributions of source code must retain the above copyright
-notice, this list of conditions and the following disclaimer.
-* Redistributions in binary form must reproduce the above copyright
-notice, this list of conditions and the following disclaimer in the
-documentation and/or other materials provided with the distribution.
-* Neither the name of ETHZ-ASL nor the
-names of its contributors may be used to endorse or promote products
-derived from this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
-ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL ETHZ-ASL BE LIABLE FOR ANY
-DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-
-*/
-
-#ifndef SDK_H
-#define SDK_H
-
-#include <inttypes.h>
-
-#include "pid.h"
-#include "uart.h"
-#include "hardware.h"
-#include "kalman.h"
-#include "comm_util_LL.h"
-
-#define CMD_MAX_PERIOD 100 // in [ms] ==> 10Hz
-
-#define LAND_THRUST_DECREASE_STEP    0.01      // while landing, decrease thrust by this much
-#define LAND_THRUST_DECREASE_PERIOD  1      // while landing, decrease thrust every # of cycles
-
-typedef struct
-{
-  Position x;     // x position, in m
-  Position y;     // y position, in m
-  Position z;     // z position, in m
-
-  Velocity vx;    // x velocity, in m/sec
-  Velocity vy;    // y velocity, in m/sec
-  Velocity vz;    // y velocity, in m/sec
-
-  Angle roll;  // roll  orientation, in rad
-  Angle pitch; // pitch orientation, in rad
-  Angle yaw;   // yaw   orientation, in rad
-} MAV_POSE_SI;
-
-typedef struct
-{
-  Angle cmd_roll;      // roll  ,    in rad/....
-  Angle cmd_pitch;     // pitch ,    in rad
-  AngVelocity cmd_yaw_rate;  // yaw_rate , in rad/s
-  Thrust cmd_thrust;    // thrust,    in %      [0, 100]
-
-} MAV_CTRL_CMD;
-
-typedef struct
-{
-  Position x;     // desired x position, in mm
-  Position y;     // desired y position, in mm
-  Position z;     // desired z position, in mm
-
-  Velocity vx;    // desired x velocity, in mm/sec
-  Velocity vy;    // desired y velocity, in mm/sec
-
-  Angle yaw;   // desired yaw   orientation, in deg/100, [0, 36000)
-} MAV_DES_POSE;
-
-extern void SDK_mainloop(void);
-
-void sdkInit(void);
-
-inline void writeCommand(short pitch, short roll, short yaw, short thrust, short ctrl, short enable);
-inline void sendImuData(void);
-inline void sendRcData(void);
-inline void sendFlightStateData(void);
-inline void sendMavPoseData(void);
-inline void sendStatusData(void);
-inline void sendCtrlDebugData(void);
-
-inline unsigned short isSerialEnabled(void);
-inline void feedbackBeep(void);
-inline void estop(void);
-
-inline void processKF(void);
-inline void processMotorStateChanges(void);
-inline void processFlightActionRequests(void);
-inline void processEngageDisengageTimeouts(void);
-inline void processLandingThrust(void);
-inline void processMotorCommands(void);
-inline void processSendData(void);
-
-/// adjusts HLP time to host PC time
-/***
- * Timestamped packets get send around every 2 s to average the transmission delay.
- * Corrects at max 500 us per second. If the time offset is large, the server (host PC)
- * time is taken directly and synchronization starts from that time.
- */
-inline void synchronizeTime(void);
-
-/// gets called every sdk loops. Currently, only checks for packets from the PC and starts autobaud in case there wwas no communication in the last 10 s
-//inline void watchdog(void);
-
-/// checks if a packet has to be sent
-inline int checkTxPeriod(uint16_t period, uint16_t phase);
-
-struct WO_SDK_STRUCT
-{
-  unsigned char ctrl_mode;
-  //0x00: "standard scientific interface" => send R/C stick commands to LL
-  //0x01:	direct motor control
-  //0x02: waypoint control (not yet implemented)
-
-  unsigned char ctrl_enabled; 
-  //0x00: Control commands are ignored by LL processor
-  //0x01: Control commands are accepted by LL processor
-};
-extern struct WO_SDK_STRUCT WO_SDK;
-
-struct RO_RC_DATA
-{
-  unsigned short channel[8];
-  /*
-   * channel[0]: Pitch
-   * channel[1]: Roll
-   * channel[2]: Thrust
-   * channel[3]: Yaw
-   * channel[4]: Serial interface enable/disable
-   * channel[5]: manual / height control / GPS + height control
-   *
-   * range of each channel: 0..4095
-   */
-};
-extern struct RO_RC_DATA RO_RC_Data;
-
-struct WO_DIRECT_MOTOR_CONTROL
-{
-  unsigned char pitch;
-  unsigned char roll;
-  unsigned char yaw;
-  unsigned char thrust;
-
-  /*
-   * commands will be directly interpreted by the mixer
-   * running on each of the motor controllers
-   *
-   * range (pitch, roll, yaw commands): 0..200 = - 100..+100 %
-   * range of thrust command: 0..200 = 0..100 %
-   */
-
-};
-extern struct WO_DIRECT_MOTOR_CONTROL WO_Direct_Motor_Control;
-
-struct WO_CTRL_INPUT
-{ //serial commands (= Scientific Interface)
-  short pitch; //Pitch input: -2047..+2047 (0=neutral)
-  short roll; //Roll input: -2047..+2047	(0=neutral)
-  short yaw; //(=R/C Stick input) -2047..+2047 (0=neutral)
-  short thrust; //Collective: 0..4095 = 0..100%
-  short ctrl; /*control byte:
-   bit 0: pitch control enabled
-   bit 1: roll control enabled
-   bit 2: yaw control enabled
-   bit 3: thrust control enabled
-   bit 4: Height control enabled
-   bit 5: GPS position control enabled
-   */
-};
-extern struct WO_CTRL_INPUT WO_CTRL_Input;
-
-#endif // SDK_H
diff --git a/ccny_asctec_firmware/include/ccny_asctec_firmware/ssp.h b/ccny_asctec_firmware/include/ccny_asctec_firmware/ssp.h
deleted file mode 100644
index 51871aa..0000000
--- a/ccny_asctec_firmware/include/ccny_asctec_firmware/ssp.h
+++ /dev/null
@@ -1,71 +0,0 @@
-/*****************************************************************************
- *   ssp.h:  Header file for Philips LPC214x Family Microprocessors
- *
- *   Copyright(C) 2006, Philips Semiconductor
- *   All rights reserved.
- *
- *   History
- *   2005.10.01  ver 1.00    Prelimnary version, first Release
- *
-******************************************************************************/
-#ifndef __SSP_H__
-#define __SSP_H__
-
-volatile unsigned int SSP_trans_cnt;
-
-/* SPI read and write buffer size */
-#define FIFOSIZE	8
-	
-/* SPI Status register */
-#define SSPSR_TFE	1 << 0
-#define SSPSR_TNF	1 << 1 
-#define SSPSR_RNE	1 << 2
-#define SSPSR_RFF	1 << 3 
-#define SSPSR_BSY	1 << 4
-
-/* SPI 1 CR0 register */
-#define SSPCR0_DSS	1 << 0
-#define SSPCR0_FRF	1 << 4
-#define SSPCR0_CPOL	1 << 6
-#define SSPCR0_CPHA	1 << 7
-#define SSPCR0_SCR	1 << 8
-
-/* SPI 1 CR1 register */
-#define SSPCR1_LBM	1 << 0
-#define SSPCR1_SSE	1 << 1
-#define SSPCR1_MS	1 << 2
-#define SSPCR1_SOD	1 << 3
-
-/* SPI 1 Interrupt Mask Set/Clear register */
-#define SSPIMSC_RORIM	1 << 0
-#define SSPIMSC_RTIM	1 << 1
-#define SSPIMSC_RXIM	1 << 2
-#define SSPIMSC_TXIM	1 << 3
-
-/* SPI 1 Interrupt Status register */
-#define SSPRIS_RORRIS	1 << 0
-#define SSPRIS_RTRIS	1 << 1
-#define SSPRIS_RXRIS	1 << 2
-#define SSPRIS_TXRIS	1 << 3
-
-/* SPI 1 Masked Interrupt register */
-#define SSPMIS_RORMIS	1 << 0
-#define SSPMIS_RTMIS	1 << 1
-#define SSPMIS_RXMIS	1 << 2
-#define SSPMIS_TXMIS	1 << 3
-
-/* SPI 1 Interrupt clear register */
-#define SSPICR_RORIC	1 << 0
-#define SSPICR_RTIC	1 << 1
-
-extern void SSPHandler (void) __irq;
-int LL_write(unsigned char *, unsigned short, unsigned char);
-void LL_write_init(void);
-
-unsigned char IMU_CalcData_updated;
-
-#endif  /* __SSP_H__ */
-/*****************************************************************************
-**                            End Of File
-******************************************************************************/
-
diff --git a/ccny_asctec_firmware/include/ccny_asctec_firmware/system.h b/ccny_asctec_firmware/include/ccny_asctec_firmware/system.h
deleted file mode 100644
index e798e33..0000000
--- a/ccny_asctec_firmware/include/ccny_asctec_firmware/system.h
+++ /dev/null
@@ -1,103 +0,0 @@
-#ifndef SYSTEM_H_
-#define SYSTEM_H_
-
-extern unsigned int processorClockFrequency(void);
-extern unsigned int peripheralClockFrequency(void);
-extern void delay(int);
-extern void init(void);
-extern void pll_init(void);
-extern void pll_feed(void);
-extern void init_timer0(void);
-extern void init_timer1(void);
-extern void init_interrupts(void);
-extern void init_ports(void);
-extern void init_spi(void);
-extern void init_pwm(void);
-extern void init_get_calibdata_from_flash(void);
-extern void write_calibdata_to_flash(void);
-extern void init_spi1(void);
-extern void SPI1Send(char *, unsigned int, unsigned char);
-extern void PWM_Init( void );
-extern void SPI_get_data(unsigned int);
-
-extern unsigned char CAM_Commands_received;
-
-struct HL_STATUS {
-      short battery_voltage_1;
-      short battery_voltage_2;
-      
-      short up_time; 
-      short flight_time;
-      
-      int latitude;
-      int longitude;
-      
-      short status;
-      short cpu_load;
-      short yawenabled;
-      short chksum_error;
-};
-
-extern struct HL_STATUS HL_Status;
-
-
-//PWM defines
-#define PWM_CYCLE		1200
-#define PWM_OFFSET		200
-
-#define MR0_INT			1 << 0
-#define MR1_INT			1 << 1
-#define MR2_INT			1 << 2
-#define MR3_INT			1 << 3
-#define MR4_INT			1 << 8
-#define MR5_INT			1 << 9
-#define MR6_INT			1 << 10
-
-#define TCR_CNT_EN		0x00000001
-#define TCR_RESET		0x00000002
-#define TCR_PWM_EN		0x00000008
-
-#define PWMMR0I			1 << 0
-#define PWMMR0R			1 << 1
-#define PWMMR0S			1 << 2
-#define PWMMR1I			1 << 3
-#define PWMMR1R			1 << 4
-#define PWMMR1S			1 << 5
-#define PWMMR2I			1 << 6
-#define PWMMR2R			1 << 7
-#define PWMMR2S			1 << 8
-#define PWMMR3I			1 << 9
-#define PWMMR3R			1 << 10
-#define PWMMR3S			1 << 11
-#define PWMMR4I			1 << 12
-#define PWMMR4R			1 << 13
-#define PWMMR4S			1 << 14
-#define PWMMR5I			1 << 15
-#define PWMMR5R			1 << 16
-#define PWMMR5S			1 << 17
-#define PWMMR6I			1 << 18
-#define PWMMR6R			1 << 19
-#define PWMMR6S			1 << 20
-
-#define PWMSEL2			1 << 2
-#define PWMSEL3			1 << 3
-#define PWMSEL4			1 << 4
-#define PWMSEL5			1 << 5
-#define PWMSEL6			1 << 6
-#define PWMENA1			1 << 9
-#define PWMENA2			1 << 10
-#define PWMENA3			1 << 11
-#define PWMENA4			1 << 12
-#define PWMENA5			1 << 13
-#define PWMENA6			1 << 14
-
-#define LER0_EN			1 << 0
-#define LER1_EN			1 << 1
-#define LER2_EN			1 << 2
-#define LER3_EN			1 << 3
-#define LER4_EN			1 << 4
-#define LER5_EN			1 << 5
-#define LER6_EN			1 << 6
-
-#endif /*SYSTEM_H_*/
-
diff --git a/ccny_asctec_firmware/include/ccny_asctec_firmware/types.h b/ccny_asctec_firmware/include/ccny_asctec_firmware/types.h
deleted file mode 100644
index 97bd95e..0000000
--- a/ccny_asctec_firmware/include/ccny_asctec_firmware/types.h
+++ /dev/null
@@ -1,43 +0,0 @@
-/****************************************************************************
-*
-*   Copyright (c) 2006 Carrick Detweiler
-*                      and Massachusetts Institute of Technology
-*
-*   This program is free software; you can redistribute it and/or modify
-*   it under the terms of the GNU General Public License as published by
-*   the Free Software Foundation; either version 2 of the License, or
-*   (at your option) any later version.
-*
-*   This program is distributed in the hope that it will be useful,
-*   but WITHOUT ANY WARRANTY; without even the implied warranty of
-*   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-*   GNU General Public License for more details.
-*
-*   You should have received a copy of the GNU General Public License
-*   along with this program; if not, write to the Free Software
-*   Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
-*
-*   $Id: types.h 142 2007-01-05 17:10:44Z carrick $
-****************************************************************************/
-
-
-#if !defined( TYPES_H )
-#define TYPES_H
-
-/**
- * Different types that are needed.  It is assumed that the type is
- * signed unless they are eu types in which case they should be
- * unsigned.  Ideally (perhaps required?) that they have they same bit
- * length as indicated (eg uint8_t is an unsigned 8-bit type).
- **/
-#define eint8 signed char
-#define euint8 unsigned char
-#define eint16 signed short
-#define euint16 unsigned short
-#define eint32 signed int
-#define euint32 unsigned int
-#define echar char
-#define euchar unsigned char
-
-
-#endif /* TYPES_H */
diff --git a/ccny_asctec_firmware/include/ccny_asctec_firmware/uart.h b/ccny_asctec_firmware/include/ccny_asctec_firmware/uart.h
deleted file mode 100644
index 9e07df4..0000000
--- a/ccny_asctec_firmware/include/ccny_asctec_firmware/uart.h
+++ /dev/null
@@ -1,76 +0,0 @@
-#ifndef __UART_H
-#define __UART_H
-
-#include <inttypes.h>
-#include <mav_common/comm_packets.h>
-
-extern void UARTInitialize(unsigned int);
-extern void UARTWriteChar(unsigned char);
-extern unsigned char UARTReadChar(void);
-extern void __putchar(int);
-extern void UART_send(char *, unsigned char);
-extern void UART_send_ringbuffer(void);
-extern int ringbuffer(unsigned char, unsigned char*, unsigned int);
-
-void startAutoBaud(void);
-volatile extern char autobaud_in_progress;
-
-inline int writePacket2Ringbuffer(uint8_t descriptor, void * data, uint8_t length);
-extern void uart0ISR(void);
-
-extern uint16_t crc16(void *, uint16_t count, uint16_t prev_crc);
-extern uint16_t crc_update(uint16_t, uint8_t);
-
-#define RBREAD 0
-#define RBWRITE 1
-#define RBFREE  2 
-#define RINGBUFFERSIZE	384
-
-int UART0_txEmpty(void);
-void UART0_rxFlush(void);
-void UART0_txFlush(void);
-uint8_t UART0_writeFifo(void * data, uint32_t length);
-
-// this has to be 2^n !!!
-#define UART0_RX_BUFFERSIZE 512
-#define UART0_TX_BUFFERSIZE 512
-
-// not more than 64 different packettypes
-#define PACKET_INFO_SIZE 64
-
-typedef struct
-{
-  uint8_t descriptor;
-  void * data;
-  uint8_t updated;
-} PacketInfo;
-
-extern volatile unsigned int UART_rxPacketCount;
-extern volatile unsigned int UART_rxGoodPacketCount;
-
-typedef struct
-{
-  uint8_t *buffer;
-  uint8_t inUse;
-  uint32_t bufferSize;
-  uint32_t readIdx;
-  uint32_t writeIdx;
-  uint32_t tmp;
-  uint32_t mask;
-}volatile Fifo;
-
-extern short uart0_min_tx_buffer;
-extern short uart0_min_rx_buffer;
-
-void Fifo_initialize(Fifo * fifo, uint8_t * buffer, uint32_t bufferSize);
-inline uint8_t Fifo_writeByte(Fifo * fifo, uint8_t byte);
-inline uint8_t Fifo_writeBlock(Fifo * fifo, void *data, uint32_t length);
-inline uint8_t Fifo_readByte(Fifo * fifo, uint8_t * byte);
-inline uint16_t Fifo_availableMemory(Fifo * fifo);
-inline void Fifo_reset(Fifo * fifo);
-
-void parseRxFifo(void);
-
-PacketInfo* registerPacket(uint8_t descriptor, void * data);
-
-#endif //__UART_H
diff --git a/ccny_asctec_firmware/include/ccny_asctec_firmware/uart1.h b/ccny_asctec_firmware/include/ccny_asctec_firmware/uart1.h
deleted file mode 100644
index 5c26ac8..0000000
--- a/ccny_asctec_firmware/include/ccny_asctec_firmware/uart1.h
+++ /dev/null
@@ -1,35 +0,0 @@
-
-#ifndef __UART1_H
-#define __UART1_H
-
-extern void UART1Initialize(unsigned int baud);
-
-extern void UART1WriteChar(unsigned char);
-extern unsigned char UART1ReadChar(void);
-extern void UART1_send(unsigned char *, unsigned char);
-extern void UART1_send_ringbuffer(void);
-extern int ringbuffer1(unsigned char, unsigned char*, unsigned int);
-extern void uart1ISR(void);
-extern void GPS_configure(void);
-
-extern unsigned char send_buffer[16];
-extern unsigned char chksum_trigger;
-extern unsigned char UART_CalibDoneFlag;
-extern unsigned char trigger_transmission;
-extern unsigned char transmission1_running;
-
-#define RBREAD 0
-#define RBWRITE 1
-#define RBFREE  2 
-#define RINGBUFFERSIZE	384
-
-#define RX_IDLE 0
-#define RX_ACTSYNC1 1
-#define RX_ACTSYNC2 2
-#define RX_ACTDATA 3
-#define RX_ACTCHKSUM 4
-
-#define GPSCONF_TIMEOUT 200
-
-#endif //__UART_H
-
diff --git a/ccny_asctec_firmware/include/ccny_asctec_firmware/util.h b/ccny_asctec_firmware/include/ccny_asctec_firmware/util.h
deleted file mode 100644
index 2d09d14..0000000
--- a/ccny_asctec_firmware/include/ccny_asctec_firmware/util.h
+++ /dev/null
@@ -1,11 +0,0 @@
-#ifndef UTIL_H
-#define UTIL_H
-
-#include <stdint.h>
-#include "LPC214x.h"
-
-extern volatile int64_t g_timestamp;
-
-void wait(int usec);
-
-#endif // UTIL_H
diff --git a/ccny_asctec_firmware/main.bin b/ccny_asctec_firmware/main.bin
deleted file mode 100644
index 7f5f313..0000000
Binary files a/ccny_asctec_firmware/main.bin and /dev/null differ
diff --git a/ccny_asctec_firmware/main.elf b/ccny_asctec_firmware/main.elf
deleted file mode 100644
index 6fabc59..0000000
Binary files a/ccny_asctec_firmware/main.elf and /dev/null differ
diff --git a/ccny_asctec_firmware/main.hex b/ccny_asctec_firmware/main.hex
deleted file mode 100644
index c5513bb..0000000
--- a/ccny_asctec_firmware/main.hex
+++ /dev/null
@@ -1,5594 +0,0 @@
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-:105BA000640600406C0600406C060040740600402D
-:105BB000740600407C0600407C06004084060040DD
-:105BC000840600408C0600408C060040940600408D
-:105BD000940600409C0600409C060040A40600403D
-:105BE000A4060040AC060040AC060040B4060040ED
-:105BF000B4060040BC060040BC060040C40600409D
-:105C0000C4060040CC060040CC060040D40600404C
-:105C1000D4060040DC060040DC060040E4060040FC
-:105C2000E4060040EC060040EC060040F4060040AC
-:105C3000F4060040FC060040FC060040040700405B
-:105C4000040700400C0700400C0700401407004008
-:105C5000140700401C0700401C07004024070040B8
-:105C6000240700402C0700402C0700403407004068
-:105C7000340700403C0700403C0700404407004018
-:105C8000440700404C0700404C07004054070040C8
-:105C9000540700405C0700405C0700406407004078
-:105CA000640700406C0700406C0700407407004028
-:105CB000740700407C0700407C07004084070040D8
-:105CC000840700408C0700408C0700409407004088
-:105CD000940700409C0700409C070040A407004038
-:105CE000A4070040AC070040AC070040B4070040E8
-:105CF000B4070040BC070040BC070040C407004098
-:105D0000C4070040CC070040CC070040D407004047
-:105D1000D4070040DC070040DC070040E4070040F7
-:105D2000E4070040EC070040EC070040F4070040A7
-:105D3000F4070040FC070040FC0700400408004056
-:105D4000040800400C0800400C0800401408004003
-:105D5000140800401C0800401C08004024080040B3
-:105D6000240800402C0800402C08004000000200DD
-:045D7000FFFFFFFF33
-:00000001FF
diff --git a/ccny_asctec_firmware/main.lss b/ccny_asctec_firmware/main.lss
deleted file mode 100644
index ef4d927..0000000
--- a/ccny_asctec_firmware/main.lss
+++ /dev/null
@@ -1,28608 +0,0 @@
-
-main.elf:     file format elf32-littlearm
-
-Sections:
-Idx Name          Size      VMA       LMA       File off  Algn
-  0 .text         00015530  00000000  00000000  00008000  2**2
-                  CONTENTS, ALLOC, LOAD, READONLY, CODE
-  1 .data         00000844  40000000  00015530  00020000  2**2
-                  CONTENTS, ALLOC, LOAD, DATA
-  2 .bss          000016d4  40000844  40000844  00020844  2**2
-                  ALLOC
-  3 .stack        00001a00  40002000  40002000  00020850  2**4
-                  CONTENTS
-  4 .comment      000007b3  00000000  00000000  00022250  2**0
-                  CONTENTS, READONLY
-  5 .debug_aranges 000001e0  00000000  00000000  00022a08  2**3
-                  CONTENTS, READONLY, DEBUGGING
-  6 .debug_pubnames 0000003f  00000000  00000000  00022be8  2**0
-                  CONTENTS, READONLY, DEBUGGING
-  7 .debug_info   00000e61  00000000  00000000  00022c27  2**0
-                  CONTENTS, READONLY, DEBUGGING
-  8 .debug_abbrev 000002f3  00000000  00000000  00023a88  2**0
-                  CONTENTS, READONLY, DEBUGGING
-  9 .debug_line   00000b83  00000000  00000000  00023d7b  2**0
-                  CONTENTS, READONLY, DEBUGGING
- 10 .debug_frame  000000dc  00000000  00000000  00024900  2**2
-                  CONTENTS, READONLY, DEBUGGING
- 11 .debug_str    00000161  00000000  00000000  000249dc  2**0
-                  CONTENTS, READONLY, DEBUGGING
- 12 .debug_loc    00000cd9  00000000  00000000  00024b3d  2**0
-                  CONTENTS, READONLY, DEBUGGING
- 13 .debug_ranges 000001c0  00000000  00000000  00025816  2**0
-                  CONTENTS, READONLY, DEBUGGING
-Disassembly of section .text:
-
-00000000 <__Vectors>:
-       0:	e59ff018 	ldr	pc, [pc, #24]	; 20 <Reset_Addr>
-       4:	e59ff018 	ldr	pc, [pc, #24]	; 24 <Undef_Addr>
-       8:	e59ff018 	ldr	pc, [pc, #24]	; 28 <SWI_Addr>
-       c:	e59ff018 	ldr	pc, [pc, #24]	; 2c <PAbt_Addr>
-      10:	e59ff018 	ldr	pc, [pc, #24]	; 30 <DAbt_Addr>
-      14:	e1a00000 	nop			(mov r0,r0)
-      18:	e59ff018 	ldr	pc, [pc, #24]	; 38 <IRQ_Wrapper_Addr>
-      1c:	e59ff018 	ldr	pc, [pc, #24]	; 3c <FIQ_Addr>
-
-00000020 <Reset_Addr>:
-      20:	00000168 	andeq	r0, r0, r8, ror #2
-
-00000024 <Undef_Addr>:
-      24:	00000040 	andeq	r0, r0, r0, asr #32
-
-00000028 <SWI_Addr>:
-      28:	00000098 	muleq	r0, r8, r0
-
-0000002c <PAbt_Addr>:
-      2c:	00000044 	andeq	r0, r0, r4, asr #32
-
-00000030 <DAbt_Addr>:
-      30:	00000048 	andeq	r0, r0, r8, asr #32
-      34:	00000000 	andeq	r0, r0, r0
-
-00000038 <IRQ_Wrapper_Addr>:
-      38:	00000050 	andeq	r0, r0, r0, asr r0
-
-0000003c <FIQ_Addr>:
-      3c:	0000004c 	andeq	r0, r0, ip, asr #32
-
-00000040 <Undef_Handler>:
-      40:	eafffffe 	b	40 <Undef_Handler>
-
-00000044 <PAbt_Handler>:
-      44:	eafffffe 	b	44 <PAbt_Handler>
-
-00000048 <DAbt_Handler>:
-      48:	eafffffe 	b	48 <DAbt_Handler>
-
-0000004c <FIQ_Handler>:
-      4c:	eafffffe 	b	4c <FIQ_Handler>
-
-00000050 <__IRQ_Wrapper>:
-      50:	e24ee004 	sub	lr, lr, #4	; 0x4
-      54:	e92d4000 	stmdb	sp!, {lr}
-      58:	e14fe000 	mrs	lr, SPSR
-      5c:	e92d4000 	stmdb	sp!, {lr}
-      60:	e92d0001 	stmdb	sp!, {r0}
-      64:	e59fe028 	ldr	lr, [pc, #40]	; 94 <.text+0x94>
-      68:	e59e0030 	ldr	r0, [lr, #48]
-      6c:	e321f093 	msr	CPSR_c, #147	; 0x93
-      70:	e92d5ffe 	stmdb	sp!, {r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp, ip, lr}
-      74:	e1a0e00f 	mov	lr, pc
-      78:	e12fff10 	bx	r0
-      7c:	e8bd5ffe 	ldmia	sp!, {r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp, ip, lr}
-      80:	e321f092 	msr	CPSR_c, #146	; 0x92
-      84:	e8bd0001 	ldmia	sp!, {r0}
-      88:	e8bd4000 	ldmia	sp!, {lr}
-      8c:	e16ff00e 	msr	SPSR_fsxc, lr
-      90:	e8fd8000 	ldmia	sp!, {pc}^
-      94:	fffff000 	undefined instruction 0xfffff000
-
-00000098 <SoftwareInterrupt>:
-      98:	e92d4010 	stmdb	sp!, {r4, lr}
-      9c:	e14f4000 	mrs	r4, SPSR
-      a0:	e3140020 	tst	r4, #32	; 0x20
-      a4:	115e40b2 	ldrneh	r4, [lr, #-2]
-      a8:	13c44cff 	bicne	r4, r4, #65280	; 0xff00
-      ac:	051e4004 	ldreq	r4, [lr, #-4]
-      b0:	03c444ff 	biceq	r4, r4, #-16777216	; 0xff000000
-      b4:	e3540006 	cmp	r4, #6	; 0x6
-      b8:	979ff104 	ldrls	pc, [pc, r4, lsl #2]
-
-000000bc <SWIOutOfRange>:
-      bc:	eafffffe 	b	bc <SWIOutOfRange>
-
-000000c0 <SwiTableStart>:
-      c0:	000000dc 	ldreqd	r0, [r0], -ip
-      c4:	000000ec 	andeq	r0, r0, ip, ror #1
-      c8:	000000fc 	streqd	r0, [r0], -ip
-      cc:	00000110 	andeq	r0, r0, r0, lsl r1
-      d0:	00000124 	andeq	r0, r0, r4, lsr #2
-      d4:	0000012c 	andeq	r0, r0, ip, lsr #2
-      d8:	00000148 	andeq	r0, r0, r8, asr #2
-
-000000dc <IRQDisable>:
-      dc:	e14f0000 	mrs	r0, SPSR
-      e0:	e3804080 	orr	r4, r0, #128	; 0x80
-      e4:	e161f004 	msr	SPSR_c, r4
-      e8:	ea00001d 	b	164 <EndofSWI>
-
-000000ec <IRQEnable>:
-      ec:	e14f0000 	mrs	r0, SPSR
-      f0:	e3c04080 	bic	r4, r0, #128	; 0x80
-      f4:	e161f004 	msr	SPSR_c, r4
-      f8:	ea000019 	b	164 <EndofSWI>
-
-000000fc <FIQDisable>:
-      fc:	e14f0000 	mrs	r0, SPSR
-     100:	e3804040 	orr	r4, r0, #64	; 0x40
-     104:	e2000040 	and	r0, r0, #64	; 0x40
-     108:	e161f004 	msr	SPSR_c, r4
-     10c:	ea000014 	b	164 <EndofSWI>
-
-00000110 <FIQEnable>:
-     110:	e14f0000 	mrs	r0, SPSR
-     114:	e3c04040 	bic	r4, r0, #64	; 0x40
-     118:	e2000040 	and	r0, r0, #64	; 0x40
-     11c:	e161f004 	msr	SPSR_c, r4
-     120:	ea00000f 	b	164 <EndofSWI>
-
-00000124 <CPSRget>:
-     124:	e14f0000 	mrs	r0, SPSR
-     128:	ea00000d 	b	164 <EndofSWI>
-
-0000012c <IRQRestore>:
-     12c:	e14f4000 	mrs	r4, SPSR
-     130:	e2000080 	and	r0, r0, #128	; 0x80
-     134:	e3100080 	tst	r0, #128	; 0x80
-     138:	03c44080 	biceq	r4, r4, #128	; 0x80
-     13c:	13844080 	orrne	r4, r4, #128	; 0x80
-     140:	e161f004 	msr	SPSR_c, r4
-     144:	ea000006 	b	164 <EndofSWI>
-
-00000148 <FIQRestore>:
-     148:	e14f4000 	mrs	r4, SPSR
-     14c:	e2000040 	and	r0, r0, #64	; 0x40
-     150:	e3100040 	tst	r0, #64	; 0x40
-     154:	03c44040 	biceq	r4, r4, #64	; 0x40
-     158:	13844040 	orrne	r4, r4, #64	; 0x40
-     15c:	e161f004 	msr	SPSR_c, r4
-     160:	eaffffff 	b	164 <EndofSWI>
-
-00000164 <EndofSWI>:
-     164:	e8fd8010 	ldmia	sp!, {r4, pc}^
-
-00000168 <__startup>:
-     168:	e59f0128 	ldr	r0, [pc, #296]	; 298 <.text+0x298>
-     16c:	e3a01000 	mov	r1, #0	; 0x0
-     170:	e5801000 	str	r1, [r0]
-     174:	e59f0120 	ldr	r0, [pc, #288]	; 29c <.text+0x29c>
-     178:	e3a010aa 	mov	r1, #170	; 0xaa
-     17c:	e3a02055 	mov	r2, #85	; 0x55
-     180:	e3a03024 	mov	r3, #36	; 0x24
-     184:	e5803004 	str	r3, [r0, #4]
-     188:	e3a03001 	mov	r3, #1	; 0x1
-     18c:	e5803000 	str	r3, [r0]
-     190:	e580100c 	str	r1, [r0, #12]
-     194:	e580200c 	str	r2, [r0, #12]
-
-00000198 <PLL_Loop>:
-     198:	e5903008 	ldr	r3, [r0, #8]
-     19c:	e2133b01 	ands	r3, r3, #1024	; 0x400
-     1a0:	0afffffc 	beq	198 <PLL_Loop>
-     1a4:	e3a03003 	mov	r3, #3	; 0x3
-     1a8:	e5803000 	str	r3, [r0]
-     1ac:	e580100c 	str	r1, [r0, #12]
-     1b0:	e580200c 	str	r2, [r0, #12]
-     1b4:	e59f00e4 	ldr	r0, [pc, #228]	; 2a0 <.text+0x2a0>
-     1b8:	e3a01004 	mov	r1, #4	; 0x4
-     1bc:	e5801004 	str	r1, [r0, #4]
-     1c0:	e3a01002 	mov	r1, #2	; 0x2
-     1c4:	e5801000 	str	r1, [r0]
-     1c8:	e59f00d4 	ldr	r0, [pc, #212]	; 2a4 <.text+0x2a4>
-     1cc:	e321f0db 	msr	CPSR_c, #219	; 0xdb
-     1d0:	e1a0d000 	mov	sp, r0
-     1d4:	e2400080 	sub	r0, r0, #128	; 0x80
-     1d8:	e321f0d7 	msr	CPSR_c, #215	; 0xd7
-     1dc:	e1a0d000 	mov	sp, r0
-     1e0:	e2400080 	sub	r0, r0, #128	; 0x80
-     1e4:	e321f0d1 	msr	CPSR_c, #209	; 0xd1
-     1e8:	e1a0d000 	mov	sp, r0
-     1ec:	e2400080 	sub	r0, r0, #128	; 0x80
-     1f0:	e321f0d2 	msr	CPSR_c, #210	; 0xd2
-     1f4:	e1a0d000 	mov	sp, r0
-     1f8:	e2400080 	sub	r0, r0, #128	; 0x80
-     1fc:	e321f0d3 	msr	CPSR_c, #211	; 0xd3
-     200:	e1a0d000 	mov	sp, r0
-     204:	e2400b02 	sub	r0, r0, #2048	; 0x800
-     208:	e321f010 	msr	CPSR_c, #16	; 0x10
-     20c:	e1a0d000 	mov	sp, r0
-     210:	e59f1090 	ldr	r1, [pc, #144]	; 2a8 <.text+0x2a8>
-     214:	e59f2090 	ldr	r2, [pc, #144]	; 2ac <.text+0x2ac>
-     218:	e59f3090 	ldr	r3, [pc, #144]	; 2b0 <.text+0x2b0>
-     21c:	e1520003 	cmp	r2, r3
-     220:	0a000003 	beq	234 <DataIsEmpty>
-
-00000224 <LoopRel>:
-     224:	e1520003 	cmp	r2, r3
-     228:	34910004 	ldrcc	r0, [r1], #4
-     22c:	34820004 	strcc	r0, [r2], #4
-     230:	3afffffb 	bcc	224 <LoopRel>
-
-00000234 <DataIsEmpty>:
-     234:	e3a00000 	mov	r0, #0	; 0x0
-     238:	e59f1074 	ldr	r1, [pc, #116]	; 2b4 <.text+0x2b4>
-     23c:	e59f2074 	ldr	r2, [pc, #116]	; 2b8 <.text+0x2b8>
-     240:	e1510002 	cmp	r1, r2
-     244:	0a000002 	beq	254 <BSSIsEmpty>
-
-00000248 <LoopZI>:
-     248:	e1510002 	cmp	r1, r2
-     24c:	34810004 	strcc	r0, [r1], #4
-     250:	3afffffc 	bcc	248 <LoopZI>
-
-00000254 <BSSIsEmpty>:
-     254:	e59f0060 	ldr	r0, [pc, #96]	; 2bc <.text+0x2bc>
-     258:	e59f1060 	ldr	r1, [pc, #96]	; 2c0 <.text+0x2c0>
-
-0000025c <ctor_loop>:
-     25c:	e1500001 	cmp	r0, r1
-     260:	0a000005 	beq	27c <ctor_end>
-     264:	e4902004 	ldr	r2, [r0], #4
-     268:	e92d0003 	stmdb	sp!, {r0, r1}
-     26c:	e1a0e00f 	mov	lr, pc
-     270:	e1a0f002 	mov	pc, r2
-     274:	e8bd0003 	ldmia	sp!, {r0, r1}
-     278:	eafffff7 	b	25c <ctor_loop>
-
-0000027c <ctor_end>:
-     27c:	e59f0040 	ldr	r0, [pc, #64]	; 2c4 <.text+0x2c4>
-     280:	e3100001 	tst	r0, #1	; 0x1
-     284:	059fe03c 	ldreq	lr, [pc, #60]	; 2c8 <.text+0x2c8>
-     288:	159fe03c 	ldrne	lr, [pc, #60]	; 2cc <.text+0x2cc>
-     28c:	e12fff10 	bx	r0
-
-00000290 <__exit_ARM>:
-     290:	eafffffe 	b	290 <__exit_ARM>
-
-00000294 <__exit_THUMB>:
-     294:	e7fe      	b.n	294 <__exit_THUMB>
-     296:	0000      	lsls	r0, r0, #0
-     298:	c100      	stmia	r1!, {}
-     29a:	e01f      	b.n	2dc <FiqRestore+0x4>
-     29c:	c080      	stmia	r0!, {r7}
-     29e:	e01f      	b.n	2e0 <IntGetCPSR>
-     2a0:	c000      	stmia	r0!, {}
-     2a2:	e01f      	b.n	2e4 <IntGetCPSR+0x4>
-     2a4:	3a00      	subs	r2, #0
-     2a6:	4000      	ands	r0, r0
-     2a8:	5530      	strb	r0, [r6, r4]
-     2aa:	0001      	lsls	r1, r0, #0
-     2ac:	0000      	lsls	r0, r0, #0
-     2ae:	4000      	ands	r0, r0
-     2b0:	0844      	lsrs	r4, r0, #1
-     2b2:	4000      	ands	r0, r0
-     2b4:	0844      	lsrs	r4, r0, #1
-     2b6:	4000      	ands	r0, r0
-     2b8:	1f18      	subs	r0, r3, #4
-     2ba:	4000      	ands	r0, r0
-     2bc:	5530      	strb	r0, [r6, r4]
-     2be:	0001      	lsls	r1, r0, #0
-     2c0:	5530      	strb	r0, [r6, r4]
-     2c2:	0001      	lsls	r1, r0, #0
-     2c4:	6f18      	ldr	r0, [r3, #112]
-     2c6:	0000      	lsls	r0, r0, #0
-     2c8:	0290      	lsls	r0, r2, #10
-     2ca:	0000      	lsls	r0, r0, #0
-     2cc:	0294      	lsls	r4, r2, #10
-	...
-
-000002d0 <IntRestore>:
-     2d0:	ef000005 	svc	0x00000005
-     2d4:	e12fff1e 	bx	lr
-
-000002d8 <FiqRestore>:
-     2d8:	ef000006 	svc	0x00000006
-     2dc:	e12fff1e 	bx	lr
-
-000002e0 <IntGetCPSR>:
-     2e0:	ef000004 	svc	0x00000004
-     2e4:	e12fff1e 	bx	lr
-
-000002e8 <IntEnable>:
-     2e8:	ef000001 	svc	0x00000001
-     2ec:	e12fff1e 	bx	lr
-
-000002f0 <IntDisable>:
-     2f0:	ef000000 	svc	0x00000000
-     2f4:	e12fff1e 	bx	lr
-
-000002f8 <FiqEnable>:
-     2f8:	ef000003 	svc	0x00000003
-     2fc:	e12fff1e 	bx	lr
-
-00000300 <FiqDisable>:
-     300:	ef000002 	svc	0x00000002
-     304:	e12fff1e 	bx	lr
-
-00000308 <SSP_data_distribution_HL>:
-     308:	e92d4070 	stmdb	sp!, {r4, r5, r6, lr}
-     30c:	e59f510c 	ldr	r5, [pc, #268]	; 420 <.text+0x420>
-     310:	e1d530b0 	ldrh	r3, [r5]
-     314:	e3130008 	tst	r3, #8	; 0x8
-     318:	e2036003 	and	r6, r3, #3	; 0x3
-     31c:	159f3100 	ldrne	r3, [pc, #256]	; 424 <.text+0x424>
-     320:	13a02000 	movne	r2, #0	; 0x0
-     324:	15832000 	strne	r2, [r3]
-     328:	e1d510b6 	ldrh	r1, [r5, #6]
-     32c:	e1d530f2 	ldrsh	r3, [r5, #2]
-     330:	e1d520f4 	ldrsh	r2, [r5, #4]
-     334:	e59f40ec 	ldr	r4, [pc, #236]	; 428 <.text+0x428>
-     338:	e1d5e0fc 	ldrsh	lr, [r5, #12]
-     33c:	e0833103 	add	r3, r3, r3, lsl #2
-     340:	e0822102 	add	r2, r2, r2, lsl #2
-     344:	e0811101 	add	r1, r1, r1, lsl #2
-     348:	e1d500f8 	ldrsh	r0, [r5, #8]
-     34c:	e1d5c0fa 	ldrsh	ip, [r5, #10]
-     350:	e1a03083 	mov	r3, r3, lsl #1
-     354:	e1a02082 	mov	r2, r2, lsl #1
-     358:	e1a01081 	mov	r1, r1, lsl #1
-     35c:	e3560000 	cmp	r6, #0	; 0x0
-     360:	e584e014 	str	lr, [r4, #20]
-     364:	e5843000 	str	r3, [r4]
-     368:	e5842004 	str	r2, [r4, #4]
-     36c:	e5841008 	str	r1, [r4, #8]
-     370:	e584000c 	str	r0, [r4, #12]
-     374:	e584c010 	str	ip, [r4, #16]
-     378:	e1a0e004 	mov	lr, r4
-     37c:	1a000017 	bne	3e0 <SSP_data_distribution_HL+0xd8>
-     380:	e59f10a4 	ldr	r1, [pc, #164]	; 42c <.text+0x42c>
-     384:	e1a02005 	mov	r2, r5
-     388:	e2850008 	add	r0, r5, #8	; 0x8
-     38c:	e1a0c005 	mov	ip, r5
-     390:	e5d2300e 	ldrb	r3, [r2, #14]
-     394:	e2822001 	add	r2, r2, #1	; 0x1
-     398:	e1a03203 	mov	r3, r3, lsl #4
-     39c:	e1520000 	cmp	r2, r0
-     3a0:	e0c130b2 	strh	r3, [r1], #2
-     3a4:	1afffff9 	bne	390 <SSP_data_distribution_HL+0x88>
-     3a8:	e1dc32f4 	ldrsh	r3, [ip, #36]
-     3ac:	e1dc22f0 	ldrsh	r2, [ip, #32]
-     3b0:	e1dc12f2 	ldrsh	r1, [ip, #34]
-     3b4:	e0822102 	add	r2, r2, r2, lsl #2
-     3b8:	e0811101 	add	r1, r1, r1, lsl #2
-     3bc:	e0833103 	add	r3, r3, r3, lsl #2
-     3c0:	e1a02082 	mov	r2, r2, lsl #1
-     3c4:	e1a01081 	mov	r1, r1, lsl #1
-     3c8:	e1a03083 	mov	r3, r3, lsl #1
-     3cc:	e1ce31bc 	strh	r3, [lr, #28]
-     3d0:	e1ce21b8 	strh	r2, [lr, #24]
-     3d4:	e1ce11ba 	strh	r1, [lr, #26]
-     3d8:	e8bd4070 	ldmia	sp!, {r4, r5, r6, lr}
-     3dc:	e12fff1e 	bx	lr
-     3e0:	e3560001 	cmp	r6, #1	; 0x1
-     3e4:	0a000008 	beq	40c <PLLSTAT_PLOCK+0xc>
-     3e8:	e3560002 	cmp	r6, #2	; 0x2
-     3ec:	1afffff9 	bne	3d8 <SSP_data_distribution_HL+0xd0>
-     3f0:	e1d534f6 	ldrsh	r3, [r5, #70]
-     3f4:	e1d524f2 	ldrsh	r2, [r5, #66]
-     3f8:	e1d514f4 	ldrsh	r1, [r5, #68]
-     3fc:	e5843038 	str	r3, [r4, #56]
-     400:	e5842030 	str	r2, [r4, #48]
-     404:	e5841034 	str	r1, [r4, #52]
-     408:	eafffff2 	b	3d8 <SSP_data_distribution_HL+0xd0>
-     40c:	e1d534f0 	ldrsh	r3, [r5, #64]
-     410:	e595203c 	ldr	r2, [r5, #60]
-     414:	e5843050 	str	r3, [r4, #80]
-     418:	e584204c 	str	r2, [r4, #76]
-     41c:	eaffffed 	b	3d8 <SSP_data_distribution_HL+0xd0>
-     420:	40000b34 	andmi	r0, r0, r4, lsr fp
-     424:	40000854 	andmi	r0, r0, r4, asr r8
-     428:	4000130c 	andmi	r1, r0, ip, lsl #6
-     42c:	40001098 	mulmi	r0, r8, r0
-
-00000430 <LL_write_ctrl_data>:
-     430:	e31000ff 	tst	r0, #255	; 0xff
-     434:	e92d4030 	stmdb	sp!, {r4, r5, lr}
-     438:	e59fc0f8 	ldr	ip, [pc, #248]	; 538 <.text+0x538>
-     43c:	e59f50f8 	ldr	r5, [pc, #248]	; 53c <.text+0x53c>
-     440:	e3e03c55 	mvn	r3, #21760	; 0x5500
-     444:	159f00f4 	ldrne	r0, [pc, #244]	; 540 <.text+0x540>
-     448:	e3a0102a 	mov	r1, #42	; 0x2a
-     44c:	e2433055 	sub	r3, r3, #85	; 0x55
-     450:	e3a0203e 	mov	r2, #62	; 0x3e
-     454:	e5c51001 	strb	r1, [r5, #1]
-     458:	e5c52000 	strb	r2, [r5]
-     45c:	e1cc30b0 	strh	r3, [ip]
-     460:	11a01005 	movne	r1, r5
-     464:	1280e014 	addne	lr, r0, #20	; 0x14
-     468:	1a000019 	bne	4d4 <LL_write_ctrl_data+0xa4>
-     46c:	e59f00cc 	ldr	r0, [pc, #204]	; 540 <.text+0x540>
-     470:	e1a01005 	mov	r1, r5
-     474:	e280e026 	add	lr, r0, #38	; 0x26
-     478:	e4d02001 	ldrb	r2, [r0], #1
-     47c:	e1dc30b0 	ldrh	r3, [ip]
-     480:	e0833002 	add	r3, r3, r2
-     484:	e1a03803 	mov	r3, r3, lsl #16
-     488:	e1a03823 	mov	r3, r3, lsr #16
-     48c:	e15e0000 	cmp	lr, r0
-     490:	e5c12002 	strb	r2, [r1, #2]
-     494:	e1cc30b0 	strh	r3, [ip]
-     498:	e2811001 	add	r1, r1, #1	; 0x1
-     49c:	1afffff5 	bne	478 <LL_write_ctrl_data+0x48>
-     4a0:	e1dc00b0 	ldrh	r0, [ip]
-     4a4:	e1dc30b0 	ldrh	r3, [ip]
-     4a8:	e1a03423 	mov	r3, r3, lsr #8
-     4ac:	e5c53029 	strb	r3, [r5, #41]
-     4b0:	e59f308c 	ldr	r3, [pc, #140]	; 544 <.text+0x544>
-     4b4:	e3a0202a 	mov	r2, #42	; 0x2a
-     4b8:	e5832000 	str	r2, [r3]
-     4bc:	e59f3084 	ldr	r3, [pc, #132]	; 548 <.text+0x548>
-     4c0:	e3a01000 	mov	r1, #0	; 0x0
-     4c4:	e5c31000 	strb	r1, [r3]
-     4c8:	e5c50028 	strb	r0, [r5, #40]
-     4cc:	e8bd4030 	ldmia	sp!, {r4, r5, lr}
-     4d0:	e12fff1e 	bx	lr
-     4d4:	e4d02001 	ldrb	r2, [r0], #1
-     4d8:	e1dc30b0 	ldrh	r3, [ip]
-     4dc:	e0833002 	add	r3, r3, r2
-     4e0:	e1a03803 	mov	r3, r3, lsl #16
-     4e4:	e1a03823 	mov	r3, r3, lsr #16
-     4e8:	e150000e 	cmp	r0, lr
-     4ec:	e5c12002 	strb	r2, [r1, #2]
-     4f0:	e1cc30b0 	strh	r3, [ip]
-     4f4:	e2811001 	add	r1, r1, #1	; 0x1
-     4f8:	1afffff5 	bne	4d4 <LL_write_ctrl_data+0xa4>
-     4fc:	e59fe038 	ldr	lr, [pc, #56]	; 53c <.text+0x53c>
-     500:	e2804025 	add	r4, r0, #37	; 0x25
-     504:	e2801013 	add	r1, r0, #19	; 0x13
-     508:	e5512001 	ldrb	r2, [r1, #-1]
-     50c:	e1dc30b0 	ldrh	r3, [ip]
-     510:	e0833002 	add	r3, r3, r2
-     514:	e1a03803 	mov	r3, r3, lsl #16
-     518:	e2811001 	add	r1, r1, #1	; 0x1
-     51c:	e1a03823 	mov	r3, r3, lsr #16
-     520:	e1510004 	cmp	r1, r4
-     524:	e5ce2016 	strb	r2, [lr, #22]
-     528:	e1cc30b0 	strh	r3, [ip]
-     52c:	e28ee001 	add	lr, lr, #1	; 0x1
-     530:	1afffff4 	bne	508 <LL_write_ctrl_data+0xd8>
-     534:	eaffffd9 	b	4a0 <LL_write_ctrl_data+0x70>
-     538:	4000084e 	andmi	r0, r0, lr, asr #16
-     53c:	40001e18 	andmi	r1, r0, r8, lsl lr
-     540:	40000cb8 	strmih	r0, [r0], -r8
-     544:	40001e10 	andmi	r1, r0, r0, lsl lr
-     548:	4000001b 	andmi	r0, r0, fp, lsl r0
-
-0000054c <HL2LL_write_cycle>:
-     54c:	e92d40f0 	stmdb	sp!, {r4, r5, r6, r7, lr}
-     550:	e59f31a8 	ldr	r3, [pc, #424]	; 700 <.text+0x700>
-     554:	e5d30000 	ldrb	r0, [r3]
-     558:	e3500000 	cmp	r0, #0	; 0x0
-     55c:	0a000037 	beq	640 <HL2LL_write_cycle+0xf4>
-     560:	e59f319c 	ldr	r3, [pc, #412]	; 704 <.text+0x704>
-     564:	e59f719c 	ldr	r7, [pc, #412]	; 708 <.text+0x708>
-     568:	e5932000 	ldr	r2, [r3]
-     56c:	e5d76000 	ldrb	r6, [r7]
-     570:	e59f5194 	ldr	r5, [pc, #404]	; 70c <.text+0x70c>
-     574:	e3520000 	cmp	r2, #0	; 0x0
-     578:	e59f2190 	ldr	r2, [pc, #400]	; 710 <.text+0x710>
-     57c:	13863008 	orrne	r3, r6, #8	; 0x8
-     580:	e1c560b0 	strh	r6, [r5]
-     584:	11c530b0 	strneh	r3, [r5]
-     588:	e5d23001 	ldrb	r3, [r2, #1]
-     58c:	e3530000 	cmp	r3, #0	; 0x0
-     590:	11d530b0 	ldrneh	r3, [r5]
-     594:	01d530b0 	ldreqh	r3, [r5]
-     598:	13833010 	orrne	r3, r3, #16	; 0x10
-     59c:	03c33010 	biceq	r3, r3, #16	; 0x10
-     5a0:	11c530b0 	strneh	r3, [r5]
-     5a4:	01c530b0 	streqh	r3, [r5]
-     5a8:	e5d23000 	ldrb	r3, [r2]
-     5ac:	e3530001 	cmp	r3, #1	; 0x1
-     5b0:	0a00003a 	beq	6a0 <HL2LL_write_cycle+0x154>
-     5b4:	e1d530b0 	ldrh	r3, [r5]
-     5b8:	e59f2154 	ldr	r2, [pc, #340]	; 714 <.text+0x714>
-     5bc:	e3c33020 	bic	r3, r3, #32	; 0x20
-     5c0:	e1c530b0 	strh	r3, [r5]
-     5c4:	e1d230b6 	ldrh	r3, [r2, #6]
-     5c8:	e1d2e0b8 	ldrh	lr, [r2, #8]
-     5cc:	e1d210b0 	ldrh	r1, [r2]
-     5d0:	e1c530ba 	strh	r3, [r5, #10]
-     5d4:	e1d230b2 	ldrh	r3, [r2, #2]
-     5d8:	e1d220b4 	ldrh	r2, [r2, #4]
-     5dc:	e1c5e0b2 	strh	lr, [r5, #2]
-     5e0:	e1c510b4 	strh	r1, [r5, #4]
-     5e4:	e1c530b6 	strh	r3, [r5, #6]
-     5e8:	e1c520b8 	strh	r2, [r5, #8]
-     5ec:	e3560000 	cmp	r6, #0	; 0x0
-     5f0:	1a000014 	bne	648 <HL2LL_write_cycle+0xfc>
-     5f4:	e59f311c 	ldr	r3, [pc, #284]	; 718 <.text+0x718>
-     5f8:	e5932000 	ldr	r2, [r3]
-     5fc:	e9931002 	ldmib	r3, {r1, ip}
-     600:	e1d3e2b8 	ldrh	lr, [r3, #40]
-     604:	e5852014 	str	r2, [r5, #20]
-     608:	e5851018 	str	r1, [r5, #24]
-     60c:	e1d321b0 	ldrh	r2, [r3, #16]
-     610:	e1d310bc 	ldrh	r1, [r3, #12]
-     614:	e1d331b4 	ldrh	r3, [r3, #20]
-     618:	e1a00006 	mov	r0, r6
-     61c:	e1c532be 	strh	r3, [r5, #46]
-     620:	e1c5e2b4 	strh	lr, [r5, #36]
-     624:	e585c01c 	str	ip, [r5, #28]
-     628:	e1c512b0 	strh	r1, [r5, #32]
-     62c:	e1c522b2 	strh	r2, [r5, #34]
-     630:	ebffff7e 	bl	430 <LL_write_ctrl_data>
-     634:	e3a03001 	mov	r3, #1	; 0x1
-     638:	e5c73000 	strb	r3, [r7]
-     63c:	e1a00003 	mov	r0, r3
-     640:	e8bd40f0 	ldmia	sp!, {r4, r5, r6, r7, lr}
-     644:	e12fff1e 	bx	lr
-     648:	e59f30c8 	ldr	r3, [pc, #200]	; 718 <.text+0x718>
-     64c:	e59f20c8 	ldr	r2, [pc, #200]	; 71c <.text+0x71c>
-     650:	e1d3e2b4 	ldrh	lr, [r3, #36]
-     654:	e1d210b2 	ldrh	r1, [r2, #2]
-     658:	e1c5e2bc 	strh	lr, [r5, #44]
-     65c:	e1c513b2 	strh	r1, [r5, #50]
-     660:	e1d3e1b8 	ldrh	lr, [r3, #24]
-     664:	e1d311bc 	ldrh	r1, [r3, #28]
-     668:	e1d220b0 	ldrh	r2, [r2]
-     66c:	e1d332b0 	ldrh	r3, [r3, #32]
-     670:	e3a04000 	mov	r4, #0	; 0x0
-     674:	e1a00006 	mov	r0, r6
-     678:	e1c543b6 	strh	r4, [r5, #54]
-     67c:	e1c5e2b6 	strh	lr, [r5, #38]
-     680:	e1c512b8 	strh	r1, [r5, #40]
-     684:	e1c532ba 	strh	r3, [r5, #42]
-     688:	e1c523b0 	strh	r2, [r5, #48]
-     68c:	e1c543b4 	strh	r4, [r5, #52]
-     690:	ebffff66 	bl	430 <LL_write_ctrl_data>
-     694:	e3a00001 	mov	r0, #1	; 0x1
-     698:	e5c74000 	strb	r4, [r7]
-     69c:	eaffffe7 	b	640 <HL2LL_write_cycle+0xf4>
-     6a0:	e1d520b0 	ldrh	r2, [r5]
-     6a4:	e59f3074 	ldr	r3, [pc, #116]	; 720 <.text+0x720>
-     6a8:	e59f1064 	ldr	r1, [pc, #100]	; 714 <.text+0x714>
-     6ac:	e3822020 	orr	r2, r2, #32	; 0x20
-     6b0:	e5d3e002 	ldrb	lr, [r3, #2]
-     6b4:	e1c520b0 	strh	r2, [r5]
-     6b8:	e1d120b6 	ldrh	r2, [r1, #6]
-     6bc:	e5d34003 	ldrb	r4, [r3, #3]
-     6c0:	e5d30000 	ldrb	r0, [r3]
-     6c4:	e5d3c001 	ldrb	ip, [r3, #1]
-     6c8:	e1c520ba 	strh	r2, [r5, #10]
-     6cc:	e1d130b8 	ldrh	r3, [r1, #8]
-     6d0:	e1d120b2 	ldrh	r2, [r1, #2]
-     6d4:	e5c5e00e 	strb	lr, [r5, #14]
-     6d8:	e1d1e0b0 	ldrh	lr, [r1]
-     6dc:	e1d110b4 	ldrh	r1, [r1, #4]
-     6e0:	e5c5000c 	strb	r0, [r5, #12]
-     6e4:	e5c5c00d 	strb	ip, [r5, #13]
-     6e8:	e5c5400f 	strb	r4, [r5, #15]
-     6ec:	e1c530b2 	strh	r3, [r5, #2]
-     6f0:	e1c5e0b4 	strh	lr, [r5, #4]
-     6f4:	e1c520b6 	strh	r2, [r5, #6]
-     6f8:	e1c510b8 	strh	r1, [r5, #8]
-     6fc:	eaffffba 	b	5ec <HL2LL_write_cycle+0xa0>
-     700:	4000001b 	andmi	r0, r0, fp, lsl r0
-     704:	40000854 	andmi	r0, r0, r4, asr r8
-     708:	40000850 	andmi	r0, r0, r0, asr r8
-     70c:	40000cb8 	strmih	r0, [r0], -r8
-     710:	40001034 	andmi	r1, r0, r4, lsr r0
-     714:	40000ef0 	strmid	r0, [r0], -r0
-     718:	40000e94 	mulmi	r0, r4, lr
-     71c:	400013a0 	andmi	r1, r0, r0, lsr #7
-     720:	40000fb8 	strmih	r0, [r0], -r8
-
-00000724 <SSP_rx_handler_HL>:
-     724:	e92d40f0 	stmdb	sp!, {r4, r5, r6, r7, lr}
-     728:	e59f2264 	ldr	r2, [pc, #612]	; 994 <.text+0x994>
-     72c:	e5d23000 	ldrb	r3, [r2]
-     730:	e20330ff 	and	r3, r3, #255	; 0xff
-     734:	e3530000 	cmp	r3, #0	; 0x0
-     738:	e20000ff 	and	r0, r0, #255	; 0xff
-     73c:	e1a04002 	mov	r4, r2
-     740:	1a000004 	bne	758 <SSP_rx_handler_HL+0x34>
-     744:	e350003e 	cmp	r0, #62	; 0x3e
-     748:	0a000011 	beq	794 <SSP_rx_handler_HL+0x70>
-     74c:	e5c23000 	strb	r3, [r2]
-     750:	e8bd40f0 	ldmia	sp!, {r4, r5, r6, r7, lr}
-     754:	e12fff1e 	bx	lr
-     758:	e5d23000 	ldrb	r3, [r2]
-     75c:	e3530001 	cmp	r3, #1	; 0x1
-     760:	0a000010 	beq	7a8 <SSP_rx_handler_HL+0x84>
-     764:	e5d23000 	ldrb	r3, [r2]
-     768:	e3530002 	cmp	r3, #2	; 0x2
-     76c:	0a00001c 	beq	7e4 <SSP_rx_handler_HL+0xc0>
-     770:	e5d23000 	ldrb	r3, [r2]
-     774:	e3530003 	cmp	r3, #3	; 0x3
-     778:	13a03000 	movne	r3, #0	; 0x0
-     77c:	1afffff2 	bne	74c <SSP_rx_handler_HL+0x28>
-     780:	e350003c 	cmp	r0, #60	; 0x3c
-     784:	0a000039 	beq	870 <SVC_Stack_Size+0x70>
-     788:	e3a03000 	mov	r3, #0	; 0x0
-     78c:	e5c43000 	strb	r3, [r4]
-     790:	eaffffee 	b	750 <SSP_rx_handler_HL+0x2c>
-     794:	e5d23000 	ldrb	r3, [r2]
-     798:	e2833001 	add	r3, r3, #1	; 0x1
-     79c:	e20330ff 	and	r3, r3, #255	; 0xff
-     7a0:	e5c23000 	strb	r3, [r2]
-     7a4:	eaffffe9 	b	750 <SSP_rx_handler_HL+0x2c>
-     7a8:	e350002a 	cmp	r0, #42	; 0x2a
-     7ac:	13a03000 	movne	r3, #0	; 0x0
-     7b0:	15c23000 	strneb	r3, [r2]
-     7b4:	1affffe5 	bne	750 <SSP_rx_handler_HL+0x2c>
-     7b8:	e5d23000 	ldrb	r3, [r2]
-     7bc:	e2833001 	add	r3, r3, #1	; 0x1
-     7c0:	e20330ff 	and	r3, r3, #255	; 0xff
-     7c4:	e5c23000 	strb	r3, [r2]
-     7c8:	e59f31c8 	ldr	r3, [pc, #456]	; 998 <.text+0x998>
-     7cc:	e59f21c8 	ldr	r2, [pc, #456]	; 99c <.text+0x99c>
-     7d0:	e5832000 	str	r2, [r3]
-     7d4:	e59f31c4 	ldr	r3, [pc, #452]	; 9a0 <.text+0x9a0>
-     7d8:	e3a01028 	mov	r1, #40	; 0x28
-     7dc:	e5c31000 	strb	r1, [r3]
-     7e0:	eaffffda 	b	750 <SSP_rx_handler_HL+0x2c>
-     7e4:	e59fc1b4 	ldr	ip, [pc, #436]	; 9a0 <.text+0x9a0>
-     7e8:	e5dc3000 	ldrb	r3, [ip]
-     7ec:	e353001a 	cmp	r3, #26	; 0x1a
-     7f0:	0a00000e 	beq	830 <SVC_Stack_Size+0x30>
-     7f4:	e59f119c 	ldr	r1, [pc, #412]	; 998 <.text+0x998>
-     7f8:	e5dc3000 	ldrb	r3, [ip]
-     7fc:	e5912000 	ldr	r2, [r1]
-     800:	e2433001 	sub	r3, r3, #1	; 0x1
-     804:	e20330ff 	and	r3, r3, #255	; 0xff
-     808:	e5cc3000 	strb	r3, [ip]
-     80c:	e4c20001 	strb	r0, [r2], #1
-     810:	e5dc3000 	ldrb	r3, [ip]
-     814:	e3530000 	cmp	r3, #0	; 0x0
-     818:	e5812000 	str	r2, [r1]
-     81c:	05d43000 	ldreqb	r3, [r4]
-     820:	02833001 	addeq	r3, r3, #1	; 0x1
-     824:	020330ff 	andeq	r3, r3, #255	; 0xff
-     828:	05c43000 	streqb	r3, [r4]
-     82c:	eaffffc7 	b	750 <SSP_rx_handler_HL+0x2c>
-     830:	e59f3164 	ldr	r3, [pc, #356]	; 99c <.text+0x99c>
-     834:	e1d320b0 	ldrh	r2, [r3]
-     838:	e59f1164 	ldr	r1, [pc, #356]	; 9a4 <.text+0x9a4>
-     83c:	e2022003 	and	r2, r2, #3	; 0x3
-     840:	e5c12000 	strb	r2, [r1]
-     844:	e5d13000 	ldrb	r3, [r1]
-     848:	e3530001 	cmp	r3, #1	; 0x1
-     84c:	0a000046 	beq	96c <SVC_Stack_Size+0x16c>
-     850:	e5d13000 	ldrb	r3, [r1]
-     854:	e3530002 	cmp	r3, #2	; 0x2
-     858:	1affffe5 	bne	7f4 <SSP_rx_handler_HL+0xd0>
-     85c:	e59f1134 	ldr	r1, [pc, #308]	; 998 <.text+0x998>
-     860:	e5913000 	ldr	r3, [r1]
-     864:	e2833034 	add	r3, r3, #52	; 0x34
-     868:	e5813000 	str	r3, [r1]
-     86c:	eaffffe1 	b	7f8 <SSP_rx_handler_HL+0xd4>
-     870:	e59f6124 	ldr	r6, [pc, #292]	; 99c <.text+0x99c>
-     874:	e1d630b0 	ldrh	r3, [r6]
-     878:	e3130008 	tst	r3, #8	; 0x8
-     87c:	e2037003 	and	r7, r3, #3	; 0x3
-     880:	159f3120 	ldrne	r3, [pc, #288]	; 9a8 <.text+0x9a8>
-     884:	13a02000 	movne	r2, #0	; 0x0
-     888:	15832000 	strne	r2, [r3]
-     88c:	e1d610b6 	ldrh	r1, [r6, #6]
-     890:	e1d630f2 	ldrsh	r3, [r6, #2]
-     894:	e1d620f4 	ldrsh	r2, [r6, #4]
-     898:	e59f510c 	ldr	r5, [pc, #268]	; 9ac <.text+0x9ac>
-     89c:	e1d6e0fc 	ldrsh	lr, [r6, #12]
-     8a0:	e0833103 	add	r3, r3, r3, lsl #2
-     8a4:	e0822102 	add	r2, r2, r2, lsl #2
-     8a8:	e0811101 	add	r1, r1, r1, lsl #2
-     8ac:	e1d600f8 	ldrsh	r0, [r6, #8]
-     8b0:	e1d6c0fa 	ldrsh	ip, [r6, #10]
-     8b4:	e1a03083 	mov	r3, r3, lsl #1
-     8b8:	e1a02082 	mov	r2, r2, lsl #1
-     8bc:	e1a01081 	mov	r1, r1, lsl #1
-     8c0:	e3570000 	cmp	r7, #0	; 0x0
-     8c4:	e585e014 	str	lr, [r5, #20]
-     8c8:	e5853000 	str	r3, [r5]
-     8cc:	e5852004 	str	r2, [r5, #4]
-     8d0:	e5851008 	str	r1, [r5, #8]
-     8d4:	e585000c 	str	r0, [r5, #12]
-     8d8:	e585c010 	str	ip, [r5, #16]
-     8dc:	e1a0e005 	mov	lr, r5
-     8e0:	1a000016 	bne	940 <SVC_Stack_Size+0x140>
-     8e4:	e59f10c4 	ldr	r1, [pc, #196]	; 9b0 <.text+0x9b0>
-     8e8:	e1a02006 	mov	r2, r6
-     8ec:	e2860008 	add	r0, r6, #8	; 0x8
-     8f0:	e1a0c006 	mov	ip, r6
-     8f4:	e5d2300e 	ldrb	r3, [r2, #14]
-     8f8:	e2822001 	add	r2, r2, #1	; 0x1
-     8fc:	e1a03203 	mov	r3, r3, lsl #4
-     900:	e1520000 	cmp	r2, r0
-     904:	e0c130b2 	strh	r3, [r1], #2
-     908:	1afffff9 	bne	8f4 <SVC_Stack_Size+0xf4>
-     90c:	e1dc32f4 	ldrsh	r3, [ip, #36]
-     910:	e1dc22f0 	ldrsh	r2, [ip, #32]
-     914:	e1dc12f2 	ldrsh	r1, [ip, #34]
-     918:	e0822102 	add	r2, r2, r2, lsl #2
-     91c:	e0811101 	add	r1, r1, r1, lsl #2
-     920:	e0833103 	add	r3, r3, r3, lsl #2
-     924:	e1a02082 	mov	r2, r2, lsl #1
-     928:	e1a01081 	mov	r1, r1, lsl #1
-     92c:	e1a03083 	mov	r3, r3, lsl #1
-     930:	e1ce31bc 	strh	r3, [lr, #28]
-     934:	e1ce21b8 	strh	r2, [lr, #24]
-     938:	e1ce11ba 	strh	r1, [lr, #26]
-     93c:	eaffff91 	b	788 <SSP_rx_handler_HL+0x64>
-     940:	e3570001 	cmp	r7, #1	; 0x1
-     944:	0a00000d 	beq	980 <SVC_Stack_Size+0x180>
-     948:	e3570002 	cmp	r7, #2	; 0x2
-     94c:	1affff8d 	bne	788 <SSP_rx_handler_HL+0x64>
-     950:	e1d634f6 	ldrsh	r3, [r6, #70]
-     954:	e1d624f2 	ldrsh	r2, [r6, #66]
-     958:	e1d614f4 	ldrsh	r1, [r6, #68]
-     95c:	e5853038 	str	r3, [r5, #56]
-     960:	e5852030 	str	r2, [r5, #48]
-     964:	e5851034 	str	r1, [r5, #52]
-     968:	eaffff86 	b	788 <SSP_rx_handler_HL+0x64>
-     96c:	e59f1024 	ldr	r1, [pc, #36]	; 998 <.text+0x998>
-     970:	e5913000 	ldr	r3, [r1]
-     974:	e283301a 	add	r3, r3, #26	; 0x1a
-     978:	e5813000 	str	r3, [r1]
-     97c:	eaffff9d 	b	7f8 <SSP_rx_handler_HL+0xd4>
-     980:	e1d634f0 	ldrsh	r3, [r6, #64]
-     984:	e596203c 	ldr	r2, [r6, #60]
-     988:	e5853050 	str	r3, [r5, #80]
-     98c:	e585204c 	str	r2, [r5, #76]
-     990:	eaffff7c 	b	788 <SSP_rx_handler_HL+0x64>
-     994:	4000084d 	andmi	r0, r0, sp, asr #16
-     998:	40000848 	andmi	r0, r0, r8, asr #16
-     99c:	40000b34 	andmi	r0, r0, r4, lsr fp
-     9a0:	4000084c 	andmi	r0, r0, ip, asr #16
-     9a4:	40000846 	andmi	r0, r0, r6, asr #16
-     9a8:	40000854 	andmi	r0, r0, r4, asr r8
-     9ac:	4000130c 	andmi	r1, r0, ip, lsl #6
-     9b0:	40001098 	mulmi	r0, r8, r0
-
-000009b4 <writeCommand>:
-     9b4:	e92d4010 	stmdb	sp!, {r4, lr}
-     9b8:	e59fc028 	ldr	ip, [pc, #40]	; 9e8 <.text+0x9e8>
-     9bc:	e1dde0b8 	ldrh	lr, [sp, #8]
-     9c0:	e59d400c 	ldr	r4, [sp, #12]
-     9c4:	e1cce0b8 	strh	lr, [ip, #8]
-     9c8:	e59fe01c 	ldr	lr, [pc, #28]	; 9ec <.text+0x9ec>
-     9cc:	e1cc00b0 	strh	r0, [ip]
-     9d0:	e5ce4001 	strb	r4, [lr, #1]
-     9d4:	e1cc10b2 	strh	r1, [ip, #2]
-     9d8:	e1cc30b6 	strh	r3, [ip, #6]
-     9dc:	e1cc20b4 	strh	r2, [ip, #4]
-     9e0:	e8bd4010 	ldmia	sp!, {r4, lr}
-     9e4:	e12fff1e 	bx	lr
-     9e8:	40000ef0 	strmid	r0, [r0], -r0
-     9ec:	40001034 	andmi	r1, r0, r4, lsr r0
-
-000009f0 <isSerialEnabled>:
-     9f0:	e59f3004 	ldr	r3, [pc, #4]	; 9fc <.text+0x9fc>
-     9f4:	e1d300b8 	ldrh	r0, [r3, #8]
-     9f8:	e12fff1e 	bx	lr
-     9fc:	40001098 	mulmi	r0, r8, r0
-
-00000a00 <checkTxPeriod>:
-     a00:	e1a00800 	mov	r0, r0, lsl #16
-     a04:	e1a03801 	mov	r3, r1, lsl #16
-     a08:	e1b00820 	movs	r0, r0, lsr #16
-     a0c:	e92d4010 	stmdb	sp!, {r4, lr}
-     a10:	e1a01000 	mov	r1, r0
-     a14:	e1a04823 	mov	r4, r3, lsr #16
-     a18:	0a000005 	beq	a34 <checkTxPeriod+0x34>
-     a1c:	e59f3018 	ldr	r3, [pc, #24]	; a3c <.text+0xa3c>
-     a20:	e5930000 	ldr	r0, [r3]
-     a24:	eb005070 	bl	14bec <____umodsi3_from_arm>
-     a28:	e1500004 	cmp	r0, r4
-     a2c:	13a00000 	movne	r0, #0	; 0x0
-     a30:	03a00001 	moveq	r0, #1	; 0x1
-     a34:	e8bd4010 	ldmia	sp!, {r4, lr}
-     a38:	e12fff1e 	bx	lr
-     a3c:	4000106c 	andmi	r1, r0, ip, rrx
-
-00000a40 <processMotorStateChanges>:
-     a40:	e52de004 	str	lr, [sp, #-4]!
-     a44:	e59f3064 	ldr	r3, [pc, #100]	; ab0 <.text+0xab0>
-     a48:	e59fe064 	ldr	lr, [pc, #100]	; ab4 <.text+0xab4>
-     a4c:	e1d325ba 	ldrh	r2, [r3, #90]
-     a50:	e1de30f0 	ldrsh	r3, [lr]
-     a54:	e3530000 	cmp	r3, #0	; 0x0
-     a58:	13a01000 	movne	r1, #0	; 0x0
-     a5c:	02021001 	andeq	r1, r2, #1	; 0x1
-     a60:	e3510000 	cmp	r1, #0	; 0x0
-     a64:	e2020001 	and	r0, r2, #1	; 0x1
-     a68:	159f3048 	ldrne	r3, [pc, #72]	; ab8 <.text+0xab8>
-     a6c:	e2022001 	and	r2, r2, #1	; 0x1
-     a70:	e2222001 	eor	r2, r2, #1	; 0x1
-     a74:	13a02003 	movne	r2, #3	; 0x3
-     a78:	15c32000 	strneb	r2, [r3]
-     a7c:	1a000008 	bne	aa4 <processMotorStateChanges+0x64>
-     a80:	e3530000 	cmp	r3, #0	; 0x0
-     a84:	03a03000 	moveq	r3, #0	; 0x0
-     a88:	12023001 	andne	r3, r2, #1	; 0x1
-     a8c:	e3530000 	cmp	r3, #0	; 0x0
-     a90:	e59fc020 	ldr	ip, [pc, #32]	; ab8 <.text+0xab8>
-     a94:	0a000002 	beq	aa4 <processMotorStateChanges+0x64>
-     a98:	e5dc3000 	ldrb	r3, [ip]
-     a9c:	e35300ff 	cmp	r3, #255	; 0xff
-     aa0:	15cc1000 	strneb	r1, [ip]
-     aa4:	e1ce00b0 	strh	r0, [lr]
-     aa8:	e49de004 	ldr	lr, [sp], #4
-     aac:	e12fff1e 	bx	lr
-     ab0:	40000b34 	andmi	r0, r0, r4, lsr fp
-     ab4:	40000fbc 	strmih	r0, [r0], -ip
-     ab8:	40001038 	andmi	r1, r0, r8, lsr r0
-
-00000abc <processEngageDisengageTimeouts>:
-     abc:	e59fc060 	ldr	ip, [pc, #96]	; b24 <.text+0xb24>
-     ac0:	e5dc3000 	ldrb	r3, [ip]
-     ac4:	e2433001 	sub	r3, r3, #1	; 0x1
-     ac8:	e3530001 	cmp	r3, #1	; 0x1
-     acc:	e52d4004 	str	r4, [sp, #-4]!
-     ad0:	9a000001 	bls	adc <processEngageDisengageTimeouts+0x20>
-     ad4:	e8bd0010 	ldmia	sp!, {r4}
-     ad8:	e12fff1e 	bx	lr
-     adc:	e59f3044 	ldr	r3, [pc, #68]	; b28 <.text+0xb28>
-     ae0:	e59f2044 	ldr	r2, [pc, #68]	; b2c <.text+0xb2c>
-     ae4:	e8930003 	ldmia	r3, {r0, r1}
-     ae8:	e8920018 	ldmia	r2, {r3, r4}
-     aec:	e0500003 	subs	r0, r0, r3
-     af0:	e0c11004 	sbc	r1, r1, r4
-     af4:	e3510000 	cmp	r1, #0	; 0x0
-     af8:	da000002 	ble	b08 <processEngageDisengageTimeouts+0x4c>
-     afc:	e3e03000 	mvn	r3, #0	; 0x0
-     b00:	e5cc3000 	strb	r3, [ip]
-     b04:	eafffff2 	b	ad4 <processEngageDisengageTimeouts+0x18>
-     b08:	e3a0397a 	mov	r3, #1998848	; 0x1e8000
-     b0c:	e2833e47 	add	r3, r3, #1136	; 0x470
-     b10:	e283300f 	add	r3, r3, #15	; 0xf
-     b14:	1affffee 	bne	ad4 <processEngageDisengageTimeouts+0x18>
-     b18:	e1500003 	cmp	r0, r3
-     b1c:	9affffec 	bls	ad4 <processEngageDisengageTimeouts+0x18>
-     b20:	eafffff5 	b	afc <processEngageDisengageTimeouts+0x40>
-     b24:	40001038 	andmi	r1, r0, r8, lsr r0
-     b28:	40000858 	andmi	r0, r0, r8, asr r8
-     b2c:	40001064 	andmi	r1, r0, r4, rrx
-
-00000b30 <processLandingThrust>:
-     b30:	e92d4070 	stmdb	sp!, {r4, r5, r6, lr}
-     b34:	e59f5074 	ldr	r5, [pc, #116]	; bb0 <.text+0xbb0>
-     b38:	e5d53000 	ldrb	r3, [r5]
-     b3c:	e3530004 	cmp	r3, #4	; 0x4
-     b40:	e59f606c 	ldr	r6, [pc, #108]	; bb4 <.text+0xbb4>
-     b44:	e3a01000 	mov	r1, #0	; 0x0
-     b48:	0a000001 	beq	b54 <processLandingThrust+0x24>
-     b4c:	e8bd4070 	ldmia	sp!, {r4, r5, r6, lr}
-     b50:	e12fff1e 	bx	lr
-     b54:	e596400c 	ldr	r4, [r6, #12]
-     b58:	e1a00004 	mov	r0, r4
-     b5c:	eb004eae 	bl	1461c <__gesf2>
-     b60:	e3500000 	cmp	r0, #0	; 0x0
-     b64:	d3a03003 	movle	r3, #3	; 0x3
-     b68:	e1a00004 	mov	r0, r4
-     b6c:	d5c53000 	strleb	r3, [r5]
-     b70:	dafffff5 	ble	b4c <processLandingThrust+0x1c>
-     b74:	eb004b59 	bl	138e0 <__aeabi_f2d>
-     b78:	e28f2028 	add	r2, pc, #40	; 0x28
-     b7c:	e892000c 	ldmia	r2, {r2, r3}
-     b80:	eb004a7c 	bl	13578 <__aeabi_dsub>
-     b84:	eb004d13 	bl	13fd8 <__aeabi_d2f>
-     b88:	e3a01000 	mov	r1, #0	; 0x0
-     b8c:	e1a03000 	mov	r3, r0
-     b90:	e586300c 	str	r3, [r6, #12]
-     b94:	eb004ea2 	bl	14624 <__lesf2>
-     b98:	e3500000 	cmp	r0, #0	; 0x0
-     b9c:	b3a03000 	movlt	r3, #0	; 0x0
-     ba0:	b586300c 	strlt	r3, [r6, #12]
-     ba4:	eaffffe8 	b	b4c <processLandingThrust+0x1c>
-     ba8:	3f847ae1 	svccc	0x00847ae1
-     bac:	47ae147b 	undefined
-     bb0:	40001038 	andmi	r1, r0, r8, lsr r0
-     bb4:	40001170 	andmi	r1, r0, r0, ror r1
-
-00000bb8 <processMotorCommands>:
-     bb8:	e92d4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
-     bbc:	e59f324c 	ldr	r3, [pc, #588]	; e10 <.text+0xe10>
-     bc0:	e5d32000 	ldrb	r2, [r3]
-     bc4:	e35200ff 	cmp	r2, #255	; 0xff
-     bc8:	e24dd018 	sub	sp, sp, #24	; 0x18
-     bcc:	0a000066 	beq	d6c <processMotorCommands+0x1b4>
-     bd0:	e2423001 	sub	r3, r2, #1	; 0x1
-     bd4:	e3530001 	cmp	r3, #1	; 0x1
-     bd8:	9a00006d 	bls	d94 <processMotorCommands+0x1dc>
-     bdc:	e3520000 	cmp	r2, #0	; 0x0
-     be0:	13520003 	cmpne	r2, #3	; 0x3
-     be4:	13a04000 	movne	r4, #0	; 0x0
-     be8:	03a04001 	moveq	r4, #1	; 0x1
-     bec:	0a000051 	beq	d38 <processMotorCommands+0x180>
-     bf0:	e3520004 	cmp	r2, #4	; 0x4
-     bf4:	0a000077 	beq	dd8 <processMotorCommands+0x220>
-     bf8:	e3520005 	cmp	r2, #5	; 0x5
-     bfc:	1a000057 	bne	d60 <processMotorCommands+0x1a8>
-     c00:	e59f420c 	ldr	r4, [pc, #524]	; e14 <.text+0xe14>
-     c04:	e5940000 	ldr	r0, [r4]
-     c08:	e5941004 	ldr	r1, [r4, #4]
-     c0c:	e594c008 	ldr	ip, [r4, #8]
-     c10:	e1a0ec20 	mov	lr, r0, lsr #24
-     c14:	e58de014 	str	lr, [sp, #20]
-     c18:	e1a0ec21 	mov	lr, r1, lsr #24
-     c1c:	e594500c 	ldr	r5, [r4, #12]
-     c20:	e58de010 	str	lr, [sp, #16]
-     c24:	e1a0ec2c 	mov	lr, ip, lsr #24
-     c28:	e58de00c 	str	lr, [sp, #12]
-     c2c:	e1a0e420 	mov	lr, r0, lsr #8
-     c30:	e59f31e0 	ldr	r3, [pc, #480]	; e18 <.text+0xe18>
-     c34:	e58de000 	str	lr, [sp]
-     c38:	e1a0e425 	mov	lr, r5, lsr #8
-     c3c:	e58de008 	str	lr, [sp, #8]
-     c40:	e1a07c25 	mov	r7, r5, lsr #24
-     c44:	e1a0e825 	mov	lr, r5, lsr #16
-     c48:	e58de004 	str	lr, [sp, #4]
-     c4c:	e5c37017 	strb	r7, [r3, #23]
-     c50:	e59de000 	ldr	lr, [sp]
-     c54:	e1a06820 	mov	r6, r0, lsr #16
-     c58:	e5c3e009 	strb	lr, [r3, #9]
-     c5c:	e5c3600a 	strb	r6, [r3, #10]
-     c60:	e59de014 	ldr	lr, [sp, #20]
-     c64:	e1a08421 	mov	r8, r1, lsr #8
-     c68:	e1a0a821 	mov	sl, r1, lsr #16
-     c6c:	e5c3e00b 	strb	lr, [r3, #11]
-     c70:	e5c3800d 	strb	r8, [r3, #13]
-     c74:	e5c3a00e 	strb	sl, [r3, #14]
-     c78:	e59de010 	ldr	lr, [sp, #16]
-     c7c:	e1a0942c 	mov	r9, ip, lsr #8
-     c80:	e1a0b82c 	mov	fp, ip, lsr #16
-     c84:	e5c3e00f 	strb	lr, [r3, #15]
-     c88:	e5c39011 	strb	r9, [r3, #17]
-     c8c:	e5c3b012 	strb	fp, [r3, #18]
-     c90:	e59de00c 	ldr	lr, [sp, #12]
-     c94:	e5c3e013 	strb	lr, [r3, #19]
-     c98:	e59de008 	ldr	lr, [sp, #8]
-     c9c:	e5c3e015 	strb	lr, [r3, #21]
-     ca0:	e59de004 	ldr	lr, [sp, #4]
-     ca4:	e5c3100c 	strb	r1, [r3, #12]
-     ca8:	e5c3e016 	strb	lr, [r3, #22]
-     cac:	e5c3c010 	strb	ip, [r3, #16]
-     cb0:	e5c35014 	strb	r5, [r3, #20]
-     cb4:	e5c30008 	strb	r0, [r3, #8]
-     cb8:	eb000a8f 	bl	36fc <SIToLLCmdRoll>
-     cbc:	e59f5158 	ldr	r5, [pc, #344]	; e1c <.text+0xe1c>
-     cc0:	e1c500b2 	strh	r0, [r5, #2]
-     cc4:	e5940004 	ldr	r0, [r4, #4]
-     cc8:	eb000a98 	bl	3730 <SIToLLCmdPitch>
-     ccc:	e1c500b0 	strh	r0, [r5]
-     cd0:	e5940008 	ldr	r0, [r4, #8]
-     cd4:	eb000aa1 	bl	3760 <SIToLLCmdYawRate>
-     cd8:	e1c500b4 	strh	r0, [r5, #4]
-     cdc:	e594000c 	ldr	r0, [r4, #12]
-     ce0:	eb000aaa 	bl	3790 <SIToLLCmdThrust>
-     ce4:	e59fc134 	ldr	ip, [pc, #308]	; e20 <.text+0xe20>
-     ce8:	e5dc3000 	ldrb	r3, [ip]
-     cec:	e5dc2001 	ldrb	r2, [ip, #1]
-     cf0:	e3530000 	cmp	r3, #0	; 0x0
-     cf4:	13a01002 	movne	r1, #2	; 0x2
-     cf8:	03a01000 	moveq	r1, #0	; 0x0
-     cfc:	e3520000 	cmp	r2, #0	; 0x0
-     d00:	e1a0e00c 	mov	lr, ip
-     d04:	e1c500b6 	strh	r0, [r5, #6]
-     d08:	1a00002e 	bne	dc8 <processMotorCommands+0x210>
-     d0c:	e5de3002 	ldrb	r3, [lr, #2]
-     d10:	e3530000 	cmp	r3, #0	; 0x0
-     d14:	e5dc3003 	ldrb	r3, [ip, #3]
-     d18:	13811004 	orrne	r1, r1, #4	; 0x4
-     d1c:	e3530000 	cmp	r3, #0	; 0x0
-     d20:	e59f30fc 	ldr	r3, [pc, #252]	; e24 <.text+0xe24>
-     d24:	13811008 	orrne	r1, r1, #8	; 0x8
-     d28:	e3a02001 	mov	r2, #1	; 0x1
-     d2c:	e1c510b8 	strh	r1, [r5, #8]
-     d30:	e5c32001 	strb	r2, [r3, #1]
-     d34:	ea000009 	b	d60 <processMotorCommands+0x1a8>
-     d38:	e59f30dc 	ldr	r3, [pc, #220]	; e1c <.text+0xe1c>
-     d3c:	e59f20e0 	ldr	r2, [pc, #224]	; e24 <.text+0xe24>
-     d40:	e3a0e000 	mov	lr, #0	; 0x0
-     d44:	e3a01001 	mov	r1, #1	; 0x1
-     d48:	e5c21001 	strb	r1, [r2, #1]
-     d4c:	e1c310b8 	strh	r1, [r3, #8]
-     d50:	e1c3e0b0 	strh	lr, [r3]
-     d54:	e1c3e0b2 	strh	lr, [r3, #2]
-     d58:	e1c3e0b6 	strh	lr, [r3, #6]
-     d5c:	e1c3e0b4 	strh	lr, [r3, #4]
-     d60:	e28dd018 	add	sp, sp, #24	; 0x18
-     d64:	e8bd4ff0 	ldmia	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
-     d68:	e12fff1e 	bx	lr
-     d6c:	e59f30a8 	ldr	r3, [pc, #168]	; e1c <.text+0xe1c>
-     d70:	e59f10ac 	ldr	r1, [pc, #172]	; e24 <.text+0xe24>
-     d74:	e3a02000 	mov	r2, #0	; 0x0
-     d78:	e5c12001 	strb	r2, [r1, #1]
-     d7c:	e1c320b8 	strh	r2, [r3, #8]
-     d80:	e1c320b0 	strh	r2, [r3]
-     d84:	e1c320b2 	strh	r2, [r3, #2]
-     d88:	e1c320b6 	strh	r2, [r3, #6]
-     d8c:	e1c320b4 	strh	r2, [r3, #4]
-     d90:	eafffff2 	b	d60 <processMotorCommands+0x1a8>
-     d94:	e59f1080 	ldr	r1, [pc, #128]	; e1c <.text+0xe1c>
-     d98:	e59f3084 	ldr	r3, [pc, #132]	; e24 <.text+0xe24>
-     d9c:	e3e02b3e 	mvn	r2, #63488	; 0xf800
-     da0:	e3a00001 	mov	r0, #1	; 0x1
-     da4:	e5c30001 	strb	r0, [r3, #1]
-     da8:	e1c120b4 	strh	r2, [r1, #4]
-     dac:	e3a03000 	mov	r3, #0	; 0x0
-     db0:	e3a0200c 	mov	r2, #12	; 0xc
-     db4:	e1c120b8 	strh	r2, [r1, #8]
-     db8:	e1c130b0 	strh	r3, [r1]
-     dbc:	e1c130b2 	strh	r3, [r1, #2]
-     dc0:	e1c130b6 	strh	r3, [r1, #6]
-     dc4:	eaffffe5 	b	d60 <processMotorCommands+0x1a8>
-     dc8:	e3510000 	cmp	r1, #0	; 0x0
-     dcc:	13a01003 	movne	r1, #3	; 0x3
-     dd0:	03a01001 	moveq	r1, #1	; 0x1
-     dd4:	eaffffcc 	b	d0c <processMotorCommands+0x154>
-     dd8:	e59f3034 	ldr	r3, [pc, #52]	; e14 <.text+0xe14>
-     ddc:	e593000c 	ldr	r0, [r3, #12]
-     de0:	eb000a6a 	bl	3790 <SIToLLCmdThrust>
-     de4:	e59f3038 	ldr	r3, [pc, #56]	; e24 <.text+0xe24>
-     de8:	e59f202c 	ldr	r2, [pc, #44]	; e1c <.text+0xe1c>
-     dec:	e3a01001 	mov	r1, #1	; 0x1
-     df0:	e5c31001 	strb	r1, [r3, #1]
-     df4:	e3a03008 	mov	r3, #8	; 0x8
-     df8:	e1c200b6 	strh	r0, [r2, #6]
-     dfc:	e1c240b4 	strh	r4, [r2, #4]
-     e00:	e1c230b8 	strh	r3, [r2, #8]
-     e04:	e1c240b0 	strh	r4, [r2]
-     e08:	e1c240b2 	strh	r4, [r2, #2]
-     e0c:	eaffffd3 	b	d60 <processMotorCommands+0x1a8>
-     e10:	40001038 	andmi	r1, r0, r8, lsr r0
-     e14:	40001170 	andmi	r1, r0, r0, ror r1
-     e18:	40000efc 	strmid	r0, [r0], -ip
-     e1c:	40000ef0 	strmid	r0, [r0], -r0
-     e20:	4000103a 	andmi	r1, r0, sl, lsr r0
-     e24:	40001034 	andmi	r1, r0, r4, lsr r0
-
-00000e28 <processFlightActionRequests>:
-     e28:	e92d4010 	stmdb	sp!, {r4, lr}
-     e2c:	e59f40d4 	ldr	r4, [pc, #212]	; f08 <.text+0xf08>
-     e30:	e5943000 	ldr	r3, [r4]
-     e34:	e5d32008 	ldrb	r2, [r3, #8]
-     e38:	e3520000 	cmp	r2, #0	; 0x0
-     e3c:	0a000006 	beq	e5c <processFlightActionRequests+0x34>
-     e40:	e59f30c4 	ldr	r3, [pc, #196]	; f0c <.text+0xf0c>
-     e44:	e1d320b8 	ldrh	r2, [r3, #8]
-     e48:	e3520000 	cmp	r2, #0	; 0x0
-     e4c:	1a000004 	bne	e64 <processFlightActionRequests+0x3c>
-     e50:	e5942000 	ldr	r2, [r4]
-     e54:	e3a03000 	mov	r3, #0	; 0x0
-     e58:	e5c23008 	strb	r3, [r2, #8]
-     e5c:	e8bd4010 	ldmia	sp!, {r4, lr}
-     e60:	e12fff1e 	bx	lr
-     e64:	e59f30a4 	ldr	r3, [pc, #164]	; f10 <.text+0xf10>
-     e68:	e5d33000 	ldrb	r3, [r3]
-     e6c:	e3530003 	cmp	r3, #3	; 0x3
-     e70:	0a00000e 	beq	eb0 <processFlightActionRequests+0x88>
-     e74:	e3530000 	cmp	r3, #0	; 0x0
-     e78:	059f3094 	ldreq	r3, [pc, #148]	; f14 <.text+0xf14>
-     e7c:	03e02000 	mvneq	r2, #0	; 0x0
-     e80:	05c32000 	streqb	r2, [r3]
-     e84:	0afffff1 	beq	e50 <processFlightActionRequests+0x28>
-     e88:	e3530004 	cmp	r3, #4	; 0x4
-     e8c:	0a000015 	beq	ee8 <processFlightActionRequests+0xc0>
-     e90:	e3530005 	cmp	r3, #5	; 0x5
-     e94:	1affffed 	bne	e50 <processFlightActionRequests+0x28>
-     e98:	e59f2074 	ldr	r2, [pc, #116]	; f14 <.text+0xf14>
-     e9c:	e5d23000 	ldrb	r3, [r2]
-     ea0:	e3530005 	cmp	r3, #5	; 0x5
-     ea4:	02433001 	subeq	r3, r3, #1	; 0x1
-     ea8:	05c23000 	streqb	r3, [r2]
-     eac:	eaffffe7 	b	e50 <processFlightActionRequests+0x28>
-     eb0:	e59f205c 	ldr	r2, [pc, #92]	; f14 <.text+0xf14>
-     eb4:	e5d23000 	ldrb	r3, [r2]
-     eb8:	e3530000 	cmp	r3, #0	; 0x0
-     ebc:	02833001 	addeq	r3, r3, #1	; 0x1
-     ec0:	0a000002 	beq	ed0 <processFlightActionRequests+0xa8>
-     ec4:	e3530003 	cmp	r3, #3	; 0x3
-     ec8:	1affffe0 	bne	e50 <processFlightActionRequests+0x28>
-     ecc:	e2433001 	sub	r3, r3, #1	; 0x1
-     ed0:	e5c23000 	strb	r3, [r2]
-     ed4:	e59f203c 	ldr	r2, [pc, #60]	; f18 <.text+0xf18>
-     ed8:	e59f303c 	ldr	r3, [pc, #60]	; f1c <.text+0xf1c>
-     edc:	e8920003 	ldmia	r2, {r0, r1}
-     ee0:	e8830003 	stmia	r3, {r0, r1}
-     ee4:	eaffffd9 	b	e50 <processFlightActionRequests+0x28>
-     ee8:	e59f2024 	ldr	r2, [pc, #36]	; f14 <.text+0xf14>
-     eec:	e5d23000 	ldrb	r3, [r2]
-     ef0:	e3530003 	cmp	r3, #3	; 0x3
-     ef4:	1affffd5 	bne	e50 <processFlightActionRequests+0x28>
-     ef8:	e2833002 	add	r3, r3, #2	; 0x2
-     efc:	e5c23000 	strb	r3, [r2]
-     f00:	eb000ad2 	bl	3a50 <pidReset>
-     f04:	eaffffd1 	b	e50 <processFlightActionRequests+0x28>
-     f08:	400010ac 	andmi	r1, r0, ip, lsr #1
-     f0c:	40001098 	mulmi	r0, r8, r0
-     f10:	400011b8 	strmih	r1, [r0], -r8
-     f14:	40001038 	andmi	r1, r0, r8, lsr r0
-     f18:	40000858 	andmi	r0, r0, r8, asr r8
-     f1c:	40001064 	andmi	r1, r0, r4, rrx
-
-00000f20 <feedbackBeep>:
-     f20:	e92d4070 	stmdb	sp!, {r4, r5, r6, lr}
-     f24:	e59f3138 	ldr	r3, [pc, #312]	; 1064 <.text+0x1064>
-     f28:	e5d32000 	ldrb	r2, [r3]
-     f2c:	e35200ff 	cmp	r2, #255	; 0xff
-     f30:	0a00002b 	beq	fe4 <feedbackBeep+0xc4>
-     f34:	e59f312c 	ldr	r3, [pc, #300]	; 1068 <.text+0x1068>
-     f38:	e1d340b8 	ldrh	r4, [r3, #8]
-     f3c:	e3540000 	cmp	r4, #0	; 0x0
-     f40:	1a000011 	bne	f8c <feedbackBeep+0x6c>
-     f44:	e59f6120 	ldr	r6, [pc, #288]	; 106c <.text+0x106c>
-     f48:	e59f5120 	ldr	r5, [pc, #288]	; 1070 <.text+0x1070>
-     f4c:	e5961000 	ldr	r1, [r6]
-     f50:	e0832195 	umull	r2, r3, r5, r1
-     f54:	e1a03323 	mov	r3, r3, lsr #6
-     f58:	e0632283 	rsb	r2, r3, r3, lsl #5
-     f5c:	e0833102 	add	r3, r3, r2, lsl #2
-     f60:	e1510183 	cmp	r1, r3, lsl #3
-     f64:	0a000033 	beq	1038 <USR_Stack_Size+0x38>
-     f68:	e0832195 	umull	r2, r3, r5, r1
-     f6c:	e1a03323 	mov	r3, r3, lsr #6
-     f70:	e0632283 	rsb	r2, r3, r3, lsl #5
-     f74:	e0833102 	add	r3, r3, r2, lsl #2
-     f78:	e0413183 	sub	r3, r1, r3, lsl #3
-     f7c:	e3530032 	cmp	r3, #50	; 0x32
-     f80:	0a000030 	beq	1048 <USR_Stack_Size+0x48>
-     f84:	e8bd4070 	ldmia	sp!, {r4, r5, r6, lr}
-     f88:	e12fff1e 	bx	lr
-     f8c:	e59f50d8 	ldr	r5, [pc, #216]	; 106c <.text+0x106c>
-     f90:	e59f40d8 	ldr	r4, [pc, #216]	; 1070 <.text+0x1070>
-     f94:	e5951000 	ldr	r1, [r5]
-     f98:	e0823194 	umull	r3, r2, r4, r1
-     f9c:	e1a02322 	mov	r2, r2, lsr #6
-     fa0:	e0623282 	rsb	r3, r2, r2, lsl #5
-     fa4:	e0823103 	add	r3, r2, r3, lsl #2
-     fa8:	e0412183 	sub	r2, r1, r3, lsl #3
-     fac:	e3520064 	cmp	r2, #100	; 0x64
-     fb0:	13520000 	cmpne	r2, #0	; 0x0
-     fb4:	0a00001b 	beq	1028 <USR_Stack_Size+0x28>
-     fb8:	e0823194 	umull	r3, r2, r4, r1
-     fbc:	e1a02322 	mov	r2, r2, lsr #6
-     fc0:	e0623282 	rsb	r3, r2, r2, lsl #5
-     fc4:	e0823103 	add	r3, r2, r3, lsl #2
-     fc8:	e0412183 	sub	r2, r1, r3, lsl #3
-     fcc:	e3520096 	cmp	r2, #150	; 0x96
-     fd0:	13520032 	cmpne	r2, #50	; 0x32
-     fd4:	1affffea 	bne	f84 <feedbackBeep+0x64>
-     fd8:	e3a00000 	mov	r0, #0	; 0x0
-     fdc:	eb001939 	bl	74c8 <beeper>
-     fe0:	eaffffe7 	b	f84 <feedbackBeep+0x64>
-     fe4:	e59f5080 	ldr	r5, [pc, #128]	; 106c <.text+0x106c>
-     fe8:	e59f4084 	ldr	r4, [pc, #132]	; 1074 <.text+0x1074>
-     fec:	e5952000 	ldr	r2, [r5]
-     ff0:	e0831294 	umull	r1, r3, r4, r2
-     ff4:	e1a032a3 	mov	r3, r3, lsr #5
-     ff8:	e0833103 	add	r3, r3, r3, lsl #2
-     ffc:	e0833103 	add	r3, r3, r3, lsl #2
-    1000:	e1520103 	cmp	r2, r3, lsl #2
-    1004:	0a000012 	beq	1054 <USR_Stack_Size+0x54>
-    1008:	e0831294 	umull	r1, r3, r4, r2
-    100c:	e1a032a3 	mov	r3, r3, lsr #5
-    1010:	e0833103 	add	r3, r3, r3, lsl #2
-    1014:	e0833103 	add	r3, r3, r3, lsl #2
-    1018:	e0423103 	sub	r3, r2, r3, lsl #2
-    101c:	e3530032 	cmp	r3, #50	; 0x32
-    1020:	1affffd7 	bne	f84 <feedbackBeep+0x64>
-    1024:	eaffffeb 	b	fd8 <feedbackBeep+0xb8>
-    1028:	e3a00001 	mov	r0, #1	; 0x1
-    102c:	eb001925 	bl	74c8 <beeper>
-    1030:	e5951000 	ldr	r1, [r5]
-    1034:	eaffffdf 	b	fb8 <feedbackBeep+0x98>
-    1038:	e3a00001 	mov	r0, #1	; 0x1
-    103c:	eb001921 	bl	74c8 <beeper>
-    1040:	e5961000 	ldr	r1, [r6]
-    1044:	eaffffc7 	b	f68 <feedbackBeep+0x48>
-    1048:	e1a00004 	mov	r0, r4
-    104c:	eb00191d 	bl	74c8 <beeper>
-    1050:	eaffffcb 	b	f84 <feedbackBeep+0x64>
-    1054:	e3a00001 	mov	r0, #1	; 0x1
-    1058:	eb00191a 	bl	74c8 <beeper>
-    105c:	e5952000 	ldr	r2, [r5]
-    1060:	eaffffe8 	b	1008 <USR_Stack_Size+0x8>
-    1064:	40001038 	andmi	r1, r0, r8, lsr r0
-    1068:	40001098 	mulmi	r0, r8, r0
-    106c:	4000106c 	andmi	r1, r0, ip, rrx
-    1070:	10624dd3 	ldrned	r4, [r2], #-211
-    1074:	51eb851f 	mvnpl	r8, pc, lsl r5
-
-00001078 <processKF>:
-    1078:	e92d4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
-    107c:	e59f35c4 	ldr	r3, [pc, #1476]	; 1648 <.text+0x1648>
-    1080:	e5933000 	ldr	r3, [r3]
-    1084:	e5d32008 	ldrb	r2, [r3, #8]
-    1088:	e3520000 	cmp	r2, #0	; 0x0
-    108c:	e24dd040 	sub	sp, sp, #64	; 0x40
-    1090:	0a000090 	beq	12d8 <processKF+0x260>
-    1094:	e3a02000 	mov	r2, #0	; 0x0
-    1098:	e5c32008 	strb	r2, [r3, #8]
-    109c:	e59f35a8 	ldr	r3, [pc, #1448]	; 164c <.text+0x164c>
-    10a0:	e5d3b003 	ldrb	fp, [r3, #3]
-    10a4:	e5d39002 	ldrb	r9, [r3, #2]
-    10a8:	e5d3a01a 	ldrb	sl, [r3, #26]
-    10ac:	e5d3801e 	ldrb	r8, [r3, #30]
-    10b0:	e5d37006 	ldrb	r7, [r3, #6]
-    10b4:	e5d34022 	ldrb	r4, [r3, #34]
-    10b8:	e5d32026 	ldrb	r2, [r3, #38]
-    10bc:	e5d35001 	ldrb	r5, [r3, #1]
-    10c0:	e5d36019 	ldrb	r6, [r3, #25]
-    10c4:	e5d3e01d 	ldrb	lr, [r3, #29]
-    10c8:	e5d31005 	ldrb	r1, [r3, #5]
-    10cc:	e5d3c021 	ldrb	ip, [r3, #33]
-    10d0:	e5d30025 	ldrb	r0, [r3, #37]
-    10d4:	e58db03c 	str	fp, [sp, #60]
-    10d8:	e5d3b01b 	ldrb	fp, [r3, #27]
-    10dc:	e58db038 	str	fp, [sp, #56]
-    10e0:	e5d3b01f 	ldrb	fp, [r3, #31]
-    10e4:	e58db030 	str	fp, [sp, #48]
-    10e8:	e5d3b007 	ldrb	fp, [r3, #7]
-    10ec:	e58db028 	str	fp, [sp, #40]
-    10f0:	e5d3b023 	ldrb	fp, [r3, #35]
-    10f4:	e58db024 	str	fp, [sp, #36]
-    10f8:	e5d3b027 	ldrb	fp, [r3, #39]
-    10fc:	e58db01c 	str	fp, [sp, #28]
-    1100:	e1800402 	orr	r0, r0, r2, lsl #8
-    1104:	e5d3201c 	ldrb	r2, [r3, #28]
-    1108:	e5d3b000 	ldrb	fp, [r3]
-    110c:	e186640a 	orr	r6, r6, sl, lsl #8
-    1110:	e5d3a004 	ldrb	sl, [r3, #4]
-    1114:	e58d2034 	str	r2, [sp, #52]
-    1118:	e18cc404 	orr	ip, ip, r4, lsl #8
-    111c:	e5d34020 	ldrb	r4, [r3, #32]
-    1120:	e58d402c 	str	r4, [sp, #44]
-    1124:	e5d32024 	ldrb	r2, [r3, #36]
-    1128:	e1855409 	orr	r5, r5, r9, lsl #8
-    112c:	e5d39008 	ldrb	r9, [r3, #8]
-    1130:	e58d2020 	str	r2, [sp, #32]
-    1134:	e5d34028 	ldrb	r4, [r3, #40]
-    1138:	e59d203c 	ldr	r2, [sp, #60]
-    113c:	e58d4018 	str	r4, [sp, #24]
-    1140:	e59d4038 	ldr	r4, [sp, #56]
-    1144:	e1855802 	orr	r5, r5, r2, lsl #16
-    1148:	e1866804 	orr	r6, r6, r4, lsl #16
-    114c:	e59d2030 	ldr	r2, [sp, #48]
-    1150:	e59d4028 	ldr	r4, [sp, #40]
-    1154:	e18ee408 	orr	lr, lr, r8, lsl #8
-    1158:	e1811407 	orr	r1, r1, r7, lsl #8
-    115c:	e18ee802 	orr	lr, lr, r2, lsl #16
-    1160:	e1811804 	orr	r1, r1, r4, lsl #16
-    1164:	e59d2024 	ldr	r2, [sp, #36]
-    1168:	e1857c0a 	orr	r7, r5, sl, lsl #24
-    116c:	e1818c09 	orr	r8, r1, r9, lsl #24
-    1170:	e59d5034 	ldr	r5, [sp, #52]
-    1174:	e59d102c 	ldr	r1, [sp, #44]
-    1178:	e18cc802 	orr	ip, ip, r2, lsl #16
-    117c:	e59f24cc 	ldr	r2, [pc, #1228]	; 1650 <.text+0x1650>
-    1180:	e186ac05 	orr	sl, r6, r5, lsl #24
-    1184:	e18e5c01 	orr	r5, lr, r1, lsl #24
-    1188:	e59d1020 	ldr	r1, [sp, #32]
-    118c:	e582509c 	str	r5, [r2, #156]
-    1190:	e59d401c 	ldr	r4, [sp, #28]
-    1194:	e59f54b8 	ldr	r5, [pc, #1208]	; 1654 <.text+0x1654>
-    1198:	e18c6c01 	orr	r6, ip, r1, lsl #24
-    119c:	e59dc018 	ldr	ip, [sp, #24]
-    11a0:	e20b1001 	and	r1, fp, #1	; 0x1
-    11a4:	e5c51000 	strb	r1, [r5]
-    11a8:	e1800804 	orr	r0, r0, r4, lsl #16
-    11ac:	e59f54a4 	ldr	r5, [pc, #1188]	; 1658 <.text+0x1658>
-    11b0:	e1809c0c 	orr	r9, r0, ip, lsl #24
-    11b4:	e20bc004 	and	ip, fp, #4	; 0x4
-    11b8:	e5c5c000 	strb	ip, [r5]
-    11bc:	e59f4498 	ldr	r4, [pc, #1176]	; 165c <.text+0x165c>
-    11c0:	e59f1498 	ldr	r1, [pc, #1176]	; 1660 <.text+0x1660>
-    11c4:	e59fc498 	ldr	ip, [pc, #1176]	; 1664 <.text+0x1664>
-    11c8:	e20b0002 	and	r0, fp, #2	; 0x2
-    11cc:	e20be020 	and	lr, fp, #32	; 0x20
-    11d0:	e584909c 	str	r9, [r4, #156]
-    11d4:	e5c10000 	strb	r0, [r1]
-    11d8:	e5cce000 	strb	lr, [ip]
-    11dc:	e5827094 	str	r7, [r2, #148]
-    11e0:	e582a098 	str	sl, [r2, #152]
-    11e4:	e5848094 	str	r8, [r4, #148]
-    11e8:	e5846098 	str	r6, [r4, #152]
-    11ec:	e5827090 	str	r7, [r2, #144]
-    11f0:	e5848090 	str	r8, [r4, #144]
-    11f4:	e5d3a00b 	ldrb	sl, [r3, #11]
-    11f8:	e5d3800a 	ldrb	r8, [r3, #10]
-    11fc:	e5d3702a 	ldrb	r7, [r3, #42]
-    1200:	e5d36032 	ldrb	r6, [r3, #50]
-    1204:	e5d35016 	ldrb	r5, [r3, #22]
-    1208:	e5d3403e 	ldrb	r4, [r3, #62]
-    120c:	e5d31009 	ldrb	r1, [r3, #9]
-    1210:	e5d3e029 	ldrb	lr, [r3, #41]
-    1214:	e5d32031 	ldrb	r2, [r3, #49]
-    1218:	e5d3c015 	ldrb	ip, [r3, #21]
-    121c:	e5d3003d 	ldrb	r0, [r3, #61]
-    1220:	e58da014 	str	sl, [sp, #20]
-    1224:	e5d3a02b 	ldrb	sl, [r3, #43]
-    1228:	e58da010 	str	sl, [sp, #16]
-    122c:	e5d3a033 	ldrb	sl, [r3, #51]
-    1230:	e58da00c 	str	sl, [sp, #12]
-    1234:	e5d3a017 	ldrb	sl, [r3, #23]
-    1238:	e58da008 	str	sl, [sp, #8]
-    123c:	e5d3a03f 	ldrb	sl, [r3, #63]
-    1240:	e58da004 	str	sl, [sp, #4]
-    1244:	e1800404 	orr	r0, r0, r4, lsl #8
-    1248:	e5d34040 	ldrb	r4, [r3, #64]
-    124c:	e58d4000 	str	r4, [sp]
-    1250:	e18cc405 	orr	ip, ip, r5, lsl #8
-    1254:	e59d5014 	ldr	r5, [sp, #20]
-    1258:	e5d3a034 	ldrb	sl, [r3, #52]
-    125c:	e5d39018 	ldrb	r9, [r3, #24]
-    1260:	e1811408 	orr	r1, r1, r8, lsl #8
-    1264:	e18ee407 	orr	lr, lr, r7, lsl #8
-    1268:	e5d3802c 	ldrb	r8, [r3, #44]
-    126c:	e5d3700c 	ldrb	r7, [r3, #12]
-    1270:	e59d400c 	ldr	r4, [sp, #12]
-    1274:	e59d3010 	ldr	r3, [sp, #16]
-    1278:	e1811805 	orr	r1, r1, r5, lsl #16
-    127c:	e1822406 	orr	r2, r2, r6, lsl #8
-    1280:	e59d5008 	ldr	r5, [sp, #8]
-    1284:	e18ee803 	orr	lr, lr, r3, lsl #16
-    1288:	e1822804 	orr	r2, r2, r4, lsl #16
-    128c:	e59d3004 	ldr	r3, [sp, #4]
-    1290:	e18cc805 	orr	ip, ip, r5, lsl #16
-    1294:	e1815c07 	orr	r5, r1, r7, lsl #24
-    1298:	e1821c0a 	orr	r1, r2, sl, lsl #24
-    129c:	e59da000 	ldr	sl, [sp]
-    12a0:	e1800803 	orr	r0, r0, r3, lsl #16
-    12a4:	e59f43bc 	ldr	r4, [pc, #956]	; 1668 <.text+0x1668>
-    12a8:	e59f33bc 	ldr	r3, [pc, #956]	; 166c <.text+0x166c>
-    12ac:	e18e6c08 	orr	r6, lr, r8, lsl #24
-    12b0:	e1802c0a 	orr	r2, r0, sl, lsl #24
-    12b4:	e18cec09 	orr	lr, ip, r9, lsl #24
-    12b8:	e31b0080 	tst	fp, #128	; 0x80
-    12bc:	e583109c 	str	r1, [r3, #156]
-    12c0:	e5842018 	str	r2, [r4, #24]
-    12c4:	e5835094 	str	r5, [r3, #148]
-    12c8:	e5836098 	str	r6, [r3, #152]
-    12cc:	e584e014 	str	lr, [r4, #20]
-    12d0:	e5835090 	str	r5, [r3, #144]
-    12d4:	1a0000d9 	bne	1640 <processKF+0x5c8>
-    12d8:	e59fb384 	ldr	fp, [pc, #900]	; 1664 <.text+0x1664>
-    12dc:	eb0010e2 	bl	566c <KFilter>
-    12e0:	e5db3000 	ldrb	r3, [fp]
-    12e4:	e3530000 	cmp	r3, #0	; 0x0
-    12e8:	0a000060 	beq	1470 <processKF+0x3f8>
-    12ec:	e59f337c 	ldr	r3, [pc, #892]	; 1670 <.text+0x1670>
-    12f0:	e5932018 	ldr	r2, [r3, #24]
-    12f4:	e59f6378 	ldr	r6, [pc, #888]	; 1674 <.text+0x1674>
-    12f8:	e1a03422 	mov	r3, r2, lsr #8
-    12fc:	e1a00c22 	mov	r0, r2, lsr #24
-    1300:	e1a01822 	mov	r1, r2, lsr #16
-    1304:	e5c63021 	strb	r3, [r6, #33]
-    1308:	e5c61022 	strb	r1, [r6, #34]
-    130c:	e5c60023 	strb	r0, [r6, #35]
-    1310:	e5c62020 	strb	r2, [r6, #32]
-    1314:	e59fc338 	ldr	ip, [pc, #824]	; 1654 <.text+0x1654>
-    1318:	e5dc3000 	ldrb	r3, [ip]
-    131c:	e3530000 	cmp	r3, #0	; 0x0
-    1320:	0a000066 	beq	14c0 <processKF+0x448>
-    1324:	e59f3344 	ldr	r3, [pc, #836]	; 1670 <.text+0x1670>
-    1328:	e593100c 	ldr	r1, [r3, #12]
-    132c:	e5932000 	ldr	r2, [r3]
-    1330:	e1a05c21 	mov	r5, r1, lsr #24
-    1334:	e1a03422 	mov	r3, r2, lsr #8
-    1338:	e1a0c421 	mov	ip, r1, lsr #8
-    133c:	e1a0e821 	mov	lr, r1, lsr #16
-    1340:	e1a04c22 	mov	r4, r2, lsr #24
-    1344:	e1a00822 	mov	r0, r2, lsr #16
-    1348:	e5c6100c 	strb	r1, [r6, #12]
-    134c:	e5c63001 	strb	r3, [r6, #1]
-    1350:	e5c60002 	strb	r0, [r6, #2]
-    1354:	e5c64003 	strb	r4, [r6, #3]
-    1358:	e5c6c00d 	strb	ip, [r6, #13]
-    135c:	e5c6e00e 	strb	lr, [r6, #14]
-    1360:	e5c6500f 	strb	r5, [r6, #15]
-    1364:	e5c62000 	strb	r2, [r6]
-    1368:	e59f12f0 	ldr	r1, [pc, #752]	; 1660 <.text+0x1660>
-    136c:	e5d13000 	ldrb	r3, [r1]
-    1370:	e3530000 	cmp	r3, #0	; 0x0
-    1374:	0a000072 	beq	1544 <processKF+0x4cc>
-    1378:	e59f32f0 	ldr	r3, [pc, #752]	; 1670 <.text+0x1670>
-    137c:	e5931010 	ldr	r1, [r3, #16]
-    1380:	e5932004 	ldr	r2, [r3, #4]
-    1384:	e1a05c21 	mov	r5, r1, lsr #24
-    1388:	e1a03422 	mov	r3, r2, lsr #8
-    138c:	e1a04c22 	mov	r4, r2, lsr #24
-    1390:	e1a00822 	mov	r0, r2, lsr #16
-    1394:	e1a0c421 	mov	ip, r1, lsr #8
-    1398:	e1a0e821 	mov	lr, r1, lsr #16
-    139c:	e5c62004 	strb	r2, [r6, #4]
-    13a0:	e5c63005 	strb	r3, [r6, #5]
-    13a4:	e5c60006 	strb	r0, [r6, #6]
-    13a8:	e5c64007 	strb	r4, [r6, #7]
-    13ac:	e5c6c011 	strb	ip, [r6, #17]
-    13b0:	e5c6e012 	strb	lr, [r6, #18]
-    13b4:	e5c65013 	strb	r5, [r6, #19]
-    13b8:	e5c61010 	strb	r1, [r6, #16]
-    13bc:	e59f2294 	ldr	r2, [pc, #660]	; 1658 <.text+0x1658>
-    13c0:	e5d23000 	ldrb	r3, [r2]
-    13c4:	e3530000 	cmp	r3, #0	; 0x0
-    13c8:	0a00007e 	beq	15c8 <processKF+0x550>
-    13cc:	e59f329c 	ldr	r3, [pc, #668]	; 1670 <.text+0x1670>
-    13d0:	e5931014 	ldr	r1, [r3, #20]
-    13d4:	e5932008 	ldr	r2, [r3, #8]
-    13d8:	e1a05c21 	mov	r5, r1, lsr #24
-    13dc:	e1a04c22 	mov	r4, r2, lsr #24
-    13e0:	e1a03422 	mov	r3, r2, lsr #8
-    13e4:	e1a00822 	mov	r0, r2, lsr #16
-    13e8:	e1a0c421 	mov	ip, r1, lsr #8
-    13ec:	e1a0e821 	mov	lr, r1, lsr #16
-    13f0:	e5c63009 	strb	r3, [r6, #9]
-    13f4:	e5c6000a 	strb	r0, [r6, #10]
-    13f8:	e5c6400b 	strb	r4, [r6, #11]
-    13fc:	e5c6c015 	strb	ip, [r6, #21]
-    1400:	e5c6e016 	strb	lr, [r6, #22]
-    1404:	e5c65017 	strb	r5, [r6, #23]
-    1408:	e5c62008 	strb	r2, [r6, #8]
-    140c:	e5c61014 	strb	r1, [r6, #20]
-    1410:	e59f4260 	ldr	r4, [pc, #608]	; 1678 <.text+0x1678>
-    1414:	e1d400f4 	ldrsh	r0, [r4, #4]
-    1418:	eb0008e8 	bl	37c0 <LLToSIAngleRoll>
-    141c:	e1a03000 	mov	r3, r0
-    1420:	e1a02423 	mov	r2, r3, lsr #8
-    1424:	e1a01823 	mov	r1, r3, lsr #16
-    1428:	e1a0cc20 	mov	ip, r0, lsr #24
-    142c:	e1d400f2 	ldrsh	r0, [r4, #2]
-    1430:	e5c62019 	strb	r2, [r6, #25]
-    1434:	e5c6101a 	strb	r1, [r6, #26]
-    1438:	e5c63018 	strb	r3, [r6, #24]
-    143c:	e5c6c01b 	strb	ip, [r6, #27]
-    1440:	eb000958 	bl	39a8 <LLToSIAnglePitch>
-    1444:	e1a03000 	mov	r3, r0
-    1448:	e1a02c20 	mov	r2, r0, lsr #24
-    144c:	e1a01420 	mov	r1, r0, lsr #8
-    1450:	e1a00820 	mov	r0, r0, lsr #16
-    1454:	e5c6201f 	strb	r2, [r6, #31]
-    1458:	e5c6101d 	strb	r1, [r6, #29]
-    145c:	e5c6001e 	strb	r0, [r6, #30]
-    1460:	e5c6301c 	strb	r3, [r6, #28]
-    1464:	e28dd040 	add	sp, sp, #64	; 0x40
-    1468:	e8bd4ff0 	ldmia	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
-    146c:	e12fff1e 	bx	lr
-    1470:	e59f2204 	ldr	r2, [pc, #516]	; 167c <.text+0x167c>
-    1474:	e5d21011 	ldrb	r1, [r2, #17]
-    1478:	e5d23010 	ldrb	r3, [r2, #16]
-    147c:	e5d2c012 	ldrb	ip, [r2, #18]
-    1480:	e5d20013 	ldrb	r0, [r2, #19]
-    1484:	e1833401 	orr	r3, r3, r1, lsl #8
-    1488:	e183380c 	orr	r3, r3, ip, lsl #16
-    148c:	e1833c00 	orr	r3, r3, r0, lsl #24
-    1490:	e59f61dc 	ldr	r6, [pc, #476]	; 1674 <.text+0x1674>
-    1494:	e1a00c23 	mov	r0, r3, lsr #24
-    1498:	e1a02423 	mov	r2, r3, lsr #8
-    149c:	e1a01823 	mov	r1, r3, lsr #16
-    14a0:	e5c62021 	strb	r2, [r6, #33]
-    14a4:	e5c61022 	strb	r1, [r6, #34]
-    14a8:	e5c60023 	strb	r0, [r6, #35]
-    14ac:	e5c63020 	strb	r3, [r6, #32]
-    14b0:	e59fc19c 	ldr	ip, [pc, #412]	; 1654 <.text+0x1654>
-    14b4:	e5dc3000 	ldrb	r3, [ip]
-    14b8:	e3530000 	cmp	r3, #0	; 0x0
-    14bc:	1affff98 	bne	1324 <processKF+0x2ac>
-    14c0:	e59f31b4 	ldr	r3, [pc, #436]	; 167c <.text+0x167c>
-    14c4:	e5d3c001 	ldrb	ip, [r3, #1]
-    14c8:	e5d30009 	ldrb	r0, [r3, #9]
-    14cc:	e5d31000 	ldrb	r1, [r3]
-    14d0:	e5d32008 	ldrb	r2, [r3, #8]
-    14d4:	e5d3e002 	ldrb	lr, [r3, #2]
-    14d8:	e5d3400a 	ldrb	r4, [r3, #10]
-    14dc:	e181140c 	orr	r1, r1, ip, lsl #8
-    14e0:	e1822400 	orr	r2, r2, r0, lsl #8
-    14e4:	e5d3c00b 	ldrb	ip, [r3, #11]
-    14e8:	e5d30003 	ldrb	r0, [r3, #3]
-    14ec:	e181180e 	orr	r1, r1, lr, lsl #16
-    14f0:	e1822804 	orr	r2, r2, r4, lsl #16
-    14f4:	e1811c00 	orr	r1, r1, r0, lsl #24
-    14f8:	e1822c0c 	orr	r2, r2, ip, lsl #24
-    14fc:	e1a03421 	mov	r3, r1, lsr #8
-    1500:	e1a04c21 	mov	r4, r1, lsr #24
-    1504:	e1a00821 	mov	r0, r1, lsr #16
-    1508:	e1a05c22 	mov	r5, r2, lsr #24
-    150c:	e1a0c422 	mov	ip, r2, lsr #8
-    1510:	e1a0e822 	mov	lr, r2, lsr #16
-    1514:	e5c61000 	strb	r1, [r6]
-    1518:	e5c63001 	strb	r3, [r6, #1]
-    151c:	e5c60002 	strb	r0, [r6, #2]
-    1520:	e5c64003 	strb	r4, [r6, #3]
-    1524:	e5c6c00d 	strb	ip, [r6, #13]
-    1528:	e5c6e00e 	strb	lr, [r6, #14]
-    152c:	e5c6500f 	strb	r5, [r6, #15]
-    1530:	e5c6200c 	strb	r2, [r6, #12]
-    1534:	e59f1124 	ldr	r1, [pc, #292]	; 1660 <.text+0x1660>
-    1538:	e5d13000 	ldrb	r3, [r1]
-    153c:	e3530000 	cmp	r3, #0	; 0x0
-    1540:	1affff8c 	bne	1378 <processKF+0x300>
-    1544:	e59f3130 	ldr	r3, [pc, #304]	; 167c <.text+0x167c>
-    1548:	e5d3c005 	ldrb	ip, [r3, #5]
-    154c:	e5d3000d 	ldrb	r0, [r3, #13]
-    1550:	e5d31004 	ldrb	r1, [r3, #4]
-    1554:	e5d3200c 	ldrb	r2, [r3, #12]
-    1558:	e5d3e006 	ldrb	lr, [r3, #6]
-    155c:	e5d3400e 	ldrb	r4, [r3, #14]
-    1560:	e181140c 	orr	r1, r1, ip, lsl #8
-    1564:	e1822400 	orr	r2, r2, r0, lsl #8
-    1568:	e5d3c00f 	ldrb	ip, [r3, #15]
-    156c:	e5d30007 	ldrb	r0, [r3, #7]
-    1570:	e181180e 	orr	r1, r1, lr, lsl #16
-    1574:	e1822804 	orr	r2, r2, r4, lsl #16
-    1578:	e1822c0c 	orr	r2, r2, ip, lsl #24
-    157c:	e1811c00 	orr	r1, r1, r0, lsl #24
-    1580:	e1a05c22 	mov	r5, r2, lsr #24
-    1584:	e1a03421 	mov	r3, r1, lsr #8
-    1588:	e1a0c422 	mov	ip, r2, lsr #8
-    158c:	e1a0e822 	mov	lr, r2, lsr #16
-    1590:	e1a04c21 	mov	r4, r1, lsr #24
-    1594:	e1a00821 	mov	r0, r1, lsr #16
-    1598:	e5c62010 	strb	r2, [r6, #16]
-    159c:	e5c63005 	strb	r3, [r6, #5]
-    15a0:	e5c60006 	strb	r0, [r6, #6]
-    15a4:	e5c64007 	strb	r4, [r6, #7]
-    15a8:	e5c6c011 	strb	ip, [r6, #17]
-    15ac:	e5c6e012 	strb	lr, [r6, #18]
-    15b0:	e5c65013 	strb	r5, [r6, #19]
-    15b4:	e5c61004 	strb	r1, [r6, #4]
-    15b8:	e59f2098 	ldr	r2, [pc, #152]	; 1658 <.text+0x1658>
-    15bc:	e5d23000 	ldrb	r3, [r2]
-    15c0:	e3530000 	cmp	r3, #0	; 0x0
-    15c4:	1affff80 	bne	13cc <processKF+0x354>
-    15c8:	e59f30b0 	ldr	r3, [pc, #176]	; 1680 <.text+0x1680>
-    15cc:	e5d3c001 	ldrb	ip, [r3, #1]
-    15d0:	e5d30005 	ldrb	r0, [r3, #5]
-    15d4:	e5d31000 	ldrb	r1, [r3]
-    15d8:	e5d32004 	ldrb	r2, [r3, #4]
-    15dc:	e5d3e002 	ldrb	lr, [r3, #2]
-    15e0:	e5d34006 	ldrb	r4, [r3, #6]
-    15e4:	e181140c 	orr	r1, r1, ip, lsl #8
-    15e8:	e1822400 	orr	r2, r2, r0, lsl #8
-    15ec:	e5d3c007 	ldrb	ip, [r3, #7]
-    15f0:	e5d30003 	ldrb	r0, [r3, #3]
-    15f4:	e181180e 	orr	r1, r1, lr, lsl #16
-    15f8:	e1822804 	orr	r2, r2, r4, lsl #16
-    15fc:	e1811c00 	orr	r1, r1, r0, lsl #24
-    1600:	e1822c0c 	orr	r2, r2, ip, lsl #24
-    1604:	e1a04c21 	mov	r4, r1, lsr #24
-    1608:	e1a05c22 	mov	r5, r2, lsr #24
-    160c:	e1a03421 	mov	r3, r1, lsr #8
-    1610:	e1a00821 	mov	r0, r1, lsr #16
-    1614:	e1a0c422 	mov	ip, r2, lsr #8
-    1618:	e1a0e822 	mov	lr, r2, lsr #16
-    161c:	e5c63009 	strb	r3, [r6, #9]
-    1620:	e5c6000a 	strb	r0, [r6, #10]
-    1624:	e5c6400b 	strb	r4, [r6, #11]
-    1628:	e5c6c015 	strb	ip, [r6, #21]
-    162c:	e5c6e016 	strb	lr, [r6, #22]
-    1630:	e5c65017 	strb	r5, [r6, #23]
-    1634:	e5c61008 	strb	r1, [r6, #8]
-    1638:	e5c62014 	strb	r2, [r6, #20]
-    163c:	eaffff73 	b	1410 <processKF+0x398>
-    1640:	eb000f6c 	bl	53f8 <resetKalmanFilter>
-    1644:	eaffff23 	b	12d8 <processKF+0x260>
-    1648:	400010b0 	strmih	r1, [r0], -r0
-    164c:	40000fe1 	andmi	r0, r0, r1, ror #31
-    1650:	40000d0c 	andmi	r0, r0, ip, lsl #26
-    1654:	40001039 	andmi	r1, r0, r9, lsr r0
-    1658:	40000eec 	andmi	r0, r0, ip, ror #29
-    165c:	40000bf4 	strmid	r0, [r0], -r4
-    1660:	400011f0 	strmid	r1, [r0], -r0
-    1664:	400011f1 	strmid	r1, [r0], -r1
-    1668:	40000bc8 	andmi	r0, r0, r8, asr #23
-    166c:	40000dd0 	ldrmid	r0, [r0], -r0
-    1670:	40000cf0 	strmid	r0, [r0], -r0
-    1674:	40001194 	mulmi	r0, r4, r1
-    1678:	40000b34 	andmi	r0, r0, r4, lsr fp
-    167c:	400011b9 	strmih	r1, [r0], -r9
-    1680:	400011e8 	andmi	r1, r0, r8, ror #3
-
-00001684 <sendCtrlDebugData>:
-    1684:	e92d47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
-    1688:	e59f5138 	ldr	r5, [pc, #312]	; 17c8 <.text+0x17c8>
-    168c:	e5d52005 	ldrb	r2, [r5, #5]
-    1690:	e5d50004 	ldrb	r0, [r5, #4]
-    1694:	e59f3130 	ldr	r3, [pc, #304]	; 17cc <.text+0x17cc>
-    1698:	e5d51006 	ldrb	r1, [r5, #6]
-    169c:	e5d5a007 	ldrb	sl, [r5, #7]
-    16a0:	e1800402 	orr	r0, r0, r2, lsl #8
-    16a4:	e59f4124 	ldr	r4, [pc, #292]	; 17d0 <.text+0x17d0>
-    16a8:	e5d3e001 	ldrb	lr, [r3, #1]
-    16ac:	e5d39007 	ldrb	r9, [r3, #7]
-    16b0:	e5d32002 	ldrb	r2, [r3, #2]
-    16b4:	e5d3c000 	ldrb	ip, [r3]
-    16b8:	e5d36004 	ldrb	r6, [r3, #4]
-    16bc:	e5d37005 	ldrb	r7, [r3, #5]
-    16c0:	e5d38006 	ldrb	r8, [r3, #6]
-    16c4:	e1800801 	orr	r0, r0, r1, lsl #16
-    16c8:	e5d31003 	ldrb	r1, [r3, #3]
-    16cc:	e1800c0a 	orr	r0, r0, sl, lsl #24
-    16d0:	e5c4e003 	strb	lr, [r4, #3]
-    16d4:	e5c42000 	strb	r2, [r4]
-    16d8:	e5c41001 	strb	r1, [r4, #1]
-    16dc:	e5c4c002 	strb	ip, [r4, #2]
-    16e0:	e5c46004 	strb	r6, [r4, #4]
-    16e4:	e5c47005 	strb	r7, [r4, #5]
-    16e8:	e5c48006 	strb	r8, [r4, #6]
-    16ec:	e5c49007 	strb	r9, [r4, #7]
-    16f0:	eb000801 	bl	36fc <SIToLLCmdRoll>
-    16f4:	e5d51009 	ldrb	r1, [r5, #9]
-    16f8:	e5d52008 	ldrb	r2, [r5, #8]
-    16fc:	e5d5c00a 	ldrb	ip, [r5, #10]
-    1700:	e1822401 	orr	r2, r2, r1, lsl #8
-    1704:	e1a03800 	mov	r3, r0, lsl #16
-    1708:	e5d5000b 	ldrb	r0, [r5, #11]
-    170c:	e182280c 	orr	r2, r2, ip, lsl #16
-    1710:	e2633000 	rsb	r3, r3, #0	; 0x0
-    1714:	e1a01c23 	mov	r1, r3, lsr #24
-    1718:	e1820c00 	orr	r0, r2, r0, lsl #24
-    171c:	e1a03823 	mov	r3, r3, lsr #16
-    1720:	e5c43018 	strb	r3, [r4, #24]
-    1724:	e5c41019 	strb	r1, [r4, #25]
-    1728:	eb000800 	bl	3730 <SIToLLCmdPitch>
-    172c:	e5d5200d 	ldrb	r2, [r5, #13]
-    1730:	e5d5300c 	ldrb	r3, [r5, #12]
-    1734:	e5d5100e 	ldrb	r1, [r5, #14]
-    1738:	e5d5c00f 	ldrb	ip, [r5, #15]
-    173c:	e1833402 	orr	r3, r3, r2, lsl #8
-    1740:	e1833801 	orr	r3, r3, r1, lsl #16
-    1744:	e1a02420 	mov	r2, r0, lsr #8
-    1748:	e5c4001a 	strb	r0, [r4, #26]
-    174c:	e1830c0c 	orr	r0, r3, ip, lsl #24
-    1750:	e5c4201b 	strb	r2, [r4, #27]
-    1754:	eb000801 	bl	3760 <SIToLLCmdYawRate>
-    1758:	e5d52011 	ldrb	r2, [r5, #17]
-    175c:	e5d53010 	ldrb	r3, [r5, #16]
-    1760:	e5d51012 	ldrb	r1, [r5, #18]
-    1764:	e5d5c013 	ldrb	ip, [r5, #19]
-    1768:	e1833402 	orr	r3, r3, r2, lsl #8
-    176c:	e1833801 	orr	r3, r3, r1, lsl #16
-    1770:	e1a02420 	mov	r2, r0, lsr #8
-    1774:	e5c4001c 	strb	r0, [r4, #28]
-    1778:	e1830c0c 	orr	r0, r3, ip, lsl #24
-    177c:	e5c4201d 	strb	r2, [r4, #29]
-    1780:	eb000802 	bl	3790 <SIToLLCmdThrust>
-    1784:	e5d57003 	ldrb	r7, [r5, #3]
-    1788:	e5d5c000 	ldrb	ip, [r5]
-    178c:	e5d5e001 	ldrb	lr, [r5, #1]
-    1790:	e5d56002 	ldrb	r6, [r5, #2]
-    1794:	e1a03420 	mov	r3, r0, lsr #8
-    1798:	e5c4001e 	strb	r0, [r4, #30]
-    179c:	e1a01004 	mov	r1, r4
-    17a0:	e3a02072 	mov	r2, #114	; 0x72
-    17a4:	e3a00012 	mov	r0, #18	; 0x12
-    17a8:	e5c4301f 	strb	r3, [r4, #31]
-    17ac:	e5c4c04a 	strb	ip, [r4, #74]
-    17b0:	e5c4e04b 	strb	lr, [r4, #75]
-    17b4:	e5c4604c 	strb	r6, [r4, #76]
-    17b8:	e5c4704d 	strb	r7, [r4, #77]
-    17bc:	eb001d8c 	bl	8df4 <writePacket2Ringbuffer>
-    17c0:	e8bd47f0 	ldmia	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
-    17c4:	e12fff1e 	bx	lr
-    17c8:	4000103a 	andmi	r1, r0, sl, lsr r0
-    17cc:	40000ef0 	strmid	r0, [r0], -r0
-    17d0:	40000efc 	strmid	r0, [r0], -ip
-
-000017d4 <sendStatusData>:
-    17d4:	e52de004 	str	lr, [sp, #-4]!
-    17d8:	e59f1010 	ldr	r1, [pc, #16]	; 17f0 <.text+0x17f0>
-    17dc:	e3a02018 	mov	r2, #24	; 0x18
-    17e0:	e3a0000d 	mov	r0, #13	; 0xd
-    17e4:	eb001d82 	bl	8df4 <writePacket2Ringbuffer>
-    17e8:	e49de004 	ldr	lr, [sp], #4
-    17ec:	e12fff1e 	bx	lr
-    17f0:	40001080 	andmi	r1, r0, r0, lsl #1
-
-000017f4 <sendRcData>:
-    17f4:	e52de004 	str	lr, [sp, #-4]!
-    17f8:	e59f0040 	ldr	r0, [pc, #64]	; 1840 <.text+0x1840>
-    17fc:	e59f1040 	ldr	r1, [pc, #64]	; 1844 <.text+0x1844>
-    1800:	e3a0c000 	mov	ip, #0	; 0x0
-    1804:	e5d03000 	ldrb	r3, [r0]
-    1808:	e5d02001 	ldrb	r2, [r0, #1]
-    180c:	e28cc001 	add	ip, ip, #1	; 0x1
-    1810:	e35c0008 	cmp	ip, #8	; 0x8
-    1814:	e5c13008 	strb	r3, [r1, #8]
-    1818:	e5c12009 	strb	r2, [r1, #9]
-    181c:	e2800002 	add	r0, r0, #2	; 0x2
-    1820:	e2811002 	add	r1, r1, #2	; 0x2
-    1824:	1afffff6 	bne	1804 <sendRcData+0x10>
-    1828:	e59f1014 	ldr	r1, [pc, #20]	; 1844 <.text+0x1844>
-    182c:	e3a02018 	mov	r2, #24	; 0x18
-    1830:	e3a0000b 	mov	r0, #11	; 0xb
-    1834:	eb001d6e 	bl	8df4 <writePacket2Ringbuffer>
-    1838:	e49de004 	ldr	lr, [sp], #4
-    183c:	e12fff1e 	bx	lr
-    1840:	40001098 	mulmi	r0, r8, r0
-    1844:	40000fc8 	andmi	r0, r0, r8, asr #31
-
-00001848 <sendFlightStateData>:
-    1848:	e52de004 	str	lr, [sp, #-4]!
-    184c:	e59f1010 	ldr	r1, [pc, #16]	; 1864 <.text+0x1864>
-    1850:	e3a02001 	mov	r2, #1	; 0x1
-    1854:	e3a00009 	mov	r0, #9	; 0x9
-    1858:	eb001d65 	bl	8df4 <writePacket2Ringbuffer>
-    185c:	e49de004 	ldr	lr, [sp], #4
-    1860:	e12fff1e 	bx	lr
-    1864:	40001038 	andmi	r1, r0, r8, lsr r0
-
-00001868 <sendMavPoseData>:
-    1868:	e52de004 	str	lr, [sp, #-4]!
-    186c:	e59f1010 	ldr	r1, [pc, #16]	; 1884 <.text+0x1884>
-    1870:	e3a02024 	mov	r2, #36	; 0x24
-    1874:	e3a00007 	mov	r0, #7	; 0x7
-    1878:	eb001d5d 	bl	8df4 <writePacket2Ringbuffer>
-    187c:	e49de004 	ldr	lr, [sp], #4
-    1880:	e12fff1e 	bx	lr
-    1884:	40001194 	mulmi	r0, r4, r1
-
-00001888 <synchronizeTime>:
-    1888:	e92d4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
-    188c:	e59f33bc 	ldr	r3, [pc, #956]	; 1c50 <.text+0x1c50>
-    1890:	e5933000 	ldr	r3, [r3]
-    1894:	e24dd018 	sub	sp, sp, #24	; 0x18
-    1898:	e58d300c 	str	r3, [sp, #12]
-    189c:	e5d32008 	ldrb	r2, [r3, #8]
-    18a0:	e3520000 	cmp	r2, #0	; 0x0
-    18a4:	059f23a8 	ldreq	r2, [pc, #936]	; 1c54 <.text+0x1c54>
-    18a8:	0a000078 	beq	1a90 <synchronizeTime+0x208>
-    18ac:	e59f03a4 	ldr	r0, [pc, #932]	; 1c58 <.text+0x1c58>
-    18b0:	e5903000 	ldr	r3, [r0]
-    18b4:	e3a01fe1 	mov	r1, #900	; 0x384
-    18b8:	e0854193 	umull	r4, r5, r3, r1
-    18bc:	e5902004 	ldr	r2, [r0, #4]
-    18c0:	e98d0030 	stmib	sp, {r4, r5}
-    18c4:	e0255192 	mla	r5, r2, r1, r5
-    18c8:	e59f338c 	ldr	r3, [pc, #908]	; 1c5c <.text+0x1c5c>
-    18cc:	e58d5008 	str	r5, [sp, #8]
-    18d0:	e5d32009 	ldrb	r2, [r3, #9]
-    18d4:	e5d31008 	ldrb	r1, [r3, #8]
-    18d8:	e1811402 	orr	r1, r1, r2, lsl #8
-    18dc:	e5d32002 	ldrb	r2, [r3, #2]
-    18e0:	e5d3500a 	ldrb	r5, [r3, #10]
-    18e4:	e5d3400d 	ldrb	r4, [r3, #13]
-    18e8:	e5d3c00c 	ldrb	ip, [r3, #12]
-    18ec:	e5d3e001 	ldrb	lr, [r3, #1]
-    18f0:	e5d3b00b 	ldrb	fp, [r3, #11]
-    18f4:	e5d3a00e 	ldrb	sl, [r3, #14]
-    18f8:	e5d30000 	ldrb	r0, [r3]
-    18fc:	e58d2000 	str	r2, [sp]
-    1900:	e1811805 	orr	r1, r1, r5, lsl #16
-    1904:	e181bc0b 	orr	fp, r1, fp, lsl #24
-    1908:	e18cc404 	orr	ip, ip, r4, lsl #8
-    190c:	e5d3400f 	ldrb	r4, [r3, #15]
-    1910:	e59d1000 	ldr	r1, [sp]
-    1914:	e5d36005 	ldrb	r6, [r3, #5]
-    1918:	e5d35006 	ldrb	r5, [r3, #6]
-    191c:	e5d32004 	ldrb	r2, [r3, #4]
-    1920:	e18cc80a 	orr	ip, ip, sl, lsl #16
-    1924:	e180040e 	orr	r0, r0, lr, lsl #8
-    1928:	e5d3e003 	ldrb	lr, [r3, #3]
-    192c:	e58db010 	str	fp, [sp, #16]
-    1930:	e18c4c04 	orr	r4, ip, r4, lsl #24
-    1934:	e1800801 	orr	r0, r0, r1, lsl #16
-    1938:	e1822406 	orr	r2, r2, r6, lsl #8
-    193c:	e5d31007 	ldrb	r1, [r3, #7]
-    1940:	e58d4014 	str	r4, [sp, #20]
-    1944:	e1822805 	orr	r2, r2, r5, lsl #16
-    1948:	e28d5010 	add	r5, sp, #16	; 0x10
-    194c:	e8950060 	ldmia	r5, {r5, r6}
-    1950:	e59fb308 	ldr	fp, [pc, #776]	; 1c60 <.text+0x1c60>
-    1954:	e0955005 	adds	r5, r5, r5
-    1958:	e89b0018 	ldmia	fp, {r3, r4}
-    195c:	e1807c0e 	orr	r7, r0, lr, lsl #24
-    1960:	e1828c01 	orr	r8, r2, r1, lsl #24
-    1964:	e0a66006 	adc	r6, r6, r6
-    1968:	e0555007 	subs	r5, r5, r7
-    196c:	e0c66008 	sbc	r6, r6, r8
-    1970:	e0555003 	subs	r5, r5, r3
-    1974:	e0c66004 	sbc	r6, r6, r4
-    1978:	e0951005 	adds	r1, r5, r5
-    197c:	e0a62006 	adc	r2, r6, r6
-    1980:	e0911005 	adds	r1, r1, r5
-    1984:	e0a22006 	adc	r2, r2, r6
-    1988:	e1a04182 	mov	r4, r2, lsl #3
-    198c:	e1a03181 	mov	r3, r1, lsl #3
-    1990:	e0933005 	adds	r3, r3, r5
-    1994:	e1844ea1 	orr	r4, r4, r1, lsr #29
-    1998:	e99d0003 	ldmib	sp, {r0, r1}
-    199c:	e0a44006 	adc	r4, r4, r6
-    19a0:	e0937003 	adds	r7, r3, r3
-    19a4:	e0a48004 	adc	r8, r4, r4
-    19a8:	e0900007 	adds	r0, r0, r7
-    19ac:	e0a11008 	adc	r1, r1, r8
-    19b0:	e3a02ffa 	mov	r2, #1000	; 0x3e8
-    19b4:	e3a03000 	mov	r3, #0	; 0x0
-    19b8:	eb004c8e 	bl	14bf8 <____divdi3_from_arm>
-    19bc:	e59f32a0 	ldr	r3, [pc, #672]	; 1c64 <.text+0x1c64>
-    19c0:	e1a04c20 	mov	r4, r0, lsr #24
-    19c4:	e5c3400b 	strb	r4, [r3, #11]
-    19c8:	e59f4288 	ldr	r4, [pc, #648]	; 1c58 <.text+0x1c58>
-    19cc:	e1a07000 	mov	r7, r0
-    19d0:	e1a08001 	mov	r8, r1
-    19d4:	e1a0c420 	mov	ip, r0, lsr #8
-    19d8:	e1a0e820 	mov	lr, r0, lsr #16
-    19dc:	e1a05421 	mov	r5, r1, lsr #8
-    19e0:	e1a02c21 	mov	r2, r1, lsr #24
-    19e4:	e1a06821 	mov	r6, r1, lsr #16
-    19e8:	e5c3200f 	strb	r2, [r3, #15]
-    19ec:	e5c3c009 	strb	ip, [r3, #9]
-    19f0:	e5c3e00a 	strb	lr, [r3, #10]
-    19f4:	e5c3500d 	strb	r5, [r3, #13]
-    19f8:	e5c3600e 	strb	r6, [r3, #14]
-    19fc:	e8840180 	stmia	r4, {r7, r8}
-    1a00:	e5c37008 	strb	r7, [r3, #8]
-    1a04:	e5c3800c 	strb	r8, [r3, #12]
-    1a08:	eb0047c9 	bl	13934 <__aeabi_l2d>
-    1a0c:	e59f2254 	ldr	r2, [pc, #596]	; 1c68 <.text+0x1c68>
-    1a10:	e3a03000 	mov	r3, #0	; 0x0
-    1a14:	e1a04000 	mov	r4, r0
-    1a18:	e1a05001 	mov	r5, r1
-    1a1c:	eb004906 	bl	13e3c <__gedf2>
-    1a20:	e3500000 	cmp	r0, #0	; 0x0
-    1a24:	da000050 	ble	1b6c <synchronizeTime+0x2e4>
-    1a28:	e28d0010 	add	r0, sp, #16	; 0x10
-    1a2c:	e8900003 	ldmia	r0, {r0, r1}
-    1a30:	e59f3220 	ldr	r3, [pc, #544]	; 1c58 <.text+0x1c58>
-    1a34:	e88b0003 	stmia	fp, {r0, r1}
-    1a38:	e3a02000 	mov	r2, #0	; 0x0
-    1a3c:	e3a01000 	mov	r1, #0	; 0x0
-    1a40:	e8830006 	stmia	r3, {r1, r2}
-    1a44:	e59f120c 	ldr	r1, [pc, #524]	; 1c58 <.text+0x1c58>
-    1a48:	e8910180 	ldmia	r1, {r7, r8}
-    1a4c:	e1971008 	orrs	r1, r7, r8
-    1a50:	0a00005a 	beq	1bc0 <synchronizeTime+0x338>
-    1a54:	e3a00483 	mov	r0, #-2097152000	; 0x83000000
-    1a58:	e1a02007 	mov	r2, r7
-    1a5c:	e1a03008 	mov	r3, r8
-    1a60:	e1a009c0 	mov	r0, r0, asr #19
-    1a64:	e3e01000 	mvn	r1, #0	; 0x0
-    1a68:	eb004c62 	bl	14bf8 <____divdi3_from_arm>
-    1a6c:	e59f31f8 	ldr	r3, [pc, #504]	; 1c6c <.text+0x1c6c>
-    1a70:	e59f21dc 	ldr	r2, [pc, #476]	; 1c54 <.text+0x1c54>
-    1a74:	e3e04000 	mvn	r4, #0	; 0x0
-    1a78:	e3e05000 	mvn	r5, #0	; 0x0
-    1a7c:	e8830030 	stmia	r3, {r4, r5}
-    1a80:	e1c200b0 	strh	r0, [r2]
-    1a84:	e59d400c 	ldr	r4, [sp, #12]
-    1a88:	e3a03000 	mov	r3, #0	; 0x0
-    1a8c:	e5c43008 	strb	r3, [r4, #8]
-    1a90:	e59f31d8 	ldr	r3, [pc, #472]	; 1c70 <.text+0x1c70>
-    1a94:	e5935000 	ldr	r5, [r3]
-    1a98:	e1d210b0 	ldrh	r1, [r2]
-    1a9c:	e1a00005 	mov	r0, r5
-    1aa0:	eb004c51 	bl	14bec <____umodsi3_from_arm>
-    1aa4:	e3500000 	cmp	r0, #0	; 0x0
-    1aa8:	1a000006 	bne	1ac8 <synchronizeTime+0x240>
-    1aac:	e59fc1ac 	ldr	ip, [pc, #428]	; 1c60 <.text+0x1c60>
-    1ab0:	e59f21b4 	ldr	r2, [pc, #436]	; 1c6c <.text+0x1c6c>
-    1ab4:	e89c0018 	ldmia	ip, {r3, r4}
-    1ab8:	e8920003 	ldmia	r2, {r0, r1}
-    1abc:	e0933000 	adds	r3, r3, r0
-    1ac0:	e0a44001 	adc	r4, r4, r1
-    1ac4:	e88c0018 	stmia	ip, {r3, r4}
-    1ac8:	e59f31a4 	ldr	r3, [pc, #420]	; 1c74 <.text+0x1c74>
-    1acc:	e0820593 	umull	r0, r2, r3, r5
-    1ad0:	e1a023a2 	mov	r2, r2, lsr #7
-    1ad4:	e0623282 	rsb	r3, r2, r2, lsl #5
-    1ad8:	e0822103 	add	r2, r2, r3, lsl #2
-    1adc:	e0459202 	sub	r9, r5, r2, lsl #4
-    1ae0:	e3590000 	cmp	r9, #0	; 0x0
-    1ae4:	1a00001d 	bne	1b60 <synchronizeTime+0x2d8>
-    1ae8:	e59f2170 	ldr	r2, [pc, #368]	; 1c60 <.text+0x1c60>
-    1aec:	e8920030 	ldmia	r2, {r4, r5}
-    1af0:	e59f3164 	ldr	r3, [pc, #356]	; 1c5c <.text+0x1c5c>
-    1af4:	e1a0c424 	mov	ip, r4, lsr #8
-    1af8:	e1a0e824 	mov	lr, r4, lsr #16
-    1afc:	e1a0bc25 	mov	fp, r5, lsr #24
-    1b00:	e1a06c24 	mov	r6, r4, lsr #24
-    1b04:	e1a07425 	mov	r7, r5, lsr #8
-    1b08:	e1a08825 	mov	r8, r5, lsr #16
-    1b0c:	e1a01003 	mov	r1, r3
-    1b10:	e3a02010 	mov	r2, #16	; 0x10
-    1b14:	e5c3c001 	strb	ip, [r3, #1]
-    1b18:	e5c3e002 	strb	lr, [r3, #2]
-    1b1c:	e5c36003 	strb	r6, [r3, #3]
-    1b20:	e5c37005 	strb	r7, [r3, #5]
-    1b24:	e5c38006 	strb	r8, [r3, #6]
-    1b28:	e5c3b007 	strb	fp, [r3, #7]
-    1b2c:	e5c3900f 	strb	r9, [r3, #15]
-    1b30:	e5c34000 	strb	r4, [r3]
-    1b34:	e5c35004 	strb	r5, [r3, #4]
-    1b38:	e5c39008 	strb	r9, [r3, #8]
-    1b3c:	e5c39009 	strb	r9, [r3, #9]
-    1b40:	e5c3900a 	strb	r9, [r3, #10]
-    1b44:	e5c3900b 	strb	r9, [r3, #11]
-    1b48:	e5c3900c 	strb	r9, [r3, #12]
-    1b4c:	e5c3900d 	strb	r9, [r3, #13]
-    1b50:	e5c3900e 	strb	r9, [r3, #14]
-    1b54:	e3a0000c 	mov	r0, #12	; 0xc
-    1b58:	eb001ca5 	bl	8df4 <writePacket2Ringbuffer>
-    1b5c:	eb001e2c 	bl	9414 <UART_send_ringbuffer>
-    1b60:	e28dd018 	add	sp, sp, #24	; 0x18
-    1b64:	e8bd4ff0 	ldmia	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
-    1b68:	e12fff1e 	bx	lr
-    1b6c:	e1a00004 	mov	r0, r4
-    1b70:	e1a01005 	mov	r1, r5
-    1b74:	e59f20fc 	ldr	r2, [pc, #252]	; 1c78 <.text+0x1c78>
-    1b78:	e3a03000 	mov	r3, #0	; 0x0
-    1b7c:	eb0048b0 	bl	13e44 <__ledf2>
-    1b80:	e3500000 	cmp	r0, #0	; 0x0
-    1b84:	baffffa7 	blt	1a28 <synchronizeTime+0x1a0>
-    1b88:	e3580000 	cmp	r8, #0	; 0x0
-    1b8c:	da000013 	ble	1be0 <synchronizeTime+0x358>
-    1b90:	e59f10c0 	ldr	r1, [pc, #192]	; 1c58 <.text+0x1c58>
-    1b94:	e3a04e7d 	mov	r4, #2000	; 0x7d0
-    1b98:	e3a05000 	mov	r5, #0	; 0x0
-    1b9c:	e8810030 	stmia	r1, {r4, r5}
-    1ba0:	e3a00002 	mov	r0, #2	; 0x2
-    1ba4:	e59f20a8 	ldr	r2, [pc, #168]	; 1c54 <.text+0x1c54>
-    1ba8:	e59f30bc 	ldr	r3, [pc, #188]	; 1c6c <.text+0x1c6c>
-    1bac:	e1c200b0 	strh	r0, [r2]
-    1bb0:	e3a01000 	mov	r1, #0	; 0x0
-    1bb4:	e3a00001 	mov	r0, #1	; 0x1
-    1bb8:	e8830003 	stmia	r3, {r0, r1}
-    1bbc:	eaffffb0 	b	1a84 <synchronizeTime+0x1fc>
-    1bc0:	e59f30a4 	ldr	r3, [pc, #164]	; 1c6c <.text+0x1c6c>
-    1bc4:	e3a01000 	mov	r1, #0	; 0x0
-    1bc8:	e59f2084 	ldr	r2, [pc, #132]	; 1c54 <.text+0x1c54>
-    1bcc:	e3a00000 	mov	r0, #0	; 0x0
-    1bd0:	e8830003 	stmia	r3, {r0, r1}
-    1bd4:	e3a01efa 	mov	r1, #4000	; 0xfa0
-    1bd8:	e1c210b0 	strh	r1, [r2]
-    1bdc:	eaffffa8 	b	1a84 <synchronizeTime+0x1fc>
-    1be0:	1a000001 	bne	1bec <synchronizeTime+0x364>
-    1be4:	e3570e7d 	cmp	r7, #2000	; 0x7d0
-    1be8:	8affffe8 	bhi	1b90 <synchronizeTime+0x308>
-    1bec:	e3780001 	cmn	r8, #1	; 0x1
-    1bf0:	ba00000c 	blt	1c28 <synchronizeTime+0x3a0>
-    1bf4:	0a000009 	beq	1c20 <synchronizeTime+0x398>
-    1bf8:	e3580000 	cmp	r8, #0	; 0x0
-    1bfc:	da00000f 	ble	1c40 <synchronizeTime+0x3b8>
-    1c00:	e1a02007 	mov	r2, r7
-    1c04:	e1a03008 	mov	r3, r8
-    1c08:	e3a00efa 	mov	r0, #4000	; 0xfa0
-    1c0c:	e3a01000 	mov	r1, #0	; 0x0
-    1c10:	eb004bf8 	bl	14bf8 <____divdi3_from_arm>
-    1c14:	e1a00800 	mov	r0, r0, lsl #16
-    1c18:	e1a00820 	mov	r0, r0, lsr #16
-    1c1c:	eaffffe0 	b	1ba4 <synchronizeTime+0x31c>
-    1c20:	e3770e7d 	cmn	r7, #2000	; 0x7d0
-    1c24:	2afffff3 	bcs	1bf8 <synchronizeTime+0x370>
-    1c28:	e3a02483 	mov	r2, #-2097152000	; 0x83000000
-    1c2c:	e59f4024 	ldr	r4, [pc, #36]	; 1c58 <.text+0x1c58>
-    1c30:	e1a02a42 	mov	r2, r2, asr #20
-    1c34:	e3e03000 	mvn	r3, #0	; 0x0
-    1c38:	e884000c 	stmia	r4, {r2, r3}
-    1c3c:	eaffff80 	b	1a44 <synchronizeTime+0x1bc>
-    1c40:	1affff81 	bne	1a4c <synchronizeTime+0x1c4>
-    1c44:	e3570000 	cmp	r7, #0	; 0x0
-    1c48:	9affff7f 	bls	1a4c <synchronizeTime+0x1c4>
-    1c4c:	eaffffeb 	b	1c00 <synchronizeTime+0x378>
-    1c50:	40000fc0 	andmi	r0, r0, r0, asr #31
-    1c54:	40000000 	andmi	r0, r0, r0
-    1c58:	40000860 	andmi	r0, r0, r0, ror #16
-    1c5c:	40001180 	andmi	r1, r0, r0, lsl #3
-    1c60:	40000858 	andmi	r0, r0, r8, asr r8
-    1c64:	40001080 	andmi	r1, r0, r0, lsl #1
-    1c68:	416312d0 	ldrmid	r1, [r3, #-32]!
-    1c6c:	40000868 	andmi	r0, r0, r8, ror #16
-    1c70:	4000106c 	andmi	r1, r0, ip, rrx
-    1c74:	10624dd3 	ldrned	r4, [r2], #-211
-    1c78:	c16312d0 	ldrgtd	r1, [r3, #-32]!
-
-00001c7c <sendImuData>:
-    1c7c:	e92d4030 	stmdb	sp!, {r4, r5, lr}
-    1c80:	e59f5108 	ldr	r5, [pc, #264]	; 1d90 <.text+0x1d90>
-    1c84:	e1d500f4 	ldrsh	r0, [r5, #4]
-    1c88:	eb0006cc 	bl	37c0 <LLToSIAngleRoll>
-    1c8c:	e59f4100 	ldr	r4, [pc, #256]	; 1d94 <.text+0x1d94>
-    1c90:	e1a03000 	mov	r3, r0
-    1c94:	e1a0cc20 	mov	ip, r0, lsr #24
-    1c98:	e1a02420 	mov	r2, r0, lsr #8
-    1c9c:	e1a01820 	mov	r1, r0, lsr #16
-    1ca0:	e1d500f2 	ldrsh	r0, [r5, #2]
-    1ca4:	e5c42001 	strb	r2, [r4, #1]
-    1ca8:	e5c41002 	strb	r1, [r4, #2]
-    1cac:	e5c4c003 	strb	ip, [r4, #3]
-    1cb0:	e5c43000 	strb	r3, [r4]
-    1cb4:	eb00073b 	bl	39a8 <LLToSIAnglePitch>
-    1cb8:	e1a03000 	mov	r3, r0
-    1cbc:	e1a0cc20 	mov	ip, r0, lsr #24
-    1cc0:	e1a02420 	mov	r2, r0, lsr #8
-    1cc4:	e1a01820 	mov	r1, r0, lsr #16
-    1cc8:	e1d500b6 	ldrh	r0, [r5, #6]
-    1ccc:	e5c42005 	strb	r2, [r4, #5]
-    1cd0:	e5c41006 	strb	r1, [r4, #6]
-    1cd4:	e5c4c007 	strb	ip, [r4, #7]
-    1cd8:	e5c43004 	strb	r3, [r4, #4]
-    1cdc:	eb00071a 	bl	394c <LLToSIAngleYaw>
-    1ce0:	e1a03000 	mov	r3, r0
-    1ce4:	e1a0cc20 	mov	ip, r0, lsr #24
-    1ce8:	e1a02420 	mov	r2, r0, lsr #8
-    1cec:	e1a01820 	mov	r1, r0, lsr #16
-    1cf0:	e1d500fa 	ldrsh	r0, [r5, #10]
-    1cf4:	e5c42009 	strb	r2, [r4, #9]
-    1cf8:	e5c4100a 	strb	r1, [r4, #10]
-    1cfc:	e5c4c00b 	strb	ip, [r4, #11]
-    1d00:	e5c43008 	strb	r3, [r4, #8]
-    1d04:	eb0006dc 	bl	387c <LLToSIAngleRateRoll>
-    1d08:	e1a03000 	mov	r3, r0
-    1d0c:	e1a0cc20 	mov	ip, r0, lsr #24
-    1d10:	e1a02420 	mov	r2, r0, lsr #8
-    1d14:	e1a01820 	mov	r1, r0, lsr #16
-    1d18:	e1d500f8 	ldrsh	r0, [r5, #8]
-    1d1c:	e5c4200d 	strb	r2, [r4, #13]
-    1d20:	e5c4100e 	strb	r1, [r4, #14]
-    1d24:	e5c4c00f 	strb	ip, [r4, #15]
-    1d28:	e5c4300c 	strb	r3, [r4, #12]
-    1d2c:	eb0006b9 	bl	3818 <LLToSIAngleRatePitch>
-    1d30:	e1a03000 	mov	r3, r0
-    1d34:	e1a0cc20 	mov	ip, r0, lsr #24
-    1d38:	e1a02423 	mov	r2, r3, lsr #8
-    1d3c:	e1d500fc 	ldrsh	r0, [r5, #12]
-    1d40:	e1a01823 	mov	r1, r3, lsr #16
-    1d44:	e5c42011 	strb	r2, [r4, #17]
-    1d48:	e5c41012 	strb	r1, [r4, #18]
-    1d4c:	e5c4c013 	strb	ip, [r4, #19]
-    1d50:	e5c43010 	strb	r3, [r4, #16]
-    1d54:	eb0006e2 	bl	38e4 <LLToSIAngleRateYaw>
-    1d58:	e1a01004 	mov	r1, r4
-    1d5c:	e1a03000 	mov	r3, r0
-    1d60:	e1a05c20 	mov	r5, r0, lsr #24
-    1d64:	e1a0c420 	mov	ip, r0, lsr #8
-    1d68:	e1a0e820 	mov	lr, r0, lsr #16
-    1d6c:	e3a02024 	mov	r2, #36	; 0x24
-    1d70:	e3a0000a 	mov	r0, #10	; 0xa
-    1d74:	e5c4c015 	strb	ip, [r4, #21]
-    1d78:	e5c4e016 	strb	lr, [r4, #22]
-    1d7c:	e5c45017 	strb	r5, [r4, #23]
-    1d80:	e5c43014 	strb	r3, [r4, #20]
-    1d84:	eb001c1a 	bl	8df4 <writePacket2Ringbuffer>
-    1d88:	e8bd4030 	ldmia	sp!, {r4, r5, lr}
-    1d8c:	e12fff1e 	bx	lr
-    1d90:	40000b34 	andmi	r0, r0, r4, lsr fp
-    1d94:	40000f74 	andmi	r0, r0, r4, ror pc
-
-00001d98 <sdkInit>:
-    1d98:	e59f2178 	ldr	r2, [pc, #376]	; 1f18 <.text+0x1f18>
-    1d9c:	e92d4010 	stmdb	sp!, {r4, lr}
-    1da0:	e59fc174 	ldr	ip, [pc, #372]	; 1f1c <.text+0x1f1c>
-    1da4:	e3a0e000 	mov	lr, #0	; 0x0
-    1da8:	e59f4170 	ldr	r4, [pc, #368]	; 1f20 <.text+0x1f20>
-    1dac:	e582e000 	str	lr, [r2]
-    1db0:	e59f116c 	ldr	r1, [pc, #364]	; 1f24 <.text+0x1f24>
-    1db4:	e3a00004 	mov	r0, #4	; 0x4
-    1db8:	e1cce0b0 	strh	lr, [ip]
-    1dbc:	e5c4e001 	strb	lr, [r4, #1]
-    1dc0:	e5c4e017 	strb	lr, [r4, #23]
-    1dc4:	e5c4e000 	strb	lr, [r4]
-    1dc8:	e5c4e002 	strb	lr, [r4, #2]
-    1dcc:	e5c4e003 	strb	lr, [r4, #3]
-    1dd0:	e5c4e004 	strb	lr, [r4, #4]
-    1dd4:	e5c4e005 	strb	lr, [r4, #5]
-    1dd8:	e5c4e006 	strb	lr, [r4, #6]
-    1ddc:	e5c4e007 	strb	lr, [r4, #7]
-    1de0:	e5c4e008 	strb	lr, [r4, #8]
-    1de4:	e5c4e009 	strb	lr, [r4, #9]
-    1de8:	e5c4e00a 	strb	lr, [r4, #10]
-    1dec:	e5c4e00b 	strb	lr, [r4, #11]
-    1df0:	e5c4e00c 	strb	lr, [r4, #12]
-    1df4:	e5c4e00d 	strb	lr, [r4, #13]
-    1df8:	e5c4e00e 	strb	lr, [r4, #14]
-    1dfc:	e5c4e00f 	strb	lr, [r4, #15]
-    1e00:	e5c4e010 	strb	lr, [r4, #16]
-    1e04:	e5c4e011 	strb	lr, [r4, #17]
-    1e08:	e5c4e012 	strb	lr, [r4, #18]
-    1e0c:	e5c4e013 	strb	lr, [r4, #19]
-    1e10:	e5c4e014 	strb	lr, [r4, #20]
-    1e14:	e5c4e015 	strb	lr, [r4, #21]
-    1e18:	e5c4e016 	strb	lr, [r4, #22]
-    1e1c:	eb001a63 	bl	87b0 <registerPacket>
-    1e20:	e59f3100 	ldr	r3, [pc, #256]	; 1f28 <.text+0x1f28>
-    1e24:	e59f1100 	ldr	r1, [pc, #256]	; 1f2c <.text+0x1f2c>
-    1e28:	e5830000 	str	r0, [r3]
-    1e2c:	e3a00005 	mov	r0, #5	; 0x5
-    1e30:	eb001a5e 	bl	87b0 <registerPacket>
-    1e34:	e59f30f4 	ldr	r3, [pc, #244]	; 1f30 <.text+0x1f30>
-    1e38:	e59f10f4 	ldr	r1, [pc, #244]	; 1f34 <.text+0x1f34>
-    1e3c:	e5830000 	str	r0, [r3]
-    1e40:	e3a00006 	mov	r0, #6	; 0x6
-    1e44:	eb001a59 	bl	87b0 <registerPacket>
-    1e48:	e59f30e8 	ldr	r3, [pc, #232]	; 1f38 <.text+0x1f38>
-    1e4c:	e59f10e8 	ldr	r1, [pc, #232]	; 1f3c <.text+0x1f3c>
-    1e50:	e5830000 	str	r0, [r3]
-    1e54:	e3a00003 	mov	r0, #3	; 0x3
-    1e58:	eb001a54 	bl	87b0 <registerPacket>
-    1e5c:	e59f30dc 	ldr	r3, [pc, #220]	; 1f40 <.text+0x1f40>
-    1e60:	e59f10dc 	ldr	r1, [pc, #220]	; 1f44 <.text+0x1f44>
-    1e64:	e5830000 	str	r0, [r3]
-    1e68:	e3a0000c 	mov	r0, #12	; 0xc
-    1e6c:	eb001a4f 	bl	87b0 <registerPacket>
-    1e70:	e59f30d0 	ldr	r3, [pc, #208]	; 1f48 <.text+0x1f48>
-    1e74:	e59f10d0 	ldr	r1, [pc, #208]	; 1f4c <.text+0x1f4c>
-    1e78:	e5830000 	str	r0, [r3]
-    1e7c:	e3a00001 	mov	r0, #1	; 0x1
-    1e80:	eb001a4a 	bl	87b0 <registerPacket>
-    1e84:	e59f30c4 	ldr	r3, [pc, #196]	; 1f50 <.text+0x1f50>
-    1e88:	e59f10c4 	ldr	r1, [pc, #196]	; 1f54 <.text+0x1f54>
-    1e8c:	e5830000 	str	r0, [r3]
-    1e90:	e3a00002 	mov	r0, #2	; 0x2
-    1e94:	eb001a45 	bl	87b0 <registerPacket>
-    1e98:	e59f30b8 	ldr	r3, [pc, #184]	; 1f58 <.text+0x1f58>
-    1e9c:	e59f10b8 	ldr	r1, [pc, #184]	; 1f5c <.text+0x1f5c>
-    1ea0:	e5830000 	str	r0, [r3]
-    1ea4:	e3a00008 	mov	r0, #8	; 0x8
-    1ea8:	eb001a40 	bl	87b0 <registerPacket>
-    1eac:	e59f30ac 	ldr	r3, [pc, #172]	; 1f60 <.text+0x1f60>
-    1eb0:	e59f10ac 	ldr	r1, [pc, #172]	; 1f64 <.text+0x1f64>
-    1eb4:	e5830000 	str	r0, [r3]
-    1eb8:	e3a00010 	mov	r0, #16	; 0x10
-    1ebc:	eb001a3b 	bl	87b0 <registerPacket>
-    1ec0:	e59f30a0 	ldr	r3, [pc, #160]	; 1f68 <.text+0x1f68>
-    1ec4:	e59f10a0 	ldr	r1, [pc, #160]	; 1f6c <.text+0x1f6c>
-    1ec8:	e5830000 	str	r0, [r3]
-    1ecc:	e3a0000f 	mov	r0, #15	; 0xf
-    1ed0:	eb001a36 	bl	87b0 <registerPacket>
-    1ed4:	e59f3094 	ldr	r3, [pc, #148]	; 1f70 <.text+0x1f70>
-    1ed8:	e1a01004 	mov	r1, r4
-    1edc:	e5830000 	str	r0, [r3]
-    1ee0:	e3a0000e 	mov	r0, #14	; 0xe
-    1ee4:	eb001a31 	bl	87b0 <registerPacket>
-    1ee8:	e59f3084 	ldr	r3, [pc, #132]	; 1f74 <.text+0x1f74>
-    1eec:	e59f1084 	ldr	r1, [pc, #132]	; 1f78 <.text+0x1f78>
-    1ef0:	e5830000 	str	r0, [r3]
-    1ef4:	e3a00011 	mov	r0, #17	; 0x11
-    1ef8:	eb001a2c 	bl	87b0 <registerPacket>
-    1efc:	e59f3078 	ldr	r3, [pc, #120]	; 1f7c <.text+0x1f7c>
-    1f00:	e5830000 	str	r0, [r3]
-    1f04:	eb001cb0 	bl	91cc <UART0_rxFlush>
-    1f08:	eb001cbf 	bl	920c <UART0_txFlush>
-    1f0c:	eb001c94 	bl	9164 <startAutoBaud>
-    1f10:	e8bd4010 	ldmia	sp!, {r4, lr}
-    1f14:	e12fff1e 	bx	lr
-    1f18:	4000106c 	andmi	r1, r0, ip, rrx
-    1f1c:	40000fbc 	strmih	r0, [r0], -ip
-    1f20:	40000fa0 	andmi	r0, r0, r0, lsr #31
-    1f24:	40000fe0 	andmi	r0, r0, r0, ror #31
-    1f28:	40000f70 	andmi	r0, r0, r0, ror pc
-    1f2c:	400011b9 	strmih	r1, [r0], -r9
-    1f30:	40001190 	mulmi	r0, r0, r1
-    1f34:	400011e8 	andmi	r1, r0, r8, ror #3
-    1f38:	400010a8 	andmi	r1, r0, r8, lsr #1
-    1f3c:	40000fe1 	andmi	r0, r0, r1, ror #31
-    1f40:	400010b0 	strmih	r1, [r0], -r0
-    1f44:	40001180 	andmi	r1, r0, r0, lsl #3
-    1f48:	40000fc0 	andmi	r0, r0, r0, asr #31
-    1f4c:	4000103a 	andmi	r1, r0, sl, lsr r0
-    1f50:	40000f9c 	mulmi	r0, ip, pc
-    1f54:	400010b4 	strmih	r1, [r0], -r4
-    1f58:	400011d0 	ldrmid	r1, [r0], -r0
-    1f5c:	400011b8 	strmih	r1, [r0], -r8
-    1f60:	400010ac 	andmi	r1, r0, ip, lsr #1
-    1f64:	40001070 	andmi	r1, r0, r0, ror r0
-    1f68:	40000fc4 	andmi	r0, r0, r4, asr #31
-    1f6c:	400011d8 	ldrmid	r1, [r0], -r8
-    1f70:	40001060 	andmi	r1, r0, r0, rrx
-    1f74:	40000f98 	mulmi	r0, r8, pc
-    1f78:	40001022 	andmi	r1, r0, r2, lsr #32
-    1f7c:	400011d4 	ldrmid	r1, [r0], -r4
-
-00001f80 <processSendData>:
-    1f80:	e92d47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
-    1f84:	e59f63ec 	ldr	r6, [pc, #1004]	; 2378 <.text+0x2378>
-    1f88:	e5d61002 	ldrb	r1, [r6, #2]
-    1f8c:	e5d63003 	ldrb	r3, [r6, #3]
-    1f90:	e5d6000e 	ldrb	r0, [r6, #14]
-    1f94:	e5d6200f 	ldrb	r2, [r6, #15]
-    1f98:	e1911403 	orrs	r1, r1, r3, lsl #8
-    1f9c:	e1804402 	orr	r4, r0, r2, lsl #8
-    1fa0:	0a000004 	beq	1fb8 <processSendData+0x38>
-    1fa4:	e59f33d0 	ldr	r3, [pc, #976]	; 237c <.text+0x237c>
-    1fa8:	e5930000 	ldr	r0, [r3]
-    1fac:	eb004b0e 	bl	14bec <____umodsi3_from_arm>
-    1fb0:	e1540000 	cmp	r4, r0
-    1fb4:	0a00003d 	beq	20b0 <processSendData+0x130>
-    1fb8:	e5d61000 	ldrb	r1, [r6]
-    1fbc:	e5d63001 	ldrb	r3, [r6, #1]
-    1fc0:	e5d6000c 	ldrb	r0, [r6, #12]
-    1fc4:	e5d6200d 	ldrb	r2, [r6, #13]
-    1fc8:	e1911403 	orrs	r1, r1, r3, lsl #8
-    1fcc:	e1804402 	orr	r4, r0, r2, lsl #8
-    1fd0:	0a000004 	beq	1fe8 <processSendData+0x68>
-    1fd4:	e59f33a0 	ldr	r3, [pc, #928]	; 237c <.text+0x237c>
-    1fd8:	e5930000 	ldr	r0, [r3]
-    1fdc:	eb004b02 	bl	14bec <____umodsi3_from_arm>
-    1fe0:	e1540000 	cmp	r4, r0
-    1fe4:	0a000096 	beq	2244 <processSendData+0x2c4>
-    1fe8:	e5d61004 	ldrb	r1, [r6, #4]
-    1fec:	e5d63005 	ldrb	r3, [r6, #5]
-    1ff0:	e5d60010 	ldrb	r0, [r6, #16]
-    1ff4:	e5d62011 	ldrb	r2, [r6, #17]
-    1ff8:	e1911403 	orrs	r1, r1, r3, lsl #8
-    1ffc:	e1804402 	orr	r4, r0, r2, lsl #8
-    2000:	0a000004 	beq	2018 <processSendData+0x98>
-    2004:	e59f3370 	ldr	r3, [pc, #880]	; 237c <.text+0x237c>
-    2008:	e5930000 	ldr	r0, [r3]
-    200c:	eb004af6 	bl	14bec <____umodsi3_from_arm>
-    2010:	e1540000 	cmp	r4, r0
-    2014:	0a0000cd 	beq	2350 <processSendData+0x3d0>
-    2018:	e5d61006 	ldrb	r1, [r6, #6]
-    201c:	e5d63007 	ldrb	r3, [r6, #7]
-    2020:	e5d60012 	ldrb	r0, [r6, #18]
-    2024:	e5d62013 	ldrb	r2, [r6, #19]
-    2028:	e1911403 	orrs	r1, r1, r3, lsl #8
-    202c:	e1804402 	orr	r4, r0, r2, lsl #8
-    2030:	0a000004 	beq	2048 <processSendData+0xc8>
-    2034:	e59f3340 	ldr	r3, [pc, #832]	; 237c <.text+0x237c>
-    2038:	e5930000 	ldr	r0, [r3]
-    203c:	eb004aea 	bl	14bec <____umodsi3_from_arm>
-    2040:	e1540000 	cmp	r4, r0
-    2044:	0a0000c6 	beq	2364 <processSendData+0x3e4>
-    2048:	e5d61008 	ldrb	r1, [r6, #8]
-    204c:	e5d63009 	ldrb	r3, [r6, #9]
-    2050:	e5d60014 	ldrb	r0, [r6, #20]
-    2054:	e5d62015 	ldrb	r2, [r6, #21]
-    2058:	e1911403 	orrs	r1, r1, r3, lsl #8
-    205c:	e1804402 	orr	r4, r0, r2, lsl #8
-    2060:	0a000004 	beq	2078 <processSendData+0xf8>
-    2064:	e59f3310 	ldr	r3, [pc, #784]	; 237c <.text+0x237c>
-    2068:	e5930000 	ldr	r0, [r3]
-    206c:	eb004ade 	bl	14bec <____umodsi3_from_arm>
-    2070:	e1540000 	cmp	r4, r0
-    2074:	0a00006d 	beq	2230 <processSendData+0x2b0>
-    2078:	e5d6100b 	ldrb	r1, [r6, #11]
-    207c:	e5d6300a 	ldrb	r3, [r6, #10]
-    2080:	e5d60016 	ldrb	r0, [r6, #22]
-    2084:	e5d62017 	ldrb	r2, [r6, #23]
-    2088:	e1931401 	orrs	r1, r3, r1, lsl #8
-    208c:	e1804402 	orr	r4, r0, r2, lsl #8
-    2090:	0a000004 	beq	20a8 <processSendData+0x128>
-    2094:	e59f32e0 	ldr	r3, [pc, #736]	; 237c <.text+0x237c>
-    2098:	e5930000 	ldr	r0, [r3]
-    209c:	eb004ad2 	bl	14bec <____umodsi3_from_arm>
-    20a0:	e1540000 	cmp	r4, r0
-    20a4:	0a000012 	beq	20f4 <processSendData+0x174>
-    20a8:	e8bd47f0 	ldmia	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
-    20ac:	e12fff1e 	bx	lr
-    20b0:	e59f02c8 	ldr	r0, [pc, #712]	; 2380 <.text+0x2380>
-    20b4:	e59f12c8 	ldr	r1, [pc, #712]	; 2384 <.text+0x2384>
-    20b8:	e3a0c000 	mov	ip, #0	; 0x0
-    20bc:	e5d03000 	ldrb	r3, [r0]
-    20c0:	e5d02001 	ldrb	r2, [r0, #1]
-    20c4:	e28cc001 	add	ip, ip, #1	; 0x1
-    20c8:	e35c0008 	cmp	ip, #8	; 0x8
-    20cc:	e5c13008 	strb	r3, [r1, #8]
-    20d0:	e5c12009 	strb	r2, [r1, #9]
-    20d4:	e2800002 	add	r0, r0, #2	; 0x2
-    20d8:	e2811002 	add	r1, r1, #2	; 0x2
-    20dc:	1afffff6 	bne	20bc <processSendData+0x13c>
-    20e0:	e59f129c 	ldr	r1, [pc, #668]	; 2384 <.text+0x2384>
-    20e4:	e3a02018 	mov	r2, #24	; 0x18
-    20e8:	e3a0000b 	mov	r0, #11	; 0xb
-    20ec:	eb001b40 	bl	8df4 <writePacket2Ringbuffer>
-    20f0:	eaffffb0 	b	1fb8 <processSendData+0x38>
-    20f4:	e59f528c 	ldr	r5, [pc, #652]	; 2388 <.text+0x2388>
-    20f8:	e5d52005 	ldrb	r2, [r5, #5]
-    20fc:	e5d50004 	ldrb	r0, [r5, #4]
-    2100:	e5d51006 	ldrb	r1, [r5, #6]
-    2104:	e59f3280 	ldr	r3, [pc, #640]	; 238c <.text+0x238c>
-    2108:	e1800402 	orr	r0, r0, r2, lsl #8
-    210c:	e59f427c 	ldr	r4, [pc, #636]	; 2390 <.text+0x2390>
-    2110:	e5d3e001 	ldrb	lr, [r3, #1]
-    2114:	e5d5a007 	ldrb	sl, [r5, #7]
-    2118:	e5d39007 	ldrb	r9, [r3, #7]
-    211c:	e5d32002 	ldrb	r2, [r3, #2]
-    2120:	e5d3c000 	ldrb	ip, [r3]
-    2124:	e5d36004 	ldrb	r6, [r3, #4]
-    2128:	e5d37005 	ldrb	r7, [r3, #5]
-    212c:	e5d38006 	ldrb	r8, [r3, #6]
-    2130:	e1800801 	orr	r0, r0, r1, lsl #16
-    2134:	e5d31003 	ldrb	r1, [r3, #3]
-    2138:	e1800c0a 	orr	r0, r0, sl, lsl #24
-    213c:	e5c4e003 	strb	lr, [r4, #3]
-    2140:	e5c42000 	strb	r2, [r4]
-    2144:	e5c41001 	strb	r1, [r4, #1]
-    2148:	e5c4c002 	strb	ip, [r4, #2]
-    214c:	e5c46004 	strb	r6, [r4, #4]
-    2150:	e5c47005 	strb	r7, [r4, #5]
-    2154:	e5c48006 	strb	r8, [r4, #6]
-    2158:	e5c49007 	strb	r9, [r4, #7]
-    215c:	eb000566 	bl	36fc <SIToLLCmdRoll>
-    2160:	e5d51009 	ldrb	r1, [r5, #9]
-    2164:	e5d52008 	ldrb	r2, [r5, #8]
-    2168:	e5d5c00a 	ldrb	ip, [r5, #10]
-    216c:	e1a03800 	mov	r3, r0, lsl #16
-    2170:	e1822401 	orr	r2, r2, r1, lsl #8
-    2174:	e5d5000b 	ldrb	r0, [r5, #11]
-    2178:	e2633000 	rsb	r3, r3, #0	; 0x0
-    217c:	e182280c 	orr	r2, r2, ip, lsl #16
-    2180:	e1a01c23 	mov	r1, r3, lsr #24
-    2184:	e1a03823 	mov	r3, r3, lsr #16
-    2188:	e5c43018 	strb	r3, [r4, #24]
-    218c:	e5c41019 	strb	r1, [r4, #25]
-    2190:	e1820c00 	orr	r0, r2, r0, lsl #24
-    2194:	eb000565 	bl	3730 <SIToLLCmdPitch>
-    2198:	e5d5200d 	ldrb	r2, [r5, #13]
-    219c:	e5d5300c 	ldrb	r3, [r5, #12]
-    21a0:	e5d5100e 	ldrb	r1, [r5, #14]
-    21a4:	e5d5c00f 	ldrb	ip, [r5, #15]
-    21a8:	e1833402 	orr	r3, r3, r2, lsl #8
-    21ac:	e1833801 	orr	r3, r3, r1, lsl #16
-    21b0:	e1a02420 	mov	r2, r0, lsr #8
-    21b4:	e5c4001a 	strb	r0, [r4, #26]
-    21b8:	e5c4201b 	strb	r2, [r4, #27]
-    21bc:	e1830c0c 	orr	r0, r3, ip, lsl #24
-    21c0:	eb000566 	bl	3760 <SIToLLCmdYawRate>
-    21c4:	e5d52011 	ldrb	r2, [r5, #17]
-    21c8:	e5d53010 	ldrb	r3, [r5, #16]
-    21cc:	e5d51012 	ldrb	r1, [r5, #18]
-    21d0:	e5d5c013 	ldrb	ip, [r5, #19]
-    21d4:	e1833402 	orr	r3, r3, r2, lsl #8
-    21d8:	e1833801 	orr	r3, r3, r1, lsl #16
-    21dc:	e1a02420 	mov	r2, r0, lsr #8
-    21e0:	e5c4001c 	strb	r0, [r4, #28]
-    21e4:	e5c4201d 	strb	r2, [r4, #29]
-    21e8:	e1830c0c 	orr	r0, r3, ip, lsl #24
-    21ec:	eb000567 	bl	3790 <SIToLLCmdThrust>
-    21f0:	e5d57003 	ldrb	r7, [r5, #3]
-    21f4:	e5d5c000 	ldrb	ip, [r5]
-    21f8:	e5d5e001 	ldrb	lr, [r5, #1]
-    21fc:	e5d56002 	ldrb	r6, [r5, #2]
-    2200:	e1a03420 	mov	r3, r0, lsr #8
-    2204:	e5c4001e 	strb	r0, [r4, #30]
-    2208:	e1a01004 	mov	r1, r4
-    220c:	e3a02072 	mov	r2, #114	; 0x72
-    2210:	e5c4301f 	strb	r3, [r4, #31]
-    2214:	e5c4c04a 	strb	ip, [r4, #74]
-    2218:	e5c4e04b 	strb	lr, [r4, #75]
-    221c:	e5c4604c 	strb	r6, [r4, #76]
-    2220:	e5c4704d 	strb	r7, [r4, #77]
-    2224:	e3a00012 	mov	r0, #18	; 0x12
-    2228:	eb001af1 	bl	8df4 <writePacket2Ringbuffer>
-    222c:	eaffff9d 	b	20a8 <processSendData+0x128>
-    2230:	e59f115c 	ldr	r1, [pc, #348]	; 2394 <.text+0x2394>
-    2234:	e3a02018 	mov	r2, #24	; 0x18
-    2238:	e3a0000d 	mov	r0, #13	; 0xd
-    223c:	eb001aec 	bl	8df4 <writePacket2Ringbuffer>
-    2240:	eaffff8c 	b	2078 <processSendData+0xf8>
-    2244:	e59f514c 	ldr	r5, [pc, #332]	; 2398 <.text+0x2398>
-    2248:	e1d500f4 	ldrsh	r0, [r5, #4]
-    224c:	eb00055b 	bl	37c0 <LLToSIAngleRoll>
-    2250:	e59f4144 	ldr	r4, [pc, #324]	; 239c <.text+0x239c>
-    2254:	e1a03000 	mov	r3, r0
-    2258:	e1a0cc20 	mov	ip, r0, lsr #24
-    225c:	e1a02420 	mov	r2, r0, lsr #8
-    2260:	e1a01820 	mov	r1, r0, lsr #16
-    2264:	e1d500f2 	ldrsh	r0, [r5, #2]
-    2268:	e5c42001 	strb	r2, [r4, #1]
-    226c:	e5c41002 	strb	r1, [r4, #2]
-    2270:	e5c4c003 	strb	ip, [r4, #3]
-    2274:	e5c43000 	strb	r3, [r4]
-    2278:	eb0005ca 	bl	39a8 <LLToSIAnglePitch>
-    227c:	e1a03000 	mov	r3, r0
-    2280:	e1a0cc20 	mov	ip, r0, lsr #24
-    2284:	e1a02420 	mov	r2, r0, lsr #8
-    2288:	e1a01820 	mov	r1, r0, lsr #16
-    228c:	e1d500b6 	ldrh	r0, [r5, #6]
-    2290:	e5c42005 	strb	r2, [r4, #5]
-    2294:	e5c41006 	strb	r1, [r4, #6]
-    2298:	e5c4c007 	strb	ip, [r4, #7]
-    229c:	e5c43004 	strb	r3, [r4, #4]
-    22a0:	eb0005a9 	bl	394c <LLToSIAngleYaw>
-    22a4:	e1a03000 	mov	r3, r0
-    22a8:	e1a0cc20 	mov	ip, r0, lsr #24
-    22ac:	e1a02420 	mov	r2, r0, lsr #8
-    22b0:	e1a01820 	mov	r1, r0, lsr #16
-    22b4:	e1d500fa 	ldrsh	r0, [r5, #10]
-    22b8:	e5c42009 	strb	r2, [r4, #9]
-    22bc:	e5c4100a 	strb	r1, [r4, #10]
-    22c0:	e5c4c00b 	strb	ip, [r4, #11]
-    22c4:	e5c43008 	strb	r3, [r4, #8]
-    22c8:	eb00056b 	bl	387c <LLToSIAngleRateRoll>
-    22cc:	e1a03000 	mov	r3, r0
-    22d0:	e1a0cc20 	mov	ip, r0, lsr #24
-    22d4:	e1a02420 	mov	r2, r0, lsr #8
-    22d8:	e1a01820 	mov	r1, r0, lsr #16
-    22dc:	e1d500f8 	ldrsh	r0, [r5, #8]
-    22e0:	e5c4200d 	strb	r2, [r4, #13]
-    22e4:	e5c4100e 	strb	r1, [r4, #14]
-    22e8:	e5c4c00f 	strb	ip, [r4, #15]
-    22ec:	e5c4300c 	strb	r3, [r4, #12]
-    22f0:	eb000548 	bl	3818 <LLToSIAngleRatePitch>
-    22f4:	e1a03000 	mov	r3, r0
-    22f8:	e1a0cc20 	mov	ip, r0, lsr #24
-    22fc:	e1a02423 	mov	r2, r3, lsr #8
-    2300:	e1a01823 	mov	r1, r3, lsr #16
-    2304:	e1d500fc 	ldrsh	r0, [r5, #12]
-    2308:	e5c42011 	strb	r2, [r4, #17]
-    230c:	e5c41012 	strb	r1, [r4, #18]
-    2310:	e5c4c013 	strb	ip, [r4, #19]
-    2314:	e5c43010 	strb	r3, [r4, #16]
-    2318:	eb000571 	bl	38e4 <LLToSIAngleRateYaw>
-    231c:	e1a03000 	mov	r3, r0
-    2320:	e1a05c20 	mov	r5, r0, lsr #24
-    2324:	e1a0c420 	mov	ip, r0, lsr #8
-    2328:	e1a0e820 	mov	lr, r0, lsr #16
-    232c:	e1a01004 	mov	r1, r4
-    2330:	e3a02024 	mov	r2, #36	; 0x24
-    2334:	e5c4c015 	strb	ip, [r4, #21]
-    2338:	e5c4e016 	strb	lr, [r4, #22]
-    233c:	e5c45017 	strb	r5, [r4, #23]
-    2340:	e5c43014 	strb	r3, [r4, #20]
-    2344:	e3a0000a 	mov	r0, #10	; 0xa
-    2348:	eb001aa9 	bl	8df4 <writePacket2Ringbuffer>
-    234c:	eaffff25 	b	1fe8 <processSendData+0x68>
-    2350:	e59f1048 	ldr	r1, [pc, #72]	; 23a0 <.text+0x23a0>
-    2354:	e3a02001 	mov	r2, #1	; 0x1
-    2358:	e3a00009 	mov	r0, #9	; 0x9
-    235c:	eb001aa4 	bl	8df4 <writePacket2Ringbuffer>
-    2360:	eaffff2c 	b	2018 <processSendData+0x98>
-    2364:	e59f1038 	ldr	r1, [pc, #56]	; 23a4 <.text+0x23a4>
-    2368:	e3a02024 	mov	r2, #36	; 0x24
-    236c:	e3a00007 	mov	r0, #7	; 0x7
-    2370:	eb001a9f 	bl	8df4 <writePacket2Ringbuffer>
-    2374:	eaffff33 	b	2048 <processSendData+0xc8>
-    2378:	40000fa0 	andmi	r0, r0, r0, lsr #31
-    237c:	4000106c 	andmi	r1, r0, ip, rrx
-    2380:	40001098 	mulmi	r0, r8, r0
-    2384:	40000fc8 	andmi	r0, r0, r8, asr #31
-    2388:	4000103a 	andmi	r1, r0, sl, lsr r0
-    238c:	40000ef0 	strmid	r0, [r0], -r0
-    2390:	40000efc 	strmid	r0, [r0], -ip
-    2394:	40001080 	andmi	r1, r0, r0, lsl #1
-    2398:	40000b34 	andmi	r0, r0, r4, lsr fp
-    239c:	40000f74 	andmi	r0, r0, r4, ror pc
-    23a0:	40001038 	andmi	r1, r0, r8, lsr r0
-    23a4:	40001194 	mulmi	r0, r4, r1
-
-000023a8 <SDK_mainloop>:
-    23a8:	e92d4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
-    23ac:	e59f3f7c 	ldr	r3, [pc, #3964]	; 3330 <.text+0x3330>
-    23b0:	e59f0f7c 	ldr	r0, [pc, #3964]	; 3334 <.text+0x3334>
-    23b4:	e5d32000 	ldrb	r2, [r3]
-    23b8:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    23bc:	e5901000 	ldr	r1, [r0]
-    23c0:	e2833902 	add	r3, r3, #32768	; 0x8000
-    23c4:	e5933008 	ldr	r3, [r3, #8]
-    23c8:	e59f4f70 	ldr	r4, [pc, #3952]	; 3340 <.text+0x3340>
-    23cc:	e24dd068 	sub	sp, sp, #104	; 0x68
-    23d0:	e2811001 	add	r1, r1, #1	; 0x1
-    23d4:	e3a05000 	mov	r5, #0	; 0x0
-    23d8:	e35200ff 	cmp	r2, #255	; 0xff
-    23dc:	e58d3064 	str	r3, [sp, #100]
-    23e0:	e5801000 	str	r1, [r0]
-    23e4:	e5c45000 	strb	r5, [r4]
-    23e8:	0a0002bb 	beq	2edc <SDK_mainloop+0xb34>
-    23ec:	e59f3f50 	ldr	r3, [pc, #3920]	; 3344 <.text+0x3344>
-    23f0:	e1d340b8 	ldrh	r4, [r3, #8]
-    23f4:	e3540000 	cmp	r4, #0	; 0x0
-    23f8:	0a000214 	beq	2c50 <SDK_mainloop+0x8a8>
-    23fc:	e59f4f44 	ldr	r4, [pc, #3908]	; 3348 <.text+0x3348>
-    2400:	e082e194 	umull	lr, r2, r4, r1
-    2404:	e1a02322 	mov	r2, r2, lsr #6
-    2408:	e0623282 	rsb	r3, r2, r2, lsl #5
-    240c:	e0823103 	add	r3, r2, r3, lsl #2
-    2410:	e0412183 	sub	r2, r1, r3, lsl #3
-    2414:	e3520064 	cmp	r2, #100	; 0x64
-    2418:	13520000 	cmpne	r2, #0	; 0x0
-    241c:	0a0003ab 	beq	32d0 <SDK_mainloop+0xf28>
-    2420:	e0823194 	umull	r3, r2, r4, r1
-    2424:	e1a02322 	mov	r2, r2, lsr #6
-    2428:	e0623282 	rsb	r3, r2, r2, lsl #5
-    242c:	e0823103 	add	r3, r2, r3, lsl #2
-    2430:	e0412183 	sub	r2, r1, r3, lsl #3
-    2434:	e3520096 	cmp	r2, #150	; 0x96
-    2438:	13520032 	cmpne	r2, #50	; 0x32
-    243c:	0a0002b4 	beq	2f14 <SDK_mainloop+0xb6c>
-    2440:	eb001918 	bl	88a8 <parseRxFifo>
-    2444:	e59f3f00 	ldr	r3, [pc, #3840]	; 334c <.text+0x334c>
-    2448:	e5933000 	ldr	r3, [r3]
-    244c:	e5d32008 	ldrb	r2, [r3, #8]
-    2450:	e3520000 	cmp	r2, #0	; 0x0
-    2454:	0a000092 	beq	26a4 <SDK_mainloop+0x2fc>
-    2458:	e3a02000 	mov	r2, #0	; 0x0
-    245c:	e5c32008 	strb	r2, [r3, #8]
-    2460:	e59f3ee8 	ldr	r3, [pc, #3816]	; 3350 <.text+0x3350>
-    2464:	e5d39003 	ldrb	r9, [r3, #3]
-    2468:	e5d3b002 	ldrb	fp, [r3, #2]
-    246c:	e5d3a01a 	ldrb	sl, [r3, #26]
-    2470:	e5d3801e 	ldrb	r8, [r3, #30]
-    2474:	e5d37006 	ldrb	r7, [r3, #6]
-    2478:	e5d34022 	ldrb	r4, [r3, #34]
-    247c:	e5d32026 	ldrb	r2, [r3, #38]
-    2480:	e5d35001 	ldrb	r5, [r3, #1]
-    2484:	e5d36019 	ldrb	r6, [r3, #25]
-    2488:	e5d3e01d 	ldrb	lr, [r3, #29]
-    248c:	e5d31005 	ldrb	r1, [r3, #5]
-    2490:	e5d3c021 	ldrb	ip, [r3, #33]
-    2494:	e5d30025 	ldrb	r0, [r3, #37]
-    2498:	e58d9060 	str	r9, [sp, #96]
-    249c:	e5d3901b 	ldrb	r9, [r3, #27]
-    24a0:	e58d905c 	str	r9, [sp, #92]
-    24a4:	e5d3901f 	ldrb	r9, [r3, #31]
-    24a8:	e58d9054 	str	r9, [sp, #84]
-    24ac:	e5d39007 	ldrb	r9, [r3, #7]
-    24b0:	e58d904c 	str	r9, [sp, #76]
-    24b4:	e5d39023 	ldrb	r9, [r3, #35]
-    24b8:	e58d9048 	str	r9, [sp, #72]
-    24bc:	e5d39027 	ldrb	r9, [r3, #39]
-    24c0:	e58d9040 	str	r9, [sp, #64]
-    24c4:	e1800402 	orr	r0, r0, r2, lsl #8
-    24c8:	e5d3201c 	ldrb	r2, [r3, #28]
-    24cc:	e185540b 	orr	r5, r5, fp, lsl #8
-    24d0:	e186640a 	orr	r6, r6, sl, lsl #8
-    24d4:	e5d3b000 	ldrb	fp, [r3]
-    24d8:	e5d3a004 	ldrb	sl, [r3, #4]
-    24dc:	e58d2058 	str	r2, [sp, #88]
-    24e0:	e18cc404 	orr	ip, ip, r4, lsl #8
-    24e4:	e5d34020 	ldrb	r4, [r3, #32]
-    24e8:	e58d4050 	str	r4, [sp, #80]
-    24ec:	e5d39024 	ldrb	r9, [r3, #36]
-    24f0:	e18ee408 	orr	lr, lr, r8, lsl #8
-    24f4:	e5d38008 	ldrb	r8, [r3, #8]
-    24f8:	e58d9044 	str	r9, [sp, #68]
-    24fc:	e5d32028 	ldrb	r2, [r3, #40]
-    2500:	e59d4060 	ldr	r4, [sp, #96]
-    2504:	e59d905c 	ldr	r9, [sp, #92]
-    2508:	e58d203c 	str	r2, [sp, #60]
-    250c:	e59d2054 	ldr	r2, [sp, #84]
-    2510:	e1855804 	orr	r5, r5, r4, lsl #16
-    2514:	e1866809 	orr	r6, r6, r9, lsl #16
-    2518:	e59d404c 	ldr	r4, [sp, #76]
-    251c:	e59d9048 	ldr	r9, [sp, #72]
-    2520:	e18ee802 	orr	lr, lr, r2, lsl #16
-    2524:	e1811407 	orr	r1, r1, r7, lsl #8
-    2528:	e59d2040 	ldr	r2, [sp, #64]
-    252c:	e1857c0a 	orr	r7, r5, sl, lsl #24
-    2530:	e1811804 	orr	r1, r1, r4, lsl #16
-    2534:	e59d5058 	ldr	r5, [sp, #88]
-    2538:	e18cc809 	orr	ip, ip, r9, lsl #16
-    253c:	e59d9050 	ldr	r9, [sp, #80]
-    2540:	e1818c08 	orr	r8, r1, r8, lsl #24
-    2544:	e1800802 	orr	r0, r0, r2, lsl #16
-    2548:	e59d103c 	ldr	r1, [sp, #60]
-    254c:	e59f2e00 	ldr	r2, [pc, #3584]	; 3354 <.text+0x3354>
-    2550:	e186ac05 	orr	sl, r6, r5, lsl #24
-    2554:	e18e5c09 	orr	r5, lr, r9, lsl #24
-    2558:	e582509c 	str	r5, [r2, #156]
-    255c:	e1800c01 	orr	r0, r0, r1, lsl #24
-    2560:	e59f5df0 	ldr	r5, [pc, #3568]	; 3358 <.text+0x3358>
-    2564:	e59f9df0 	ldr	r9, [pc, #3568]	; 335c <.text+0x335c>
-    2568:	e58d0038 	str	r0, [sp, #56]
-    256c:	e59de044 	ldr	lr, [sp, #68]
-    2570:	e20b1001 	and	r1, fp, #1	; 0x1
-    2574:	e20b0002 	and	r0, fp, #2	; 0x2
-    2578:	e5c51000 	strb	r1, [r5]
-    257c:	e5c90000 	strb	r0, [r9]
-    2580:	e59f1dd8 	ldr	r1, [pc, #3544]	; 3360 <.text+0x3360>
-    2584:	e59f0dd8 	ldr	r0, [pc, #3544]	; 3364 <.text+0x3364>
-    2588:	e18c6c0e 	orr	r6, ip, lr, lsl #24
-    258c:	e20bc004 	and	ip, fp, #4	; 0x4
-    2590:	e20be020 	and	lr, fp, #32	; 0x20
-    2594:	e5c0c000 	strb	ip, [r0]
-    2598:	e5c1e000 	strb	lr, [r1]
-    259c:	e5827094 	str	r7, [r2, #148]
-    25a0:	e582a098 	str	sl, [r2, #152]
-    25a4:	e5827090 	str	r7, [r2, #144]
-    25a8:	e59f4db8 	ldr	r4, [pc, #3512]	; 3368 <.text+0x3368>
-    25ac:	e59d2038 	ldr	r2, [sp, #56]
-    25b0:	e5848094 	str	r8, [r4, #148]
-    25b4:	e5846098 	str	r6, [r4, #152]
-    25b8:	e5848090 	str	r8, [r4, #144]
-    25bc:	e584209c 	str	r2, [r4, #156]
-    25c0:	e5d3a02b 	ldrb	sl, [r3, #43]
-    25c4:	e5d3800a 	ldrb	r8, [r3, #10]
-    25c8:	e5d3702a 	ldrb	r7, [r3, #42]
-    25cc:	e5d36032 	ldrb	r6, [r3, #50]
-    25d0:	e5d35016 	ldrb	r5, [r3, #22]
-    25d4:	e5d3403e 	ldrb	r4, [r3, #62]
-    25d8:	e5d3900b 	ldrb	r9, [r3, #11]
-    25dc:	e5d31009 	ldrb	r1, [r3, #9]
-    25e0:	e5d3e029 	ldrb	lr, [r3, #41]
-    25e4:	e5d32031 	ldrb	r2, [r3, #49]
-    25e8:	e5d3c015 	ldrb	ip, [r3, #21]
-    25ec:	e5d3003d 	ldrb	r0, [r3, #61]
-    25f0:	e58da034 	str	sl, [sp, #52]
-    25f4:	e5d3a033 	ldrb	sl, [r3, #51]
-    25f8:	e58da030 	str	sl, [sp, #48]
-    25fc:	e5d3a017 	ldrb	sl, [r3, #23]
-    2600:	e58da02c 	str	sl, [sp, #44]
-    2604:	e5d3a03f 	ldrb	sl, [r3, #63]
-    2608:	e58da024 	str	sl, [sp, #36]
-    260c:	e1800404 	orr	r0, r0, r4, lsl #8
-    2610:	e5d34040 	ldrb	r4, [r3, #64]
-    2614:	e58d4020 	str	r4, [sp, #32]
-    2618:	e1811408 	orr	r1, r1, r8, lsl #8
-    261c:	e5d3a034 	ldrb	sl, [r3, #52]
-    2620:	e5d3802c 	ldrb	r8, [r3, #44]
-    2624:	e1811809 	orr	r1, r1, r9, lsl #16
-    2628:	e18ee407 	orr	lr, lr, r7, lsl #8
-    262c:	e59d9030 	ldr	r9, [sp, #48]
-    2630:	e5d3700c 	ldrb	r7, [r3, #12]
-    2634:	e5d33018 	ldrb	r3, [r3, #24]
-    2638:	e1822406 	orr	r2, r2, r6, lsl #8
-    263c:	e18cc405 	orr	ip, ip, r5, lsl #8
-    2640:	e59d5034 	ldr	r5, [sp, #52]
-    2644:	e1822809 	orr	r2, r2, r9, lsl #16
-    2648:	e58d3028 	str	r3, [sp, #40]
-    264c:	e59d4024 	ldr	r4, [sp, #36]
-    2650:	e59d302c 	ldr	r3, [sp, #44]
-    2654:	e18ee805 	orr	lr, lr, r5, lsl #16
-    2658:	e59d9028 	ldr	r9, [sp, #40]
-    265c:	e1815c07 	orr	r5, r1, r7, lsl #24
-    2660:	e1821c0a 	orr	r1, r2, sl, lsl #24
-    2664:	e59da020 	ldr	sl, [sp, #32]
-    2668:	e18cc803 	orr	ip, ip, r3, lsl #16
-    266c:	e1800804 	orr	r0, r0, r4, lsl #16
-    2670:	e59f3cf4 	ldr	r3, [pc, #3316]	; 336c <.text+0x336c>
-    2674:	e59f4cf4 	ldr	r4, [pc, #3316]	; 3370 <.text+0x3370>
-    2678:	e18e6c08 	orr	r6, lr, r8, lsl #24
-    267c:	e1802c0a 	orr	r2, r0, sl, lsl #24
-    2680:	e18cec09 	orr	lr, ip, r9, lsl #24
-    2684:	e31b0080 	tst	fp, #128	; 0x80
-    2688:	e583109c 	str	r1, [r3, #156]
-    268c:	e5842018 	str	r2, [r4, #24]
-    2690:	e5835094 	str	r5, [r3, #148]
-    2694:	e5836098 	str	r6, [r3, #152]
-    2698:	e584e014 	str	lr, [r4, #20]
-    269c:	e5835090 	str	r5, [r3, #144]
-    26a0:	1a0002a5 	bne	313c <SDK_mainloop+0xd94>
-    26a4:	eb000bf0 	bl	566c <KFilter>
-    26a8:	e59fccb0 	ldr	ip, [pc, #3248]	; 3360 <.text+0x3360>
-    26ac:	e5dc3000 	ldrb	r3, [ip]
-    26b0:	e3530000 	cmp	r3, #0	; 0x0
-    26b4:	0a0001d0 	beq	2dfc <SDK_mainloop+0xa54>
-    26b8:	e59f3cb4 	ldr	r3, [pc, #3252]	; 3374 <.text+0x3374>
-    26bc:	e5932018 	ldr	r2, [r3, #24]
-    26c0:	e59f6cb0 	ldr	r6, [pc, #3248]	; 3378 <.text+0x3378>
-    26c4:	e1a00c22 	mov	r0, r2, lsr #24
-    26c8:	e1a03422 	mov	r3, r2, lsr #8
-    26cc:	e1a01822 	mov	r1, r2, lsr #16
-    26d0:	e5c63021 	strb	r3, [r6, #33]
-    26d4:	e5c61022 	strb	r1, [r6, #34]
-    26d8:	e5c60023 	strb	r0, [r6, #35]
-    26dc:	e5c62020 	strb	r2, [r6, #32]
-    26e0:	e59fec70 	ldr	lr, [pc, #3184]	; 3358 <.text+0x3358>
-    26e4:	e5de3000 	ldrb	r3, [lr]
-    26e8:	e3530000 	cmp	r3, #0	; 0x0
-    26ec:	0a0001a4 	beq	2d84 <SDK_mainloop+0x9dc>
-    26f0:	e59f3c7c 	ldr	r3, [pc, #3196]	; 3374 <.text+0x3374>
-    26f4:	e593100c 	ldr	r1, [r3, #12]
-    26f8:	e5932000 	ldr	r2, [r3]
-    26fc:	e1a05c21 	mov	r5, r1, lsr #24
-    2700:	e1a04c22 	mov	r4, r2, lsr #24
-    2704:	e1a03422 	mov	r3, r2, lsr #8
-    2708:	e1a00822 	mov	r0, r2, lsr #16
-    270c:	e1a0c421 	mov	ip, r1, lsr #8
-    2710:	e1a0e821 	mov	lr, r1, lsr #16
-    2714:	e5c63001 	strb	r3, [r6, #1]
-    2718:	e5c60002 	strb	r0, [r6, #2]
-    271c:	e5c64003 	strb	r4, [r6, #3]
-    2720:	e5c6c00d 	strb	ip, [r6, #13]
-    2724:	e5c6e00e 	strb	lr, [r6, #14]
-    2728:	e5c6500f 	strb	r5, [r6, #15]
-    272c:	e5c62000 	strb	r2, [r6]
-    2730:	e5c6100c 	strb	r1, [r6, #12]
-    2734:	e59f0c20 	ldr	r0, [pc, #3104]	; 335c <.text+0x335c>
-    2738:	e5d03000 	ldrb	r3, [r0]
-    273c:	e3530000 	cmp	r3, #0	; 0x0
-    2740:	0a000171 	beq	2d0c <SDK_mainloop+0x964>
-    2744:	e59f3c28 	ldr	r3, [pc, #3112]	; 3374 <.text+0x3374>
-    2748:	e5931010 	ldr	r1, [r3, #16]
-    274c:	e5932004 	ldr	r2, [r3, #4]
-    2750:	e1a05c21 	mov	r5, r1, lsr #24
-    2754:	e1a04c22 	mov	r4, r2, lsr #24
-    2758:	e1a03422 	mov	r3, r2, lsr #8
-    275c:	e1a00822 	mov	r0, r2, lsr #16
-    2760:	e1a0c421 	mov	ip, r1, lsr #8
-    2764:	e1a0e821 	mov	lr, r1, lsr #16
-    2768:	e5c63005 	strb	r3, [r6, #5]
-    276c:	e5c60006 	strb	r0, [r6, #6]
-    2770:	e5c64007 	strb	r4, [r6, #7]
-    2774:	e5c6c011 	strb	ip, [r6, #17]
-    2778:	e5c6e012 	strb	lr, [r6, #18]
-    277c:	e5c65013 	strb	r5, [r6, #19]
-    2780:	e5c62004 	strb	r2, [r6, #4]
-    2784:	e5c61010 	strb	r1, [r6, #16]
-    2788:	e59f1bd4 	ldr	r1, [pc, #3028]	; 3364 <.text+0x3364>
-    278c:	e5d13000 	ldrb	r3, [r1]
-    2790:	e3530000 	cmp	r3, #0	; 0x0
-    2794:	0a00013e 	beq	2c94 <SDK_mainloop+0x8ec>
-    2798:	e59f3bd4 	ldr	r3, [pc, #3028]	; 3374 <.text+0x3374>
-    279c:	e5931014 	ldr	r1, [r3, #20]
-    27a0:	e5932008 	ldr	r2, [r3, #8]
-    27a4:	e1a05c21 	mov	r5, r1, lsr #24
-    27a8:	e1a04c22 	mov	r4, r2, lsr #24
-    27ac:	e1a03422 	mov	r3, r2, lsr #8
-    27b0:	e1a00822 	mov	r0, r2, lsr #16
-    27b4:	e1a0c421 	mov	ip, r1, lsr #8
-    27b8:	e1a0e821 	mov	lr, r1, lsr #16
-    27bc:	e5c63009 	strb	r3, [r6, #9]
-    27c0:	e5c6000a 	strb	r0, [r6, #10]
-    27c4:	e5c6400b 	strb	r4, [r6, #11]
-    27c8:	e5c6c015 	strb	ip, [r6, #21]
-    27cc:	e5c6e016 	strb	lr, [r6, #22]
-    27d0:	e5c65017 	strb	r5, [r6, #23]
-    27d4:	e5c62008 	strb	r2, [r6, #8]
-    27d8:	e5c61014 	strb	r1, [r6, #20]
-    27dc:	e59fbb98 	ldr	fp, [pc, #2968]	; 337c <.text+0x337c>
-    27e0:	e1db00f4 	ldrsh	r0, [fp, #4]
-    27e4:	eb0003f5 	bl	37c0 <LLToSIAngleRoll>
-    27e8:	e1a0cc20 	mov	ip, r0, lsr #24
-    27ec:	e1a03000 	mov	r3, r0
-    27f0:	e1a02420 	mov	r2, r0, lsr #8
-    27f4:	e1a01820 	mov	r1, r0, lsr #16
-    27f8:	e1db00f2 	ldrsh	r0, [fp, #2]
-    27fc:	e5c6c01b 	strb	ip, [r6, #27]
-    2800:	e5c62019 	strb	r2, [r6, #25]
-    2804:	e5c6101a 	strb	r1, [r6, #26]
-    2808:	e5c63018 	strb	r3, [r6, #24]
-    280c:	eb000465 	bl	39a8 <LLToSIAnglePitch>
-    2810:	e1a03000 	mov	r3, r0
-    2814:	e1a02c20 	mov	r2, r0, lsr #24
-    2818:	e1a01420 	mov	r1, r0, lsr #8
-    281c:	e1a00820 	mov	r0, r0, lsr #16
-    2820:	e5c6201f 	strb	r2, [r6, #31]
-    2824:	e5c6101d 	strb	r1, [r6, #29]
-    2828:	e5c6001e 	strb	r0, [r6, #30]
-    282c:	e5c6301c 	strb	r3, [r6, #28]
-    2830:	eb000782 	bl	4640 <processCtrl>
-    2834:	e59fcb44 	ldr	ip, [pc, #2884]	; 3380 <.text+0x3380>
-    2838:	e1db35ba 	ldrh	r3, [fp, #90]
-    283c:	e1dc20f0 	ldrsh	r2, [ip]
-    2840:	e3520000 	cmp	r2, #0	; 0x0
-    2844:	13a01000 	movne	r1, #0	; 0x0
-    2848:	02031001 	andeq	r1, r3, #1	; 0x1
-    284c:	e3510000 	cmp	r1, #0	; 0x0
-    2850:	159f2ad8 	ldrne	r2, [pc, #2776]	; 3330 <.text+0x3330>
-    2854:	e2030001 	and	r0, r3, #1	; 0x1
-    2858:	e2033001 	and	r3, r3, #1	; 0x1
-    285c:	13a03003 	movne	r3, #3	; 0x3
-    2860:	15c23000 	strneb	r3, [r2]
-    2864:	1a00000a 	bne	2894 <SDK_mainloop+0x4ec>
-    2868:	e2233001 	eor	r3, r3, #1	; 0x1
-    286c:	e3520000 	cmp	r2, #0	; 0x0
-    2870:	03a03000 	moveq	r3, #0	; 0x0
-    2874:	12033001 	andne	r3, r3, #1	; 0x1
-    2878:	e3530000 	cmp	r3, #0	; 0x0
-    287c:	0a000004 	beq	2894 <SDK_mainloop+0x4ec>
-    2880:	e59f4aa8 	ldr	r4, [pc, #2728]	; 3330 <.text+0x3330>
-    2884:	e5d43000 	ldrb	r3, [r4]
-    2888:	e35300ff 	cmp	r3, #255	; 0xff
-    288c:	11a03004 	movne	r3, r4
-    2890:	15c31000 	strneb	r1, [r3]
-    2894:	e59f4ae8 	ldr	r4, [pc, #2792]	; 3384 <.text+0x3384>
-    2898:	e5943000 	ldr	r3, [r4]
-    289c:	e5d32008 	ldrb	r2, [r3, #8]
-    28a0:	e3520000 	cmp	r2, #0	; 0x0
-    28a4:	e1cc00b0 	strh	r0, [ip]
-    28a8:	0a000013 	beq	28fc <SDK_mainloop+0x554>
-    28ac:	e59f3a90 	ldr	r3, [pc, #2704]	; 3344 <.text+0x3344>
-    28b0:	e1d320b8 	ldrh	r2, [r3, #8]
-    28b4:	e3520000 	cmp	r2, #0	; 0x0
-    28b8:	0a00000c 	beq	28f0 <SDK_mainloop+0x548>
-    28bc:	e59f3ac4 	ldr	r3, [pc, #2756]	; 3388 <.text+0x3388>
-    28c0:	e5d33000 	ldrb	r3, [r3]
-    28c4:	e3530003 	cmp	r3, #3	; 0x3
-    28c8:	0a0001c2 	beq	2fd8 <SDK_mainloop+0xc30>
-    28cc:	e3530000 	cmp	r3, #0	; 0x0
-    28d0:	059f2a58 	ldreq	r2, [pc, #2648]	; 3330 <.text+0x3330>
-    28d4:	02433001 	subeq	r3, r3, #1	; 0x1
-    28d8:	05c23000 	streqb	r3, [r2]
-    28dc:	0a000003 	beq	28f0 <SDK_mainloop+0x548>
-    28e0:	e3530004 	cmp	r3, #4	; 0x4
-    28e4:	0a000322 	beq	3574 <.text+0x3574>
-    28e8:	e3530005 	cmp	r3, #5	; 0x5
-    28ec:	0a00030b 	beq	3520 <.text+0x3520>
-    28f0:	e5942000 	ldr	r2, [r4]
-    28f4:	e3a03000 	mov	r3, #0	; 0x0
-    28f8:	e5c23008 	strb	r3, [r2, #8]
-    28fc:	e59faa2c 	ldr	sl, [pc, #2604]	; 3330 <.text+0x3330>
-    2900:	e5da0000 	ldrb	r0, [sl]
-    2904:	e2403001 	sub	r3, r0, #1	; 0x1
-    2908:	e3530001 	cmp	r3, #1	; 0x1
-    290c:	9a00014b 	bls	2e40 <SDK_mainloop+0xa98>
-    2910:	e3500004 	cmp	r0, #4	; 0x4
-    2914:	0a000181 	beq	2f20 <SDK_mainloop+0xb78>
-    2918:	e59f1a10 	ldr	r1, [pc, #2576]	; 3330 <.text+0x3330>
-    291c:	e5d12000 	ldrb	r2, [r1]
-    2920:	e35200ff 	cmp	r2, #255	; 0xff
-    2924:	0a000150 	beq	2e6c <SDK_mainloop+0xac4>
-    2928:	e2423001 	sub	r3, r2, #1	; 0x1
-    292c:	e3530001 	cmp	r3, #1	; 0x1
-    2930:	9a000254 	bls	3288 <SDK_mainloop+0xee0>
-    2934:	e3520000 	cmp	r2, #0	; 0x0
-    2938:	13520003 	cmpne	r2, #3	; 0x3
-    293c:	13a04000 	movne	r4, #0	; 0x0
-    2940:	03a04001 	moveq	r4, #1	; 0x1
-    2944:	0a00017f 	beq	2f48 <SDK_mainloop+0xba0>
-    2948:	e3520004 	cmp	r2, #4	; 0x4
-    294c:	0a0002fa 	beq	353c <.text+0x353c>
-    2950:	e3520005 	cmp	r2, #5	; 0x5
-    2954:	0a00029d 	beq	33d0 <.text+0x33d0>
-    2958:	e59f6a2c 	ldr	r6, [pc, #2604]	; 338c <.text+0x338c>
-    295c:	e5d61002 	ldrb	r1, [r6, #2]
-    2960:	e5d63003 	ldrb	r3, [r6, #3]
-    2964:	e5d6000e 	ldrb	r0, [r6, #14]
-    2968:	e5d6200f 	ldrb	r2, [r6, #15]
-    296c:	e1911403 	orrs	r1, r1, r3, lsl #8
-    2970:	e1804402 	orr	r4, r0, r2, lsl #8
-    2974:	0a000014 	beq	29cc <SDK_mainloop+0x624>
-    2978:	e59f29b4 	ldr	r2, [pc, #2484]	; 3334 <.text+0x3334>
-    297c:	e5920000 	ldr	r0, [r2]
-    2980:	eb004899 	bl	14bec <____umodsi3_from_arm>
-    2984:	e1540000 	cmp	r4, r0
-    2988:	1a00000f 	bne	29cc <SDK_mainloop+0x624>
-    298c:	e59f09b0 	ldr	r0, [pc, #2480]	; 3344 <.text+0x3344>
-    2990:	e59f19f8 	ldr	r1, [pc, #2552]	; 3390 <.text+0x3390>
-    2994:	e3a0c000 	mov	ip, #0	; 0x0
-    2998:	e5d03000 	ldrb	r3, [r0]
-    299c:	e5d02001 	ldrb	r2, [r0, #1]
-    29a0:	e28cc001 	add	ip, ip, #1	; 0x1
-    29a4:	e35c0008 	cmp	ip, #8	; 0x8
-    29a8:	e5c13008 	strb	r3, [r1, #8]
-    29ac:	e5c12009 	strb	r2, [r1, #9]
-    29b0:	e2800002 	add	r0, r0, #2	; 0x2
-    29b4:	e2811002 	add	r1, r1, #2	; 0x2
-    29b8:	1afffff6 	bne	2998 <SDK_mainloop+0x5f0>
-    29bc:	e3a0000b 	mov	r0, #11	; 0xb
-    29c0:	e59f19c8 	ldr	r1, [pc, #2504]	; 3390 <.text+0x3390>
-    29c4:	e3a02018 	mov	r2, #24	; 0x18
-    29c8:	eb001909 	bl	8df4 <writePacket2Ringbuffer>
-    29cc:	e5d61000 	ldrb	r1, [r6]
-    29d0:	e5d63001 	ldrb	r3, [r6, #1]
-    29d4:	e5d6000c 	ldrb	r0, [r6, #12]
-    29d8:	e5d6200d 	ldrb	r2, [r6, #13]
-    29dc:	e1911403 	orrs	r1, r1, r3, lsl #8
-    29e0:	e1804402 	orr	r4, r0, r2, lsl #8
-    29e4:	0a000004 	beq	29fc <SDK_mainloop+0x654>
-    29e8:	e59f3944 	ldr	r3, [pc, #2372]	; 3334 <.text+0x3334>
-    29ec:	e5930000 	ldr	r0, [r3]
-    29f0:	eb00487d 	bl	14bec <____umodsi3_from_arm>
-    29f4:	e1540000 	cmp	r4, r0
-    29f8:	0a000188 	beq	3020 <SDK_mainloop+0xc78>
-    29fc:	e5d61004 	ldrb	r1, [r6, #4]
-    2a00:	e5d63005 	ldrb	r3, [r6, #5]
-    2a04:	e5d60010 	ldrb	r0, [r6, #16]
-    2a08:	e5d62011 	ldrb	r2, [r6, #17]
-    2a0c:	e1911403 	orrs	r1, r1, r3, lsl #8
-    2a10:	e1804402 	orr	r4, r0, r2, lsl #8
-    2a14:	0a000004 	beq	2a2c <SDK_mainloop+0x684>
-    2a18:	e59f5914 	ldr	r5, [pc, #2324]	; 3334 <.text+0x3334>
-    2a1c:	e5950000 	ldr	r0, [r5]
-    2a20:	eb004871 	bl	14bec <____umodsi3_from_arm>
-    2a24:	e1540000 	cmp	r4, r0
-    2a28:	0a000177 	beq	300c <SDK_mainloop+0xc64>
-    2a2c:	e5d61006 	ldrb	r1, [r6, #6]
-    2a30:	e5d63007 	ldrb	r3, [r6, #7]
-    2a34:	e5d60012 	ldrb	r0, [r6, #18]
-    2a38:	e5d62013 	ldrb	r2, [r6, #19]
-    2a3c:	e1911403 	orrs	r1, r1, r3, lsl #8
-    2a40:	e1804402 	orr	r4, r0, r2, lsl #8
-    2a44:	0a000004 	beq	2a5c <SDK_mainloop+0x6b4>
-    2a48:	e59f98e4 	ldr	r9, [pc, #2276]	; 3334 <.text+0x3334>
-    2a4c:	e5990000 	ldr	r0, [r9]
-    2a50:	eb004865 	bl	14bec <____umodsi3_from_arm>
-    2a54:	e1540000 	cmp	r4, r0
-    2a58:	0a0001b2 	beq	3128 <SDK_mainloop+0xd80>
-    2a5c:	e5d61008 	ldrb	r1, [r6, #8]
-    2a60:	e5d63009 	ldrb	r3, [r6, #9]
-    2a64:	e5d60014 	ldrb	r0, [r6, #20]
-    2a68:	e5d62015 	ldrb	r2, [r6, #21]
-    2a6c:	e1911403 	orrs	r1, r1, r3, lsl #8
-    2a70:	e1804402 	orr	r4, r0, r2, lsl #8
-    2a74:	0a000004 	beq	2a8c <SDK_mainloop+0x6e4>
-    2a78:	e59fa8b4 	ldr	sl, [pc, #2228]	; 3334 <.text+0x3334>
-    2a7c:	e59a0000 	ldr	r0, [sl]
-    2a80:	eb004859 	bl	14bec <____umodsi3_from_arm>
-    2a84:	e1540000 	cmp	r4, r0
-    2a88:	0a00014c 	beq	2fc0 <SDK_mainloop+0xc18>
-    2a8c:	e59fb900 	ldr	fp, [pc, #2304]	; 3394 <.text+0x3394>
-    2a90:	e5d6100b 	ldrb	r1, [r6, #11]
-    2a94:	e5d6300a 	ldrb	r3, [r6, #10]
-    2a98:	e5d60016 	ldrb	r0, [r6, #22]
-    2a9c:	e5d62017 	ldrb	r2, [r6, #23]
-    2aa0:	e1931401 	orrs	r1, r3, r1, lsl #8
-    2aa4:	e1804402 	orr	r4, r0, r2, lsl #8
-    2aa8:	0a000004 	beq	2ac0 <SDK_mainloop+0x718>
-    2aac:	e59fc880 	ldr	ip, [pc, #2176]	; 3334 <.text+0x3334>
-    2ab0:	e59c0000 	ldr	r0, [ip]
-    2ab4:	eb00484c 	bl	14bec <____umodsi3_from_arm>
-    2ab8:	e1540000 	cmp	r4, r0
-    2abc:	0a0001a0 	beq	3144 <SDK_mainloop+0xd9c>
-    2ac0:	e3a0420e 	mov	r4, #-536870912	; 0xe0000000
-    2ac4:	e2844902 	add	r4, r4, #32768	; 0x8000
-    2ac8:	eb001a51 	bl	9414 <UART_send_ringbuffer>
-    2acc:	e5943008 	ldr	r3, [r4, #8]
-    2ad0:	e59d2064 	ldr	r2, [sp, #100]
-    2ad4:	e1520003 	cmp	r2, r3
-    2ad8:	8a0000ed 	bhi	2e94 <SDK_mainloop+0xaec>
-    2adc:	e5943008 	ldr	r3, [r4, #8]
-    2ae0:	e59d5064 	ldr	r5, [sp, #100]
-    2ae4:	e0654003 	rsb	r4, r5, r3
-    2ae8:	eb001564 	bl	8080 <processorClockFrequency>
-    2aec:	e59f88a4 	ldr	r8, [pc, #2212]	; 3398 <.text+0x3398>
-    2af0:	e1a06000 	mov	r6, r0
-    2af4:	e1a00004 	mov	r0, r4
-    2af8:	eb00436d 	bl	138b4 <__aeabi_i2d>
-    2afc:	e3540000 	cmp	r4, #0	; 0x0
-    2b00:	e5987000 	ldr	r7, [r8]
-    2b04:	ba0000ef 	blt	2ec8 <SDK_mainloop+0xb20>
-    2b08:	e3a02101 	mov	r2, #1073741824	; 0x40000000
-    2b0c:	e2822859 	add	r2, r2, #5832704	; 0x590000
-    2b10:	e3a03000 	mov	r3, #0	; 0x0
-    2b14:	eb0043a1 	bl	139a0 <__aeabi_dmul>
-    2b18:	e1a04000 	mov	r4, r0
-    2b1c:	e1a00006 	mov	r0, r6
-    2b20:	e1a05001 	mov	r5, r1
-    2b24:	eb004362 	bl	138b4 <__aeabi_i2d>
-    2b28:	e3560000 	cmp	r6, #0	; 0x0
-    2b2c:	ba000110 	blt	2f74 <SDK_mainloop+0xbcc>
-    2b30:	e1a02000 	mov	r2, r0
-    2b34:	e1a03001 	mov	r3, r1
-    2b38:	e1a00004 	mov	r0, r4
-    2b3c:	e1a01005 	mov	r1, r5
-    2b40:	eb00443a 	bl	13c30 <__aeabi_ddiv>
-    2b44:	e3a02101 	mov	r2, #1073741824	; 0x40000000
-    2b48:	e282288f 	add	r2, r2, #9371648	; 0x8f0000
-    2b4c:	e2822901 	add	r2, r2, #16384	; 0x4000
-    2b50:	e3a03000 	mov	r3, #0	; 0x0
-    2b54:	eb004391 	bl	139a0 <__aeabi_dmul>
-    2b58:	eb00451e 	bl	13fd8 <__aeabi_d2f>
-    2b5c:	e1a01007 	mov	r1, r7
-    2b60:	eb004547 	bl	14084 <__addsf3>
-    2b64:	e59f97c8 	ldr	r9, [pc, #1992]	; 3334 <.text+0x3334>
-    2b68:	e59f282c 	ldr	r2, [pc, #2092]	; 339c <.text+0x339c>
-    2b6c:	e5991000 	ldr	r1, [r9]
-    2b70:	e083a192 	umull	sl, r3, r2, r1
-    2b74:	e1a032a3 	mov	r3, r3, lsr #5
-    2b78:	e0833103 	add	r3, r3, r3, lsl #2
-    2b7c:	e0833103 	add	r3, r3, r3, lsl #2
-    2b80:	e1510103 	cmp	r1, r3, lsl #2
-    2b84:	e5880000 	str	r0, [r8]
-    2b88:	1a00000c 	bne	2bc0 <SDK_mainloop+0x818>
-    2b8c:	e3a01442 	mov	r1, #1107296256	; 0x42000000
-    2b90:	e2811732 	add	r1, r1, #13107200	; 0xc80000
-    2b94:	eb004648 	bl	144bc <__aeabi_fdiv>
-    2b98:	e3a03000 	mov	r3, #0	; 0x0
-    2b9c:	e1a02000 	mov	r2, r0
-    2ba0:	e1a0cc20 	mov	ip, r0, lsr #24
-    2ba4:	e1a01420 	mov	r1, r0, lsr #8
-    2ba8:	e1a00820 	mov	r0, r0, lsr #16
-    2bac:	e5883000 	str	r3, [r8]
-    2bb0:	e5cb1015 	strb	r1, [fp, #21]
-    2bb4:	e5cb0016 	strb	r0, [fp, #22]
-    2bb8:	e5cbc017 	strb	ip, [fp, #23]
-    2bbc:	e5cb2014 	strb	r2, [fp, #20]
-    2bc0:	e59f37d8 	ldr	r3, [pc, #2008]	; 33a0 <.text+0x33a0>
-    2bc4:	e1d300f0 	ldrsh	r0, [r3]
-    2bc8:	eb004339 	bl	138b4 <__aeabi_i2d>
-    2bcc:	e3a02101 	mov	r2, #1073741824	; 0x40000000
-    2bd0:	e282288f 	add	r2, r2, #9371648	; 0x8f0000
-    2bd4:	e2822901 	add	r2, r2, #16384	; 0x4000
-    2bd8:	e3a03000 	mov	r3, #0	; 0x0
-    2bdc:	eb004413 	bl	13c30 <__aeabi_ddiv>
-    2be0:	eb0044fc 	bl	13fd8 <__aeabi_d2f>
-    2be4:	e59fc7b8 	ldr	ip, [pc, #1976]	; 33a4 <.text+0x33a4>
-    2be8:	e89c0018 	ldmia	ip, {r3, r4}
-    2bec:	e1a02000 	mov	r2, r0
-    2bf0:	e1a0ac20 	mov	sl, r0, lsr #24
-    2bf4:	e1a01c24 	mov	r1, r4, lsr #24
-    2bf8:	e1a00420 	mov	r0, r0, lsr #8
-    2bfc:	e1a0c822 	mov	ip, r2, lsr #16
-    2c00:	e1a0e423 	mov	lr, r3, lsr #8
-    2c04:	e1a05823 	mov	r5, r3, lsr #16
-    2c08:	e1a06c23 	mov	r6, r3, lsr #24
-    2c0c:	e1a07424 	mov	r7, r4, lsr #8
-    2c10:	e1a08824 	mov	r8, r4, lsr #16
-    2c14:	e5cb1007 	strb	r1, [fp, #7]
-    2c18:	e5cb0011 	strb	r0, [fp, #17]
-    2c1c:	e5cbc012 	strb	ip, [fp, #18]
-    2c20:	e5cba013 	strb	sl, [fp, #19]
-    2c24:	e5cbe001 	strb	lr, [fp, #1]
-    2c28:	e5cb5002 	strb	r5, [fp, #2]
-    2c2c:	e5cb6003 	strb	r6, [fp, #3]
-    2c30:	e5cb7005 	strb	r7, [fp, #5]
-    2c34:	e5cb8006 	strb	r8, [fp, #6]
-    2c38:	e5cb2010 	strb	r2, [fp, #16]
-    2c3c:	e5cb3000 	strb	r3, [fp]
-    2c40:	e5cb4004 	strb	r4, [fp, #4]
-    2c44:	e28dd068 	add	sp, sp, #104	; 0x68
-    2c48:	e8bd4ff0 	ldmia	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
-    2c4c:	e12fff1e 	bx	lr
-    2c50:	e59f56f0 	ldr	r5, [pc, #1776]	; 3348 <.text+0x3348>
-    2c54:	e0839195 	umull	r9, r3, r5, r1
-    2c58:	e1a03323 	mov	r3, r3, lsr #6
-    2c5c:	e0632283 	rsb	r2, r3, r3, lsl #5
-    2c60:	e0833102 	add	r3, r3, r2, lsl #2
-    2c64:	e1510183 	cmp	r1, r3, lsl #3
-    2c68:	0a000193 	beq	32bc <SDK_mainloop+0xf14>
-    2c6c:	e083c195 	umull	ip, r3, r5, r1
-    2c70:	e1a03323 	mov	r3, r3, lsr #6
-    2c74:	e0632283 	rsb	r2, r3, r3, lsl #5
-    2c78:	e0833102 	add	r3, r3, r2, lsl #2
-    2c7c:	e0413183 	sub	r3, r1, r3, lsl #3
-    2c80:	e3530032 	cmp	r3, #50	; 0x32
-    2c84:	1afffded 	bne	2440 <SDK_mainloop+0x98>
-    2c88:	e1a00004 	mov	r0, r4
-    2c8c:	eb00120d 	bl	74c8 <beeper>
-    2c90:	eafffdea 	b	2440 <SDK_mainloop+0x98>
-    2c94:	e59f370c 	ldr	r3, [pc, #1804]	; 33a8 <.text+0x33a8>
-    2c98:	e5d3c001 	ldrb	ip, [r3, #1]
-    2c9c:	e5d30005 	ldrb	r0, [r3, #5]
-    2ca0:	e5d31000 	ldrb	r1, [r3]
-    2ca4:	e5d32004 	ldrb	r2, [r3, #4]
-    2ca8:	e5d3e002 	ldrb	lr, [r3, #2]
-    2cac:	e5d34006 	ldrb	r4, [r3, #6]
-    2cb0:	e181140c 	orr	r1, r1, ip, lsl #8
-    2cb4:	e1822400 	orr	r2, r2, r0, lsl #8
-    2cb8:	e5d3c007 	ldrb	ip, [r3, #7]
-    2cbc:	e5d30003 	ldrb	r0, [r3, #3]
-    2cc0:	e181180e 	orr	r1, r1, lr, lsl #16
-    2cc4:	e1822804 	orr	r2, r2, r4, lsl #16
-    2cc8:	e1811c00 	orr	r1, r1, r0, lsl #24
-    2ccc:	e1822c0c 	orr	r2, r2, ip, lsl #24
-    2cd0:	e1a04c21 	mov	r4, r1, lsr #24
-    2cd4:	e1a05c22 	mov	r5, r2, lsr #24
-    2cd8:	e1a03421 	mov	r3, r1, lsr #8
-    2cdc:	e1a00821 	mov	r0, r1, lsr #16
-    2ce0:	e1a0c422 	mov	ip, r2, lsr #8
-    2ce4:	e1a0e822 	mov	lr, r2, lsr #16
-    2ce8:	e5c63009 	strb	r3, [r6, #9]
-    2cec:	e5c6000a 	strb	r0, [r6, #10]
-    2cf0:	e5c6400b 	strb	r4, [r6, #11]
-    2cf4:	e5c6c015 	strb	ip, [r6, #21]
-    2cf8:	e5c6e016 	strb	lr, [r6, #22]
-    2cfc:	e5c65017 	strb	r5, [r6, #23]
-    2d00:	e5c61008 	strb	r1, [r6, #8]
-    2d04:	e5c62014 	strb	r2, [r6, #20]
-    2d08:	eafffeb3 	b	27dc <SDK_mainloop+0x434>
-    2d0c:	e59f3698 	ldr	r3, [pc, #1688]	; 33ac <.text+0x33ac>
-    2d10:	e5d3c005 	ldrb	ip, [r3, #5]
-    2d14:	e5d3000d 	ldrb	r0, [r3, #13]
-    2d18:	e5d31004 	ldrb	r1, [r3, #4]
-    2d1c:	e5d3200c 	ldrb	r2, [r3, #12]
-    2d20:	e5d3e006 	ldrb	lr, [r3, #6]
-    2d24:	e5d3400e 	ldrb	r4, [r3, #14]
-    2d28:	e181140c 	orr	r1, r1, ip, lsl #8
-    2d2c:	e1822400 	orr	r2, r2, r0, lsl #8
-    2d30:	e5d3c00f 	ldrb	ip, [r3, #15]
-    2d34:	e5d30007 	ldrb	r0, [r3, #7]
-    2d38:	e181180e 	orr	r1, r1, lr, lsl #16
-    2d3c:	e1822804 	orr	r2, r2, r4, lsl #16
-    2d40:	e1811c00 	orr	r1, r1, r0, lsl #24
-    2d44:	e1822c0c 	orr	r2, r2, ip, lsl #24
-    2d48:	e1a04c21 	mov	r4, r1, lsr #24
-    2d4c:	e1a05c22 	mov	r5, r2, lsr #24
-    2d50:	e1a03421 	mov	r3, r1, lsr #8
-    2d54:	e1a00821 	mov	r0, r1, lsr #16
-    2d58:	e1a0c422 	mov	ip, r2, lsr #8
-    2d5c:	e1a0e822 	mov	lr, r2, lsr #16
-    2d60:	e5c63005 	strb	r3, [r6, #5]
-    2d64:	e5c60006 	strb	r0, [r6, #6]
-    2d68:	e5c64007 	strb	r4, [r6, #7]
-    2d6c:	e5c6c011 	strb	ip, [r6, #17]
-    2d70:	e5c6e012 	strb	lr, [r6, #18]
-    2d74:	e5c65013 	strb	r5, [r6, #19]
-    2d78:	e5c61004 	strb	r1, [r6, #4]
-    2d7c:	e5c62010 	strb	r2, [r6, #16]
-    2d80:	eafffe80 	b	2788 <SDK_mainloop+0x3e0>
-    2d84:	e59f3620 	ldr	r3, [pc, #1568]	; 33ac <.text+0x33ac>
-    2d88:	e5d3c001 	ldrb	ip, [r3, #1]
-    2d8c:	e5d30009 	ldrb	r0, [r3, #9]
-    2d90:	e5d31000 	ldrb	r1, [r3]
-    2d94:	e5d32008 	ldrb	r2, [r3, #8]
-    2d98:	e5d3e002 	ldrb	lr, [r3, #2]
-    2d9c:	e5d3400a 	ldrb	r4, [r3, #10]
-    2da0:	e181140c 	orr	r1, r1, ip, lsl #8
-    2da4:	e1822400 	orr	r2, r2, r0, lsl #8
-    2da8:	e5d3c00b 	ldrb	ip, [r3, #11]
-    2dac:	e5d30003 	ldrb	r0, [r3, #3]
-    2db0:	e181180e 	orr	r1, r1, lr, lsl #16
-    2db4:	e1822804 	orr	r2, r2, r4, lsl #16
-    2db8:	e1811c00 	orr	r1, r1, r0, lsl #24
-    2dbc:	e1822c0c 	orr	r2, r2, ip, lsl #24
-    2dc0:	e1a04c21 	mov	r4, r1, lsr #24
-    2dc4:	e1a05c22 	mov	r5, r2, lsr #24
-    2dc8:	e1a03421 	mov	r3, r1, lsr #8
-    2dcc:	e1a00821 	mov	r0, r1, lsr #16
-    2dd0:	e1a0c422 	mov	ip, r2, lsr #8
-    2dd4:	e1a0e822 	mov	lr, r2, lsr #16
-    2dd8:	e5c63001 	strb	r3, [r6, #1]
-    2ddc:	e5c60002 	strb	r0, [r6, #2]
-    2de0:	e5c64003 	strb	r4, [r6, #3]
-    2de4:	e5c6c00d 	strb	ip, [r6, #13]
-    2de8:	e5c6e00e 	strb	lr, [r6, #14]
-    2dec:	e5c6500f 	strb	r5, [r6, #15]
-    2df0:	e5c61000 	strb	r1, [r6]
-    2df4:	e5c6200c 	strb	r2, [r6, #12]
-    2df8:	eafffe4d 	b	2734 <SDK_mainloop+0x38c>
-    2dfc:	e59f25a8 	ldr	r2, [pc, #1448]	; 33ac <.text+0x33ac>
-    2e00:	e5d21011 	ldrb	r1, [r2, #17]
-    2e04:	e5d23010 	ldrb	r3, [r2, #16]
-    2e08:	e5d2c012 	ldrb	ip, [r2, #18]
-    2e0c:	e5d20013 	ldrb	r0, [r2, #19]
-    2e10:	e1833401 	orr	r3, r3, r1, lsl #8
-    2e14:	e183380c 	orr	r3, r3, ip, lsl #16
-    2e18:	e1833c00 	orr	r3, r3, r0, lsl #24
-    2e1c:	e59f6554 	ldr	r6, [pc, #1364]	; 3378 <.text+0x3378>
-    2e20:	e1a00c23 	mov	r0, r3, lsr #24
-    2e24:	e1a02423 	mov	r2, r3, lsr #8
-    2e28:	e1a01823 	mov	r1, r3, lsr #16
-    2e2c:	e5c62021 	strb	r2, [r6, #33]
-    2e30:	e5c61022 	strb	r1, [r6, #34]
-    2e34:	e5c60023 	strb	r0, [r6, #35]
-    2e38:	e5c63020 	strb	r3, [r6, #32]
-    2e3c:	eafffe27 	b	26e0 <SDK_mainloop+0x338>
-    2e40:	e59f3568 	ldr	r3, [pc, #1384]	; 33b0 <.text+0x33b0>
-    2e44:	e59fc558 	ldr	ip, [pc, #1368]	; 33a4 <.text+0x33a4>
-    2e48:	e8930006 	ldmia	r3, {r1, r2}
-    2e4c:	e89c0030 	ldmia	ip, {r4, r5}
-    2e50:	e0544001 	subs	r4, r4, r1
-    2e54:	e0c55002 	sbc	r5, r5, r2
-    2e58:	e3550000 	cmp	r5, #0	; 0x0
-    2e5c:	da000125 	ble	32f8 <SDK_mainloop+0xf50>
-    2e60:	e59fe4c8 	ldr	lr, [pc, #1224]	; 3330 <.text+0x3330>
-    2e64:	e3e03000 	mvn	r3, #0	; 0x0
-    2e68:	e5ce3000 	strb	r3, [lr]
-    2e6c:	e59f2554 	ldr	r2, [pc, #1364]	; 33c8 <.text+0x33c8>
-    2e70:	e59f44c8 	ldr	r4, [pc, #1224]	; 3340 <.text+0x3340>
-    2e74:	e3a03000 	mov	r3, #0	; 0x0
-    2e78:	e5c43001 	strb	r3, [r4, #1]
-    2e7c:	e1c230b8 	strh	r3, [r2, #8]
-    2e80:	e1c230b0 	strh	r3, [r2]
-    2e84:	e1c230b2 	strh	r3, [r2, #2]
-    2e88:	e1c230b6 	strh	r3, [r2, #6]
-    2e8c:	e1c230b4 	strh	r3, [r2, #4]
-    2e90:	eafffeb0 	b	2958 <SDK_mainloop+0x5b0>
-    2e94:	eb001479 	bl	8080 <processorClockFrequency>
-    2e98:	e5943008 	ldr	r3, [r4, #8]
-    2e9c:	e59d4064 	ldr	r4, [sp, #100]
-    2ea0:	e0640000 	rsb	r0, r4, r0
-    2ea4:	e0804003 	add	r4, r0, r3
-    2ea8:	eb001474 	bl	8080 <processorClockFrequency>
-    2eac:	e59f84e4 	ldr	r8, [pc, #1252]	; 3398 <.text+0x3398>
-    2eb0:	e1a06000 	mov	r6, r0
-    2eb4:	e1a00004 	mov	r0, r4
-    2eb8:	eb00427d 	bl	138b4 <__aeabi_i2d>
-    2ebc:	e3540000 	cmp	r4, #0	; 0x0
-    2ec0:	e5987000 	ldr	r7, [r8]
-    2ec4:	aaffff0f 	bge	2b08 <SDK_mainloop+0x760>
-    2ec8:	e3a02441 	mov	r2, #1090519040	; 0x41000000
-    2ecc:	e282260f 	add	r2, r2, #15728640	; 0xf00000
-    2ed0:	e3a03000 	mov	r3, #0	; 0x0
-    2ed4:	eb0041a8 	bl	1357c <__adddf3>
-    2ed8:	eaffff0a 	b	2b08 <SDK_mainloop+0x760>
-    2edc:	e59f44b8 	ldr	r4, [pc, #1208]	; 339c <.text+0x339c>
-    2ee0:	e0839194 	umull	r9, r3, r4, r1
-    2ee4:	e1a032a3 	mov	r3, r3, lsr #5
-    2ee8:	e0833103 	add	r3, r3, r3, lsl #2
-    2eec:	e0833103 	add	r3, r3, r3, lsl #2
-    2ef0:	e1510103 	cmp	r1, r3, lsl #2
-    2ef4:	0a0000fa 	beq	32e4 <SDK_mainloop+0xf3c>
-    2ef8:	e083c194 	umull	ip, r3, r4, r1
-    2efc:	e1a032a3 	mov	r3, r3, lsr #5
-    2f00:	e0833103 	add	r3, r3, r3, lsl #2
-    2f04:	e0833103 	add	r3, r3, r3, lsl #2
-    2f08:	e0413103 	sub	r3, r1, r3, lsl #2
-    2f0c:	e3530032 	cmp	r3, #50	; 0x32
-    2f10:	1afffd4a 	bne	2440 <SDK_mainloop+0x98>
-    2f14:	e1a00005 	mov	r0, r5
-    2f18:	eb00116a 	bl	74c8 <beeper>
-    2f1c:	eafffd47 	b	2440 <SDK_mainloop+0x98>
-    2f20:	e59f5498 	ldr	r5, [pc, #1176]	; 33c0 <.text+0x33c0>
-    2f24:	e595400c 	ldr	r4, [r5, #12]
-    2f28:	e3a01000 	mov	r1, #0	; 0x0
-    2f2c:	e1a00004 	mov	r0, r4
-    2f30:	eb0045b9 	bl	1461c <__gesf2>
-    2f34:	e3500000 	cmp	r0, #0	; 0x0
-    2f38:	ca000012 	bgt	2f88 <SDK_mainloop+0xbe0>
-    2f3c:	e59f03ec 	ldr	r0, [pc, #1004]	; 3330 <.text+0x3330>
-    2f40:	e3a03003 	mov	r3, #3	; 0x3
-    2f44:	e5c03000 	strb	r3, [r0]
-    2f48:	e59f3478 	ldr	r3, [pc, #1144]	; 33c8 <.text+0x33c8>
-    2f4c:	e59fc3ec 	ldr	ip, [pc, #1004]	; 3340 <.text+0x3340>
-    2f50:	e3a0e000 	mov	lr, #0	; 0x0
-    2f54:	e3a02001 	mov	r2, #1	; 0x1
-    2f58:	e5cc2001 	strb	r2, [ip, #1]
-    2f5c:	e1c320b8 	strh	r2, [r3, #8]
-    2f60:	e1c3e0b0 	strh	lr, [r3]
-    2f64:	e1c3e0b2 	strh	lr, [r3, #2]
-    2f68:	e1c3e0b6 	strh	lr, [r3, #6]
-    2f6c:	e1c3e0b4 	strh	lr, [r3, #4]
-    2f70:	eafffe78 	b	2958 <SDK_mainloop+0x5b0>
-    2f74:	e3a02441 	mov	r2, #1090519040	; 0x41000000
-    2f78:	e282260f 	add	r2, r2, #15728640	; 0xf00000
-    2f7c:	e3a03000 	mov	r3, #0	; 0x0
-    2f80:	eb00417d 	bl	1357c <__adddf3>
-    2f84:	eafffee9 	b	2b30 <SDK_mainloop+0x788>
-    2f88:	e1a00004 	mov	r0, r4
-    2f8c:	eb004253 	bl	138e0 <__aeabi_f2d>
-    2f90:	e28f2e3a 	add	r2, pc, #928	; 0x3a0
-    2f94:	e892000c 	ldmia	r2, {r2, r3}
-    2f98:	eb004176 	bl	13578 <__aeabi_dsub>
-    2f9c:	eb00440d 	bl	13fd8 <__aeabi_d2f>
-    2fa0:	e1a03000 	mov	r3, r0
-    2fa4:	e585300c 	str	r3, [r5, #12]
-    2fa8:	e3a01000 	mov	r1, #0	; 0x0
-    2fac:	eb00459c 	bl	14624 <__lesf2>
-    2fb0:	e3500000 	cmp	r0, #0	; 0x0
-    2fb4:	b3a03000 	movlt	r3, #0	; 0x0
-    2fb8:	b585300c 	strlt	r3, [r5, #12]
-    2fbc:	eafffe55 	b	2918 <SDK_mainloop+0x570>
-    2fc0:	e59fb3cc 	ldr	fp, [pc, #972]	; 3394 <.text+0x3394>
-    2fc4:	e3a02018 	mov	r2, #24	; 0x18
-    2fc8:	e1a0100b 	mov	r1, fp
-    2fcc:	e3a0000d 	mov	r0, #13	; 0xd
-    2fd0:	eb001787 	bl	8df4 <writePacket2Ringbuffer>
-    2fd4:	eafffead 	b	2a90 <SDK_mainloop+0x6e8>
-    2fd8:	e59f5350 	ldr	r5, [pc, #848]	; 3330 <.text+0x3330>
-    2fdc:	e5d53000 	ldrb	r3, [r5]
-    2fe0:	e3530000 	cmp	r3, #0	; 0x0
-    2fe4:	0a0000ca 	beq	3314 <SDK_mainloop+0xf6c>
-    2fe8:	e3530003 	cmp	r3, #3	; 0x3
-    2fec:	1afffe3f 	bne	28f0 <SDK_mainloop+0x548>
-    2ff0:	e59f13ac 	ldr	r1, [pc, #940]	; 33a4 <.text+0x33a4>
-    2ff4:	e59f23b4 	ldr	r2, [pc, #948]	; 33b0 <.text+0x33b0>
-    2ff8:	e8910003 	ldmia	r1, {r0, r1}
-    2ffc:	e2433001 	sub	r3, r3, #1	; 0x1
-    3000:	e5c53000 	strb	r3, [r5]
-    3004:	e8820003 	stmia	r2, {r0, r1}
-    3008:	eafffe38 	b	28f0 <SDK_mainloop+0x548>
-    300c:	e59f131c 	ldr	r1, [pc, #796]	; 3330 <.text+0x3330>
-    3010:	e3a02001 	mov	r2, #1	; 0x1
-    3014:	e3a00009 	mov	r0, #9	; 0x9
-    3018:	eb001775 	bl	8df4 <writePacket2Ringbuffer>
-    301c:	eafffe82 	b	2a2c <SDK_mainloop+0x684>
-    3020:	e1db00f4 	ldrsh	r0, [fp, #4]
-    3024:	eb0001e5 	bl	37c0 <LLToSIAngleRoll>
-    3028:	e59f4384 	ldr	r4, [pc, #900]	; 33b4 <.text+0x33b4>
-    302c:	e1a03000 	mov	r3, r0
-    3030:	e1a0cc20 	mov	ip, r0, lsr #24
-    3034:	e1a02420 	mov	r2, r0, lsr #8
-    3038:	e1a01820 	mov	r1, r0, lsr #16
-    303c:	e1db00f2 	ldrsh	r0, [fp, #2]
-    3040:	e5c42001 	strb	r2, [r4, #1]
-    3044:	e5c41002 	strb	r1, [r4, #2]
-    3048:	e5c4c003 	strb	ip, [r4, #3]
-    304c:	e5c43000 	strb	r3, [r4]
-    3050:	eb000254 	bl	39a8 <LLToSIAnglePitch>
-    3054:	e1a03000 	mov	r3, r0
-    3058:	e1a0cc20 	mov	ip, r0, lsr #24
-    305c:	e1a02420 	mov	r2, r0, lsr #8
-    3060:	e1a01820 	mov	r1, r0, lsr #16
-    3064:	e1db00b6 	ldrh	r0, [fp, #6]
-    3068:	e5c42005 	strb	r2, [r4, #5]
-    306c:	e5c41006 	strb	r1, [r4, #6]
-    3070:	e5c4c007 	strb	ip, [r4, #7]
-    3074:	e5c43004 	strb	r3, [r4, #4]
-    3078:	eb000233 	bl	394c <LLToSIAngleYaw>
-    307c:	e1a03000 	mov	r3, r0
-    3080:	e1a0cc20 	mov	ip, r0, lsr #24
-    3084:	e1a02420 	mov	r2, r0, lsr #8
-    3088:	e1a01820 	mov	r1, r0, lsr #16
-    308c:	e1db00fa 	ldrsh	r0, [fp, #10]
-    3090:	e5c42009 	strb	r2, [r4, #9]
-    3094:	e5c4100a 	strb	r1, [r4, #10]
-    3098:	e5c4c00b 	strb	ip, [r4, #11]
-    309c:	e5c43008 	strb	r3, [r4, #8]
-    30a0:	eb0001f5 	bl	387c <LLToSIAngleRateRoll>
-    30a4:	e1a03000 	mov	r3, r0
-    30a8:	e1a0cc20 	mov	ip, r0, lsr #24
-    30ac:	e1a02420 	mov	r2, r0, lsr #8
-    30b0:	e1a01820 	mov	r1, r0, lsr #16
-    30b4:	e1db00f8 	ldrsh	r0, [fp, #8]
-    30b8:	e5c4200d 	strb	r2, [r4, #13]
-    30bc:	e5c4100e 	strb	r1, [r4, #14]
-    30c0:	e5c4c00f 	strb	ip, [r4, #15]
-    30c4:	e5c4300c 	strb	r3, [r4, #12]
-    30c8:	eb0001d2 	bl	3818 <LLToSIAngleRatePitch>
-    30cc:	e1a03000 	mov	r3, r0
-    30d0:	e1a0cc20 	mov	ip, r0, lsr #24
-    30d4:	e1a02423 	mov	r2, r3, lsr #8
-    30d8:	e1a01823 	mov	r1, r3, lsr #16
-    30dc:	e1db00fc 	ldrsh	r0, [fp, #12]
-    30e0:	e5c42011 	strb	r2, [r4, #17]
-    30e4:	e5c41012 	strb	r1, [r4, #18]
-    30e8:	e5c4c013 	strb	ip, [r4, #19]
-    30ec:	e5c43010 	strb	r3, [r4, #16]
-    30f0:	eb0001fb 	bl	38e4 <LLToSIAngleRateYaw>
-    30f4:	e1a03000 	mov	r3, r0
-    30f8:	e1a05c20 	mov	r5, r0, lsr #24
-    30fc:	e1a0c420 	mov	ip, r0, lsr #8
-    3100:	e1a0e820 	mov	lr, r0, lsr #16
-    3104:	e1a01004 	mov	r1, r4
-    3108:	e3a02024 	mov	r2, #36	; 0x24
-    310c:	e5c4c015 	strb	ip, [r4, #21]
-    3110:	e5c4e016 	strb	lr, [r4, #22]
-    3114:	e5c45017 	strb	r5, [r4, #23]
-    3118:	e5c43014 	strb	r3, [r4, #20]
-    311c:	e3a0000a 	mov	r0, #10	; 0xa
-    3120:	eb001733 	bl	8df4 <writePacket2Ringbuffer>
-    3124:	eafffe34 	b	29fc <SDK_mainloop+0x654>
-    3128:	e59f1248 	ldr	r1, [pc, #584]	; 3378 <.text+0x3378>
-    312c:	e3a02024 	mov	r2, #36	; 0x24
-    3130:	e3a00007 	mov	r0, #7	; 0x7
-    3134:	eb00172e 	bl	8df4 <writePacket2Ringbuffer>
-    3138:	eafffe47 	b	2a5c <SDK_mainloop+0x6b4>
-    313c:	eb0008ad 	bl	53f8 <resetKalmanFilter>
-    3140:	eafffd57 	b	26a4 <SDK_mainloop+0x2fc>
-    3144:	e59f5270 	ldr	r5, [pc, #624]	; 33bc <.text+0x33bc>
-    3148:	e59f3278 	ldr	r3, [pc, #632]	; 33c8 <.text+0x33c8>
-    314c:	e5d52005 	ldrb	r2, [r5, #5]
-    3150:	e5d50004 	ldrb	r0, [r5, #4]
-    3154:	e5d51006 	ldrb	r1, [r5, #6]
-    3158:	e5d3e007 	ldrb	lr, [r3, #7]
-    315c:	e1800402 	orr	r0, r0, r2, lsl #8
-    3160:	e59f4250 	ldr	r4, [pc, #592]	; 33b8 <.text+0x33b8>
-    3164:	e5d5a007 	ldrb	sl, [r5, #7]
-    3168:	e5d32002 	ldrb	r2, [r3, #2]
-    316c:	e58de000 	str	lr, [sp]
-    3170:	e5d3c000 	ldrb	ip, [r3]
-    3174:	e5d3e001 	ldrb	lr, [r3, #1]
-    3178:	e5d36004 	ldrb	r6, [r3, #4]
-    317c:	e5d37005 	ldrb	r7, [r3, #5]
-    3180:	e5d38006 	ldrb	r8, [r3, #6]
-    3184:	e1800801 	orr	r0, r0, r1, lsl #16
-    3188:	e5d31003 	ldrb	r1, [r3, #3]
-    318c:	e5c4e003 	strb	lr, [r4, #3]
-    3190:	e5c42000 	strb	r2, [r4]
-    3194:	e5c4c002 	strb	ip, [r4, #2]
-    3198:	e5c46004 	strb	r6, [r4, #4]
-    319c:	e5c47005 	strb	r7, [r4, #5]
-    31a0:	e5c41001 	strb	r1, [r4, #1]
-    31a4:	e5c48006 	strb	r8, [r4, #6]
-    31a8:	e59d1000 	ldr	r1, [sp]
-    31ac:	e1800c0a 	orr	r0, r0, sl, lsl #24
-    31b0:	e5c41007 	strb	r1, [r4, #7]
-    31b4:	eb000150 	bl	36fc <SIToLLCmdRoll>
-    31b8:	e5d51009 	ldrb	r1, [r5, #9]
-    31bc:	e5d52008 	ldrb	r2, [r5, #8]
-    31c0:	e5d5c00a 	ldrb	ip, [r5, #10]
-    31c4:	e1a03800 	mov	r3, r0, lsl #16
-    31c8:	e1822401 	orr	r2, r2, r1, lsl #8
-    31cc:	e5d5000b 	ldrb	r0, [r5, #11]
-    31d0:	e2633000 	rsb	r3, r3, #0	; 0x0
-    31d4:	e182280c 	orr	r2, r2, ip, lsl #16
-    31d8:	e1a01c23 	mov	r1, r3, lsr #24
-    31dc:	e1a03823 	mov	r3, r3, lsr #16
-    31e0:	e5c43018 	strb	r3, [r4, #24]
-    31e4:	e5c41019 	strb	r1, [r4, #25]
-    31e8:	e1820c00 	orr	r0, r2, r0, lsl #24
-    31ec:	eb00014f 	bl	3730 <SIToLLCmdPitch>
-    31f0:	e5d5200d 	ldrb	r2, [r5, #13]
-    31f4:	e5d5300c 	ldrb	r3, [r5, #12]
-    31f8:	e5d5100e 	ldrb	r1, [r5, #14]
-    31fc:	e5d5c00f 	ldrb	ip, [r5, #15]
-    3200:	e1833402 	orr	r3, r3, r2, lsl #8
-    3204:	e1833801 	orr	r3, r3, r1, lsl #16
-    3208:	e1a02420 	mov	r2, r0, lsr #8
-    320c:	e5c4001a 	strb	r0, [r4, #26]
-    3210:	e5c4201b 	strb	r2, [r4, #27]
-    3214:	e1830c0c 	orr	r0, r3, ip, lsl #24
-    3218:	eb000150 	bl	3760 <SIToLLCmdYawRate>
-    321c:	e5d52011 	ldrb	r2, [r5, #17]
-    3220:	e5d53010 	ldrb	r3, [r5, #16]
-    3224:	e5d51012 	ldrb	r1, [r5, #18]
-    3228:	e5d5c013 	ldrb	ip, [r5, #19]
-    322c:	e1833402 	orr	r3, r3, r2, lsl #8
-    3230:	e1833801 	orr	r3, r3, r1, lsl #16
-    3234:	e1a02420 	mov	r2, r0, lsr #8
-    3238:	e5c4001c 	strb	r0, [r4, #28]
-    323c:	e5c4201d 	strb	r2, [r4, #29]
-    3240:	e1830c0c 	orr	r0, r3, ip, lsl #24
-    3244:	eb000151 	bl	3790 <SIToLLCmdThrust>
-    3248:	e5d57003 	ldrb	r7, [r5, #3]
-    324c:	e5d5c000 	ldrb	ip, [r5]
-    3250:	e5d5e001 	ldrb	lr, [r5, #1]
-    3254:	e5d56002 	ldrb	r6, [r5, #2]
-    3258:	e1a03420 	mov	r3, r0, lsr #8
-    325c:	e5c4001e 	strb	r0, [r4, #30]
-    3260:	e1a01004 	mov	r1, r4
-    3264:	e3a02072 	mov	r2, #114	; 0x72
-    3268:	e5c4301f 	strb	r3, [r4, #31]
-    326c:	e5c4c04a 	strb	ip, [r4, #74]
-    3270:	e5c4e04b 	strb	lr, [r4, #75]
-    3274:	e5c4604c 	strb	r6, [r4, #76]
-    3278:	e5c4704d 	strb	r7, [r4, #77]
-    327c:	e3a00012 	mov	r0, #18	; 0x12
-    3280:	eb0016db 	bl	8df4 <writePacket2Ringbuffer>
-    3284:	eafffe0d 	b	2ac0 <SDK_mainloop+0x718>
-    3288:	e59f3138 	ldr	r3, [pc, #312]	; 33c8 <.text+0x33c8>
-    328c:	e59f50ac 	ldr	r5, [pc, #172]	; 3340 <.text+0x3340>
-    3290:	e3a0a000 	mov	sl, #0	; 0x0
-    3294:	e3a02001 	mov	r2, #1	; 0x1
-    3298:	e3e01b3e 	mvn	r1, #63488	; 0xf800
-    329c:	e3a0900c 	mov	r9, #12	; 0xc
-    32a0:	e5c52001 	strb	r2, [r5, #1]
-    32a4:	e1c310b4 	strh	r1, [r3, #4]
-    32a8:	e1c390b8 	strh	r9, [r3, #8]
-    32ac:	e1c3a0b0 	strh	sl, [r3]
-    32b0:	e1c3a0b2 	strh	sl, [r3, #2]
-    32b4:	e1c3a0b6 	strh	sl, [r3, #6]
-    32b8:	eafffda6 	b	2958 <SDK_mainloop+0x5b0>
-    32bc:	e3a00001 	mov	r0, #1	; 0x1
-    32c0:	eb001080 	bl	74c8 <beeper>
-    32c4:	e59fa068 	ldr	sl, [pc, #104]	; 3334 <.text+0x3334>
-    32c8:	e59a1000 	ldr	r1, [sl]
-    32cc:	eafffe66 	b	2c6c <SDK_mainloop+0x8c4>
-    32d0:	e3a00001 	mov	r0, #1	; 0x1
-    32d4:	eb00107b 	bl	74c8 <beeper>
-    32d8:	e59f0054 	ldr	r0, [pc, #84]	; 3334 <.text+0x3334>
-    32dc:	e5901000 	ldr	r1, [r0]
-    32e0:	eafffc4e 	b	2420 <SDK_mainloop+0x78>
-    32e4:	e3a00001 	mov	r0, #1	; 0x1
-    32e8:	eb001076 	bl	74c8 <beeper>
-    32ec:	e59fa040 	ldr	sl, [pc, #64]	; 3334 <.text+0x3334>
-    32f0:	e59a1000 	ldr	r1, [sl]
-    32f4:	eafffeff 	b	2ef8 <SDK_mainloop+0xb50>
-    32f8:	1afffd84 	bne	2910 <SDK_mainloop+0x568>
-    32fc:	e3a0397a 	mov	r3, #1998848	; 0x1e8000
-    3300:	e2833e47 	add	r3, r3, #1136	; 0x470
-    3304:	e283300f 	add	r3, r3, #15	; 0xf
-    3308:	e1540003 	cmp	r4, r3
-    330c:	9afffd7f 	bls	2910 <SDK_mainloop+0x568>
-    3310:	eafffed2 	b	2e60 <SDK_mainloop+0xab8>
-    3314:	e59fa088 	ldr	sl, [pc, #136]	; 33a4 <.text+0x33a4>
-    3318:	e59f2090 	ldr	r2, [pc, #144]	; 33b0 <.text+0x33b0>
-    331c:	e89a0600 	ldmia	sl, {r9, sl}
-    3320:	e2833001 	add	r3, r3, #1	; 0x1
-    3324:	e5c53000 	strb	r3, [r5]
-    3328:	e8820600 	stmia	r2, {r9, sl}
-    332c:	eafffd6f 	b	28f0 <SDK_mainloop+0x548>
-    3330:	40001038 	andmi	r1, r0, r8, lsr r0
-    3334:	4000106c 	andmi	r1, r0, ip, rrx
-    3338:	3f847ae1 	svccc	0x00847ae1
-    333c:	47ae147b 	undefined
-    3340:	40001034 	andmi	r1, r0, r4, lsr r0
-    3344:	40001098 	mulmi	r0, r8, r0
-    3348:	10624dd3 	ldrned	r4, [r2], #-211
-    334c:	400010b0 	strmih	r1, [r0], -r0
-    3350:	40000fe1 	andmi	r0, r0, r1, ror #31
-    3354:	40000d0c 	andmi	r0, r0, ip, lsl #26
-    3358:	40001039 	andmi	r1, r0, r9, lsr r0
-    335c:	400011f0 	strmid	r1, [r0], -r0
-    3360:	400011f1 	strmid	r1, [r0], -r1
-    3364:	40000eec 	andmi	r0, r0, ip, ror #29
-    3368:	40000bf4 	strmid	r0, [r0], -r4
-    336c:	40000dd0 	ldrmid	r0, [r0], -r0
-    3370:	40000bc8 	andmi	r0, r0, r8, asr #23
-    3374:	40000cf0 	strmid	r0, [r0], -r0
-    3378:	40001194 	mulmi	r0, r4, r1
-    337c:	40000b34 	andmi	r0, r0, r4, lsr fp
-    3380:	40000fbc 	strmih	r0, [r0], -ip
-    3384:	400010ac 	andmi	r1, r0, ip, lsr #1
-    3388:	400011b8 	strmih	r1, [r0], -r8
-    338c:	40000fa0 	andmi	r0, r0, r0, lsr #31
-    3390:	40000fc8 	andmi	r0, r0, r8, asr #31
-    3394:	40001080 	andmi	r1, r0, r0, lsl #1
-    3398:	40000870 	andmi	r0, r0, r0, ror r8
-    339c:	51eb851f 	mvnpl	r8, pc, lsl r5
-    33a0:	400013a0 	andmi	r1, r0, r0, lsr #7
-    33a4:	40000858 	andmi	r0, r0, r8, asr r8
-    33a8:	400011e8 	andmi	r1, r0, r8, ror #3
-    33ac:	400011b9 	strmih	r1, [r0], -r9
-    33b0:	40001064 	andmi	r1, r0, r4, rrx
-    33b4:	40000f74 	andmi	r0, r0, r4, ror pc
-    33b8:	40000efc 	strmid	r0, [r0], -ip
-    33bc:	4000103a 	andmi	r1, r0, sl, lsr r0
-    33c0:	40001170 	andmi	r1, r0, r0, ror r1
-    33c4:	40001034 	andmi	r1, r0, r4, lsr r0
-    33c8:	40000ef0 	strmid	r0, [r0], -r0
-    33cc:	40001038 	andmi	r1, r0, r8, lsr r0
-    33d0:	e51f4018 	ldr	r4, [pc, #-24]	; 33c0 <.text+0x33c0>
-    33d4:	e5942000 	ldr	r2, [r4]
-    33d8:	e594c008 	ldr	ip, [r4, #8]
-    33dc:	e5941004 	ldr	r1, [r4, #4]
-    33e0:	e594500c 	ldr	r5, [r4, #12]
-    33e4:	e1a09c22 	mov	r9, r2, lsr #24
-    33e8:	e51f3038 	ldr	r3, [pc, #-56]	; 33b8 <.text+0x33b8>
-    33ec:	e58d901c 	str	r9, [sp, #28]
-    33f0:	e1a0ec2c 	mov	lr, ip, lsr #24
-    33f4:	e1a0042c 	mov	r0, ip, lsr #8
-    33f8:	e1a0982c 	mov	r9, ip, lsr #16
-    33fc:	e58de00c 	str	lr, [sp, #12]
-    3400:	e58d0014 	str	r0, [sp, #20]
-    3404:	e58d9010 	str	r9, [sp, #16]
-    3408:	e1a0ac21 	mov	sl, r1, lsr #24
-    340c:	e1a06422 	mov	r6, r2, lsr #8
-    3410:	e1a07822 	mov	r7, r2, lsr #16
-    3414:	e1a0ec25 	mov	lr, r5, lsr #24
-    3418:	e1a00425 	mov	r0, r5, lsr #8
-    341c:	e1a09825 	mov	r9, r5, lsr #16
-    3420:	e58da018 	str	sl, [sp, #24]
-    3424:	e58d0008 	str	r0, [sp, #8]
-    3428:	e58d9004 	str	r9, [sp, #4]
-    342c:	e5c3e017 	strb	lr, [r3, #23]
-    3430:	e5c36009 	strb	r6, [r3, #9]
-    3434:	e5c3700a 	strb	r7, [r3, #10]
-    3438:	e59de01c 	ldr	lr, [sp, #28]
-    343c:	e1a0a821 	mov	sl, r1, lsr #16
-    3440:	e1a08421 	mov	r8, r1, lsr #8
-    3444:	e5c3e00b 	strb	lr, [r3, #11]
-    3448:	e5c3800d 	strb	r8, [r3, #13]
-    344c:	e5c3a00e 	strb	sl, [r3, #14]
-    3450:	e59d9018 	ldr	r9, [sp, #24]
-    3454:	e5c3900f 	strb	r9, [r3, #15]
-    3458:	e59da014 	ldr	sl, [sp, #20]
-    345c:	e5c3a011 	strb	sl, [r3, #17]
-    3460:	e59de010 	ldr	lr, [sp, #16]
-    3464:	e5c3e012 	strb	lr, [r3, #18]
-    3468:	e59d900c 	ldr	r9, [sp, #12]
-    346c:	e5c39013 	strb	r9, [r3, #19]
-    3470:	e59da008 	ldr	sl, [sp, #8]
-    3474:	e5c3a015 	strb	sl, [r3, #21]
-    3478:	e59de004 	ldr	lr, [sp, #4]
-    347c:	e1a00002 	mov	r0, r2
-    3480:	e5c3100c 	strb	r1, [r3, #12]
-    3484:	e5c3e016 	strb	lr, [r3, #22]
-    3488:	e5c32008 	strb	r2, [r3, #8]
-    348c:	e5c3c010 	strb	ip, [r3, #16]
-    3490:	e5c35014 	strb	r5, [r3, #20]
-    3494:	eb000098 	bl	36fc <SIToLLCmdRoll>
-    3498:	e51f50d8 	ldr	r5, [pc, #-216]	; 33c8 <.text+0x33c8>
-    349c:	e1c500b2 	strh	r0, [r5, #2]
-    34a0:	e5940004 	ldr	r0, [r4, #4]
-    34a4:	eb0000a1 	bl	3730 <SIToLLCmdPitch>
-    34a8:	e1c500b0 	strh	r0, [r5]
-    34ac:	e5940008 	ldr	r0, [r4, #8]
-    34b0:	eb0000aa 	bl	3760 <SIToLLCmdYawRate>
-    34b4:	e1c500b4 	strh	r0, [r5, #4]
-    34b8:	e594000c 	ldr	r0, [r4, #12]
-    34bc:	eb0000b3 	bl	3790 <SIToLLCmdThrust>
-    34c0:	e51fc10c 	ldr	ip, [pc, #-268]	; 33bc <.text+0x33bc>
-    34c4:	e5dc3000 	ldrb	r3, [ip]
-    34c8:	e5dc2001 	ldrb	r2, [ip, #1]
-    34cc:	e3530000 	cmp	r3, #0	; 0x0
-    34d0:	13a01002 	movne	r1, #2	; 0x2
-    34d4:	03a01000 	moveq	r1, #0	; 0x0
-    34d8:	e3520000 	cmp	r2, #0	; 0x0
-    34dc:	e1a0e00c 	mov	lr, ip
-    34e0:	e1c500b6 	strh	r0, [r5, #6]
-    34e4:	0a000002 	beq	34f4 <.text+0x34f4>
-    34e8:	e3510000 	cmp	r1, #0	; 0x0
-    34ec:	13a01003 	movne	r1, #3	; 0x3
-    34f0:	03a01001 	moveq	r1, #1	; 0x1
-    34f4:	e5de3002 	ldrb	r3, [lr, #2]
-    34f8:	e3530000 	cmp	r3, #0	; 0x0
-    34fc:	e5dc3003 	ldrb	r3, [ip, #3]
-    3500:	13811004 	orrne	r1, r1, #4	; 0x4
-    3504:	e51f0148 	ldr	r0, [pc, #-328]	; 33c4 <.text+0x33c4>
-    3508:	e3530000 	cmp	r3, #0	; 0x0
-    350c:	13811008 	orrne	r1, r1, #8	; 0x8
-    3510:	e3a03001 	mov	r3, #1	; 0x1
-    3514:	e1c510b8 	strh	r1, [r5, #8]
-    3518:	e5c03001 	strb	r3, [r0, #1]
-    351c:	eafffd0d 	b	2958 <SDK_mainloop+0x5b0>
-    3520:	e51f915c 	ldr	r9, [pc, #-348]	; 33cc <.text+0x33cc>
-    3524:	e5d93000 	ldrb	r3, [r9]
-    3528:	e3530005 	cmp	r3, #5	; 0x5
-    352c:	03a02004 	moveq	r2, #4	; 0x4
-    3530:	01a03009 	moveq	r3, r9
-    3534:	05c32000 	streqb	r2, [r3]
-    3538:	eafffcec 	b	28f0 <SDK_mainloop+0x548>
-    353c:	e51f3184 	ldr	r3, [pc, #-388]	; 33c0 <.text+0x33c0>
-    3540:	e593000c 	ldr	r0, [r3, #12]
-    3544:	eb000091 	bl	3790 <SIToLLCmdThrust>
-    3548:	e51f118c 	ldr	r1, [pc, #-396]	; 33c4 <.text+0x33c4>
-    354c:	e51f218c 	ldr	r2, [pc, #-396]	; 33c8 <.text+0x33c8>
-    3550:	e3a03001 	mov	r3, #1	; 0x1
-    3554:	e5c13001 	strb	r3, [r1, #1]
-    3558:	e3a03008 	mov	r3, #8	; 0x8
-    355c:	e1c200b6 	strh	r0, [r2, #6]
-    3560:	e1c240b4 	strh	r4, [r2, #4]
-    3564:	e1c230b8 	strh	r3, [r2, #8]
-    3568:	e1c240b0 	strh	r4, [r2]
-    356c:	e1c240b2 	strh	r4, [r2, #2]
-    3570:	eafffcf8 	b	2958 <SDK_mainloop+0x5b0>
-    3574:	e51f51b0 	ldr	r5, [pc, #-432]	; 33cc <.text+0x33cc>
-    3578:	e5d53000 	ldrb	r3, [r5]
-    357c:	e3530003 	cmp	r3, #3	; 0x3
-    3580:	1afffcda 	bne	28f0 <SDK_mainloop+0x548>
-    3584:	e3a02005 	mov	r2, #5	; 0x5
-    3588:	e5c52000 	strb	r2, [r5]
-    358c:	eb00012f 	bl	3a50 <pidReset>
-    3590:	eafffcd6 	b	28f0 <SDK_mainloop+0x548>
-
-00003594 <degreesToRadians>:
-    3594:	e52de004 	str	lr, [sp, #-4]!
-    3598:	eb0040d0 	bl	138e0 <__aeabi_f2d>
-    359c:	e28f2024 	add	r2, pc, #36	; 0x24
-    35a0:	e892000c 	ldmia	r2, {r2, r3}
-    35a4:	eb0040fd 	bl	139a0 <__aeabi_dmul>
-    35a8:	e3a02101 	mov	r2, #1073741824	; 0x40000000
-    35ac:	e2822866 	add	r2, r2, #6684672	; 0x660000
-    35b0:	e2822902 	add	r2, r2, #32768	; 0x8000
-    35b4:	e3a03000 	mov	r3, #0	; 0x0
-    35b8:	eb00419c 	bl	13c30 <__aeabi_ddiv>
-    35bc:	eb004285 	bl	13fd8 <__aeabi_d2f>
-    35c0:	e49de004 	ldr	lr, [sp], #4
-    35c4:	e12fff1e 	bx	lr
-    35c8:	400921fb 	strmid	r2, [r9], -fp
-    35cc:	54442d18 	strplb	r2, [r4], #-3352
-
-000035d0 <radiansToDegrees>:
-    35d0:	e52de004 	str	lr, [sp, #-4]!
-    35d4:	eb0040c1 	bl	138e0 <__aeabi_f2d>
-    35d8:	e3a02101 	mov	r2, #1073741824	; 0x40000000
-    35dc:	e2822866 	add	r2, r2, #6684672	; 0x660000
-    35e0:	e2822902 	add	r2, r2, #32768	; 0x8000
-    35e4:	e3a03000 	mov	r3, #0	; 0x0
-    35e8:	eb0040ec 	bl	139a0 <__aeabi_dmul>
-    35ec:	e28f2010 	add	r2, pc, #16	; 0x10
-    35f0:	e892000c 	ldmia	r2, {r2, r3}
-    35f4:	eb00418d 	bl	13c30 <__aeabi_ddiv>
-    35f8:	eb004276 	bl	13fd8 <__aeabi_d2f>
-    35fc:	e49de004 	ldr	lr, [sp], #4
-    3600:	e12fff1e 	bx	lr
-    3604:	400921fb 	strmid	r2, [r9], -fp
-    3608:	54442d18 	strplb	r2, [r4], #-3352
-
-0000360c <LLToSIClimb>:
-    360c:	e1a00800 	mov	r0, r0, lsl #16
-    3610:	e52de004 	str	lr, [sp, #-4]!
-    3614:	e1a00840 	mov	r0, r0, asr #16
-    3618:	eb00430a 	bl	14248 <__aeabi_i2f>
-    361c:	e3a01311 	mov	r1, #1140850688	; 0x44000000
-    3620:	e281187a 	add	r1, r1, #7995392	; 0x7a0000
-    3624:	eb0043a4 	bl	144bc <__aeabi_fdiv>
-    3628:	e49de004 	ldr	lr, [sp], #4
-    362c:	e12fff1e 	bx	lr
-
-00003630 <LLToSIAccX>:
-    3630:	e1a00800 	mov	r0, r0, lsl #16
-    3634:	e92d4010 	stmdb	sp!, {r4, lr}
-    3638:	e1a00840 	mov	r0, r0, asr #16
-    363c:	e1a04001 	mov	r4, r1
-    3640:	eb004300 	bl	14248 <__aeabi_i2f>
-    3644:	e1a01004 	mov	r1, r4
-    3648:	e2800102 	add	r0, r0, #-2147483648	; 0x80000000
-    364c:	eb00439a 	bl	144bc <__aeabi_fdiv>
-    3650:	eb0040a2 	bl	138e0 <__aeabi_f2d>
-    3654:	e28f2010 	add	r2, pc, #16	; 0x10
-    3658:	e892000c 	ldmia	r2, {r2, r3}
-    365c:	eb0040cf 	bl	139a0 <__aeabi_dmul>
-    3660:	eb00425c 	bl	13fd8 <__aeabi_d2f>
-    3664:	e8bd4010 	ldmia	sp!, {r4, lr}
-    3668:	e12fff1e 	bx	lr
-    366c:	40239f0f 	eormi	r9, r3, pc, lsl #30
-    3670:	7b9e0610 	blvc	fe784eb8 <VPBDIV+0x1e588db8>
-
-00003674 <LLToSIAccY>:
-    3674:	e1a00800 	mov	r0, r0, lsl #16
-    3678:	e92d4010 	stmdb	sp!, {r4, lr}
-    367c:	e1a00840 	mov	r0, r0, asr #16
-    3680:	e1a04001 	mov	r4, r1
-    3684:	eb0042ef 	bl	14248 <__aeabi_i2f>
-    3688:	e1a01004 	mov	r1, r4
-    368c:	e2800102 	add	r0, r0, #-2147483648	; 0x80000000
-    3690:	eb004389 	bl	144bc <__aeabi_fdiv>
-    3694:	eb004091 	bl	138e0 <__aeabi_f2d>
-    3698:	e28f2010 	add	r2, pc, #16	; 0x10
-    369c:	e892000c 	ldmia	r2, {r2, r3}
-    36a0:	eb0040be 	bl	139a0 <__aeabi_dmul>
-    36a4:	eb00424b 	bl	13fd8 <__aeabi_d2f>
-    36a8:	e8bd4010 	ldmia	sp!, {r4, lr}
-    36ac:	e12fff1e 	bx	lr
-    36b0:	40239f0f 	eormi	r9, r3, pc, lsl #30
-    36b4:	7b9e0610 	blvc	fe784efc <VPBDIV+0x1e588dfc>
-
-000036b8 <LLToSIAccZ>:
-    36b8:	e1a00800 	mov	r0, r0, lsl #16
-    36bc:	e92d4010 	stmdb	sp!, {r4, lr}
-    36c0:	e1a00840 	mov	r0, r0, asr #16
-    36c4:	e1a04001 	mov	r4, r1
-    36c8:	eb0042de 	bl	14248 <__aeabi_i2f>
-    36cc:	e1a01004 	mov	r1, r4
-    36d0:	e2800102 	add	r0, r0, #-2147483648	; 0x80000000
-    36d4:	eb004378 	bl	144bc <__aeabi_fdiv>
-    36d8:	eb004080 	bl	138e0 <__aeabi_f2d>
-    36dc:	e28f2010 	add	r2, pc, #16	; 0x10
-    36e0:	e892000c 	ldmia	r2, {r2, r3}
-    36e4:	eb0040ad 	bl	139a0 <__aeabi_dmul>
-    36e8:	eb00423a 	bl	13fd8 <__aeabi_d2f>
-    36ec:	e8bd4010 	ldmia	sp!, {r4, lr}
-    36f0:	e12fff1e 	bx	lr
-    36f4:	40239f0f 	eormi	r9, r3, pc, lsl #30
-    36f8:	7b9e0610 	blvc	fe784f40 <VPBDIV+0x1e588e40>
-
-000036fc <SIToLLCmdRoll>:
-    36fc:	e52de004 	str	lr, [sp, #-4]!
-    3700:	eb004076 	bl	138e0 <__aeabi_f2d>
-    3704:	e28f201c 	add	r2, pc, #28	; 0x1c
-    3708:	e892000c 	ldmia	r2, {r2, r3}
-    370c:	eb0040a3 	bl	139a0 <__aeabi_dmul>
-    3710:	eb004219 	bl	13f7c <__aeabi_d2iz>
-    3714:	e2600000 	rsb	r0, r0, #0	; 0x0
-    3718:	e1a00800 	mov	r0, r0, lsl #16
-    371c:	e1a00840 	mov	r0, r0, asr #16
-    3720:	e49de004 	ldr	lr, [sp], #4
-    3724:	e12fff1e 	bx	lr
-    3728:	40a1eb27 	adcmi	lr, r1, r7, lsr #22
-    372c:	ef9db22d 	svc	0x009db22d
-
-00003730 <SIToLLCmdPitch>:
-    3730:	e52de004 	str	lr, [sp, #-4]!
-    3734:	eb004069 	bl	138e0 <__aeabi_f2d>
-    3738:	e28f2018 	add	r2, pc, #24	; 0x18
-    373c:	e892000c 	ldmia	r2, {r2, r3}
-    3740:	eb004096 	bl	139a0 <__aeabi_dmul>
-    3744:	eb00420c 	bl	13f7c <__aeabi_d2iz>
-    3748:	e1a00800 	mov	r0, r0, lsl #16
-    374c:	e1a00840 	mov	r0, r0, asr #16
-    3750:	e49de004 	ldr	lr, [sp], #4
-    3754:	e12fff1e 	bx	lr
-    3758:	40a1eb27 	adcmi	lr, r1, r7, lsr #22
-    375c:	ef9db22d 	svc	0x009db22d
-
-00003760 <SIToLLCmdYawRate>:
-    3760:	e52de004 	str	lr, [sp, #-4]!
-    3764:	eb00405d 	bl	138e0 <__aeabi_f2d>
-    3768:	e28f2018 	add	r2, pc, #24	; 0x18
-    376c:	e892000c 	ldmia	r2, {r2, r3}
-    3770:	eb00408a 	bl	139a0 <__aeabi_dmul>
-    3774:	eb004200 	bl	13f7c <__aeabi_d2iz>
-    3778:	e1a00800 	mov	r0, r0, lsl #16
-    377c:	e1a00840 	mov	r0, r0, asr #16
-    3780:	e49de004 	ldr	lr, [sp], #4
-    3784:	e12fff1e 	bx	lr
-    3788:	407cc5f5 	ldrmisht	ip, [ip], #-85
-    378c:	25460aa6 	strcsb	r0, [r6, #-2726]
-
-00003790 <SIToLLCmdThrust>:
-    3790:	e52de004 	str	lr, [sp, #-4]!
-    3794:	eb004051 	bl	138e0 <__aeabi_f2d>
-    3798:	e28f2018 	add	r2, pc, #24	; 0x18
-    379c:	e892000c 	ldmia	r2, {r2, r3}
-    37a0:	eb00407e 	bl	139a0 <__aeabi_dmul>
-    37a4:	eb0041f4 	bl	13f7c <__aeabi_d2iz>
-    37a8:	e1a00800 	mov	r0, r0, lsl #16
-    37ac:	e1a00840 	mov	r0, r0, asr #16
-    37b0:	e49de004 	ldr	lr, [sp], #4
-    37b4:	e12fff1e 	bx	lr
-    37b8:	40447999 	umaalmi	r7, r4, r9, r9
-    37bc:	9999999a 	ldmlsib	r9, {r1, r3, r4, r7, r8, fp, ip, pc}
-
-000037c0 <LLToSIAngleRoll>:
-    37c0:	e1a00800 	mov	r0, r0, lsl #16
-    37c4:	e1a00840 	mov	r0, r0, asr #16
-    37c8:	e52de004 	str	lr, [sp, #-4]!
-    37cc:	e2600000 	rsb	r0, r0, #0	; 0x0
-    37d0:	eb00429c 	bl	14248 <__aeabi_i2f>
-    37d4:	e3a01442 	mov	r1, #1107296256	; 0x42000000
-    37d8:	e2811732 	add	r1, r1, #13107200	; 0xc80000
-    37dc:	eb004336 	bl	144bc <__aeabi_fdiv>
-    37e0:	eb00403e 	bl	138e0 <__aeabi_f2d>
-    37e4:	e28f2024 	add	r2, pc, #36	; 0x24
-    37e8:	e892000c 	ldmia	r2, {r2, r3}
-    37ec:	eb00406b 	bl	139a0 <__aeabi_dmul>
-    37f0:	e3a02101 	mov	r2, #1073741824	; 0x40000000
-    37f4:	e2822866 	add	r2, r2, #6684672	; 0x660000
-    37f8:	e2822902 	add	r2, r2, #32768	; 0x8000
-    37fc:	e3a03000 	mov	r3, #0	; 0x0
-    3800:	eb00410a 	bl	13c30 <__aeabi_ddiv>
-    3804:	eb0041f3 	bl	13fd8 <__aeabi_d2f>
-    3808:	e49de004 	ldr	lr, [sp], #4
-    380c:	e12fff1e 	bx	lr
-    3810:	400921fb 	strmid	r2, [r9], -fp
-    3814:	54442d18 	strplb	r2, [r4], #-3352
-
-00003818 <LLToSIAngleRatePitch>:
-    3818:	e1a00800 	mov	r0, r0, lsl #16
-    381c:	e52de004 	str	lr, [sp, #-4]!
-    3820:	e1a00840 	mov	r0, r0, asr #16
-    3824:	eb004287 	bl	14248 <__aeabi_i2f>
-    3828:	eb00402c 	bl	138e0 <__aeabi_f2d>
-    382c:	e28f2038 	add	r2, pc, #56	; 0x38
-    3830:	e892000c 	ldmia	r2, {r2, r3}
-    3834:	eb004059 	bl	139a0 <__aeabi_dmul>
-    3838:	eb0041e6 	bl	13fd8 <__aeabi_d2f>
-    383c:	eb004027 	bl	138e0 <__aeabi_f2d>
-    3840:	e28f202c 	add	r2, pc, #44	; 0x2c
-    3844:	e892000c 	ldmia	r2, {r2, r3}
-    3848:	eb004054 	bl	139a0 <__aeabi_dmul>
-    384c:	e3a02101 	mov	r2, #1073741824	; 0x40000000
-    3850:	e2822866 	add	r2, r2, #6684672	; 0x660000
-    3854:	e2822902 	add	r2, r2, #32768	; 0x8000
-    3858:	e3a03000 	mov	r3, #0	; 0x0
-    385c:	eb0040f3 	bl	13c30 <__aeabi_ddiv>
-    3860:	eb0041dc 	bl	13fd8 <__aeabi_d2f>
-    3864:	e49de004 	ldr	lr, [sp], #4
-    3868:	e12fff1e 	bx	lr
-    386c:	3f8eb851 	svccc	0x008eb851
-    3870:	eb851eb8 	bl	fe14b358 <VPBDIV+0x1df4f258>
-    3874:	400921fb 	strmid	r2, [r9], -fp
-    3878:	54442d18 	strplb	r2, [r4], #-3352
-
-0000387c <LLToSIAngleRateRoll>:
-    387c:	e1a00800 	mov	r0, r0, lsl #16
-    3880:	e1a00840 	mov	r0, r0, asr #16
-    3884:	e52de004 	str	lr, [sp, #-4]!
-    3888:	e2600000 	rsb	r0, r0, #0	; 0x0
-    388c:	eb00426d 	bl	14248 <__aeabi_i2f>
-    3890:	eb004012 	bl	138e0 <__aeabi_f2d>
-    3894:	e28f2038 	add	r2, pc, #56	; 0x38
-    3898:	e892000c 	ldmia	r2, {r2, r3}
-    389c:	eb00403f 	bl	139a0 <__aeabi_dmul>
-    38a0:	eb0041cc 	bl	13fd8 <__aeabi_d2f>
-    38a4:	eb00400d 	bl	138e0 <__aeabi_f2d>
-    38a8:	e28f202c 	add	r2, pc, #44	; 0x2c
-    38ac:	e892000c 	ldmia	r2, {r2, r3}
-    38b0:	eb00403a 	bl	139a0 <__aeabi_dmul>
-    38b4:	e3a02101 	mov	r2, #1073741824	; 0x40000000
-    38b8:	e2822866 	add	r2, r2, #6684672	; 0x660000
-    38bc:	e2822902 	add	r2, r2, #32768	; 0x8000
-    38c0:	e3a03000 	mov	r3, #0	; 0x0
-    38c4:	eb0040d9 	bl	13c30 <__aeabi_ddiv>
-    38c8:	eb0041c2 	bl	13fd8 <__aeabi_d2f>
-    38cc:	e49de004 	ldr	lr, [sp], #4
-    38d0:	e12fff1e 	bx	lr
-    38d4:	3f8eb851 	svccc	0x008eb851
-    38d8:	eb851eb8 	bl	fe14b3c0 <VPBDIV+0x1df4f2c0>
-    38dc:	400921fb 	strmid	r2, [r9], -fp
-    38e0:	54442d18 	strplb	r2, [r4], #-3352
-
-000038e4 <LLToSIAngleRateYaw>:
-    38e4:	e1a00800 	mov	r0, r0, lsl #16
-    38e8:	e1a00840 	mov	r0, r0, asr #16
-    38ec:	e52de004 	str	lr, [sp, #-4]!
-    38f0:	e2600000 	rsb	r0, r0, #0	; 0x0
-    38f4:	eb004253 	bl	14248 <__aeabi_i2f>
-    38f8:	eb003ff8 	bl	138e0 <__aeabi_f2d>
-    38fc:	e28f2038 	add	r2, pc, #56	; 0x38
-    3900:	e892000c 	ldmia	r2, {r2, r3}
-    3904:	eb004025 	bl	139a0 <__aeabi_dmul>
-    3908:	eb0041b2 	bl	13fd8 <__aeabi_d2f>
-    390c:	eb003ff3 	bl	138e0 <__aeabi_f2d>
-    3910:	e28f202c 	add	r2, pc, #44	; 0x2c
-    3914:	e892000c 	ldmia	r2, {r2, r3}
-    3918:	eb004020 	bl	139a0 <__aeabi_dmul>
-    391c:	e3a02101 	mov	r2, #1073741824	; 0x40000000
-    3920:	e2822866 	add	r2, r2, #6684672	; 0x660000
-    3924:	e2822902 	add	r2, r2, #32768	; 0x8000
-    3928:	e3a03000 	mov	r3, #0	; 0x0
-    392c:	eb0040bf 	bl	13c30 <__aeabi_ddiv>
-    3930:	eb0041a8 	bl	13fd8 <__aeabi_d2f>
-    3934:	e49de004 	ldr	lr, [sp], #4
-    3938:	e12fff1e 	bx	lr
-    393c:	3f8eb851 	svccc	0x008eb851
-    3940:	eb851eb8 	bl	fe14b428 <VPBDIV+0x1df4f328>
-    3944:	400921fb 	strmid	r2, [r9], -fp
-    3948:	54442d18 	strplb	r2, [r4], #-3352
-
-0000394c <LLToSIAngleYaw>:
-    394c:	e1a03800 	mov	r3, r0, lsl #16
-    3950:	e3a00b23 	mov	r0, #35840	; 0x8c00
-    3954:	e28000a0 	add	r0, r0, #160	; 0xa0
-    3958:	e52de004 	str	lr, [sp, #-4]!
-    395c:	e0400823 	sub	r0, r0, r3, lsr #16
-    3960:	eb004238 	bl	14248 <__aeabi_i2f>
-    3964:	e3a01442 	mov	r1, #1107296256	; 0x42000000
-    3968:	e2811732 	add	r1, r1, #13107200	; 0xc80000
-    396c:	eb0042d2 	bl	144bc <__aeabi_fdiv>
-    3970:	eb003fda 	bl	138e0 <__aeabi_f2d>
-    3974:	e28f2024 	add	r2, pc, #36	; 0x24
-    3978:	e892000c 	ldmia	r2, {r2, r3}
-    397c:	eb004007 	bl	139a0 <__aeabi_dmul>
-    3980:	e3a02101 	mov	r2, #1073741824	; 0x40000000
-    3984:	e2822866 	add	r2, r2, #6684672	; 0x660000
-    3988:	e2822902 	add	r2, r2, #32768	; 0x8000
-    398c:	e3a03000 	mov	r3, #0	; 0x0
-    3990:	eb0040a6 	bl	13c30 <__aeabi_ddiv>
-    3994:	eb00418f 	bl	13fd8 <__aeabi_d2f>
-    3998:	e49de004 	ldr	lr, [sp], #4
-    399c:	e12fff1e 	bx	lr
-    39a0:	400921fb 	strmid	r2, [r9], -fp
-    39a4:	54442d18 	strplb	r2, [r4], #-3352
-
-000039a8 <LLToSIAnglePitch>:
-    39a8:	e1a00800 	mov	r0, r0, lsl #16
-    39ac:	e52de004 	str	lr, [sp, #-4]!
-    39b0:	e1a00840 	mov	r0, r0, asr #16
-    39b4:	eb004223 	bl	14248 <__aeabi_i2f>
-    39b8:	e3a01442 	mov	r1, #1107296256	; 0x42000000
-    39bc:	e2811732 	add	r1, r1, #13107200	; 0xc80000
-    39c0:	eb0042bd 	bl	144bc <__aeabi_fdiv>
-    39c4:	eb003fc5 	bl	138e0 <__aeabi_f2d>
-    39c8:	e28f2024 	add	r2, pc, #36	; 0x24
-    39cc:	e892000c 	ldmia	r2, {r2, r3}
-    39d0:	eb003ff2 	bl	139a0 <__aeabi_dmul>
-    39d4:	e3a02101 	mov	r2, #1073741824	; 0x40000000
-    39d8:	e2822866 	add	r2, r2, #6684672	; 0x660000
-    39dc:	e2822902 	add	r2, r2, #32768	; 0x8000
-    39e0:	e3a03000 	mov	r3, #0	; 0x0
-    39e4:	eb004091 	bl	13c30 <__aeabi_ddiv>
-    39e8:	eb00417a 	bl	13fd8 <__aeabi_d2f>
-    39ec:	e49de004 	ldr	lr, [sp], #4
-    39f0:	e12fff1e 	bx	lr
-    39f4:	400921fb 	strmid	r2, [r9], -fp
-    39f8:	54442d18 	strplb	r2, [r4], #-3352
-
-000039fc <wait>:
-    39fc:	e92d0030 	stmdb	sp!, {r4, r5}
-    3a00:	e59fc044 	ldr	ip, [pc, #68]	; 3a4c <.text+0x3a4c>
-    3a04:	e89c000c 	ldmia	ip, {r2, r3}
-    3a08:	e24dd008 	sub	sp, sp, #8	; 0x8
-    3a0c:	e88d000c 	stmia	sp, {r2, r3}
-    3a10:	e1a04000 	mov	r4, r0
-    3a14:	e1a05fc4 	mov	r5, r4, asr #31
-    3a18:	e89d000c 	ldmia	sp, {r2, r3}
-    3a1c:	e89c0003 	ldmia	ip, {r0, r1}
-    3a20:	e0922004 	adds	r2, r2, r4
-    3a24:	e0a33005 	adc	r3, r3, r5
-    3a28:	e1530001 	cmp	r3, r1
-    3a2c:	cafffff9 	bgt	3a18 <wait+0x1c>
-    3a30:	0a000002 	beq	3a40 <wait+0x44>
-    3a34:	e28dd008 	add	sp, sp, #8	; 0x8
-    3a38:	e8bd0030 	ldmia	sp!, {r4, r5}
-    3a3c:	e12fff1e 	bx	lr
-    3a40:	e1520000 	cmp	r2, r0
-    3a44:	8afffff3 	bhi	3a18 <wait+0x1c>
-    3a48:	eafffff9 	b	3a34 <wait+0x38>
-    3a4c:	40000858 	andmi	r0, r0, r8, asr r8
-
-00003a50 <pidReset>:
-    3a50:	e59f30d4 	ldr	r3, [pc, #212]	; 3b2c <.text+0x3b2c>
-    3a54:	e5932000 	ldr	r2, [r3]
-    3a58:	e5d23008 	ldrb	r3, [r2, #8]
-    3a5c:	e3530000 	cmp	r3, #0	; 0x0
-    3a60:	e3a00000 	mov	r0, #0	; 0x0
-    3a64:	e59f10c4 	ldr	r1, [pc, #196]	; 3b30 <.text+0x3b30>
-    3a68:	e59f20c4 	ldr	r2, [pc, #196]	; 3b34 <.text+0x3b34>
-    3a6c:	1a00001f 	bne	3af0 <pidReset+0xa0>
-    3a70:	e5c2300f 	strb	r3, [r2, #15]
-    3a74:	e5c13000 	strb	r3, [r1]
-    3a78:	e5c13001 	strb	r3, [r1, #1]
-    3a7c:	e5c13002 	strb	r3, [r1, #2]
-    3a80:	e5c13003 	strb	r3, [r1, #3]
-    3a84:	e5c13004 	strb	r3, [r1, #4]
-    3a88:	e5c13005 	strb	r3, [r1, #5]
-    3a8c:	e5c13006 	strb	r3, [r1, #6]
-    3a90:	e5c13007 	strb	r3, [r1, #7]
-    3a94:	e5c13008 	strb	r3, [r1, #8]
-    3a98:	e5c13009 	strb	r3, [r1, #9]
-    3a9c:	e5c1300a 	strb	r3, [r1, #10]
-    3aa0:	e5c1300b 	strb	r3, [r1, #11]
-    3aa4:	e5c23000 	strb	r3, [r2]
-    3aa8:	e5c23001 	strb	r3, [r2, #1]
-    3aac:	e5c23002 	strb	r3, [r2, #2]
-    3ab0:	e5c23003 	strb	r3, [r2, #3]
-    3ab4:	e5c23004 	strb	r3, [r2, #4]
-    3ab8:	e5c23005 	strb	r3, [r2, #5]
-    3abc:	e5c23006 	strb	r3, [r2, #6]
-    3ac0:	e5c23007 	strb	r3, [r2, #7]
-    3ac4:	e5c23008 	strb	r3, [r2, #8]
-    3ac8:	e5c23009 	strb	r3, [r2, #9]
-    3acc:	e5c2300a 	strb	r3, [r2, #10]
-    3ad0:	e5c2300b 	strb	r3, [r2, #11]
-    3ad4:	e5c2300c 	strb	r3, [r2, #12]
-    3ad8:	e5c2300d 	strb	r3, [r2, #13]
-    3adc:	e5c2300e 	strb	r3, [r2, #14]
-    3ae0:	e5c1300c 	strb	r3, [r1, #12]
-    3ae4:	e5c1300d 	strb	r3, [r1, #13]
-    3ae8:	e5c1300e 	strb	r3, [r1, #14]
-    3aec:	e5c1300f 	strb	r3, [r1, #15]
-    3af0:	e59f3040 	ldr	r3, [pc, #64]	; 3b38 <.text+0x3b38>
-    3af4:	e59f2040 	ldr	r2, [pc, #64]	; 3b3c <.text+0x3b3c>
-    3af8:	e5830018 	str	r0, [r3, #24]
-    3afc:	e59f303c 	ldr	r3, [pc, #60]	; 3b40 <.text+0x3b40>
-    3b00:	e5820018 	str	r0, [r2, #24]
-    3b04:	e5830018 	str	r0, [r3, #24]
-    3b08:	e59f2034 	ldr	r2, [pc, #52]	; 3b44 <.text+0x3b44>
-    3b0c:	e59f3034 	ldr	r3, [pc, #52]	; 3b48 <.text+0x3b48>
-    3b10:	e5820018 	str	r0, [r2, #24]
-    3b14:	e5830018 	str	r0, [r3, #24]
-    3b18:	e59f202c 	ldr	r2, [pc, #44]	; 3b4c <.text+0x3b4c>
-    3b1c:	e59f302c 	ldr	r3, [pc, #44]	; 3b50 <.text+0x3b50>
-    3b20:	e5820018 	str	r0, [r2, #24]
-    3b24:	e5830018 	str	r0, [r3, #24]
-    3b28:	e12fff1e 	bx	lr
-    3b2c:	40000fc4 	andmi	r0, r0, r4, asr #31
-    3b30:	40001070 	andmi	r1, r0, r0, ror r0
-    3b34:	40001022 	andmi	r1, r0, r2, lsr #32
-    3b38:	40001218 	andmi	r1, r0, r8, lsl r2
-    3b3c:	4000123c 	andmi	r1, r0, ip, lsr r2
-    3b40:	400012a8 	andmi	r1, r0, r8, lsr #5
-    3b44:	40001260 	andmi	r1, r0, r0, ror #4
-    3b48:	40001284 	andmi	r1, r0, r4, lsl #5
-    3b4c:	400011f4 	strmid	r1, [r0], -r4
-    3b50:	400012cc 	andmi	r1, r0, ip, asr #5
-
-00003b54 <pidParamUpdate>:
-    3b54:	e92d4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
-    3b58:	e59f396c 	ldr	r3, [pc, #2412]	; 44cc <.text+0x44cc>
-    3b5c:	e5d30001 	ldrb	r0, [r3, #1]
-    3b60:	e24dde1b 	sub	sp, sp, #432	; 0x1b0
-    3b64:	e5d38000 	ldrb	r8, [r3]
-    3b68:	e58d01ac 	str	r0, [sp, #428]
-    3b6c:	e5d31005 	ldrb	r1, [r3, #5]
-    3b70:	e5d35004 	ldrb	r5, [r3, #4]
-    3b74:	e58d11a4 	str	r1, [sp, #420]
-    3b78:	e5d32009 	ldrb	r2, [r3, #9]
-    3b7c:	e5d34008 	ldrb	r4, [r3, #8]
-    3b80:	e58d2194 	str	r2, [sp, #404]
-    3b84:	e5d3101d 	ldrb	r1, [r3, #29]
-    3b88:	e5d3a011 	ldrb	sl, [r3, #17]
-    3b8c:	e5d3b00d 	ldrb	fp, [r3, #13]
-    3b90:	e5d36015 	ldrb	r6, [r3, #21]
-    3b94:	e5d3e010 	ldrb	lr, [r3, #16]
-    3b98:	e5d3c00c 	ldrb	ip, [r3, #12]
-    3b9c:	e5d30014 	ldrb	r0, [r3, #20]
-    3ba0:	e5d3201c 	ldrb	r2, [r3, #28]
-    3ba4:	e58d1180 	str	r1, [sp, #384]
-    3ba8:	e5d31002 	ldrb	r1, [r3, #2]
-    3bac:	e58d11a8 	str	r1, [sp, #424]
-    3bb0:	e5d31006 	ldrb	r1, [r3, #6]
-    3bb4:	e58d11a0 	str	r1, [sp, #416]
-    3bb8:	e5d3100a 	ldrb	r1, [r3, #10]
-    3bbc:	e58d1190 	str	r1, [sp, #400]
-    3bc0:	e5d31012 	ldrb	r1, [r3, #18]
-    3bc4:	e58d118c 	str	r1, [sp, #396]
-    3bc8:	e5d3100e 	ldrb	r1, [r3, #14]
-    3bcc:	e58d1188 	str	r1, [sp, #392]
-    3bd0:	e5d31016 	ldrb	r1, [r3, #22]
-    3bd4:	e58d1184 	str	r1, [sp, #388]
-    3bd8:	e5d3101e 	ldrb	r1, [r3, #30]
-    3bdc:	e58d117c 	str	r1, [sp, #380]
-    3be0:	e59d11ac 	ldr	r1, [sp, #428]
-    3be4:	e1888401 	orr	r8, r8, r1, lsl #8
-    3be8:	e59d11a4 	ldr	r1, [sp, #420]
-    3bec:	e1855401 	orr	r5, r5, r1, lsl #8
-    3bf0:	e59d1194 	ldr	r1, [sp, #404]
-    3bf4:	e1800406 	orr	r0, r0, r6, lsl #8
-    3bf8:	e1844401 	orr	r4, r4, r1, lsl #8
-    3bfc:	e59d6180 	ldr	r6, [sp, #384]
-    3c00:	e5d31007 	ldrb	r1, [r3, #7]
-    3c04:	e18ee40a 	orr	lr, lr, sl, lsl #8
-    3c08:	e1822406 	orr	r2, r2, r6, lsl #8
-    3c0c:	e5d3a003 	ldrb	sl, [r3, #3]
-    3c10:	e58d119c 	str	r1, [sp, #412]
-    3c14:	e5d3601f 	ldrb	r6, [r3, #31]
-    3c18:	e5d3700f 	ldrb	r7, [r3, #15]
-    3c1c:	e5d31017 	ldrb	r1, [r3, #23]
-    3c20:	e5d39013 	ldrb	r9, [r3, #19]
-    3c24:	e18cc40b 	orr	ip, ip, fp, lsl #8
-    3c28:	e5d3b00b 	ldrb	fp, [r3, #11]
-    3c2c:	e58d6178 	str	r6, [sp, #376]
-    3c30:	e59d61a8 	ldr	r6, [sp, #424]
-    3c34:	e1888806 	orr	r8, r8, r6, lsl #16
-    3c38:	e59d61a0 	ldr	r6, [sp, #416]
-    3c3c:	e1855806 	orr	r5, r5, r6, lsl #16
-    3c40:	e59d6190 	ldr	r6, [sp, #400]
-    3c44:	e1844806 	orr	r4, r4, r6, lsl #16
-    3c48:	e59d618c 	ldr	r6, [sp, #396]
-    3c4c:	e18ee806 	orr	lr, lr, r6, lsl #16
-    3c50:	e59d6188 	ldr	r6, [sp, #392]
-    3c54:	e18cc806 	orr	ip, ip, r6, lsl #16
-    3c58:	e59d6184 	ldr	r6, [sp, #388]
-    3c5c:	e1800806 	orr	r0, r0, r6, lsl #16
-    3c60:	e59d617c 	ldr	r6, [sp, #380]
-    3c64:	e1822806 	orr	r2, r2, r6, lsl #16
-    3c68:	e1886c0a 	orr	r6, r8, sl, lsl #24
-    3c6c:	e59d819c 	ldr	r8, [sp, #412]
-    3c70:	e1855c08 	orr	r5, r5, r8, lsl #24
-    3c74:	e58d5198 	str	r5, [sp, #408]
-    3c78:	e18e5c09 	orr	r5, lr, r9, lsl #24
-    3c7c:	e180ec01 	orr	lr, r0, r1, lsl #24
-    3c80:	e59d0178 	ldr	r0, [sp, #376]
-    3c84:	e59f1844 	ldr	r1, [pc, #2116]	; 44d0 <.text+0x44d0>
-    3c88:	e1848c0b 	orr	r8, r4, fp, lsl #24
-    3c8c:	e18c4c07 	orr	r4, ip, r7, lsl #24
-    3c90:	e182cc00 	orr	ip, r2, r0, lsl #24
-    3c94:	e59d2198 	ldr	r2, [sp, #408]
-    3c98:	e581e014 	str	lr, [r1, #20]
-    3c9c:	e5812004 	str	r2, [r1, #4]
-    3ca0:	e581c020 	str	ip, [r1, #32]
-    3ca4:	e5816000 	str	r6, [r1]
-    3ca8:	e5818008 	str	r8, [r1, #8]
-    3cac:	e5815010 	str	r5, [r1, #16]
-    3cb0:	e581400c 	str	r4, [r1, #12]
-    3cb4:	e5d34019 	ldrb	r4, [r3, #25]
-    3cb8:	e5d3a018 	ldrb	sl, [r3, #24]
-    3cbc:	e58d4174 	str	r4, [sp, #372]
-    3cc0:	e5d38041 	ldrb	r8, [r3, #65]
-    3cc4:	e5d36040 	ldrb	r6, [r3, #64]
-    3cc8:	e58d8168 	str	r8, [sp, #360]
-    3ccc:	e5d30045 	ldrb	r0, [r3, #69]
-    3cd0:	e5d35044 	ldrb	r5, [r3, #68]
-    3cd4:	e58d0160 	str	r0, [sp, #352]
-    3cd8:	e5d31049 	ldrb	r1, [r3, #73]
-    3cdc:	e5d34048 	ldrb	r4, [r3, #72]
-    3ce0:	e58d1158 	str	r1, [sp, #344]
-    3ce4:	e5d3101a 	ldrb	r1, [r3, #26]
-    3ce8:	e5d3804d 	ldrb	r8, [r3, #77]
-    3cec:	e5d3b055 	ldrb	fp, [r3, #85]
-    3cf0:	e5d32051 	ldrb	r2, [r3, #81]
-    3cf4:	e5d3e04c 	ldrb	lr, [r3, #76]
-    3cf8:	e5d3c054 	ldrb	ip, [r3, #84]
-    3cfc:	e5d30050 	ldrb	r0, [r3, #80]
-    3d00:	e58d1170 	str	r1, [sp, #368]
-    3d04:	e5d31042 	ldrb	r1, [r3, #66]
-    3d08:	e58d1164 	str	r1, [sp, #356]
-    3d0c:	e5d31046 	ldrb	r1, [r3, #70]
-    3d10:	e58d115c 	str	r1, [sp, #348]
-    3d14:	e5d3104a 	ldrb	r1, [r3, #74]
-    3d18:	e58d1154 	str	r1, [sp, #340]
-    3d1c:	e5d3104e 	ldrb	r1, [r3, #78]
-    3d20:	e58d114c 	str	r1, [sp, #332]
-    3d24:	e5d31056 	ldrb	r1, [r3, #86]
-    3d28:	e58d1144 	str	r1, [sp, #324]
-    3d2c:	e5d31052 	ldrb	r1, [r3, #82]
-    3d30:	e58d113c 	str	r1, [sp, #316]
-    3d34:	e59d1174 	ldr	r1, [sp, #372]
-    3d38:	e18aa401 	orr	sl, sl, r1, lsl #8
-    3d3c:	e59d1168 	ldr	r1, [sp, #360]
-    3d40:	e1800402 	orr	r0, r0, r2, lsl #8
-    3d44:	e1866401 	orr	r6, r6, r1, lsl #8
-    3d48:	e5d3204b 	ldrb	r2, [r3, #75]
-    3d4c:	e59d1160 	ldr	r1, [sp, #352]
-    3d50:	e5d3701b 	ldrb	r7, [r3, #27]
-    3d54:	e1855401 	orr	r5, r5, r1, lsl #8
-    3d58:	e18ee408 	orr	lr, lr, r8, lsl #8
-    3d5c:	e59d1158 	ldr	r1, [sp, #344]
-    3d60:	e5d38043 	ldrb	r8, [r3, #67]
-    3d64:	e18cc40b 	orr	ip, ip, fp, lsl #8
-    3d68:	e5d3b047 	ldrb	fp, [r3, #71]
-    3d6c:	e58d2150 	str	r2, [sp, #336]
-    3d70:	e1844401 	orr	r4, r4, r1, lsl #8
-    3d74:	e5d3104f 	ldrb	r1, [r3, #79]
-    3d78:	e58d1148 	str	r1, [sp, #328]
-    3d7c:	e5d32057 	ldrb	r2, [r3, #87]
-    3d80:	e58d2140 	str	r2, [sp, #320]
-    3d84:	e5d31053 	ldrb	r1, [r3, #83]
-    3d88:	e58d1138 	str	r1, [sp, #312]
-    3d8c:	e59d1164 	ldr	r1, [sp, #356]
-    3d90:	e1866801 	orr	r6, r6, r1, lsl #16
-    3d94:	e59d1154 	ldr	r1, [sp, #340]
-    3d98:	e59d2170 	ldr	r2, [sp, #368]
-    3d9c:	e1844801 	orr	r4, r4, r1, lsl #16
-    3da0:	e59d1144 	ldr	r1, [sp, #324]
-    3da4:	e18aa802 	orr	sl, sl, r2, lsl #16
-    3da8:	e59d215c 	ldr	r2, [sp, #348]
-    3dac:	e18cc801 	orr	ip, ip, r1, lsl #16
-    3db0:	e59d1150 	ldr	r1, [sp, #336]
-    3db4:	e1855802 	orr	r5, r5, r2, lsl #16
-    3db8:	e59d214c 	ldr	r2, [sp, #332]
-    3dbc:	e1868c08 	orr	r8, r6, r8, lsl #24
-    3dc0:	e1846c01 	orr	r6, r4, r1, lsl #24
-    3dc4:	e59d4148 	ldr	r4, [sp, #328]
-    3dc8:	e59d1140 	ldr	r1, [sp, #320]
-    3dcc:	e18ee802 	orr	lr, lr, r2, lsl #16
-    3dd0:	e59d213c 	ldr	r2, [sp, #316]
-    3dd4:	e18a7c07 	orr	r7, sl, r7, lsl #24
-    3dd8:	e185ac0b 	orr	sl, r5, fp, lsl #24
-    3ddc:	e18e5c04 	orr	r5, lr, r4, lsl #24
-    3de0:	e18c4c01 	orr	r4, ip, r1, lsl #24
-    3de4:	e59d1138 	ldr	r1, [sp, #312]
-    3de8:	e58d716c 	str	r7, [sp, #364]
-    3dec:	e1800802 	orr	r0, r0, r2, lsl #16
-    3df0:	e180ec01 	orr	lr, r0, r1, lsl #24
-    3df4:	e59f26d8 	ldr	r2, [pc, #1752]	; 44d4 <.text+0x44d4>
-    3df8:	e59d116c 	ldr	r1, [sp, #364]
-    3dfc:	e59f06cc 	ldr	r0, [pc, #1740]	; 44d0 <.text+0x44d0>
-    3e00:	e5828000 	str	r8, [r2]
-    3e04:	e580101c 	str	r1, [r0, #28]
-    3e08:	e582a004 	str	sl, [r2, #4]
-    3e0c:	e5826008 	str	r6, [r2, #8]
-    3e10:	e5825014 	str	r5, [r2, #20]
-    3e14:	e5824020 	str	r4, [r2, #32]
-    3e18:	e582e01c 	str	lr, [r2, #28]
-    3e1c:	e5d32021 	ldrb	r2, [r3, #33]
-    3e20:	e5d38020 	ldrb	r8, [r3, #32]
-    3e24:	e58d2134 	str	r2, [sp, #308]
-    3e28:	e5d34025 	ldrb	r4, [r3, #37]
-    3e2c:	e5d35024 	ldrb	r5, [r3, #36]
-    3e30:	e58d412c 	str	r4, [sp, #300]
-    3e34:	e5d36029 	ldrb	r6, [r3, #41]
-    3e38:	e5d34028 	ldrb	r4, [r3, #40]
-    3e3c:	e58d6120 	str	r6, [sp, #288]
-    3e40:	e5d3103d 	ldrb	r1, [r3, #61]
-    3e44:	e5d3a031 	ldrb	sl, [r3, #49]
-    3e48:	e5d3b02d 	ldrb	fp, [r3, #45]
-    3e4c:	e5d36035 	ldrb	r6, [r3, #53]
-    3e50:	e5d3e030 	ldrb	lr, [r3, #48]
-    3e54:	e5d3c02c 	ldrb	ip, [r3, #44]
-    3e58:	e5d30034 	ldrb	r0, [r3, #52]
-    3e5c:	e5d3203c 	ldrb	r2, [r3, #60]
-    3e60:	e58d1100 	str	r1, [sp, #256]
-    3e64:	e5d31022 	ldrb	r1, [r3, #34]
-    3e68:	e58d1130 	str	r1, [sp, #304]
-    3e6c:	e5d31026 	ldrb	r1, [r3, #38]
-    3e70:	e58d1128 	str	r1, [sp, #296]
-    3e74:	e5d3102a 	ldrb	r1, [r3, #42]
-    3e78:	e58d111c 	str	r1, [sp, #284]
-    3e7c:	e5d31032 	ldrb	r1, [r3, #50]
-    3e80:	e58d1118 	str	r1, [sp, #280]
-    3e84:	e5d3102e 	ldrb	r1, [r3, #46]
-    3e88:	e58d1110 	str	r1, [sp, #272]
-    3e8c:	e5d31036 	ldrb	r1, [r3, #54]
-    3e90:	e58d1108 	str	r1, [sp, #264]
-    3e94:	e5d3103e 	ldrb	r1, [r3, #62]
-    3e98:	e58d10fc 	str	r1, [sp, #252]
-    3e9c:	e59d1134 	ldr	r1, [sp, #308]
-    3ea0:	e1888401 	orr	r8, r8, r1, lsl #8
-    3ea4:	e59d112c 	ldr	r1, [sp, #300]
-    3ea8:	e1855401 	orr	r5, r5, r1, lsl #8
-    3eac:	e59d1120 	ldr	r1, [sp, #288]
-    3eb0:	e1844401 	orr	r4, r4, r1, lsl #8
-    3eb4:	e5d31033 	ldrb	r1, [r3, #51]
-    3eb8:	e5d37027 	ldrb	r7, [r3, #39]
-    3ebc:	e18ee40a 	orr	lr, lr, sl, lsl #8
-    3ec0:	e18cc40b 	orr	ip, ip, fp, lsl #8
-    3ec4:	e5d3a023 	ldrb	sl, [r3, #35]
-    3ec8:	e5d3b02b 	ldrb	fp, [r3, #43]
-    3ecc:	e1800406 	orr	r0, r0, r6, lsl #8
-    3ed0:	e58d1114 	str	r1, [sp, #276]
-    3ed4:	e59d6100 	ldr	r6, [sp, #256]
-    3ed8:	e1822406 	orr	r2, r2, r6, lsl #8
-    3edc:	e5d3602f 	ldrb	r6, [r3, #47]
-    3ee0:	e58d610c 	str	r6, [sp, #268]
-    3ee4:	e5d31037 	ldrb	r1, [r3, #55]
-    3ee8:	e58d1104 	str	r1, [sp, #260]
-    3eec:	e59d1130 	ldr	r1, [sp, #304]
-    3ef0:	e5d3603f 	ldrb	r6, [r3, #63]
-    3ef4:	e1888801 	orr	r8, r8, r1, lsl #16
-    3ef8:	e58d60f8 	str	r6, [sp, #248]
-    3efc:	e59d111c 	ldr	r1, [sp, #284]
-    3f00:	e59d6128 	ldr	r6, [sp, #296]
-    3f04:	e1844801 	orr	r4, r4, r1, lsl #16
-    3f08:	e1855806 	orr	r5, r5, r6, lsl #16
-    3f0c:	e59d1110 	ldr	r1, [sp, #272]
-    3f10:	e59d6118 	ldr	r6, [sp, #280]
-    3f14:	e18cc801 	orr	ip, ip, r1, lsl #16
-    3f18:	e18ee806 	orr	lr, lr, r6, lsl #16
-    3f1c:	e59d10fc 	ldr	r1, [sp, #252]
-    3f20:	e59d6108 	ldr	r6, [sp, #264]
-    3f24:	e1857c07 	orr	r7, r5, r7, lsl #24
-    3f28:	e58d7124 	str	r7, [sp, #292]
-    3f2c:	e1800806 	orr	r0, r0, r6, lsl #16
-    3f30:	e1822801 	orr	r2, r2, r1, lsl #16
-    3f34:	e1886c0a 	orr	r6, r8, sl, lsl #24
-    3f38:	e59d110c 	ldr	r1, [sp, #268]
-    3f3c:	e1848c0b 	orr	r8, r4, fp, lsl #24
-    3f40:	e59d4114 	ldr	r4, [sp, #276]
-    3f44:	e18e5c04 	orr	r5, lr, r4, lsl #24
-    3f48:	e18c4c01 	orr	r4, ip, r1, lsl #24
-    3f4c:	e59d1104 	ldr	r1, [sp, #260]
-    3f50:	e180ec01 	orr	lr, r0, r1, lsl #24
-    3f54:	e59d00f8 	ldr	r0, [sp, #248]
-    3f58:	e59f1578 	ldr	r1, [pc, #1400]	; 44d8 <.text+0x44d8>
-    3f5c:	e182cc00 	orr	ip, r2, r0, lsl #24
-    3f60:	e59d2124 	ldr	r2, [sp, #292]
-    3f64:	e5816000 	str	r6, [r1]
-    3f68:	e5812004 	str	r2, [r1, #4]
-    3f6c:	e5818008 	str	r8, [r1, #8]
-    3f70:	e5815010 	str	r5, [r1, #16]
-    3f74:	e581400c 	str	r4, [r1, #12]
-    3f78:	e581e014 	str	lr, [r1, #20]
-    3f7c:	e581c020 	str	ip, [r1, #32]
-    3f80:	e5d34039 	ldrb	r4, [r3, #57]
-    3f84:	e5d3a038 	ldrb	sl, [r3, #56]
-    3f88:	e58d40f4 	str	r4, [sp, #244]
-    3f8c:	e5d38059 	ldrb	r8, [r3, #89]
-    3f90:	e5d36058 	ldrb	r6, [r3, #88]
-    3f94:	e58d80e8 	str	r8, [sp, #232]
-    3f98:	e5d3005d 	ldrb	r0, [r3, #93]
-    3f9c:	e5d3505c 	ldrb	r5, [r3, #92]
-    3fa0:	e58d00e0 	str	r0, [sp, #224]
-    3fa4:	e5d31061 	ldrb	r1, [r3, #97]
-    3fa8:	e5d34060 	ldrb	r4, [r3, #96]
-    3fac:	e58d10d8 	str	r1, [sp, #216]
-    3fb0:	e5d3103a 	ldrb	r1, [r3, #58]
-    3fb4:	e5d38065 	ldrb	r8, [r3, #101]
-    3fb8:	e5d3b06d 	ldrb	fp, [r3, #109]
-    3fbc:	e5d32069 	ldrb	r2, [r3, #105]
-    3fc0:	e5d3e064 	ldrb	lr, [r3, #100]
-    3fc4:	e5d3c06c 	ldrb	ip, [r3, #108]
-    3fc8:	e5d30068 	ldrb	r0, [r3, #104]
-    3fcc:	e58d10f0 	str	r1, [sp, #240]
-    3fd0:	e5d3105a 	ldrb	r1, [r3, #90]
-    3fd4:	e58d10e4 	str	r1, [sp, #228]
-    3fd8:	e5d3105e 	ldrb	r1, [r3, #94]
-    3fdc:	e58d10dc 	str	r1, [sp, #220]
-    3fe0:	e5d31062 	ldrb	r1, [r3, #98]
-    3fe4:	e58d10d4 	str	r1, [sp, #212]
-    3fe8:	e5d31066 	ldrb	r1, [r3, #102]
-    3fec:	e58d10cc 	str	r1, [sp, #204]
-    3ff0:	e5d3106e 	ldrb	r1, [r3, #110]
-    3ff4:	e58d10c4 	str	r1, [sp, #196]
-    3ff8:	e5d3106a 	ldrb	r1, [r3, #106]
-    3ffc:	e58d10bc 	str	r1, [sp, #188]
-    4000:	e59d10f4 	ldr	r1, [sp, #244]
-    4004:	e18aa401 	orr	sl, sl, r1, lsl #8
-    4008:	e59d10e8 	ldr	r1, [sp, #232]
-    400c:	e1800402 	orr	r0, r0, r2, lsl #8
-    4010:	e1866401 	orr	r6, r6, r1, lsl #8
-    4014:	e5d32063 	ldrb	r2, [r3, #99]
-    4018:	e59d10e0 	ldr	r1, [sp, #224]
-    401c:	e5d3703b 	ldrb	r7, [r3, #59]
-    4020:	e1855401 	orr	r5, r5, r1, lsl #8
-    4024:	e18ee408 	orr	lr, lr, r8, lsl #8
-    4028:	e59d10d8 	ldr	r1, [sp, #216]
-    402c:	e5d3805b 	ldrb	r8, [r3, #91]
-    4030:	e18cc40b 	orr	ip, ip, fp, lsl #8
-    4034:	e5d3b05f 	ldrb	fp, [r3, #95]
-    4038:	e58d20d0 	str	r2, [sp, #208]
-    403c:	e1844401 	orr	r4, r4, r1, lsl #8
-    4040:	e5d31067 	ldrb	r1, [r3, #103]
-    4044:	e58d10c8 	str	r1, [sp, #200]
-    4048:	e5d3206f 	ldrb	r2, [r3, #111]
-    404c:	e58d20c0 	str	r2, [sp, #192]
-    4050:	e5d3106b 	ldrb	r1, [r3, #107]
-    4054:	e58d10b8 	str	r1, [sp, #184]
-    4058:	e59d10e4 	ldr	r1, [sp, #228]
-    405c:	e1866801 	orr	r6, r6, r1, lsl #16
-    4060:	e59d10d4 	ldr	r1, [sp, #212]
-    4064:	e59d20f0 	ldr	r2, [sp, #240]
-    4068:	e1844801 	orr	r4, r4, r1, lsl #16
-    406c:	e59d10c4 	ldr	r1, [sp, #196]
-    4070:	e18aa802 	orr	sl, sl, r2, lsl #16
-    4074:	e59d20dc 	ldr	r2, [sp, #220]
-    4078:	e18cc801 	orr	ip, ip, r1, lsl #16
-    407c:	e59d10d0 	ldr	r1, [sp, #208]
-    4080:	e1855802 	orr	r5, r5, r2, lsl #16
-    4084:	e59d20cc 	ldr	r2, [sp, #204]
-    4088:	e1868c08 	orr	r8, r6, r8, lsl #24
-    408c:	e1846c01 	orr	r6, r4, r1, lsl #24
-    4090:	e59d40c8 	ldr	r4, [sp, #200]
-    4094:	e59d10c0 	ldr	r1, [sp, #192]
-    4098:	e18ee802 	orr	lr, lr, r2, lsl #16
-    409c:	e59d20bc 	ldr	r2, [sp, #188]
-    40a0:	e18a7c07 	orr	r7, sl, r7, lsl #24
-    40a4:	e185ac0b 	orr	sl, r5, fp, lsl #24
-    40a8:	e18e5c04 	orr	r5, lr, r4, lsl #24
-    40ac:	e18c4c01 	orr	r4, ip, r1, lsl #24
-    40b0:	e59d10b8 	ldr	r1, [sp, #184]
-    40b4:	e1800802 	orr	r0, r0, r2, lsl #16
-    40b8:	e58d70ec 	str	r7, [sp, #236]
-    40bc:	e59f2418 	ldr	r2, [pc, #1048]	; 44dc <.text+0x44dc>
-    40c0:	e180ec01 	orr	lr, r0, r1, lsl #24
-    40c4:	e59d10ec 	ldr	r1, [sp, #236]
-    40c8:	e59f0408 	ldr	r0, [pc, #1032]	; 44d8 <.text+0x44d8>
-    40cc:	e580101c 	str	r1, [r0, #28]
-    40d0:	e5828000 	str	r8, [r2]
-    40d4:	e582a004 	str	sl, [r2, #4]
-    40d8:	e5826008 	str	r6, [r2, #8]
-    40dc:	e5825014 	str	r5, [r2, #20]
-    40e0:	e5824020 	str	r4, [r2, #32]
-    40e4:	e582e01c 	str	lr, [r2, #28]
-    40e8:	e5d32089 	ldrb	r2, [r3, #137]
-    40ec:	e5d38088 	ldrb	r8, [r3, #136]
-    40f0:	e58d20b4 	str	r2, [sp, #180]
-    40f4:	e5d3408d 	ldrb	r4, [r3, #141]
-    40f8:	e5d3508c 	ldrb	r5, [r3, #140]
-    40fc:	e58d40ac 	str	r4, [sp, #172]
-    4100:	e5d36091 	ldrb	r6, [r3, #145]
-    4104:	e5d34090 	ldrb	r4, [r3, #144]
-    4108:	e58d60a0 	str	r6, [sp, #160]
-    410c:	e5d30099 	ldrb	r0, [r3, #153]
-    4110:	e5d3a095 	ldrb	sl, [r3, #149]
-    4114:	e5d3e094 	ldrb	lr, [r3, #148]
-    4118:	e5d3c098 	ldrb	ip, [r3, #152]
-    411c:	e58d0090 	str	r0, [sp, #144]
-    4120:	e5d3108a 	ldrb	r1, [r3, #138]
-    4124:	e5d360a1 	ldrb	r6, [r3, #161]
-    4128:	e5d3b09c 	ldrb	fp, [r3, #156]
-    412c:	e5d300a0 	ldrb	r0, [r3, #160]
-    4130:	e5d3209d 	ldrb	r2, [r3, #157]
-    4134:	e58d10b0 	str	r1, [sp, #176]
-    4138:	e5d3108e 	ldrb	r1, [r3, #142]
-    413c:	e58d10a8 	str	r1, [sp, #168]
-    4140:	e5d31092 	ldrb	r1, [r3, #146]
-    4144:	e58d109c 	str	r1, [sp, #156]
-    4148:	e5d31096 	ldrb	r1, [r3, #150]
-    414c:	e58d1098 	str	r1, [sp, #152]
-    4150:	e5d3109a 	ldrb	r1, [r3, #154]
-    4154:	e58d108c 	str	r1, [sp, #140]
-    4158:	e5d310a2 	ldrb	r1, [r3, #162]
-    415c:	e58d1084 	str	r1, [sp, #132]
-    4160:	e5d3109e 	ldrb	r1, [r3, #158]
-    4164:	e18b2402 	orr	r2, fp, r2, lsl #8
-    4168:	e58d1078 	str	r1, [sp, #120]
-    416c:	e58d207c 	str	r2, [sp, #124]
-    4170:	e59d10b4 	ldr	r1, [sp, #180]
-    4174:	e5d32097 	ldrb	r2, [r3, #151]
-    4178:	e5d3b093 	ldrb	fp, [r3, #147]
-    417c:	e5d3708f 	ldrb	r7, [r3, #143]
-    4180:	e1888401 	orr	r8, r8, r1, lsl #8
-    4184:	e18ee40a 	orr	lr, lr, sl, lsl #8
-    4188:	e59d10ac 	ldr	r1, [sp, #172]
-    418c:	e5d3a08b 	ldrb	sl, [r3, #139]
-    4190:	e58d2094 	str	r2, [sp, #148]
-    4194:	e1855401 	orr	r5, r5, r1, lsl #8
-    4198:	e1800406 	orr	r0, r0, r6, lsl #8
-    419c:	e59d10a0 	ldr	r1, [sp, #160]
-    41a0:	e5d3609b 	ldrb	r6, [r3, #155]
-    41a4:	e1844401 	orr	r4, r4, r1, lsl #8
-    41a8:	e58d6088 	str	r6, [sp, #136]
-    41ac:	e59d1090 	ldr	r1, [sp, #144]
-    41b0:	e18cc401 	orr	ip, ip, r1, lsl #8
-    41b4:	e5d310a3 	ldrb	r1, [r3, #163]
-    41b8:	e59d60b0 	ldr	r6, [sp, #176]
-    41bc:	e58d1080 	str	r1, [sp, #128]
-    41c0:	e59d10a8 	ldr	r1, [sp, #168]
-    41c4:	e5d3209f 	ldrb	r2, [r3, #159]
-    41c8:	e1888806 	orr	r8, r8, r6, lsl #16
-    41cc:	e1855801 	orr	r5, r5, r1, lsl #16
-    41d0:	e59d6098 	ldr	r6, [sp, #152]
-    41d4:	e59d108c 	ldr	r1, [sp, #140]
-    41d8:	e58d2070 	str	r2, [sp, #112]
-    41dc:	e18ee806 	orr	lr, lr, r6, lsl #16
-    41e0:	e59d209c 	ldr	r2, [sp, #156]
-    41e4:	e18cc801 	orr	ip, ip, r1, lsl #16
-    41e8:	e28d1078 	add	r1, sp, #120	; 0x78
-    41ec:	e8910042 	ldmia	r1, {r1, r6}
-    41f0:	e1844802 	orr	r4, r4, r2, lsl #16
-    41f4:	e1866801 	orr	r6, r6, r1, lsl #16
-    41f8:	e58d6074 	str	r6, [sp, #116]
-    41fc:	e59d1088 	ldr	r1, [sp, #136]
-    4200:	e1886c0a 	orr	r6, r8, sl, lsl #24
-    4204:	e1848c0b 	orr	r8, r4, fp, lsl #24
-    4208:	e59d4094 	ldr	r4, [sp, #148]
-    420c:	e59d2084 	ldr	r2, [sp, #132]
-    4210:	e1857c07 	orr	r7, r5, r7, lsl #24
-    4214:	e18e5c04 	orr	r5, lr, r4, lsl #24
-    4218:	e18c4c01 	orr	r4, ip, r1, lsl #24
-    421c:	e59d1080 	ldr	r1, [sp, #128]
-    4220:	e1800802 	orr	r0, r0, r2, lsl #16
-    4224:	e59f22b4 	ldr	r2, [pc, #692]	; 44e0 <.text+0x44e0>
-    4228:	e180ec01 	orr	lr, r0, r1, lsl #24
-    422c:	e59d0074 	ldr	r0, [sp, #116]
-    4230:	e59d1070 	ldr	r1, [sp, #112]
-    4234:	e58d70a4 	str	r7, [sp, #164]
-    4238:	e5826000 	str	r6, [r2]
-    423c:	e59d60a4 	ldr	r6, [sp, #164]
-    4240:	e180cc01 	orr	ip, r0, r1, lsl #24
-    4244:	e5826004 	str	r6, [r2, #4]
-    4248:	e5828008 	str	r8, [r2, #8]
-    424c:	e582500c 	str	r5, [r2, #12]
-    4250:	e5824014 	str	r4, [r2, #20]
-    4254:	e582e020 	str	lr, [r2, #32]
-    4258:	e582c01c 	str	ip, [r2, #28]
-    425c:	e5d38071 	ldrb	r8, [r3, #113]
-    4260:	e5d36070 	ldrb	r6, [r3, #112]
-    4264:	e58d806c 	str	r8, [sp, #108]
-    4268:	e5d30075 	ldrb	r0, [r3, #117]
-    426c:	e5d35074 	ldrb	r5, [r3, #116]
-    4270:	e58d0064 	str	r0, [sp, #100]
-    4274:	e5d31079 	ldrb	r1, [r3, #121]
-    4278:	e5d34078 	ldrb	r4, [r3, #120]
-    427c:	e58d105c 	str	r1, [sp, #92]
-    4280:	e5d3207c 	ldrb	r2, [r3, #124]
-    4284:	e58d2054 	str	r2, [sp, #84]
-    4288:	e5d31072 	ldrb	r1, [r3, #114]
-    428c:	e5d38085 	ldrb	r8, [r3, #133]
-    4290:	e5d3b081 	ldrb	fp, [r3, #129]
-    4294:	e5d320a5 	ldrb	r2, [r3, #165]
-    4298:	e5d3a07d 	ldrb	sl, [r3, #125]
-    429c:	e5d3e084 	ldrb	lr, [r3, #132]
-    42a0:	e5d3c080 	ldrb	ip, [r3, #128]
-    42a4:	e5d300a4 	ldrb	r0, [r3, #164]
-    42a8:	e58d1068 	str	r1, [sp, #104]
-    42ac:	e5d31076 	ldrb	r1, [r3, #118]
-    42b0:	e58d1060 	str	r1, [sp, #96]
-    42b4:	e5d3107a 	ldrb	r1, [r3, #122]
-    42b8:	e58d1058 	str	r1, [sp, #88]
-    42bc:	e5d3107e 	ldrb	r1, [r3, #126]
-    42c0:	e58d104c 	str	r1, [sp, #76]
-    42c4:	e5d31086 	ldrb	r1, [r3, #134]
-    42c8:	e58d1040 	str	r1, [sp, #64]
-    42cc:	e5d31082 	ldrb	r1, [r3, #130]
-    42d0:	e58d1034 	str	r1, [sp, #52]
-    42d4:	e5d310a6 	ldrb	r1, [r3, #166]
-    42d8:	e58d1028 	str	r1, [sp, #40]
-    42dc:	e59d106c 	ldr	r1, [sp, #108]
-    42e0:	e1866401 	orr	r6, r6, r1, lsl #8
-    42e4:	e59d1064 	ldr	r1, [sp, #100]
-    42e8:	e1855401 	orr	r5, r5, r1, lsl #8
-    42ec:	e59d105c 	ldr	r1, [sp, #92]
-    42f0:	e1844401 	orr	r4, r4, r1, lsl #8
-    42f4:	e59d1054 	ldr	r1, [sp, #84]
-    42f8:	e181a40a 	orr	sl, r1, sl, lsl #8
-    42fc:	e58da050 	str	sl, [sp, #80]
-    4300:	e1800402 	orr	r0, r0, r2, lsl #8
-    4304:	e5d3207f 	ldrb	r2, [r3, #127]
-    4308:	e5d3a077 	ldrb	sl, [r3, #119]
-    430c:	e18ee408 	orr	lr, lr, r8, lsl #8
-    4310:	e18cc40b 	orr	ip, ip, fp, lsl #8
-    4314:	e5d38073 	ldrb	r8, [r3, #115]
-    4318:	e5d3b07b 	ldrb	fp, [r3, #123]
-    431c:	e58d2044 	str	r2, [sp, #68]
-    4320:	e5d31087 	ldrb	r1, [r3, #135]
-    4324:	e58d103c 	str	r1, [sp, #60]
-    4328:	e5d32083 	ldrb	r2, [r3, #131]
-    432c:	e58d2030 	str	r2, [sp, #48]
-    4330:	e59d2068 	ldr	r2, [sp, #104]
-    4334:	e5d310a7 	ldrb	r1, [r3, #167]
-    4338:	e1866802 	orr	r6, r6, r2, lsl #16
-    433c:	e58d1024 	str	r1, [sp, #36]
-    4340:	e59d2058 	ldr	r2, [sp, #88]
-    4344:	e59d1060 	ldr	r1, [sp, #96]
-    4348:	e1844802 	orr	r4, r4, r2, lsl #16
-    434c:	e1855801 	orr	r5, r5, r1, lsl #16
-    4350:	e59d204c 	ldr	r2, [sp, #76]
-    4354:	e59d1050 	ldr	r1, [sp, #80]
-    4358:	e1811802 	orr	r1, r1, r2, lsl #16
-    435c:	e58d1048 	str	r1, [sp, #72]
-    4360:	e59d1040 	ldr	r1, [sp, #64]
-    4364:	e18ee801 	orr	lr, lr, r1, lsl #16
-    4368:	e59d1028 	ldr	r1, [sp, #40]
-    436c:	e1868c08 	orr	r8, r6, r8, lsl #24
-    4370:	e1800801 	orr	r0, r0, r1, lsl #16
-    4374:	e1846c0b 	orr	r6, r4, fp, lsl #24
-    4378:	e28d1044 	add	r1, sp, #68	; 0x44
-    437c:	e8910012 	ldmia	r1, {r1, r4}
-    4380:	e59d2034 	ldr	r2, [sp, #52]
-    4384:	e185ac0a 	orr	sl, r5, sl, lsl #24
-    4388:	e1845c01 	orr	r5, r4, r1, lsl #24
-    438c:	e59d403c 	ldr	r4, [sp, #60]
-    4390:	e59d1030 	ldr	r1, [sp, #48]
-    4394:	e18cc802 	orr	ip, ip, r2, lsl #16
-    4398:	e18eec04 	orr	lr, lr, r4, lsl #24
-    439c:	e18ccc01 	orr	ip, ip, r1, lsl #24
-    43a0:	e58de038 	str	lr, [sp, #56]
-    43a4:	e58dc02c 	str	ip, [sp, #44]
-    43a8:	e59d1024 	ldr	r1, [sp, #36]
-    43ac:	e59f2130 	ldr	r2, [pc, #304]	; 44e4 <.text+0x44e4>
-    43b0:	e1804c01 	orr	r4, r0, r1, lsl #24
-    43b4:	e59d002c 	ldr	r0, [sp, #44]
-    43b8:	e59d1038 	ldr	r1, [sp, #56]
-    43bc:	e582001c 	str	r0, [r2, #28]
-    43c0:	e5828000 	str	r8, [r2]
-    43c4:	e582a004 	str	sl, [r2, #4]
-    43c8:	e5826008 	str	r6, [r2, #8]
-    43cc:	e5825014 	str	r5, [r2, #20]
-    43d0:	e5821020 	str	r1, [r2, #32]
-    43d4:	e59f210c 	ldr	r2, [pc, #268]	; 44e8 <.text+0x44e8>
-    43d8:	e5824000 	str	r4, [r2]
-    43dc:	e5d340b8 	ldrb	r4, [r3, #184]
-    43e0:	e5d3a0a9 	ldrb	sl, [r3, #169]
-    43e4:	e5d380ad 	ldrb	r8, [r3, #173]
-    43e8:	e5d360b1 	ldrb	r6, [r3, #177]
-    43ec:	e5d3e0a8 	ldrb	lr, [r3, #168]
-    43f0:	e5d3c0ac 	ldrb	ip, [r3, #172]
-    43f4:	e5d300b0 	ldrb	r0, [r3, #176]
-    43f8:	e58d4014 	str	r4, [sp, #20]
-    43fc:	e5d310aa 	ldrb	r1, [r3, #170]
-    4400:	e5d340b5 	ldrb	r4, [r3, #181]
-    4404:	e5d350b9 	ldrb	r5, [r3, #185]
-    4408:	e5d320b4 	ldrb	r2, [r3, #180]
-    440c:	e58d1020 	str	r1, [sp, #32]
-    4410:	e5d310ae 	ldrb	r1, [r3, #174]
-    4414:	e58d101c 	str	r1, [sp, #28]
-    4418:	e5d310b2 	ldrb	r1, [r3, #178]
-    441c:	e58d1018 	str	r1, [sp, #24]
-    4420:	e5d310ba 	ldrb	r1, [r3, #186]
-    4424:	e58d100c 	str	r1, [sp, #12]
-    4428:	e1800406 	orr	r0, r0, r6, lsl #8
-    442c:	e59d6014 	ldr	r6, [sp, #20]
-    4430:	e5d310b6 	ldrb	r1, [r3, #182]
-    4434:	e1865405 	orr	r5, r6, r5, lsl #8
-    4438:	e58d1000 	str	r1, [sp]
-    443c:	e58d5010 	str	r5, [sp, #16]
-    4440:	e18ee40a 	orr	lr, lr, sl, lsl #8
-    4444:	e5d360ab 	ldrb	r6, [r3, #171]
-    4448:	e5d3b0b7 	ldrb	fp, [r3, #183]
-    444c:	e5d3a0b3 	ldrb	sl, [r3, #179]
-    4450:	e18cc408 	orr	ip, ip, r8, lsl #8
-    4454:	e5d380af 	ldrb	r8, [r3, #175]
-    4458:	e5d330bb 	ldrb	r3, [r3, #187]
-    445c:	e58d3004 	str	r3, [sp, #4]
-    4460:	e59d1020 	ldr	r1, [sp, #32]
-    4464:	e59d301c 	ldr	r3, [sp, #28]
-    4468:	e1822404 	orr	r2, r2, r4, lsl #8
-    446c:	e59d4018 	ldr	r4, [sp, #24]
-    4470:	e18ee801 	orr	lr, lr, r1, lsl #16
-    4474:	e18cc803 	orr	ip, ip, r3, lsl #16
-    4478:	e59d100c 	ldr	r1, [sp, #12]
-    447c:	e59d3000 	ldr	r3, [sp]
-    4480:	e1800804 	orr	r0, r0, r4, lsl #16
-    4484:	e18e4c06 	orr	r4, lr, r6, lsl #24
-    4488:	e59d6004 	ldr	r6, [sp, #4]
-    448c:	e1851801 	orr	r1, r5, r1, lsl #16
-    4490:	e1822803 	orr	r2, r2, r3, lsl #16
-    4494:	e18c5c08 	orr	r5, ip, r8, lsl #24
-    4498:	e59f8048 	ldr	r8, [pc, #72]	; 44e8 <.text+0x44e8>
-    449c:	e180ec0a 	orr	lr, r0, sl, lsl #24
-    44a0:	e181cc06 	orr	ip, r1, r6, lsl #24
-    44a4:	e1823c0b 	orr	r3, r2, fp, lsl #24
-    44a8:	e58d1008 	str	r1, [sp, #8]
-    44ac:	e588301c 	str	r3, [r8, #28]
-    44b0:	e5884004 	str	r4, [r8, #4]
-    44b4:	e5885008 	str	r5, [r8, #8]
-    44b8:	e588e014 	str	lr, [r8, #20]
-    44bc:	e588c020 	str	ip, [r8, #32]
-    44c0:	e28dde1b 	add	sp, sp, #432	; 0x1b0
-    44c4:	e8bd4ff0 	ldmia	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
-    44c8:	e12fff1e 	bx	lr
-    44cc:	400010b4 	strmih	r1, [r0], -r4
-    44d0:	4000123c 	andmi	r1, r0, ip, lsr r2
-    44d4:	40001284 	andmi	r1, r0, r4, lsl #5
-    44d8:	400012a8 	andmi	r1, r0, r8, lsr #5
-    44dc:	400011f4 	strmid	r1, [r0], -r4
-    44e0:	40001260 	andmi	r1, r0, r0, ror #4
-    44e4:	400012cc 	andmi	r1, r0, ip, asr #5
-    44e8:	40001218 	andmi	r1, r0, r8, lsl r2
-
-000044ec <pidCalc>:
-    44ec:	e92d47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
-    44f0:	e5908020 	ldr	r8, [r0, #32]
-    44f4:	e1a07000 	mov	r7, r0
-    44f8:	e1a00008 	mov	r0, r8
-    44fc:	e1a0a003 	mov	sl, r3
-    4500:	e1a04001 	mov	r4, r1
-    4504:	e1a09002 	mov	r9, r2
-    4508:	eb004045 	bl	14624 <__lesf2>
-    450c:	e3500000 	cmp	r0, #0	; 0x0
-    4510:	e2883102 	add	r3, r8, #-2147483648	; 0x80000000
-    4514:	e1a00004 	mov	r0, r4
-    4518:	ba000004 	blt	4530 <pidCalc+0x44>
-    451c:	e1a01003 	mov	r1, r3
-    4520:	e1a08003 	mov	r8, r3
-    4524:	eb00403e 	bl	14624 <__lesf2>
-    4528:	e3500000 	cmp	r0, #0	; 0x0
-    452c:	a1a08004 	movge	r8, r4
-    4530:	e59d1020 	ldr	r1, [sp, #32]
-    4534:	e1a00008 	mov	r0, r8
-    4538:	eb003f79 	bl	14324 <__aeabi_fmul>
-    453c:	e5974018 	ldr	r4, [r7, #24]
-    4540:	e1a01000 	mov	r1, r0
-    4544:	e1a00004 	mov	r0, r4
-    4548:	eb003ecd 	bl	14084 <__addsf3>
-    454c:	e597601c 	ldr	r6, [r7, #28]
-    4550:	e5870018 	str	r0, [r7, #24]
-    4554:	e1a01006 	mov	r1, r6
-    4558:	e1a04000 	mov	r4, r0
-    455c:	eb00402e 	bl	1461c <__gesf2>
-    4560:	e2865102 	add	r5, r6, #-2147483648	; 0x80000000
-    4564:	e3500000 	cmp	r0, #0	; 0x0
-    4568:	e1a01005 	mov	r1, r5
-    456c:	e1a00004 	mov	r0, r4
-    4570:	c5876018 	strgt	r6, [r7, #24]
-    4574:	ca000002 	bgt	4584 <pidCalc+0x98>
-    4578:	eb004029 	bl	14624 <__lesf2>
-    457c:	e3500000 	cmp	r0, #0	; 0x0
-    4580:	b5875018 	strlt	r5, [r7, #24]
-    4584:	e1a0000a 	mov	r0, sl
-    4588:	eb003cd4 	bl	138e0 <__aeabi_f2d>
-    458c:	e1a02000 	mov	r2, r0
-    4590:	e3a005ff 	mov	r0, #1069547520	; 0x3fc00000
-    4594:	e1a03001 	mov	r3, r1
-    4598:	e2800603 	add	r0, r0, #3145728	; 0x300000
-    459c:	e3a01000 	mov	r1, #0	; 0x0
-    45a0:	eb003da2 	bl	13c30 <__aeabi_ddiv>
-    45a4:	e1a04000 	mov	r4, r0
-    45a8:	e1a00008 	mov	r0, r8
-    45ac:	e1a05001 	mov	r5, r1
-    45b0:	eb00405d 	bl	1472c <__aeabi_f2iz>
-    45b4:	e3500000 	cmp	r0, #0	; 0x0
-    45b8:	b2600000 	rsblt	r0, r0, #0	; 0x0
-    45bc:	eb003cbc 	bl	138b4 <__aeabi_i2d>
-    45c0:	e1a02000 	mov	r2, r0
-    45c4:	e1a03001 	mov	r3, r1
-    45c8:	e1a00004 	mov	r0, r4
-    45cc:	e1a01005 	mov	r1, r5
-    45d0:	eb00418b 	bl	14c04 <__pow_from_arm>
-    45d4:	e1a04000 	mov	r4, r0
-    45d8:	e1a05001 	mov	r5, r1
-    45dc:	e1a00008 	mov	r0, r8
-    45e0:	e5971000 	ldr	r1, [r7]
-    45e4:	eb003f4e 	bl	14324 <__aeabi_fmul>
-    45e8:	e5971014 	ldr	r1, [r7, #20]
-    45ec:	eb003ea4 	bl	14084 <__addsf3>
-    45f0:	e1a01005 	mov	r1, r5
-    45f4:	e1a06000 	mov	r6, r0
-    45f8:	e1a00004 	mov	r0, r4
-    45fc:	eb003e75 	bl	13fd8 <__aeabi_d2f>
-    4600:	e5971008 	ldr	r1, [r7, #8]
-    4604:	eb003f46 	bl	14324 <__aeabi_fmul>
-    4608:	e1a01009 	mov	r1, r9
-    460c:	eb003f44 	bl	14324 <__aeabi_fmul>
-    4610:	e1a01000 	mov	r1, r0
-    4614:	e1a00006 	mov	r0, r6
-    4618:	eb003e99 	bl	14084 <__addsf3>
-    461c:	e5971018 	ldr	r1, [r7, #24]
-    4620:	e1a04000 	mov	r4, r0
-    4624:	e5970004 	ldr	r0, [r7, #4]
-    4628:	eb003f3d 	bl	14324 <__aeabi_fmul>
-    462c:	e1a01000 	mov	r1, r0
-    4630:	e1a00004 	mov	r0, r4
-    4634:	eb003e92 	bl	14084 <__addsf3>
-    4638:	e8bd47f0 	ldmia	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
-    463c:	e12fff1e 	bx	lr
-
-00004640 <processCtrl>:
-    4640:	e92d4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
-    4644:	e59f3c0c 	ldr	r3, [pc, #3084]	; 5258 <.text+0x5258>
-    4648:	e5931000 	ldr	r1, [r3]
-    464c:	e5d12008 	ldrb	r2, [r1, #8]
-    4650:	e3520000 	cmp	r2, #0	; 0x0
-    4654:	e24dd060 	sub	sp, sp, #96	; 0x60
-    4658:	1a00005f 	bne	47dc <processCtrl+0x19c>
-    465c:	e59f3bf8 	ldr	r3, [pc, #3064]	; 525c <.text+0x525c>
-    4660:	e5d32000 	ldrb	r2, [r3]
-    4664:	e3520005 	cmp	r2, #5	; 0x5
-    4668:	159fbbf0 	ldrne	fp, [pc, #3056]	; 5260 <.text+0x5260>
-    466c:	159f9bf0 	ldrne	r9, [pc, #3056]	; 5264 <.text+0x5264>
-    4670:	0a000062 	beq	4800 <processCtrl+0x1c0>
-    4674:	e5db2005 	ldrb	r2, [fp, #5]
-    4678:	e5db3004 	ldrb	r3, [fp, #4]
-    467c:	e5db1006 	ldrb	r1, [fp, #6]
-    4680:	e1833402 	orr	r3, r3, r2, lsl #8
-    4684:	e5db0007 	ldrb	r0, [fp, #7]
-    4688:	e1833801 	orr	r3, r3, r1, lsl #16
-    468c:	e5995000 	ldr	r5, [r9]
-    4690:	e1834c00 	orr	r4, r3, r0, lsl #24
-    4694:	e1a01004 	mov	r1, r4
-    4698:	e1a00005 	mov	r0, r5
-    469c:	eb003fde 	bl	1461c <__gesf2>
-    46a0:	e3500000 	cmp	r0, #0	; 0x0
-    46a4:	e59f6bb8 	ldr	r6, [pc, #3000]	; 5264 <.text+0x5264>
-    46a8:	ca000049 	bgt	47d4 <processCtrl+0x194>
-    46ac:	e2844102 	add	r4, r4, #-2147483648	; 0x80000000
-    46b0:	e1a00005 	mov	r0, r5
-    46b4:	e1a01004 	mov	r1, r4
-    46b8:	eb003fd9 	bl	14624 <__lesf2>
-    46bc:	e3500000 	cmp	r0, #0	; 0x0
-    46c0:	ba000043 	blt	47d4 <processCtrl+0x194>
-    46c4:	e5db2009 	ldrb	r2, [fp, #9]
-    46c8:	e5db3008 	ldrb	r3, [fp, #8]
-    46cc:	e5db100a 	ldrb	r1, [fp, #10]
-    46d0:	e1833402 	orr	r3, r3, r2, lsl #8
-    46d4:	e5db000b 	ldrb	r0, [fp, #11]
-    46d8:	e1833801 	orr	r3, r3, r1, lsl #16
-    46dc:	e5995004 	ldr	r5, [r9, #4]
-    46e0:	e1834c00 	orr	r4, r3, r0, lsl #24
-    46e4:	e1a01004 	mov	r1, r4
-    46e8:	e1a00005 	mov	r0, r5
-    46ec:	eb003fca 	bl	1461c <__gesf2>
-    46f0:	e3500000 	cmp	r0, #0	; 0x0
-    46f4:	e59f6b68 	ldr	r6, [pc, #2920]	; 5264 <.text+0x5264>
-    46f8:	ca000033 	bgt	47cc <processCtrl+0x18c>
-    46fc:	e2844102 	add	r4, r4, #-2147483648	; 0x80000000
-    4700:	e1a00005 	mov	r0, r5
-    4704:	e1a01004 	mov	r1, r4
-    4708:	eb003fc5 	bl	14624 <__lesf2>
-    470c:	e3500000 	cmp	r0, #0	; 0x0
-    4710:	ba00002d 	blt	47cc <processCtrl+0x18c>
-    4714:	e5db200d 	ldrb	r2, [fp, #13]
-    4718:	e5db300c 	ldrb	r3, [fp, #12]
-    471c:	e5db100e 	ldrb	r1, [fp, #14]
-    4720:	e1833402 	orr	r3, r3, r2, lsl #8
-    4724:	e5db000f 	ldrb	r0, [fp, #15]
-    4728:	e1833801 	orr	r3, r3, r1, lsl #16
-    472c:	e5995008 	ldr	r5, [r9, #8]
-    4730:	e1834c00 	orr	r4, r3, r0, lsl #24
-    4734:	e1a01004 	mov	r1, r4
-    4738:	e1a00005 	mov	r0, r5
-    473c:	eb003fb6 	bl	1461c <__gesf2>
-    4740:	e3500000 	cmp	r0, #0	; 0x0
-    4744:	e59f6b18 	ldr	r6, [pc, #2840]	; 5264 <.text+0x5264>
-    4748:	ca00001d 	bgt	47c4 <processCtrl+0x184>
-    474c:	e2844102 	add	r4, r4, #-2147483648	; 0x80000000
-    4750:	e1a00005 	mov	r0, r5
-    4754:	e1a01004 	mov	r1, r4
-    4758:	eb003fb1 	bl	14624 <__lesf2>
-    475c:	e3500000 	cmp	r0, #0	; 0x0
-    4760:	ba000017 	blt	47c4 <processCtrl+0x184>
-    4764:	e5db2011 	ldrb	r2, [fp, #17]
-    4768:	e5db3010 	ldrb	r3, [fp, #16]
-    476c:	e5db1012 	ldrb	r1, [fp, #18]
-    4770:	e5db0013 	ldrb	r0, [fp, #19]
-    4774:	e1833402 	orr	r3, r3, r2, lsl #8
-    4778:	e1833801 	orr	r3, r3, r1, lsl #16
-    477c:	e599500c 	ldr	r5, [r9, #12]
-    4780:	e1834c00 	orr	r4, r3, r0, lsl #24
-    4784:	e1a01004 	mov	r1, r4
-    4788:	e1a00005 	mov	r0, r5
-    478c:	eb003fa2 	bl	1461c <__gesf2>
-    4790:	e59f6acc 	ldr	r6, [pc, #2764]	; 5264 <.text+0x5264>
-    4794:	e3500000 	cmp	r0, #0	; 0x0
-    4798:	c586400c 	strgt	r4, [r6, #12]
-    479c:	ca000005 	bgt	47b8 <processCtrl+0x178>
-    47a0:	e1a00005 	mov	r0, r5
-    47a4:	e3a01000 	mov	r1, #0	; 0x0
-    47a8:	eb003f9d 	bl	14624 <__lesf2>
-    47ac:	e3500000 	cmp	r0, #0	; 0x0
-    47b0:	b3a03000 	movlt	r3, #0	; 0x0
-    47b4:	b586300c 	strlt	r3, [r6, #12]
-    47b8:	e28dd060 	add	sp, sp, #96	; 0x60
-    47bc:	e8bd4ff0 	ldmia	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
-    47c0:	e12fff1e 	bx	lr
-    47c4:	e5864008 	str	r4, [r6, #8]
-    47c8:	eaffffe5 	b	4764 <processCtrl+0x124>
-    47cc:	e5864004 	str	r4, [r6, #4]
-    47d0:	eaffffcf 	b	4714 <processCtrl+0xd4>
-    47d4:	e5864000 	str	r4, [r6]
-    47d8:	eaffffb9 	b	46c4 <processCtrl+0x84>
-    47dc:	e3a03000 	mov	r3, #0	; 0x0
-    47e0:	e5c13008 	strb	r3, [r1, #8]
-    47e4:	ebfffcda 	bl	3b54 <pidParamUpdate>
-    47e8:	e59f3a6c 	ldr	r3, [pc, #2668]	; 525c <.text+0x525c>
-    47ec:	e5d32000 	ldrb	r2, [r3]
-    47f0:	e3520005 	cmp	r2, #5	; 0x5
-    47f4:	159fba64 	ldrne	fp, [pc, #2660]	; 5260 <.text+0x5260>
-    47f8:	159f9a64 	ldrne	r9, [pc, #2660]	; 5264 <.text+0x5264>
-    47fc:	1affff9c 	bne	4674 <processCtrl+0x34>
-    4800:	e59f1a60 	ldr	r1, [pc, #2656]	; 5268 <.text+0x5268>
-    4804:	e1d100f4 	ldrsh	r0, [r1, #4]
-    4808:	ebfffbec 	bl	37c0 <LLToSIAngleRoll>
-    480c:	e59f2a54 	ldr	r2, [pc, #2644]	; 5268 <.text+0x5268>
-    4810:	e1a04000 	mov	r4, r0
-    4814:	e1d200f2 	ldrsh	r0, [r2, #2]
-    4818:	ebfffc62 	bl	39a8 <LLToSIAnglePitch>
-    481c:	eb003c2f 	bl	138e0 <__aeabi_f2d>
-    4820:	e59f3a44 	ldr	r3, [pc, #2628]	; 526c <.text+0x526c>
-    4824:	e1a06000 	mov	r6, r0
-    4828:	e5930000 	ldr	r0, [r3]
-    482c:	e1a07001 	mov	r7, r1
-    4830:	eb003c2a 	bl	138e0 <__aeabi_f2d>
-    4834:	e58d001c 	str	r0, [sp, #28]
-    4838:	e58d1020 	str	r1, [sp, #32]
-    483c:	e1a00006 	mov	r0, r6
-    4840:	e1a01007 	mov	r1, r7
-    4844:	eb0040f1 	bl	14c10 <__sin_from_arm>
-    4848:	e1a0a000 	mov	sl, r0
-    484c:	e1a00004 	mov	r0, r4
-    4850:	e1a0b001 	mov	fp, r1
-    4854:	eb003c21 	bl	138e0 <__aeabi_f2d>
-    4858:	e1a04000 	mov	r4, r0
-    485c:	e1a05001 	mov	r5, r1
-    4860:	eb0040ea 	bl	14c10 <__sin_from_arm>
-    4864:	e59f3a04 	ldr	r3, [pc, #2564]	; 5270 <.text+0x5270>
-    4868:	e58d0024 	str	r0, [sp, #36]
-    486c:	e58d1028 	str	r1, [sp, #40]
-    4870:	e5930000 	ldr	r0, [r3]
-    4874:	eb003c19 	bl	138e0 <__aeabi_f2d>
-    4878:	e58d002c 	str	r0, [sp, #44]
-    487c:	e58d1030 	str	r1, [sp, #48]
-    4880:	e1a00004 	mov	r0, r4
-    4884:	e1a01005 	mov	r1, r5
-    4888:	eb0040e3 	bl	14c1c <__cos_from_arm>
-    488c:	e59f39e0 	ldr	r3, [pc, #2528]	; 5274 <.text+0x5274>
-    4890:	e58d0034 	str	r0, [sp, #52]
-    4894:	e58d1038 	str	r1, [sp, #56]
-    4898:	e5930000 	ldr	r0, [r3]
-    489c:	eb003c0f 	bl	138e0 <__aeabi_f2d>
-    48a0:	e1a04000 	mov	r4, r0
-    48a4:	e1a05001 	mov	r5, r1
-    48a8:	e1a00006 	mov	r0, r6
-    48ac:	e1a01007 	mov	r1, r7
-    48b0:	eb0040d9 	bl	14c1c <__cos_from_arm>
-    48b4:	e1a02000 	mov	r2, r0
-    48b8:	e1a03001 	mov	r3, r1
-    48bc:	e1a00004 	mov	r0, r4
-    48c0:	e1a01005 	mov	r1, r5
-    48c4:	eb003c35 	bl	139a0 <__aeabi_dmul>
-    48c8:	e1a0200a 	mov	r2, sl
-    48cc:	e1a04000 	mov	r4, r0
-    48d0:	e1a05001 	mov	r5, r1
-    48d4:	e1a0300b 	mov	r3, fp
-    48d8:	e28d001c 	add	r0, sp, #28	; 0x1c
-    48dc:	e8900003 	ldmia	r0, {r0, r1}
-    48e0:	eb003c2e 	bl	139a0 <__aeabi_dmul>
-    48e4:	e28d2024 	add	r2, sp, #36	; 0x24
-    48e8:	e892000c 	ldmia	r2, {r2, r3}
-    48ec:	eb003c2b 	bl	139a0 <__aeabi_dmul>
-    48f0:	e1a02000 	mov	r2, r0
-    48f4:	e1a03001 	mov	r3, r1
-    48f8:	e1a00004 	mov	r0, r4
-    48fc:	e1a01005 	mov	r1, r5
-    4900:	eb003b1d 	bl	1357c <__adddf3>
-    4904:	e28d202c 	add	r2, sp, #44	; 0x2c
-    4908:	e892000c 	ldmia	r2, {r2, r3}
-    490c:	e1a04000 	mov	r4, r0
-    4910:	e1a05001 	mov	r5, r1
-    4914:	e1a0000a 	mov	r0, sl
-    4918:	e1a0100b 	mov	r1, fp
-    491c:	eb003c1f 	bl	139a0 <__aeabi_dmul>
-    4920:	e28d2034 	add	r2, sp, #52	; 0x34
-    4924:	e892000c 	ldmia	r2, {r2, r3}
-    4928:	eb003c1c 	bl	139a0 <__aeabi_dmul>
-    492c:	e1a02000 	mov	r2, r0
-    4930:	e1a03001 	mov	r3, r1
-    4934:	e1a00004 	mov	r0, r4
-    4938:	e1a01005 	mov	r1, r5
-    493c:	eb003b0e 	bl	1357c <__adddf3>
-    4940:	eb003da4 	bl	13fd8 <__aeabi_d2f>
-    4944:	e28d2034 	add	r2, sp, #52	; 0x34
-    4948:	e892000c 	ldmia	r2, {r2, r3}
-    494c:	e58d0048 	str	r0, [sp, #72]
-    4950:	e28d001c 	add	r0, sp, #28	; 0x1c
-    4954:	e8900003 	ldmia	r0, {r0, r1}
-    4958:	eb003c10 	bl	139a0 <__aeabi_dmul>
-    495c:	e28d202c 	add	r2, sp, #44	; 0x2c
-    4960:	e892000c 	ldmia	r2, {r2, r3}
-    4964:	e1a04000 	mov	r4, r0
-    4968:	e1a05001 	mov	r5, r1
-    496c:	e28d0024 	add	r0, sp, #36	; 0x24
-    4970:	e8900003 	ldmia	r0, {r0, r1}
-    4974:	eb003c09 	bl	139a0 <__aeabi_dmul>
-    4978:	e1a02000 	mov	r2, r0
-    497c:	e1a03001 	mov	r3, r1
-    4980:	e1a00004 	mov	r0, r4
-    4984:	e1a01005 	mov	r1, r5
-    4988:	eb003afa 	bl	13578 <__aeabi_dsub>
-    498c:	eb003d91 	bl	13fd8 <__aeabi_d2f>
-    4990:	e59f58e0 	ldr	r5, [pc, #2272]	; 5278 <.text+0x5278>
-    4994:	e58d004c 	str	r0, [sp, #76]
-    4998:	e59f48dc 	ldr	r4, [pc, #2268]	; 527c <.text+0x527c>
-    499c:	e5955000 	ldr	r5, [r5]
-    49a0:	e5d4100d 	ldrb	r1, [r4, #13]
-    49a4:	e5d4200c 	ldrb	r2, [r4, #12]
-    49a8:	e5d4c00e 	ldrb	ip, [r4, #14]
-    49ac:	e5d4e00f 	ldrb	lr, [r4, #15]
-    49b0:	e5d40011 	ldrb	r0, [r4, #17]
-    49b4:	e5d43010 	ldrb	r3, [r4, #16]
-    49b8:	e59f68bc 	ldr	r6, [pc, #2236]	; 527c <.text+0x527c>
-    49bc:	e5d44012 	ldrb	r4, [r4, #18]
-    49c0:	e58d503c 	str	r5, [sp, #60]
-    49c4:	e1822401 	orr	r2, r2, r1, lsl #8
-    49c8:	e59f78b0 	ldr	r7, [pc, #2224]	; 5280 <.text+0x5280>
-    49cc:	e5d61013 	ldrb	r1, [r6, #19]
-    49d0:	e182280c 	orr	r2, r2, ip, lsl #16
-    49d4:	e1833400 	orr	r3, r3, r0, lsl #8
-    49d8:	e5977000 	ldr	r7, [r7]
-    49dc:	e1826c0e 	orr	r6, r2, lr, lsl #24
-    49e0:	e1833804 	orr	r3, r3, r4, lsl #16
-    49e4:	e1835c01 	orr	r5, r3, r1, lsl #24
-    49e8:	e1a00006 	mov	r0, r6
-    49ec:	e59d103c 	ldr	r1, [sp, #60]
-    49f0:	e58d7040 	str	r7, [sp, #64]
-    49f4:	eb003e4a 	bl	14324 <__aeabi_fmul>
-    49f8:	e59d1040 	ldr	r1, [sp, #64]
-    49fc:	e1a04000 	mov	r4, r0
-    4a00:	e1a00005 	mov	r0, r5
-    4a04:	eb003e46 	bl	14324 <__aeabi_fmul>
-    4a08:	e1a01000 	mov	r1, r0
-    4a0c:	e1a00004 	mov	r0, r4
-    4a10:	eb003d9b 	bl	14084 <__addsf3>
-    4a14:	e1a01005 	mov	r1, r5
-    4a18:	e58d0050 	str	r0, [sp, #80]
-    4a1c:	e59d003c 	ldr	r0, [sp, #60]
-    4a20:	eb003e3f 	bl	14324 <__aeabi_fmul>
-    4a24:	e59d1040 	ldr	r1, [sp, #64]
-    4a28:	e1a04000 	mov	r4, r0
-    4a2c:	e1a00006 	mov	r0, r6
-    4a30:	eb003e3b 	bl	14324 <__aeabi_fmul>
-    4a34:	e1a01000 	mov	r1, r0
-    4a38:	e1a00004 	mov	r0, r4
-    4a3c:	eb003d8f 	bl	14080 <__aeabi_fsub>
-    4a40:	e59fa834 	ldr	sl, [pc, #2100]	; 527c <.text+0x527c>
-    4a44:	e58d0054 	str	r0, [sp, #84]
-    4a48:	e59fb810 	ldr	fp, [pc, #2064]	; 5260 <.text+0x5260>
-    4a4c:	e5da3015 	ldrb	r3, [sl, #21]
-    4a50:	e5da2014 	ldrb	r2, [sl, #20]
-    4a54:	e5dbc001 	ldrb	ip, [fp, #1]
-    4a58:	e5dae016 	ldrb	lr, [sl, #22]
-    4a5c:	e1a01000 	mov	r1, r0
-    4a60:	e59d0048 	ldr	r0, [sp, #72]
-    4a64:	e58dc044 	str	ip, [sp, #68]
-    4a68:	e1822403 	orr	r2, r2, r3, lsl #8
-    4a6c:	e59dc04c 	ldr	ip, [sp, #76]
-    4a70:	e182e80e 	orr	lr, r2, lr, lsl #16
-    4a74:	e1a02c20 	mov	r2, r0, lsr #24
-    4a78:	e5da9017 	ldrb	r9, [sl, #23]
-    4a7c:	e58de004 	str	lr, [sp, #4]
-    4a80:	e58d2010 	str	r2, [sp, #16]
-    4a84:	e1a0282c 	mov	r2, ip, lsr #16
-    4a88:	e58d200c 	str	r2, [sp, #12]
-    4a8c:	e59d2004 	ldr	r2, [sp, #4]
-    4a90:	e59d3050 	ldr	r3, [sp, #80]
-    4a94:	e59d5044 	ldr	r5, [sp, #68]
-    4a98:	e1a0ec21 	mov	lr, r1, lsr #24
-    4a9c:	e1a04c2c 	mov	r4, ip, lsr #24
-    4aa0:	e1829c09 	orr	r9, r2, r9, lsl #24
-    4aa4:	e59f27d8 	ldr	r2, [pc, #2008]	; 5284 <.text+0x5284>
-    4aa8:	e58de018 	str	lr, [sp, #24]
-    4aac:	e58d4008 	str	r4, [sp, #8]
-    4ab0:	e1a06821 	mov	r6, r1, lsr #16
-    4ab4:	e1a04823 	mov	r4, r3, lsr #16
-    4ab8:	e1a0a820 	mov	sl, r0, lsr #16
-    4abc:	e1a08c23 	mov	r8, r3, lsr #24
-    4ac0:	e3550002 	cmp	r5, #2	; 0x2
-    4ac4:	e1a0e423 	mov	lr, r3, lsr #8
-    4ac8:	e1a05421 	mov	r5, r1, lsr #8
-    4acc:	e58da014 	str	sl, [sp, #20]
-    4ad0:	e58d9058 	str	r9, [sp, #88]
-    4ad4:	e5c2e02f 	strb	lr, [r2, #47]
-    4ad8:	e5c24030 	strb	r4, [r2, #48]
-    4adc:	e5c28031 	strb	r8, [r2, #49]
-    4ae0:	e5c25033 	strb	r5, [r2, #51]
-    4ae4:	e5c26034 	strb	r6, [r2, #52]
-    4ae8:	e59d4018 	ldr	r4, [sp, #24]
-    4aec:	e1a07420 	mov	r7, r0, lsr #8
-    4af0:	e5c24035 	strb	r4, [r2, #53]
-    4af4:	e5c2703f 	strb	r7, [r2, #63]
-    4af8:	e59d5014 	ldr	r5, [sp, #20]
-    4afc:	e5c25040 	strb	r5, [r2, #64]
-    4b00:	e59d6010 	ldr	r6, [sp, #16]
-    4b04:	e1a0a42c 	mov	sl, ip, lsr #8
-    4b08:	e5c2a043 	strb	sl, [r2, #67]
-    4b0c:	e5c26041 	strb	r6, [r2, #65]
-    4b10:	e59d700c 	ldr	r7, [sp, #12]
-    4b14:	e5c27044 	strb	r7, [r2, #68]
-    4b18:	e59da008 	ldr	sl, [sp, #8]
-    4b1c:	e5c2302e 	strb	r3, [r2, #46]
-    4b20:	e5c2a045 	strb	sl, [r2, #69]
-    4b24:	e5c21032 	strb	r1, [r2, #50]
-    4b28:	e5c2003e 	strb	r0, [r2, #62]
-    4b2c:	e5c2c042 	strb	ip, [r2, #66]
-    4b30:	0a0000b6 	beq	4e10 <processCtrl+0x7d0>
-    4b34:	e59dc044 	ldr	ip, [sp, #68]
-    4b38:	e35c0003 	cmp	ip, #3	; 0x3
-    4b3c:	0a00017b 	beq	5130 <processCtrl+0xaf0>
-    4b40:	e59d7044 	ldr	r7, [sp, #68]
-    4b44:	e3570001 	cmp	r7, #1	; 0x1
-    4b48:	0a00009a 	beq	4db8 <processCtrl+0x778>
-    4b4c:	e59da044 	ldr	sl, [sp, #68]
-    4b50:	e35a0000 	cmp	sl, #0	; 0x0
-    4b54:	059f9708 	ldreq	r9, [pc, #1800]	; 5264 <.text+0x5264>
-    4b58:	03a03000 	moveq	r3, #0	; 0x0
-    4b5c:	059f6724 	ldreq	r6, [pc, #1828]	; 5288 <.text+0x5288>
-    4b60:	05893004 	streq	r3, [r9, #4]
-    4b64:	159f671c 	ldrne	r6, [pc, #1820]	; 5288 <.text+0x5288>
-    4b68:	159f96f4 	ldrne	r9, [pc, #1780]	; 5264 <.text+0x5264>
-    4b6c:	e5963018 	ldr	r3, [r6, #24]
-    4b70:	e5dbc000 	ldrb	ip, [fp]
-    4b74:	e59fe708 	ldr	lr, [pc, #1800]	; 5284 <.text+0x5284>
-    4b78:	e1a00c23 	mov	r0, r3, lsr #24
-    4b7c:	e1a02423 	mov	r2, r3, lsr #8
-    4b80:	e1a01823 	mov	r1, r3, lsr #16
-    4b84:	e35c0002 	cmp	ip, #2	; 0x2
-    4b88:	e5ce205b 	strb	r2, [lr, #91]
-    4b8c:	e5ce105c 	strb	r1, [lr, #92]
-    4b90:	e5ce005d 	strb	r0, [lr, #93]
-    4b94:	e5ce305a 	strb	r3, [lr, #90]
-    4b98:	e1a0600e 	mov	r6, lr
-    4b9c:	0a000106 	beq	4fbc <processCtrl+0x97c>
-    4ba0:	e35c0003 	cmp	ip, #3	; 0x3
-    4ba4:	0a000144 	beq	50bc <processCtrl+0xa7c>
-    4ba8:	e35c0001 	cmp	ip, #1	; 0x1
-    4bac:	0a000076 	beq	4d8c <processCtrl+0x74c>
-    4bb0:	e35c0000 	cmp	ip, #0	; 0x0
-    4bb4:	03a03000 	moveq	r3, #0	; 0x0
-    4bb8:	059f76cc 	ldreq	r7, [pc, #1740]	; 528c <.text+0x528c>
-    4bbc:	05893000 	streq	r3, [r9]
-    4bc0:	159f76c4 	ldrne	r7, [pc, #1732]	; 528c <.text+0x528c>
-    4bc4:	e5dbc003 	ldrb	ip, [fp, #3]
-    4bc8:	e5973018 	ldr	r3, [r7, #24]
-    4bcc:	e59f46b0 	ldr	r4, [pc, #1712]	; 5284 <.text+0x5284>
-    4bd0:	e35c0000 	cmp	ip, #0	; 0x0
-    4bd4:	e1a00c23 	mov	r0, r3, lsr #24
-    4bd8:	e1a02423 	mov	r2, r3, lsr #8
-    4bdc:	e1a01823 	mov	r1, r3, lsr #16
-    4be0:	e5c4305e 	strb	r3, [r4, #94]
-    4be4:	03a03000 	moveq	r3, #0	; 0x0
-    4be8:	e5c4205f 	strb	r2, [r4, #95]
-    4bec:	e5c41060 	strb	r1, [r4, #96]
-    4bf0:	e5c40061 	strb	r0, [r4, #97]
-    4bf4:	0589300c 	streq	r3, [r9, #12]
-    4bf8:	0a00003b 	beq	4cec <processCtrl+0x6ac>
-    4bfc:	e35c0002 	cmp	ip, #2	; 0x2
-    4c00:	e599800c 	ldr	r8, [r9, #12]
-    4c04:	0a000167 	beq	51a8 <processCtrl+0xb68>
-    4c08:	e35c0003 	cmp	ip, #3	; 0x3
-    4c0c:	0a000181 	beq	5218 <processCtrl+0xbd8>
-    4c10:	e35c0001 	cmp	ip, #1	; 0x1
-    4c14:	0a000049 	beq	4d40 <processCtrl+0x700>
-    4c18:	e599700c 	ldr	r7, [r9, #12]
-    4c1c:	e1a00008 	mov	r0, r8
-    4c20:	e1a01007 	mov	r1, r7
-    4c24:	eb003d15 	bl	14080 <__aeabi_fsub>
-    4c28:	eb003b2c 	bl	138e0 <__aeabi_f2d>
-    4c2c:	e5db2021 	ldrb	r2, [fp, #33]
-    4c30:	e5db3020 	ldrb	r3, [fp, #32]
-    4c34:	e1a05000 	mov	r5, r0
-    4c38:	e5db0022 	ldrb	r0, [fp, #34]
-    4c3c:	e1833402 	orr	r3, r3, r2, lsl #8
-    4c40:	e1a06001 	mov	r6, r1
-    4c44:	e5db1023 	ldrb	r1, [fp, #35]
-    4c48:	e1833800 	orr	r3, r3, r0, lsl #16
-    4c4c:	e1834c01 	orr	r4, r3, r1, lsl #24
-    4c50:	e1a00004 	mov	r0, r4
-    4c54:	eb003b21 	bl	138e0 <__aeabi_f2d>
-    4c58:	e1a02000 	mov	r2, r0
-    4c5c:	e1a03001 	mov	r3, r1
-    4c60:	e1a00005 	mov	r0, r5
-    4c64:	e1a01006 	mov	r1, r6
-    4c68:	eb003c73 	bl	13e3c <__gedf2>
-    4c6c:	e3500000 	cmp	r0, #0	; 0x0
-    4c70:	e59fa5ec 	ldr	sl, [pc, #1516]	; 5264 <.text+0x5264>
-    4c74:	ca00000e 	bgt	4cb4 <processCtrl+0x674>
-    4c78:	e2840102 	add	r0, r4, #-2147483648	; 0x80000000
-    4c7c:	eb003b17 	bl	138e0 <__aeabi_f2d>
-    4c80:	e1a02000 	mov	r2, r0
-    4c84:	e1a03001 	mov	r3, r1
-    4c88:	e1a00005 	mov	r0, r5
-    4c8c:	e1a01006 	mov	r1, r6
-    4c90:	eb003c6b 	bl	13e44 <__ledf2>
-    4c94:	e3500000 	cmp	r0, #0	; 0x0
-    4c98:	a58a800c 	strge	r8, [sl, #12]
-    4c9c:	aa000008 	bge	4cc4 <processCtrl+0x684>
-    4ca0:	e1a00007 	mov	r0, r7
-    4ca4:	e1a01004 	mov	r1, r4
-    4ca8:	eb003cf4 	bl	14080 <__aeabi_fsub>
-    4cac:	e58a000c 	str	r0, [sl, #12]
-    4cb0:	ea000003 	b	4cc4 <processCtrl+0x684>
-    4cb4:	e1a00007 	mov	r0, r7
-    4cb8:	e1a01004 	mov	r1, r4
-    4cbc:	eb003cf0 	bl	14084 <__addsf3>
-    4cc0:	e58a000c 	str	r0, [sl, #12]
-    4cc4:	e59fc5c4 	ldr	ip, [pc, #1476]	; 5290 <.text+0x5290>
-    4cc8:	e59c3018 	ldr	r3, [ip, #24]
-    4ccc:	e59fe5b0 	ldr	lr, [pc, #1456]	; 5284 <.text+0x5284>
-    4cd0:	e1a00c23 	mov	r0, r3, lsr #24
-    4cd4:	e1a02423 	mov	r2, r3, lsr #8
-    4cd8:	e1a01823 	mov	r1, r3, lsr #16
-    4cdc:	e5ce2067 	strb	r2, [lr, #103]
-    4ce0:	e5ce1068 	strb	r1, [lr, #104]
-    4ce4:	e5ce0069 	strb	r0, [lr, #105]
-    4ce8:	e5ce3066 	strb	r3, [lr, #102]
-    4cec:	e5db3002 	ldrb	r3, [fp, #2]
-    4cf0:	e3530002 	cmp	r3, #2	; 0x2
-    4cf4:	159f5598 	ldrne	r5, [pc, #1432]	; 5294 <.text+0x5294>
-    4cf8:	0a000085 	beq	4f14 <processCtrl+0x8d4>
-    4cfc:	e3530003 	cmp	r3, #3	; 0x3
-    4d00:	0a000017 	beq	4d64 <processCtrl+0x724>
-    4d04:	e3530001 	cmp	r3, #1	; 0x1
-    4d08:	0a000036 	beq	4de8 <processCtrl+0x7a8>
-    4d0c:	e3530000 	cmp	r3, #0	; 0x0
-    4d10:	03a03000 	moveq	r3, #0	; 0x0
-    4d14:	05893008 	streq	r3, [r9, #8]
-    4d18:	e5953018 	ldr	r3, [r5, #24]
-    4d1c:	e59fa560 	ldr	sl, [pc, #1376]	; 5284 <.text+0x5284>
-    4d20:	e1a02c23 	mov	r2, r3, lsr #24
-    4d24:	e1a01423 	mov	r1, r3, lsr #8
-    4d28:	e1a00823 	mov	r0, r3, lsr #16
-    4d2c:	e5ca2065 	strb	r2, [sl, #101]
-    4d30:	e5ca1063 	strb	r1, [sl, #99]
-    4d34:	e5ca0064 	strb	r0, [sl, #100]
-    4d38:	e5ca3062 	strb	r3, [sl, #98]
-    4d3c:	eafffe4c 	b	4674 <processCtrl+0x34>
-    4d40:	e59f3550 	ldr	r3, [pc, #1360]	; 5298 <.text+0x5298>
-    4d44:	e5d3200c 	ldrb	r2, [r3, #12]
-    4d48:	e5d3100d 	ldrb	r1, [r3, #13]
-    4d4c:	e5d3000e 	ldrb	r0, [r3, #14]
-    4d50:	e1822401 	orr	r2, r2, r1, lsl #8
-    4d54:	e5d3c00f 	ldrb	ip, [r3, #15]
-    4d58:	e1822800 	orr	r2, r2, r0, lsl #16
-    4d5c:	e1828c0c 	orr	r8, r2, ip, lsl #24
-    4d60:	eaffffac 	b	4c18 <processCtrl+0x5d8>
-    4d64:	e59f3530 	ldr	r3, [pc, #1328]	; 529c <.text+0x529c>
-    4d68:	e5d3200c 	ldrb	r2, [r3, #12]
-    4d6c:	e5d3100d 	ldrb	r1, [r3, #13]
-    4d70:	e5d3c00e 	ldrb	ip, [r3, #14]
-    4d74:	e5d3000f 	ldrb	r0, [r3, #15]
-    4d78:	e1822401 	orr	r2, r2, r1, lsl #8
-    4d7c:	e182280c 	orr	r2, r2, ip, lsl #16
-    4d80:	e1823c00 	orr	r3, r2, r0, lsl #24
-    4d84:	e5893008 	str	r3, [r9, #8]
-    4d88:	eaffffe2 	b	4d18 <processCtrl+0x6d8>
-    4d8c:	e59f3504 	ldr	r3, [pc, #1284]	; 5298 <.text+0x5298>
-    4d90:	e5d32000 	ldrb	r2, [r3]
-    4d94:	e5d31001 	ldrb	r1, [r3, #1]
-    4d98:	e5d30002 	ldrb	r0, [r3, #2]
-    4d9c:	e5d3c003 	ldrb	ip, [r3, #3]
-    4da0:	e1822401 	orr	r2, r2, r1, lsl #8
-    4da4:	e1822800 	orr	r2, r2, r0, lsl #16
-    4da8:	e59f74dc 	ldr	r7, [pc, #1244]	; 528c <.text+0x528c>
-    4dac:	e1823c0c 	orr	r3, r2, ip, lsl #24
-    4db0:	e5893000 	str	r3, [r9]
-    4db4:	eaffff82 	b	4bc4 <processCtrl+0x584>
-    4db8:	e59f34d8 	ldr	r3, [pc, #1240]	; 5298 <.text+0x5298>
-    4dbc:	e5d32004 	ldrb	r2, [r3, #4]
-    4dc0:	e5d31005 	ldrb	r1, [r3, #5]
-    4dc4:	e5d30006 	ldrb	r0, [r3, #6]
-    4dc8:	e5d3c007 	ldrb	ip, [r3, #7]
-    4dcc:	e1822401 	orr	r2, r2, r1, lsl #8
-    4dd0:	e1822800 	orr	r2, r2, r0, lsl #16
-    4dd4:	e59f9488 	ldr	r9, [pc, #1160]	; 5264 <.text+0x5264>
-    4dd8:	e59f64a8 	ldr	r6, [pc, #1192]	; 5288 <.text+0x5288>
-    4ddc:	e1823c0c 	orr	r3, r2, ip, lsl #24
-    4de0:	e5893004 	str	r3, [r9, #4]
-    4de4:	eaffff60 	b	4b6c <processCtrl+0x52c>
-    4de8:	e59f34a8 	ldr	r3, [pc, #1192]	; 5298 <.text+0x5298>
-    4dec:	e5d32008 	ldrb	r2, [r3, #8]
-    4df0:	e5d31009 	ldrb	r1, [r3, #9]
-    4df4:	e5d3c00a 	ldrb	ip, [r3, #10]
-    4df8:	e5d3000b 	ldrb	r0, [r3, #11]
-    4dfc:	e1822401 	orr	r2, r2, r1, lsl #8
-    4e00:	e182280c 	orr	r2, r2, ip, lsl #16
-    4e04:	e1823c00 	orr	r3, r2, r0, lsl #24
-    4e08:	e5893008 	str	r3, [r9, #8]
-    4e0c:	eaffffc1 	b	4d18 <processCtrl+0x6d8>
-    4e10:	e59f4488 	ldr	r4, [pc, #1160]	; 52a0 <.text+0x52a0>
-    4e14:	e59fc460 	ldr	ip, [pc, #1120]	; 527c <.text+0x527c>
-    4e18:	e59f545c 	ldr	r5, [pc, #1116]	; 527c <.text+0x527c>
-    4e1c:	e5d43001 	ldrb	r3, [r4, #1]
-    4e20:	e5dc2001 	ldrb	r2, [ip, #1]
-    4e24:	e5dc1000 	ldrb	r1, [ip]
-    4e28:	e5d40000 	ldrb	r0, [r4]
-    4e2c:	e5d4c002 	ldrb	ip, [r4, #2]
-    4e30:	e5d5e002 	ldrb	lr, [r5, #2]
-    4e34:	e1800403 	orr	r0, r0, r3, lsl #8
-    4e38:	e1811402 	orr	r1, r1, r2, lsl #8
-    4e3c:	e5d43003 	ldrb	r3, [r4, #3]
-    4e40:	e5d52003 	ldrb	r2, [r5, #3]
-    4e44:	e180080c 	orr	r0, r0, ip, lsl #16
-    4e48:	e181180e 	orr	r1, r1, lr, lsl #16
-    4e4c:	e1811c02 	orr	r1, r1, r2, lsl #24
-    4e50:	e1800c03 	orr	r0, r0, r3, lsl #24
-    4e54:	eb003c89 	bl	14080 <__aeabi_fsub>
-    4e58:	e1a01000 	mov	r1, r0
-    4e5c:	e59d003c 	ldr	r0, [sp, #60]
-    4e60:	eb003d2f 	bl	14324 <__aeabi_fmul>
-    4e64:	e59f6410 	ldr	r6, [pc, #1040]	; 527c <.text+0x527c>
-    4e68:	e5d42005 	ldrb	r2, [r4, #5]
-    4e6c:	e5d63005 	ldrb	r3, [r6, #5]
-    4e70:	e5d61004 	ldrb	r1, [r6, #4]
-    4e74:	e1a05000 	mov	r5, r0
-    4e78:	e5d40004 	ldrb	r0, [r4, #4]
-    4e7c:	e5d4c006 	ldrb	ip, [r4, #6]
-    4e80:	e5d6e006 	ldrb	lr, [r6, #6]
-    4e84:	e1800402 	orr	r0, r0, r2, lsl #8
-    4e88:	e1811403 	orr	r1, r1, r3, lsl #8
-    4e8c:	e5d42007 	ldrb	r2, [r4, #7]
-    4e90:	e5d63007 	ldrb	r3, [r6, #7]
-    4e94:	e180080c 	orr	r0, r0, ip, lsl #16
-    4e98:	e181180e 	orr	r1, r1, lr, lsl #16
-    4e9c:	e1811c03 	orr	r1, r1, r3, lsl #24
-    4ea0:	e1800c02 	orr	r0, r0, r2, lsl #24
-    4ea4:	eb003c75 	bl	14080 <__aeabi_fsub>
-    4ea8:	e1a01000 	mov	r1, r0
-    4eac:	e59d0040 	ldr	r0, [sp, #64]
-    4eb0:	eb003d1b 	bl	14324 <__aeabi_fmul>
-    4eb4:	e1a01000 	mov	r1, r0
-    4eb8:	e1a00005 	mov	r0, r5
-    4ebc:	eb003c70 	bl	14084 <__addsf3>
-    4ec0:	e59f63c0 	ldr	r6, [pc, #960]	; 5288 <.text+0x5288>
-    4ec4:	e59d7050 	ldr	r7, [sp, #80]
-    4ec8:	e1a04000 	mov	r4, r0
-    4ecc:	e59fc3d0 	ldr	ip, [pc, #976]	; 52a4 <.text+0x52a4>
-    4ed0:	e5963010 	ldr	r3, [r6, #16]
-    4ed4:	e2872102 	add	r2, r7, #-2147483648	; 0x80000000
-    4ed8:	e1a01004 	mov	r1, r4
-    4edc:	e1a00006 	mov	r0, r6
-    4ee0:	e58dc000 	str	ip, [sp]
-    4ee4:	ebfffd80 	bl	44ec <pidCalc>
-    4ee8:	e59fa394 	ldr	sl, [pc, #916]	; 5284 <.text+0x5284>
-    4eec:	e59f9370 	ldr	r9, [pc, #880]	; 5264 <.text+0x5264>
-    4ef0:	e1a0cc24 	mov	ip, r4, lsr #24
-    4ef4:	e1a02424 	mov	r2, r4, lsr #8
-    4ef8:	e1a01824 	mov	r1, r4, lsr #16
-    4efc:	e5890004 	str	r0, [r9, #4]
-    4f00:	e5ca206b 	strb	r2, [sl, #107]
-    4f04:	e5ca106c 	strb	r1, [sl, #108]
-    4f08:	e5cac06d 	strb	ip, [sl, #109]
-    4f0c:	e5ca406a 	strb	r4, [sl, #106]
-    4f10:	eaffff15 	b	4b6c <processCtrl+0x52c>
-    4f14:	e59f3384 	ldr	r3, [pc, #900]	; 52a0 <.text+0x52a0>
-    4f18:	e59f035c 	ldr	r0, [pc, #860]	; 527c <.text+0x527c>
-    4f1c:	e59f4358 	ldr	r4, [pc, #856]	; 527c <.text+0x527c>
-    4f20:	e5d3200c 	ldrb	r2, [r3, #12]
-    4f24:	e5d01020 	ldrb	r1, [r0, #32]
-    4f28:	e5d3000d 	ldrb	r0, [r3, #13]
-    4f2c:	e5d3e00e 	ldrb	lr, [r3, #14]
-    4f30:	e5d4c021 	ldrb	ip, [r4, #33]
-    4f34:	e59f5340 	ldr	r5, [pc, #832]	; 527c <.text+0x527c>
-    4f38:	e5d44022 	ldrb	r4, [r4, #34]
-    4f3c:	e1822400 	orr	r2, r2, r0, lsl #8
-    4f40:	e59f7320 	ldr	r7, [pc, #800]	; 5268 <.text+0x5268>
-    4f44:	e5d3000f 	ldrb	r0, [r3, #15]
-    4f48:	e182280e 	orr	r2, r2, lr, lsl #16
-    4f4c:	e181140c 	orr	r1, r1, ip, lsl #8
-    4f50:	e5d5c023 	ldrb	ip, [r5, #35]
-    4f54:	e1811804 	orr	r1, r1, r4, lsl #16
-    4f58:	e1825c00 	orr	r5, r2, r0, lsl #24
-    4f5c:	e1d700fc 	ldrsh	r0, [r7, #12]
-    4f60:	e1816c0c 	orr	r6, r1, ip, lsl #24
-    4f64:	ebfffa5e 	bl	38e4 <LLToSIAngleRateYaw>
-    4f68:	e1a01006 	mov	r1, r6
-    4f6c:	e1a04000 	mov	r4, r0
-    4f70:	e1a00005 	mov	r0, r5
-    4f74:	eb003c41 	bl	14080 <__aeabi_fsub>
-    4f78:	e28d3060 	add	r3, sp, #96	; 0x60
-    4f7c:	e5230004 	str	r0, [r3, #-4]!
-    4f80:	e59f530c 	ldr	r5, [pc, #780]	; 5294 <.text+0x5294>
-    4f84:	e1a00003 	mov	r0, r3
-    4f88:	eb000768 	bl	6d30 <normalizeSIAnglePi>
-    4f8c:	e2844102 	add	r4, r4, #-2147483648	; 0x80000000
-    4f90:	e59fc30c 	ldr	ip, [pc, #780]	; 52a4 <.text+0x52a4>
-    4f94:	e3a035fe 	mov	r3, #1065353216	; 0x3f800000
-    4f98:	e59d105c 	ldr	r1, [sp, #92]
-    4f9c:	e1a02004 	mov	r2, r4
-    4fa0:	e1a00005 	mov	r0, r5
-    4fa4:	e58dc000 	str	ip, [sp]
-    4fa8:	ebfffd4f 	bl	44ec <pidCalc>
-    4fac:	e59f32ac 	ldr	r3, [pc, #684]	; 5260 <.text+0x5260>
-    4fb0:	e5d33002 	ldrb	r3, [r3, #2]
-    4fb4:	e5890008 	str	r0, [r9, #8]
-    4fb8:	eaffff4f 	b	4cfc <processCtrl+0x6bc>
-    4fbc:	e59f42dc 	ldr	r4, [pc, #732]	; 52a0 <.text+0x52a0>
-    4fc0:	e59f02b4 	ldr	r0, [pc, #692]	; 527c <.text+0x527c>
-    4fc4:	e59f52b0 	ldr	r5, [pc, #688]	; 527c <.text+0x527c>
-    4fc8:	e59f72ac 	ldr	r7, [pc, #684]	; 527c <.text+0x527c>
-    4fcc:	e5d52005 	ldrb	r2, [r5, #5]
-    4fd0:	e5d43005 	ldrb	r3, [r4, #5]
-    4fd4:	e5d01004 	ldrb	r1, [r0, #4]
-    4fd8:	e5d40004 	ldrb	r0, [r4, #4]
-    4fdc:	e5d4e006 	ldrb	lr, [r4, #6]
-    4fe0:	e5d55006 	ldrb	r5, [r5, #6]
-    4fe4:	e5d4c007 	ldrb	ip, [r4, #7]
-    4fe8:	e1811402 	orr	r1, r1, r2, lsl #8
-    4fec:	e1800403 	orr	r0, r0, r3, lsl #8
-    4ff0:	e5d73007 	ldrb	r3, [r7, #7]
-    4ff4:	e180080e 	orr	r0, r0, lr, lsl #16
-    4ff8:	e1811805 	orr	r1, r1, r5, lsl #16
-    4ffc:	e59fa274 	ldr	sl, [pc, #628]	; 5278 <.text+0x5278>
-    5000:	e1811c03 	orr	r1, r1, r3, lsl #24
-    5004:	e1800c0c 	orr	r0, r0, ip, lsl #24
-    5008:	eb003c1c 	bl	14080 <__aeabi_fsub>
-    500c:	e59a1000 	ldr	r1, [sl]
-    5010:	eb003cc3 	bl	14324 <__aeabi_fmul>
-    5014:	e5d42001 	ldrb	r2, [r4, #1]
-    5018:	e5d73001 	ldrb	r3, [r7, #1]
-    501c:	e5d71000 	ldrb	r1, [r7]
-    5020:	e1a05000 	mov	r5, r0
-    5024:	e5d40000 	ldrb	r0, [r4]
-    5028:	e5d7e002 	ldrb	lr, [r7, #2]
-    502c:	e5d4c002 	ldrb	ip, [r4, #2]
-    5030:	e1800402 	orr	r0, r0, r2, lsl #8
-    5034:	e1811403 	orr	r1, r1, r3, lsl #8
-    5038:	e5d42003 	ldrb	r2, [r4, #3]
-    503c:	e5d73003 	ldrb	r3, [r7, #3]
-    5040:	e181180e 	orr	r1, r1, lr, lsl #16
-    5044:	e180080c 	orr	r0, r0, ip, lsl #16
-    5048:	e1811c03 	orr	r1, r1, r3, lsl #24
-    504c:	e1800c02 	orr	r0, r0, r2, lsl #24
-    5050:	eb003c0a 	bl	14080 <__aeabi_fsub>
-    5054:	e59fc224 	ldr	ip, [pc, #548]	; 5280 <.text+0x5280>
-    5058:	e59c1000 	ldr	r1, [ip]
-    505c:	eb003cb0 	bl	14324 <__aeabi_fmul>
-    5060:	e1a01000 	mov	r1, r0
-    5064:	e1a00005 	mov	r0, r5
-    5068:	eb003c04 	bl	14080 <__aeabi_fsub>
-    506c:	e59f7218 	ldr	r7, [pc, #536]	; 528c <.text+0x528c>
-    5070:	e59de054 	ldr	lr, [sp, #84]
-    5074:	e1a04000 	mov	r4, r0
-    5078:	e59fc224 	ldr	ip, [pc, #548]	; 52a4 <.text+0x52a4>
-    507c:	e5973010 	ldr	r3, [r7, #16]
-    5080:	e28e2102 	add	r2, lr, #-2147483648	; 0x80000000
-    5084:	e1a01004 	mov	r1, r4
-    5088:	e1a00007 	mov	r0, r7
-    508c:	e58dc000 	str	ip, [sp]
-    5090:	ebfffd15 	bl	44ec <pidCalc>
-    5094:	e1a02c24 	mov	r2, r4, lsr #24
-    5098:	e280c102 	add	ip, r0, #-2147483648	; 0x80000000
-    509c:	e1a01424 	mov	r1, r4, lsr #8
-    50a0:	e1a00824 	mov	r0, r4, lsr #16
-    50a4:	e5c62071 	strb	r2, [r6, #113]
-    50a8:	e589c000 	str	ip, [r9]
-    50ac:	e5c6106f 	strb	r1, [r6, #111]
-    50b0:	e5c60070 	strb	r0, [r6, #112]
-    50b4:	e5c6406e 	strb	r4, [r6, #110]
-    50b8:	eafffec1 	b	4bc4 <processCtrl+0x584>
-    50bc:	e59f31d8 	ldr	r3, [pc, #472]	; 529c <.text+0x529c>
-    50c0:	e5d32005 	ldrb	r2, [r3, #5]
-    50c4:	e5d30004 	ldrb	r0, [r3, #4]
-    50c8:	e5d3c006 	ldrb	ip, [r3, #6]
-    50cc:	e5d31007 	ldrb	r1, [r3, #7]
-    50d0:	e1800402 	orr	r0, r0, r2, lsl #8
-    50d4:	e180080c 	orr	r0, r0, ip, lsl #16
-    50d8:	e1800c01 	orr	r0, r0, r1, lsl #24
-    50dc:	e59d1054 	ldr	r1, [sp, #84]
-    50e0:	eb003be6 	bl	14080 <__aeabi_fsub>
-    50e4:	e1a01000 	mov	r1, r0
-    50e8:	e1a0c421 	mov	ip, r1, lsr #8
-    50ec:	e59d004c 	ldr	r0, [sp, #76]
-    50f0:	e5c6c03b 	strb	ip, [r6, #59]
-    50f4:	e59fc1a8 	ldr	ip, [pc, #424]	; 52a4 <.text+0x52a4>
-    50f8:	e1a05c21 	mov	r5, r1, lsr #24
-    50fc:	e1a0e821 	mov	lr, r1, lsr #16
-    5100:	e2802102 	add	r2, r0, #-2147483648	; 0x80000000
-    5104:	e3a035fe 	mov	r3, #1065353216	; 0x3f800000
-    5108:	e5c6503d 	strb	r5, [r6, #61]
-    510c:	e5c6e03c 	strb	lr, [r6, #60]
-    5110:	e59f0190 	ldr	r0, [pc, #400]	; 52a8 <.text+0x52a8>
-    5114:	e58dc000 	str	ip, [sp]
-    5118:	e5c6103a 	strb	r1, [r6, #58]
-    511c:	ebfffcf2 	bl	44ec <pidCalc>
-    5120:	e59f7164 	ldr	r7, [pc, #356]	; 528c <.text+0x528c>
-    5124:	e2803102 	add	r3, r0, #-2147483648	; 0x80000000
-    5128:	e5893000 	str	r3, [r9]
-    512c:	eafffea4 	b	4bc4 <processCtrl+0x584>
-    5130:	e59f3164 	ldr	r3, [pc, #356]	; 529c <.text+0x529c>
-    5134:	e5d32001 	ldrb	r2, [r3, #1]
-    5138:	e5d30000 	ldrb	r0, [r3]
-    513c:	e5d3c002 	ldrb	ip, [r3, #2]
-    5140:	e5d31003 	ldrb	r1, [r3, #3]
-    5144:	e1800402 	orr	r0, r0, r2, lsl #8
-    5148:	e180080c 	orr	r0, r0, ip, lsl #16
-    514c:	e1800c01 	orr	r0, r0, r1, lsl #24
-    5150:	e59d1050 	ldr	r1, [sp, #80]
-    5154:	eb003bc9 	bl	14080 <__aeabi_fsub>
-    5158:	e59f6124 	ldr	r6, [pc, #292]	; 5284 <.text+0x5284>
-    515c:	e59de048 	ldr	lr, [sp, #72]
-    5160:	e1a0c420 	mov	ip, r0, lsr #8
-    5164:	e5c6c037 	strb	ip, [r6, #55]
-    5168:	e59fc134 	ldr	ip, [pc, #308]	; 52a4 <.text+0x52a4>
-    516c:	e1a01000 	mov	r1, r0
-    5170:	e28e2102 	add	r2, lr, #-2147483648	; 0x80000000
-    5174:	e1a05c20 	mov	r5, r0, lsr #24
-    5178:	e1a0e820 	mov	lr, r0, lsr #16
-    517c:	e5c6e038 	strb	lr, [r6, #56]
-    5180:	e5c65039 	strb	r5, [r6, #57]
-    5184:	e59f0120 	ldr	r0, [pc, #288]	; 52ac <.text+0x52ac>
-    5188:	e58dc000 	str	ip, [sp]
-    518c:	e3a035fe 	mov	r3, #1065353216	; 0x3f800000
-    5190:	e5c61036 	strb	r1, [r6, #54]
-    5194:	ebfffcd4 	bl	44ec <pidCalc>
-    5198:	e59f90c4 	ldr	r9, [pc, #196]	; 5264 <.text+0x5264>
-    519c:	e59f60e4 	ldr	r6, [pc, #228]	; 5288 <.text+0x5288>
-    51a0:	e5890004 	str	r0, [r9, #4]
-    51a4:	eafffe70 	b	4b6c <processCtrl+0x52c>
-    51a8:	e59f30f0 	ldr	r3, [pc, #240]	; 52a0 <.text+0x52a0>
-    51ac:	e59f50c8 	ldr	r5, [pc, #200]	; 527c <.text+0x527c>
-    51b0:	e5d32009 	ldrb	r2, [r3, #9]
-    51b4:	e5d5c009 	ldrb	ip, [r5, #9]
-    51b8:	e5d51008 	ldrb	r1, [r5, #8]
-    51bc:	e5d30008 	ldrb	r0, [r3, #8]
-    51c0:	e59f60b4 	ldr	r6, [pc, #180]	; 527c <.text+0x527c>
-    51c4:	e5d3400a 	ldrb	r4, [r3, #10]
-    51c8:	e5d5500a 	ldrb	r5, [r5, #10]
-    51cc:	e1800402 	orr	r0, r0, r2, lsl #8
-    51d0:	e181140c 	orr	r1, r1, ip, lsl #8
-    51d4:	e5d6200b 	ldrb	r2, [r6, #11]
-    51d8:	e5d3e00b 	ldrb	lr, [r3, #11]
-    51dc:	e1800804 	orr	r0, r0, r4, lsl #16
-    51e0:	e1811805 	orr	r1, r1, r5, lsl #16
-    51e4:	e1811c02 	orr	r1, r1, r2, lsl #24
-    51e8:	e1800c0e 	orr	r0, r0, lr, lsl #24
-    51ec:	eb003ba3 	bl	14080 <__aeabi_fsub>
-    51f0:	e59d7058 	ldr	r7, [sp, #88]
-    51f4:	e1a01000 	mov	r1, r0
-    51f8:	e59f0090 	ldr	r0, [pc, #144]	; 5290 <.text+0x5290>
-    51fc:	e2872102 	add	r2, r7, #-2147483648	; 0x80000000
-    5200:	e59fc09c 	ldr	ip, [pc, #156]	; 52a4 <.text+0x52a4>
-    5204:	e3a035fe 	mov	r3, #1065353216	; 0x3f800000
-    5208:	e58dc000 	str	ip, [sp]
-    520c:	ebfffcb6 	bl	44ec <pidCalc>
-    5210:	e1a08000 	mov	r8, r0
-    5214:	eafffe7f 	b	4c18 <processCtrl+0x5d8>
-    5218:	e59f307c 	ldr	r3, [pc, #124]	; 529c <.text+0x529c>
-    521c:	e5d32009 	ldrb	r2, [r3, #9]
-    5220:	e5d30008 	ldrb	r0, [r3, #8]
-    5224:	e5d3c00a 	ldrb	ip, [r3, #10]
-    5228:	e5d3100b 	ldrb	r1, [r3, #11]
-    522c:	e1800402 	orr	r0, r0, r2, lsl #8
-    5230:	e180080c 	orr	r0, r0, ip, lsl #16
-    5234:	e1800c01 	orr	r0, r0, r1, lsl #24
-    5238:	e59d1058 	ldr	r1, [sp, #88]
-    523c:	eb003b8f 	bl	14080 <__aeabi_fsub>
-    5240:	e59fa028 	ldr	sl, [pc, #40]	; 5270 <.text+0x5270>
-    5244:	e59a3000 	ldr	r3, [sl]
-    5248:	e1a01000 	mov	r1, r0
-    524c:	e59f005c 	ldr	r0, [pc, #92]	; 52b0 <.text+0x52b0>
-    5250:	e2832102 	add	r2, r3, #-2147483648	; 0x80000000
-    5254:	eaffffe9 	b	5200 <processCtrl+0xbc0>
-    5258:	400011d0 	ldrmid	r1, [r0], -r0
-    525c:	40001038 	andmi	r1, r0, r8, lsr r0
-    5260:	4000103a 	andmi	r1, r0, sl, lsr r0
-    5264:	40001170 	andmi	r1, r0, r0, ror r1
-    5268:	40000b34 	andmi	r0, r0, r4, lsr fp
-    526c:	400012fc 	strmid	r1, [r0], -ip
-    5270:	400012f0 	strmid	r1, [r0], -r0
-    5274:	400012f4 	strmid	r1, [r0], -r4
-    5278:	40001300 	andmi	r1, r0, r0, lsl #6
-    527c:	40001194 	mulmi	r0, r4, r1
-    5280:	400012f8 	strmid	r1, [r0], -r8
-    5284:	40000efc 	strmid	r0, [r0], -ip
-    5288:	4000123c 	andmi	r1, r0, ip, lsr r2
-    528c:	400012a8 	andmi	r1, r0, r8, lsr #5
-    5290:	40001260 	andmi	r1, r0, r0, ror #4
-    5294:	40001218 	andmi	r1, r0, r8, lsl r2
-    5298:	400011d8 	ldrmid	r1, [r0], -r8
-    529c:	40001022 	andmi	r1, r0, r2, lsr #32
-    52a0:	40001070 	andmi	r1, r0, r0, ror r0
-    52a4:	3a83126f 	bcc	fe0c9c68 <VPBDIV+0x1decdb68>
-    52a8:	400011f4 	strmid	r1, [r0], -r4
-    52ac:	40001284 	andmi	r1, r0, r4, lsl #5
-    52b0:	400012cc 	andmi	r1, r0, ip, asr #5
-
-000052b4 <InitKalPos>:
-    52b4:	e3a03000 	mov	r3, #0	; 0x0
-    52b8:	e58030a8 	str	r3, [r0, #168]
-    52bc:	e52de004 	str	lr, [sp, #-4]!
-    52c0:	e1a01000 	mov	r1, r0
-    52c4:	e1a0e000 	mov	lr, r0
-    52c8:	e1a02000 	mov	r2, r0
-    52cc:	e3a0c000 	mov	ip, #0	; 0x0
-    52d0:	e35c0000 	cmp	ip, #0	; 0x0
-    52d4:	e3a03000 	mov	r3, #0	; 0x0
-    52d8:	e3a005fe 	mov	r0, #1065353216	; 0x3f800000
-    52dc:	0a000033 	beq	53b0 <InitKalPos+0xfc>
-    52e0:	e35c0001 	cmp	ip, #1	; 0x1
-    52e4:	e5823000 	str	r3, [r2]
-    52e8:	e5823060 	str	r3, [r2, #96]
-    52ec:	e5823040 	str	r3, [r2, #64]
-    52f0:	e5823030 	str	r3, [r2, #48]
-    52f4:	e5823010 	str	r3, [r2, #16]
-    52f8:	0a000025 	beq	5394 <InitKalPos+0xe0>
-    52fc:	e28cc001 	add	ip, ip, #1	; 0x1
-    5300:	e3a03000 	mov	r3, #0	; 0x0
-    5304:	e35c0002 	cmp	ip, #2	; 0x2
-    5308:	e5823004 	str	r3, [r2, #4]
-    530c:	e5823064 	str	r3, [r2, #100]
-    5310:	e5823044 	str	r3, [r2, #68]
-    5314:	e5823034 	str	r3, [r2, #52]
-    5318:	e5823014 	str	r3, [r2, #20]
-    531c:	e281100c 	add	r1, r1, #12	; 0xc
-    5320:	e2822008 	add	r2, r2, #8	; 0x8
-    5324:	1affffe9 	bne	52d0 <InitKalPos+0x1c>
-    5328:	e3a0c000 	mov	ip, #0	; 0x0
-    532c:	e1a0300e 	mov	r3, lr
-    5330:	e3a02000 	mov	r2, #0	; 0x0
-    5334:	e2822001 	add	r2, r2, #1	; 0x1
-    5338:	e3520002 	cmp	r2, #2	; 0x2
-    533c:	e583c080 	str	ip, [r3, #128]
-    5340:	e583c070 	str	ip, [r3, #112]
-    5344:	e583c020 	str	ip, [r3, #32]
-    5348:	e583c084 	str	ip, [r3, #132]
-    534c:	e583c074 	str	ip, [r3, #116]
-    5350:	e583c024 	str	ip, [r3, #36]
-    5354:	e2833008 	add	r3, r3, #8	; 0x8
-    5358:	1afffff5 	bne	5334 <InitKalPos+0x80>
-    535c:	e59e2090 	ldr	r2, [lr, #144]
-    5360:	e59e1094 	ldr	r1, [lr, #148]
-    5364:	e59e0098 	ldr	r0, [lr, #152]
-    5368:	e59e309c 	ldr	r3, [lr, #156]
-    536c:	e58ec0b8 	str	ip, [lr, #184]
-    5370:	e58e308c 	str	r3, [lr, #140]
-    5374:	e58e2070 	str	r2, [lr, #112]
-    5378:	e58e107c 	str	r1, [lr, #124]
-    537c:	e58e0080 	str	r0, [lr, #128]
-    5380:	e58ec0bc 	str	ip, [lr, #188]
-    5384:	e58ec0b4 	str	ip, [lr, #180]
-    5388:	e58ec0c0 	str	ip, [lr, #192]
-    538c:	e49de004 	ldr	lr, [sp], #4
-    5390:	e12fff1e 	bx	lr
-    5394:	e3a035fe 	mov	r3, #1065353216	; 0x3f800000
-    5398:	e5813000 	str	r3, [r1]
-    539c:	e5813060 	str	r3, [r1, #96]
-    53a0:	e5813040 	str	r3, [r1, #64]
-    53a4:	e5813030 	str	r3, [r1, #48]
-    53a8:	e5813010 	str	r3, [r1, #16]
-    53ac:	eaffffdd 	b	5328 <InitKalPos+0x74>
-    53b0:	e5810000 	str	r0, [r1]
-    53b4:	e5810060 	str	r0, [r1, #96]
-    53b8:	e5810040 	str	r0, [r1, #64]
-    53bc:	e5810030 	str	r0, [r1, #48]
-    53c0:	e5810010 	str	r0, [r1, #16]
-    53c4:	eaffffcc 	b	52fc <InitKalPos+0x48>
-
-000053c8 <InitKalYaw>:
-    53c8:	e5902014 	ldr	r2, [r0, #20]
-    53cc:	e5901018 	ldr	r1, [r0, #24]
-    53d0:	e3a03000 	mov	r3, #0	; 0x0
-    53d4:	e3a0c5fe 	mov	ip, #1065353216	; 0x3f800000
-    53d8:	e580301c 	str	r3, [r0, #28]
-    53dc:	e580200c 	str	r2, [r0, #12]
-    53e0:	e5801010 	str	r1, [r0, #16]
-    53e4:	e580c004 	str	ip, [r0, #4]
-    53e8:	e580c008 	str	ip, [r0, #8]
-    53ec:	e5803024 	str	r3, [r0, #36]
-    53f0:	e5803020 	str	r3, [r0, #32]
-    53f4:	e12fff1e 	bx	lr
-
-000053f8 <resetKalmanFilter>:
-    53f8:	e52de004 	str	lr, [sp, #-4]!
-    53fc:	e59f001c 	ldr	r0, [pc, #28]	; 5420 <.text+0x5420>
-    5400:	ebffffab 	bl	52b4 <InitKalPos>
-    5404:	e59f0018 	ldr	r0, [pc, #24]	; 5424 <.text+0x5424>
-    5408:	ebffffa9 	bl	52b4 <InitKalPos>
-    540c:	e59f0014 	ldr	r0, [pc, #20]	; 5428 <.text+0x5428>
-    5410:	ebffffa7 	bl	52b4 <InitKalPos>
-    5414:	e59f0010 	ldr	r0, [pc, #16]	; 542c <.text+0x542c>
-    5418:	e49de004 	ldr	lr, [sp], #4
-    541c:	eaffffe9 	b	53c8 <InitKalYaw>
-    5420:	40000d0c 	andmi	r0, r0, ip, lsl #26
-    5424:	40000bf4 	strmid	r0, [r0], -r4
-    5428:	40000dd0 	ldrmid	r0, [r0], -r0
-    542c:	40000bc8 	andmi	r0, r0, r8, asr #23
-
-00005430 <CorrectYaw>:
-    5430:	e92d4030 	stmdb	sp!, {r4, r5, lr}
-    5434:	e5905004 	ldr	r5, [r0, #4]
-    5438:	e24dd004 	sub	sp, sp, #4	; 0x4
-    543c:	e1a04000 	mov	r4, r0
-    5440:	e5901010 	ldr	r1, [r0, #16]
-    5444:	e1a00005 	mov	r0, r5
-    5448:	eb003b0d 	bl	14084 <__addsf3>
-    544c:	e1a01000 	mov	r1, r0
-    5450:	e1a00005 	mov	r0, r5
-    5454:	eb003c18 	bl	144bc <__aeabi_fdiv>
-    5458:	e5941020 	ldr	r1, [r4, #32]
-    545c:	e5840000 	str	r0, [r4]
-    5460:	e5940024 	ldr	r0, [r4, #36]
-    5464:	eb003b05 	bl	14080 <__aeabi_fsub>
-    5468:	e28d3004 	add	r3, sp, #4	; 0x4
-    546c:	e5230004 	str	r0, [r3, #-4]!
-    5470:	e1a0000d 	mov	r0, sp
-    5474:	eb00062d 	bl	6d30 <normalizeSIAnglePi>
-    5478:	e59d1000 	ldr	r1, [sp]
-    547c:	e5940000 	ldr	r0, [r4]
-    5480:	eb003ba7 	bl	14324 <__aeabi_fmul>
-    5484:	e1a01000 	mov	r1, r0
-    5488:	e5940020 	ldr	r0, [r4, #32]
-    548c:	eb003afc 	bl	14084 <__addsf3>
-    5490:	e5840020 	str	r0, [r4, #32]
-    5494:	e2840020 	add	r0, r4, #32	; 0x20
-    5498:	eb000600 	bl	6ca0 <normalizeSIAngle2Pi>
-    549c:	e5941000 	ldr	r1, [r4]
-    54a0:	e3a005fe 	mov	r0, #1065353216	; 0x3f800000
-    54a4:	eb003af5 	bl	14080 <__aeabi_fsub>
-    54a8:	e5941004 	ldr	r1, [r4, #4]
-    54ac:	eb003b9c 	bl	14324 <__aeabi_fmul>
-    54b0:	e5840008 	str	r0, [r4, #8]
-    54b4:	e28dd004 	add	sp, sp, #4	; 0x4
-    54b8:	e8bd4030 	ldmia	sp!, {r4, r5, lr}
-    54bc:	e12fff1e 	bx	lr
-
-000054c0 <PredictYaw>:
-    54c0:	e92d4010 	stmdb	sp!, {r4, lr}
-    54c4:	e1a04000 	mov	r4, r0
-    54c8:	e1a00001 	mov	r0, r1
-    54cc:	e594101c 	ldr	r1, [r4, #28]
-    54d0:	eb003b93 	bl	14324 <__aeabi_fmul>
-    54d4:	e1a01000 	mov	r1, r0
-    54d8:	e5940020 	ldr	r0, [r4, #32]
-    54dc:	eb003ae8 	bl	14084 <__addsf3>
-    54e0:	e5840020 	str	r0, [r4, #32]
-    54e4:	e2840020 	add	r0, r4, #32	; 0x20
-    54e8:	eb0005ec 	bl	6ca0 <normalizeSIAngle2Pi>
-    54ec:	e5940008 	ldr	r0, [r4, #8]
-    54f0:	e594100c 	ldr	r1, [r4, #12]
-    54f4:	eb003ae2 	bl	14084 <__addsf3>
-    54f8:	e5840004 	str	r0, [r4, #4]
-    54fc:	e8bd4010 	ldmia	sp!, {r4, lr}
-    5500:	e12fff1e 	bx	lr
-
-00005504 <CorrectPos>:
-    5504:	e92d41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
-    5508:	e1a04000 	mov	r4, r0
-    550c:	e24dd028 	sub	sp, sp, #40	; 0x28
-    5510:	e2808030 	add	r8, r0, #48	; 0x30
-    5514:	e1a0200d 	mov	r2, sp
-    5518:	e28d5010 	add	r5, sp, #16	; 0x10
-    551c:	e1a00008 	mov	r0, r8
-    5520:	e2841080 	add	r1, r4, #128	; 0x80
-    5524:	eb00029a 	bl	5f94 <addMatrix2>
-    5528:	e2846020 	add	r6, r4, #32	; 0x20
-    552c:	e1a0000d 	mov	r0, sp
-    5530:	e1a01005 	mov	r1, r5
-    5534:	eb0004ca 	bl	6864 <invert2>
-    5538:	e1a01005 	mov	r1, r5
-    553c:	e1a00008 	mov	r0, r8
-    5540:	e1a02006 	mov	r2, r6
-    5544:	e28450bc 	add	r5, r4, #188	; 0xbc
-    5548:	eb00038b 	bl	637c <multMatrix2>
-    554c:	e1a02005 	mov	r2, r5
-    5550:	e28400b4 	add	r0, r4, #180	; 0xb4
-    5554:	e28410ac 	add	r1, r4, #172	; 0xac
-    5558:	eb00032d 	bl	6214 <subVector2>
-    555c:	e28d2020 	add	r2, sp, #32	; 0x20
-    5560:	e1a00006 	mov	r0, r6
-    5564:	e1a01005 	mov	r1, r5
-    5568:	eb0003c9 	bl	6494 <multMatVec2>
-    556c:	e59d1020 	ldr	r1, [sp, #32]
-    5570:	e59400ac 	ldr	r0, [r4, #172]
-    5574:	eb003ac2 	bl	14084 <__addsf3>
-    5578:	e58400ac 	str	r0, [r4, #172]
-    557c:	e59d1024 	ldr	r1, [sp, #36]
-    5580:	e59400b0 	ldr	r0, [r4, #176]
-    5584:	eb003abe 	bl	14084 <__addsf3>
-    5588:	e1a01006 	mov	r1, r6
-    558c:	e58400b0 	str	r0, [r4, #176]
-    5590:	e1a0200d 	mov	r2, sp
-    5594:	e2840060 	add	r0, r4, #96	; 0x60
-    5598:	eb0002d4 	bl	60f0 <subMatrix2>
-    559c:	e1a0000d 	mov	r0, sp
-    55a0:	e1a01008 	mov	r1, r8
-    55a4:	e2842040 	add	r2, r4, #64	; 0x40
-    55a8:	e1a0700d 	mov	r7, sp
-    55ac:	eb000372 	bl	637c <multMatrix2>
-    55b0:	e28dd028 	add	sp, sp, #40	; 0x28
-    55b4:	e8bd41f0 	ldmia	sp!, {r4, r5, r6, r7, r8, lr}
-    55b8:	e12fff1e 	bx	lr
-
-000055bc <PredictPos>:
-    55bc:	e92d40f0 	stmdb	sp!, {r4, r5, r6, r7, lr}
-    55c0:	e1a04000 	mov	r4, r0
-    55c4:	e24dd030 	sub	sp, sp, #48	; 0x30
-    55c8:	e5841004 	str	r1, [r4, #4]
-    55cc:	e5841018 	str	r1, [r4, #24]
-    55d0:	e1a00001 	mov	r0, r1
-    55d4:	e1a05001 	mov	r5, r1
-    55d8:	eb003b51 	bl	14324 <__aeabi_fmul>
-    55dc:	e3a0143f 	mov	r1, #1056964608	; 0x3f000000
-    55e0:	eb003b4f 	bl	14324 <__aeabi_fmul>
-    55e4:	e28d7028 	add	r7, sp, #40	; 0x28
-    55e8:	e28460ac 	add	r6, r4, #172	; 0xac
-    55ec:	e58400a0 	str	r0, [r4, #160]
-    55f0:	e58450a4 	str	r5, [r4, #164]
-    55f4:	e28400a0 	add	r0, r4, #160	; 0xa0
-    55f8:	e28d5020 	add	r5, sp, #32	; 0x20
-    55fc:	e59410a8 	ldr	r1, [r4, #168]
-    5600:	e1a02007 	mov	r2, r7
-    5604:	eb000598 	bl	6c6c <VectmultSc2>
-    5608:	e1a00004 	mov	r0, r4
-    560c:	e1a01006 	mov	r1, r6
-    5610:	e1a02005 	mov	r2, r5
-    5614:	eb00039e 	bl	6494 <multMatVec2>
-    5618:	e1a00005 	mov	r0, r5
-    561c:	e1a01007 	mov	r1, r7
-    5620:	e1a02006 	mov	r2, r6
-    5624:	eb0002a3 	bl	60b8 <addVector2>
-    5628:	e28d6010 	add	r6, sp, #16	; 0x10
-    562c:	e1a00004 	mov	r0, r4
-    5630:	e2841040 	add	r1, r4, #64	; 0x40
-    5634:	e1a0200d 	mov	r2, sp
-    5638:	eb00034f 	bl	637c <multMatrix2>
-    563c:	e1a0000d 	mov	r0, sp
-    5640:	e2841010 	add	r1, r4, #16	; 0x10
-    5644:	e1a02006 	mov	r2, r6
-    5648:	eb00034b 	bl	637c <multMatrix2>
-    564c:	e1a01006 	mov	r1, r6
-    5650:	e2842030 	add	r2, r4, #48	; 0x30
-    5654:	e2840070 	add	r0, r4, #112	; 0x70
-    5658:	e1a0500d 	mov	r5, sp
-    565c:	eb00024c 	bl	5f94 <addMatrix2>
-    5660:	e28dd030 	add	sp, sp, #48	; 0x30
-    5664:	e8bd40f0 	ldmia	sp!, {r4, r5, r6, r7, lr}
-    5668:	e12fff1e 	bx	lr
-
-0000566c <KFilter>:
-    566c:	e92d4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
-    5670:	e59fa42c 	ldr	sl, [pc, #1068]	; 5aa4 <.text+0x5aa4>
-    5674:	e24dd098 	sub	sp, sp, #152	; 0x98
-    5678:	e1da04f0 	ldrsh	r0, [sl, #64]
-    567c:	ebfff7e2 	bl	360c <LLToSIClimb>
-    5680:	e59f1458 	ldr	r1, [pc, #1112]	; 5ae0 <.text+0x5ae0>
-    5684:	e58d0084 	str	r0, [sp, #132]
-    5688:	e5910000 	ldr	r0, [r1]
-    568c:	eb003893 	bl	138e0 <__aeabi_f2d>
-    5690:	e28f2ffd 	add	r2, pc, #1012	; 0x3f4
-    5694:	e892000c 	ldmia	r2, {r2, r3}
-    5698:	eb0038c0 	bl	139a0 <__aeabi_dmul>
-    569c:	e1a04000 	mov	r4, r0
-    56a0:	e59d0084 	ldr	r0, [sp, #132]
-    56a4:	e1a05001 	mov	r5, r1
-    56a8:	eb00388c 	bl	138e0 <__aeabi_f2d>
-    56ac:	e28f2e3e 	add	r2, pc, #992	; 0x3e0
-    56b0:	e892000c 	ldmia	r2, {r2, r3}
-    56b4:	eb0038b9 	bl	139a0 <__aeabi_dmul>
-    56b8:	e1a03001 	mov	r3, r1
-    56bc:	e1a02000 	mov	r2, r0
-    56c0:	e1a01005 	mov	r1, r5
-    56c4:	e1a00004 	mov	r0, r4
-    56c8:	eb0037ab 	bl	1357c <__adddf3>
-    56cc:	eb003a41 	bl	13fd8 <__aeabi_d2f>
-    56d0:	e59f2408 	ldr	r2, [pc, #1032]	; 5ae0 <.text+0x5ae0>
-    56d4:	e5820000 	str	r0, [r2]
-    56d8:	e1da00f4 	ldrsh	r0, [sl, #4]
-    56dc:	ebfff837 	bl	37c0 <LLToSIAngleRoll>
-    56e0:	e1a04000 	mov	r4, r0
-    56e4:	e1da00f2 	ldrsh	r0, [sl, #2]
-    56e8:	ebfff8ae 	bl	39a8 <LLToSIAnglePitch>
-    56ec:	e1a06000 	mov	r6, r0
-    56f0:	e1da00fc 	ldrsh	r0, [sl, #12]
-    56f4:	ebfff87a 	bl	38e4 <LLToSIAngleRateYaw>
-    56f8:	e59f23a8 	ldr	r2, [pc, #936]	; 5aa8 <.text+0x5aa8>
-    56fc:	e1d230b0 	ldrh	r3, [r2]
-    5700:	e3530001 	cmp	r3, #1	; 0x1
-    5704:	e58d0074 	str	r0, [sp, #116]
-    5708:	0a0001a8 	beq	5db0 <.text+0x5db0>
-    570c:	e1a00004 	mov	r0, r4
-    5710:	eb003872 	bl	138e0 <__aeabi_f2d>
-    5714:	e1a04000 	mov	r4, r0
-    5718:	e1a05001 	mov	r5, r1
-    571c:	eb003d3e 	bl	14c1c <__cos_from_arm>
-    5720:	eb003a2c 	bl	13fd8 <__aeabi_d2f>
-    5724:	e1a01005 	mov	r1, r5
-    5728:	e58d0088 	str	r0, [sp, #136]
-    572c:	e1a00004 	mov	r0, r4
-    5730:	eb003d36 	bl	14c10 <__sin_from_arm>
-    5734:	eb003a27 	bl	13fd8 <__aeabi_d2f>
-    5738:	e58d008c 	str	r0, [sp, #140]
-    573c:	e1a00006 	mov	r0, r6
-    5740:	eb003866 	bl	138e0 <__aeabi_f2d>
-    5744:	e1a04000 	mov	r4, r0
-    5748:	e1a05001 	mov	r5, r1
-    574c:	eb003d32 	bl	14c1c <__cos_from_arm>
-    5750:	eb003a20 	bl	13fd8 <__aeabi_d2f>
-    5754:	e1a01005 	mov	r1, r5
-    5758:	e58d0090 	str	r0, [sp, #144]
-    575c:	e1a00004 	mov	r0, r4
-    5760:	eb003d2a 	bl	14c10 <__sin_from_arm>
-    5764:	eb003a1b 	bl	13fd8 <__aeabi_d2f>
-    5768:	e59f433c 	ldr	r4, [pc, #828]	; 5aac <.text+0x5aac>
-    576c:	e5d43000 	ldrb	r3, [r4]
-    5770:	e3530000 	cmp	r3, #0	; 0x0
-    5774:	e58d0094 	str	r0, [sp, #148]
-    5778:	0a000189 	beq	5da4 <.text+0x5da4>
-    577c:	e59f3370 	ldr	r3, [pc, #880]	; 5af4 <.text+0x5af4>
-    5780:	e5930020 	ldr	r0, [r3, #32]
-    5784:	eb003855 	bl	138e0 <__aeabi_f2d>
-    5788:	e1a04000 	mov	r4, r0
-    578c:	e1a05001 	mov	r5, r1
-    5790:	eb003d21 	bl	14c1c <__cos_from_arm>
-    5794:	eb003a0f 	bl	13fd8 <__aeabi_d2f>
-    5798:	e59f6310 	ldr	r6, [pc, #784]	; 5ab0 <.text+0x5ab0>
-    579c:	e1a01005 	mov	r1, r5
-    57a0:	e5860000 	str	r0, [r6]
-    57a4:	e1a00004 	mov	r0, r4
-    57a8:	eb003d18 	bl	14c10 <__sin_from_arm>
-    57ac:	eb003a09 	bl	13fd8 <__aeabi_d2f>
-    57b0:	e59f42fc 	ldr	r4, [pc, #764]	; 5ab4 <.text+0x5ab4>
-    57b4:	e59fc2fc 	ldr	ip, [pc, #764]	; 5ab8 <.text+0x5ab8>
-    57b8:	e5941000 	ldr	r1, [r4]
-    57bc:	e58c0000 	str	r0, [ip]
-    57c0:	e1da02f0 	ldrsh	r0, [sl, #32]
-    57c4:	ebfff799 	bl	3630 <LLToSIAccX>
-    57c8:	e59f52ec 	ldr	r5, [pc, #748]	; 5abc <.text+0x5abc>
-    57cc:	e5941000 	ldr	r1, [r4]
-    57d0:	e5850000 	str	r0, [r5]
-    57d4:	e1da02f2 	ldrsh	r0, [sl, #34]
-    57d8:	ebfff7a5 	bl	3674 <LLToSIAccY>
-    57dc:	e59f12dc 	ldr	r1, [pc, #732]	; 5ac0 <.text+0x5ac0>
-    57e0:	e5810000 	str	r0, [r1]
-    57e4:	e5941000 	ldr	r1, [r4]
-    57e8:	e1da02f4 	ldrsh	r0, [sl, #36]
-    57ec:	ebfff7b1 	bl	36b8 <LLToSIAccZ>
-    57f0:	e5955000 	ldr	r5, [r5]
-    57f4:	e59f32c8 	ldr	r3, [pc, #712]	; 5ac4 <.text+0x5ac4>
-    57f8:	e1a0a000 	mov	sl, r0
-    57fc:	e583a000 	str	sl, [r3]
-    5800:	e59d0090 	ldr	r0, [sp, #144]
-    5804:	e1a01005 	mov	r1, r5
-    5808:	e58d5068 	str	r5, [sp, #104]
-    580c:	eb003ac4 	bl	14324 <__aeabi_fmul>
-    5810:	e59d1094 	ldr	r1, [sp, #148]
-    5814:	e58d0064 	str	r0, [sp, #100]
-    5818:	e59d008c 	ldr	r0, [sp, #140]
-    581c:	eb003ac0 	bl	14324 <__aeabi_fmul>
-    5820:	e59d1094 	ldr	r1, [sp, #148]
-    5824:	e58d0060 	str	r0, [sp, #96]
-    5828:	e59d0088 	ldr	r0, [sp, #136]
-    582c:	eb003abc 	bl	14324 <__aeabi_fmul>
-    5830:	e5966000 	ldr	r6, [r6]
-    5834:	e58d005c 	str	r0, [sp, #92]
-    5838:	e1a01006 	mov	r1, r6
-    583c:	e59d0064 	ldr	r0, [sp, #100]
-    5840:	e58d606c 	str	r6, [sp, #108]
-    5844:	eb003ab6 	bl	14324 <__aeabi_fmul>
-    5848:	e59f2268 	ldr	r2, [pc, #616]	; 5ab8 <.text+0x5ab8>
-    584c:	e59d106c 	ldr	r1, [sp, #108]
-    5850:	e1a0b000 	mov	fp, r0
-    5854:	e59d0060 	ldr	r0, [sp, #96]
-    5858:	e5925000 	ldr	r5, [r2]
-    585c:	eb003ab0 	bl	14324 <__aeabi_fmul>
-    5860:	e1a01005 	mov	r1, r5
-    5864:	e1a04000 	mov	r4, r0
-    5868:	e59d0088 	ldr	r0, [sp, #136]
-    586c:	eb003aac 	bl	14324 <__aeabi_fmul>
-    5870:	e59f3248 	ldr	r3, [pc, #584]	; 5ac0 <.text+0x5ac0>
-    5874:	e5933000 	ldr	r3, [r3]
-    5878:	e1a01000 	mov	r1, r0
-    587c:	e1a00004 	mov	r0, r4
-    5880:	e58d3070 	str	r3, [sp, #112]
-    5884:	eb0039fd 	bl	14080 <__aeabi_fsub>
-    5888:	e59d1070 	ldr	r1, [sp, #112]
-    588c:	eb003aa4 	bl	14324 <__aeabi_fmul>
-    5890:	e1a01000 	mov	r1, r0
-    5894:	e1a0000b 	mov	r0, fp
-    5898:	eb0039f9 	bl	14084 <__addsf3>
-    589c:	e59d106c 	ldr	r1, [sp, #108]
-    58a0:	e1a09000 	mov	r9, r0
-    58a4:	e59d005c 	ldr	r0, [sp, #92]
-    58a8:	eb003a9d 	bl	14324 <__aeabi_fmul>
-    58ac:	e1a01005 	mov	r1, r5
-    58b0:	e1a04000 	mov	r4, r0
-    58b4:	e59d008c 	ldr	r0, [sp, #140]
-    58b8:	eb003a99 	bl	14324 <__aeabi_fmul>
-    58bc:	e1a01000 	mov	r1, r0
-    58c0:	e1a00004 	mov	r0, r4
-    58c4:	eb0039ee 	bl	14084 <__addsf3>
-    58c8:	e1a01000 	mov	r1, r0
-    58cc:	e1a0000a 	mov	r0, sl
-    58d0:	eb003a93 	bl	14324 <__aeabi_fmul>
-    58d4:	e1a01000 	mov	r1, r0
-    58d8:	e1a00009 	mov	r0, r9
-    58dc:	eb0039e8 	bl	14084 <__addsf3>
-    58e0:	e1a01005 	mov	r1, r5
-    58e4:	e58d0078 	str	r0, [sp, #120]
-    58e8:	e59d0064 	ldr	r0, [sp, #100]
-    58ec:	eb003a8c 	bl	14324 <__aeabi_fmul>
-    58f0:	e1a01005 	mov	r1, r5
-    58f4:	e1a09000 	mov	r9, r0
-    58f8:	e59d0060 	ldr	r0, [sp, #96]
-    58fc:	eb003a88 	bl	14324 <__aeabi_fmul>
-    5900:	e59d106c 	ldr	r1, [sp, #108]
-    5904:	e1a04000 	mov	r4, r0
-    5908:	e59d0088 	ldr	r0, [sp, #136]
-    590c:	eb003a84 	bl	14324 <__aeabi_fmul>
-    5910:	e1a01000 	mov	r1, r0
-    5914:	e1a00004 	mov	r0, r4
-    5918:	eb0039d9 	bl	14084 <__addsf3>
-    591c:	e1a01000 	mov	r1, r0
-    5920:	e59d0070 	ldr	r0, [sp, #112]
-    5924:	eb003a7e 	bl	14324 <__aeabi_fmul>
-    5928:	e1a01000 	mov	r1, r0
-    592c:	e1a00009 	mov	r0, r9
-    5930:	eb0039d3 	bl	14084 <__addsf3>
-    5934:	e1a01005 	mov	r1, r5
-    5938:	e1a09000 	mov	r9, r0
-    593c:	e59d005c 	ldr	r0, [sp, #92]
-    5940:	eb003a77 	bl	14324 <__aeabi_fmul>
-    5944:	e59d106c 	ldr	r1, [sp, #108]
-    5948:	e1a04000 	mov	r4, r0
-    594c:	e59d008c 	ldr	r0, [sp, #140]
-    5950:	eb003a73 	bl	14324 <__aeabi_fmul>
-    5954:	e1a01000 	mov	r1, r0
-    5958:	e1a00004 	mov	r0, r4
-    595c:	eb0039c7 	bl	14080 <__aeabi_fsub>
-    5960:	e1a01000 	mov	r1, r0
-    5964:	e1a0000a 	mov	r0, sl
-    5968:	eb003a6d 	bl	14324 <__aeabi_fmul>
-    596c:	e1a01000 	mov	r1, r0
-    5970:	e1a00009 	mov	r0, r9
-    5974:	eb0039c2 	bl	14084 <__addsf3>
-    5978:	e59d4068 	ldr	r4, [sp, #104]
-    597c:	e58d007c 	str	r0, [sp, #124]
-    5980:	e2841102 	add	r1, r4, #-2147483648	; 0x80000000
-    5984:	e59d0094 	ldr	r0, [sp, #148]
-    5988:	eb003a65 	bl	14324 <__aeabi_fmul>
-    598c:	e59d1070 	ldr	r1, [sp, #112]
-    5990:	e1a04000 	mov	r4, r0
-    5994:	e59d008c 	ldr	r0, [sp, #140]
-    5998:	eb003a61 	bl	14324 <__aeabi_fmul>
-    599c:	e1a01000 	mov	r1, r0
-    59a0:	e59d0090 	ldr	r0, [sp, #144]
-    59a4:	eb003a5e 	bl	14324 <__aeabi_fmul>
-    59a8:	e1a01000 	mov	r1, r0
-    59ac:	e1a00004 	mov	r0, r4
-    59b0:	eb0039b3 	bl	14084 <__addsf3>
-    59b4:	e1a0100a 	mov	r1, sl
-    59b8:	e1a04000 	mov	r4, r0
-    59bc:	e59d0088 	ldr	r0, [sp, #136]
-    59c0:	eb003a57 	bl	14324 <__aeabi_fmul>
-    59c4:	e1a01000 	mov	r1, r0
-    59c8:	e59d0090 	ldr	r0, [sp, #144]
-    59cc:	eb003a54 	bl	14324 <__aeabi_fmul>
-    59d0:	e1a01000 	mov	r1, r0
-    59d4:	e1a00004 	mov	r0, r4
-    59d8:	eb0039a9 	bl	14084 <__addsf3>
-    59dc:	eb0037bf 	bl	138e0 <__aeabi_f2d>
-    59e0:	e28f20b4 	add	r2, pc, #180	; 0xb4
-    59e4:	e892000c 	ldmia	r2, {r2, r3}
-    59e8:	eb0036e2 	bl	13578 <__aeabi_dsub>
-    59ec:	eb003979 	bl	13fd8 <__aeabi_d2f>
-    59f0:	e58d0080 	str	r0, [sp, #128]
-    59f4:	e59d5070 	ldr	r5, [sp, #112]
-    59f8:	e59dc080 	ldr	ip, [sp, #128]
-    59fc:	e59f60a8 	ldr	r6, [pc, #168]	; 5aac <.text+0x5aac>
-    5a00:	e59d1078 	ldr	r1, [sp, #120]
-    5a04:	e5d6e000 	ldrb	lr, [r6]
-    5a08:	e58dc034 	str	ip, [sp, #52]
-    5a0c:	e1a0cc25 	mov	ip, r5, lsr #24
-    5a10:	e58dc048 	str	ip, [sp, #72]
-    5a14:	e1a0cc21 	mov	ip, r1, lsr #24
-    5a18:	e59d4068 	ldr	r4, [sp, #104]
-    5a1c:	e58dc040 	str	ip, [sp, #64]
-    5a20:	e59dc034 	ldr	ip, [sp, #52]
-    5a24:	e58da044 	str	sl, [sp, #68]
-    5a28:	e35e0000 	cmp	lr, #0	; 0x0
-    5a2c:	e1a0ec2c 	mov	lr, ip, lsr #24
-    5a30:	e1a0c824 	mov	ip, r4, lsr #16
-    5a34:	e59d007c 	ldr	r0, [sp, #124]
-    5a38:	e58dc054 	str	ip, [sp, #84]
-    5a3c:	e59dc044 	ldr	ip, [sp, #68]
-    5a40:	e1a0b42c 	mov	fp, ip, lsr #8
-    5a44:	e1a0982c 	mov	r9, ip, lsr #16
-    5a48:	e1a0c420 	mov	ip, r0, lsr #8
-    5a4c:	e58dc000 	str	ip, [sp]
-    5a50:	e1a0c820 	mov	ip, r0, lsr #16
-    5a54:	e58dc03c 	str	ip, [sp, #60]
-    5a58:	e1a06c24 	mov	r6, r4, lsr #24
-    5a5c:	e59dc034 	ldr	ip, [sp, #52]
-    5a60:	e58d6050 	str	r6, [sp, #80]
-    5a64:	e59d6044 	ldr	r6, [sp, #68]
-    5a68:	e1a0c42c 	mov	ip, ip, lsr #8
-    5a6c:	e58dc030 	str	ip, [sp, #48]
-    5a70:	e1a08c26 	mov	r8, r6, lsr #24
-    5a74:	e59dc034 	ldr	ip, [sp, #52]
-    5a78:	e1a06c20 	mov	r6, r0, lsr #24
-    5a7c:	e59f3044 	ldr	r3, [pc, #68]	; 5ac8 <.text+0x5ac8>
-    5a80:	e59f2044 	ldr	r2, [pc, #68]	; 5acc <.text+0x5acc>
-    5a84:	e58d6038 	str	r6, [sp, #56]
-    5a88:	ea000022 	b	5b18 <.text+0x5b18>
-    5a8c:	3fefd70a 	svccc	0x00efd70a
-    5a90:	3d70a3d7 	ldcccl	3, cr10, [r0, #-860]!
-    5a94:	3f747ae1 	svccc	0x00747ae1
-    5a98:	47ae147b 	undefined
-    5a9c:	40239f0f 	eormi	r9, r3, pc, lsl #30
-    5aa0:	7b9e0610 	blvc	fe7872e8 <VPBDIV+0x1e58b1e8>
-    5aa4:	40000b34 	andmi	r0, r0, r4, lsr fp
-    5aa8:	40000002 	andmi	r0, r0, r2
-    5aac:	400011f1 	strmid	r1, [r0], -r1
-    5ab0:	40001300 	andmi	r1, r0, r0, lsl #6
-    5ab4:	40001368 	andmi	r1, r0, r8, ror #6
-    5ab8:	400012f8 	strmid	r1, [r0], -r8
-    5abc:	400012f4 	strmid	r1, [r0], -r4
-    5ac0:	400012fc 	strmid	r1, [r0], -ip
-    5ac4:	400012f0 	strmid	r1, [r0], -r0
-    5ac8:	40000f74 	andmi	r0, r0, r4, ror pc
-    5acc:	40000efc 	strmid	r0, [r0], -ip
-    5ad0:	40001039 	andmi	r1, r0, r9, lsr r0
-    5ad4:	400011f0 	strmid	r1, [r0], -r0
-    5ad8:	40000eec 	andmi	r0, r0, ip, ror #29
-    5adc:	400010a8 	andmi	r1, r0, r8, lsr #1
-    5ae0:	4000087c 	andmi	r0, r0, ip, ror r8
-    5ae4:	4cbebc20 	ldcmi	12, cr11, [lr], #128
-    5ae8:	40000dd0 	ldrmid	r0, [r0], -r0
-    5aec:	40000bf4 	strmid	r0, [r0], -r4
-    5af0:	40000d0c 	andmi	r0, r0, ip, lsl #26
-    5af4:	40000bc8 	andmi	r0, r0, r8, asr #23
-    5af8:	3a83126f 	bcc	fe0ca4bc <VPBDIV+0x1dece3bc>
-    5afc:	40001190 	mulmi	r0, r0, r1
-    5b00:	40000cf0 	strmid	r0, [r0], -r0
-    5b04:	40000fe1 	andmi	r0, r0, r1, ror #31
-    5b08:	400011e8 	andmi	r1, r0, r8, ror #3
-    5b0c:	40000858 	andmi	r0, r0, r8, asr r8
-    5b10:	40000874 	andmi	r0, r0, r4, ror r8
-    5b14:	400011b9 	strmih	r1, [r0], -r9
-    5b18:	e1a06424 	mov	r6, r4, lsr #8
-    5b1c:	e58d6058 	str	r6, [sp, #88]
-    5b20:	e1a0c82c 	mov	ip, ip, lsr #16
-    5b24:	e1a06825 	mov	r6, r5, lsr #16
-    5b28:	e58d604c 	str	r6, [sp, #76]
-    5b2c:	e58dc02c 	str	ip, [sp, #44]
-    5b30:	e5c38023 	strb	r8, [r3, #35]
-    5b34:	e5c2e059 	strb	lr, [r2, #89]
-    5b38:	e59dc058 	ldr	ip, [sp, #88]
-    5b3c:	e5c3c019 	strb	ip, [r3, #25]
-    5b40:	e59dc054 	ldr	ip, [sp, #84]
-    5b44:	e5c3c01a 	strb	ip, [r3, #26]
-    5b48:	e59dc050 	ldr	ip, [sp, #80]
-    5b4c:	e1a0a425 	mov	sl, r5, lsr #8
-    5b50:	e5c3c01b 	strb	ip, [r3, #27]
-    5b54:	e5c3a01d 	strb	sl, [r3, #29]
-    5b58:	e59dc04c 	ldr	ip, [sp, #76]
-    5b5c:	e5c3c01e 	strb	ip, [r3, #30]
-    5b60:	e59dc048 	ldr	ip, [sp, #72]
-    5b64:	e1a06821 	mov	r6, r1, lsr #16
-    5b68:	e1a07421 	mov	r7, r1, lsr #8
-    5b6c:	e5c3c01f 	strb	ip, [r3, #31]
-    5b70:	e5c3b021 	strb	fp, [r3, #33]
-    5b74:	e5c39022 	strb	r9, [r3, #34]
-    5b78:	e5c2704f 	strb	r7, [r2, #79]
-    5b7c:	e5c26050 	strb	r6, [r2, #80]
-    5b80:	e59d6040 	ldr	r6, [sp, #64]
-    5b84:	e5c26051 	strb	r6, [r2, #81]
-    5b88:	e59dc000 	ldr	ip, [sp]
-    5b8c:	e5c2c053 	strb	ip, [r2, #83]
-    5b90:	e59d603c 	ldr	r6, [sp, #60]
-    5b94:	e5c26054 	strb	r6, [r2, #84]
-    5b98:	e59dc038 	ldr	ip, [sp, #56]
-    5b9c:	e5c2c055 	strb	ip, [r2, #85]
-    5ba0:	e59d6030 	ldr	r6, [sp, #48]
-    5ba4:	e5c26057 	strb	r6, [r2, #87]
-    5ba8:	e59dc02c 	ldr	ip, [sp, #44]
-    5bac:	e5c2c058 	strb	ip, [r2, #88]
-    5bb0:	e5c34018 	strb	r4, [r3, #24]
-    5bb4:	e5c3501c 	strb	r5, [r3, #28]
-    5bb8:	e59d4044 	ldr	r4, [sp, #68]
-    5bbc:	e5c34020 	strb	r4, [r3, #32]
-    5bc0:	e5c2104e 	strb	r1, [r2, #78]
-    5bc4:	e5c20052 	strb	r0, [r2, #82]
-    5bc8:	e59d6034 	ldr	r6, [sp, #52]
-    5bcc:	e5c26056 	strb	r6, [r2, #86]
-    5bd0:	1a000064 	bne	5d68 <.text+0x5d68>
-    5bd4:	e51f310c 	ldr	r3, [pc, #-268]	; 5ad0 <.text+0x5ad0>
-    5bd8:	e5d32000 	ldrb	r2, [r3]
-    5bdc:	e3520000 	cmp	r2, #0	; 0x0
-    5be0:	1a00004f 	bne	5d24 <.text+0x5d24>
-    5be4:	e51f3118 	ldr	r3, [pc, #-280]	; 5ad4 <.text+0x5ad4>
-    5be8:	e5d32000 	ldrb	r2, [r3]
-    5bec:	e3520000 	cmp	r2, #0	; 0x0
-    5bf0:	1a00003a 	bne	5ce0 <.text+0x5ce0>
-    5bf4:	e51f3124 	ldr	r3, [pc, #-292]	; 5ad8 <.text+0x5ad8>
-    5bf8:	e5d32000 	ldrb	r2, [r3]
-    5bfc:	e3520000 	cmp	r2, #0	; 0x0
-    5c00:	1a000009 	bne	5c2c <.text+0x5c2c>
-    5c04:	e51fc110 	ldr	ip, [pc, #-272]	; 5afc <.text+0x5afc>
-    5c08:	e59c3000 	ldr	r3, [ip]
-    5c0c:	e3a01000 	mov	r1, #0	; 0x0
-    5c10:	e5c31008 	strb	r1, [r3, #8]
-    5c14:	e51f0140 	ldr	r0, [pc, #-320]	; 5adc <.text+0x5adc>
-    5c18:	e5902000 	ldr	r2, [r0]
-    5c1c:	e5c21008 	strb	r1, [r2, #8]
-    5c20:	e28dd098 	add	sp, sp, #152	; 0x98
-    5c24:	e8bd4ff0 	ldmia	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
-    5c28:	e12fff1e 	bx	lr
-    5c2c:	e59d2080 	ldr	r2, [sp, #128]
-    5c30:	e51fb150 	ldr	fp, [pc, #-336]	; 5ae8 <.text+0x5ae8>
-    5c34:	e51f4160 	ldr	r4, [pc, #-352]	; 5adc <.text+0x5adc>
-    5c38:	e58b20a8 	str	r2, [fp, #168]
-    5c3c:	e1a0000b 	mov	r0, fp
-    5c40:	e51f1150 	ldr	r1, [pc, #-336]	; 5af8 <.text+0x5af8>
-    5c44:	ebfffe5c 	bl	55bc <PredictPos>
-    5c48:	e5943000 	ldr	r3, [r4]
-    5c4c:	e5d32008 	ldrb	r2, [r3, #8]
-    5c50:	e3520001 	cmp	r2, #1	; 0x1
-    5c54:	151fa150 	ldrne	sl, [pc, #-336]	; 5b0c <.text+0x5b0c>
-    5c58:	151f8150 	ldrne	r8, [pc, #-336]	; 5b10 <.text+0x5b10>
-    5c5c:	0a00005d 	beq	5dd8 <.text+0x5dd8>
-    5c60:	e8980006 	ldmia	r8, {r1, r2}
-    5c64:	e89a0018 	ldmia	sl, {r3, r4}
-    5c68:	e0511003 	subs	r1, r1, r3
-    5c6c:	e0c22004 	sbc	r2, r2, r4
-    5c70:	e3520000 	cmp	r2, #0	; 0x0
-    5c74:	da000051 	ble	5dc0 <.text+0x5dc0>
-    5c78:	e51f317c 	ldr	r3, [pc, #-380]	; 5b04 <.text+0x5b04>
-    5c7c:	e5d31032 	ldrb	r1, [r3, #50]
-    5c80:	e5d30033 	ldrb	r0, [r3, #51]
-    5c84:	e5d32031 	ldrb	r2, [r3, #49]
-    5c88:	e5d33034 	ldrb	r3, [r3, #52]
-    5c8c:	e58d3004 	str	r3, [sp, #4]
-    5c90:	e51f31b8 	ldr	r3, [pc, #-440]	; 5ae0 <.text+0x5ae0>
-    5c94:	e1822401 	orr	r2, r2, r1, lsl #8
-    5c98:	e59d6004 	ldr	r6, [sp, #4]
-    5c9c:	e1822800 	orr	r2, r2, r0, lsl #16
-    5ca0:	e5934000 	ldr	r4, [r3]
-    5ca4:	e59be0ac 	ldr	lr, [fp, #172]
-    5ca8:	e51f31cc 	ldr	r3, [pc, #-460]	; 5ae4 <.text+0x5ae4>
-    5cac:	e1821c06 	orr	r1, r2, r6, lsl #24
-    5cb0:	e51f01d0 	ldr	r0, [pc, #-464]	; 5ae8 <.text+0x5ae8>
-    5cb4:	e58b3098 	str	r3, [fp, #152]
-    5cb8:	e58b109c 	str	r1, [fp, #156]
-    5cbc:	e58be0b4 	str	lr, [fp, #180]
-    5cc0:	e58b40b8 	str	r4, [fp, #184]
-    5cc4:	ebfffe0e 	bl	5504 <CorrectPos>
-    5cc8:	e51f21d0 	ldr	r2, [pc, #-464]	; 5b00 <.text+0x5b00>
-    5ccc:	e59b30b0 	ldr	r3, [fp, #176]
-    5cd0:	e59b10ac 	ldr	r1, [fp, #172]
-    5cd4:	e5823014 	str	r3, [r2, #20]
-    5cd8:	e5821008 	str	r1, [r2, #8]
-    5cdc:	eaffffc8 	b	5c04 <.text+0x5c04>
-    5ce0:	e51f61fc 	ldr	r6, [pc, #-508]	; 5aec <.text+0x5aec>
-    5ce4:	e59dc07c 	ldr	ip, [sp, #124]
-    5ce8:	e1a00006 	mov	r0, r6
-    5cec:	e51f11fc 	ldr	r1, [pc, #-508]	; 5af8 <.text+0x5af8>
-    5cf0:	e586c0a8 	str	ip, [r6, #168]
-    5cf4:	ebfffe30 	bl	55bc <PredictPos>
-    5cf8:	e51f0204 	ldr	r0, [pc, #-516]	; 5afc <.text+0x5afc>
-    5cfc:	e5903000 	ldr	r3, [r0]
-    5d00:	e5d32008 	ldrb	r2, [r3, #8]
-    5d04:	e3520001 	cmp	r2, #1	; 0x1
-    5d08:	0a00006d 	beq	5ec4 <.text+0x5ec4>
-    5d0c:	e51f2214 	ldr	r2, [pc, #-532]	; 5b00 <.text+0x5b00>
-    5d10:	e59630b0 	ldr	r3, [r6, #176]
-    5d14:	e59610ac 	ldr	r1, [r6, #172]
-    5d18:	e5823010 	str	r3, [r2, #16]
-    5d1c:	e5821004 	str	r1, [r2, #4]
-    5d20:	eaffffb3 	b	5bf4 <.text+0x5bf4>
-    5d24:	e59d2078 	ldr	r2, [sp, #120]
-    5d28:	e51f6240 	ldr	r6, [pc, #-576]	; 5af0 <.text+0x5af0>
-    5d2c:	e51f4238 	ldr	r4, [pc, #-568]	; 5afc <.text+0x5afc>
-    5d30:	e58620a8 	str	r2, [r6, #168]
-    5d34:	e51f1244 	ldr	r1, [pc, #-580]	; 5af8 <.text+0x5af8>
-    5d38:	e1a00006 	mov	r0, r6
-    5d3c:	ebfffe1e 	bl	55bc <PredictPos>
-    5d40:	e5943000 	ldr	r3, [r4]
-    5d44:	e5d32008 	ldrb	r2, [r3, #8]
-    5d48:	e3520001 	cmp	r2, #1	; 0x1
-    5d4c:	0a000070 	beq	5f14 <.text+0x5f14>
-    5d50:	e51f2258 	ldr	r2, [pc, #-600]	; 5b00 <.text+0x5b00>
-    5d54:	e59630b0 	ldr	r3, [r6, #176]
-    5d58:	e59610ac 	ldr	r1, [r6, #172]
-    5d5c:	e582300c 	str	r3, [r2, #12]
-    5d60:	e5821000 	str	r1, [r2]
-    5d64:	eaffff9e 	b	5be4 <.text+0x5be4>
-    5d68:	e51f427c 	ldr	r4, [pc, #-636]	; 5af4 <.text+0x5af4>
-    5d6c:	e59dc074 	ldr	ip, [sp, #116]
-    5d70:	e1a00004 	mov	r0, r4
-    5d74:	e51f1284 	ldr	r1, [pc, #-644]	; 5af8 <.text+0x5af8>
-    5d78:	e584c01c 	str	ip, [r4, #28]
-    5d7c:	ebfffdcf 	bl	54c0 <PredictYaw>
-    5d80:	e51f028c 	ldr	r0, [pc, #-652]	; 5afc <.text+0x5afc>
-    5d84:	e5903000 	ldr	r3, [r0]
-    5d88:	e5d32008 	ldrb	r2, [r3, #8]
-    5d8c:	e3520001 	cmp	r2, #1	; 0x1
-    5d90:	0a000073 	beq	5f64 <.text+0x5f64>
-    5d94:	e5942020 	ldr	r2, [r4, #32]
-    5d98:	e51f32a0 	ldr	r3, [pc, #-672]	; 5b00 <.text+0x5b00>
-    5d9c:	e5832018 	str	r2, [r3, #24]
-    5da0:	eaffff8b 	b	5bd4 <.text+0x5bd4>
-    5da4:	e1da00b6 	ldrh	r0, [sl, #6]
-    5da8:	ebfff6e7 	bl	394c <LLToSIAngleYaw>
-    5dac:	eafffe74 	b	5784 <KFilter+0x118>
-    5db0:	e3a03000 	mov	r3, #0	; 0x0
-    5db4:	e1c230b0 	strh	r3, [r2]
-    5db8:	ebfffd8e 	bl	53f8 <resetKalmanFilter>
-    5dbc:	eafffe52 	b	570c <KFilter+0xa0>
-    5dc0:	1affffc0 	bne	5cc8 <.text+0x5cc8>
-    5dc4:	e3a03bc3 	mov	r3, #199680	; 0x30c00
-    5dc8:	e2833d05 	add	r3, r3, #320	; 0x140
-    5dcc:	e1510003 	cmp	r1, r3
-    5dd0:	9affffbc 	bls	5cc8 <.text+0x5cc8>
-    5dd4:	eaffffa7 	b	5c78 <.text+0x5c78>
-    5dd8:	e51f32dc 	ldr	r3, [pc, #-732]	; 5b04 <.text+0x5b04>
-    5ddc:	e5d3602a 	ldrb	r6, [r3, #42]
-    5de0:	e5d3e029 	ldrb	lr, [r3, #41]
-    5de4:	e58d6028 	str	r6, [sp, #40]
-    5de8:	e5d3c02d 	ldrb	ip, [r3, #45]
-    5dec:	e58dc020 	str	ip, [sp, #32]
-    5df0:	e5d3002e 	ldrb	r0, [r3, #46]
-    5df4:	e58d001c 	str	r0, [sp, #28]
-    5df8:	e51f22f8 	ldr	r2, [pc, #-760]	; 5b08 <.text+0x5b08>
-    5dfc:	e5d3602b 	ldrb	r6, [r3, #43]
-    5e00:	e5d25001 	ldrb	r5, [r2, #1]
-    5e04:	e5d24005 	ldrb	r4, [r2, #5]
-    5e08:	e5d20000 	ldrb	r0, [r2]
-    5e0c:	e5d21004 	ldrb	r1, [r2, #4]
-    5e10:	e58d6024 	str	r6, [sp, #36]
-    5e14:	e5d2c002 	ldrb	ip, [r2, #2]
-    5e18:	e5d3a02f 	ldrb	sl, [r3, #47]
-    5e1c:	e58dc010 	str	ip, [sp, #16]
-    5e20:	e59dc028 	ldr	ip, [sp, #40]
-    5e24:	e5d26006 	ldrb	r6, [r2, #6]
-    5e28:	e18ee40c 	orr	lr, lr, ip, lsl #8
-    5e2c:	e58d600c 	str	r6, [sp, #12]
-    5e30:	e59dc01c 	ldr	ip, [sp, #28]
-    5e34:	e59d6020 	ldr	r6, [sp, #32]
-    5e38:	e186640c 	orr	r6, r6, ip, lsl #8
-    5e3c:	e58d6018 	str	r6, [sp, #24]
-    5e40:	e1811404 	orr	r1, r1, r4, lsl #8
-    5e44:	e5d34030 	ldrb	r4, [r3, #48]
-    5e48:	e58d4014 	str	r4, [sp, #20]
-    5e4c:	e5d26007 	ldrb	r6, [r2, #7]
-    5e50:	e58d6008 	str	r6, [sp, #8]
-    5e54:	e59dc024 	ldr	ip, [sp, #36]
-    5e58:	e5d3402c 	ldrb	r4, [r3, #44]
-    5e5c:	e59d6010 	ldr	r6, [sp, #16]
-    5e60:	e59d3018 	ldr	r3, [sp, #24]
-    5e64:	e18ee80c 	orr	lr, lr, ip, lsl #16
-    5e68:	e1800405 	orr	r0, r0, r5, lsl #8
-    5e6c:	e59dc00c 	ldr	ip, [sp, #12]
-    5e70:	e5d25003 	ldrb	r5, [r2, #3]
-    5e74:	e1800806 	orr	r0, r0, r6, lsl #16
-    5e78:	e183280a 	orr	r2, r3, sl, lsl #16
-    5e7c:	e59d6008 	ldr	r6, [sp, #8]
-    5e80:	e18e3c04 	orr	r3, lr, r4, lsl #24
-    5e84:	e59d4014 	ldr	r4, [sp, #20]
-    5e88:	e181180c 	orr	r1, r1, ip, lsl #16
-    5e8c:	e51fa388 	ldr	sl, [pc, #-904]	; 5b0c <.text+0x5b0c>
-    5e90:	e1822c04 	orr	r2, r2, r4, lsl #24
-    5e94:	e1811c06 	orr	r1, r1, r6, lsl #24
-    5e98:	e58b3098 	str	r3, [fp, #152]
-    5e9c:	e51f8394 	ldr	r8, [pc, #-916]	; 5b10 <.text+0x5b10>
-    5ea0:	e58b209c 	str	r2, [fp, #156]
-    5ea4:	e58b10b8 	str	r1, [fp, #184]
-    5ea8:	e89a0006 	ldmia	sl, {r1, r2}
-    5eac:	e180ec05 	orr	lr, r0, r5, lsl #24
-    5eb0:	e58be0b4 	str	lr, [fp, #180]
-    5eb4:	e1a0000b 	mov	r0, fp
-    5eb8:	e8880006 	stmia	r8, {r1, r2}
-    5ebc:	ebfffd90 	bl	5504 <CorrectPos>
-    5ec0:	eaffff66 	b	5c60 <.text+0x5c60>
-    5ec4:	e51f33b8 	ldr	r3, [pc, #-952]	; 5b14 <.text+0x5b14>
-    5ec8:	e5d3e005 	ldrb	lr, [r3, #5]
-    5ecc:	e5d3000d 	ldrb	r0, [r3, #13]
-    5ed0:	e5d31004 	ldrb	r1, [r3, #4]
-    5ed4:	e5d3200c 	ldrb	r2, [r3, #12]
-    5ed8:	e5d34006 	ldrb	r4, [r3, #6]
-    5edc:	e5d3500e 	ldrb	r5, [r3, #14]
-    5ee0:	e181140e 	orr	r1, r1, lr, lsl #8
-    5ee4:	e1822400 	orr	r2, r2, r0, lsl #8
-    5ee8:	e5d3e00f 	ldrb	lr, [r3, #15]
-    5eec:	e5d30007 	ldrb	r0, [r3, #7]
-    5ef0:	e1811804 	orr	r1, r1, r4, lsl #16
-    5ef4:	e1822805 	orr	r2, r2, r5, lsl #16
-    5ef8:	e1813c00 	orr	r3, r1, r0, lsl #24
-    5efc:	e1822c0e 	orr	r2, r2, lr, lsl #24
-    5f00:	e1a00006 	mov	r0, r6
-    5f04:	e58630b4 	str	r3, [r6, #180]
-    5f08:	e58620b8 	str	r2, [r6, #184]
-    5f0c:	ebfffd7c 	bl	5504 <CorrectPos>
-    5f10:	eaffff7d 	b	5d0c <.text+0x5d0c>
-    5f14:	e51f3408 	ldr	r3, [pc, #-1032]	; 5b14 <.text+0x5b14>
-    5f18:	e5d3e001 	ldrb	lr, [r3, #1]
-    5f1c:	e5d30009 	ldrb	r0, [r3, #9]
-    5f20:	e5d31000 	ldrb	r1, [r3]
-    5f24:	e5d32008 	ldrb	r2, [r3, #8]
-    5f28:	e5d34002 	ldrb	r4, [r3, #2]
-    5f2c:	e5d3500a 	ldrb	r5, [r3, #10]
-    5f30:	e181140e 	orr	r1, r1, lr, lsl #8
-    5f34:	e1822400 	orr	r2, r2, r0, lsl #8
-    5f38:	e5d3e00b 	ldrb	lr, [r3, #11]
-    5f3c:	e5d30003 	ldrb	r0, [r3, #3]
-    5f40:	e1811804 	orr	r1, r1, r4, lsl #16
-    5f44:	e1822805 	orr	r2, r2, r5, lsl #16
-    5f48:	e1813c00 	orr	r3, r1, r0, lsl #24
-    5f4c:	e1822c0e 	orr	r2, r2, lr, lsl #24
-    5f50:	e1a00006 	mov	r0, r6
-    5f54:	e58630b4 	str	r3, [r6, #180]
-    5f58:	e58620b8 	str	r2, [r6, #184]
-    5f5c:	ebfffd68 	bl	5504 <CorrectPos>
-    5f60:	eaffff7a 	b	5d50 <.text+0x5d50>
-    5f64:	e51f3458 	ldr	r3, [pc, #-1112]	; 5b14 <.text+0x5b14>
-    5f68:	e5d31011 	ldrb	r1, [r3, #17]
-    5f6c:	e5d32010 	ldrb	r2, [r3, #16]
-    5f70:	e5d3e012 	ldrb	lr, [r3, #18]
-    5f74:	e5d30013 	ldrb	r0, [r3, #19]
-    5f78:	e1822401 	orr	r2, r2, r1, lsl #8
-    5f7c:	e182280e 	orr	r2, r2, lr, lsl #16
-    5f80:	e1823c00 	orr	r3, r2, r0, lsl #24
-    5f84:	e5843024 	str	r3, [r4, #36]
-    5f88:	e1a00004 	mov	r0, r4
-    5f8c:	ebfffd27 	bl	5430 <CorrectYaw>
-    5f90:	eaffff7f 	b	5d94 <.text+0x5d94>
-
-00005f94 <addMatrix2>:
-    5f94:	e92d40f0 	stmdb	sp!, {r4, r5, r6, r7, lr}
-    5f98:	e1a06000 	mov	r6, r0
-    5f9c:	e1a05001 	mov	r5, r1
-    5fa0:	e1a04002 	mov	r4, r2
-    5fa4:	e3a07000 	mov	r7, #0	; 0x0
-    5fa8:	e5951000 	ldr	r1, [r5]
-    5fac:	e5960000 	ldr	r0, [r6]
-    5fb0:	eb003833 	bl	14084 <__addsf3>
-    5fb4:	e5840000 	str	r0, [r4]
-    5fb8:	e5960004 	ldr	r0, [r6, #4]
-    5fbc:	e5951004 	ldr	r1, [r5, #4]
-    5fc0:	eb00382f 	bl	14084 <__addsf3>
-    5fc4:	e2877001 	add	r7, r7, #1	; 0x1
-    5fc8:	e3570002 	cmp	r7, #2	; 0x2
-    5fcc:	e5840004 	str	r0, [r4, #4]
-    5fd0:	e2866008 	add	r6, r6, #8	; 0x8
-    5fd4:	e2855008 	add	r5, r5, #8	; 0x8
-    5fd8:	e2844008 	add	r4, r4, #8	; 0x8
-    5fdc:	1afffff1 	bne	5fa8 <addMatrix2+0x14>
-    5fe0:	e8bd40f0 	ldmia	sp!, {r4, r5, r6, r7, lr}
-    5fe4:	e12fff1e 	bx	lr
-
-00005fe8 <addMatrix>:
-    5fe8:	e92d4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
-    5fec:	e3530000 	cmp	r3, #0	; 0x0
-    5ff0:	e24dd00c 	sub	sp, sp, #12	; 0xc
-    5ff4:	c3a08000 	movgt	r8, #0	; 0x0
-    5ff8:	e58d3000 	str	r3, [sp]
-    5ffc:	e58d0008 	str	r0, [sp, #8]
-    6000:	e58d1004 	str	r1, [sp, #4]
-    6004:	e1a0b002 	mov	fp, r2
-    6008:	e59da030 	ldr	sl, [sp, #48]
-    600c:	c1a09008 	movgt	r9, r8
-    6010:	da000013 	ble	6064 <addMatrix+0x7c>
-    6014:	e35a0000 	cmp	sl, #0	; 0x0
-    6018:	da00000c 	ble	6050 <addMatrix+0x68>
-    601c:	e59d3008 	ldr	r3, [sp, #8]
-    6020:	e7986003 	ldr	r6, [r8, r3]
-    6024:	e59d3004 	ldr	r3, [sp, #4]
-    6028:	e798700b 	ldr	r7, [r8, fp]
-    602c:	e7985003 	ldr	r5, [r8, r3]
-    6030:	e3a04000 	mov	r4, #0	; 0x0
-    6034:	e7960104 	ldr	r0, [r6, r4, lsl #2]
-    6038:	e7951104 	ldr	r1, [r5, r4, lsl #2]
-    603c:	eb003810 	bl	14084 <__addsf3>
-    6040:	e7870104 	str	r0, [r7, r4, lsl #2]
-    6044:	e2844001 	add	r4, r4, #1	; 0x1
-    6048:	e15a0004 	cmp	sl, r4
-    604c:	1afffff8 	bne	6034 <addMatrix+0x4c>
-    6050:	e59d3000 	ldr	r3, [sp]
-    6054:	e2899001 	add	r9, r9, #1	; 0x1
-    6058:	e1530009 	cmp	r3, r9
-    605c:	e2888004 	add	r8, r8, #4	; 0x4
-    6060:	1affffeb 	bne	6014 <addMatrix+0x2c>
-    6064:	e28dd00c 	add	sp, sp, #12	; 0xc
-    6068:	e8bd4ff0 	ldmia	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
-    606c:	e12fff1e 	bx	lr
-
-00006070 <addVector>:
-    6070:	e92d45f0 	stmdb	sp!, {r4, r5, r6, r7, r8, sl, lr}
-    6074:	e253a000 	subs	sl, r3, #0	; 0x0
-    6078:	e1a08000 	mov	r8, r0
-    607c:	e1a07001 	mov	r7, r1
-    6080:	e1a06002 	mov	r6, r2
-    6084:	da000009 	ble	60b0 <addVector+0x40>
-    6088:	e3a05000 	mov	r5, #0	; 0x0
-    608c:	e1a04005 	mov	r4, r5
-    6090:	e7940008 	ldr	r0, [r4, r8]
-    6094:	e7941007 	ldr	r1, [r4, r7]
-    6098:	eb0037f9 	bl	14084 <__addsf3>
-    609c:	e2855001 	add	r5, r5, #1	; 0x1
-    60a0:	e15a0005 	cmp	sl, r5
-    60a4:	e7840006 	str	r0, [r4, r6]
-    60a8:	e2844004 	add	r4, r4, #4	; 0x4
-    60ac:	1afffff7 	bne	6090 <addVector+0x20>
-    60b0:	e8bd45f0 	ldmia	sp!, {r4, r5, r6, r7, r8, sl, lr}
-    60b4:	e12fff1e 	bx	lr
-
-000060b8 <addVector2>:
-    60b8:	e92d4070 	stmdb	sp!, {r4, r5, r6, lr}
-    60bc:	e1a04000 	mov	r4, r0
-    60c0:	e1a06001 	mov	r6, r1
-    60c4:	e5900000 	ldr	r0, [r0]
-    60c8:	e5911000 	ldr	r1, [r1]
-    60cc:	e1a05002 	mov	r5, r2
-    60d0:	eb0037eb 	bl	14084 <__addsf3>
-    60d4:	e5850000 	str	r0, [r5]
-    60d8:	e5940004 	ldr	r0, [r4, #4]
-    60dc:	e5961004 	ldr	r1, [r6, #4]
-    60e0:	eb0037e7 	bl	14084 <__addsf3>
-    60e4:	e5850004 	str	r0, [r5, #4]
-    60e8:	e8bd4070 	ldmia	sp!, {r4, r5, r6, lr}
-    60ec:	e12fff1e 	bx	lr
-
-000060f0 <subMatrix2>:
-    60f0:	e92d40f0 	stmdb	sp!, {r4, r5, r6, r7, lr}
-    60f4:	e1a06000 	mov	r6, r0
-    60f8:	e1a05001 	mov	r5, r1
-    60fc:	e1a04002 	mov	r4, r2
-    6100:	e3a07000 	mov	r7, #0	; 0x0
-    6104:	e5951000 	ldr	r1, [r5]
-    6108:	e5960000 	ldr	r0, [r6]
-    610c:	eb0037db 	bl	14080 <__aeabi_fsub>
-    6110:	e5840000 	str	r0, [r4]
-    6114:	e5960004 	ldr	r0, [r6, #4]
-    6118:	e5951004 	ldr	r1, [r5, #4]
-    611c:	eb0037d7 	bl	14080 <__aeabi_fsub>
-    6120:	e2877001 	add	r7, r7, #1	; 0x1
-    6124:	e3570002 	cmp	r7, #2	; 0x2
-    6128:	e5840004 	str	r0, [r4, #4]
-    612c:	e2866008 	add	r6, r6, #8	; 0x8
-    6130:	e2855008 	add	r5, r5, #8	; 0x8
-    6134:	e2844008 	add	r4, r4, #8	; 0x8
-    6138:	1afffff1 	bne	6104 <subMatrix2+0x14>
-    613c:	e8bd40f0 	ldmia	sp!, {r4, r5, r6, r7, lr}
-    6140:	e12fff1e 	bx	lr
-
-00006144 <subMatrix>:
-    6144:	e92d4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
-    6148:	e3530000 	cmp	r3, #0	; 0x0
-    614c:	e24dd00c 	sub	sp, sp, #12	; 0xc
-    6150:	c3a08000 	movgt	r8, #0	; 0x0
-    6154:	e58d3000 	str	r3, [sp]
-    6158:	e58d0008 	str	r0, [sp, #8]
-    615c:	e58d1004 	str	r1, [sp, #4]
-    6160:	e1a0b002 	mov	fp, r2
-    6164:	e59da030 	ldr	sl, [sp, #48]
-    6168:	c1a09008 	movgt	r9, r8
-    616c:	da000013 	ble	61c0 <subMatrix+0x7c>
-    6170:	e35a0000 	cmp	sl, #0	; 0x0
-    6174:	da00000c 	ble	61ac <subMatrix+0x68>
-    6178:	e59d3008 	ldr	r3, [sp, #8]
-    617c:	e7986003 	ldr	r6, [r8, r3]
-    6180:	e59d3004 	ldr	r3, [sp, #4]
-    6184:	e798700b 	ldr	r7, [r8, fp]
-    6188:	e7985003 	ldr	r5, [r8, r3]
-    618c:	e3a04000 	mov	r4, #0	; 0x0
-    6190:	e7960104 	ldr	r0, [r6, r4, lsl #2]
-    6194:	e7951104 	ldr	r1, [r5, r4, lsl #2]
-    6198:	eb0037b8 	bl	14080 <__aeabi_fsub>
-    619c:	e7870104 	str	r0, [r7, r4, lsl #2]
-    61a0:	e2844001 	add	r4, r4, #1	; 0x1
-    61a4:	e15a0004 	cmp	sl, r4
-    61a8:	1afffff8 	bne	6190 <subMatrix+0x4c>
-    61ac:	e59d3000 	ldr	r3, [sp]
-    61b0:	e2899001 	add	r9, r9, #1	; 0x1
-    61b4:	e1530009 	cmp	r3, r9
-    61b8:	e2888004 	add	r8, r8, #4	; 0x4
-    61bc:	1affffeb 	bne	6170 <subMatrix+0x2c>
-    61c0:	e28dd00c 	add	sp, sp, #12	; 0xc
-    61c4:	e8bd4ff0 	ldmia	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
-    61c8:	e12fff1e 	bx	lr
-
-000061cc <subVector>:
-    61cc:	e92d45f0 	stmdb	sp!, {r4, r5, r6, r7, r8, sl, lr}
-    61d0:	e253a000 	subs	sl, r3, #0	; 0x0
-    61d4:	e1a08000 	mov	r8, r0
-    61d8:	e1a07001 	mov	r7, r1
-    61dc:	e1a06002 	mov	r6, r2
-    61e0:	da000009 	ble	620c <subVector+0x40>
-    61e4:	e3a05000 	mov	r5, #0	; 0x0
-    61e8:	e1a04005 	mov	r4, r5
-    61ec:	e7940008 	ldr	r0, [r4, r8]
-    61f0:	e7941007 	ldr	r1, [r4, r7]
-    61f4:	eb0037a1 	bl	14080 <__aeabi_fsub>
-    61f8:	e2855001 	add	r5, r5, #1	; 0x1
-    61fc:	e15a0005 	cmp	sl, r5
-    6200:	e7840006 	str	r0, [r4, r6]
-    6204:	e2844004 	add	r4, r4, #4	; 0x4
-    6208:	1afffff7 	bne	61ec <subVector+0x20>
-    620c:	e8bd45f0 	ldmia	sp!, {r4, r5, r6, r7, r8, sl, lr}
-    6210:	e12fff1e 	bx	lr
-
-00006214 <subVector2>:
-    6214:	e92d4070 	stmdb	sp!, {r4, r5, r6, lr}
-    6218:	e1a04000 	mov	r4, r0
-    621c:	e1a06001 	mov	r6, r1
-    6220:	e5900000 	ldr	r0, [r0]
-    6224:	e5911000 	ldr	r1, [r1]
-    6228:	e1a05002 	mov	r5, r2
-    622c:	eb003793 	bl	14080 <__aeabi_fsub>
-    6230:	e5850000 	str	r0, [r5]
-    6234:	e5940004 	ldr	r0, [r4, #4]
-    6238:	e5961004 	ldr	r1, [r6, #4]
-    623c:	eb00378f 	bl	14080 <__aeabi_fsub>
-    6240:	e5850004 	str	r0, [r5, #4]
-    6244:	e8bd4070 	ldmia	sp!, {r4, r5, r6, lr}
-    6248:	e12fff1e 	bx	lr
-
-0000624c <negMatrix>:
-    624c:	e92d4070 	stmdb	sp!, {r4, r5, r6, lr}
-    6250:	e2515000 	subs	r5, r1, #0	; 0x0
-    6254:	e1a06000 	mov	r6, r0
-    6258:	c3a04000 	movgt	r4, #0	; 0x0
-    625c:	e1a00002 	mov	r0, r2
-    6260:	da00000e 	ble	62a0 <negMatrix+0x54>
-    6264:	e3500000 	cmp	r0, #0	; 0x0
-    6268:	da000009 	ble	6294 <negMatrix+0x48>
-    626c:	e3a0c000 	mov	ip, #0	; 0x0
-    6270:	e7961104 	ldr	r1, [r6, r4, lsl #2]
-    6274:	e1a0e00c 	mov	lr, ip
-    6278:	e79c3001 	ldr	r3, [ip, r1]
-    627c:	e28ee001 	add	lr, lr, #1	; 0x1
-    6280:	e2832102 	add	r2, r3, #-2147483648	; 0x80000000
-    6284:	e150000e 	cmp	r0, lr
-    6288:	e78c2001 	str	r2, [ip, r1]
-    628c:	e28cc004 	add	ip, ip, #4	; 0x4
-    6290:	1afffff8 	bne	6278 <negMatrix+0x2c>
-    6294:	e2844001 	add	r4, r4, #1	; 0x1
-    6298:	e1550004 	cmp	r5, r4
-    629c:	1afffff0 	bne	6264 <negMatrix+0x18>
-    62a0:	e8bd4070 	ldmia	sp!, {r4, r5, r6, lr}
-    62a4:	e12fff1e 	bx	lr
-
-000062a8 <multMatrix>:
-    62a8:	e92d4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
-    62ac:	e24dd010 	sub	sp, sp, #16	; 0x10
-    62b0:	e59dc038 	ldr	ip, [sp, #56]
-    62b4:	e35c0000 	cmp	ip, #0	; 0x0
-    62b8:	e58d2004 	str	r2, [sp, #4]
-    62bc:	c3a02000 	movgt	r2, #0	; 0x0
-    62c0:	e58d0008 	str	r0, [sp, #8]
-    62c4:	e1a0a001 	mov	sl, r1
-    62c8:	e58d3000 	str	r3, [sp]
-    62cc:	e59db034 	ldr	fp, [sp, #52]
-    62d0:	c58d200c 	strgt	r2, [sp, #12]
-    62d4:	da000025 	ble	6370 <multMatrix+0xc8>
-    62d8:	e59d3000 	ldr	r3, [sp]
-    62dc:	e3530000 	cmp	r3, #0	; 0x0
-    62e0:	da00001c 	ble	6358 <multMatrix+0xb0>
-    62e4:	e59dc00c 	ldr	ip, [sp, #12]
-    62e8:	e3a08000 	mov	r8, #0	; 0x0
-    62ec:	e1a0710c 	mov	r7, ip, lsl #2
-    62f0:	e1a09008 	mov	r9, r8
-    62f4:	e35b0000 	cmp	fp, #0	; 0x0
-    62f8:	d3a05000 	movle	r5, #0	; 0x0
-    62fc:	da00000e 	ble	633c <multMatrix+0x94>
-    6300:	e59d3008 	ldr	r3, [sp, #8]
-    6304:	e7986003 	ldr	r6, [r8, r3]
-    6308:	e3a05000 	mov	r5, #0	; 0x0
-    630c:	e3a04000 	mov	r4, #0	; 0x0
-    6310:	e79a3104 	ldr	r3, [sl, r4, lsl #2]
-    6314:	e7960104 	ldr	r0, [r6, r4, lsl #2]
-    6318:	e7931007 	ldr	r1, [r3, r7]
-    631c:	eb003800 	bl	14324 <__aeabi_fmul>
-    6320:	e1a01000 	mov	r1, r0
-    6324:	e1a00005 	mov	r0, r5
-    6328:	eb003755 	bl	14084 <__addsf3>
-    632c:	e2844001 	add	r4, r4, #1	; 0x1
-    6330:	e15b0004 	cmp	fp, r4
-    6334:	e1a05000 	mov	r5, r0
-    6338:	1afffff4 	bne	6310 <multMatrix+0x68>
-    633c:	e89d1004 	ldmia	sp, {r2, ip}
-    6340:	e79c3008 	ldr	r3, [ip, r8]
-    6344:	e2899001 	add	r9, r9, #1	; 0x1
-    6348:	e1520009 	cmp	r2, r9
-    634c:	e7835007 	str	r5, [r3, r7]
-    6350:	e2888004 	add	r8, r8, #4	; 0x4
-    6354:	1affffe6 	bne	62f4 <multMatrix+0x4c>
-    6358:	e59dc00c 	ldr	ip, [sp, #12]
-    635c:	e59d2038 	ldr	r2, [sp, #56]
-    6360:	e28cc001 	add	ip, ip, #1	; 0x1
-    6364:	e152000c 	cmp	r2, ip
-    6368:	e58dc00c 	str	ip, [sp, #12]
-    636c:	1affffd9 	bne	62d8 <multMatrix+0x30>
-    6370:	e28dd010 	add	sp, sp, #16	; 0x10
-    6374:	e8bd4ff0 	ldmia	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
-    6378:	e12fff1e 	bx	lr
-
-0000637c <multMatrix2>:
-    637c:	e92d4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
-    6380:	e1a0b000 	mov	fp, r0
-    6384:	e1a09002 	mov	r9, r2
-    6388:	e1a08001 	mov	r8, r1
-    638c:	e3a0a000 	mov	sl, #0	; 0x0
-    6390:	e1a0500b 	mov	r5, fp
-    6394:	e089710a 	add	r7, r9, sl, lsl #2
-    6398:	e3a06000 	mov	r6, #0	; 0x0
-    639c:	e5950000 	ldr	r0, [r5]
-    63a0:	e5981000 	ldr	r1, [r8]
-    63a4:	eb0037de 	bl	14324 <__aeabi_fmul>
-    63a8:	e3a01000 	mov	r1, #0	; 0x0
-    63ac:	eb003734 	bl	14084 <__addsf3>
-    63b0:	e5981008 	ldr	r1, [r8, #8]
-    63b4:	e1a04000 	mov	r4, r0
-    63b8:	e5950004 	ldr	r0, [r5, #4]
-    63bc:	eb0037d8 	bl	14324 <__aeabi_fmul>
-    63c0:	e1a01004 	mov	r1, r4
-    63c4:	eb00372e 	bl	14084 <__addsf3>
-    63c8:	e2866001 	add	r6, r6, #1	; 0x1
-    63cc:	e3560002 	cmp	r6, #2	; 0x2
-    63d0:	e4870008 	str	r0, [r7], #8
-    63d4:	e2855008 	add	r5, r5, #8	; 0x8
-    63d8:	1affffef 	bne	639c <multMatrix2+0x20>
-    63dc:	e28aa001 	add	sl, sl, #1	; 0x1
-    63e0:	e35a0002 	cmp	sl, #2	; 0x2
-    63e4:	e2888004 	add	r8, r8, #4	; 0x4
-    63e8:	1affffe8 	bne	6390 <multMatrix2+0x14>
-    63ec:	e8bd4ff0 	ldmia	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
-    63f0:	e12fff1e 	bx	lr
-
-000063f4 <multMatVec>:
-    63f4:	e92d4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
-    63f8:	e3530000 	cmp	r3, #0	; 0x0
-    63fc:	e24dd00c 	sub	sp, sp, #12	; 0xc
-    6400:	c3a09000 	movgt	r9, #0	; 0x0
-    6404:	e58d3000 	str	r3, [sp]
-    6408:	e58d0008 	str	r0, [sp, #8]
-    640c:	e1a08001 	mov	r8, r1
-    6410:	e58d2004 	str	r2, [sp, #4]
-    6414:	e59da030 	ldr	sl, [sp, #48]
-    6418:	c1a0b009 	movgt	fp, r9
-    641c:	da000019 	ble	6488 <multMatVec+0x94>
-    6420:	e35a0000 	cmp	sl, #0	; 0x0
-    6424:	d3a06000 	movle	r6, #0	; 0x0
-    6428:	da00000f 	ble	646c <multMatVec+0x78>
-    642c:	e59d3008 	ldr	r3, [sp, #8]
-    6430:	e3a05000 	mov	r5, #0	; 0x0
-    6434:	e7997003 	ldr	r7, [r9, r3]
-    6438:	e3a06000 	mov	r6, #0	; 0x0
-    643c:	e1a04005 	mov	r4, r5
-    6440:	e7941008 	ldr	r1, [r4, r8]
-    6444:	e7940007 	ldr	r0, [r4, r7]
-    6448:	eb0037b5 	bl	14324 <__aeabi_fmul>
-    644c:	e1a01000 	mov	r1, r0
-    6450:	e1a00006 	mov	r0, r6
-    6454:	eb00370a 	bl	14084 <__addsf3>
-    6458:	e2855001 	add	r5, r5, #1	; 0x1
-    645c:	e15a0005 	cmp	sl, r5
-    6460:	e1a06000 	mov	r6, r0
-    6464:	e2844004 	add	r4, r4, #4	; 0x4
-    6468:	1afffff4 	bne	6440 <multMatVec+0x4c>
-    646c:	e59d3000 	ldr	r3, [sp]
-    6470:	e28bb001 	add	fp, fp, #1	; 0x1
-    6474:	e153000b 	cmp	r3, fp
-    6478:	e59d3004 	ldr	r3, [sp, #4]
-    647c:	e7896003 	str	r6, [r9, r3]
-    6480:	e2899004 	add	r9, r9, #4	; 0x4
-    6484:	1affffe5 	bne	6420 <multMatVec+0x2c>
-    6488:	e28dd00c 	add	sp, sp, #12	; 0xc
-    648c:	e8bd4ff0 	ldmia	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
-    6490:	e12fff1e 	bx	lr
-
-00006494 <multMatVec2>:
-    6494:	e92d41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
-    6498:	e1a07001 	mov	r7, r1
-    649c:	e1a08002 	mov	r8, r2
-    64a0:	e1a05000 	mov	r5, r0
-    64a4:	e3a06000 	mov	r6, #0	; 0x0
-    64a8:	e5950000 	ldr	r0, [r5]
-    64ac:	e5971000 	ldr	r1, [r7]
-    64b0:	eb00379b 	bl	14324 <__aeabi_fmul>
-    64b4:	e3a01000 	mov	r1, #0	; 0x0
-    64b8:	eb0036f1 	bl	14084 <__addsf3>
-    64bc:	e5971004 	ldr	r1, [r7, #4]
-    64c0:	e1a04000 	mov	r4, r0
-    64c4:	e5950004 	ldr	r0, [r5, #4]
-    64c8:	eb003795 	bl	14324 <__aeabi_fmul>
-    64cc:	e1a01004 	mov	r1, r4
-    64d0:	eb0036eb 	bl	14084 <__addsf3>
-    64d4:	e7860008 	str	r0, [r6, r8]
-    64d8:	e2866004 	add	r6, r6, #4	; 0x4
-    64dc:	e3560008 	cmp	r6, #8	; 0x8
-    64e0:	e2855008 	add	r5, r5, #8	; 0x8
-    64e4:	1affffef 	bne	64a8 <multMatVec2+0x14>
-    64e8:	e8bd41f0 	ldmia	sp!, {r4, r5, r6, r7, r8, lr}
-    64ec:	e12fff1e 	bx	lr
-
-000064f0 <transpose>:
-    64f0:	e92d41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
-    64f4:	e2527000 	subs	r7, r2, #0	; 0x0
-    64f8:	e1a08000 	mov	r8, r0
-    64fc:	e1a05001 	mov	r5, r1
-    6500:	e1a04003 	mov	r4, r3
-    6504:	c3a06000 	movgt	r6, #0	; 0x0
-    6508:	da00000f 	ble	654c <transpose+0x5c>
-    650c:	e3540000 	cmp	r4, #0	; 0x0
-    6510:	da00000a 	ble	6540 <transpose+0x50>
-    6514:	e3a0c000 	mov	ip, #0	; 0x0
-    6518:	e7980106 	ldr	r0, [r8, r6, lsl #2]
-    651c:	e1a01106 	mov	r1, r6, lsl #2
-    6520:	e1a0e00c 	mov	lr, ip
-    6524:	e79c2005 	ldr	r2, [ip, r5]
-    6528:	e79c3000 	ldr	r3, [ip, r0]
-    652c:	e28ee001 	add	lr, lr, #1	; 0x1
-    6530:	e154000e 	cmp	r4, lr
-    6534:	e7823001 	str	r3, [r2, r1]
-    6538:	e28cc004 	add	ip, ip, #4	; 0x4
-    653c:	1afffff8 	bne	6524 <transpose+0x34>
-    6540:	e2866001 	add	r6, r6, #1	; 0x1
-    6544:	e1570006 	cmp	r7, r6
-    6548:	1affffef 	bne	650c <transpose+0x1c>
-    654c:	e8bd41f0 	ldmia	sp!, {r4, r5, r6, r7, r8, lr}
-    6550:	e12fff1e 	bx	lr
-
-00006554 <invert3>:
-    6554:	e92d4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
-    6558:	e8900420 	ldmia	r0, {r5, sl}
-    655c:	e5954000 	ldr	r4, [r5]
-    6560:	e24dd004 	sub	sp, sp, #4	; 0x4
-    6564:	e5907008 	ldr	r7, [r0, #8]
-    6568:	e58d1000 	str	r1, [sp]
-    656c:	e1a00004 	mov	r0, r4
-    6570:	e59a1004 	ldr	r1, [sl, #4]
-    6574:	eb00376a 	bl	14324 <__aeabi_fmul>
-    6578:	e5971008 	ldr	r1, [r7, #8]
-    657c:	eb003768 	bl	14324 <__aeabi_fmul>
-    6580:	e59ab008 	ldr	fp, [sl, #8]
-    6584:	e1a06000 	mov	r6, r0
-    6588:	e1a0100b 	mov	r1, fp
-    658c:	e1a00004 	mov	r0, r4
-    6590:	eb003763 	bl	14324 <__aeabi_fmul>
-    6594:	e5971004 	ldr	r1, [r7, #4]
-    6598:	eb003761 	bl	14324 <__aeabi_fmul>
-    659c:	e1a01000 	mov	r1, r0
-    65a0:	e1a00006 	mov	r0, r6
-    65a4:	eb0036b5 	bl	14080 <__aeabi_fsub>
-    65a8:	e59a6000 	ldr	r6, [sl]
-    65ac:	e5959004 	ldr	r9, [r5, #4]
-    65b0:	e1a04000 	mov	r4, r0
-    65b4:	e1a01009 	mov	r1, r9
-    65b8:	e1a00006 	mov	r0, r6
-    65bc:	eb003758 	bl	14324 <__aeabi_fmul>
-    65c0:	e1a01000 	mov	r1, r0
-    65c4:	e5970008 	ldr	r0, [r7, #8]
-    65c8:	eb003755 	bl	14324 <__aeabi_fmul>
-    65cc:	e1a01000 	mov	r1, r0
-    65d0:	e1a00004 	mov	r0, r4
-    65d4:	eb0036a9 	bl	14080 <__aeabi_fsub>
-    65d8:	e5958008 	ldr	r8, [r5, #8]
-    65dc:	e1a04000 	mov	r4, r0
-    65e0:	e1a01008 	mov	r1, r8
-    65e4:	e1a00006 	mov	r0, r6
-    65e8:	eb00374d 	bl	14324 <__aeabi_fmul>
-    65ec:	e1a01000 	mov	r1, r0
-    65f0:	e5970004 	ldr	r0, [r7, #4]
-    65f4:	eb00374a 	bl	14324 <__aeabi_fmul>
-    65f8:	e1a01000 	mov	r1, r0
-    65fc:	e1a00004 	mov	r0, r4
-    6600:	eb00369f 	bl	14084 <__addsf3>
-    6604:	e5976000 	ldr	r6, [r7]
-    6608:	e1a04000 	mov	r4, r0
-    660c:	e1a01006 	mov	r1, r6
-    6610:	e1a00009 	mov	r0, r9
-    6614:	eb003742 	bl	14324 <__aeabi_fmul>
-    6618:	e1a01000 	mov	r1, r0
-    661c:	e1a0000b 	mov	r0, fp
-    6620:	eb00373f 	bl	14324 <__aeabi_fmul>
-    6624:	e1a01000 	mov	r1, r0
-    6628:	e1a00004 	mov	r0, r4
-    662c:	eb003694 	bl	14084 <__addsf3>
-    6630:	e1a01006 	mov	r1, r6
-    6634:	e1a04000 	mov	r4, r0
-    6638:	e1a00008 	mov	r0, r8
-    663c:	eb003738 	bl	14324 <__aeabi_fmul>
-    6640:	e1a01000 	mov	r1, r0
-    6644:	e59a0004 	ldr	r0, [sl, #4]
-    6648:	eb003735 	bl	14324 <__aeabi_fmul>
-    664c:	e1a01000 	mov	r1, r0
-    6650:	e1a00004 	mov	r0, r4
-    6654:	eb003689 	bl	14080 <__aeabi_fsub>
-    6658:	e5971008 	ldr	r1, [r7, #8]
-    665c:	e1a08000 	mov	r8, r0
-    6660:	e59a0004 	ldr	r0, [sl, #4]
-    6664:	eb00372e 	bl	14324 <__aeabi_fmul>
-    6668:	e5971004 	ldr	r1, [r7, #4]
-    666c:	e1a04000 	mov	r4, r0
-    6670:	e1a0000b 	mov	r0, fp
-    6674:	eb00372a 	bl	14324 <__aeabi_fmul>
-    6678:	e1a01000 	mov	r1, r0
-    667c:	e1a00004 	mov	r0, r4
-    6680:	eb00367e 	bl	14080 <__aeabi_fsub>
-    6684:	e1a01008 	mov	r1, r8
-    6688:	eb00378b 	bl	144bc <__aeabi_fdiv>
-    668c:	e59d3000 	ldr	r3, [sp]
-    6690:	e5936000 	ldr	r6, [r3]
-    6694:	e5860000 	str	r0, [r6]
-    6698:	e5953004 	ldr	r3, [r5, #4]
-    669c:	e5971008 	ldr	r1, [r7, #8]
-    66a0:	e2830102 	add	r0, r3, #-2147483648	; 0x80000000
-    66a4:	eb00371e 	bl	14324 <__aeabi_fmul>
-    66a8:	e5971004 	ldr	r1, [r7, #4]
-    66ac:	e1a04000 	mov	r4, r0
-    66b0:	e5950008 	ldr	r0, [r5, #8]
-    66b4:	eb00371a 	bl	14324 <__aeabi_fmul>
-    66b8:	e1a01000 	mov	r1, r0
-    66bc:	e1a00004 	mov	r0, r4
-    66c0:	eb00366f 	bl	14084 <__addsf3>
-    66c4:	e1a01008 	mov	r1, r8
-    66c8:	eb00377b 	bl	144bc <__aeabi_fdiv>
-    66cc:	e5860004 	str	r0, [r6, #4]
-    66d0:	e59a1008 	ldr	r1, [sl, #8]
-    66d4:	e5950004 	ldr	r0, [r5, #4]
-    66d8:	eb003711 	bl	14324 <__aeabi_fmul>
-    66dc:	e59a1004 	ldr	r1, [sl, #4]
-    66e0:	e1a04000 	mov	r4, r0
-    66e4:	e5950008 	ldr	r0, [r5, #8]
-    66e8:	eb00370d 	bl	14324 <__aeabi_fmul>
-    66ec:	e1a01000 	mov	r1, r0
-    66f0:	e1a00004 	mov	r0, r4
-    66f4:	eb003661 	bl	14080 <__aeabi_fsub>
-    66f8:	e1a01008 	mov	r1, r8
-    66fc:	eb00376e 	bl	144bc <__aeabi_fdiv>
-    6700:	e5860008 	str	r0, [r6, #8]
-    6704:	e59a3000 	ldr	r3, [sl]
-    6708:	e5971008 	ldr	r1, [r7, #8]
-    670c:	e2830102 	add	r0, r3, #-2147483648	; 0x80000000
-    6710:	eb003703 	bl	14324 <__aeabi_fmul>
-    6714:	e5971000 	ldr	r1, [r7]
-    6718:	e1a04000 	mov	r4, r0
-    671c:	e59a0008 	ldr	r0, [sl, #8]
-    6720:	eb0036ff 	bl	14324 <__aeabi_fmul>
-    6724:	e1a01000 	mov	r1, r0
-    6728:	e1a00004 	mov	r0, r4
-    672c:	eb003654 	bl	14084 <__addsf3>
-    6730:	e1a01008 	mov	r1, r8
-    6734:	eb003760 	bl	144bc <__aeabi_fdiv>
-    6738:	e59d3000 	ldr	r3, [sp]
-    673c:	e5936004 	ldr	r6, [r3, #4]
-    6740:	e5860000 	str	r0, [r6]
-    6744:	e5971008 	ldr	r1, [r7, #8]
-    6748:	e5950000 	ldr	r0, [r5]
-    674c:	eb0036f4 	bl	14324 <__aeabi_fmul>
-    6750:	e5971000 	ldr	r1, [r7]
-    6754:	e1a04000 	mov	r4, r0
-    6758:	e5950008 	ldr	r0, [r5, #8]
-    675c:	eb0036f0 	bl	14324 <__aeabi_fmul>
-    6760:	e1a01000 	mov	r1, r0
-    6764:	e1a00004 	mov	r0, r4
-    6768:	eb003644 	bl	14080 <__aeabi_fsub>
-    676c:	e1a01008 	mov	r1, r8
-    6770:	eb003751 	bl	144bc <__aeabi_fdiv>
-    6774:	e5860004 	str	r0, [r6, #4]
-    6778:	e5953000 	ldr	r3, [r5]
-    677c:	e59a1008 	ldr	r1, [sl, #8]
-    6780:	e2830102 	add	r0, r3, #-2147483648	; 0x80000000
-    6784:	eb0036e6 	bl	14324 <__aeabi_fmul>
-    6788:	e59a1000 	ldr	r1, [sl]
-    678c:	e1a04000 	mov	r4, r0
-    6790:	e5950008 	ldr	r0, [r5, #8]
-    6794:	eb0036e2 	bl	14324 <__aeabi_fmul>
-    6798:	e1a01000 	mov	r1, r0
-    679c:	e1a00004 	mov	r0, r4
-    67a0:	eb003637 	bl	14084 <__addsf3>
-    67a4:	e1a01008 	mov	r1, r8
-    67a8:	eb003743 	bl	144bc <__aeabi_fdiv>
-    67ac:	e5860008 	str	r0, [r6, #8]
-    67b0:	e5971004 	ldr	r1, [r7, #4]
-    67b4:	e59a0000 	ldr	r0, [sl]
-    67b8:	eb0036d9 	bl	14324 <__aeabi_fmul>
-    67bc:	e5971000 	ldr	r1, [r7]
-    67c0:	e1a04000 	mov	r4, r0
-    67c4:	e59a0004 	ldr	r0, [sl, #4]
-    67c8:	eb0036d5 	bl	14324 <__aeabi_fmul>
-    67cc:	e1a01000 	mov	r1, r0
-    67d0:	e1a00004 	mov	r0, r4
-    67d4:	eb003629 	bl	14080 <__aeabi_fsub>
-    67d8:	e1a01008 	mov	r1, r8
-    67dc:	eb003736 	bl	144bc <__aeabi_fdiv>
-    67e0:	e59d3000 	ldr	r3, [sp]
-    67e4:	e5936008 	ldr	r6, [r3, #8]
-    67e8:	e5860000 	str	r0, [r6]
-    67ec:	e5953000 	ldr	r3, [r5]
-    67f0:	e5971004 	ldr	r1, [r7, #4]
-    67f4:	e2830102 	add	r0, r3, #-2147483648	; 0x80000000
-    67f8:	eb0036c9 	bl	14324 <__aeabi_fmul>
-    67fc:	e5971000 	ldr	r1, [r7]
-    6800:	e1a04000 	mov	r4, r0
-    6804:	e5950004 	ldr	r0, [r5, #4]
-    6808:	eb0036c5 	bl	14324 <__aeabi_fmul>
-    680c:	e1a01000 	mov	r1, r0
-    6810:	e1a00004 	mov	r0, r4
-    6814:	eb00361a 	bl	14084 <__addsf3>
-    6818:	e1a01008 	mov	r1, r8
-    681c:	eb003726 	bl	144bc <__aeabi_fdiv>
-    6820:	e5860004 	str	r0, [r6, #4]
-    6824:	e59a1004 	ldr	r1, [sl, #4]
-    6828:	e5950000 	ldr	r0, [r5]
-    682c:	eb0036bc 	bl	14324 <__aeabi_fmul>
-    6830:	e59a1000 	ldr	r1, [sl]
-    6834:	e1a04000 	mov	r4, r0
-    6838:	e5950004 	ldr	r0, [r5, #4]
-    683c:	eb0036b8 	bl	14324 <__aeabi_fmul>
-    6840:	e1a01000 	mov	r1, r0
-    6844:	e1a00004 	mov	r0, r4
-    6848:	eb00360c 	bl	14080 <__aeabi_fsub>
-    684c:	e1a01008 	mov	r1, r8
-    6850:	eb003719 	bl	144bc <__aeabi_fdiv>
-    6854:	e5860008 	str	r0, [r6, #8]
-    6858:	e28dd004 	add	sp, sp, #4	; 0x4
-    685c:	e8bd4ff0 	ldmia	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
-    6860:	e12fff1e 	bx	lr
-
-00006864 <invert2>:
-    6864:	e92d40f0 	stmdb	sp!, {r4, r5, r6, r7, lr}
-    6868:	e590700c 	ldr	r7, [r0, #12]
-    686c:	e1a04000 	mov	r4, r0
-    6870:	e1a06001 	mov	r6, r1
-    6874:	e1a00007 	mov	r0, r7
-    6878:	e5941000 	ldr	r1, [r4]
-    687c:	eb0036a8 	bl	14324 <__aeabi_fmul>
-    6880:	e5941008 	ldr	r1, [r4, #8]
-    6884:	e1a05000 	mov	r5, r0
-    6888:	e5940004 	ldr	r0, [r4, #4]
-    688c:	eb0036a4 	bl	14324 <__aeabi_fmul>
-    6890:	e1a01000 	mov	r1, r0
-    6894:	e1a00005 	mov	r0, r5
-    6898:	eb0035f8 	bl	14080 <__aeabi_fsub>
-    689c:	e1a05000 	mov	r5, r0
-    68a0:	e1a01005 	mov	r1, r5
-    68a4:	e1a00007 	mov	r0, r7
-    68a8:	eb003703 	bl	144bc <__aeabi_fdiv>
-    68ac:	e5860000 	str	r0, [r6]
-    68b0:	e5943004 	ldr	r3, [r4, #4]
-    68b4:	e1a01005 	mov	r1, r5
-    68b8:	e2830102 	add	r0, r3, #-2147483648	; 0x80000000
-    68bc:	eb0036fe 	bl	144bc <__aeabi_fdiv>
-    68c0:	e5860004 	str	r0, [r6, #4]
-    68c4:	e5943008 	ldr	r3, [r4, #8]
-    68c8:	e1a01005 	mov	r1, r5
-    68cc:	e2830102 	add	r0, r3, #-2147483648	; 0x80000000
-    68d0:	eb0036f9 	bl	144bc <__aeabi_fdiv>
-    68d4:	e5860008 	str	r0, [r6, #8]
-    68d8:	e1a01005 	mov	r1, r5
-    68dc:	e5940000 	ldr	r0, [r4]
-    68e0:	eb0036f5 	bl	144bc <__aeabi_fdiv>
-    68e4:	e2866008 	add	r6, r6, #8	; 0x8
-    68e8:	e5860004 	str	r0, [r6, #4]
-    68ec:	e8bd40f0 	ldmia	sp!, {r4, r5, r6, r7, lr}
-    68f0:	e12fff1e 	bx	lr
-
-000068f4 <determinant>:
-    68f4:	e92d4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
-    68f8:	e252a000 	subs	sl, r2, #0	; 0x0
-    68fc:	e24dd00c 	sub	sp, sp, #12	; 0xc
-    6900:	c3a04000 	movgt	r4, #0	; 0x0
-    6904:	e58d1000 	str	r1, [sp]
-    6908:	d3a005fe 	movle	r0, #1065353216	; 0x3f800000
-    690c:	c1a05004 	movgt	r5, r4
-    6910:	da00003f 	ble	6a14 <determinant+0x120>
-    6914:	e59d3000 	ldr	r3, [sp]
-    6918:	e3a01000 	mov	r1, #0	; 0x0
-    691c:	e794e003 	ldr	lr, [r4, r3]
-    6920:	e1a0c001 	mov	ip, r1
-    6924:	e7913000 	ldr	r3, [r1, r0]
-    6928:	e28cc001 	add	ip, ip, #1	; 0x1
-    692c:	e7932004 	ldr	r2, [r3, r4]
-    6930:	e15a000c 	cmp	sl, ip
-    6934:	e781200e 	str	r2, [r1, lr]
-    6938:	e2811004 	add	r1, r1, #4	; 0x4
-    693c:	1afffff8 	bne	6924 <determinant+0x30>
-    6940:	e2855001 	add	r5, r5, #1	; 0x1
-    6944:	e15a0005 	cmp	sl, r5
-    6948:	e2844004 	add	r4, r4, #4	; 0x4
-    694c:	1afffff0 	bne	6914 <determinant+0x20>
-    6950:	e3a02000 	mov	r2, #0	; 0x0
-    6954:	e58d2004 	str	r2, [sp, #4]
-    6958:	e58d2008 	str	r2, [sp, #8]
-    695c:	e89d000c 	ldmia	sp, {r2, r3}
-    6960:	e7938002 	ldr	r8, [r3, r2]
-    6964:	e3a09000 	mov	r9, #0	; 0x0
-    6968:	e088b003 	add	fp, r8, r3
-    696c:	e89d000c 	ldmia	sp, {r2, r3}
-    6970:	e7926109 	ldr	r6, [r2, r9, lsl #2]
-    6974:	e59b1000 	ldr	r1, [fp]
-    6978:	e7960003 	ldr	r0, [r6, r3]
-    697c:	eb0036ce 	bl	144bc <__aeabi_fdiv>
-    6980:	e59d2008 	ldr	r2, [sp, #8]
-    6984:	e1520009 	cmp	r2, r9
-    6988:	e1a07000 	mov	r7, r0
-    698c:	0a00000c 	beq	69c4 <determinant+0xd0>
-    6990:	e3a05000 	mov	r5, #0	; 0x0
-    6994:	e1a04005 	mov	r4, r5
-    6998:	e7941008 	ldr	r1, [r4, r8]
-    699c:	e7940006 	ldr	r0, [r4, r6]
-    69a0:	eb0035b6 	bl	14080 <__aeabi_fsub>
-    69a4:	e1a01000 	mov	r1, r0
-    69a8:	e1a00007 	mov	r0, r7
-    69ac:	eb00365c 	bl	14324 <__aeabi_fmul>
-    69b0:	e2855001 	add	r5, r5, #1	; 0x1
-    69b4:	e15a0005 	cmp	sl, r5
-    69b8:	e7840006 	str	r0, [r4, r6]
-    69bc:	e2844004 	add	r4, r4, #4	; 0x4
-    69c0:	1afffff4 	bne	6998 <determinant+0xa4>
-    69c4:	e2899001 	add	r9, r9, #1	; 0x1
-    69c8:	e15a0009 	cmp	sl, r9
-    69cc:	1affffe6 	bne	696c <determinant+0x78>
-    69d0:	e99d000c 	ldmib	sp, {r2, r3}
-    69d4:	e2833001 	add	r3, r3, #1	; 0x1
-    69d8:	e2822004 	add	r2, r2, #4	; 0x4
-    69dc:	e15a0003 	cmp	sl, r3
-    69e0:	e98d000c 	stmib	sp, {r2, r3}
-    69e4:	1affffdc 	bne	695c <determinant+0x68>
-    69e8:	e3a05000 	mov	r5, #0	; 0x0
-    69ec:	e3a005fe 	mov	r0, #1065353216	; 0x3f800000
-    69f0:	e1a04005 	mov	r4, r5
-    69f4:	e59d2000 	ldr	r2, [sp]
-    69f8:	e7943002 	ldr	r3, [r4, r2]
-    69fc:	e2855001 	add	r5, r5, #1	; 0x1
-    6a00:	e7931004 	ldr	r1, [r3, r4]
-    6a04:	eb003646 	bl	14324 <__aeabi_fmul>
-    6a08:	e15a0005 	cmp	sl, r5
-    6a0c:	e2844004 	add	r4, r4, #4	; 0x4
-    6a10:	1afffff7 	bne	69f4 <determinant+0x100>
-    6a14:	e28dd00c 	add	sp, sp, #12	; 0xc
-    6a18:	e8bd4ff0 	ldmia	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
-    6a1c:	e12fff1e 	bx	lr
-
-00006a20 <getMinor>:
-    6a20:	e92d47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
-    6a24:	e252a000 	subs	sl, r2, #0	; 0x0
-    6a28:	e1a09001 	mov	r9, r1
-    6a2c:	da00001d 	ble	6aa8 <getMinor+0x88>
-    6a30:	e2438001 	sub	r8, r3, #1	; 0x1
-    6a34:	e59d3020 	ldr	r3, [sp, #32]
-    6a38:	e3a06000 	mov	r6, #0	; 0x0
-    6a3c:	e1a05000 	mov	r5, r0
-    6a40:	e2434001 	sub	r4, r3, #1	; 0x1
-    6a44:	e1a07006 	mov	r7, r6
-    6a48:	e24a0001 	sub	r0, sl, #1	; 0x1
-    6a4c:	e1580006 	cmp	r8, r6
-    6a50:	0a000010 	beq	6a98 <getMinor+0x78>
-    6a54:	e3500000 	cmp	r0, #0	; 0x0
-    6a58:	da00000d 	ble	6a94 <getMinor+0x74>
-    6a5c:	e3a0e000 	mov	lr, #0	; 0x0
-    6a60:	e7991107 	ldr	r1, [r9, r7, lsl #2]
-    6a64:	e5952000 	ldr	r2, [r5]
-    6a68:	e1a0c00e 	mov	ip, lr
-    6a6c:	e154000e 	cmp	r4, lr
-    6a70:	e082300c 	add	r3, r2, ip
-    6a74:	d5933004 	ldrle	r3, [r3, #4]
-    6a78:	c792300c 	ldrgt	r3, [r2, ip]
-    6a7c:	e28ee001 	add	lr, lr, #1	; 0x1
-    6a80:	c781300c 	strgt	r3, [r1, ip]
-    6a84:	d781300c 	strle	r3, [r1, ip]
-    6a88:	e15e0000 	cmp	lr, r0
-    6a8c:	e28cc004 	add	ip, ip, #4	; 0x4
-    6a90:	1afffff5 	bne	6a6c <getMinor+0x4c>
-    6a94:	e2877001 	add	r7, r7, #1	; 0x1
-    6a98:	e2866001 	add	r6, r6, #1	; 0x1
-    6a9c:	e15a0006 	cmp	sl, r6
-    6aa0:	e2855004 	add	r5, r5, #4	; 0x4
-    6aa4:	1affffe8 	bne	6a4c <getMinor+0x2c>
-    6aa8:	e8bd47f0 	ldmia	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
-    6aac:	e12fff1e 	bx	lr
-
-00006ab0 <invt>:
-    6ab0:	e92d4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
-    6ab4:	e24dd018 	sub	sp, sp, #24	; 0x18
-    6ab8:	e59db03c 	ldr	fp, [sp, #60]
-    6abc:	e58d1008 	str	r1, [sp, #8]
-    6ac0:	e1a08002 	mov	r8, r2
-    6ac4:	e1a01003 	mov	r1, r3
-    6ac8:	e1a0200b 	mov	r2, fp
-    6acc:	e1a09003 	mov	r9, r3
-    6ad0:	e58d000c 	str	r0, [sp, #12]
-    6ad4:	ebffff86 	bl	68f4 <determinant>
-    6ad8:	e35b0000 	cmp	fp, #0	; 0x0
-    6adc:	c24b2001 	subgt	r2, fp, #1	; 0x1
-    6ae0:	e58d0014 	str	r0, [sp, #20]
-    6ae4:	c3a03000 	movgt	r3, #0	; 0x0
-    6ae8:	c58d2004 	strgt	r2, [sp, #4]
-    6aec:	da00002a 	ble	6b9c <invt+0xec>
-    6af0:	e59d6008 	ldr	r6, [sp, #8]
-    6af4:	e1a07003 	mov	r7, r3
-    6af8:	e283a001 	add	sl, r3, #1	; 0x1
-    6afc:	e3a05000 	mov	r5, #0	; 0x0
-    6b00:	e1a03103 	mov	r3, r3, lsl #2
-    6b04:	e58d3010 	str	r3, [sp, #16]
-    6b08:	ea000009 	b	6b34 <invt+0x84>
-    6b0c:	e5964000 	ldr	r4, [r6]
-    6b10:	ebffff77 	bl	68f4 <determinant>
-    6b14:	e59d1014 	ldr	r1, [sp, #20]
-    6b18:	eb003667 	bl	144bc <__aeabi_fdiv>
-    6b1c:	e59d3010 	ldr	r3, [sp, #16]
-    6b20:	e15b0005 	cmp	fp, r5
-    6b24:	e7830004 	str	r0, [r3, r4]
-    6b28:	e2877001 	add	r7, r7, #1	; 0x1
-    6b2c:	e2866004 	add	r6, r6, #4	; 0x4
-    6b30:	0a000016 	beq	6b90 <invt+0xe0>
-    6b34:	e59d000c 	ldr	r0, [sp, #12]
-    6b38:	e1a01008 	mov	r1, r8
-    6b3c:	e1a0200b 	mov	r2, fp
-    6b40:	e2855001 	add	r5, r5, #1	; 0x1
-    6b44:	e1a0300a 	mov	r3, sl
-    6b48:	e58d5000 	str	r5, [sp]
-    6b4c:	ebffffb3 	bl	6a20 <getMinor>
-    6b50:	e3170001 	tst	r7, #1	; 0x1
-    6b54:	e1a01009 	mov	r1, r9
-    6b58:	e59d2004 	ldr	r2, [sp, #4]
-    6b5c:	e1a00008 	mov	r0, r8
-    6b60:	0affffe9 	beq	6b0c <invt+0x5c>
-    6b64:	e5964000 	ldr	r4, [r6]
-    6b68:	ebffff61 	bl	68f4 <determinant>
-    6b6c:	e59d1014 	ldr	r1, [sp, #20]
-    6b70:	e2800102 	add	r0, r0, #-2147483648	; 0x80000000
-    6b74:	eb003650 	bl	144bc <__aeabi_fdiv>
-    6b78:	e59d2010 	ldr	r2, [sp, #16]
-    6b7c:	e15b0005 	cmp	fp, r5
-    6b80:	e7820004 	str	r0, [r2, r4]
-    6b84:	e2877001 	add	r7, r7, #1	; 0x1
-    6b88:	e2866004 	add	r6, r6, #4	; 0x4
-    6b8c:	1affffe8 	bne	6b34 <invt+0x84>
-    6b90:	e155000a 	cmp	r5, sl
-    6b94:	11a0300a 	movne	r3, sl
-    6b98:	1affffd4 	bne	6af0 <invt+0x40>
-    6b9c:	e28dd018 	add	sp, sp, #24	; 0x18
-    6ba0:	e8bd4ff0 	ldmia	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
-    6ba4:	e12fff1e 	bx	lr
-
-00006ba8 <BhQhBhT>:
-    6ba8:	e92d45f0 	stmdb	sp!, {r4, r5, r6, r7, r8, sl, lr}
-    6bac:	e1a07000 	mov	r7, r0
-    6bb0:	e1a08001 	mov	r8, r1
-    6bb4:	e1a0a002 	mov	sl, r2
-    6bb8:	e3a06000 	mov	r6, #0	; 0x0
-    6bbc:	e3a05000 	mov	r5, #0	; 0x0
-    6bc0:	e3a04000 	mov	r4, #0	; 0x0
-    6bc4:	e7943007 	ldr	r3, [r4, r7]
-    6bc8:	e7940008 	ldr	r0, [r4, r8]
-    6bcc:	e7931006 	ldr	r1, [r3, r6]
-    6bd0:	eb0035d3 	bl	14324 <__aeabi_fmul>
-    6bd4:	e1a01000 	mov	r1, r0
-    6bd8:	e1a00005 	mov	r0, r5
-    6bdc:	eb003528 	bl	14084 <__addsf3>
-    6be0:	e2844004 	add	r4, r4, #4	; 0x4
-    6be4:	e354000c 	cmp	r4, #12	; 0xc
-    6be8:	e1a05000 	mov	r5, r0
-    6bec:	1afffff4 	bne	6bc4 <BhQhBhT+0x1c>
-    6bf0:	e786000a 	str	r0, [r6, sl]
-    6bf4:	e2866004 	add	r6, r6, #4	; 0x4
-    6bf8:	e356000c 	cmp	r6, #12	; 0xc
-    6bfc:	1affffee 	bne	6bbc <BhQhBhT+0x14>
-    6c00:	e3a05000 	mov	r5, #0	; 0x0
-    6c04:	e244400c 	sub	r4, r4, #12	; 0xc
-    6c08:	e7941008 	ldr	r1, [r4, r8]
-    6c0c:	e794000a 	ldr	r0, [r4, sl]
-    6c10:	eb0035c3 	bl	14324 <__aeabi_fmul>
-    6c14:	e1a01000 	mov	r1, r0
-    6c18:	e1a00005 	mov	r0, r5
-    6c1c:	eb003518 	bl	14084 <__addsf3>
-    6c20:	e2844004 	add	r4, r4, #4	; 0x4
-    6c24:	e354000c 	cmp	r4, #12	; 0xc
-    6c28:	e1a05000 	mov	r5, r0
-    6c2c:	1afffff5 	bne	6c08 <BhQhBhT+0x60>
-    6c30:	e8bd45f0 	ldmia	sp!, {r4, r5, r6, r7, r8, sl, lr}
-    6c34:	e12fff1e 	bx	lr
-
-00006c38 <VectdivSc>:
-    6c38:	e92d4070 	stmdb	sp!, {r4, r5, r6, lr}
-    6c3c:	e1a05000 	mov	r5, r0
-    6c40:	e1a06001 	mov	r6, r1
-    6c44:	e3a04000 	mov	r4, #0	; 0x0
-    6c48:	e7940005 	ldr	r0, [r4, r5]
-    6c4c:	e1a01006 	mov	r1, r6
-    6c50:	eb003619 	bl	144bc <__aeabi_fdiv>
-    6c54:	e7840005 	str	r0, [r4, r5]
-    6c58:	e2844004 	add	r4, r4, #4	; 0x4
-    6c5c:	e354000c 	cmp	r4, #12	; 0xc
-    6c60:	1afffff8 	bne	6c48 <VectdivSc+0x10>
-    6c64:	e8bd4070 	ldmia	sp!, {r4, r5, r6, lr}
-    6c68:	e12fff1e 	bx	lr
-
-00006c6c <VectmultSc2>:
-    6c6c:	e92d4070 	stmdb	sp!, {r4, r5, r6, lr}
-    6c70:	e1a04000 	mov	r4, r0
-    6c74:	e5900000 	ldr	r0, [r0]
-    6c78:	e1a06002 	mov	r6, r2
-    6c7c:	e1a05001 	mov	r5, r1
-    6c80:	eb0035a7 	bl	14324 <__aeabi_fmul>
-    6c84:	e5860000 	str	r0, [r6]
-    6c88:	e1a00005 	mov	r0, r5
-    6c8c:	e5941004 	ldr	r1, [r4, #4]
-    6c90:	eb0035a3 	bl	14324 <__aeabi_fmul>
-    6c94:	e5860004 	str	r0, [r6, #4]
-    6c98:	e8bd4070 	ldmia	sp!, {r4, r5, r6, lr}
-    6c9c:	e12fff1e 	bx	lr
-
-00006ca0 <normalizeSIAngle2Pi>:
-    6ca0:	e92d4070 	stmdb	sp!, {r4, r5, r6, lr}
-    6ca4:	e5904000 	ldr	r4, [r0]
-    6ca8:	e1a06000 	mov	r6, r0
-    6cac:	e3a01000 	mov	r1, #0	; 0x0
-    6cb0:	e1a00004 	mov	r0, r4
-    6cb4:	eb00365a 	bl	14624 <__lesf2>
-    6cb8:	e3500000 	cmp	r0, #0	; 0x0
-    6cbc:	e1a00004 	mov	r0, r4
-    6cc0:	ba000011 	blt	6d0c <normalizeSIAngle2Pi+0x6c>
-    6cc4:	e1a00004 	mov	r0, r4
-    6cc8:	eb003304 	bl	138e0 <__aeabi_f2d>
-    6ccc:	e28f2054 	add	r2, pc, #84	; 0x54
-    6cd0:	e892000c 	ldmia	r2, {r2, r3}
-    6cd4:	e1a04000 	mov	r4, r0
-    6cd8:	e1a05001 	mov	r5, r1
-    6cdc:	eb003456 	bl	13e3c <__gedf2>
-    6ce0:	e3500000 	cmp	r0, #0	; 0x0
-    6ce4:	e28f203c 	add	r2, pc, #60	; 0x3c
-    6ce8:	e892000c 	ldmia	r2, {r2, r3}
-    6cec:	e1a00004 	mov	r0, r4
-    6cf0:	e1a01005 	mov	r1, r5
-    6cf4:	ba000002 	blt	6d04 <normalizeSIAngle2Pi+0x64>
-    6cf8:	eb00321e 	bl	13578 <__aeabi_dsub>
-    6cfc:	eb0034b5 	bl	13fd8 <__aeabi_d2f>
-    6d00:	e5860000 	str	r0, [r6]
-    6d04:	e8bd4070 	ldmia	sp!, {r4, r5, r6, lr}
-    6d08:	e12fff1e 	bx	lr
-    6d0c:	eb0032f3 	bl	138e0 <__aeabi_f2d>
-    6d10:	e28f2010 	add	r2, pc, #16	; 0x10
-    6d14:	e892000c 	ldmia	r2, {r2, r3}
-    6d18:	eb003217 	bl	1357c <__adddf3>
-    6d1c:	eb0034ad 	bl	13fd8 <__aeabi_d2f>
-    6d20:	e5860000 	str	r0, [r6]
-    6d24:	eafffff6 	b	6d04 <normalizeSIAngle2Pi+0x64>
-    6d28:	401921fb 	ldrmish	r2, [r9], -fp
-    6d2c:	54442d18 	strplb	r2, [r4], #-3352
-
-00006d30 <normalizeSIAnglePi>:
-    6d30:	e92d4070 	stmdb	sp!, {r4, r5, r6, lr}
-    6d34:	e1a06000 	mov	r6, r0
-    6d38:	e5900000 	ldr	r0, [r0]
-    6d3c:	eb0032e7 	bl	138e0 <__aeabi_f2d>
-    6d40:	e28f2074 	add	r2, pc, #116	; 0x74
-    6d44:	e892000c 	ldmia	r2, {r2, r3}
-    6d48:	e1a04000 	mov	r4, r0
-    6d4c:	e1a05001 	mov	r5, r1
-    6d50:	eb00343b 	bl	13e44 <__ledf2>
-    6d54:	e3500000 	cmp	r0, #0	; 0x0
-    6d58:	e28f2064 	add	r2, pc, #100	; 0x64
-    6d5c:	e892000c 	ldmia	r2, {r2, r3}
-    6d60:	e1a00004 	mov	r0, r4
-    6d64:	e1a01005 	mov	r1, r5
-    6d68:	aa000004 	bge	6d80 <normalizeSIAnglePi+0x50>
-    6d6c:	eb003202 	bl	1357c <__adddf3>
-    6d70:	eb003498 	bl	13fd8 <__aeabi_d2f>
-    6d74:	e5860000 	str	r0, [r6]
-    6d78:	e8bd4070 	ldmia	sp!, {r4, r5, r6, lr}
-    6d7c:	e12fff1e 	bx	lr
-    6d80:	e1a01005 	mov	r1, r5
-    6d84:	e28f2040 	add	r2, pc, #64	; 0x40
-    6d88:	e892000c 	ldmia	r2, {r2, r3}
-    6d8c:	e1a00004 	mov	r0, r4
-    6d90:	eb003429 	bl	13e3c <__gedf2>
-    6d94:	e3500000 	cmp	r0, #0	; 0x0
-    6d98:	e28f2024 	add	r2, pc, #36	; 0x24
-    6d9c:	e892000c 	ldmia	r2, {r2, r3}
-    6da0:	e1a00004 	mov	r0, r4
-    6da4:	e1a01005 	mov	r1, r5
-    6da8:	bafffff2 	blt	6d78 <normalizeSIAnglePi+0x48>
-    6dac:	eb0031f1 	bl	13578 <__aeabi_dsub>
-    6db0:	eb003488 	bl	13fd8 <__aeabi_d2f>
-    6db4:	e5860000 	str	r0, [r6]
-    6db8:	eaffffee 	b	6d78 <normalizeSIAnglePi+0x48>
-    6dbc:	c00921fb 	strgtd	r2, [r9], -fp
-    6dc0:	54442d18 	strplb	r2, [r4], #-3352
-    6dc4:	401921fb 	ldrmish	r2, [r9], -fp
-    6dc8:	54442d18 	strplb	r2, [r4], #-3352
-    6dcc:	400921fb 	strmid	r2, [r9], -fp
-    6dd0:	54442d18 	strplb	r2, [r4], #-3352
-
-00006dd4 <timer0ISR>:
-    6dd4:	e1a0c00d 	mov	ip, sp
-    6dd8:	e92dd810 	stmdb	sp!, {r4, fp, ip, lr, pc}
-    6ddc:	e24cb004 	sub	fp, ip, #4	; 0x4
-    6de0:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    6de4:	e2833901 	add	r3, r3, #16384	; 0x4000
-    6de8:	e3a02001 	mov	r2, #1	; 0x1
-    6dec:	e5832000 	str	r2, [r3]
-    6df0:	e59f30d4 	ldr	r3, [pc, #212]	; 6ecc <.text+0x6ecc>
-    6df4:	e5933000 	ldr	r3, [r3]
-    6df8:	e2832001 	add	r2, r3, #1	; 0x1
-    6dfc:	e59f30c8 	ldr	r3, [pc, #200]	; 6ecc <.text+0x6ecc>
-    6e00:	e5832000 	str	r2, [r3]
-    6e04:	e59f30c0 	ldr	r3, [pc, #192]	; 6ecc <.text+0x6ecc>
-    6e08:	e5933000 	ldr	r3, [r3]
-    6e0c:	e3530ffa 	cmp	r3, #1000	; 0x3e8
-    6e10:	1a000012 	bne	6e60 <timer0ISR+0x8c>
-    6e14:	e59f20b0 	ldr	r2, [pc, #176]	; 6ecc <.text+0x6ecc>
-    6e18:	e3a03000 	mov	r3, #0	; 0x0
-    6e1c:	e5823000 	str	r3, [r2]
-    6e20:	e59f30a8 	ldr	r3, [pc, #168]	; 6ed0 <.text+0x6ed0>
-    6e24:	e1d330b4 	ldrh	r3, [r3, #4]
-    6e28:	e2833001 	add	r3, r3, #1	; 0x1
-    6e2c:	e1a03803 	mov	r3, r3, lsl #16
-    6e30:	e1a02823 	mov	r2, r3, lsr #16
-    6e34:	e59f3094 	ldr	r3, [pc, #148]	; 6ed0 <.text+0x6ed0>
-    6e38:	e1c320b4 	strh	r2, [r3, #4]
-    6e3c:	e59f3090 	ldr	r3, [pc, #144]	; 6ed4 <.text+0x6ed4>
-    6e40:	e5933000 	ldr	r3, [r3]
-    6e44:	e1a03803 	mov	r3, r3, lsl #16
-    6e48:	e1a02823 	mov	r2, r3, lsr #16
-    6e4c:	e59f307c 	ldr	r3, [pc, #124]	; 6ed0 <.text+0x6ed0>
-    6e50:	e1c321b2 	strh	r2, [r3, #18]
-    6e54:	e59f2078 	ldr	r2, [pc, #120]	; 6ed4 <.text+0x6ed4>
-    6e58:	e3a03000 	mov	r3, #0	; 0x0
-    6e5c:	e5823000 	str	r3, [r2]
-    6e60:	e59f3070 	ldr	r3, [pc, #112]	; 6ed8 <.text+0x6ed8>
-    6e64:	e5d33000 	ldrb	r3, [r3]
-    6e68:	e20330ff 	and	r3, r3, #255	; 0xff
-    6e6c:	e3530009 	cmp	r3, #9	; 0x9
-    6e70:	8a000006 	bhi	6e90 <timer0ISR+0xbc>
-    6e74:	e59f305c 	ldr	r3, [pc, #92]	; 6ed8 <.text+0x6ed8>
-    6e78:	e5d33000 	ldrb	r3, [r3]
-    6e7c:	e20330ff 	and	r3, r3, #255	; 0xff
-    6e80:	e2833001 	add	r3, r3, #1	; 0x1
-    6e84:	e20330ff 	and	r3, r3, #255	; 0xff
-    6e88:	e59f2048 	ldr	r2, [pc, #72]	; 6ed8 <.text+0x6ed8>
-    6e8c:	e5c23000 	strb	r3, [r2]
-    6e90:	e59f3044 	ldr	r3, [pc, #68]	; 6edc <.text+0x6edc>
-    6e94:	e8930006 	ldmia	r3, {r1, r2}
-    6e98:	e3a03ffa 	mov	r3, #1000	; 0x3e8
-    6e9c:	e3a04000 	mov	r4, #0	; 0x0
-    6ea0:	e0933001 	adds	r3, r3, r1
-    6ea4:	e0a44002 	adc	r4, r4, r2
-    6ea8:	e59f202c 	ldr	r2, [pc, #44]	; 6edc <.text+0x6edc>
-    6eac:	e8820018 	stmia	r2, {r3, r4}
-    6eb0:	e3a03000 	mov	r3, #0	; 0x0
-    6eb4:	e2433efd 	sub	r3, r3, #4048	; 0xfd0
-    6eb8:	e3a02000 	mov	r2, #0	; 0x0
-    6ebc:	e5832000 	str	r2, [r3]
-    6ec0:	e24bd010 	sub	sp, fp, #16	; 0x10
-    6ec4:	e89d6810 	ldmia	sp, {r4, fp, sp, lr}
-    6ec8:	e12fff1e 	bx	lr
-    6ecc:	40000894 	mulmi	r0, r4, r8
-    6ed0:	400013a0 	andmi	r1, r0, r0, lsr #7
-    6ed4:	40000888 	andmi	r0, r0, r8, lsl #17
-    6ed8:	4000088c 	andmi	r0, r0, ip, lsl #17
-    6edc:	40000858 	andmi	r0, r0, r8, asr r8
-
-00006ee0 <timer1ISR>:
-    6ee0:	e1a0c00d 	mov	ip, sp
-    6ee4:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    6ee8:	e24cb004 	sub	fp, ip, #4	; 0x4
-    6eec:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    6ef0:	e2833902 	add	r3, r3, #32768	; 0x8000
-    6ef4:	e3a02001 	mov	r2, #1	; 0x1
-    6ef8:	e5832000 	str	r2, [r3]
-    6efc:	e3a03000 	mov	r3, #0	; 0x0
-    6f00:	e2433efd 	sub	r3, r3, #4048	; 0xfd0
-    6f04:	e3a02000 	mov	r2, #0	; 0x0
-    6f08:	e5832000 	str	r2, [r3]
-    6f0c:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    6f10:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    6f14:	e12fff1e 	bx	lr
-
-00006f18 <main>:
-    6f18:	e1a0c00d 	mov	ip, sp
-    6f1c:	e92dd810 	stmdb	sp!, {r4, fp, ip, lr, pc}
-    6f20:	e24cb004 	sub	fp, ip, #4	; 0x4
-    6f24:	e24dd004 	sub	sp, sp, #4	; 0x4
-    6f28:	eb000302 	bl	7b38 <init>
-    6f2c:	eb00153d 	bl	c428 <LL_write_init>
-    6f30:	e59f22ac 	ldr	r2, [pc, #684]	; 71e4 <.text+0x71e4>
-    6f34:	e3a03000 	mov	r3, #0	; 0x0
-    6f38:	e1c230b4 	strh	r3, [r2, #4]
-    6f3c:	e59f02a4 	ldr	r0, [pc, #676]	; 71e8 <.text+0x71e8>
-    6f40:	eb003738 	bl	14c28 <__puts_from_arm>
-    6f44:	eb00044d 	bl	8080 <processorClockFrequency>
-    6f48:	e1a03000 	mov	r3, r0
-    6f4c:	e59f0298 	ldr	r0, [pc, #664]	; 71ec <.text+0x71ec>
-    6f50:	e1a01003 	mov	r1, r3
-    6f54:	eb003736 	bl	14c34 <__printf_from_arm>
-    6f58:	eb000450 	bl	80a0 <peripheralClockFrequency>
-    6f5c:	e1a03000 	mov	r3, r0
-    6f60:	e59f0288 	ldr	r0, [pc, #648]	; 71f0 <.text+0x71f0>
-    6f64:	e1a01003 	mov	r1, r3
-    6f68:	eb003731 	bl	14c34 <__printf_from_arm>
-    6f6c:	e59f3280 	ldr	r3, [pc, #640]	; 71f4 <.text+0x71f4>
-    6f70:	e5d33000 	ldrb	r3, [r3]
-    6f74:	e59f227c 	ldr	r2, [pc, #636]	; 71f8 <.text+0x71f8>
-    6f78:	e5c23000 	strb	r3, [r2]
-    6f7c:	e3a00001 	mov	r0, #1	; 0x1
-    6f80:	e3a01001 	mov	r1, #1	; 0x1
-    6f84:	eb00012c 	bl	743c <LED>
-    6f88:	ebffeb82 	bl	1d98 <sdkInit>
-    6f8c:	e3a00000 	mov	r0, #0	; 0x0
-    6f90:	eb00014c 	bl	74c8 <beeper>
-    6f94:	e3a00713 	mov	r0, #4980736	; 0x4c0000
-    6f98:	e2800c4b 	add	r0, r0, #19200	; 0x4b00
-    6f9c:	e2800040 	add	r0, r0, #64	; 0x40
-    6fa0:	ebfff295 	bl	39fc <wait>
-    6fa4:	eb0000a5 	bl	7240 <calibrate>
-    6fa8:	eaffffff 	b	6fac <main+0x94>
-    6fac:	e59f3248 	ldr	r3, [pc, #584]	; 71fc <.text+0x71fc>
-    6fb0:	e5d33000 	ldrb	r3, [r3]
-    6fb4:	e20330ff 	and	r3, r3, #255	; 0xff
-    6fb8:	e3530000 	cmp	r3, #0	; 0x0
-    6fbc:	0afffffa 	beq	6fac <main+0x94>
-    6fc0:	e59f3238 	ldr	r3, [pc, #568]	; 7200 <.text+0x7200>
-    6fc4:	e5933000 	ldr	r3, [r3]
-    6fc8:	e2832001 	add	r2, r3, #1	; 0x1
-    6fcc:	e59f322c 	ldr	r3, [pc, #556]	; 7200 <.text+0x7200>
-    6fd0:	e5832000 	str	r2, [r3]
-    6fd4:	e59f3228 	ldr	r3, [pc, #552]	; 7204 <.text+0x7204>
-    6fd8:	e5933000 	ldr	r3, [r3]
-    6fdc:	e2832001 	add	r2, r3, #1	; 0x1
-    6fe0:	e59f321c 	ldr	r3, [pc, #540]	; 7204 <.text+0x7204>
-    6fe4:	e5832000 	str	r2, [r3]
-    6fe8:	e59f3214 	ldr	r3, [pc, #532]	; 7204 <.text+0x7204>
-    6fec:	e5933000 	ldr	r3, [r3]
-    6ff0:	e3530064 	cmp	r3, #100	; 0x64
-    6ff4:	1a000002 	bne	7004 <main+0xec>
-    6ff8:	e59f2204 	ldr	r2, [pc, #516]	; 7204 <.text+0x7204>
-    6ffc:	e3a03000 	mov	r3, #0	; 0x0
-    7000:	e5823000 	str	r3, [r2]
-    7004:	e59f31fc 	ldr	r3, [pc, #508]	; 7208 <.text+0x7208>
-    7008:	e5932000 	ldr	r2, [r3]
-    700c:	e1a03002 	mov	r3, r2
-    7010:	e1a03183 	mov	r3, r3, lsl #3
-    7014:	e0623003 	rsb	r3, r2, r3
-    7018:	e1a03103 	mov	r3, r3, lsl #2
-    701c:	e0833002 	add	r3, r3, r2
-    7020:	e1a04003 	mov	r4, r3
-    7024:	e3a00002 	mov	r0, #2	; 0x2
-    7028:	eb001345 	bl	bd44 <ADC0Read>
-    702c:	e1a01000 	mov	r1, r0
-    7030:	e1a02001 	mov	r2, r1
-    7034:	e1a02102 	mov	r2, r2, lsl #2
-    7038:	e0822001 	add	r2, r2, r1
-    703c:	e1a02082 	mov	r2, r2, lsl #1
-    7040:	e0822001 	add	r2, r2, r1
-    7044:	e1a03182 	mov	r3, r2, lsl #3
-    7048:	e0623003 	rsb	r3, r2, r3
-    704c:	e1a03183 	mov	r3, r3, lsl #3
-    7050:	e0833001 	add	r3, r3, r1
-    7054:	e1a03203 	mov	r3, r3, lsl #4
-    7058:	e1a02003 	mov	r2, r3
-    705c:	e3a032be 	mov	r3, #-536870901	; 0xe000000b
-    7060:	e2833626 	add	r3, r3, #39845888	; 0x2600000
-    7064:	e2833c63 	add	r3, r3, #25344	; 0x6300
-    7068:	e0831392 	umull	r1, r3, r2, r3
-    706c:	e1a034a3 	mov	r3, r3, lsr #9
-    7070:	e0842003 	add	r2, r4, r3
-    7074:	e59f3190 	ldr	r3, [pc, #400]	; 720c <.text+0x720c>
-    7078:	e0831392 	umull	r1, r3, r2, r3
-    707c:	e1a03223 	mov	r3, r3, lsr #4
-    7080:	e1a02003 	mov	r2, r3
-    7084:	e59f317c 	ldr	r3, [pc, #380]	; 7208 <.text+0x7208>
-    7088:	e5832000 	str	r2, [r3]
-    708c:	e59f3174 	ldr	r3, [pc, #372]	; 7208 <.text+0x7208>
-    7090:	e5933000 	ldr	r3, [r3]
-    7094:	e1a03803 	mov	r3, r3, lsl #16
-    7098:	e1a02823 	mov	r2, r3, lsr #16
-    709c:	e59f3140 	ldr	r3, [pc, #320]	; 71e4 <.text+0x71e4>
-    70a0:	e1c320b0 	strh	r2, [r3]
-    70a4:	e59f3164 	ldr	r3, [pc, #356]	; 7210 <.text+0x7210>
-    70a8:	e5933000 	ldr	r3, [r3]
-    70ac:	e1a03803 	mov	r3, r3, lsl #16
-    70b0:	e1a02823 	mov	r2, r3, lsr #16
-    70b4:	e59f3128 	ldr	r3, [pc, #296]	; 71e4 <.text+0x71e4>
-    70b8:	e1c320b2 	strh	r2, [r3, #2]
-    70bc:	e59f3144 	ldr	r3, [pc, #324]	; 7208 <.text+0x7208>
-    70c0:	e5933000 	ldr	r3, [r3]
-    70c4:	e50b3014 	str	r3, [fp, #-20]
-    70c8:	e51b2014 	ldr	r2, [fp, #-20]
-    70cc:	e3a03c27 	mov	r3, #9984	; 0x2700
-    70d0:	e283300f 	add	r3, r3, #15	; 0xf
-    70d4:	e1520003 	cmp	r2, r3
-    70d8:	ca00000f 	bgt	711c <main+0x204>
-    70dc:	e59f3130 	ldr	r3, [pc, #304]	; 7214 <.text+0x7214>
-    70e0:	e5932000 	ldr	r2, [r3]
-    70e4:	e3a03d1f 	mov	r3, #1984	; 0x7c0
-    70e8:	e283300f 	add	r3, r3, #15	; 0xf
-    70ec:	e1520003 	cmp	r2, r3
-    70f0:	ca000005 	bgt	710c <main+0x1f4>
-    70f4:	e59f3118 	ldr	r3, [pc, #280]	; 7214 <.text+0x7214>
-    70f8:	e5933000 	ldr	r3, [r3]
-    70fc:	e2832001 	add	r2, r3, #1	; 0x1
-    7100:	e59f310c 	ldr	r3, [pc, #268]	; 7214 <.text+0x7214>
-    7104:	e5832000 	str	r2, [r3]
-    7108:	ea000012 	b	7158 <main+0x240>
-    710c:	e59f3104 	ldr	r3, [pc, #260]	; 7218 <.text+0x7218>
-    7110:	e3a02001 	mov	r2, #1	; 0x1
-    7114:	e5c32000 	strb	r2, [r3]
-    7118:	ea00000e 	b	7158 <main+0x240>
-    711c:	e59f30f0 	ldr	r3, [pc, #240]	; 7214 <.text+0x7214>
-    7120:	e5933000 	ldr	r3, [r3]
-    7124:	e353000a 	cmp	r3, #10	; 0xa
-    7128:	da000005 	ble	7144 <main+0x22c>
-    712c:	e59f30e0 	ldr	r3, [pc, #224]	; 7214 <.text+0x7214>
-    7130:	e5933000 	ldr	r3, [r3]
-    7134:	e2432005 	sub	r2, r3, #5	; 0x5
-    7138:	e59f30d4 	ldr	r3, [pc, #212]	; 7214 <.text+0x7214>
-    713c:	e5832000 	str	r2, [r3]
-    7140:	ea000004 	b	7158 <main+0x240>
-    7144:	e59f30cc 	ldr	r3, [pc, #204]	; 7218 <.text+0x7218>
-    7148:	e3a02000 	mov	r2, #0	; 0x0
-    714c:	e5c32000 	strb	r2, [r3]
-    7150:	e3a00000 	mov	r0, #0	; 0x0
-    7154:	eb0000db 	bl	74c8 <beeper>
-    7158:	e59f30b8 	ldr	r3, [pc, #184]	; 7218 <.text+0x7218>
-    715c:	e5d33000 	ldrb	r3, [r3]
-    7160:	e3530000 	cmp	r3, #0	; 0x0
-    7164:	0a000010 	beq	71ac <main+0x294>
-    7168:	e51b3014 	ldr	r3, [fp, #-20]
-    716c:	e2433c23 	sub	r3, r3, #8960	; 0x2300
-    7170:	e2433028 	sub	r3, r3, #40	; 0x28
-    7174:	e59f20a0 	ldr	r2, [pc, #160]	; 721c <.text+0x721c>
-    7178:	e0c21293 	smull	r1, r2, r3, r2
-    717c:	e1a02142 	mov	r2, r2, asr #2
-    7180:	e1a03fc3 	mov	r3, r3, asr #31
-    7184:	e0632002 	rsb	r2, r3, r2
-    7188:	e59f3074 	ldr	r3, [pc, #116]	; 7204 <.text+0x7204>
-    718c:	e5933000 	ldr	r3, [r3]
-    7190:	e1520003 	cmp	r2, r3
-    7194:	aa000002 	bge	71a4 <main+0x28c>
-    7198:	e3a00001 	mov	r0, #1	; 0x1
-    719c:	eb0000c9 	bl	74c8 <beeper>
-    71a0:	ea000001 	b	71ac <main+0x294>
-    71a4:	e3a00000 	mov	r0, #0	; 0x0
-    71a8:	eb0000c6 	bl	74c8 <beeper>
-    71ac:	e59f3048 	ldr	r3, [pc, #72]	; 71fc <.text+0x71fc>
-    71b0:	e5d33000 	ldrb	r3, [r3]
-    71b4:	e20330ff 	and	r3, r3, #255	; 0xff
-    71b8:	e3530000 	cmp	r3, #0	; 0x0
-    71bc:	0a000006 	beq	71dc <main+0x2c4>
-    71c0:	e59f3034 	ldr	r3, [pc, #52]	; 71fc <.text+0x71fc>
-    71c4:	e5d33000 	ldrb	r3, [r3]
-    71c8:	e20330ff 	and	r3, r3, #255	; 0xff
-    71cc:	e2433001 	sub	r3, r3, #1	; 0x1
-    71d0:	e20330ff 	and	r3, r3, #255	; 0xff
-    71d4:	e59f2020 	ldr	r2, [pc, #32]	; 71fc <.text+0x71fc>
-    71d8:	e5c23000 	strb	r3, [r2]
-    71dc:	eb00000f 	bl	7220 <mainloop>
-    71e0:	eaffff71 	b	6fac <main+0x94>
-    71e4:	400013a0 	andmi	r1, r0, r0, lsr #7
-    71e8:	00014cfc 	streqd	r4, [r1], -ip
-    71ec:	00014d18 	andeq	r4, r1, r8, lsl sp
-    71f0:	00014d3c 	andeq	r4, r1, ip, lsr sp
-    71f4:	400008a0 	andmi	r0, r0, r0, lsr #17
-    71f8:	4000139c 	mulmi	r0, ip, r3
-    71fc:	4000088c 	andmi	r0, r0, ip, lsl #17
-    7200:	40000888 	andmi	r0, r0, r8, lsl #17
-    7204:	400008a4 	andmi	r0, r0, r4, lsr #17
-    7208:	400008ac 	andmi	r0, r0, ip, lsr #17
-    720c:	88888889 	stmhiia	r8, {r0, r3, r7, fp, pc}
-    7210:	400008a8 	andmi	r0, r0, r8, lsr #17
-    7214:	40000008 	andmi	r0, r0, r8
-    7218:	40000005 	andmi	r0, r0, r5
-    721c:	66666667 	strvsbt	r6, [r6], -r7, ror #12
-
-00007220 <mainloop>:
-    7220:	e1a0c00d 	mov	ip, sp
-    7224:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    7228:	e24cb004 	sub	fp, ip, #4	; 0x4
-    722c:	ebffec5d 	bl	23a8 <SDK_mainloop>
-    7230:	ebffe4c5 	bl	54c <HL2LL_write_cycle>
-    7234:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    7238:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    723c:	e12fff1e 	bx	lr
-
-00007240 <calibrate>:
-    7240:	e1a0c00d 	mov	ip, sp
-    7244:	e92dd870 	stmdb	sp!, {r4, r5, r6, fp, ip, lr, pc}
-    7248:	e24cb004 	sub	fp, ip, #4	; 0x4
-    724c:	e24dd02c 	sub	sp, sp, #44	; 0x2c
-    7250:	e3a03000 	mov	r3, #0	; 0x0
-    7254:	e3a04000 	mov	r4, #0	; 0x0
-    7258:	e50b3044 	str	r3, [fp, #-68]
-    725c:	e50b4040 	str	r4, [fp, #-64]
-    7260:	e3a03000 	mov	r3, #0	; 0x0
-    7264:	e50b303c 	str	r3, [fp, #-60]
-    7268:	ea00005a 	b	73d8 <calibrate+0x198>
-    726c:	e3a00e4b 	mov	r0, #1200	; 0x4b0
-    7270:	ebfff1e1 	bl	39fc <wait>
-    7274:	ebffe4b4 	bl	54c <HL2LL_write_cycle>
-    7278:	e59f31b4 	ldr	r3, [pc, #436]	; 7434 <.text+0x7434>
-    727c:	e1d332b0 	ldrh	r3, [r3, #32]
-    7280:	e1a03803 	mov	r3, r3, lsl #16
-    7284:	e1a03843 	mov	r3, r3, asr #16
-    7288:	e1a00003 	mov	r0, r3
-    728c:	eb003188 	bl	138b4 <__aeabi_i2d>
-    7290:	e1a03000 	mov	r3, r0
-    7294:	e1a04001 	mov	r4, r1
-    7298:	e50b3038 	str	r3, [fp, #-56]
-    729c:	e50b4034 	str	r4, [fp, #-52]
-    72a0:	e59f318c 	ldr	r3, [pc, #396]	; 7434 <.text+0x7434>
-    72a4:	e1d332b2 	ldrh	r3, [r3, #34]
-    72a8:	e1a03803 	mov	r3, r3, lsl #16
-    72ac:	e1a03843 	mov	r3, r3, asr #16
-    72b0:	e1a00003 	mov	r0, r3
-    72b4:	eb00317e 	bl	138b4 <__aeabi_i2d>
-    72b8:	e1a03000 	mov	r3, r0
-    72bc:	e1a04001 	mov	r4, r1
-    72c0:	e50b3030 	str	r3, [fp, #-48]
-    72c4:	e50b402c 	str	r4, [fp, #-44]
-    72c8:	e59f3164 	ldr	r3, [pc, #356]	; 7434 <.text+0x7434>
-    72cc:	e1d332b4 	ldrh	r3, [r3, #36]
-    72d0:	e1a03803 	mov	r3, r3, lsl #16
-    72d4:	e1a03843 	mov	r3, r3, asr #16
-    72d8:	e1a00003 	mov	r0, r3
-    72dc:	eb003174 	bl	138b4 <__aeabi_i2d>
-    72e0:	e1a03000 	mov	r3, r0
-    72e4:	e1a04001 	mov	r4, r1
-    72e8:	e50b3028 	str	r3, [fp, #-40]
-    72ec:	e50b4024 	str	r4, [fp, #-36]
-    72f0:	e24b0038 	sub	r0, fp, #56	; 0x38
-    72f4:	e8900003 	ldmia	r0, {r0, r1}
-    72f8:	e24b2038 	sub	r2, fp, #56	; 0x38
-    72fc:	e892000c 	ldmia	r2, {r2, r3}
-    7300:	eb0031a6 	bl	139a0 <__aeabi_dmul>
-    7304:	e1a03000 	mov	r3, r0
-    7308:	e1a04001 	mov	r4, r1
-    730c:	e1a05003 	mov	r5, r3
-    7310:	e1a06004 	mov	r6, r4
-    7314:	e24b0030 	sub	r0, fp, #48	; 0x30
-    7318:	e8900003 	ldmia	r0, {r0, r1}
-    731c:	e24b2030 	sub	r2, fp, #48	; 0x30
-    7320:	e892000c 	ldmia	r2, {r2, r3}
-    7324:	eb00319d 	bl	139a0 <__aeabi_dmul>
-    7328:	e1a03000 	mov	r3, r0
-    732c:	e1a04001 	mov	r4, r1
-    7330:	e1a00005 	mov	r0, r5
-    7334:	e1a01006 	mov	r1, r6
-    7338:	e1a02003 	mov	r2, r3
-    733c:	e1a03004 	mov	r3, r4
-    7340:	eb00308d 	bl	1357c <__adddf3>
-    7344:	e1a03000 	mov	r3, r0
-    7348:	e1a04001 	mov	r4, r1
-    734c:	e1a05003 	mov	r5, r3
-    7350:	e1a06004 	mov	r6, r4
-    7354:	e24b0028 	sub	r0, fp, #40	; 0x28
-    7358:	e8900003 	ldmia	r0, {r0, r1}
-    735c:	e24b2028 	sub	r2, fp, #40	; 0x28
-    7360:	e892000c 	ldmia	r2, {r2, r3}
-    7364:	eb00318d 	bl	139a0 <__aeabi_dmul>
-    7368:	e1a03000 	mov	r3, r0
-    736c:	e1a04001 	mov	r4, r1
-    7370:	e1a00005 	mov	r0, r5
-    7374:	e1a01006 	mov	r1, r6
-    7378:	e1a02003 	mov	r2, r3
-    737c:	e1a03004 	mov	r3, r4
-    7380:	eb00307d 	bl	1357c <__adddf3>
-    7384:	e1a03000 	mov	r3, r0
-    7388:	e1a04001 	mov	r4, r1
-    738c:	e1a00003 	mov	r0, r3
-    7390:	e1a01004 	mov	r1, r4
-    7394:	eb003629 	bl	14c40 <__sqrt_from_arm>
-    7398:	e1a03000 	mov	r3, r0
-    739c:	e1a04001 	mov	r4, r1
-    73a0:	e50b3020 	str	r3, [fp, #-32]
-    73a4:	e50b401c 	str	r4, [fp, #-28]
-    73a8:	e24b0044 	sub	r0, fp, #68	; 0x44
-    73ac:	e8900003 	ldmia	r0, {r0, r1}
-    73b0:	e24b2020 	sub	r2, fp, #32	; 0x20
-    73b4:	e892000c 	ldmia	r2, {r2, r3}
-    73b8:	eb00306f 	bl	1357c <__adddf3>
-    73bc:	e1a03000 	mov	r3, r0
-    73c0:	e1a04001 	mov	r4, r1
-    73c4:	e50b3044 	str	r3, [fp, #-68]
-    73c8:	e50b4040 	str	r4, [fp, #-64]
-    73cc:	e51b303c 	ldr	r3, [fp, #-60]
-    73d0:	e2833001 	add	r3, r3, #1	; 0x1
-    73d4:	e50b303c 	str	r3, [fp, #-60]
-    73d8:	e51b203c 	ldr	r2, [fp, #-60]
-    73dc:	e3a03d1f 	mov	r3, #1984	; 0x7c0
-    73e0:	e283300f 	add	r3, r3, #15	; 0xf
-    73e4:	e1520003 	cmp	r2, r3
-    73e8:	daffff9f 	ble	726c <calibrate+0x2c>
-    73ec:	e24b0044 	sub	r0, fp, #68	; 0x44
-    73f0:	e8900003 	ldmia	r0, {r0, r1}
-    73f4:	e3a02101 	mov	r2, #1073741824	; 0x40000000
-    73f8:	e282289f 	add	r2, r2, #10420224	; 0x9f0000
-    73fc:	e2822901 	add	r2, r2, #16384	; 0x4000
-    7400:	e3a03000 	mov	r3, #0	; 0x0
-    7404:	eb003209 	bl	13c30 <__aeabi_ddiv>
-    7408:	e1a03000 	mov	r3, r0
-    740c:	e1a04001 	mov	r4, r1
-    7410:	e1a00003 	mov	r0, r3
-    7414:	e1a01004 	mov	r1, r4
-    7418:	eb0032ee 	bl	13fd8 <__aeabi_d2f>
-    741c:	e1a02000 	mov	r2, r0
-    7420:	e59f3010 	ldr	r3, [pc, #16]	; 7438 <.text+0x7438>
-    7424:	e5832000 	str	r2, [r3]
-    7428:	e24bd018 	sub	sp, fp, #24	; 0x18
-    742c:	e89d6870 	ldmia	sp, {r4, r5, r6, fp, sp, lr}
-    7430:	e12fff1e 	bx	lr
-    7434:	40000b34 	andmi	r0, r0, r4, lsr fp
-    7438:	40001368 	andmi	r1, r0, r8, ror #6
-
-0000743c <LED>:
-    743c:	e1a0c00d 	mov	ip, sp
-    7440:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    7444:	e24cb004 	sub	fp, ip, #4	; 0x4
-    7448:	e24dd008 	sub	sp, sp, #8	; 0x8
-    744c:	e1a03000 	mov	r3, r0
-    7450:	e1a02001 	mov	r2, r1
-    7454:	e54b3010 	strb	r3, [fp, #-16]
-    7458:	e1a03002 	mov	r3, r2
-    745c:	e54b3014 	strb	r3, [fp, #-20]
-    7460:	e55b3010 	ldrb	r3, [fp, #-16]
-    7464:	e3530001 	cmp	r3, #1	; 0x1
-    7468:	8a000013 	bhi	74bc <LED+0x80>
-    746c:	e55b3014 	ldrb	r3, [fp, #-20]
-    7470:	e3530000 	cmp	r3, #0	; 0x0
-    7474:	1a000008 	bne	749c <LED+0x60>
-    7478:	e3a0220e 	mov	r2, #-536870912	; 0xe0000000
-    747c:	e282290a 	add	r2, r2, #163840	; 0x28000
-    7480:	e2822014 	add	r2, r2, #20	; 0x14
-    7484:	e55b3010 	ldrb	r3, [fp, #-16]
-    7488:	e2831018 	add	r1, r3, #24	; 0x18
-    748c:	e3a03001 	mov	r3, #1	; 0x1
-    7490:	e1a03113 	mov	r3, r3, lsl r1
-    7494:	e5823000 	str	r3, [r2]
-    7498:	ea000007 	b	74bc <LED+0x80>
-    749c:	e3a0220e 	mov	r2, #-536870912	; 0xe0000000
-    74a0:	e282290a 	add	r2, r2, #163840	; 0x28000
-    74a4:	e282201c 	add	r2, r2, #28	; 0x1c
-    74a8:	e55b3010 	ldrb	r3, [fp, #-16]
-    74ac:	e2831018 	add	r1, r3, #24	; 0x18
-    74b0:	e3a03001 	mov	r3, #1	; 0x1
-    74b4:	e1a03113 	mov	r3, r3, lsl r1
-    74b8:	e5823000 	str	r3, [r2]
-    74bc:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    74c0:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    74c4:	e12fff1e 	bx	lr
-
-000074c8 <beeper>:
-    74c8:	e1a0c00d 	mov	ip, sp
-    74cc:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    74d0:	e24cb004 	sub	fp, ip, #4	; 0x4
-    74d4:	e24dd004 	sub	sp, sp, #4	; 0x4
-    74d8:	e1a03000 	mov	r3, r0
-    74dc:	e54b3010 	strb	r3, [fp, #-16]
-    74e0:	e55b3010 	ldrb	r3, [fp, #-16]
-    74e4:	e3530000 	cmp	r3, #0	; 0x0
-    74e8:	0a000005 	beq	7504 <beeper+0x3c>
-    74ec:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    74f0:	e283390a 	add	r3, r3, #163840	; 0x28000
-    74f4:	e2833014 	add	r3, r3, #20	; 0x14
-    74f8:	e3a02802 	mov	r2, #131072	; 0x20000
-    74fc:	e5832000 	str	r2, [r3]
-    7500:	ea000004 	b	7518 <beeper+0x50>
-    7504:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    7508:	e283390a 	add	r3, r3, #163840	; 0x28000
-    750c:	e283301c 	add	r3, r3, #28	; 0x1c
-    7510:	e3a02802 	mov	r2, #131072	; 0x20000
-    7514:	e5832000 	str	r2, [r3]
-    7518:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    751c:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    7520:	e12fff1e 	bx	lr
-
-00007524 <ee_erase>:
-    7524:	e1a0c00d 	mov	ip, sp
-    7528:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    752c:	e24cb004 	sub	fp, ip, #4	; 0x4
-    7530:	e24dd02c 	sub	sp, sp, #44	; 0x2c
-    7534:	e50b0034 	str	r0, [fp, #-52]
-    7538:	e50b1038 	str	r1, [fp, #-56]
-    753c:	e3a03000 	mov	r3, #0	; 0x0
-    7540:	e2433eff 	sub	r3, r3, #4080	; 0xff0
-    7544:	e5933000 	ldr	r3, [r3]
-    7548:	e50b3010 	str	r3, [fp, #-16]
-    754c:	e3e03efe 	mvn	r3, #4064	; 0xfe0
-    7550:	e243300b 	sub	r3, r3, #11	; 0xb
-    7554:	e51b2010 	ldr	r2, [fp, #-16]
-    7558:	e5832000 	str	r2, [r3]
-    755c:	e3a03032 	mov	r3, #50	; 0x32
-    7560:	e50b3024 	str	r3, [fp, #-36]
-    7564:	e3a0300e 	mov	r3, #14	; 0xe
-    7568:	e50b3020 	str	r3, [fp, #-32]
-    756c:	e3a0300e 	mov	r3, #14	; 0xe
-    7570:	e50b301c 	str	r3, [fp, #-28]
-    7574:	e59f20e0 	ldr	r2, [pc, #224]	; 765c <.text+0x765c>
-    7578:	e3e0313a 	mvn	r3, #-2147483634	; 0x8000000e
-    757c:	e5823000 	str	r3, [r2]
-    7580:	e59f30d4 	ldr	r3, [pc, #212]	; 765c <.text+0x765c>
-    7584:	e593c000 	ldr	ip, [r3]
-    7588:	e24b3024 	sub	r3, fp, #36	; 0x24
-    758c:	e24b2030 	sub	r2, fp, #48	; 0x30
-    7590:	e1a00003 	mov	r0, r3
-    7594:	e1a01002 	mov	r1, r2
-    7598:	e1a0e00f 	mov	lr, pc
-    759c:	e12fff1c 	bx	ip
-    75a0:	e3a03034 	mov	r3, #52	; 0x34
-    75a4:	e50b3024 	str	r3, [fp, #-36]
-    75a8:	e3a0300e 	mov	r3, #14	; 0xe
-    75ac:	e50b3020 	str	r3, [fp, #-32]
-    75b0:	e3a0300e 	mov	r3, #14	; 0xe
-    75b4:	e50b301c 	str	r3, [fp, #-28]
-    75b8:	e3a03cea 	mov	r3, #59904	; 0xea00
-    75bc:	e2833060 	add	r3, r3, #96	; 0x60
-    75c0:	e50b3018 	str	r3, [fp, #-24]
-    75c4:	e59f2090 	ldr	r2, [pc, #144]	; 765c <.text+0x765c>
-    75c8:	e3e0313a 	mvn	r3, #-2147483634	; 0x8000000e
-    75cc:	e5823000 	str	r3, [r2]
-    75d0:	e59f3084 	ldr	r3, [pc, #132]	; 765c <.text+0x765c>
-    75d4:	e593c000 	ldr	ip, [r3]
-    75d8:	e24b3024 	sub	r3, fp, #36	; 0x24
-    75dc:	e24b2030 	sub	r2, fp, #48	; 0x30
-    75e0:	e1a00003 	mov	r0, r3
-    75e4:	e1a01002 	mov	r1, r2
-    75e8:	e1a0e00f 	mov	lr, pc
-    75ec:	e12fff1c 	bx	ip
-    75f0:	e3a03035 	mov	r3, #53	; 0x35
-    75f4:	e50b3024 	str	r3, [fp, #-36]
-    75f8:	e3a0300e 	mov	r3, #14	; 0xe
-    75fc:	e50b3020 	str	r3, [fp, #-32]
-    7600:	e3a0300e 	mov	r3, #14	; 0xe
-    7604:	e50b301c 	str	r3, [fp, #-28]
-    7608:	e59f204c 	ldr	r2, [pc, #76]	; 765c <.text+0x765c>
-    760c:	e3e0313a 	mvn	r3, #-2147483634	; 0x8000000e
-    7610:	e5823000 	str	r3, [r2]
-    7614:	e59f3040 	ldr	r3, [pc, #64]	; 765c <.text+0x765c>
-    7618:	e593c000 	ldr	ip, [r3]
-    761c:	e24b3024 	sub	r3, fp, #36	; 0x24
-    7620:	e24b2030 	sub	r2, fp, #48	; 0x30
-    7624:	e1a00003 	mov	r0, r3
-    7628:	e1a01002 	mov	r1, r2
-    762c:	e1a0e00f 	mov	lr, pc
-    7630:	e12fff1c 	bx	ip
-    7634:	e3a03000 	mov	r3, #0	; 0x0
-    7638:	e2433eff 	sub	r3, r3, #4080	; 0xff0
-    763c:	e51b2010 	ldr	r2, [fp, #-16]
-    7640:	e5832000 	str	r2, [r3]
-    7644:	e51b2030 	ldr	r2, [fp, #-48]
-    7648:	e51b3038 	ldr	r3, [fp, #-56]
-    764c:	e5832000 	str	r2, [r3]
-    7650:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    7654:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    7658:	e12fff1e 	bx	lr
-    765c:	40001418 	andmi	r1, r0, r8, lsl r4
-
-00007660 <ee_write>:
-    7660:	e1a0c00d 	mov	ip, sp
-    7664:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    7668:	e24cb004 	sub	fp, ip, #4	; 0x4
-    766c:	e24ddf4f 	sub	sp, sp, #316	; 0x13c
-    7670:	e50b0144 	str	r0, [fp, #-324]
-    7674:	e50b1148 	str	r1, [fp, #-328]
-    7678:	eb0000dc 	bl	79f0 <ee_locate>
-    767c:	e1a03000 	mov	r3, r0
-    7680:	e50b3020 	str	r3, [fp, #-32]
-    7684:	e51b3020 	ldr	r3, [fp, #-32]
-    7688:	e3730001 	cmn	r3, #1	; 0x1
-    768c:	1a000004 	bne	76a4 <ee_write+0x44>
-    7690:	e51b2148 	ldr	r2, [fp, #-328]
-    7694:	e3a03f7d 	mov	r3, #500	; 0x1f4
-    7698:	e2833001 	add	r3, r3, #1	; 0x1
-    769c:	e5823000 	str	r3, [r2]
-    76a0:	ea000073 	b	7874 <ee_write+0x214>
-    76a4:	e3a03000 	mov	r3, #0	; 0x0
-    76a8:	e50b3014 	str	r3, [fp, #-20]
-    76ac:	ea00000a 	b	76dc <ee_write+0x7c>
-    76b0:	e51b2014 	ldr	r2, [fp, #-20]
-    76b4:	e3a034bb 	mov	r3, #-1157627904	; 0xbb000000
-    76b8:	e1a03b43 	mov	r3, r3, asr #22
-    76bc:	e24b100c 	sub	r1, fp, #12	; 0xc
-    76c0:	e0812002 	add	r2, r1, r2
-    76c4:	e0822003 	add	r2, r2, r3
-    76c8:	e3e03000 	mvn	r3, #0	; 0x0
-    76cc:	e5c23000 	strb	r3, [r2]
-    76d0:	e51b3014 	ldr	r3, [fp, #-20]
-    76d4:	e2833001 	add	r3, r3, #1	; 0x1
-    76d8:	e50b3014 	str	r3, [fp, #-20]
-    76dc:	e51b3014 	ldr	r3, [fp, #-20]
-    76e0:	e35300ff 	cmp	r3, #255	; 0xff
-    76e4:	9afffff1 	bls	76b0 <ee_write+0x50>
-    76e8:	e24b3e12 	sub	r3, fp, #288	; 0x120
-    76ec:	e50b3018 	str	r3, [fp, #-24]
-    76f0:	e51b3144 	ldr	r3, [fp, #-324]
-    76f4:	e50b301c 	str	r3, [fp, #-28]
-    76f8:	e3a03000 	mov	r3, #0	; 0x0
-    76fc:	e50b3014 	str	r3, [fp, #-20]
-    7700:	ea00000e 	b	7740 <ee_write+0xe0>
-    7704:	e51b3014 	ldr	r3, [fp, #-20]
-    7708:	e1a03103 	mov	r3, r3, lsl #2
-    770c:	e1a02003 	mov	r2, r3
-    7710:	e51b3018 	ldr	r3, [fp, #-24]
-    7714:	e0821003 	add	r1, r2, r3
-    7718:	e51b3014 	ldr	r3, [fp, #-20]
-    771c:	e1a03103 	mov	r3, r3, lsl #2
-    7720:	e1a02003 	mov	r2, r3
-    7724:	e51b301c 	ldr	r3, [fp, #-28]
-    7728:	e0823003 	add	r3, r2, r3
-    772c:	e5933000 	ldr	r3, [r3]
-    7730:	e5813000 	str	r3, [r1]
-    7734:	e51b3014 	ldr	r3, [fp, #-20]
-    7738:	e2833001 	add	r3, r3, #1	; 0x1
-    773c:	e50b3014 	str	r3, [fp, #-20]
-    7740:	e51b3014 	ldr	r3, [fp, #-20]
-    7744:	e3530040 	cmp	r3, #64	; 0x40
-    7748:	1affffed 	bne	7704 <ee_write+0xa4>
-    774c:	e3a03000 	mov	r3, #0	; 0x0
-    7750:	e2433eff 	sub	r3, r3, #4080	; 0xff0
-    7754:	e5933000 	ldr	r3, [r3]
-    7758:	e50b3010 	str	r3, [fp, #-16]
-    775c:	e3e03efe 	mvn	r3, #4064	; 0xfe0
-    7760:	e243300b 	sub	r3, r3, #11	; 0xb
-    7764:	e51b2010 	ldr	r2, [fp, #-16]
-    7768:	e5832000 	str	r2, [r3]
-    776c:	e3a03032 	mov	r3, #50	; 0x32
-    7770:	e50b3134 	str	r3, [fp, #-308]
-    7774:	e3a0300e 	mov	r3, #14	; 0xe
-    7778:	e50b3130 	str	r3, [fp, #-304]
-    777c:	e3a0300e 	mov	r3, #14	; 0xe
-    7780:	e50b312c 	str	r3, [fp, #-300]
-    7784:	e59f20f4 	ldr	r2, [pc, #244]	; 7880 <.text+0x7880>
-    7788:	e3e0313a 	mvn	r3, #-2147483634	; 0x8000000e
-    778c:	e5823000 	str	r3, [r2]
-    7790:	e59f30e8 	ldr	r3, [pc, #232]	; 7880 <.text+0x7880>
-    7794:	e593c000 	ldr	ip, [r3]
-    7798:	e24b3f4d 	sub	r3, fp, #308	; 0x134
-    779c:	e24b2d05 	sub	r2, fp, #320	; 0x140
-    77a0:	e1a00003 	mov	r0, r3
-    77a4:	e1a01002 	mov	r1, r2
-    77a8:	e1a0e00f 	mov	lr, pc
-    77ac:	e12fff1c 	bx	ip
-    77b0:	e3a03033 	mov	r3, #51	; 0x33
-    77b4:	e50b3134 	str	r3, [fp, #-308]
-    77b8:	e51b3020 	ldr	r3, [fp, #-32]
-    77bc:	e3c330ff 	bic	r3, r3, #255	; 0xff
-    77c0:	e50b3130 	str	r3, [fp, #-304]
-    77c4:	e24b3e12 	sub	r3, fp, #288	; 0x120
-    77c8:	e50b312c 	str	r3, [fp, #-300]
-    77cc:	e3a03c01 	mov	r3, #256	; 0x100
-    77d0:	e50b3128 	str	r3, [fp, #-296]
-    77d4:	e3a03cea 	mov	r3, #59904	; 0xea00
-    77d8:	e2833060 	add	r3, r3, #96	; 0x60
-    77dc:	e50b3124 	str	r3, [fp, #-292]
-    77e0:	e59f2098 	ldr	r2, [pc, #152]	; 7880 <.text+0x7880>
-    77e4:	e3e0313a 	mvn	r3, #-2147483634	; 0x8000000e
-    77e8:	e5823000 	str	r3, [r2]
-    77ec:	e59f308c 	ldr	r3, [pc, #140]	; 7880 <.text+0x7880>
-    77f0:	e593c000 	ldr	ip, [r3]
-    77f4:	e24b3f4d 	sub	r3, fp, #308	; 0x134
-    77f8:	e24b2d05 	sub	r2, fp, #320	; 0x140
-    77fc:	e1a00003 	mov	r0, r3
-    7800:	e1a01002 	mov	r1, r2
-    7804:	e1a0e00f 	mov	lr, pc
-    7808:	e12fff1c 	bx	ip
-    780c:	e3a03038 	mov	r3, #56	; 0x38
-    7810:	e50b3134 	str	r3, [fp, #-308]
-    7814:	e51b301c 	ldr	r3, [fp, #-28]
-    7818:	e50b3130 	str	r3, [fp, #-304]
-    781c:	e51b3020 	ldr	r3, [fp, #-32]
-    7820:	e50b312c 	str	r3, [fp, #-300]
-    7824:	e3a03c01 	mov	r3, #256	; 0x100
-    7828:	e50b3128 	str	r3, [fp, #-296]
-    782c:	e59f204c 	ldr	r2, [pc, #76]	; 7880 <.text+0x7880>
-    7830:	e3e0313a 	mvn	r3, #-2147483634	; 0x8000000e
-    7834:	e5823000 	str	r3, [r2]
-    7838:	e59f3040 	ldr	r3, [pc, #64]	; 7880 <.text+0x7880>
-    783c:	e593c000 	ldr	ip, [r3]
-    7840:	e24b3f4d 	sub	r3, fp, #308	; 0x134
-    7844:	e24b2d05 	sub	r2, fp, #320	; 0x140
-    7848:	e1a00003 	mov	r0, r3
-    784c:	e1a01002 	mov	r1, r2
-    7850:	e1a0e00f 	mov	lr, pc
-    7854:	e12fff1c 	bx	ip
-    7858:	e3a03000 	mov	r3, #0	; 0x0
-    785c:	e2433eff 	sub	r3, r3, #4080	; 0xff0
-    7860:	e51b2010 	ldr	r2, [fp, #-16]
-    7864:	e5832000 	str	r2, [r3]
-    7868:	e51b2140 	ldr	r2, [fp, #-320]
-    786c:	e51b3148 	ldr	r3, [fp, #-328]
-    7870:	e5832000 	str	r2, [r3]
-    7874:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    7878:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    787c:	e12fff1e 	bx	lr
-    7880:	40001418 	andmi	r1, r0, r8, lsl r4
-
-00007884 <ee_read>:
-    7884:	e1a0c00d 	mov	ip, sp
-    7888:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    788c:	e24cb004 	sub	fp, ip, #4	; 0x4
-    7890:	e24dd00c 	sub	sp, sp, #12	; 0xc
-    7894:	e50b0014 	str	r0, [fp, #-20]
-    7898:	e50b1018 	str	r1, [fp, #-24]
-    789c:	eb000053 	bl	79f0 <ee_locate>
-    78a0:	e1a03000 	mov	r3, r0
-    78a4:	e50b3010 	str	r3, [fp, #-16]
-    78a8:	e51b3010 	ldr	r3, [fp, #-16]
-    78ac:	e353090e 	cmp	r3, #229376	; 0x38000
-    78b0:	1a000003 	bne	78c4 <ee_read+0x40>
-    78b4:	e51b2018 	ldr	r2, [fp, #-24]
-    78b8:	e3a03f7d 	mov	r3, #500	; 0x1f4
-    78bc:	e5823000 	str	r3, [r2]
-    78c0:	ea000010 	b	7908 <ee_read+0x84>
-    78c4:	e51b3018 	ldr	r3, [fp, #-24]
-    78c8:	e3a02000 	mov	r2, #0	; 0x0
-    78cc:	e5832000 	str	r2, [r3]
-    78d0:	e51b3010 	ldr	r3, [fp, #-16]
-    78d4:	e3730001 	cmn	r3, #1	; 0x1
-    78d8:	1a000005 	bne	78f4 <ee_read+0x70>
-    78dc:	e51b3018 	ldr	r3, [fp, #-24]
-    78e0:	e2832004 	add	r2, r3, #4	; 0x4
-    78e4:	e3a03bff 	mov	r3, #261120	; 0x3fc00
-    78e8:	e2833c03 	add	r3, r3, #768	; 0x300
-    78ec:	e5823000 	str	r3, [r2]
-    78f0:	ea000004 	b	7908 <ee_read+0x84>
-    78f4:	e51b3018 	ldr	r3, [fp, #-24]
-    78f8:	e2832004 	add	r2, r3, #4	; 0x4
-    78fc:	e51b3010 	ldr	r3, [fp, #-16]
-    7900:	e2433c01 	sub	r3, r3, #256	; 0x100
-    7904:	e5823000 	str	r3, [r2]
-    7908:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    790c:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    7910:	e12fff1e 	bx	lr
-
-00007914 <ee_readn>:
-    7914:	e1a0c00d 	mov	ip, sp
-    7918:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    791c:	e24cb004 	sub	fp, ip, #4	; 0x4
-    7920:	e24dd008 	sub	sp, sp, #8	; 0x8
-    7924:	e50b0010 	str	r0, [fp, #-16]
-    7928:	e50b1014 	str	r1, [fp, #-20]
-    792c:	e51b3010 	ldr	r3, [fp, #-16]
-    7930:	e3530080 	cmp	r3, #128	; 0x80
-    7934:	9a000004 	bls	794c <ee_readn+0x38>
-    7938:	e51b2014 	ldr	r2, [fp, #-20]
-    793c:	e3a03f7d 	mov	r3, #500	; 0x1f4
-    7940:	e2833002 	add	r3, r3, #2	; 0x2
-    7944:	e5823000 	str	r3, [r2]
-    7948:	ea000008 	b	7970 <ee_readn+0x5c>
-    794c:	e51b2014 	ldr	r2, [fp, #-20]
-    7950:	e3a03000 	mov	r3, #0	; 0x0
-    7954:	e5823000 	str	r3, [r2]
-    7958:	e51b3014 	ldr	r3, [fp, #-20]
-    795c:	e2832004 	add	r2, r3, #4	; 0x4
-    7960:	e51b3010 	ldr	r3, [fp, #-16]
-    7964:	e1a03403 	mov	r3, r3, lsl #8
-    7968:	e283390e 	add	r3, r3, #229376	; 0x38000
-    796c:	e5823000 	str	r3, [r2]
-    7970:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    7974:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    7978:	e12fff1e 	bx	lr
-
-0000797c <ee_count>:
-    797c:	e1a0c00d 	mov	ip, sp
-    7980:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    7984:	e24cb004 	sub	fp, ip, #4	; 0x4
-    7988:	e24dd00c 	sub	sp, sp, #12	; 0xc
-    798c:	e50b0014 	str	r0, [fp, #-20]
-    7990:	e50b1018 	str	r1, [fp, #-24]
-    7994:	e51b2018 	ldr	r2, [fp, #-24]
-    7998:	e3a03000 	mov	r3, #0	; 0x0
-    799c:	e5823000 	str	r3, [r2]
-    79a0:	eb000012 	bl	79f0 <ee_locate>
-    79a4:	e1a03000 	mov	r3, r0
-    79a8:	e50b3010 	str	r3, [fp, #-16]
-    79ac:	e51b3010 	ldr	r3, [fp, #-16]
-    79b0:	e3730001 	cmn	r3, #1	; 0x1
-    79b4:	1a000001 	bne	79c0 <ee_count+0x44>
-    79b8:	e3a03701 	mov	r3, #262144	; 0x40000
-    79bc:	e50b3010 	str	r3, [fp, #-16]
-    79c0:	e51b3018 	ldr	r3, [fp, #-24]
-    79c4:	e2831004 	add	r1, r3, #4	; 0x4
-    79c8:	e51b3010 	ldr	r3, [fp, #-16]
-    79cc:	e243390e 	sub	r3, r3, #229376	; 0x38000
-    79d0:	e28320ff 	add	r2, r3, #255	; 0xff
-    79d4:	e3530000 	cmp	r3, #0	; 0x0
-    79d8:	b1a03002 	movlt	r3, r2
-    79dc:	e1a03443 	mov	r3, r3, asr #8
-    79e0:	e5813000 	str	r3, [r1]
-    79e4:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    79e8:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    79ec:	e12fff1e 	bx	lr
-
-000079f0 <ee_locate>:
-    79f0:	e1a0c00d 	mov	ip, sp
-    79f4:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    79f8:	e24cb004 	sub	fp, ip, #4	; 0x4
-    79fc:	e24dd018 	sub	sp, sp, #24	; 0x18
-    7a00:	e3a0390e 	mov	r3, #229376	; 0x38000
-    7a04:	e50b3020 	str	r3, [fp, #-32]
-    7a08:	e51b3020 	ldr	r3, [fp, #-32]
-    7a0c:	e5d33000 	ldrb	r3, [r3]
-    7a10:	e35300ff 	cmp	r3, #255	; 0xff
-    7a14:	1a000002 	bne	7a24 <ee_locate+0x34>
-    7a18:	e51b3020 	ldr	r3, [fp, #-32]
-    7a1c:	e50b3024 	str	r3, [fp, #-36]
-    7a20:	ea00003f 	b	7b24 <ee_locate+0x134>
-    7a24:	e3a03701 	mov	r3, #262144	; 0x40000
-    7a28:	e50b3018 	str	r3, [fp, #-24]
-    7a2c:	e51b3018 	ldr	r3, [fp, #-24]
-    7a30:	e2433c01 	sub	r3, r3, #256	; 0x100
-    7a34:	e5d33000 	ldrb	r3, [r3]
-    7a38:	e35300aa 	cmp	r3, #170	; 0xaa
-    7a3c:	1a000002 	bne	7a4c <ee_locate+0x5c>
-    7a40:	e3e03000 	mvn	r3, #0	; 0x0
-    7a44:	e50b3024 	str	r3, [fp, #-36]
-    7a48:	ea000035 	b	7b24 <ee_locate+0x134>
-    7a4c:	e51b2018 	ldr	r2, [fp, #-24]
-    7a50:	e51b3020 	ldr	r3, [fp, #-32]
-    7a54:	e0633002 	rsb	r3, r3, r2
-    7a58:	e50b3014 	str	r3, [fp, #-20]
-    7a5c:	e3a030ff 	mov	r3, #255	; 0xff
-    7a60:	e50b3010 	str	r3, [fp, #-16]
-    7a64:	ea000029 	b	7b10 <ee_locate+0x120>
-    7a68:	e51b2018 	ldr	r2, [fp, #-24]
-    7a6c:	e51b3020 	ldr	r3, [fp, #-32]
-    7a70:	e0823003 	add	r3, r2, r3
-    7a74:	e1a030a3 	mov	r3, r3, lsr #1
-    7a78:	e50b301c 	str	r3, [fp, #-28]
-    7a7c:	e51b201c 	ldr	r2, [fp, #-28]
-    7a80:	e51b3010 	ldr	r3, [fp, #-16]
-    7a84:	e0023003 	and	r3, r2, r3
-    7a88:	e3530000 	cmp	r3, #0	; 0x0
-    7a8c:	0a000013 	beq	7ae0 <ee_locate+0xf0>
-    7a90:	e51b3018 	ldr	r3, [fp, #-24]
-    7a94:	e2433c01 	sub	r3, r3, #256	; 0x100
-    7a98:	e5d33000 	ldrb	r3, [r3]
-    7a9c:	e35300ff 	cmp	r3, #255	; 0xff
-    7aa0:	1a000003 	bne	7ab4 <ee_locate+0xc4>
-    7aa4:	e51b3018 	ldr	r3, [fp, #-24]
-    7aa8:	e2433c01 	sub	r3, r3, #256	; 0x100
-    7aac:	e50b3018 	str	r3, [fp, #-24]
-    7ab0:	ea000002 	b	7ac0 <ee_locate+0xd0>
-    7ab4:	e51b3020 	ldr	r3, [fp, #-32]
-    7ab8:	e2833c01 	add	r3, r3, #256	; 0x100
-    7abc:	e50b3020 	str	r3, [fp, #-32]
-    7ac0:	e51b2018 	ldr	r2, [fp, #-24]
-    7ac4:	e51b3020 	ldr	r3, [fp, #-32]
-    7ac8:	e0823003 	add	r3, r2, r3
-    7acc:	e1a030a3 	mov	r3, r3, lsr #1
-    7ad0:	e50b301c 	str	r3, [fp, #-28]
-    7ad4:	e51b3014 	ldr	r3, [fp, #-20]
-    7ad8:	e2433c01 	sub	r3, r3, #256	; 0x100
-    7adc:	e50b3014 	str	r3, [fp, #-20]
-    7ae0:	e51b301c 	ldr	r3, [fp, #-28]
-    7ae4:	e5d33000 	ldrb	r3, [r3]
-    7ae8:	e35300ff 	cmp	r3, #255	; 0xff
-    7aec:	1a000002 	bne	7afc <ee_locate+0x10c>
-    7af0:	e51b301c 	ldr	r3, [fp, #-28]
-    7af4:	e50b3018 	str	r3, [fp, #-24]
-    7af8:	ea000001 	b	7b04 <ee_locate+0x114>
-    7afc:	e51b301c 	ldr	r3, [fp, #-28]
-    7b00:	e50b3020 	str	r3, [fp, #-32]
-    7b04:	e51b3014 	ldr	r3, [fp, #-20]
-    7b08:	e1a030a3 	mov	r3, r3, lsr #1
-    7b0c:	e50b3014 	str	r3, [fp, #-20]
-    7b10:	e51b3014 	ldr	r3, [fp, #-20]
-    7b14:	e3530c01 	cmp	r3, #256	; 0x100
-    7b18:	1affffd2 	bne	7a68 <ee_locate+0x78>
-    7b1c:	e51b3018 	ldr	r3, [fp, #-24]
-    7b20:	e50b3024 	str	r3, [fp, #-36]
-    7b24:	e51b3024 	ldr	r3, [fp, #-36]
-    7b28:	e1a00003 	mov	r0, r3
-    7b2c:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    7b30:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    7b34:	e12fff1e 	bx	lr
-
-00007b38 <init>:
-    7b38:	e1a0c00d 	mov	ip, sp
-    7b3c:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    7b40:	e24cb004 	sub	fp, ip, #4	; 0x4
-    7b44:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    7b48:	e283397f 	add	r3, r3, #2080768	; 0x1fc000
-    7b4c:	e3a02000 	mov	r2, #0	; 0x0
-    7b50:	e5832000 	str	r2, [r3]
-    7b54:	e3a0324e 	mov	r3, #-536870908	; 0xe0000004
-    7b58:	e283397f 	add	r3, r3, #2080768	; 0x1fc000
-    7b5c:	e3a02003 	mov	r2, #3	; 0x3
-    7b60:	e5832000 	str	r2, [r3]
-    7b64:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    7b68:	e283397f 	add	r3, r3, #2080768	; 0x1fc000
-    7b6c:	e3a02002 	mov	r2, #2	; 0x2
-    7b70:	e5832000 	str	r2, [r3]
-    7b74:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    7b78:	e283397f 	add	r3, r3, #2080768	; 0x1fc000
-    7b7c:	e2833c01 	add	r3, r3, #256	; 0x100
-    7b80:	e3a02001 	mov	r2, #1	; 0x1
-    7b84:	e5832000 	str	r2, [r3]
-    7b88:	eb00011c 	bl	8000 <pll_init>
-    7b8c:	eb00012b 	bl	8040 <pll_feed>
-    7b90:	eb00003e 	bl	7c90 <init_ports>
-    7b94:	e3a00ce1 	mov	r0, #57600	; 0xe100
-    7b98:	eb0004fc 	bl	8f90 <UARTInitialize>
-    7b9c:	e3a00ce1 	mov	r0, #57600	; 0xe100
-    7ba0:	eb000b22 	bl	a830 <UART1Initialize>
-    7ba4:	eb0000e0 	bl	7f2c <init_spi>
-    7ba8:	eb0000ed 	bl	7f64 <init_spi1>
-    7bac:	eb000061 	bl	7d38 <init_timer0>
-    7bb0:	eb00008a 	bl	7de0 <init_timer1>
-    7bb4:	eb0000af 	bl	7e78 <PWM_Init>
-    7bb8:	e3a0093d 	mov	r0, #999424	; 0xf4000
-    7bbc:	e2800d09 	add	r0, r0, #576	; 0x240
-    7bc0:	eb00103d 	bl	bcbc <ADCInit>
-    7bc4:	eb000002 	bl	7bd4 <init_interrupts>
-    7bc8:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    7bcc:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    7bd0:	e12fff1e 	bx	lr
-
-00007bd4 <init_interrupts>:
-    7bd4:	e1a0c00d 	mov	ip, sp
-    7bd8:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    7bdc:	e24cb004 	sub	fp, ip, #4	; 0x4
-    7be0:	eb0012aa 	bl	c690 <init_VIC>
-    7be4:	e3a00004 	mov	r0, #4	; 0x4
-    7be8:	e59f108c 	ldr	r1, [pc, #140]	; 7c7c <.text+0x7c7c>
-    7bec:	eb0012d8 	bl	c754 <install_irq>
-    7bf0:	e3a00005 	mov	r0, #5	; 0x5
-    7bf4:	e59f1084 	ldr	r1, [pc, #132]	; 7c80 <.text+0x7c80>
-    7bf8:	eb0012d5 	bl	c754 <install_irq>
-    7bfc:	e3a00007 	mov	r0, #7	; 0x7
-    7c00:	e59f107c 	ldr	r1, [pc, #124]	; 7c84 <.text+0x7c84>
-    7c04:	eb0012d2 	bl	c754 <install_irq>
-    7c08:	e3a0324e 	mov	r3, #-536870908	; 0xe0000004
-    7c0c:	e2833801 	add	r3, r3, #65536	; 0x10000
-    7c10:	e3a02003 	mov	r2, #3	; 0x3
-    7c14:	e5832000 	str	r2, [r3]
-    7c18:	e3a00006 	mov	r0, #6	; 0x6
-    7c1c:	e59f1064 	ldr	r1, [pc, #100]	; 7c88 <.text+0x7c88>
-    7c20:	eb0012cb 	bl	c754 <install_irq>
-    7c24:	e3a03903 	mov	r3, #49152	; 0xc000
-    7c28:	e283324e 	add	r3, r3, #-536870908	; 0xe0000004
-    7c2c:	e3a02003 	mov	r2, #3	; 0x3
-    7c30:	e5832000 	str	r2, [r3]
-    7c34:	e3a0000b 	mov	r0, #11	; 0xb
-    7c38:	e59f104c 	ldr	r1, [pc, #76]	; 7c8c <.text+0x7c8c>
-    7c3c:	eb0012c4 	bl	c754 <install_irq>
-    7c40:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    7c44:	e283391a 	add	r3, r3, #425984	; 0x68000
-    7c48:	e2833014 	add	r3, r3, #20	; 0x14
-    7c4c:	e3a0200d 	mov	r2, #13	; 0xd
-    7c50:	e5832000 	str	r2, [r3]
-    7c54:	e3a0224e 	mov	r2, #-536870908	; 0xe0000004
-    7c58:	e282291a 	add	r2, r2, #425984	; 0x68000
-    7c5c:	e3a0324e 	mov	r3, #-536870908	; 0xe0000004
-    7c60:	e283391a 	add	r3, r3, #425984	; 0x68000
-    7c64:	e5933000 	ldr	r3, [r3]
-    7c68:	e3833002 	orr	r3, r3, #2	; 0x2
-    7c6c:	e5823000 	str	r3, [r2]
-    7c70:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    7c74:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    7c78:	e12fff1e 	bx	lr
-    7c7c:	00006dd4 	ldreqd	r6, [r0], -r4
-    7c80:	00006ee0 	andeq	r6, r0, r0, ror #29
-    7c84:	0000a2e0 	andeq	sl, r0, r0, ror #5
-    7c88:	00008180 	andeq	r8, r0, r0, lsl #3
-    7c8c:	0000bf88 	andeq	fp, r0, r8, lsl #31
-
-00007c90 <init_ports>:
-    7c90:	e1a0c00d 	mov	ip, sp
-    7c94:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    7c98:	e24cb004 	sub	fp, ip, #4	; 0x4
-    7c9c:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    7ca0:	e283390b 	add	r3, r3, #180224	; 0x2c000
-    7ca4:	e59f2084 	ldr	r2, [pc, #132]	; 7d30 <.text+0x7d30>
-    7ca8:	e5832000 	str	r2, [r3]
-    7cac:	e3a0324e 	mov	r3, #-536870908	; 0xe0000004
-    7cb0:	e283390b 	add	r3, r3, #180224	; 0x2c000
-    7cb4:	e59f2078 	ldr	r2, [pc, #120]	; 7d34 <.text+0x7d34>
-    7cb8:	e5832000 	str	r2, [r3]
-    7cbc:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    7cc0:	e283390b 	add	r3, r3, #180224	; 0x2c000
-    7cc4:	e2833014 	add	r3, r3, #20	; 0x14
-    7cc8:	e3a02004 	mov	r2, #4	; 0x4
-    7ccc:	e5832000 	str	r2, [r3]
-    7cd0:	e3a0228e 	mov	r2, #-536870904	; 0xe0000008
-    7cd4:	e282290a 	add	r2, r2, #163840	; 0x28000
-    7cd8:	e3a039c2 	mov	r3, #3178496	; 0x308000
-    7cdc:	e2833dd2 	add	r3, r3, #13440	; 0x3480
-    7ce0:	e5823000 	str	r3, [r2]
-    7ce4:	e3a0324e 	mov	r3, #-536870908	; 0xe0000004
-    7ce8:	e283390a 	add	r3, r3, #163840	; 0x28000
-    7cec:	e3a02d22 	mov	r2, #2176	; 0x880
-    7cf0:	e5832000 	str	r2, [r3]
-    7cf4:	e3a0220e 	mov	r2, #-536870912	; 0xe0000000
-    7cf8:	e282290a 	add	r2, r2, #163840	; 0x28000
-    7cfc:	e2822018 	add	r2, r2, #24	; 0x18
-    7d00:	e3a03403 	mov	r3, #50331648	; 0x3000000
-    7d04:	e2833803 	add	r3, r3, #196608	; 0x30000
-    7d08:	e5823000 	str	r3, [r2]
-    7d0c:	e3a0220e 	mov	r2, #-536870912	; 0xe0000000
-    7d10:	e282290a 	add	r2, r2, #163840	; 0x28000
-    7d14:	e2822014 	add	r2, r2, #20	; 0x14
-    7d18:	e3a03401 	mov	r3, #16777216	; 0x1000000
-    7d1c:	e2833801 	add	r3, r3, #65536	; 0x10000
-    7d20:	e5823000 	str	r3, [r2]
-    7d24:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    7d28:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    7d2c:	e12fff1e 	bx	lr
-    7d30:	30c51555 	sbccc	r1, r5, r5, asr r5
-    7d34:	150406a8 	strne	r0, [r4, #-1704]
-
-00007d38 <init_timer0>:
-    7d38:	e1a0c00d 	mov	ip, sp
-    7d3c:	e92dd810 	stmdb	sp!, {r4, fp, ip, lr, pc}
-    7d40:	e24cb004 	sub	fp, ip, #4	; 0x4
-    7d44:	e3a03901 	mov	r3, #16384	; 0x4000
-    7d48:	e283328e 	add	r3, r3, #-536870904	; 0xe0000008
-    7d4c:	e3a02000 	mov	r2, #0	; 0x0
-    7d50:	e5832000 	str	r2, [r3]
-    7d54:	e3a03901 	mov	r3, #16384	; 0x4000
-    7d58:	e283324e 	add	r3, r3, #-536870908	; 0xe0000004
-    7d5c:	e3a02000 	mov	r2, #0	; 0x0
-    7d60:	e5832000 	str	r2, [r3]
-    7d64:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    7d68:	e2833901 	add	r3, r3, #16384	; 0x4000
-    7d6c:	e2833014 	add	r3, r3, #20	; 0x14
-    7d70:	e3a02003 	mov	r2, #3	; 0x3
-    7d74:	e5832000 	str	r2, [r3]
-    7d78:	e3a03901 	mov	r3, #16384	; 0x4000
-    7d7c:	e28332ce 	add	r3, r3, #-536870900	; 0xe000000c
-    7d80:	e3a02000 	mov	r2, #0	; 0x0
-    7d84:	e5832000 	str	r2, [r3]
-    7d88:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    7d8c:	e2833901 	add	r3, r3, #16384	; 0x4000
-    7d90:	e2833010 	add	r3, r3, #16	; 0x10
-    7d94:	e3a02000 	mov	r2, #0	; 0x0
-    7d98:	e5832000 	str	r2, [r3]
-    7d9c:	e3a0420e 	mov	r4, #-536870912	; 0xe0000000
-    7da0:	e2844901 	add	r4, r4, #16384	; 0x4000
-    7da4:	e2844018 	add	r4, r4, #24	; 0x18
-    7da8:	eb0000bc 	bl	80a0 <peripheralClockFrequency>
-    7dac:	e1a02000 	mov	r2, r0
-    7db0:	e59f3024 	ldr	r3, [pc, #36]	; 7ddc <.text+0x7ddc>
-    7db4:	e0831392 	umull	r1, r3, r2, r3
-    7db8:	e1a03323 	mov	r3, r3, lsr #6
-    7dbc:	e5843000 	str	r3, [r4]
-    7dc0:	e3a03901 	mov	r3, #16384	; 0x4000
-    7dc4:	e283324e 	add	r3, r3, #-536870908	; 0xe0000004
-    7dc8:	e3a02001 	mov	r2, #1	; 0x1
-    7dcc:	e5832000 	str	r2, [r3]
-    7dd0:	e24bd010 	sub	sp, fp, #16	; 0x10
-    7dd4:	e89d6810 	ldmia	sp, {r4, fp, sp, lr}
-    7dd8:	e12fff1e 	bx	lr
-    7ddc:	10624dd3 	ldrned	r4, [r2], #-211
-
-00007de0 <init_timer1>:
-    7de0:	e1a0c00d 	mov	ip, sp
-    7de4:	e92dd810 	stmdb	sp!, {r4, fp, ip, lr, pc}
-    7de8:	e24cb004 	sub	fp, ip, #4	; 0x4
-    7dec:	e3a03902 	mov	r3, #32768	; 0x8000
-    7df0:	e283328e 	add	r3, r3, #-536870904	; 0xe0000008
-    7df4:	e3a02000 	mov	r2, #0	; 0x0
-    7df8:	e5832000 	str	r2, [r3]
-    7dfc:	e3a03902 	mov	r3, #32768	; 0x8000
-    7e00:	e283324e 	add	r3, r3, #-536870908	; 0xe0000004
-    7e04:	e3a02000 	mov	r2, #0	; 0x0
-    7e08:	e5832000 	str	r2, [r3]
-    7e0c:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    7e10:	e2833902 	add	r3, r3, #32768	; 0x8000
-    7e14:	e2833014 	add	r3, r3, #20	; 0x14
-    7e18:	e3a02003 	mov	r2, #3	; 0x3
-    7e1c:	e5832000 	str	r2, [r3]
-    7e20:	e3a03902 	mov	r3, #32768	; 0x8000
-    7e24:	e28332ce 	add	r3, r3, #-536870900	; 0xe000000c
-    7e28:	e3a02000 	mov	r2, #0	; 0x0
-    7e2c:	e5832000 	str	r2, [r3]
-    7e30:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    7e34:	e2833902 	add	r3, r3, #32768	; 0x8000
-    7e38:	e2833010 	add	r3, r3, #16	; 0x10
-    7e3c:	e3a02000 	mov	r2, #0	; 0x0
-    7e40:	e5832000 	str	r2, [r3]
-    7e44:	e3a0420e 	mov	r4, #-536870912	; 0xe0000000
-    7e48:	e2844902 	add	r4, r4, #32768	; 0x8000
-    7e4c:	e2844018 	add	r4, r4, #24	; 0x18
-    7e50:	eb00008a 	bl	8080 <processorClockFrequency>
-    7e54:	e1a03000 	mov	r3, r0
-    7e58:	e5843000 	str	r3, [r4]
-    7e5c:	e3a03902 	mov	r3, #32768	; 0x8000
-    7e60:	e283324e 	add	r3, r3, #-536870908	; 0xe0000004
-    7e64:	e3a02001 	mov	r2, #1	; 0x1
-    7e68:	e5832000 	str	r2, [r3]
-    7e6c:	e24bd010 	sub	sp, fp, #16	; 0x10
-    7e70:	e89d6810 	ldmia	sp, {r4, fp, sp, lr}
-    7e74:	e12fff1e 	bx	lr
-
-00007e78 <PWM_Init>:
-    7e78:	e1a0c00d 	mov	ip, sp
-    7e7c:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    7e80:	e24cb004 	sub	fp, ip, #4	; 0x4
-    7e84:	e3a0324e 	mov	r3, #-536870908	; 0xe0000004
-    7e88:	e2833905 	add	r3, r3, #81920	; 0x14000
-    7e8c:	e3a02002 	mov	r2, #2	; 0x2
-    7e90:	e5832000 	str	r2, [r3]
-    7e94:	e3a032ce 	mov	r3, #-536870900	; 0xe000000c
-    7e98:	e2833905 	add	r3, r3, #81920	; 0x14000
-    7e9c:	e3a02000 	mov	r2, #0	; 0x0
-    7ea0:	e5832000 	str	r2, [r3]
-    7ea4:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    7ea8:	e2833905 	add	r3, r3, #81920	; 0x14000
-    7eac:	e2833014 	add	r3, r3, #20	; 0x14
-    7eb0:	e3a02002 	mov	r2, #2	; 0x2
-    7eb4:	e5832000 	str	r2, [r3]
-    7eb8:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    7ebc:	e2833905 	add	r3, r3, #81920	; 0x14000
-    7ec0:	e2833018 	add	r3, r3, #24	; 0x18
-    7ec4:	e3a02812 	mov	r2, #1179648	; 0x120000
-    7ec8:	e5832000 	str	r2, [r3]
-    7ecc:	e3a0220e 	mov	r2, #-536870912	; 0xe0000000
-    7ed0:	e2822905 	add	r2, r2, #81920	; 0x14000
-    7ed4:	e2822044 	add	r2, r2, #68	; 0x44
-    7ed8:	e3a03b56 	mov	r3, #88064	; 0x15800
-    7edc:	e2833f65 	add	r3, r3, #404	; 0x194
-    7ee0:	e2833002 	add	r3, r3, #2	; 0x2
-    7ee4:	e5823000 	str	r3, [r2]
-    7ee8:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    7eec:	e2833905 	add	r3, r3, #81920	; 0x14000
-    7ef0:	e2833050 	add	r3, r3, #80	; 0x50
-    7ef4:	e3a02020 	mov	r2, #32	; 0x20
-    7ef8:	e5832000 	str	r2, [r3]
-    7efc:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    7f00:	e2833905 	add	r3, r3, #81920	; 0x14000
-    7f04:	e283304c 	add	r3, r3, #76	; 0x4c
-    7f08:	e3a02c7e 	mov	r2, #32256	; 0x7e00
-    7f0c:	e5832000 	str	r2, [r3]
-    7f10:	e3a0324e 	mov	r3, #-536870908	; 0xe0000004
-    7f14:	e2833905 	add	r3, r3, #81920	; 0x14000
-    7f18:	e3a02009 	mov	r2, #9	; 0x9
-    7f1c:	e5832000 	str	r2, [r3]
-    7f20:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    7f24:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    7f28:	e12fff1e 	bx	lr
-
-00007f2c <init_spi>:
-    7f2c:	e1a0c00d 	mov	ip, sp
-    7f30:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    7f34:	e24cb004 	sub	fp, ip, #4	; 0x4
-    7f38:	e3a032ce 	mov	r3, #-536870900	; 0xe000000c
-    7f3c:	e2833802 	add	r3, r3, #131072	; 0x20000
-    7f40:	e3a02004 	mov	r2, #4	; 0x4
-    7f44:	e5832000 	str	r2, [r3]
-    7f48:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    7f4c:	e2833802 	add	r3, r3, #131072	; 0x20000
-    7f50:	e3a02020 	mov	r2, #32	; 0x20
-    7f54:	e5832000 	str	r2, [r3]
-    7f58:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    7f5c:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    7f60:	e12fff1e 	bx	lr
-
-00007f64 <init_spi1>:
-    7f64:	e1a0c00d 	mov	ip, sp
-    7f68:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    7f6c:	e24cb004 	sub	fp, ip, #4	; 0x4
-    7f70:	e24dd004 	sub	sp, sp, #4	; 0x4
-    7f74:	e3a0220e 	mov	r2, #-536870912	; 0xe0000000
-    7f78:	e282291a 	add	r2, r2, #425984	; 0x68000
-    7f7c:	e3a03b01 	mov	r3, #1024	; 0x400
-    7f80:	e283300f 	add	r3, r3, #15	; 0xf
-    7f84:	e5823000 	str	r3, [r2]
-    7f88:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    7f8c:	e283391a 	add	r3, r3, #425984	; 0x68000
-    7f90:	e2833010 	add	r3, r3, #16	; 0x10
-    7f94:	e3a0201b 	mov	r2, #27	; 0x1b
-    7f98:	e5832000 	str	r2, [r3]
-    7f9c:	e3a03000 	mov	r3, #0	; 0x0
-    7fa0:	e54b300e 	strb	r3, [fp, #-14]
-    7fa4:	ea000006 	b	7fc4 <init_spi1+0x60>
-    7fa8:	e3a0328e 	mov	r3, #-536870904	; 0xe0000008
-    7fac:	e283391a 	add	r3, r3, #425984	; 0x68000
-    7fb0:	e5933000 	ldr	r3, [r3]
-    7fb4:	e54b300d 	strb	r3, [fp, #-13]
-    7fb8:	e55b300e 	ldrb	r3, [fp, #-14]
-    7fbc:	e2833001 	add	r3, r3, #1	; 0x1
-    7fc0:	e54b300e 	strb	r3, [fp, #-14]
-    7fc4:	e55b300e 	ldrb	r3, [fp, #-14]
-    7fc8:	e3530007 	cmp	r3, #7	; 0x7
-    7fcc:	9afffff5 	bls	7fa8 <init_spi1+0x44>
-    7fd0:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    7fd4:	e283391a 	add	r3, r3, #425984	; 0x68000
-    7fd8:	e2833014 	add	r3, r3, #20	; 0x14
-    7fdc:	e3a02000 	mov	r2, #0	; 0x0
-    7fe0:	e5832000 	str	r2, [r3]
-    7fe4:	e3a0324e 	mov	r3, #-536870908	; 0xe0000004
-    7fe8:	e283391a 	add	r3, r3, #425984	; 0x68000
-    7fec:	e3a02000 	mov	r2, #0	; 0x0
-    7ff0:	e5832000 	str	r2, [r3]
-    7ff4:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    7ff8:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    7ffc:	e12fff1e 	bx	lr
-
-00008000 <pll_init>:
-    8000:	e1a0c00d 	mov	ip, sp
-    8004:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    8008:	e24cb004 	sub	fp, ip, #4	; 0x4
-    800c:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    8010:	e283397f 	add	r3, r3, #2080768	; 0x1fc000
-    8014:	e2833084 	add	r3, r3, #132	; 0x84
-    8018:	e3a02023 	mov	r2, #35	; 0x23
-    801c:	e5832000 	str	r2, [r3]
-    8020:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    8024:	e283397f 	add	r3, r3, #2080768	; 0x1fc000
-    8028:	e2833080 	add	r3, r3, #128	; 0x80
-    802c:	e3a02003 	mov	r2, #3	; 0x3
-    8030:	e5832000 	str	r2, [r3]
-    8034:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    8038:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    803c:	e12fff1e 	bx	lr
-
-00008040 <pll_feed>:
-    8040:	e1a0c00d 	mov	ip, sp
-    8044:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    8048:	e24cb004 	sub	fp, ip, #4	; 0x4
-    804c:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    8050:	e283397f 	add	r3, r3, #2080768	; 0x1fc000
-    8054:	e283308c 	add	r3, r3, #140	; 0x8c
-    8058:	e3a020aa 	mov	r2, #170	; 0xaa
-    805c:	e5832000 	str	r2, [r3]
-    8060:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    8064:	e283397f 	add	r3, r3, #2080768	; 0x1fc000
-    8068:	e283308c 	add	r3, r3, #140	; 0x8c
-    806c:	e3a02055 	mov	r2, #85	; 0x55
-    8070:	e5832000 	str	r2, [r3]
-    8074:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    8078:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    807c:	e12fff1e 	bx	lr
-
-00008080 <processorClockFrequency>:
-    8080:	e1a0c00d 	mov	ip, sp
-    8084:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    8088:	e24cb004 	sub	fp, ip, #4	; 0x4
-    808c:	e3a037e1 	mov	r3, #58982400	; 0x3840000
-    8090:	e1a00003 	mov	r0, r3
-    8094:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    8098:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    809c:	e12fff1e 	bx	lr
-
-000080a0 <peripheralClockFrequency>:
-    80a0:	e1a0c00d 	mov	ip, sp
-    80a4:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    80a8:	e24cb004 	sub	fp, ip, #4	; 0x4
-    80ac:	e24dd008 	sub	sp, sp, #8	; 0x8
-    80b0:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    80b4:	e283397f 	add	r3, r3, #2080768	; 0x1fc000
-    80b8:	e2833c01 	add	r3, r3, #256	; 0x100
-    80bc:	e5933000 	ldr	r3, [r3]
-    80c0:	e2033003 	and	r3, r3, #3	; 0x3
-    80c4:	e50b3014 	str	r3, [fp, #-20]
-    80c8:	e51b3014 	ldr	r3, [fp, #-20]
-    80cc:	e3530001 	cmp	r3, #1	; 0x1
-    80d0:	0a000009 	beq	80fc <peripheralClockFrequency+0x5c>
-    80d4:	e51b3014 	ldr	r3, [fp, #-20]
-    80d8:	e3530001 	cmp	r3, #1	; 0x1
-    80dc:	3a000003 	bcc	80f0 <peripheralClockFrequency+0x50>
-    80e0:	e51b3014 	ldr	r3, [fp, #-20]
-    80e4:	e3530002 	cmp	r3, #2	; 0x2
-    80e8:	0a000006 	beq	8108 <peripheralClockFrequency+0x68>
-    80ec:	ea000007 	b	8110 <peripheralClockFrequency+0x70>
-    80f0:	e3a03004 	mov	r3, #4	; 0x4
-    80f4:	e50b3010 	str	r3, [fp, #-16]
-    80f8:	ea000004 	b	8110 <peripheralClockFrequency+0x70>
-    80fc:	e3a03001 	mov	r3, #1	; 0x1
-    8100:	e50b3010 	str	r3, [fp, #-16]
-    8104:	ea000001 	b	8110 <peripheralClockFrequency+0x70>
-    8108:	e3a03002 	mov	r3, #2	; 0x2
-    810c:	e50b3010 	str	r3, [fp, #-16]
-    8110:	ebffffda 	bl	8080 <processorClockFrequency>
-    8114:	e1a03000 	mov	r3, r0
-    8118:	e1a00003 	mov	r0, r3
-    811c:	e51b1010 	ldr	r1, [fp, #-16]
-    8120:	eb0032c9 	bl	14c4c <____udivsi3_from_arm>
-    8124:	e1a03000 	mov	r3, r0
-    8128:	e1a00003 	mov	r0, r3
-    812c:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    8130:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    8134:	e12fff1e 	bx	lr
-
-00008138 <delay>:
-    8138:	e1a0c00d 	mov	ip, sp
-    813c:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    8140:	e24cb004 	sub	fp, ip, #4	; 0x4
-    8144:	e24dd008 	sub	sp, sp, #8	; 0x8
-    8148:	e50b0014 	str	r0, [fp, #-20]
-    814c:	e3a03000 	mov	r3, #0	; 0x0
-    8150:	e50b3010 	str	r3, [fp, #-16]
-    8154:	ea000002 	b	8164 <delay+0x2c>
-    8158:	e51b3010 	ldr	r3, [fp, #-16]
-    815c:	e2833001 	add	r3, r3, #1	; 0x1
-    8160:	e50b3010 	str	r3, [fp, #-16]
-    8164:	e51b2010 	ldr	r2, [fp, #-16]
-    8168:	e51b3014 	ldr	r3, [fp, #-20]
-    816c:	e1520003 	cmp	r2, r3
-    8170:	bafffff8 	blt	8158 <delay+0x20>
-    8174:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    8178:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    817c:	e12fff1e 	bx	lr
-
-00008180 <uart0ISR>:
-    8180:	e1a0c00d 	mov	ip, sp
-    8184:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    8188:	e24cb004 	sub	fp, ip, #4	; 0x4
-    818c:	e24dd008 	sub	sp, sp, #8	; 0x8
-    8190:	e3a03000 	mov	r3, #0	; 0x0
-    8194:	e14b30be 	strh	r3, [fp, #-14]
-    8198:	ea0000a0 	b	8420 <.text+0x8420>
-    819c:	e15b31b0 	ldrh	r3, [fp, #-16]
-    81a0:	e2033c01 	and	r3, r3, #256	; 0x100
-    81a4:	e3530000 	cmp	r3, #0	; 0x0
-    81a8:	0a00001e 	beq	8228 <uart0ISR+0xa8>
-    81ac:	e59f22a8 	ldr	r2, [pc, #680]	; 845c <.text+0x845c>
-    81b0:	e3a03001 	mov	r3, #1	; 0x1
-    81b4:	e5c23000 	strb	r3, [r2]
-    81b8:	e3a0220e 	mov	r2, #-536870912	; 0xe0000000
-    81bc:	e2822903 	add	r2, r2, #49152	; 0xc000
-    81c0:	e2822020 	add	r2, r2, #32	; 0x20
-    81c4:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    81c8:	e2833903 	add	r3, r3, #49152	; 0xc000
-    81cc:	e2833020 	add	r3, r3, #32	; 0x20
-    81d0:	e5933000 	ldr	r3, [r3]
-    81d4:	e3833c01 	orr	r3, r3, #256	; 0x100
-    81d8:	e5823000 	str	r3, [r2]
-    81dc:	e3a0220e 	mov	r2, #-536870912	; 0xe0000000
-    81e0:	e2822903 	add	r2, r2, #49152	; 0xc000
-    81e4:	e2822020 	add	r2, r2, #32	; 0x20
-    81e8:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    81ec:	e2833903 	add	r3, r3, #49152	; 0xc000
-    81f0:	e2833020 	add	r3, r3, #32	; 0x20
-    81f4:	e5933000 	ldr	r3, [r3]
-    81f8:	e3c33001 	bic	r3, r3, #1	; 0x1
-    81fc:	e5823000 	str	r3, [r2]
-    8200:	e3a02903 	mov	r2, #49152	; 0xc000
-    8204:	e282224e 	add	r2, r2, #-536870908	; 0xe0000004
-    8208:	e3a03903 	mov	r3, #49152	; 0xc000
-    820c:	e283324e 	add	r3, r3, #-536870908	; 0xe0000004
-    8210:	e5933000 	ldr	r3, [r3]
-    8214:	e3c33c03 	bic	r3, r3, #768	; 0x300
-    8218:	e5823000 	str	r3, [r2]
-    821c:	e59f2238 	ldr	r2, [pc, #568]	; 845c <.text+0x845c>
-    8220:	e3a03000 	mov	r3, #0	; 0x0
-    8224:	e5c23000 	strb	r3, [r2]
-    8228:	e15b31b0 	ldrh	r3, [fp, #-16]
-    822c:	e2033c02 	and	r3, r3, #512	; 0x200
-    8230:	e3530000 	cmp	r3, #0	; 0x0
-    8234:	0a00000e 	beq	8274 <uart0ISR+0xf4>
-    8238:	e59f221c 	ldr	r2, [pc, #540]	; 845c <.text+0x845c>
-    823c:	e3a03001 	mov	r3, #1	; 0x1
-    8240:	e5c23000 	strb	r3, [r2]
-    8244:	e3a0220e 	mov	r2, #-536870912	; 0xe0000000
-    8248:	e2822903 	add	r2, r2, #49152	; 0xc000
-    824c:	e2822020 	add	r2, r2, #32	; 0x20
-    8250:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    8254:	e2833903 	add	r3, r3, #49152	; 0xc000
-    8258:	e2833020 	add	r3, r3, #32	; 0x20
-    825c:	e5933000 	ldr	r3, [r3]
-    8260:	e3833c02 	orr	r3, r3, #512	; 0x200
-    8264:	e5823000 	str	r3, [r2]
-    8268:	e59f21ec 	ldr	r2, [pc, #492]	; 845c <.text+0x845c>
-    826c:	e3a03000 	mov	r3, #0	; 0x0
-    8270:	e5c23000 	strb	r3, [r2]
-    8274:	e15b31b0 	ldrh	r3, [fp, #-16]
-    8278:	e203300e 	and	r3, r3, #14	; 0xe
-    827c:	e2433002 	sub	r3, r3, #2	; 0x2
-    8280:	e353000a 	cmp	r3, #10	; 0xa
-    8284:	979ff103 	ldrls	pc, [pc, r3, lsl #2]
-    8288:	ea00005d 	b	8404 <.text+0x8404>
-    828c:	00008370 	andeq	r8, r0, r0, ror r3
-    8290:	00008404 	andeq	r8, r0, r4, lsl #8
-    8294:	000082cc 	andeq	r8, r0, ip, asr #5
-    8298:	00008404 	andeq	r8, r0, r4, lsl #8
-    829c:	000082b8 	streqh	r8, [r0], -r8
-    82a0:	00008404 	andeq	r8, r0, r4, lsl #8
-    82a4:	00008404 	andeq	r8, r0, r4, lsl #8
-    82a8:	00008404 	andeq	r8, r0, r4, lsl #8
-    82ac:	00008404 	andeq	r8, r0, r4, lsl #8
-    82b0:	00008404 	andeq	r8, r0, r4, lsl #8
-    82b4:	000082cc 	andeq	r8, r0, ip, asr #5
-    82b8:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    82bc:	e2833903 	add	r3, r3, #49152	; 0xc000
-    82c0:	e2833014 	add	r3, r3, #20	; 0x14
-    82c4:	e5933000 	ldr	r3, [r3]
-    82c8:	ea000054 	b	8420 <.text+0x8420>
-    82cc:	e59f318c 	ldr	r3, [pc, #396]	; 8460 <.text+0x8460>
-    82d0:	e3a02001 	mov	r2, #1	; 0x1
-    82d4:	e5c32004 	strb	r2, [r3, #4]
-    82d8:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    82dc:	e2833903 	add	r3, r3, #49152	; 0xc000
-    82e0:	e5933000 	ldr	r3, [r3]
-    82e4:	e20330ff 	and	r3, r3, #255	; 0xff
-    82e8:	e54b3011 	strb	r3, [fp, #-17]
-    82ec:	e59f016c 	ldr	r0, [pc, #364]	; 8460 <.text+0x8460>
-    82f0:	eb000102 	bl	8700 <Fifo_availableMemory>
-    82f4:	e1a03000 	mov	r3, r0
-    82f8:	e14b30be 	strh	r3, [fp, #-14]
-    82fc:	e59f3160 	ldr	r3, [pc, #352]	; 8464 <.text+0x8464>
-    8300:	e1d330b0 	ldrh	r3, [r3]
-    8304:	e15b20fe 	ldrsh	r2, [fp, #-14]
-    8308:	e1a03803 	mov	r3, r3, lsl #16
-    830c:	e1a03843 	mov	r3, r3, asr #16
-    8310:	e1520003 	cmp	r2, r3
-    8314:	aa000002 	bge	8324 <.text+0x8324>
-    8318:	e59f2144 	ldr	r2, [pc, #324]	; 8464 <.text+0x8464>
-    831c:	e15b30be 	ldrh	r3, [fp, #-14]
-    8320:	e1c230b0 	strh	r3, [r2]
-    8324:	e55b3011 	ldrb	r3, [fp, #-17]
-    8328:	e59f0130 	ldr	r0, [pc, #304]	; 8460 <.text+0x8460>
-    832c:	e1a01003 	mov	r1, r3
-    8330:	eb00006e 	bl	84f0 <Fifo_writeByte>
-    8334:	e1a03000 	mov	r3, r0
-    8338:	e3530000 	cmp	r3, #0	; 0x0
-    833c:	0a000007 	beq	8360 <.text+0x8360>
-    8340:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    8344:	e2833903 	add	r3, r3, #49152	; 0xc000
-    8348:	e2833014 	add	r3, r3, #20	; 0x14
-    834c:	e5933000 	ldr	r3, [r3]
-    8350:	e2033001 	and	r3, r3, #1	; 0x1
-    8354:	e20330ff 	and	r3, r3, #255	; 0xff
-    8358:	e3530000 	cmp	r3, #0	; 0x0
-    835c:	1affffdd 	bne	82d8 <.text+0x82d8>
-    8360:	e59f30f8 	ldr	r3, [pc, #248]	; 8460 <.text+0x8460>
-    8364:	e3a02000 	mov	r2, #0	; 0x0
-    8368:	e5c32004 	strb	r2, [r3, #4]
-    836c:	ea00002b 	b	8420 <.text+0x8420>
-    8370:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    8374:	e283390a 	add	r3, r3, #163840	; 0x28000
-    8378:	e5933000 	ldr	r3, [r3]
-    837c:	e2033501 	and	r3, r3, #4194304	; 0x400000
-    8380:	e3530000 	cmp	r3, #0	; 0x0
-    8384:	1a000025 	bne	8420 <.text+0x8420>
-    8388:	e59f30d8 	ldr	r3, [pc, #216]	; 8468 <.text+0x8468>
-    838c:	e3a02001 	mov	r2, #1	; 0x1
-    8390:	e5c32004 	strb	r2, [r3, #4]
-    8394:	ea00000f 	b	83d8 <.text+0x83d8>
-    8398:	e24b3011 	sub	r3, fp, #17	; 0x11
-    839c:	e59f00c4 	ldr	r0, [pc, #196]	; 8468 <.text+0x8468>
-    83a0:	e1a01003 	mov	r1, r3
-    83a4:	eb0000af 	bl	8668 <Fifo_readByte>
-    83a8:	e1a03000 	mov	r3, r0
-    83ac:	e3530000 	cmp	r3, #0	; 0x0
-    83b0:	0a000004 	beq	83c8 <.text+0x83c8>
-    83b4:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    83b8:	e2833903 	add	r3, r3, #49152	; 0xc000
-    83bc:	e55b2011 	ldrb	r2, [fp, #-17]
-    83c0:	e5832000 	str	r2, [r3]
-    83c4:	ea000003 	b	83d8 <.text+0x83d8>
-    83c8:	e59f309c 	ldr	r3, [pc, #156]	; 846c <.text+0x846c>
-    83cc:	e3a02000 	mov	r2, #0	; 0x0
-    83d0:	e5c32000 	strb	r2, [r3]
-    83d4:	ea000006 	b	83f4 <.text+0x83f4>
-    83d8:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    83dc:	e2833903 	add	r3, r3, #49152	; 0xc000
-    83e0:	e2833014 	add	r3, r3, #20	; 0x14
-    83e4:	e5933000 	ldr	r3, [r3]
-    83e8:	e2033020 	and	r3, r3, #32	; 0x20
-    83ec:	e3530000 	cmp	r3, #0	; 0x0
-    83f0:	1affffe8 	bne	8398 <.text+0x8398>
-    83f4:	e59f306c 	ldr	r3, [pc, #108]	; 8468 <.text+0x8468>
-    83f8:	e3a02000 	mov	r2, #0	; 0x0
-    83fc:	e5c32004 	strb	r2, [r3, #4]
-    8400:	ea000006 	b	8420 <.text+0x8420>
-    8404:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    8408:	e2833903 	add	r3, r3, #49152	; 0xc000
-    840c:	e2833014 	add	r3, r3, #20	; 0x14
-    8410:	e5933000 	ldr	r3, [r3]
-    8414:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    8418:	e2833903 	add	r3, r3, #49152	; 0xc000
-    841c:	e5933000 	ldr	r3, [r3]
-    8420:	e3a03903 	mov	r3, #49152	; 0xc000
-    8424:	e283328e 	add	r3, r3, #-536870904	; 0xe0000008
-    8428:	e5933000 	ldr	r3, [r3]
-    842c:	e14b31b0 	strh	r3, [fp, #-16]
-    8430:	e15b31b0 	ldrh	r3, [fp, #-16]
-    8434:	e2033001 	and	r3, r3, #1	; 0x1
-    8438:	e3530000 	cmp	r3, #0	; 0x0
-    843c:	0affff56 	beq	819c <uart0ISR+0x1c>
-    8440:	e3a03000 	mov	r3, #0	; 0x0
-    8444:	e2433efd 	sub	r3, r3, #4048	; 0xfd0
-    8448:	e3a02000 	mov	r2, #0	; 0x0
-    844c:	e5832000 	str	r2, [r3]
-    8450:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    8454:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    8458:	e12fff1e 	bx	lr
-    845c:	400008c4 	andmi	r0, r0, r4, asr #17
-    8460:	40001b44 	andmi	r1, r0, r4, asr #22
-    8464:	4000000e 	andmi	r0, r0, lr
-    8468:	40001928 	andmi	r1, r0, r8, lsr #18
-    846c:	400008b0 	strmih	r0, [r0], -r0
-
-00008470 <Fifo_initialize>:
-    8470:	e1a0c00d 	mov	ip, sp
-    8474:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    8478:	e24cb004 	sub	fp, ip, #4	; 0x4
-    847c:	e24dd00c 	sub	sp, sp, #12	; 0xc
-    8480:	e50b0010 	str	r0, [fp, #-16]
-    8484:	e50b1014 	str	r1, [fp, #-20]
-    8488:	e50b2018 	str	r2, [fp, #-24]
-    848c:	e51b2010 	ldr	r2, [fp, #-16]
-    8490:	e51b3014 	ldr	r3, [fp, #-20]
-    8494:	e5823000 	str	r3, [r2]
-    8498:	e51b2010 	ldr	r2, [fp, #-16]
-    849c:	e51b3018 	ldr	r3, [fp, #-24]
-    84a0:	e5823008 	str	r3, [r2, #8]
-    84a4:	e51b2010 	ldr	r2, [fp, #-16]
-    84a8:	e3a03000 	mov	r3, #0	; 0x0
-    84ac:	e582300c 	str	r3, [r2, #12]
-    84b0:	e51b2010 	ldr	r2, [fp, #-16]
-    84b4:	e3a03000 	mov	r3, #0	; 0x0
-    84b8:	e5823010 	str	r3, [r2, #16]
-    84bc:	e51b2010 	ldr	r2, [fp, #-16]
-    84c0:	e3a03000 	mov	r3, #0	; 0x0
-    84c4:	e5823014 	str	r3, [r2, #20]
-    84c8:	e51b3018 	ldr	r3, [fp, #-24]
-    84cc:	e2432001 	sub	r2, r3, #1	; 0x1
-    84d0:	e51b3010 	ldr	r3, [fp, #-16]
-    84d4:	e5832018 	str	r2, [r3, #24]
-    84d8:	e51b2010 	ldr	r2, [fp, #-16]
-    84dc:	e3a03000 	mov	r3, #0	; 0x0
-    84e0:	e5c23004 	strb	r3, [r2, #4]
-    84e4:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    84e8:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    84ec:	e12fff1e 	bx	lr
-
-000084f0 <Fifo_writeByte>:
-    84f0:	e1a0c00d 	mov	ip, sp
-    84f4:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    84f8:	e24cb004 	sub	fp, ip, #4	; 0x4
-    84fc:	e24dd00c 	sub	sp, sp, #12	; 0xc
-    8500:	e50b0010 	str	r0, [fp, #-16]
-    8504:	e1a03001 	mov	r3, r1
-    8508:	e54b3014 	strb	r3, [fp, #-20]
-    850c:	e51b3010 	ldr	r3, [fp, #-16]
-    8510:	e5933010 	ldr	r3, [r3, #16]
-    8514:	e2832001 	add	r2, r3, #1	; 0x1
-    8518:	e51b3010 	ldr	r3, [fp, #-16]
-    851c:	e5933018 	ldr	r3, [r3, #24]
-    8520:	e0022003 	and	r2, r2, r3
-    8524:	e51b3010 	ldr	r3, [fp, #-16]
-    8528:	e5832014 	str	r2, [r3, #20]
-    852c:	e51b3010 	ldr	r3, [fp, #-16]
-    8530:	e593200c 	ldr	r2, [r3, #12]
-    8534:	e51b3010 	ldr	r3, [fp, #-16]
-    8538:	e5933014 	ldr	r3, [r3, #20]
-    853c:	e1520003 	cmp	r2, r3
-    8540:	1a000002 	bne	8550 <Fifo_writeByte+0x60>
-    8544:	e3a03000 	mov	r3, #0	; 0x0
-    8548:	e50b3018 	str	r3, [fp, #-24]
-    854c:	ea00000c 	b	8584 <Fifo_writeByte+0x94>
-    8550:	e51b3010 	ldr	r3, [fp, #-16]
-    8554:	e5932000 	ldr	r2, [r3]
-    8558:	e51b3010 	ldr	r3, [fp, #-16]
-    855c:	e5933010 	ldr	r3, [r3, #16]
-    8560:	e0822003 	add	r2, r2, r3
-    8564:	e55b3014 	ldrb	r3, [fp, #-20]
-    8568:	e5c23000 	strb	r3, [r2]
-    856c:	e51b3010 	ldr	r3, [fp, #-16]
-    8570:	e5932014 	ldr	r2, [r3, #20]
-    8574:	e51b3010 	ldr	r3, [fp, #-16]
-    8578:	e5832010 	str	r2, [r3, #16]
-    857c:	e3a03001 	mov	r3, #1	; 0x1
-    8580:	e50b3018 	str	r3, [fp, #-24]
-    8584:	e51b3018 	ldr	r3, [fp, #-24]
-    8588:	e1a00003 	mov	r0, r3
-    858c:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    8590:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    8594:	e12fff1e 	bx	lr
-
-00008598 <Fifo_writeBlock>:
-    8598:	e1a0c00d 	mov	ip, sp
-    859c:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    85a0:	e24cb004 	sub	fp, ip, #4	; 0x4
-    85a4:	e24dd014 	sub	sp, sp, #20	; 0x14
-    85a8:	e50b0014 	str	r0, [fp, #-20]
-    85ac:	e50b1018 	str	r1, [fp, #-24]
-    85b0:	e50b201c 	str	r2, [fp, #-28]
-    85b4:	e51b0014 	ldr	r0, [fp, #-20]
-    85b8:	eb000050 	bl	8700 <Fifo_availableMemory>
-    85bc:	e1a03000 	mov	r3, r0
-    85c0:	e1a02003 	mov	r2, r3
-    85c4:	e51b301c 	ldr	r3, [fp, #-28]
-    85c8:	e1520003 	cmp	r2, r3
-    85cc:	8a000002 	bhi	85dc <Fifo_writeBlock+0x44>
-    85d0:	e3a03000 	mov	r3, #0	; 0x0
-    85d4:	e50b3020 	str	r3, [fp, #-32]
-    85d8:	ea00001d 	b	8654 <Fifo_writeBlock+0xbc>
-    85dc:	e51b3018 	ldr	r3, [fp, #-24]
-    85e0:	e50b3010 	str	r3, [fp, #-16]
-    85e4:	ea000012 	b	8634 <Fifo_writeBlock+0x9c>
-    85e8:	e51b3014 	ldr	r3, [fp, #-20]
-    85ec:	e5932000 	ldr	r2, [r3]
-    85f0:	e51b3014 	ldr	r3, [fp, #-20]
-    85f4:	e5933010 	ldr	r3, [r3, #16]
-    85f8:	e0822003 	add	r2, r2, r3
-    85fc:	e51b3010 	ldr	r3, [fp, #-16]
-    8600:	e5d33000 	ldrb	r3, [r3]
-    8604:	e5c23000 	strb	r3, [r2]
-    8608:	e51b3010 	ldr	r3, [fp, #-16]
-    860c:	e2833001 	add	r3, r3, #1	; 0x1
-    8610:	e50b3010 	str	r3, [fp, #-16]
-    8614:	e51b3014 	ldr	r3, [fp, #-20]
-    8618:	e5933010 	ldr	r3, [r3, #16]
-    861c:	e2832001 	add	r2, r3, #1	; 0x1
-    8620:	e51b3014 	ldr	r3, [fp, #-20]
-    8624:	e5933018 	ldr	r3, [r3, #24]
-    8628:	e0022003 	and	r2, r2, r3
-    862c:	e51b3014 	ldr	r3, [fp, #-20]
-    8630:	e5832010 	str	r2, [r3, #16]
-    8634:	e51b301c 	ldr	r3, [fp, #-28]
-    8638:	e2433001 	sub	r3, r3, #1	; 0x1
-    863c:	e50b301c 	str	r3, [fp, #-28]
-    8640:	e51b301c 	ldr	r3, [fp, #-28]
-    8644:	e3730001 	cmn	r3, #1	; 0x1
-    8648:	1affffe6 	bne	85e8 <Fifo_writeBlock+0x50>
-    864c:	e3a03001 	mov	r3, #1	; 0x1
-    8650:	e50b3020 	str	r3, [fp, #-32]
-    8654:	e51b3020 	ldr	r3, [fp, #-32]
-    8658:	e1a00003 	mov	r0, r3
-    865c:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    8660:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    8664:	e12fff1e 	bx	lr
-
-00008668 <Fifo_readByte>:
-    8668:	e1a0c00d 	mov	ip, sp
-    866c:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    8670:	e24cb004 	sub	fp, ip, #4	; 0x4
-    8674:	e24dd00c 	sub	sp, sp, #12	; 0xc
-    8678:	e50b0010 	str	r0, [fp, #-16]
-    867c:	e50b1014 	str	r1, [fp, #-20]
-    8680:	e51b3010 	ldr	r3, [fp, #-16]
-    8684:	e593200c 	ldr	r2, [r3, #12]
-    8688:	e51b3010 	ldr	r3, [fp, #-16]
-    868c:	e5933010 	ldr	r3, [r3, #16]
-    8690:	e1520003 	cmp	r2, r3
-    8694:	1a000002 	bne	86a4 <Fifo_readByte+0x3c>
-    8698:	e3a03000 	mov	r3, #0	; 0x0
-    869c:	e50b3018 	str	r3, [fp, #-24]
-    86a0:	ea000011 	b	86ec <Fifo_readByte+0x84>
-    86a4:	e51b3010 	ldr	r3, [fp, #-16]
-    86a8:	e5932000 	ldr	r2, [r3]
-    86ac:	e51b3010 	ldr	r3, [fp, #-16]
-    86b0:	e593300c 	ldr	r3, [r3, #12]
-    86b4:	e0823003 	add	r3, r2, r3
-    86b8:	e5d33000 	ldrb	r3, [r3]
-    86bc:	e51b2014 	ldr	r2, [fp, #-20]
-    86c0:	e5c23000 	strb	r3, [r2]
-    86c4:	e51b3010 	ldr	r3, [fp, #-16]
-    86c8:	e593300c 	ldr	r3, [r3, #12]
-    86cc:	e2832001 	add	r2, r3, #1	; 0x1
-    86d0:	e51b3010 	ldr	r3, [fp, #-16]
-    86d4:	e5933018 	ldr	r3, [r3, #24]
-    86d8:	e0022003 	and	r2, r2, r3
-    86dc:	e51b3010 	ldr	r3, [fp, #-16]
-    86e0:	e583200c 	str	r2, [r3, #12]
-    86e4:	e3a03001 	mov	r3, #1	; 0x1
-    86e8:	e50b3018 	str	r3, [fp, #-24]
-    86ec:	e51b3018 	ldr	r3, [fp, #-24]
-    86f0:	e1a00003 	mov	r0, r3
-    86f4:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    86f8:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    86fc:	e12fff1e 	bx	lr
-
-00008700 <Fifo_availableMemory>:
-    8700:	e1a0c00d 	mov	ip, sp
-    8704:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    8708:	e24cb004 	sub	fp, ip, #4	; 0x4
-    870c:	e24dd004 	sub	sp, sp, #4	; 0x4
-    8710:	e50b0010 	str	r0, [fp, #-16]
-    8714:	e51b3010 	ldr	r3, [fp, #-16]
-    8718:	e593300c 	ldr	r3, [r3, #12]
-    871c:	e1a03803 	mov	r3, r3, lsl #16
-    8720:	e1a02823 	mov	r2, r3, lsr #16
-    8724:	e51b3010 	ldr	r3, [fp, #-16]
-    8728:	e5933010 	ldr	r3, [r3, #16]
-    872c:	e1a03803 	mov	r3, r3, lsl #16
-    8730:	e1a03823 	mov	r3, r3, lsr #16
-    8734:	e0633002 	rsb	r3, r3, r2
-    8738:	e1a03803 	mov	r3, r3, lsl #16
-    873c:	e1a03823 	mov	r3, r3, lsr #16
-    8740:	e2433001 	sub	r3, r3, #1	; 0x1
-    8744:	e1a03803 	mov	r3, r3, lsl #16
-    8748:	e1a02823 	mov	r2, r3, lsr #16
-    874c:	e51b3010 	ldr	r3, [fp, #-16]
-    8750:	e5933018 	ldr	r3, [r3, #24]
-    8754:	e1a03803 	mov	r3, r3, lsl #16
-    8758:	e1a03823 	mov	r3, r3, lsr #16
-    875c:	e0023003 	and	r3, r2, r3
-    8760:	e1a03803 	mov	r3, r3, lsl #16
-    8764:	e1a03823 	mov	r3, r3, lsr #16
-    8768:	e1a00003 	mov	r0, r3
-    876c:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    8770:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    8774:	e12fff1e 	bx	lr
-
-00008778 <Fifo_reset>:
-    8778:	e1a0c00d 	mov	ip, sp
-    877c:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    8780:	e24cb004 	sub	fp, ip, #4	; 0x4
-    8784:	e24dd004 	sub	sp, sp, #4	; 0x4
-    8788:	e50b0010 	str	r0, [fp, #-16]
-    878c:	e51b2010 	ldr	r2, [fp, #-16]
-    8790:	e3a03000 	mov	r3, #0	; 0x0
-    8794:	e5823010 	str	r3, [r2, #16]
-    8798:	e51b2010 	ldr	r2, [fp, #-16]
-    879c:	e3a03000 	mov	r3, #0	; 0x0
-    87a0:	e582300c 	str	r3, [r2, #12]
-    87a4:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    87a8:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    87ac:	e12fff1e 	bx	lr
-
-000087b0 <registerPacket>:
-    87b0:	e1a0c00d 	mov	ip, sp
-    87b4:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    87b8:	e24cb004 	sub	fp, ip, #4	; 0x4
-    87bc:	e24dd008 	sub	sp, sp, #8	; 0x8
-    87c0:	e1a03000 	mov	r3, r0
-    87c4:	e50b1014 	str	r1, [fp, #-20]
-    87c8:	e54b3010 	strb	r3, [fp, #-16]
-    87cc:	e59f30cc 	ldr	r3, [pc, #204]	; 88a0 <.text+0x88a0>
-    87d0:	e5932000 	ldr	r2, [r3]
-    87d4:	e59f10c8 	ldr	r1, [pc, #200]	; 88a4 <.text+0x88a4>
-    87d8:	e3a00004 	mov	r0, #4	; 0x4
-    87dc:	e1a03002 	mov	r3, r2
-    87e0:	e1a03083 	mov	r3, r3, lsl #1
-    87e4:	e0833002 	add	r3, r3, r2
-    87e8:	e1a03103 	mov	r3, r3, lsl #2
-    87ec:	e0833001 	add	r3, r3, r1
-    87f0:	e0832000 	add	r2, r3, r0
-    87f4:	e51b3014 	ldr	r3, [fp, #-20]
-    87f8:	e5823000 	str	r3, [r2]
-    87fc:	e59f309c 	ldr	r3, [pc, #156]	; 88a0 <.text+0x88a0>
-    8800:	e5932000 	ldr	r2, [r3]
-    8804:	e59f1098 	ldr	r1, [pc, #152]	; 88a4 <.text+0x88a4>
-    8808:	e1a03002 	mov	r3, r2
-    880c:	e1a03083 	mov	r3, r3, lsl #1
-    8810:	e0833002 	add	r3, r3, r2
-    8814:	e1a03103 	mov	r3, r3, lsl #2
-    8818:	e0832001 	add	r2, r3, r1
-    881c:	e55b3010 	ldrb	r3, [fp, #-16]
-    8820:	e5c23000 	strb	r3, [r2]
-    8824:	e59f3074 	ldr	r3, [pc, #116]	; 88a0 <.text+0x88a0>
-    8828:	e5932000 	ldr	r2, [r3]
-    882c:	e59f1070 	ldr	r1, [pc, #112]	; 88a4 <.text+0x88a4>
-    8830:	e3a00008 	mov	r0, #8	; 0x8
-    8834:	e1a03002 	mov	r3, r2
-    8838:	e1a03083 	mov	r3, r3, lsl #1
-    883c:	e0833002 	add	r3, r3, r2
-    8840:	e1a03103 	mov	r3, r3, lsl #2
-    8844:	e0833001 	add	r3, r3, r1
-    8848:	e0832000 	add	r2, r3, r0
-    884c:	e3a03000 	mov	r3, #0	; 0x0
-    8850:	e5c23000 	strb	r3, [r2]
-    8854:	e59f3044 	ldr	r3, [pc, #68]	; 88a0 <.text+0x88a0>
-    8858:	e5933000 	ldr	r3, [r3]
-    885c:	e2832001 	add	r2, r3, #1	; 0x1
-    8860:	e59f3038 	ldr	r3, [pc, #56]	; 88a0 <.text+0x88a0>
-    8864:	e5832000 	str	r2, [r3]
-    8868:	e59f3030 	ldr	r3, [pc, #48]	; 88a0 <.text+0x88a0>
-    886c:	e5932000 	ldr	r2, [r3]
-    8870:	e1a03002 	mov	r3, r2
-    8874:	e1a03083 	mov	r3, r3, lsl #1
-    8878:	e0833002 	add	r3, r3, r2
-    887c:	e1a03103 	mov	r3, r3, lsl #2
-    8880:	e1a02003 	mov	r2, r3
-    8884:	e59f3018 	ldr	r3, [pc, #24]	; 88a4 <.text+0x88a4>
-    8888:	e243300c 	sub	r3, r3, #12	; 0xc
-    888c:	e0823003 	add	r3, r2, r3
-    8890:	e1a00003 	mov	r0, r3
-    8894:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    8898:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    889c:	e12fff1e 	bx	lr
-    88a0:	400008c0 	andmi	r0, r0, r0, asr #17
-    88a4:	40001420 	andmi	r1, r0, r0, lsr #8
-
-000088a8 <parseRxFifo>:
-    88a8:	e1a0c00d 	mov	ip, sp
-    88ac:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    88b0:	e24cb004 	sub	fp, ip, #4	; 0x4
-    88b4:	e24dd008 	sub	sp, sp, #8	; 0x8
-    88b8:	e3a03000 	mov	r3, #0	; 0x0
-    88bc:	e50b3010 	str	r3, [fp, #-16]
-    88c0:	e3a03000 	mov	r3, #0	; 0x0
-    88c4:	e54b3011 	strb	r3, [fp, #-17]
-    88c8:	e59f34e8 	ldr	r3, [pc, #1256]	; 8db8 <.text+0x8db8>
-    88cc:	e5d33004 	ldrb	r3, [r3, #4]
-    88d0:	e20330ff 	and	r3, r3, #255	; 0xff
-    88d4:	e3530001 	cmp	r3, #1	; 0x1
-    88d8:	0a000133 	beq	8dac <parseRxFifo+0x504>
-    88dc:	ea00012b 	b	8d90 <parseRxFifo+0x4e8>
-    88e0:	e59f34d4 	ldr	r3, [pc, #1236]	; 8dbc <.text+0x8dbc>
-    88e4:	e5933000 	ldr	r3, [r3]
-    88e8:	e3530000 	cmp	r3, #0	; 0x0
-    88ec:	1a00001b 	bne	8960 <parseRxFifo+0xb8>
-    88f0:	e55b3011 	ldrb	r3, [fp, #-17]
-    88f4:	e353003e 	cmp	r3, #62	; 0x3e
-    88f8:	1a000005 	bne	8914 <parseRxFifo+0x6c>
-    88fc:	e59f34b8 	ldr	r3, [pc, #1208]	; 8dbc <.text+0x8dbc>
-    8900:	e5933000 	ldr	r3, [r3]
-    8904:	e2832001 	add	r2, r3, #1	; 0x1
-    8908:	e59f34ac 	ldr	r3, [pc, #1196]	; 8dbc <.text+0x8dbc>
-    890c:	e5832000 	str	r2, [r3]
-    8910:	ea000002 	b	8920 <parseRxFifo+0x78>
-    8914:	e59f24a0 	ldr	r2, [pc, #1184]	; 8dbc <.text+0x8dbc>
-    8918:	e3a03000 	mov	r3, #0	; 0x0
-    891c:	e5823000 	str	r3, [r2]
-    8920:	e59f2498 	ldr	r2, [pc, #1176]	; 8dc0 <.text+0x8dc0>
-    8924:	e3a03000 	mov	r3, #0	; 0x0
-    8928:	e5823000 	str	r3, [r2]
-    892c:	e59f2490 	ldr	r2, [pc, #1168]	; 8dc4 <.text+0x8dc4>
-    8930:	e3a03000 	mov	r3, #0	; 0x0
-    8934:	e1c230b0 	strh	r3, [r2]
-    8938:	e59f2488 	ldr	r2, [pc, #1160]	; 8dc8 <.text+0x8dc8>
-    893c:	e59f3488 	ldr	r3, [pc, #1160]	; 8dcc <.text+0x8dcc>
-    8940:	e5823000 	str	r3, [r2]
-    8944:	e59f2484 	ldr	r2, [pc, #1156]	; 8dd0 <.text+0x8dd0>
-    8948:	e3a03000 	mov	r3, #0	; 0x0
-    894c:	e5823000 	str	r3, [r2]
-    8950:	e59f247c 	ldr	r2, [pc, #1148]	; 8dd4 <.text+0x8dd4>
-    8954:	e3a03000 	mov	r3, #0	; 0x0
-    8958:	e5c23000 	strb	r3, [r2]
-    895c:	ea00010b 	b	8d90 <parseRxFifo+0x4e8>
-    8960:	e59f3454 	ldr	r3, [pc, #1108]	; 8dbc <.text+0x8dbc>
-    8964:	e5933000 	ldr	r3, [r3]
-    8968:	e3530001 	cmp	r3, #1	; 0x1
-    896c:	1a00000c 	bne	89a4 <parseRxFifo+0xfc>
-    8970:	e55b3011 	ldrb	r3, [fp, #-17]
-    8974:	e353002a 	cmp	r3, #42	; 0x2a
-    8978:	1a000005 	bne	8994 <parseRxFifo+0xec>
-    897c:	e59f3438 	ldr	r3, [pc, #1080]	; 8dbc <.text+0x8dbc>
-    8980:	e5933000 	ldr	r3, [r3]
-    8984:	e2832001 	add	r2, r3, #1	; 0x1
-    8988:	e59f342c 	ldr	r3, [pc, #1068]	; 8dbc <.text+0x8dbc>
-    898c:	e5832000 	str	r2, [r3]
-    8990:	ea0000fe 	b	8d90 <parseRxFifo+0x4e8>
-    8994:	e59f2420 	ldr	r2, [pc, #1056]	; 8dbc <.text+0x8dbc>
-    8998:	e3a03000 	mov	r3, #0	; 0x0
-    899c:	e5823000 	str	r3, [r2]
-    89a0:	ea0000fa 	b	8d90 <parseRxFifo+0x4e8>
-    89a4:	e59f3410 	ldr	r3, [pc, #1040]	; 8dbc <.text+0x8dbc>
-    89a8:	e5933000 	ldr	r3, [r3]
-    89ac:	e3530002 	cmp	r3, #2	; 0x2
-    89b0:	1a00000c 	bne	89e8 <parseRxFifo+0x140>
-    89b4:	e55b3011 	ldrb	r3, [fp, #-17]
-    89b8:	e353003e 	cmp	r3, #62	; 0x3e
-    89bc:	1a000005 	bne	89d8 <parseRxFifo+0x130>
-    89c0:	e59f33f4 	ldr	r3, [pc, #1012]	; 8dbc <.text+0x8dbc>
-    89c4:	e5933000 	ldr	r3, [r3]
-    89c8:	e2832001 	add	r2, r3, #1	; 0x1
-    89cc:	e59f33e8 	ldr	r3, [pc, #1000]	; 8dbc <.text+0x8dbc>
-    89d0:	e5832000 	str	r2, [r3]
-    89d4:	ea0000ed 	b	8d90 <parseRxFifo+0x4e8>
-    89d8:	e59f23dc 	ldr	r2, [pc, #988]	; 8dbc <.text+0x8dbc>
-    89dc:	e3a03000 	mov	r3, #0	; 0x0
-    89e0:	e5823000 	str	r3, [r2]
-    89e4:	ea0000e9 	b	8d90 <parseRxFifo+0x4e8>
-    89e8:	e59f33cc 	ldr	r3, [pc, #972]	; 8dbc <.text+0x8dbc>
-    89ec:	e5933000 	ldr	r3, [r3]
-    89f0:	e3530003 	cmp	r3, #3	; 0x3
-    89f4:	1a000009 	bne	8a20 <parseRxFifo+0x178>
-    89f8:	e55b3011 	ldrb	r3, [fp, #-17]
-    89fc:	e1a02003 	mov	r2, r3
-    8a00:	e59f33c8 	ldr	r3, [pc, #968]	; 8dd0 <.text+0x8dd0>
-    8a04:	e5832000 	str	r2, [r3]
-    8a08:	e59f33ac 	ldr	r3, [pc, #940]	; 8dbc <.text+0x8dbc>
-    8a0c:	e5933000 	ldr	r3, [r3]
-    8a10:	e2832001 	add	r2, r3, #1	; 0x1
-    8a14:	e59f33a0 	ldr	r3, [pc, #928]	; 8dbc <.text+0x8dbc>
-    8a18:	e5832000 	str	r2, [r3]
-    8a1c:	ea0000db 	b	8d90 <parseRxFifo+0x4e8>
-    8a20:	e59f3394 	ldr	r3, [pc, #916]	; 8dbc <.text+0x8dbc>
-    8a24:	e5933000 	ldr	r3, [r3]
-    8a28:	e3530004 	cmp	r3, #4	; 0x4
-    8a2c:	1a000014 	bne	8a84 <parseRxFifo+0x1dc>
-    8a30:	e55b3011 	ldrb	r3, [fp, #-17]
-    8a34:	e59f239c 	ldr	r2, [pc, #924]	; 8dd8 <.text+0x8dd8>
-    8a38:	e5c23000 	strb	r3, [r2]
-    8a3c:	e59f338c 	ldr	r3, [pc, #908]	; 8dd0 <.text+0x8dd0>
-    8a40:	e5933000 	ldr	r3, [r3]
-    8a44:	e3530000 	cmp	r3, #0	; 0x0
-    8a48:	ca000003 	bgt	8a5c <parseRxFifo+0x1b4>
-    8a4c:	e59f2368 	ldr	r2, [pc, #872]	; 8dbc <.text+0x8dbc>
-    8a50:	e3a03000 	mov	r3, #0	; 0x0
-    8a54:	e5823000 	str	r3, [r2]
-    8a58:	ea0000cc 	b	8d90 <parseRxFifo+0x4e8>
-    8a5c:	e59f336c 	ldr	r3, [pc, #876]	; 8dd0 <.text+0x8dd0>
-    8a60:	e5932000 	ldr	r2, [r3]
-    8a64:	e59f3354 	ldr	r3, [pc, #852]	; 8dc0 <.text+0x8dc0>
-    8a68:	e5832000 	str	r2, [r3]
-    8a6c:	e59f3348 	ldr	r3, [pc, #840]	; 8dbc <.text+0x8dbc>
-    8a70:	e5933000 	ldr	r3, [r3]
-    8a74:	e2832001 	add	r2, r3, #1	; 0x1
-    8a78:	e59f333c 	ldr	r3, [pc, #828]	; 8dbc <.text+0x8dbc>
-    8a7c:	e5832000 	str	r2, [r3]
-    8a80:	ea0000c2 	b	8d90 <parseRxFifo+0x4e8>
-    8a84:	e59f3330 	ldr	r3, [pc, #816]	; 8dbc <.text+0x8dbc>
-    8a88:	e5933000 	ldr	r3, [r3]
-    8a8c:	e3530005 	cmp	r3, #5	; 0x5
-    8a90:	1a000008 	bne	8ab8 <parseRxFifo+0x210>
-    8a94:	e55b3011 	ldrb	r3, [fp, #-17]
-    8a98:	e59f2334 	ldr	r2, [pc, #820]	; 8dd4 <.text+0x8dd4>
-    8a9c:	e5c23000 	strb	r3, [r2]
-    8aa0:	e59f3314 	ldr	r3, [pc, #788]	; 8dbc <.text+0x8dbc>
-    8aa4:	e5933000 	ldr	r3, [r3]
-    8aa8:	e2832001 	add	r2, r3, #1	; 0x1
-    8aac:	e59f3308 	ldr	r3, [pc, #776]	; 8dbc <.text+0x8dbc>
-    8ab0:	e5832000 	str	r2, [r3]
-    8ab4:	ea0000b5 	b	8d90 <parseRxFifo+0x4e8>
-    8ab8:	e59f32fc 	ldr	r3, [pc, #764]	; 8dbc <.text+0x8dbc>
-    8abc:	e5933000 	ldr	r3, [r3]
-    8ac0:	e3530006 	cmp	r3, #6	; 0x6
-    8ac4:	1a000016 	bne	8b24 <parseRxFifo+0x27c>
-    8ac8:	e59f3300 	ldr	r3, [pc, #768]	; 8dd0 <.text+0x8dd0>
-    8acc:	e5932000 	ldr	r2, [r3]
-    8ad0:	e59f32e8 	ldr	r3, [pc, #744]	; 8dc0 <.text+0x8dc0>
-    8ad4:	e5933000 	ldr	r3, [r3]
-    8ad8:	e0631002 	rsb	r1, r3, r2
-    8adc:	e55b3011 	ldrb	r3, [fp, #-17]
-    8ae0:	e59f22e4 	ldr	r2, [pc, #740]	; 8dcc <.text+0x8dcc>
-    8ae4:	e7c23001 	strb	r3, [r2, r1]
-    8ae8:	e59f32d0 	ldr	r3, [pc, #720]	; 8dc0 <.text+0x8dc0>
-    8aec:	e5933000 	ldr	r3, [r3]
-    8af0:	e2432001 	sub	r2, r3, #1	; 0x1
-    8af4:	e59f32c4 	ldr	r3, [pc, #708]	; 8dc0 <.text+0x8dc0>
-    8af8:	e5832000 	str	r2, [r3]
-    8afc:	e59f32bc 	ldr	r3, [pc, #700]	; 8dc0 <.text+0x8dc0>
-    8b00:	e5933000 	ldr	r3, [r3]
-    8b04:	e3530000 	cmp	r3, #0	; 0x0
-    8b08:	1a0000a0 	bne	8d90 <parseRxFifo+0x4e8>
-    8b0c:	e59f32a8 	ldr	r3, [pc, #680]	; 8dbc <.text+0x8dbc>
-    8b10:	e5933000 	ldr	r3, [r3]
-    8b14:	e2832001 	add	r2, r3, #1	; 0x1
-    8b18:	e59f329c 	ldr	r3, [pc, #668]	; 8dbc <.text+0x8dbc>
-    8b1c:	e5832000 	str	r2, [r3]
-    8b20:	ea00009a 	b	8d90 <parseRxFifo+0x4e8>
-    8b24:	e59f3290 	ldr	r3, [pc, #656]	; 8dbc <.text+0x8dbc>
-    8b28:	e5933000 	ldr	r3, [r3]
-    8b2c:	e3530007 	cmp	r3, #7	; 0x7
-    8b30:	1a000009 	bne	8b5c <parseRxFifo+0x2b4>
-    8b34:	e55b3011 	ldrb	r3, [fp, #-17]
-    8b38:	e1a02003 	mov	r2, r3
-    8b3c:	e59f3280 	ldr	r3, [pc, #640]	; 8dc4 <.text+0x8dc4>
-    8b40:	e1c320b0 	strh	r2, [r3]
-    8b44:	e59f3270 	ldr	r3, [pc, #624]	; 8dbc <.text+0x8dbc>
-    8b48:	e5933000 	ldr	r3, [r3]
-    8b4c:	e2832001 	add	r2, r3, #1	; 0x1
-    8b50:	e59f3264 	ldr	r3, [pc, #612]	; 8dbc <.text+0x8dbc>
-    8b54:	e5832000 	str	r2, [r3]
-    8b58:	ea00008c 	b	8d90 <parseRxFifo+0x4e8>
-    8b5c:	e59f3258 	ldr	r3, [pc, #600]	; 8dbc <.text+0x8dbc>
-    8b60:	e5933000 	ldr	r3, [r3]
-    8b64:	e3530008 	cmp	r3, #8	; 0x8
-    8b68:	1a000085 	bne	8d84 <parseRxFifo+0x4dc>
-    8b6c:	e55b3011 	ldrb	r3, [fp, #-17]
-    8b70:	e1a03403 	mov	r3, r3, lsl #8
-    8b74:	e1a03803 	mov	r3, r3, lsl #16
-    8b78:	e1a02823 	mov	r2, r3, lsr #16
-    8b7c:	e59f3240 	ldr	r3, [pc, #576]	; 8dc4 <.text+0x8dc4>
-    8b80:	e1d330b0 	ldrh	r3, [r3]
-    8b84:	e1823003 	orr	r3, r2, r3
-    8b88:	e1a03803 	mov	r3, r3, lsl #16
-    8b8c:	e1a03823 	mov	r3, r3, lsr #16
-    8b90:	e1a03803 	mov	r3, r3, lsl #16
-    8b94:	e1a02823 	mov	r2, r3, lsr #16
-    8b98:	e59f3224 	ldr	r3, [pc, #548]	; 8dc4 <.text+0x8dc4>
-    8b9c:	e1c320b0 	strh	r2, [r3]
-    8ba0:	e59f3234 	ldr	r3, [pc, #564]	; 8ddc <.text+0x8ddc>
-    8ba4:	e5933000 	ldr	r3, [r3]
-    8ba8:	e2832001 	add	r2, r3, #1	; 0x1
-    8bac:	e59f3228 	ldr	r3, [pc, #552]	; 8ddc <.text+0x8ddc>
-    8bb0:	e5832000 	str	r2, [r3]
-    8bb4:	e59f021c 	ldr	r0, [pc, #540]	; 8dd8 <.text+0x8dd8>
-    8bb8:	e3a01001 	mov	r1, #1	; 0x1
-    8bbc:	e3a020ff 	mov	r2, #255	; 0xff
-    8bc0:	eb00026a 	bl	9570 <crc16>
-    8bc4:	e1a03000 	mov	r3, r0
-    8bc8:	e1a02003 	mov	r2, r3
-    8bcc:	e59f320c 	ldr	r3, [pc, #524]	; 8de0 <.text+0x8de0>
-    8bd0:	e1c320b0 	strh	r2, [r3]
-    8bd4:	e59f3204 	ldr	r3, [pc, #516]	; 8de0 <.text+0x8de0>
-    8bd8:	e1d330b0 	ldrh	r3, [r3]
-    8bdc:	e59f01f0 	ldr	r0, [pc, #496]	; 8dd4 <.text+0x8dd4>
-    8be0:	e3a01001 	mov	r1, #1	; 0x1
-    8be4:	e1a02003 	mov	r2, r3
-    8be8:	eb000260 	bl	9570 <crc16>
-    8bec:	e1a03000 	mov	r3, r0
-    8bf0:	e1a02003 	mov	r2, r3
-    8bf4:	e59f31e4 	ldr	r3, [pc, #484]	; 8de0 <.text+0x8de0>
-    8bf8:	e1c320b0 	strh	r2, [r3]
-    8bfc:	e59f31cc 	ldr	r3, [pc, #460]	; 8dd0 <.text+0x8dd0>
-    8c00:	e5933000 	ldr	r3, [r3]
-    8c04:	e1a03803 	mov	r3, r3, lsl #16
-    8c08:	e1a03823 	mov	r3, r3, lsr #16
-    8c0c:	e1a02003 	mov	r2, r3
-    8c10:	e59f31c8 	ldr	r3, [pc, #456]	; 8de0 <.text+0x8de0>
-    8c14:	e1d330b0 	ldrh	r3, [r3]
-    8c18:	e59f01ac 	ldr	r0, [pc, #428]	; 8dcc <.text+0x8dcc>
-    8c1c:	e1a01002 	mov	r1, r2
-    8c20:	e1a02003 	mov	r2, r3
-    8c24:	eb000251 	bl	9570 <crc16>
-    8c28:	e1a03000 	mov	r3, r0
-    8c2c:	e1a02003 	mov	r2, r3
-    8c30:	e59f31a8 	ldr	r3, [pc, #424]	; 8de0 <.text+0x8de0>
-    8c34:	e1c320b0 	strh	r2, [r3]
-    8c38:	e59f3184 	ldr	r3, [pc, #388]	; 8dc4 <.text+0x8dc4>
-    8c3c:	e1d320b0 	ldrh	r2, [r3]
-    8c40:	e59f3198 	ldr	r3, [pc, #408]	; 8de0 <.text+0x8de0>
-    8c44:	e1d330b0 	ldrh	r3, [r3]
-    8c48:	e1520003 	cmp	r2, r3
-    8c4c:	1a000048 	bne	8d74 <parseRxFifo+0x4cc>
-    8c50:	e59f318c 	ldr	r3, [pc, #396]	; 8de4 <.text+0x8de4>
-    8c54:	e5933000 	ldr	r3, [r3]
-    8c58:	e2832001 	add	r2, r3, #1	; 0x1
-    8c5c:	e59f3180 	ldr	r3, [pc, #384]	; 8de4 <.text+0x8de4>
-    8c60:	e5832000 	str	r2, [r3]
-    8c64:	e3a03000 	mov	r3, #0	; 0x0
-    8c68:	e50b3010 	str	r3, [fp, #-16]
-    8c6c:	ea00003b 	b	8d60 <parseRxFifo+0x4b8>
-    8c70:	e51b2010 	ldr	r2, [fp, #-16]
-    8c74:	e59f116c 	ldr	r1, [pc, #364]	; 8de8 <.text+0x8de8>
-    8c78:	e1a03002 	mov	r3, r2
-    8c7c:	e1a03083 	mov	r3, r3, lsl #1
-    8c80:	e0833002 	add	r3, r3, r2
-    8c84:	e1a03103 	mov	r3, r3, lsl #2
-    8c88:	e0833001 	add	r3, r3, r1
-    8c8c:	e5d32000 	ldrb	r2, [r3]
-    8c90:	e59f3140 	ldr	r3, [pc, #320]	; 8dd8 <.text+0x8dd8>
-    8c94:	e5d33000 	ldrb	r3, [r3]
-    8c98:	e1520003 	cmp	r2, r3
-    8c9c:	1a00002c 	bne	8d54 <parseRxFifo+0x4ac>
-    8ca0:	e51b2010 	ldr	r2, [fp, #-16]
-    8ca4:	e59f113c 	ldr	r1, [pc, #316]	; 8de8 <.text+0x8de8>
-    8ca8:	e3a00004 	mov	r0, #4	; 0x4
-    8cac:	e1a03002 	mov	r3, r2
-    8cb0:	e1a03083 	mov	r3, r3, lsl #1
-    8cb4:	e0833002 	add	r3, r3, r2
-    8cb8:	e1a03103 	mov	r3, r3, lsl #2
-    8cbc:	e0833001 	add	r3, r3, r1
-    8cc0:	e0833000 	add	r3, r3, r0
-    8cc4:	e5932000 	ldr	r2, [r3]
-    8cc8:	e59f3100 	ldr	r3, [pc, #256]	; 8dd0 <.text+0x8dd0>
-    8ccc:	e5933000 	ldr	r3, [r3]
-    8cd0:	e1a01003 	mov	r1, r3
-    8cd4:	e59f30f0 	ldr	r3, [pc, #240]	; 8dcc <.text+0x8dcc>
-    8cd8:	e1a0c001 	mov	ip, r1
-    8cdc:	e1a00002 	mov	r0, r2
-    8ce0:	e1a01003 	mov	r1, r3
-    8ce4:	e1a0200c 	mov	r2, ip
-    8ce8:	eb002fda 	bl	14c58 <__memcpy_from_arm>
-    8cec:	e51b2010 	ldr	r2, [fp, #-16]
-    8cf0:	e59f10f0 	ldr	r1, [pc, #240]	; 8de8 <.text+0x8de8>
-    8cf4:	e3a00008 	mov	r0, #8	; 0x8
-    8cf8:	e1a03002 	mov	r3, r2
-    8cfc:	e1a03083 	mov	r3, r3, lsl #1
-    8d00:	e0833002 	add	r3, r3, r2
-    8d04:	e1a03103 	mov	r3, r3, lsl #2
-    8d08:	e0833001 	add	r3, r3, r1
-    8d0c:	e0832000 	add	r2, r3, r0
-    8d10:	e3a03001 	mov	r3, #1	; 0x1
-    8d14:	e5c23000 	strb	r3, [r2]
-    8d18:	e59f30b4 	ldr	r3, [pc, #180]	; 8dd4 <.text+0x8dd4>
-    8d1c:	e5d33000 	ldrb	r3, [r3]
-    8d20:	e2033001 	and	r3, r3, #1	; 0x1
-    8d24:	e20330ff 	and	r3, r3, #255	; 0xff
-    8d28:	e3530000 	cmp	r3, #0	; 0x0
-    8d2c:	0a000010 	beq	8d74 <parseRxFifo+0x4cc>
-    8d30:	e59f309c 	ldr	r3, [pc, #156]	; 8dd4 <.text+0x8dd4>
-    8d34:	e5d33000 	ldrb	r3, [r3]
-    8d38:	e59f20ac 	ldr	r2, [pc, #172]	; 8dec <.text+0x8dec>
-    8d3c:	e5c23000 	strb	r3, [r2]
-    8d40:	e3a00000 	mov	r0, #0	; 0x0
-    8d44:	e59f10a0 	ldr	r1, [pc, #160]	; 8dec <.text+0x8dec>
-    8d48:	e3a02001 	mov	r2, #1	; 0x1
-    8d4c:	eb000028 	bl	8df4 <writePacket2Ringbuffer>
-    8d50:	ea000007 	b	8d74 <parseRxFifo+0x4cc>
-    8d54:	e51b3010 	ldr	r3, [fp, #-16]
-    8d58:	e2833001 	add	r3, r3, #1	; 0x1
-    8d5c:	e50b3010 	str	r3, [fp, #-16]
-    8d60:	e59f3088 	ldr	r3, [pc, #136]	; 8df0 <.text+0x8df0>
-    8d64:	e5932000 	ldr	r2, [r3]
-    8d68:	e51b3010 	ldr	r3, [fp, #-16]
-    8d6c:	e1530002 	cmp	r3, r2
-    8d70:	3affffbe 	bcc	8c70 <parseRxFifo+0x3c8>
-    8d74:	e59f2040 	ldr	r2, [pc, #64]	; 8dbc <.text+0x8dbc>
-    8d78:	e3a03000 	mov	r3, #0	; 0x0
-    8d7c:	e5823000 	str	r3, [r2]
-    8d80:	ea000002 	b	8d90 <parseRxFifo+0x4e8>
-    8d84:	e59f2030 	ldr	r2, [pc, #48]	; 8dbc <.text+0x8dbc>
-    8d88:	e3a03000 	mov	r3, #0	; 0x0
-    8d8c:	e5823000 	str	r3, [r2]
-    8d90:	e24b3011 	sub	r3, fp, #17	; 0x11
-    8d94:	e59f001c 	ldr	r0, [pc, #28]	; 8db8 <.text+0x8db8>
-    8d98:	e1a01003 	mov	r1, r3
-    8d9c:	ebfffe31 	bl	8668 <Fifo_readByte>
-    8da0:	e1a03000 	mov	r3, r0
-    8da4:	e3530000 	cmp	r3, #0	; 0x0
-    8da8:	1afffecc 	bne	88e0 <parseRxFifo+0x38>
-    8dac:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    8db0:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    8db4:	e12fff1e 	bx	lr
-    8db8:	40001b44 	andmi	r1, r0, r4, asr #22
-    8dbc:	400008c8 	andmi	r0, r0, r8, asr #17
-    8dc0:	400008d0 	ldrmid	r0, [r0], -r0
-    8dc4:	400008cc 	andmi	r0, r0, ip, asr #17
-    8dc8:	40001924 	andmi	r1, r0, r4, lsr #18
-    8dcc:	40001720 	andmi	r1, r0, r0, lsr #14
-    8dd0:	400008d4 	ldrmid	r0, [r0], -r4
-    8dd4:	400008d8 	ldrmid	r0, [r0], -r8
-    8dd8:	400008d9 	ldrmid	r0, [r0], -r9
-    8ddc:	400008b8 	strmih	r0, [r0], -r8
-    8de0:	400008ce 	andmi	r0, r0, lr, asr #17
-    8de4:	400008bc 	strmih	r0, [r0], -ip
-    8de8:	40001420 	andmi	r1, r0, r0, lsr #8
-    8dec:	400008c5 	andmi	r0, r0, r5, asr #17
-    8df0:	400008c0 	andmi	r0, r0, r0, asr #17
-
-00008df4 <writePacket2Ringbuffer>:
-    8df4:	e1a0c00d 	mov	ip, sp
-    8df8:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    8dfc:	e24cb004 	sub	fp, ip, #4	; 0x4
-    8e00:	e24dd014 	sub	sp, sp, #20	; 0x14
-    8e04:	e1a03000 	mov	r3, r0
-    8e08:	e50b101c 	str	r1, [fp, #-28]
-    8e0c:	e54b3018 	strb	r3, [fp, #-24]
-    8e10:	e1a03002 	mov	r3, r2
-    8e14:	e54b3020 	strb	r3, [fp, #-32]
-    8e18:	e3a03000 	mov	r3, #0	; 0x0
-    8e1c:	e14b31b2 	strh	r3, [fp, #-18]
-    8e20:	e3a03000 	mov	r3, #0	; 0x0
-    8e24:	e50b3010 	str	r3, [fp, #-16]
-    8e28:	e59f20d0 	ldr	r2, [pc, #208]	; 8f00 <.text+0x8f00>
-    8e2c:	e55b3020 	ldrb	r3, [fp, #-32]
-    8e30:	e5c23002 	strb	r3, [r2, #2]
-    8e34:	e55b3018 	ldrb	r3, [fp, #-24]
-    8e38:	e59f20c0 	ldr	r2, [pc, #192]	; 8f00 <.text+0x8f00>
-    8e3c:	e5c23003 	strb	r3, [r2, #3]
-    8e40:	e24b3018 	sub	r3, fp, #24	; 0x18
-    8e44:	e1a00003 	mov	r0, r3
-    8e48:	e3a01001 	mov	r1, #1	; 0x1
-    8e4c:	e3a020ff 	mov	r2, #255	; 0xff
-    8e50:	eb0001c6 	bl	9570 <crc16>
-    8e54:	e1a03000 	mov	r3, r0
-    8e58:	e14b31b2 	strh	r3, [fp, #-18]
-    8e5c:	e55b2020 	ldrb	r2, [fp, #-32]
-    8e60:	e15b31b2 	ldrh	r3, [fp, #-18]
-    8e64:	e51b001c 	ldr	r0, [fp, #-28]
-    8e68:	e1a01002 	mov	r1, r2
-    8e6c:	e1a02003 	mov	r2, r3
-    8e70:	eb0001be 	bl	9570 <crc16>
-    8e74:	e1a03000 	mov	r3, r0
-    8e78:	e14b31b2 	strh	r3, [fp, #-18]
-    8e7c:	e3a03001 	mov	r3, #1	; 0x1
-    8e80:	e50b3010 	str	r3, [fp, #-16]
-    8e84:	e59f0074 	ldr	r0, [pc, #116]	; 8f00 <.text+0x8f00>
-    8e88:	e3a01004 	mov	r1, #4	; 0x4
-    8e8c:	eb00001c 	bl	8f04 <UART0_writeFifo>
-    8e90:	e1a03000 	mov	r3, r0
-    8e94:	e1a02003 	mov	r2, r3
-    8e98:	e51b3010 	ldr	r3, [fp, #-16]
-    8e9c:	e0033002 	and	r3, r3, r2
-    8ea0:	e50b3010 	str	r3, [fp, #-16]
-    8ea4:	e55b3020 	ldrb	r3, [fp, #-32]
-    8ea8:	e51b001c 	ldr	r0, [fp, #-28]
-    8eac:	e1a01003 	mov	r1, r3
-    8eb0:	eb000013 	bl	8f04 <UART0_writeFifo>
-    8eb4:	e1a03000 	mov	r3, r0
-    8eb8:	e1a02003 	mov	r2, r3
-    8ebc:	e51b3010 	ldr	r3, [fp, #-16]
-    8ec0:	e0033002 	and	r3, r3, r2
-    8ec4:	e50b3010 	str	r3, [fp, #-16]
-    8ec8:	e24b3012 	sub	r3, fp, #18	; 0x12
-    8ecc:	e1a00003 	mov	r0, r3
-    8ed0:	e3a01002 	mov	r1, #2	; 0x2
-    8ed4:	eb00000a 	bl	8f04 <UART0_writeFifo>
-    8ed8:	e1a03000 	mov	r3, r0
-    8edc:	e1a02003 	mov	r2, r3
-    8ee0:	e51b3010 	ldr	r3, [fp, #-16]
-    8ee4:	e0033002 	and	r3, r3, r2
-    8ee8:	e50b3010 	str	r3, [fp, #-16]
-    8eec:	e51b3010 	ldr	r3, [fp, #-16]
-    8ef0:	e1a00003 	mov	r0, r3
-    8ef4:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    8ef8:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    8efc:	e12fff1e 	bx	lr
-    8f00:	40000010 	andmi	r0, r0, r0, lsl r0
-
-00008f04 <UART0_writeFifo>:
-    8f04:	e1a0c00d 	mov	ip, sp
-    8f08:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    8f0c:	e24cb004 	sub	fp, ip, #4	; 0x4
-    8f10:	e24dd00c 	sub	sp, sp, #12	; 0xc
-    8f14:	e50b0014 	str	r0, [fp, #-20]
-    8f18:	e50b1018 	str	r1, [fp, #-24]
-    8f1c:	e3a03000 	mov	r3, #0	; 0x0
-    8f20:	e54b300f 	strb	r3, [fp, #-15]
-    8f24:	e59f005c 	ldr	r0, [pc, #92]	; 8f88 <.text+0x8f88>
-    8f28:	e51b1014 	ldr	r1, [fp, #-20]
-    8f2c:	e51b2018 	ldr	r2, [fp, #-24]
-    8f30:	ebfffd98 	bl	8598 <Fifo_writeBlock>
-    8f34:	e1a03000 	mov	r3, r0
-    8f38:	e54b300f 	strb	r3, [fp, #-15]
-    8f3c:	e59f0044 	ldr	r0, [pc, #68]	; 8f88 <.text+0x8f88>
-    8f40:	ebfffdee 	bl	8700 <Fifo_availableMemory>
-    8f44:	e1a03000 	mov	r3, r0
-    8f48:	e14b30be 	strh	r3, [fp, #-14]
-    8f4c:	e59f3038 	ldr	r3, [pc, #56]	; 8f8c <.text+0x8f8c>
-    8f50:	e1d330b0 	ldrh	r3, [r3]
-    8f54:	e15b20fe 	ldrsh	r2, [fp, #-14]
-    8f58:	e1a03803 	mov	r3, r3, lsl #16
-    8f5c:	e1a03843 	mov	r3, r3, asr #16
-    8f60:	e1520003 	cmp	r2, r3
-    8f64:	aa000002 	bge	8f74 <UART0_writeFifo+0x70>
-    8f68:	e59f201c 	ldr	r2, [pc, #28]	; 8f8c <.text+0x8f8c>
-    8f6c:	e15b30be 	ldrh	r3, [fp, #-14]
-    8f70:	e1c230b0 	strh	r3, [r2]
-    8f74:	e55b300f 	ldrb	r3, [fp, #-15]
-    8f78:	e1a00003 	mov	r0, r3
-    8f7c:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    8f80:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    8f84:	e12fff1e 	bx	lr
-    8f88:	40001928 	andmi	r1, r0, r8, lsr #18
-    8f8c:	4000000c 	andmi	r0, r0, ip
-
-00008f90 <UARTInitialize>:
-    8f90:	e1a0c00d 	mov	ip, sp
-    8f94:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    8f98:	e24cb004 	sub	fp, ip, #4	; 0x4
-    8f9c:	e24dd008 	sub	sp, sp, #8	; 0x8
-    8fa0:	e50b0014 	str	r0, [fp, #-20]
-    8fa4:	eb000e65 	bl	c940 <disableIRQ>
-    8fa8:	e1a02000 	mov	r2, r0
-    8fac:	e59f3198 	ldr	r3, [pc, #408]	; 914c <.text+0x914c>
-    8fb0:	e5832000 	str	r2, [r3]
-    8fb4:	e3a02903 	mov	r2, #49152	; 0xc000
-    8fb8:	e282224e 	add	r2, r2, #-536870908	; 0xe0000004
-    8fbc:	e3a03903 	mov	r3, #49152	; 0xc000
-    8fc0:	e283324e 	add	r3, r3, #-536870908	; 0xe0000004
-    8fc4:	e5933000 	ldr	r3, [r3]
-    8fc8:	e3c33001 	bic	r3, r3, #1	; 0x1
-    8fcc:	e5823000 	str	r3, [r2]
-    8fd0:	e59f3174 	ldr	r3, [pc, #372]	; 914c <.text+0x914c>
-    8fd4:	e5933000 	ldr	r3, [r3]
-    8fd8:	e1a00003 	mov	r0, r3
-    8fdc:	eb000e7c 	bl	c9d4 <restoreIRQ>
-    8fe0:	eb000e56 	bl	c940 <disableIRQ>
-    8fe4:	e1a02000 	mov	r2, r0
-    8fe8:	e59f3160 	ldr	r3, [pc, #352]	; 9150 <.text+0x9150>
-    8fec:	e5832000 	str	r2, [r3]
-    8ff0:	e3a02903 	mov	r2, #49152	; 0xc000
-    8ff4:	e282224e 	add	r2, r2, #-536870908	; 0xe0000004
-    8ff8:	e3a03903 	mov	r3, #49152	; 0xc000
-    8ffc:	e283324e 	add	r3, r3, #-536870908	; 0xe0000004
-    9000:	e5933000 	ldr	r3, [r3]
-    9004:	e3c33002 	bic	r3, r3, #2	; 0x2
-    9008:	e5823000 	str	r3, [r2]
-    900c:	e59f313c 	ldr	r3, [pc, #316]	; 9150 <.text+0x9150>
-    9010:	e5933000 	ldr	r3, [r3]
-    9014:	e1a00003 	mov	r0, r3
-    9018:	eb000e6d 	bl	c9d4 <restoreIRQ>
-    901c:	ebfffc1f 	bl	80a0 <peripheralClockFrequency>
-    9020:	e1a02000 	mov	r2, r0
-    9024:	e51b3014 	ldr	r3, [fp, #-20]
-    9028:	e1a03203 	mov	r3, r3, lsl #4
-    902c:	e1a00002 	mov	r0, r2
-    9030:	e1a01003 	mov	r1, r3
-    9034:	eb002f04 	bl	14c4c <____udivsi3_from_arm>
-    9038:	e1a03000 	mov	r3, r0
-    903c:	e50b3010 	str	r3, [fp, #-16]
-    9040:	e3a03903 	mov	r3, #49152	; 0xc000
-    9044:	e28332ce 	add	r3, r3, #-536870900	; 0xe000000c
-    9048:	e3a02083 	mov	r2, #131	; 0x83
-    904c:	e5832000 	str	r2, [r3]
-    9050:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    9054:	e2833903 	add	r3, r3, #49152	; 0xc000
-    9058:	e51b2010 	ldr	r2, [fp, #-16]
-    905c:	e20220ff 	and	r2, r2, #255	; 0xff
-    9060:	e5832000 	str	r2, [r3]
-    9064:	e3a02903 	mov	r2, #49152	; 0xc000
-    9068:	e282224e 	add	r2, r2, #-536870908	; 0xe0000004
-    906c:	e51b3010 	ldr	r3, [fp, #-16]
-    9070:	e1a03423 	mov	r3, r3, lsr #8
-    9074:	e20330ff 	and	r3, r3, #255	; 0xff
-    9078:	e5823000 	str	r3, [r2]
-    907c:	e3a02903 	mov	r2, #49152	; 0xc000
-    9080:	e28222ce 	add	r2, r2, #-536870900	; 0xe000000c
-    9084:	e3a03903 	mov	r3, #49152	; 0xc000
-    9088:	e28332ce 	add	r3, r3, #-536870900	; 0xe000000c
-    908c:	e5933000 	ldr	r3, [r3]
-    9090:	e3c33080 	bic	r3, r3, #128	; 0x80
-    9094:	e5823000 	str	r3, [r2]
-    9098:	e3a03903 	mov	r3, #49152	; 0xc000
-    909c:	e283328e 	add	r3, r3, #-536870904	; 0xe0000008
-    90a0:	e3a02087 	mov	r2, #135	; 0x87
-    90a4:	e5832000 	str	r2, [r3]
-    90a8:	e59f00a4 	ldr	r0, [pc, #164]	; 9154 <.text+0x9154>
-    90ac:	e59f10a4 	ldr	r1, [pc, #164]	; 9158 <.text+0x9158>
-    90b0:	e3a02c02 	mov	r2, #512	; 0x200
-    90b4:	ebfffced 	bl	8470 <Fifo_initialize>
-    90b8:	e59f009c 	ldr	r0, [pc, #156]	; 915c <.text+0x915c>
-    90bc:	e59f109c 	ldr	r1, [pc, #156]	; 9160 <.text+0x9160>
-    90c0:	e3a02c02 	mov	r2, #512	; 0x200
-    90c4:	ebfffce9 	bl	8470 <Fifo_initialize>
-    90c8:	eb000e1c 	bl	c940 <disableIRQ>
-    90cc:	e1a02000 	mov	r2, r0
-    90d0:	e59f3074 	ldr	r3, [pc, #116]	; 914c <.text+0x914c>
-    90d4:	e5832000 	str	r2, [r3]
-    90d8:	e3a02903 	mov	r2, #49152	; 0xc000
-    90dc:	e282224e 	add	r2, r2, #-536870908	; 0xe0000004
-    90e0:	e3a03903 	mov	r3, #49152	; 0xc000
-    90e4:	e283324e 	add	r3, r3, #-536870908	; 0xe0000004
-    90e8:	e5933000 	ldr	r3, [r3]
-    90ec:	e3833001 	orr	r3, r3, #1	; 0x1
-    90f0:	e5823000 	str	r3, [r2]
-    90f4:	e59f3050 	ldr	r3, [pc, #80]	; 914c <.text+0x914c>
-    90f8:	e5933000 	ldr	r3, [r3]
-    90fc:	e1a00003 	mov	r0, r3
-    9100:	eb000e33 	bl	c9d4 <restoreIRQ>
-    9104:	eb000e0d 	bl	c940 <disableIRQ>
-    9108:	e1a02000 	mov	r2, r0
-    910c:	e59f303c 	ldr	r3, [pc, #60]	; 9150 <.text+0x9150>
-    9110:	e5832000 	str	r2, [r3]
-    9114:	e3a02903 	mov	r2, #49152	; 0xc000
-    9118:	e282224e 	add	r2, r2, #-536870908	; 0xe0000004
-    911c:	e3a03903 	mov	r3, #49152	; 0xc000
-    9120:	e283324e 	add	r3, r3, #-536870908	; 0xe0000004
-    9124:	e5933000 	ldr	r3, [r3]
-    9128:	e3833002 	orr	r3, r3, #2	; 0x2
-    912c:	e5823000 	str	r3, [r2]
-    9130:	e59f3018 	ldr	r3, [pc, #24]	; 9150 <.text+0x9150>
-    9134:	e5933000 	ldr	r3, [r3]
-    9138:	e1a00003 	mov	r0, r3
-    913c:	eb000e24 	bl	c9d4 <restoreIRQ>
-    9140:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    9144:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    9148:	e12fff1e 	bx	lr
-    914c:	40001920 	andmi	r1, r0, r0, lsr #18
-    9150:	4000141c 	andmi	r1, r0, ip, lsl r4
-    9154:	40001b44 	andmi	r1, r0, r4, asr #22
-    9158:	40001944 	andmi	r1, r0, r4, asr #18
-    915c:	40001928 	andmi	r1, r0, r8, lsr #18
-    9160:	40001b60 	andmi	r1, r0, r0, ror #22
-
-00009164 <startAutoBaud>:
-    9164:	e1a0c00d 	mov	ip, sp
-    9168:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    916c:	e24cb004 	sub	fp, ip, #4	; 0x4
-    9170:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    9174:	e2833903 	add	r3, r3, #49152	; 0xc000
-    9178:	e2833020 	add	r3, r3, #32	; 0x20
-    917c:	e5933000 	ldr	r3, [r3]
-    9180:	e2033001 	and	r3, r3, #1	; 0x1
-    9184:	e20330ff 	and	r3, r3, #255	; 0xff
-    9188:	e3530000 	cmp	r3, #0	; 0x0
-    918c:	1a00000b 	bne	91c0 <startAutoBaud+0x5c>
-    9190:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    9194:	e2833903 	add	r3, r3, #49152	; 0xc000
-    9198:	e2833020 	add	r3, r3, #32	; 0x20
-    919c:	e3a02005 	mov	r2, #5	; 0x5
-    91a0:	e5832000 	str	r2, [r3]
-    91a4:	e3a02903 	mov	r2, #49152	; 0xc000
-    91a8:	e282224e 	add	r2, r2, #-536870908	; 0xe0000004
-    91ac:	e3a03903 	mov	r3, #49152	; 0xc000
-    91b0:	e283324e 	add	r3, r3, #-536870908	; 0xe0000004
-    91b4:	e5933000 	ldr	r3, [r3]
-    91b8:	e3833c03 	orr	r3, r3, #768	; 0x300
-    91bc:	e5823000 	str	r3, [r2]
-    91c0:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    91c4:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    91c8:	e12fff1e 	bx	lr
-
-000091cc <UART0_rxFlush>:
-    91cc:	e1a0c00d 	mov	ip, sp
-    91d0:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    91d4:	e24cb004 	sub	fp, ip, #4	; 0x4
-    91d8:	e3a02903 	mov	r2, #49152	; 0xc000
-    91dc:	e282228e 	add	r2, r2, #-536870904	; 0xe0000008
-    91e0:	e3a03903 	mov	r3, #49152	; 0xc000
-    91e4:	e283328e 	add	r3, r3, #-536870904	; 0xe0000008
-    91e8:	e5933000 	ldr	r3, [r3]
-    91ec:	e3833002 	orr	r3, r3, #2	; 0x2
-    91f0:	e5823000 	str	r3, [r2]
-    91f4:	e59f000c 	ldr	r0, [pc, #12]	; 9208 <.text+0x9208>
-    91f8:	ebfffd5e 	bl	8778 <Fifo_reset>
-    91fc:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    9200:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    9204:	e12fff1e 	bx	lr
-    9208:	40001b44 	andmi	r1, r0, r4, asr #22
-
-0000920c <UART0_txFlush>:
-    920c:	e1a0c00d 	mov	ip, sp
-    9210:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    9214:	e24cb004 	sub	fp, ip, #4	; 0x4
-    9218:	e3a02903 	mov	r2, #49152	; 0xc000
-    921c:	e282228e 	add	r2, r2, #-536870904	; 0xe0000008
-    9220:	e3a03903 	mov	r3, #49152	; 0xc000
-    9224:	e283328e 	add	r3, r3, #-536870904	; 0xe0000008
-    9228:	e5933000 	ldr	r3, [r3]
-    922c:	e3833004 	orr	r3, r3, #4	; 0x4
-    9230:	e5823000 	str	r3, [r2]
-    9234:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    9238:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    923c:	e12fff1e 	bx	lr
-
-00009240 <UART0_txEmpty>:
-    9240:	e1a0c00d 	mov	ip, sp
-    9244:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    9248:	e24cb004 	sub	fp, ip, #4	; 0x4
-    924c:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    9250:	e2833903 	add	r3, r3, #49152	; 0xc000
-    9254:	e2833014 	add	r3, r3, #20	; 0x14
-    9258:	e5933000 	ldr	r3, [r3]
-    925c:	e2033060 	and	r3, r3, #96	; 0x60
-    9260:	e3530060 	cmp	r3, #96	; 0x60
-    9264:	13a03000 	movne	r3, #0	; 0x0
-    9268:	03a03001 	moveq	r3, #1	; 0x1
-    926c:	e1a00003 	mov	r0, r3
-    9270:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    9274:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    9278:	e12fff1e 	bx	lr
-
-0000927c <UARTWriteChar>:
-    927c:	e1a0c00d 	mov	ip, sp
-    9280:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    9284:	e24cb004 	sub	fp, ip, #4	; 0x4
-    9288:	e24dd004 	sub	sp, sp, #4	; 0x4
-    928c:	e1a03000 	mov	r3, r0
-    9290:	e54b3010 	strb	r3, [fp, #-16]
-    9294:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    9298:	e2833903 	add	r3, r3, #49152	; 0xc000
-    929c:	e2833014 	add	r3, r3, #20	; 0x14
-    92a0:	e5933000 	ldr	r3, [r3]
-    92a4:	e2033020 	and	r3, r3, #32	; 0x20
-    92a8:	e3530000 	cmp	r3, #0	; 0x0
-    92ac:	0afffff8 	beq	9294 <UARTWriteChar+0x18>
-    92b0:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    92b4:	e2833903 	add	r3, r3, #49152	; 0xc000
-    92b8:	e55b2010 	ldrb	r2, [fp, #-16]
-    92bc:	e5832000 	str	r2, [r3]
-    92c0:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    92c4:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    92c8:	e12fff1e 	bx	lr
-
-000092cc <UARTReadChar>:
-    92cc:	e1a0c00d 	mov	ip, sp
-    92d0:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    92d4:	e24cb004 	sub	fp, ip, #4	; 0x4
-    92d8:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    92dc:	e2833903 	add	r3, r3, #49152	; 0xc000
-    92e0:	e2833014 	add	r3, r3, #20	; 0x14
-    92e4:	e5933000 	ldr	r3, [r3]
-    92e8:	e2033001 	and	r3, r3, #1	; 0x1
-    92ec:	e3530000 	cmp	r3, #0	; 0x0
-    92f0:	0afffff8 	beq	92d8 <UARTReadChar+0xc>
-    92f4:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    92f8:	e2833903 	add	r3, r3, #49152	; 0xc000
-    92fc:	e5933000 	ldr	r3, [r3]
-    9300:	e20330ff 	and	r3, r3, #255	; 0xff
-    9304:	e1a00003 	mov	r0, r3
-    9308:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    930c:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    9310:	e12fff1e 	bx	lr
-
-00009314 <__putchar>:
-    9314:	e1a0c00d 	mov	ip, sp
-    9318:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    931c:	e24cb004 	sub	fp, ip, #4	; 0x4
-    9320:	e24dd004 	sub	sp, sp, #4	; 0x4
-    9324:	e50b0010 	str	r0, [fp, #-16]
-    9328:	e51b3010 	ldr	r3, [fp, #-16]
-    932c:	e353000a 	cmp	r3, #10	; 0xa
-    9330:	1a000001 	bne	933c <__putchar+0x28>
-    9334:	e3a0000d 	mov	r0, #13	; 0xd
-    9338:	ebffffcf 	bl	927c <UARTWriteChar>
-    933c:	e51b3010 	ldr	r3, [fp, #-16]
-    9340:	e20330ff 	and	r3, r3, #255	; 0xff
-    9344:	e1a00003 	mov	r0, r3
-    9348:	ebffffcb 	bl	927c <UARTWriteChar>
-    934c:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    9350:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    9354:	e12fff1e 	bx	lr
-
-00009358 <UART_send>:
-    9358:	e1a0c00d 	mov	ip, sp
-    935c:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    9360:	e24cb004 	sub	fp, ip, #4	; 0x4
-    9364:	e24dd00c 	sub	sp, sp, #12	; 0xc
-    9368:	e50b0014 	str	r0, [fp, #-20]
-    936c:	e1a03001 	mov	r3, r1
-    9370:	e54b3018 	strb	r3, [fp, #-24]
-    9374:	e3a03000 	mov	r3, #0	; 0x0
-    9378:	e54b300d 	strb	r3, [fp, #-13]
-    937c:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    9380:	e2833903 	add	r3, r3, #49152	; 0xc000
-    9384:	e2833014 	add	r3, r3, #20	; 0x14
-    9388:	e5933000 	ldr	r3, [r3]
-    938c:	e2033020 	and	r3, r3, #32	; 0x20
-    9390:	e3530000 	cmp	r3, #0	; 0x0
-    9394:	0afffff8 	beq	937c <UART_send+0x24>
-    9398:	ea000014 	b	93f0 <UART_send+0x98>
-    939c:	e3a0220e 	mov	r2, #-536870912	; 0xe0000000
-    93a0:	e2822903 	add	r2, r2, #49152	; 0xc000
-    93a4:	e55b300d 	ldrb	r3, [fp, #-13]
-    93a8:	e1a01003 	mov	r1, r3
-    93ac:	e51b3014 	ldr	r3, [fp, #-20]
-    93b0:	e0813003 	add	r3, r1, r3
-    93b4:	e5d33000 	ldrb	r3, [r3]
-    93b8:	e5823000 	str	r3, [r2]
-    93bc:	e55b300d 	ldrb	r3, [fp, #-13]
-    93c0:	e2833001 	add	r3, r3, #1	; 0x1
-    93c4:	e54b300d 	strb	r3, [fp, #-13]
-    93c8:	e55b300d 	ldrb	r3, [fp, #-13]
-    93cc:	e353000f 	cmp	r3, #15	; 0xf
-    93d0:	9a000006 	bls	93f0 <UART_send+0x98>
-    93d4:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    93d8:	e2833903 	add	r3, r3, #49152	; 0xc000
-    93dc:	e2833014 	add	r3, r3, #20	; 0x14
-    93e0:	e5933000 	ldr	r3, [r3]
-    93e4:	e2033020 	and	r3, r3, #32	; 0x20
-    93e8:	e3530000 	cmp	r3, #0	; 0x0
-    93ec:	0afffff8 	beq	93d4 <UART_send+0x7c>
-    93f0:	e55b3018 	ldrb	r3, [fp, #-24]
-    93f4:	e2433001 	sub	r3, r3, #1	; 0x1
-    93f8:	e54b3018 	strb	r3, [fp, #-24]
-    93fc:	e55b3018 	ldrb	r3, [fp, #-24]
-    9400:	e35300ff 	cmp	r3, #255	; 0xff
-    9404:	1affffe4 	bne	939c <UART_send+0x44>
-    9408:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    940c:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    9410:	e12fff1e 	bx	lr
-
-00009414 <UART_send_ringbuffer>:
-    9414:	e1a0c00d 	mov	ip, sp
-    9418:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    941c:	e24cb004 	sub	fp, ip, #4	; 0x4
-    9420:	e24dd004 	sub	sp, sp, #4	; 0x4
-    9424:	e59f304c 	ldr	r3, [pc, #76]	; 9478 <.text+0x9478>
-    9428:	e5d33000 	ldrb	r3, [r3]
-    942c:	e20330ff 	and	r3, r3, #255	; 0xff
-    9430:	e3530000 	cmp	r3, #0	; 0x0
-    9434:	1a00000c 	bne	946c <UART_send_ringbuffer+0x58>
-    9438:	e24b300d 	sub	r3, fp, #13	; 0xd
-    943c:	e59f0038 	ldr	r0, [pc, #56]	; 947c <.text+0x947c>
-    9440:	e1a01003 	mov	r1, r3
-    9444:	ebfffc87 	bl	8668 <Fifo_readByte>
-    9448:	e1a03000 	mov	r3, r0
-    944c:	e3530000 	cmp	r3, #0	; 0x0
-    9450:	0a000005 	beq	946c <UART_send_ringbuffer+0x58>
-    9454:	e59f201c 	ldr	r2, [pc, #28]	; 9478 <.text+0x9478>
-    9458:	e3a03001 	mov	r3, #1	; 0x1
-    945c:	e5c23000 	strb	r3, [r2]
-    9460:	e55b300d 	ldrb	r3, [fp, #-13]
-    9464:	e1a00003 	mov	r0, r3
-    9468:	ebffff83 	bl	927c <UARTWriteChar>
-    946c:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    9470:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    9474:	e12fff1e 	bx	lr
-    9478:	400008b0 	strmih	r0, [r0], -r0
-    947c:	40001928 	andmi	r1, r0, r8, lsr #18
-
-00009480 <crc_update>:
-    9480:	e1a0c00d 	mov	ip, sp
-    9484:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    9488:	e24cb004 	sub	fp, ip, #4	; 0x4
-    948c:	e24dd008 	sub	sp, sp, #8	; 0x8
-    9490:	e1a03000 	mov	r3, r0
-    9494:	e1a02001 	mov	r2, r1
-    9498:	e14b31b0 	strh	r3, [fp, #-16]
-    949c:	e1a03002 	mov	r3, r2
-    94a0:	e54b3014 	strb	r3, [fp, #-20]
-    94a4:	e15b31b0 	ldrh	r3, [fp, #-16]
-    94a8:	e20330ff 	and	r3, r3, #255	; 0xff
-    94ac:	e20330ff 	and	r3, r3, #255	; 0xff
-    94b0:	e55b2014 	ldrb	r2, [fp, #-20]
-    94b4:	e1a01003 	mov	r1, r3
-    94b8:	e1a03002 	mov	r3, r2
-    94bc:	e0213003 	eor	r3, r1, r3
-    94c0:	e20330ff 	and	r3, r3, #255	; 0xff
-    94c4:	e54b3014 	strb	r3, [fp, #-20]
-    94c8:	e55b3014 	ldrb	r3, [fp, #-20]
-    94cc:	e1a03203 	mov	r3, r3, lsl #4
-    94d0:	e20330ff 	and	r3, r3, #255	; 0xff
-    94d4:	e55b2014 	ldrb	r2, [fp, #-20]
-    94d8:	e1a01003 	mov	r1, r3
-    94dc:	e1a03002 	mov	r3, r2
-    94e0:	e0213003 	eor	r3, r1, r3
-    94e4:	e20330ff 	and	r3, r3, #255	; 0xff
-    94e8:	e54b3014 	strb	r3, [fp, #-20]
-    94ec:	e55b3014 	ldrb	r3, [fp, #-20]
-    94f0:	e1a03403 	mov	r3, r3, lsl #8
-    94f4:	e1a03803 	mov	r3, r3, lsl #16
-    94f8:	e1a02823 	mov	r2, r3, lsr #16
-    94fc:	e15b31b0 	ldrh	r3, [fp, #-16]
-    9500:	e1a03423 	mov	r3, r3, lsr #8
-    9504:	e1a03803 	mov	r3, r3, lsl #16
-    9508:	e1a03823 	mov	r3, r3, lsr #16
-    950c:	e1a03803 	mov	r3, r3, lsl #16
-    9510:	e1a03823 	mov	r3, r3, lsr #16
-    9514:	e20330ff 	and	r3, r3, #255	; 0xff
-    9518:	e1823003 	orr	r3, r2, r3
-    951c:	e1a03803 	mov	r3, r3, lsl #16
-    9520:	e1a02823 	mov	r2, r3, lsr #16
-    9524:	e55b3014 	ldrb	r3, [fp, #-20]
-    9528:	e1a03223 	mov	r3, r3, lsr #4
-    952c:	e20330ff 	and	r3, r3, #255	; 0xff
-    9530:	e0223003 	eor	r3, r2, r3
-    9534:	e1a03803 	mov	r3, r3, lsl #16
-    9538:	e1a02823 	mov	r2, r3, lsr #16
-    953c:	e55b3014 	ldrb	r3, [fp, #-20]
-    9540:	e1a03183 	mov	r3, r3, lsl #3
-    9544:	e1a03803 	mov	r3, r3, lsl #16
-    9548:	e1a03823 	mov	r3, r3, lsr #16
-    954c:	e0223003 	eor	r3, r2, r3
-    9550:	e1a03803 	mov	r3, r3, lsl #16
-    9554:	e1a03823 	mov	r3, r3, lsr #16
-    9558:	e1a03803 	mov	r3, r3, lsl #16
-    955c:	e1a03823 	mov	r3, r3, lsr #16
-    9560:	e1a00003 	mov	r0, r3
-    9564:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    9568:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    956c:	e12fff1e 	bx	lr
-
-00009570 <crc16>:
-    9570:	e1a0c00d 	mov	ip, sp
-    9574:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    9578:	e24cb004 	sub	fp, ip, #4	; 0x4
-    957c:	e24dd014 	sub	sp, sp, #20	; 0x14
-    9580:	e50b0018 	str	r0, [fp, #-24]
-    9584:	e1a03001 	mov	r3, r1
-    9588:	e14b31bc 	strh	r3, [fp, #-28]
-    958c:	e14b22b0 	strh	r2, [fp, #-32]
-    9590:	e51b3018 	ldr	r3, [fp, #-24]
-    9594:	e50b3014 	str	r3, [fp, #-20]
-    9598:	e3a03000 	mov	r3, #0	; 0x0
-    959c:	e50b3010 	str	r3, [fp, #-16]
-    95a0:	ea00000d 	b	95dc <crc16+0x6c>
-    95a4:	e15b22b0 	ldrh	r2, [fp, #-32]
-    95a8:	e51b3014 	ldr	r3, [fp, #-20]
-    95ac:	e5d33000 	ldrb	r3, [r3]
-    95b0:	e1a00002 	mov	r0, r2
-    95b4:	e1a01003 	mov	r1, r3
-    95b8:	ebffffb0 	bl	9480 <crc_update>
-    95bc:	e1a03000 	mov	r3, r0
-    95c0:	e14b32b0 	strh	r3, [fp, #-32]
-    95c4:	e51b3014 	ldr	r3, [fp, #-20]
-    95c8:	e2833001 	add	r3, r3, #1	; 0x1
-    95cc:	e50b3014 	str	r3, [fp, #-20]
-    95d0:	e51b3010 	ldr	r3, [fp, #-16]
-    95d4:	e2833001 	add	r3, r3, #1	; 0x1
-    95d8:	e50b3010 	str	r3, [fp, #-16]
-    95dc:	e15b21bc 	ldrh	r2, [fp, #-28]
-    95e0:	e51b3010 	ldr	r3, [fp, #-16]
-    95e4:	e1520003 	cmp	r2, r3
-    95e8:	caffffed 	bgt	95a4 <crc16+0x34>
-    95ec:	e15b32b0 	ldrh	r3, [fp, #-32]
-    95f0:	e1a00003 	mov	r0, r3
-    95f4:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    95f8:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    95fc:	e12fff1e 	bx	lr
-
-00009600 <parse_VELNED>:
-    9600:	e1a0c00d 	mov	ip, sp
-    9604:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    9608:	e24cb004 	sub	fp, ip, #4	; 0x4
-    960c:	e24dd008 	sub	sp, sp, #8	; 0x8
-    9610:	e1a03000 	mov	r3, r0
-    9614:	e1a02001 	mov	r2, r1
-    9618:	e54b3010 	strb	r3, [fp, #-16]
-    961c:	e1a03002 	mov	r3, r2
-    9620:	e54b3014 	strb	r3, [fp, #-20]
-    9624:	e55b3014 	ldrb	r3, [fp, #-20]
-    9628:	e3530000 	cmp	r3, #0	; 0x0
-    962c:	0a000003 	beq	9640 <parse_VELNED+0x40>
-    9630:	e59f3390 	ldr	r3, [pc, #912]	; 99c8 <.text+0x99c8>
-    9634:	e3a02000 	mov	r2, #0	; 0x0
-    9638:	e5c32000 	strb	r2, [r3]
-    963c:	ea0000de 	b	99bc <parse_VELNED+0x3bc>
-    9640:	e59f3380 	ldr	r3, [pc, #896]	; 99c8 <.text+0x99c8>
-    9644:	e5d33000 	ldrb	r3, [r3]
-    9648:	e3530000 	cmp	r3, #0	; 0x0
-    964c:	1a000003 	bne	9660 <parse_VELNED+0x60>
-    9650:	e55b2010 	ldrb	r2, [fp, #-16]
-    9654:	e59f3370 	ldr	r3, [pc, #880]	; 99cc <.text+0x99cc>
-    9658:	e5832000 	str	r2, [r3]
-    965c:	ea0000d0 	b	99a4 <parse_VELNED+0x3a4>
-    9660:	e59f3360 	ldr	r3, [pc, #864]	; 99c8 <.text+0x99c8>
-    9664:	e5d33000 	ldrb	r3, [r3]
-    9668:	e3530001 	cmp	r3, #1	; 0x1
-    966c:	1a000007 	bne	9690 <parse_VELNED+0x90>
-    9670:	e55b3010 	ldrb	r3, [fp, #-16]
-    9674:	e1a02403 	mov	r2, r3, lsl #8
-    9678:	e59f334c 	ldr	r3, [pc, #844]	; 99cc <.text+0x99cc>
-    967c:	e5933000 	ldr	r3, [r3]
-    9680:	e0822003 	add	r2, r2, r3
-    9684:	e59f3340 	ldr	r3, [pc, #832]	; 99cc <.text+0x99cc>
-    9688:	e5832000 	str	r2, [r3]
-    968c:	ea0000c4 	b	99a4 <parse_VELNED+0x3a4>
-    9690:	e59f3330 	ldr	r3, [pc, #816]	; 99c8 <.text+0x99c8>
-    9694:	e5d33000 	ldrb	r3, [r3]
-    9698:	e3530002 	cmp	r3, #2	; 0x2
-    969c:	1a000007 	bne	96c0 <parse_VELNED+0xc0>
-    96a0:	e55b3010 	ldrb	r3, [fp, #-16]
-    96a4:	e1a02803 	mov	r2, r3, lsl #16
-    96a8:	e59f331c 	ldr	r3, [pc, #796]	; 99cc <.text+0x99cc>
-    96ac:	e5933000 	ldr	r3, [r3]
-    96b0:	e0822003 	add	r2, r2, r3
-    96b4:	e59f3310 	ldr	r3, [pc, #784]	; 99cc <.text+0x99cc>
-    96b8:	e5832000 	str	r2, [r3]
-    96bc:	ea0000b8 	b	99a4 <parse_VELNED+0x3a4>
-    96c0:	e59f3300 	ldr	r3, [pc, #768]	; 99c8 <.text+0x99c8>
-    96c4:	e5d33000 	ldrb	r3, [r3]
-    96c8:	e3530003 	cmp	r3, #3	; 0x3
-    96cc:	1a000007 	bne	96f0 <parse_VELNED+0xf0>
-    96d0:	e55b3010 	ldrb	r3, [fp, #-16]
-    96d4:	e1a02c03 	mov	r2, r3, lsl #24
-    96d8:	e59f32ec 	ldr	r3, [pc, #748]	; 99cc <.text+0x99cc>
-    96dc:	e5933000 	ldr	r3, [r3]
-    96e0:	e0822003 	add	r2, r2, r3
-    96e4:	e59f32e0 	ldr	r3, [pc, #736]	; 99cc <.text+0x99cc>
-    96e8:	e5832000 	str	r2, [r3]
-    96ec:	ea0000ac 	b	99a4 <parse_VELNED+0x3a4>
-    96f0:	e59f32d0 	ldr	r3, [pc, #720]	; 99c8 <.text+0x99c8>
-    96f4:	e5d33000 	ldrb	r3, [r3]
-    96f8:	e3530004 	cmp	r3, #4	; 0x4
-    96fc:	1a000003 	bne	9710 <parse_VELNED+0x110>
-    9700:	e55b2010 	ldrb	r2, [fp, #-16]
-    9704:	e59f32c4 	ldr	r3, [pc, #708]	; 99d0 <.text+0x99d0>
-    9708:	e5832000 	str	r2, [r3]
-    970c:	ea0000a4 	b	99a4 <parse_VELNED+0x3a4>
-    9710:	e59f32b0 	ldr	r3, [pc, #688]	; 99c8 <.text+0x99c8>
-    9714:	e5d33000 	ldrb	r3, [r3]
-    9718:	e3530005 	cmp	r3, #5	; 0x5
-    971c:	1a000007 	bne	9740 <parse_VELNED+0x140>
-    9720:	e55b3010 	ldrb	r3, [fp, #-16]
-    9724:	e1a02403 	mov	r2, r3, lsl #8
-    9728:	e59f32a0 	ldr	r3, [pc, #672]	; 99d0 <.text+0x99d0>
-    972c:	e5933000 	ldr	r3, [r3]
-    9730:	e0822003 	add	r2, r2, r3
-    9734:	e59f3294 	ldr	r3, [pc, #660]	; 99d0 <.text+0x99d0>
-    9738:	e5832000 	str	r2, [r3]
-    973c:	ea000098 	b	99a4 <parse_VELNED+0x3a4>
-    9740:	e59f3280 	ldr	r3, [pc, #640]	; 99c8 <.text+0x99c8>
-    9744:	e5d33000 	ldrb	r3, [r3]
-    9748:	e3530006 	cmp	r3, #6	; 0x6
-    974c:	1a000007 	bne	9770 <parse_VELNED+0x170>
-    9750:	e55b3010 	ldrb	r3, [fp, #-16]
-    9754:	e1a02803 	mov	r2, r3, lsl #16
-    9758:	e59f3270 	ldr	r3, [pc, #624]	; 99d0 <.text+0x99d0>
-    975c:	e5933000 	ldr	r3, [r3]
-    9760:	e0822003 	add	r2, r2, r3
-    9764:	e59f3264 	ldr	r3, [pc, #612]	; 99d0 <.text+0x99d0>
-    9768:	e5832000 	str	r2, [r3]
-    976c:	ea00008c 	b	99a4 <parse_VELNED+0x3a4>
-    9770:	e59f3250 	ldr	r3, [pc, #592]	; 99c8 <.text+0x99c8>
-    9774:	e5d33000 	ldrb	r3, [r3]
-    9778:	e3530007 	cmp	r3, #7	; 0x7
-    977c:	1a000007 	bne	97a0 <parse_VELNED+0x1a0>
-    9780:	e55b3010 	ldrb	r3, [fp, #-16]
-    9784:	e1a02c03 	mov	r2, r3, lsl #24
-    9788:	e59f3240 	ldr	r3, [pc, #576]	; 99d0 <.text+0x99d0>
-    978c:	e5933000 	ldr	r3, [r3]
-    9790:	e0822003 	add	r2, r2, r3
-    9794:	e59f3234 	ldr	r3, [pc, #564]	; 99d0 <.text+0x99d0>
-    9798:	e5832000 	str	r2, [r3]
-    979c:	ea000080 	b	99a4 <parse_VELNED+0x3a4>
-    97a0:	e59f3220 	ldr	r3, [pc, #544]	; 99c8 <.text+0x99c8>
-    97a4:	e5d33000 	ldrb	r3, [r3]
-    97a8:	e3530014 	cmp	r3, #20	; 0x14
-    97ac:	1a000003 	bne	97c0 <parse_VELNED+0x1c0>
-    97b0:	e55b2010 	ldrb	r2, [fp, #-16]
-    97b4:	e59f3218 	ldr	r3, [pc, #536]	; 99d4 <.text+0x99d4>
-    97b8:	e5832000 	str	r2, [r3]
-    97bc:	ea000078 	b	99a4 <parse_VELNED+0x3a4>
-    97c0:	e59f3200 	ldr	r3, [pc, #512]	; 99c8 <.text+0x99c8>
-    97c4:	e5d33000 	ldrb	r3, [r3]
-    97c8:	e3530015 	cmp	r3, #21	; 0x15
-    97cc:	1a000007 	bne	97f0 <parse_VELNED+0x1f0>
-    97d0:	e55b3010 	ldrb	r3, [fp, #-16]
-    97d4:	e1a02403 	mov	r2, r3, lsl #8
-    97d8:	e59f31f4 	ldr	r3, [pc, #500]	; 99d4 <.text+0x99d4>
-    97dc:	e5933000 	ldr	r3, [r3]
-    97e0:	e0822003 	add	r2, r2, r3
-    97e4:	e59f31e8 	ldr	r3, [pc, #488]	; 99d4 <.text+0x99d4>
-    97e8:	e5832000 	str	r2, [r3]
-    97ec:	ea00006c 	b	99a4 <parse_VELNED+0x3a4>
-    97f0:	e59f31d0 	ldr	r3, [pc, #464]	; 99c8 <.text+0x99c8>
-    97f4:	e5d33000 	ldrb	r3, [r3]
-    97f8:	e3530016 	cmp	r3, #22	; 0x16
-    97fc:	1a000007 	bne	9820 <parse_VELNED+0x220>
-    9800:	e55b3010 	ldrb	r3, [fp, #-16]
-    9804:	e1a02803 	mov	r2, r3, lsl #16
-    9808:	e59f31c4 	ldr	r3, [pc, #452]	; 99d4 <.text+0x99d4>
-    980c:	e5933000 	ldr	r3, [r3]
-    9810:	e0822003 	add	r2, r2, r3
-    9814:	e59f31b8 	ldr	r3, [pc, #440]	; 99d4 <.text+0x99d4>
-    9818:	e5832000 	str	r2, [r3]
-    981c:	ea000060 	b	99a4 <parse_VELNED+0x3a4>
-    9820:	e59f31a0 	ldr	r3, [pc, #416]	; 99c8 <.text+0x99c8>
-    9824:	e5d33000 	ldrb	r3, [r3]
-    9828:	e3530017 	cmp	r3, #23	; 0x17
-    982c:	1a000007 	bne	9850 <parse_VELNED+0x250>
-    9830:	e55b3010 	ldrb	r3, [fp, #-16]
-    9834:	e1a02c03 	mov	r2, r3, lsl #24
-    9838:	e59f3194 	ldr	r3, [pc, #404]	; 99d4 <.text+0x99d4>
-    983c:	e5933000 	ldr	r3, [r3]
-    9840:	e0822003 	add	r2, r2, r3
-    9844:	e59f3188 	ldr	r3, [pc, #392]	; 99d4 <.text+0x99d4>
-    9848:	e5832000 	str	r2, [r3]
-    984c:	ea000054 	b	99a4 <parse_VELNED+0x3a4>
-    9850:	e59f3170 	ldr	r3, [pc, #368]	; 99c8 <.text+0x99c8>
-    9854:	e5d33000 	ldrb	r3, [r3]
-    9858:	e3530018 	cmp	r3, #24	; 0x18
-    985c:	1a000003 	bne	9870 <parse_VELNED+0x270>
-    9860:	e55b2010 	ldrb	r2, [fp, #-16]
-    9864:	e59f316c 	ldr	r3, [pc, #364]	; 99d8 <.text+0x99d8>
-    9868:	e5832000 	str	r2, [r3]
-    986c:	ea00004c 	b	99a4 <parse_VELNED+0x3a4>
-    9870:	e59f3150 	ldr	r3, [pc, #336]	; 99c8 <.text+0x99c8>
-    9874:	e5d33000 	ldrb	r3, [r3]
-    9878:	e3530019 	cmp	r3, #25	; 0x19
-    987c:	1a000008 	bne	98a4 <parse_VELNED+0x2a4>
-    9880:	e55b3010 	ldrb	r3, [fp, #-16]
-    9884:	e1a03403 	mov	r3, r3, lsl #8
-    9888:	e1a02003 	mov	r2, r3
-    988c:	e59f3144 	ldr	r3, [pc, #324]	; 99d8 <.text+0x99d8>
-    9890:	e5933000 	ldr	r3, [r3]
-    9894:	e0822003 	add	r2, r2, r3
-    9898:	e59f3138 	ldr	r3, [pc, #312]	; 99d8 <.text+0x99d8>
-    989c:	e5832000 	str	r2, [r3]
-    98a0:	ea00003f 	b	99a4 <parse_VELNED+0x3a4>
-    98a4:	e59f311c 	ldr	r3, [pc, #284]	; 99c8 <.text+0x99c8>
-    98a8:	e5d33000 	ldrb	r3, [r3]
-    98ac:	e353001a 	cmp	r3, #26	; 0x1a
-    98b0:	1a000008 	bne	98d8 <parse_VELNED+0x2d8>
-    98b4:	e55b3010 	ldrb	r3, [fp, #-16]
-    98b8:	e1a03803 	mov	r3, r3, lsl #16
-    98bc:	e1a02003 	mov	r2, r3
-    98c0:	e59f3110 	ldr	r3, [pc, #272]	; 99d8 <.text+0x99d8>
-    98c4:	e5933000 	ldr	r3, [r3]
-    98c8:	e0822003 	add	r2, r2, r3
-    98cc:	e59f3104 	ldr	r3, [pc, #260]	; 99d8 <.text+0x99d8>
-    98d0:	e5832000 	str	r2, [r3]
-    98d4:	ea000032 	b	99a4 <parse_VELNED+0x3a4>
-    98d8:	e59f30e8 	ldr	r3, [pc, #232]	; 99c8 <.text+0x99c8>
-    98dc:	e5d33000 	ldrb	r3, [r3]
-    98e0:	e353001b 	cmp	r3, #27	; 0x1b
-    98e4:	1a00002e 	bne	99a4 <parse_VELNED+0x3a4>
-    98e8:	e55b3010 	ldrb	r3, [fp, #-16]
-    98ec:	e1a03c03 	mov	r3, r3, lsl #24
-    98f0:	e1a02003 	mov	r2, r3
-    98f4:	e59f30dc 	ldr	r3, [pc, #220]	; 99d8 <.text+0x99d8>
-    98f8:	e5933000 	ldr	r3, [r3]
-    98fc:	e0822003 	add	r2, r2, r3
-    9900:	e59f30d0 	ldr	r3, [pc, #208]	; 99d8 <.text+0x99d8>
-    9904:	e5832000 	str	r2, [r3]
-    9908:	e59f30c0 	ldr	r3, [pc, #192]	; 99d0 <.text+0x99d0>
-    990c:	e5932000 	ldr	r2, [r3]
-    9910:	e1a03002 	mov	r3, r2
-    9914:	e1a03103 	mov	r3, r3, lsl #2
-    9918:	e0833002 	add	r3, r3, r2
-    991c:	e1a03083 	mov	r3, r3, lsl #1
-    9920:	e1a02003 	mov	r2, r3
-    9924:	e59f30b0 	ldr	r3, [pc, #176]	; 99dc <.text+0x99dc>
-    9928:	e583200c 	str	r2, [r3, #12]
-    992c:	e59f3098 	ldr	r3, [pc, #152]	; 99cc <.text+0x99cc>
-    9930:	e5932000 	ldr	r2, [r3]
-    9934:	e1a03002 	mov	r3, r2
-    9938:	e1a03103 	mov	r3, r3, lsl #2
-    993c:	e0833002 	add	r3, r3, r2
-    9940:	e1a03083 	mov	r3, r3, lsl #1
-    9944:	e1a02003 	mov	r2, r3
-    9948:	e59f308c 	ldr	r3, [pc, #140]	; 99dc <.text+0x99dc>
-    994c:	e5832010 	str	r2, [r3, #16]
-    9950:	e59f307c 	ldr	r3, [pc, #124]	; 99d4 <.text+0x99d4>
-    9954:	e5931000 	ldr	r1, [r3]
-    9958:	e59f3080 	ldr	r3, [pc, #128]	; 99e0 <.text+0x99e0>
-    995c:	e0c32391 	smull	r2, r3, r1, r3
-    9960:	e1a022c3 	mov	r2, r3, asr #5
-    9964:	e1a03fc1 	mov	r3, r1, asr #31
-    9968:	e0632002 	rsb	r2, r3, r2
-    996c:	e59f3068 	ldr	r3, [pc, #104]	; 99dc <.text+0x99dc>
-    9970:	e5832014 	str	r2, [r3, #20]
-    9974:	e59f305c 	ldr	r3, [pc, #92]	; 99d8 <.text+0x99d8>
-    9978:	e5932000 	ldr	r2, [r3]
-    997c:	e1a03002 	mov	r3, r2
-    9980:	e1a03103 	mov	r3, r3, lsl #2
-    9984:	e0833002 	add	r3, r3, r2
-    9988:	e1a03083 	mov	r3, r3, lsl #1
-    998c:	e1a02003 	mov	r2, r3
-    9990:	e59f3044 	ldr	r3, [pc, #68]	; 99dc <.text+0x99dc>
-    9994:	e5832020 	str	r2, [r3, #32]
-    9998:	e59f2044 	ldr	r2, [pc, #68]	; 99e4 <.text+0x99e4>
-    999c:	e3a03001 	mov	r3, #1	; 0x1
-    99a0:	e5823000 	str	r3, [r2]
-    99a4:	e59f301c 	ldr	r3, [pc, #28]	; 99c8 <.text+0x99c8>
-    99a8:	e5d33000 	ldrb	r3, [r3]
-    99ac:	e2833001 	add	r3, r3, #1	; 0x1
-    99b0:	e20330ff 	and	r3, r3, #255	; 0xff
-    99b4:	e59f200c 	ldr	r2, [pc, #12]	; 99c8 <.text+0x99c8>
-    99b8:	e5c23000 	strb	r3, [r2]
-    99bc:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    99c0:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    99c4:	e12fff1e 	bx	lr
-    99c8:	400008fc 	strmid	r0, [r0], -ip
-    99cc:	400008f4 	strmid	r0, [r0], -r4
-    99d0:	400008f8 	strmid	r0, [r0], -r8
-    99d4:	400008f0 	strmid	r0, [r0], -r0
-    99d8:	400008ec 	andmi	r0, r0, ip, ror #17
-    99dc:	40000e94 	mulmi	r0, r4, lr
-    99e0:	51eb851f 	mvnpl	r8, pc, lsl r5
-    99e4:	40000854 	andmi	r0, r0, r4, asr r8
-
-000099e8 <parse_POSLLH>:
-    99e8:	e1a0c00d 	mov	ip, sp
-    99ec:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    99f0:	e24cb004 	sub	fp, ip, #4	; 0x4
-    99f4:	e24dd008 	sub	sp, sp, #8	; 0x8
-    99f8:	e1a03000 	mov	r3, r0
-    99fc:	e1a02001 	mov	r2, r1
-    9a00:	e54b3010 	strb	r3, [fp, #-16]
-    9a04:	e1a03002 	mov	r3, r2
-    9a08:	e54b3014 	strb	r3, [fp, #-20]
-    9a0c:	e55b3014 	ldrb	r3, [fp, #-20]
-    9a10:	e3530000 	cmp	r3, #0	; 0x0
-    9a14:	0a000003 	beq	9a28 <parse_POSLLH+0x40>
-    9a18:	e59f3400 	ldr	r3, [pc, #1024]	; 9e20 <.text+0x9e20>
-    9a1c:	e3a02000 	mov	r2, #0	; 0x0
-    9a20:	e5c32000 	strb	r2, [r3]
-    9a24:	ea0000fa 	b	9e14 <parse_POSLLH+0x42c>
-    9a28:	e59f33f0 	ldr	r3, [pc, #1008]	; 9e20 <.text+0x9e20>
-    9a2c:	e5d33000 	ldrb	r3, [r3]
-    9a30:	e3530000 	cmp	r3, #0	; 0x0
-    9a34:	1a000003 	bne	9a48 <parse_POSLLH+0x60>
-    9a38:	e55b2010 	ldrb	r2, [fp, #-16]
-    9a3c:	e59f33e0 	ldr	r3, [pc, #992]	; 9e24 <.text+0x9e24>
-    9a40:	e5832000 	str	r2, [r3]
-    9a44:	ea0000ec 	b	9dfc <parse_POSLLH+0x414>
-    9a48:	e59f33d0 	ldr	r3, [pc, #976]	; 9e20 <.text+0x9e20>
-    9a4c:	e5d33000 	ldrb	r3, [r3]
-    9a50:	e3530001 	cmp	r3, #1	; 0x1
-    9a54:	1a000007 	bne	9a78 <parse_POSLLH+0x90>
-    9a58:	e55b3010 	ldrb	r3, [fp, #-16]
-    9a5c:	e1a02403 	mov	r2, r3, lsl #8
-    9a60:	e59f33bc 	ldr	r3, [pc, #956]	; 9e24 <.text+0x9e24>
-    9a64:	e5933000 	ldr	r3, [r3]
-    9a68:	e0822003 	add	r2, r2, r3
-    9a6c:	e59f33b0 	ldr	r3, [pc, #944]	; 9e24 <.text+0x9e24>
-    9a70:	e5832000 	str	r2, [r3]
-    9a74:	ea0000e0 	b	9dfc <parse_POSLLH+0x414>
-    9a78:	e59f33a0 	ldr	r3, [pc, #928]	; 9e20 <.text+0x9e20>
-    9a7c:	e5d33000 	ldrb	r3, [r3]
-    9a80:	e3530002 	cmp	r3, #2	; 0x2
-    9a84:	1a000007 	bne	9aa8 <parse_POSLLH+0xc0>
-    9a88:	e55b3010 	ldrb	r3, [fp, #-16]
-    9a8c:	e1a02803 	mov	r2, r3, lsl #16
-    9a90:	e59f338c 	ldr	r3, [pc, #908]	; 9e24 <.text+0x9e24>
-    9a94:	e5933000 	ldr	r3, [r3]
-    9a98:	e0822003 	add	r2, r2, r3
-    9a9c:	e59f3380 	ldr	r3, [pc, #896]	; 9e24 <.text+0x9e24>
-    9aa0:	e5832000 	str	r2, [r3]
-    9aa4:	ea0000d4 	b	9dfc <parse_POSLLH+0x414>
-    9aa8:	e59f3370 	ldr	r3, [pc, #880]	; 9e20 <.text+0x9e20>
-    9aac:	e5d33000 	ldrb	r3, [r3]
-    9ab0:	e3530003 	cmp	r3, #3	; 0x3
-    9ab4:	1a000007 	bne	9ad8 <parse_POSLLH+0xf0>
-    9ab8:	e55b3010 	ldrb	r3, [fp, #-16]
-    9abc:	e1a02c03 	mov	r2, r3, lsl #24
-    9ac0:	e59f335c 	ldr	r3, [pc, #860]	; 9e24 <.text+0x9e24>
-    9ac4:	e5933000 	ldr	r3, [r3]
-    9ac8:	e0822003 	add	r2, r2, r3
-    9acc:	e59f3350 	ldr	r3, [pc, #848]	; 9e24 <.text+0x9e24>
-    9ad0:	e5832000 	str	r2, [r3]
-    9ad4:	ea0000c8 	b	9dfc <parse_POSLLH+0x414>
-    9ad8:	e59f3340 	ldr	r3, [pc, #832]	; 9e20 <.text+0x9e20>
-    9adc:	e5d33000 	ldrb	r3, [r3]
-    9ae0:	e3530004 	cmp	r3, #4	; 0x4
-    9ae4:	1a000003 	bne	9af8 <parse_POSLLH+0x110>
-    9ae8:	e55b2010 	ldrb	r2, [fp, #-16]
-    9aec:	e59f3334 	ldr	r3, [pc, #820]	; 9e28 <.text+0x9e28>
-    9af0:	e5832000 	str	r2, [r3]
-    9af4:	ea0000c0 	b	9dfc <parse_POSLLH+0x414>
-    9af8:	e59f3320 	ldr	r3, [pc, #800]	; 9e20 <.text+0x9e20>
-    9afc:	e5d33000 	ldrb	r3, [r3]
-    9b00:	e3530005 	cmp	r3, #5	; 0x5
-    9b04:	1a000007 	bne	9b28 <parse_POSLLH+0x140>
-    9b08:	e55b3010 	ldrb	r3, [fp, #-16]
-    9b0c:	e1a02403 	mov	r2, r3, lsl #8
-    9b10:	e59f3310 	ldr	r3, [pc, #784]	; 9e28 <.text+0x9e28>
-    9b14:	e5933000 	ldr	r3, [r3]
-    9b18:	e0822003 	add	r2, r2, r3
-    9b1c:	e59f3304 	ldr	r3, [pc, #772]	; 9e28 <.text+0x9e28>
-    9b20:	e5832000 	str	r2, [r3]
-    9b24:	ea0000b4 	b	9dfc <parse_POSLLH+0x414>
-    9b28:	e59f32f0 	ldr	r3, [pc, #752]	; 9e20 <.text+0x9e20>
-    9b2c:	e5d33000 	ldrb	r3, [r3]
-    9b30:	e3530006 	cmp	r3, #6	; 0x6
-    9b34:	1a000007 	bne	9b58 <parse_POSLLH+0x170>
-    9b38:	e55b3010 	ldrb	r3, [fp, #-16]
-    9b3c:	e1a02803 	mov	r2, r3, lsl #16
-    9b40:	e59f32e0 	ldr	r3, [pc, #736]	; 9e28 <.text+0x9e28>
-    9b44:	e5933000 	ldr	r3, [r3]
-    9b48:	e0822003 	add	r2, r2, r3
-    9b4c:	e59f32d4 	ldr	r3, [pc, #724]	; 9e28 <.text+0x9e28>
-    9b50:	e5832000 	str	r2, [r3]
-    9b54:	ea0000a8 	b	9dfc <parse_POSLLH+0x414>
-    9b58:	e59f32c0 	ldr	r3, [pc, #704]	; 9e20 <.text+0x9e20>
-    9b5c:	e5d33000 	ldrb	r3, [r3]
-    9b60:	e3530007 	cmp	r3, #7	; 0x7
-    9b64:	1a000007 	bne	9b88 <parse_POSLLH+0x1a0>
-    9b68:	e55b3010 	ldrb	r3, [fp, #-16]
-    9b6c:	e1a02c03 	mov	r2, r3, lsl #24
-    9b70:	e59f32b0 	ldr	r3, [pc, #688]	; 9e28 <.text+0x9e28>
-    9b74:	e5933000 	ldr	r3, [r3]
-    9b78:	e0822003 	add	r2, r2, r3
-    9b7c:	e59f32a4 	ldr	r3, [pc, #676]	; 9e28 <.text+0x9e28>
-    9b80:	e5832000 	str	r2, [r3]
-    9b84:	ea00009c 	b	9dfc <parse_POSLLH+0x414>
-    9b88:	e59f3290 	ldr	r3, [pc, #656]	; 9e20 <.text+0x9e20>
-    9b8c:	e5d33000 	ldrb	r3, [r3]
-    9b90:	e353000c 	cmp	r3, #12	; 0xc
-    9b94:	1a000003 	bne	9ba8 <parse_POSLLH+0x1c0>
-    9b98:	e55b2010 	ldrb	r2, [fp, #-16]
-    9b9c:	e59f3288 	ldr	r3, [pc, #648]	; 9e2c <.text+0x9e2c>
-    9ba0:	e5832000 	str	r2, [r3]
-    9ba4:	ea000094 	b	9dfc <parse_POSLLH+0x414>
-    9ba8:	e59f3270 	ldr	r3, [pc, #624]	; 9e20 <.text+0x9e20>
-    9bac:	e5d33000 	ldrb	r3, [r3]
-    9bb0:	e353000d 	cmp	r3, #13	; 0xd
-    9bb4:	1a000007 	bne	9bd8 <parse_POSLLH+0x1f0>
-    9bb8:	e55b3010 	ldrb	r3, [fp, #-16]
-    9bbc:	e1a02403 	mov	r2, r3, lsl #8
-    9bc0:	e59f3264 	ldr	r3, [pc, #612]	; 9e2c <.text+0x9e2c>
-    9bc4:	e5933000 	ldr	r3, [r3]
-    9bc8:	e0822003 	add	r2, r2, r3
-    9bcc:	e59f3258 	ldr	r3, [pc, #600]	; 9e2c <.text+0x9e2c>
-    9bd0:	e5832000 	str	r2, [r3]
-    9bd4:	ea000088 	b	9dfc <parse_POSLLH+0x414>
-    9bd8:	e59f3240 	ldr	r3, [pc, #576]	; 9e20 <.text+0x9e20>
-    9bdc:	e5d33000 	ldrb	r3, [r3]
-    9be0:	e353000e 	cmp	r3, #14	; 0xe
-    9be4:	1a000007 	bne	9c08 <parse_POSLLH+0x220>
-    9be8:	e55b3010 	ldrb	r3, [fp, #-16]
-    9bec:	e1a02803 	mov	r2, r3, lsl #16
-    9bf0:	e59f3234 	ldr	r3, [pc, #564]	; 9e2c <.text+0x9e2c>
-    9bf4:	e5933000 	ldr	r3, [r3]
-    9bf8:	e0822003 	add	r2, r2, r3
-    9bfc:	e59f3228 	ldr	r3, [pc, #552]	; 9e2c <.text+0x9e2c>
-    9c00:	e5832000 	str	r2, [r3]
-    9c04:	ea00007c 	b	9dfc <parse_POSLLH+0x414>
-    9c08:	e59f3210 	ldr	r3, [pc, #528]	; 9e20 <.text+0x9e20>
-    9c0c:	e5d33000 	ldrb	r3, [r3]
-    9c10:	e353000f 	cmp	r3, #15	; 0xf
-    9c14:	1a000007 	bne	9c38 <parse_POSLLH+0x250>
-    9c18:	e55b3010 	ldrb	r3, [fp, #-16]
-    9c1c:	e1a02c03 	mov	r2, r3, lsl #24
-    9c20:	e59f3204 	ldr	r3, [pc, #516]	; 9e2c <.text+0x9e2c>
-    9c24:	e5933000 	ldr	r3, [r3]
-    9c28:	e0822003 	add	r2, r2, r3
-    9c2c:	e59f31f8 	ldr	r3, [pc, #504]	; 9e2c <.text+0x9e2c>
-    9c30:	e5832000 	str	r2, [r3]
-    9c34:	ea000070 	b	9dfc <parse_POSLLH+0x414>
-    9c38:	e59f31e0 	ldr	r3, [pc, #480]	; 9e20 <.text+0x9e20>
-    9c3c:	e5d33000 	ldrb	r3, [r3]
-    9c40:	e3530010 	cmp	r3, #16	; 0x10
-    9c44:	1a000003 	bne	9c58 <parse_POSLLH+0x270>
-    9c48:	e55b2010 	ldrb	r2, [fp, #-16]
-    9c4c:	e59f31dc 	ldr	r3, [pc, #476]	; 9e30 <.text+0x9e30>
-    9c50:	e5832000 	str	r2, [r3]
-    9c54:	ea000068 	b	9dfc <parse_POSLLH+0x414>
-    9c58:	e59f31c0 	ldr	r3, [pc, #448]	; 9e20 <.text+0x9e20>
-    9c5c:	e5d33000 	ldrb	r3, [r3]
-    9c60:	e3530011 	cmp	r3, #17	; 0x11
-    9c64:	1a000008 	bne	9c8c <parse_POSLLH+0x2a4>
-    9c68:	e55b3010 	ldrb	r3, [fp, #-16]
-    9c6c:	e1a03403 	mov	r3, r3, lsl #8
-    9c70:	e1a02003 	mov	r2, r3
-    9c74:	e59f31b4 	ldr	r3, [pc, #436]	; 9e30 <.text+0x9e30>
-    9c78:	e5933000 	ldr	r3, [r3]
-    9c7c:	e0822003 	add	r2, r2, r3
-    9c80:	e59f31a8 	ldr	r3, [pc, #424]	; 9e30 <.text+0x9e30>
-    9c84:	e5832000 	str	r2, [r3]
-    9c88:	ea00005b 	b	9dfc <parse_POSLLH+0x414>
-    9c8c:	e59f318c 	ldr	r3, [pc, #396]	; 9e20 <.text+0x9e20>
-    9c90:	e5d33000 	ldrb	r3, [r3]
-    9c94:	e3530012 	cmp	r3, #18	; 0x12
-    9c98:	1a000008 	bne	9cc0 <parse_POSLLH+0x2d8>
-    9c9c:	e55b3010 	ldrb	r3, [fp, #-16]
-    9ca0:	e1a03803 	mov	r3, r3, lsl #16
-    9ca4:	e1a02003 	mov	r2, r3
-    9ca8:	e59f3180 	ldr	r3, [pc, #384]	; 9e30 <.text+0x9e30>
-    9cac:	e5933000 	ldr	r3, [r3]
-    9cb0:	e0822003 	add	r2, r2, r3
-    9cb4:	e59f3174 	ldr	r3, [pc, #372]	; 9e30 <.text+0x9e30>
-    9cb8:	e5832000 	str	r2, [r3]
-    9cbc:	ea00004e 	b	9dfc <parse_POSLLH+0x414>
-    9cc0:	e59f3158 	ldr	r3, [pc, #344]	; 9e20 <.text+0x9e20>
-    9cc4:	e5d33000 	ldrb	r3, [r3]
-    9cc8:	e3530013 	cmp	r3, #19	; 0x13
-    9ccc:	1a000008 	bne	9cf4 <parse_POSLLH+0x30c>
-    9cd0:	e55b3010 	ldrb	r3, [fp, #-16]
-    9cd4:	e1a03c03 	mov	r3, r3, lsl #24
-    9cd8:	e1a02003 	mov	r2, r3
-    9cdc:	e59f314c 	ldr	r3, [pc, #332]	; 9e30 <.text+0x9e30>
-    9ce0:	e5933000 	ldr	r3, [r3]
-    9ce4:	e0822003 	add	r2, r2, r3
-    9ce8:	e59f3140 	ldr	r3, [pc, #320]	; 9e30 <.text+0x9e30>
-    9cec:	e5832000 	str	r2, [r3]
-    9cf0:	ea000041 	b	9dfc <parse_POSLLH+0x414>
-    9cf4:	e59f3124 	ldr	r3, [pc, #292]	; 9e20 <.text+0x9e20>
-    9cf8:	e5d33000 	ldrb	r3, [r3]
-    9cfc:	e3530014 	cmp	r3, #20	; 0x14
-    9d00:	1a000003 	bne	9d14 <parse_POSLLH+0x32c>
-    9d04:	e55b2010 	ldrb	r2, [fp, #-16]
-    9d08:	e59f3124 	ldr	r3, [pc, #292]	; 9e34 <.text+0x9e34>
-    9d0c:	e5832000 	str	r2, [r3]
-    9d10:	ea000039 	b	9dfc <parse_POSLLH+0x414>
-    9d14:	e59f3104 	ldr	r3, [pc, #260]	; 9e20 <.text+0x9e20>
-    9d18:	e5d33000 	ldrb	r3, [r3]
-    9d1c:	e3530015 	cmp	r3, #21	; 0x15
-    9d20:	1a000008 	bne	9d48 <parse_POSLLH+0x360>
-    9d24:	e55b3010 	ldrb	r3, [fp, #-16]
-    9d28:	e1a03403 	mov	r3, r3, lsl #8
-    9d2c:	e1a02003 	mov	r2, r3
-    9d30:	e59f30fc 	ldr	r3, [pc, #252]	; 9e34 <.text+0x9e34>
-    9d34:	e5933000 	ldr	r3, [r3]
-    9d38:	e0822003 	add	r2, r2, r3
-    9d3c:	e59f30f0 	ldr	r3, [pc, #240]	; 9e34 <.text+0x9e34>
-    9d40:	e5832000 	str	r2, [r3]
-    9d44:	ea00002c 	b	9dfc <parse_POSLLH+0x414>
-    9d48:	e59f30d0 	ldr	r3, [pc, #208]	; 9e20 <.text+0x9e20>
-    9d4c:	e5d33000 	ldrb	r3, [r3]
-    9d50:	e3530016 	cmp	r3, #22	; 0x16
-    9d54:	1a000008 	bne	9d7c <parse_POSLLH+0x394>
-    9d58:	e55b3010 	ldrb	r3, [fp, #-16]
-    9d5c:	e1a03803 	mov	r3, r3, lsl #16
-    9d60:	e1a02003 	mov	r2, r3
-    9d64:	e59f30c8 	ldr	r3, [pc, #200]	; 9e34 <.text+0x9e34>
-    9d68:	e5933000 	ldr	r3, [r3]
-    9d6c:	e0822003 	add	r2, r2, r3
-    9d70:	e59f30bc 	ldr	r3, [pc, #188]	; 9e34 <.text+0x9e34>
-    9d74:	e5832000 	str	r2, [r3]
-    9d78:	ea00001f 	b	9dfc <parse_POSLLH+0x414>
-    9d7c:	e59f309c 	ldr	r3, [pc, #156]	; 9e20 <.text+0x9e20>
-    9d80:	e5d33000 	ldrb	r3, [r3]
-    9d84:	e3530017 	cmp	r3, #23	; 0x17
-    9d88:	1a00001b 	bne	9dfc <parse_POSLLH+0x414>
-    9d8c:	e55b3010 	ldrb	r3, [fp, #-16]
-    9d90:	e1a03c03 	mov	r3, r3, lsl #24
-    9d94:	e1a02003 	mov	r2, r3
-    9d98:	e59f3094 	ldr	r3, [pc, #148]	; 9e34 <.text+0x9e34>
-    9d9c:	e5933000 	ldr	r3, [r3]
-    9da0:	e0822003 	add	r2, r2, r3
-    9da4:	e59f3088 	ldr	r3, [pc, #136]	; 9e34 <.text+0x9e34>
-    9da8:	e5832000 	str	r2, [r3]
-    9dac:	e59f3074 	ldr	r3, [pc, #116]	; 9e28 <.text+0x9e28>
-    9db0:	e5932000 	ldr	r2, [r3]
-    9db4:	e59f307c 	ldr	r3, [pc, #124]	; 9e38 <.text+0x9e38>
-    9db8:	e5832000 	str	r2, [r3]
-    9dbc:	e59f3060 	ldr	r3, [pc, #96]	; 9e24 <.text+0x9e24>
-    9dc0:	e5932000 	ldr	r2, [r3]
-    9dc4:	e59f306c 	ldr	r3, [pc, #108]	; 9e38 <.text+0x9e38>
-    9dc8:	e5832004 	str	r2, [r3, #4]
-    9dcc:	e59f3058 	ldr	r3, [pc, #88]	; 9e2c <.text+0x9e2c>
-    9dd0:	e5932000 	ldr	r2, [r3]
-    9dd4:	e59f305c 	ldr	r3, [pc, #92]	; 9e38 <.text+0x9e38>
-    9dd8:	e5832008 	str	r2, [r3, #8]
-    9ddc:	e59f304c 	ldr	r3, [pc, #76]	; 9e30 <.text+0x9e30>
-    9de0:	e5932000 	ldr	r2, [r3]
-    9de4:	e59f304c 	ldr	r3, [pc, #76]	; 9e38 <.text+0x9e38>
-    9de8:	e5832018 	str	r2, [r3, #24]
-    9dec:	e59f3040 	ldr	r3, [pc, #64]	; 9e34 <.text+0x9e34>
-    9df0:	e5932000 	ldr	r2, [r3]
-    9df4:	e59f303c 	ldr	r3, [pc, #60]	; 9e38 <.text+0x9e38>
-    9df8:	e583201c 	str	r2, [r3, #28]
-    9dfc:	e59f301c 	ldr	r3, [pc, #28]	; 9e20 <.text+0x9e20>
-    9e00:	e5d33000 	ldrb	r3, [r3]
-    9e04:	e2833001 	add	r3, r3, #1	; 0x1
-    9e08:	e20330ff 	and	r3, r3, #255	; 0xff
-    9e0c:	e59f200c 	ldr	r2, [pc, #12]	; 9e20 <.text+0x9e20>
-    9e10:	e5c23000 	strb	r3, [r2]
-    9e14:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    9e18:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    9e1c:	e12fff1e 	bx	lr
-    9e20:	40000914 	andmi	r0, r0, r4, lsl r9
-    9e24:	4000090c 	andmi	r0, r0, ip, lsl #18
-    9e28:	40000910 	andmi	r0, r0, r0, lsl r9
-    9e2c:	40000908 	andmi	r0, r0, r8, lsl #18
-    9e30:	40000904 	andmi	r0, r0, r4, lsl #18
-    9e34:	40000900 	andmi	r0, r0, r0, lsl #18
-    9e38:	40000e94 	mulmi	r0, r4, lr
-
-00009e3c <parse_POSUTM>:
-    9e3c:	e1a0c00d 	mov	ip, sp
-    9e40:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    9e44:	e24cb004 	sub	fp, ip, #4	; 0x4
-    9e48:	e24dd008 	sub	sp, sp, #8	; 0x8
-    9e4c:	e1a03000 	mov	r3, r0
-    9e50:	e1a02001 	mov	r2, r1
-    9e54:	e54b3010 	strb	r3, [fp, #-16]
-    9e58:	e1a03002 	mov	r3, r2
-    9e5c:	e54b3014 	strb	r3, [fp, #-20]
-    9e60:	e55b3014 	ldrb	r3, [fp, #-20]
-    9e64:	e3530000 	cmp	r3, #0	; 0x0
-    9e68:	0a000003 	beq	9e7c <parse_POSUTM+0x40>
-    9e6c:	e59f3188 	ldr	r3, [pc, #392]	; 9ffc <.text+0x9ffc>
-    9e70:	e3a02000 	mov	r2, #0	; 0x0
-    9e74:	e5c32000 	strb	r2, [r3]
-    9e78:	ea00005c 	b	9ff0 <parse_POSUTM+0x1b4>
-    9e7c:	e59f3178 	ldr	r3, [pc, #376]	; 9ffc <.text+0x9ffc>
-    9e80:	e5d33000 	ldrb	r3, [r3]
-    9e84:	e3530000 	cmp	r3, #0	; 0x0
-    9e88:	1a000003 	bne	9e9c <parse_POSUTM+0x60>
-    9e8c:	e55b2010 	ldrb	r2, [fp, #-16]
-    9e90:	e59f3168 	ldr	r3, [pc, #360]	; a000 <.text+0xa000>
-    9e94:	e5832000 	str	r2, [r3]
-    9e98:	ea00004e 	b	9fd8 <parse_POSUTM+0x19c>
-    9e9c:	e59f3158 	ldr	r3, [pc, #344]	; 9ffc <.text+0x9ffc>
-    9ea0:	e5d33000 	ldrb	r3, [r3]
-    9ea4:	e3530001 	cmp	r3, #1	; 0x1
-    9ea8:	1a000007 	bne	9ecc <parse_POSUTM+0x90>
-    9eac:	e55b3010 	ldrb	r3, [fp, #-16]
-    9eb0:	e1a02403 	mov	r2, r3, lsl #8
-    9eb4:	e59f3144 	ldr	r3, [pc, #324]	; a000 <.text+0xa000>
-    9eb8:	e5933000 	ldr	r3, [r3]
-    9ebc:	e0822003 	add	r2, r2, r3
-    9ec0:	e59f3138 	ldr	r3, [pc, #312]	; a000 <.text+0xa000>
-    9ec4:	e5832000 	str	r2, [r3]
-    9ec8:	ea000042 	b	9fd8 <parse_POSUTM+0x19c>
-    9ecc:	e59f3128 	ldr	r3, [pc, #296]	; 9ffc <.text+0x9ffc>
-    9ed0:	e5d33000 	ldrb	r3, [r3]
-    9ed4:	e3530002 	cmp	r3, #2	; 0x2
-    9ed8:	1a000007 	bne	9efc <parse_POSUTM+0xc0>
-    9edc:	e55b3010 	ldrb	r3, [fp, #-16]
-    9ee0:	e1a02803 	mov	r2, r3, lsl #16
-    9ee4:	e59f3114 	ldr	r3, [pc, #276]	; a000 <.text+0xa000>
-    9ee8:	e5933000 	ldr	r3, [r3]
-    9eec:	e0822003 	add	r2, r2, r3
-    9ef0:	e59f3108 	ldr	r3, [pc, #264]	; a000 <.text+0xa000>
-    9ef4:	e5832000 	str	r2, [r3]
-    9ef8:	ea000036 	b	9fd8 <parse_POSUTM+0x19c>
-    9efc:	e59f30f8 	ldr	r3, [pc, #248]	; 9ffc <.text+0x9ffc>
-    9f00:	e5d33000 	ldrb	r3, [r3]
-    9f04:	e3530003 	cmp	r3, #3	; 0x3
-    9f08:	1a000007 	bne	9f2c <parse_POSUTM+0xf0>
-    9f0c:	e55b3010 	ldrb	r3, [fp, #-16]
-    9f10:	e1a02c03 	mov	r2, r3, lsl #24
-    9f14:	e59f30e4 	ldr	r3, [pc, #228]	; a000 <.text+0xa000>
-    9f18:	e5933000 	ldr	r3, [r3]
-    9f1c:	e0822003 	add	r2, r2, r3
-    9f20:	e59f30d8 	ldr	r3, [pc, #216]	; a000 <.text+0xa000>
-    9f24:	e5832000 	str	r2, [r3]
-    9f28:	ea00002a 	b	9fd8 <parse_POSUTM+0x19c>
-    9f2c:	e59f30c8 	ldr	r3, [pc, #200]	; 9ffc <.text+0x9ffc>
-    9f30:	e5d33000 	ldrb	r3, [r3]
-    9f34:	e3530004 	cmp	r3, #4	; 0x4
-    9f38:	1a000003 	bne	9f4c <parse_POSUTM+0x110>
-    9f3c:	e55b2010 	ldrb	r2, [fp, #-16]
-    9f40:	e59f30bc 	ldr	r3, [pc, #188]	; a004 <.text+0xa004>
-    9f44:	e5832000 	str	r2, [r3]
-    9f48:	ea000022 	b	9fd8 <parse_POSUTM+0x19c>
-    9f4c:	e59f30a8 	ldr	r3, [pc, #168]	; 9ffc <.text+0x9ffc>
-    9f50:	e5d33000 	ldrb	r3, [r3]
-    9f54:	e3530005 	cmp	r3, #5	; 0x5
-    9f58:	1a000007 	bne	9f7c <parse_POSUTM+0x140>
-    9f5c:	e55b3010 	ldrb	r3, [fp, #-16]
-    9f60:	e1a02403 	mov	r2, r3, lsl #8
-    9f64:	e59f3098 	ldr	r3, [pc, #152]	; a004 <.text+0xa004>
-    9f68:	e5933000 	ldr	r3, [r3]
-    9f6c:	e0822003 	add	r2, r2, r3
-    9f70:	e59f308c 	ldr	r3, [pc, #140]	; a004 <.text+0xa004>
-    9f74:	e5832000 	str	r2, [r3]
-    9f78:	ea000016 	b	9fd8 <parse_POSUTM+0x19c>
-    9f7c:	e59f3078 	ldr	r3, [pc, #120]	; 9ffc <.text+0x9ffc>
-    9f80:	e5d33000 	ldrb	r3, [r3]
-    9f84:	e3530006 	cmp	r3, #6	; 0x6
-    9f88:	1a000007 	bne	9fac <parse_POSUTM+0x170>
-    9f8c:	e55b3010 	ldrb	r3, [fp, #-16]
-    9f90:	e1a02803 	mov	r2, r3, lsl #16
-    9f94:	e59f3068 	ldr	r3, [pc, #104]	; a004 <.text+0xa004>
-    9f98:	e5933000 	ldr	r3, [r3]
-    9f9c:	e0822003 	add	r2, r2, r3
-    9fa0:	e59f305c 	ldr	r3, [pc, #92]	; a004 <.text+0xa004>
-    9fa4:	e5832000 	str	r2, [r3]
-    9fa8:	ea00000a 	b	9fd8 <parse_POSUTM+0x19c>
-    9fac:	e59f3048 	ldr	r3, [pc, #72]	; 9ffc <.text+0x9ffc>
-    9fb0:	e5d33000 	ldrb	r3, [r3]
-    9fb4:	e3530007 	cmp	r3, #7	; 0x7
-    9fb8:	1a000006 	bne	9fd8 <parse_POSUTM+0x19c>
-    9fbc:	e55b3010 	ldrb	r3, [fp, #-16]
-    9fc0:	e1a02c03 	mov	r2, r3, lsl #24
-    9fc4:	e59f3038 	ldr	r3, [pc, #56]	; a004 <.text+0xa004>
-    9fc8:	e5933000 	ldr	r3, [r3]
-    9fcc:	e0822003 	add	r2, r2, r3
-    9fd0:	e59f302c 	ldr	r3, [pc, #44]	; a004 <.text+0xa004>
-    9fd4:	e5832000 	str	r2, [r3]
-    9fd8:	e59f301c 	ldr	r3, [pc, #28]	; 9ffc <.text+0x9ffc>
-    9fdc:	e5d33000 	ldrb	r3, [r3]
-    9fe0:	e2833001 	add	r3, r3, #1	; 0x1
-    9fe4:	e20330ff 	and	r3, r3, #255	; 0xff
-    9fe8:	e59f200c 	ldr	r2, [pc, #12]	; 9ffc <.text+0x9ffc>
-    9fec:	e5c23000 	strb	r3, [r2]
-    9ff0:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    9ff4:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    9ff8:	e12fff1e 	bx	lr
-    9ffc:	40000920 	andmi	r0, r0, r0, lsr #18
-    a000:	4000091c 	andmi	r0, r0, ip, lsl r9
-    a004:	40000918 	andmi	r0, r0, r8, lsl r9
-
-0000a008 <parse_NAVSOL>:
-    a008:	e1a0c00d 	mov	ip, sp
-    a00c:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    a010:	e24cb004 	sub	fp, ip, #4	; 0x4
-    a014:	e24dd008 	sub	sp, sp, #8	; 0x8
-    a018:	e1a03000 	mov	r3, r0
-    a01c:	e1a02001 	mov	r2, r1
-    a020:	e54b3010 	strb	r3, [fp, #-16]
-    a024:	e1a03002 	mov	r3, r2
-    a028:	e54b3014 	strb	r3, [fp, #-20]
-    a02c:	e55b3014 	ldrb	r3, [fp, #-20]
-    a030:	e3530000 	cmp	r3, #0	; 0x0
-    a034:	0a000003 	beq	a048 <parse_NAVSOL+0x40>
-    a038:	e59f3184 	ldr	r3, [pc, #388]	; a1c4 <.text+0xa1c4>
-    a03c:	e3a02000 	mov	r2, #0	; 0x0
-    a040:	e5c32000 	strb	r2, [r3]
-    a044:	ea00005b 	b	a1b8 <parse_NAVSOL+0x1b0>
-    a048:	e59f3174 	ldr	r3, [pc, #372]	; a1c4 <.text+0xa1c4>
-    a04c:	e5d33000 	ldrb	r3, [r3]
-    a050:	e3530000 	cmp	r3, #0	; 0x0
-    a054:	1a000003 	bne	a068 <parse_NAVSOL+0x60>
-    a058:	e55b2010 	ldrb	r2, [fp, #-16]
-    a05c:	e59f3164 	ldr	r3, [pc, #356]	; a1c8 <.text+0xa1c8>
-    a060:	e5832000 	str	r2, [r3]
-    a064:	ea00004d 	b	a1a0 <parse_NAVSOL+0x198>
-    a068:	e59f3154 	ldr	r3, [pc, #340]	; a1c4 <.text+0xa1c4>
-    a06c:	e5d33000 	ldrb	r3, [r3]
-    a070:	e3530001 	cmp	r3, #1	; 0x1
-    a074:	1a000008 	bne	a09c <parse_NAVSOL+0x94>
-    a078:	e55b3010 	ldrb	r3, [fp, #-16]
-    a07c:	e1a03403 	mov	r3, r3, lsl #8
-    a080:	e1a02003 	mov	r2, r3
-    a084:	e59f313c 	ldr	r3, [pc, #316]	; a1c8 <.text+0xa1c8>
-    a088:	e5933000 	ldr	r3, [r3]
-    a08c:	e0822003 	add	r2, r2, r3
-    a090:	e59f3130 	ldr	r3, [pc, #304]	; a1c8 <.text+0xa1c8>
-    a094:	e5832000 	str	r2, [r3]
-    a098:	ea000040 	b	a1a0 <parse_NAVSOL+0x198>
-    a09c:	e59f3120 	ldr	r3, [pc, #288]	; a1c4 <.text+0xa1c4>
-    a0a0:	e5d33000 	ldrb	r3, [r3]
-    a0a4:	e3530002 	cmp	r3, #2	; 0x2
-    a0a8:	1a000008 	bne	a0d0 <parse_NAVSOL+0xc8>
-    a0ac:	e55b3010 	ldrb	r3, [fp, #-16]
-    a0b0:	e1a03803 	mov	r3, r3, lsl #16
-    a0b4:	e1a02003 	mov	r2, r3
-    a0b8:	e59f3108 	ldr	r3, [pc, #264]	; a1c8 <.text+0xa1c8>
-    a0bc:	e5933000 	ldr	r3, [r3]
-    a0c0:	e0822003 	add	r2, r2, r3
-    a0c4:	e59f30fc 	ldr	r3, [pc, #252]	; a1c8 <.text+0xa1c8>
-    a0c8:	e5832000 	str	r2, [r3]
-    a0cc:	ea000033 	b	a1a0 <parse_NAVSOL+0x198>
-    a0d0:	e59f30ec 	ldr	r3, [pc, #236]	; a1c4 <.text+0xa1c4>
-    a0d4:	e5d33000 	ldrb	r3, [r3]
-    a0d8:	e3530003 	cmp	r3, #3	; 0x3
-    a0dc:	1a000008 	bne	a104 <parse_NAVSOL+0xfc>
-    a0e0:	e55b3010 	ldrb	r3, [fp, #-16]
-    a0e4:	e1a03c03 	mov	r3, r3, lsl #24
-    a0e8:	e1a02003 	mov	r2, r3
-    a0ec:	e59f30d4 	ldr	r3, [pc, #212]	; a1c8 <.text+0xa1c8>
-    a0f0:	e5933000 	ldr	r3, [r3]
-    a0f4:	e0822003 	add	r2, r2, r3
-    a0f8:	e59f30c8 	ldr	r3, [pc, #200]	; a1c8 <.text+0xa1c8>
-    a0fc:	e5832000 	str	r2, [r3]
-    a100:	ea000026 	b	a1a0 <parse_NAVSOL+0x198>
-    a104:	e59f30b8 	ldr	r3, [pc, #184]	; a1c4 <.text+0xa1c4>
-    a108:	e5d33000 	ldrb	r3, [r3]
-    a10c:	e3530008 	cmp	r3, #8	; 0x8
-    a110:	1a000003 	bne	a124 <parse_NAVSOL+0x11c>
-    a114:	e55b2010 	ldrb	r2, [fp, #-16]
-    a118:	e59f30ac 	ldr	r3, [pc, #172]	; a1cc <.text+0xa1cc>
-    a11c:	e1c320b0 	strh	r2, [r3]
-    a120:	ea00001e 	b	a1a0 <parse_NAVSOL+0x198>
-    a124:	e59f3098 	ldr	r3, [pc, #152]	; a1c4 <.text+0xa1c4>
-    a128:	e5d33000 	ldrb	r3, [r3]
-    a12c:	e3530009 	cmp	r3, #9	; 0x9
-    a130:	1a000013 	bne	a184 <parse_NAVSOL+0x17c>
-    a134:	e55b3010 	ldrb	r3, [fp, #-16]
-    a138:	e1a03403 	mov	r3, r3, lsl #8
-    a13c:	e1a03803 	mov	r3, r3, lsl #16
-    a140:	e1a02823 	mov	r2, r3, lsr #16
-    a144:	e59f3080 	ldr	r3, [pc, #128]	; a1cc <.text+0xa1cc>
-    a148:	e1d330b0 	ldrh	r3, [r3]
-    a14c:	e0823003 	add	r3, r2, r3
-    a150:	e1a03803 	mov	r3, r3, lsl #16
-    a154:	e1a02823 	mov	r2, r3, lsr #16
-    a158:	e59f306c 	ldr	r3, [pc, #108]	; a1cc <.text+0xa1cc>
-    a15c:	e1c320b0 	strh	r2, [r3]
-    a160:	e59f3060 	ldr	r3, [pc, #96]	; a1c8 <.text+0xa1c8>
-    a164:	e5932000 	ldr	r2, [r3]
-    a168:	e59f3060 	ldr	r3, [pc, #96]	; a1d0 <.text+0xa1d0>
-    a16c:	e5832000 	str	r2, [r3]
-    a170:	e59f3054 	ldr	r3, [pc, #84]	; a1cc <.text+0xa1cc>
-    a174:	e1d320b0 	ldrh	r2, [r3]
-    a178:	e59f3050 	ldr	r3, [pc, #80]	; a1d0 <.text+0xa1d0>
-    a17c:	e1c320b4 	strh	r2, [r3, #4]
-    a180:	ea000006 	b	a1a0 <parse_NAVSOL+0x198>
-    a184:	e59f3038 	ldr	r3, [pc, #56]	; a1c4 <.text+0xa1c4>
-    a188:	e5d33000 	ldrb	r3, [r3]
-    a18c:	e353002f 	cmp	r3, #47	; 0x2f
-    a190:	1a000002 	bne	a1a0 <parse_NAVSOL+0x198>
-    a194:	e55b2010 	ldrb	r2, [fp, #-16]
-    a198:	e59f3034 	ldr	r3, [pc, #52]	; a1d4 <.text+0xa1d4>
-    a19c:	e5832024 	str	r2, [r3, #36]
-    a1a0:	e59f301c 	ldr	r3, [pc, #28]	; a1c4 <.text+0xa1c4>
-    a1a4:	e5d33000 	ldrb	r3, [r3]
-    a1a8:	e2833001 	add	r3, r3, #1	; 0x1
-    a1ac:	e20330ff 	and	r3, r3, #255	; 0xff
-    a1b0:	e59f200c 	ldr	r2, [pc, #12]	; a1c4 <.text+0xa1c4>
-    a1b4:	e5c23000 	strb	r3, [r2]
-    a1b8:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    a1bc:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    a1c0:	e12fff1e 	bx	lr
-    a1c4:	40000928 	andmi	r0, r0, r8, lsr #18
-    a1c8:	40000924 	andmi	r0, r0, r4, lsr #18
-    a1cc:	40000922 	andmi	r0, r0, r2, lsr #18
-    a1d0:	40001304 	andmi	r1, r0, r4, lsl #6
-    a1d4:	40000e94 	mulmi	r0, r4, lr
-
-0000a1d8 <parse_STATUS>:
-    a1d8:	e1a0c00d 	mov	ip, sp
-    a1dc:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    a1e0:	e24cb004 	sub	fp, ip, #4	; 0x4
-    a1e4:	e24dd008 	sub	sp, sp, #8	; 0x8
-    a1e8:	e1a03000 	mov	r3, r0
-    a1ec:	e1a02001 	mov	r2, r1
-    a1f0:	e54b3010 	strb	r3, [fp, #-16]
-    a1f4:	e1a03002 	mov	r3, r2
-    a1f8:	e54b3014 	strb	r3, [fp, #-20]
-    a1fc:	e55b3014 	ldrb	r3, [fp, #-20]
-    a200:	e3530000 	cmp	r3, #0	; 0x0
-    a204:	0a000003 	beq	a218 <parse_STATUS+0x40>
-    a208:	e59f30bc 	ldr	r3, [pc, #188]	; a2cc <.text+0xa2cc>
-    a20c:	e3a02000 	mov	r2, #0	; 0x0
-    a210:	e5c32000 	strb	r2, [r3]
-    a214:	ea000029 	b	a2c0 <parse_STATUS+0xe8>
-    a218:	e59f30ac 	ldr	r3, [pc, #172]	; a2cc <.text+0xa2cc>
-    a21c:	e5d33000 	ldrb	r3, [r3]
-    a220:	e3530000 	cmp	r3, #0	; 0x0
-    a224:	1a000003 	bne	a238 <parse_STATUS+0x60>
-    a228:	e59f20a0 	ldr	r2, [pc, #160]	; a2d0 <.text+0xa2d0>
-    a22c:	e55b3010 	ldrb	r3, [fp, #-16]
-    a230:	e5c23000 	strb	r3, [r2]
-    a234:	ea00001b 	b	a2a8 <parse_STATUS+0xd0>
-    a238:	e59f308c 	ldr	r3, [pc, #140]	; a2cc <.text+0xa2cc>
-    a23c:	e5d33000 	ldrb	r3, [r3]
-    a240:	e3530001 	cmp	r3, #1	; 0x1
-    a244:	1a000003 	bne	a258 <parse_STATUS+0x80>
-    a248:	e59f2084 	ldr	r2, [pc, #132]	; a2d4 <.text+0xa2d4>
-    a24c:	e55b3010 	ldrb	r3, [fp, #-16]
-    a250:	e5c23000 	strb	r3, [r2]
-    a254:	ea000013 	b	a2a8 <parse_STATUS+0xd0>
-    a258:	e59f306c 	ldr	r3, [pc, #108]	; a2cc <.text+0xa2cc>
-    a25c:	e5d33000 	ldrb	r3, [r3]
-    a260:	e3530002 	cmp	r3, #2	; 0x2
-    a264:	1a00000f 	bne	a2a8 <parse_STATUS+0xd0>
-    a268:	e59f2068 	ldr	r2, [pc, #104]	; a2d8 <.text+0xa2d8>
-    a26c:	e55b3010 	ldrb	r3, [fp, #-16]
-    a270:	e5c23000 	strb	r3, [r2]
-    a274:	e59f3054 	ldr	r3, [pc, #84]	; a2d0 <.text+0xa2d0>
-    a278:	e5d33000 	ldrb	r3, [r3]
-    a27c:	e1a02003 	mov	r2, r3
-    a280:	e59f304c 	ldr	r3, [pc, #76]	; a2d4 <.text+0xa2d4>
-    a284:	e5d33000 	ldrb	r3, [r3]
-    a288:	e1a03403 	mov	r3, r3, lsl #8
-    a28c:	e1822003 	orr	r2, r2, r3
-    a290:	e59f3040 	ldr	r3, [pc, #64]	; a2d8 <.text+0xa2d8>
-    a294:	e5d33000 	ldrb	r3, [r3]
-    a298:	e1a03803 	mov	r3, r3, lsl #16
-    a29c:	e1822003 	orr	r2, r2, r3
-    a2a0:	e59f3034 	ldr	r3, [pc, #52]	; a2dc <.text+0xa2dc>
-    a2a4:	e5832028 	str	r2, [r3, #40]
-    a2a8:	e59f301c 	ldr	r3, [pc, #28]	; a2cc <.text+0xa2cc>
-    a2ac:	e5d33000 	ldrb	r3, [r3]
-    a2b0:	e2833001 	add	r3, r3, #1	; 0x1
-    a2b4:	e20330ff 	and	r3, r3, #255	; 0xff
-    a2b8:	e59f200c 	ldr	r2, [pc, #12]	; a2cc <.text+0xa2cc>
-    a2bc:	e5c23000 	strb	r3, [r2]
-    a2c0:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    a2c4:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    a2c8:	e12fff1e 	bx	lr
-    a2cc:	4000092c 	andmi	r0, r0, ip, lsr #18
-    a2d0:	4000092b 	andmi	r0, r0, fp, lsr #18
-    a2d4:	4000092a 	andmi	r0, r0, sl, lsr #18
-    a2d8:	40000929 	andmi	r0, r0, r9, lsr #18
-    a2dc:	40000e94 	mulmi	r0, r4, lr
-
-0000a2e0 <uart1ISR>:
-    a2e0:	e1a0c00d 	mov	ip, sp
-    a2e4:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    a2e8:	e24cb004 	sub	fp, ip, #4	; 0x4
-    a2ec:	e24dd00c 	sub	sp, sp, #12	; 0xc
-    a2f0:	e3a0328e 	mov	r3, #-536870904	; 0xe0000008
-    a2f4:	e2833801 	add	r3, r3, #65536	; 0x10000
-    a2f8:	e5933000 	ldr	r3, [r3]
-    a2fc:	e50b3010 	str	r3, [fp, #-16]
-    a300:	e51b3010 	ldr	r3, [fp, #-16]
-    a304:	e1a030a3 	mov	r3, r3, lsr #1
-    a308:	e2033007 	and	r3, r3, #7	; 0x7
-    a30c:	e50b3018 	str	r3, [fp, #-24]
-    a310:	e51b3018 	ldr	r3, [fp, #-24]
-    a314:	e3530001 	cmp	r3, #1	; 0x1
-    a318:	0a000003 	beq	a32c <uart1ISR+0x4c>
-    a31c:	e51b3018 	ldr	r3, [fp, #-24]
-    a320:	e3530002 	cmp	r3, #2	; 0x2
-    a324:	0a00001d 	beq	a3a0 <uart1ISR+0xc0>
-    a328:	ea000132 	b	a7f8 <.text+0xa7f8>
-    a32c:	e24b3012 	sub	r3, fp, #18	; 0x12
-    a330:	e3a00000 	mov	r0, #0	; 0x0
-    a334:	e1a01003 	mov	r1, r3
-    a338:	e3a02001 	mov	r2, #1	; 0x1
-    a33c:	eb0001cb 	bl	aa70 <ringbuffer1>
-    a340:	e1a03000 	mov	r3, r0
-    a344:	e3530000 	cmp	r3, #0	; 0x0
-    a348:	0a000006 	beq	a368 <uart1ISR+0x88>
-    a34c:	e59f24c0 	ldr	r2, [pc, #1216]	; a814 <.text+0xa814>
-    a350:	e3a03001 	mov	r3, #1	; 0x1
-    a354:	e5c23000 	strb	r3, [r2]
-    a358:	e55b3012 	ldrb	r3, [fp, #-18]
-    a35c:	e1a00003 	mov	r0, r3
-    a360:	eb00015d 	bl	a8dc <UART1WriteChar>
-    a364:	ea000123 	b	a7f8 <.text+0xa7f8>
-    a368:	e59f24a4 	ldr	r2, [pc, #1188]	; a814 <.text+0xa814>
-    a36c:	e3a03000 	mov	r3, #0	; 0x0
-    a370:	e5c23000 	strb	r3, [r2]
-    a374:	e59f349c 	ldr	r3, [pc, #1180]	; a818 <.text+0xa818>
-    a378:	e5d33000 	ldrb	r3, [r3]
-    a37c:	e20330ff 	and	r3, r3, #255	; 0xff
-    a380:	e3530000 	cmp	r3, #0	; 0x0
-    a384:	0a00011b 	beq	a7f8 <.text+0xa7f8>
-    a388:	e3a00ce1 	mov	r0, #57600	; 0xe100
-    a38c:	eb000127 	bl	a830 <UART1Initialize>
-    a390:	e59f3480 	ldr	r3, [pc, #1152]	; a818 <.text+0xa818>
-    a394:	e3a02000 	mov	r2, #0	; 0x0
-    a398:	e5c32000 	strb	r2, [r3]
-    a39c:	ea000115 	b	a7f8 <.text+0xa7f8>
-    a3a0:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    a3a4:	e2833801 	add	r3, r3, #65536	; 0x10000
-    a3a8:	e5933000 	ldr	r3, [r3]
-    a3ac:	e54b3011 	strb	r3, [fp, #-17]
-    a3b0:	e59f3464 	ldr	r3, [pc, #1124]	; a81c <.text+0xa81c>
-    a3b4:	e5d33000 	ldrb	r3, [r3]
-    a3b8:	e353000e 	cmp	r3, #14	; 0xe
-    a3bc:	979ff103 	ldrls	pc, [pc, r3, lsl #2]
-    a3c0:	ea000109 	b	a7ec <.text+0xa7ec>
-    a3c4:	0000a400 	andeq	sl, r0, r0, lsl #8
-    a3c8:	0000a41c 	andeq	sl, r0, ip, lsl r4
-    a3cc:	0000a448 	andeq	sl, r0, r8, asr #8
-    a3d0:	0000a490 	muleq	r0, r0, r4
-    a3d4:	0000a4b8 	streqh	sl, [r0], -r8
-    a3d8:	0000a538 	andeq	sl, r0, r8, lsr r5
-    a3dc:	0000a5fc 	streqd	sl, [r0], -ip
-    a3e0:	0000a7ec 	andeq	sl, r0, ip, ror #15
-    a3e4:	0000a7ec 	andeq	sl, r0, ip, ror #15
-    a3e8:	0000a7ec 	andeq	sl, r0, ip, ror #15
-    a3ec:	0000a6e4 	andeq	sl, r0, r4, ror #13
-    a3f0:	0000a71c 	andeq	sl, r0, ip, lsl r7
-    a3f4:	0000a780 	andeq	sl, r0, r0, lsl #15
-    a3f8:	0000a7ac 	andeq	sl, r0, ip, lsr #15
-    a3fc:	0000a7bc 	streqh	sl, [r0], -ip
-    a400:	e55b3011 	ldrb	r3, [fp, #-17]
-    a404:	e35300b5 	cmp	r3, #181	; 0xb5
-    a408:	1a0000fa 	bne	a7f8 <.text+0xa7f8>
-    a40c:	e59f3408 	ldr	r3, [pc, #1032]	; a81c <.text+0xa81c>
-    a410:	e3a02001 	mov	r2, #1	; 0x1
-    a414:	e5c32000 	strb	r2, [r3]
-    a418:	ea0000f6 	b	a7f8 <.text+0xa7f8>
-    a41c:	e55b3011 	ldrb	r3, [fp, #-17]
-    a420:	e3530062 	cmp	r3, #98	; 0x62
-    a424:	1a000003 	bne	a438 <.text+0xa438>
-    a428:	e59f33ec 	ldr	r3, [pc, #1004]	; a81c <.text+0xa81c>
-    a42c:	e3a02002 	mov	r2, #2	; 0x2
-    a430:	e5c32000 	strb	r2, [r3]
-    a434:	ea0000ef 	b	a7f8 <.text+0xa7f8>
-    a438:	e59f33dc 	ldr	r3, [pc, #988]	; a81c <.text+0xa81c>
-    a43c:	e3a02000 	mov	r2, #0	; 0x0
-    a440:	e5c32000 	strb	r2, [r3]
-    a444:	ea0000eb 	b	a7f8 <.text+0xa7f8>
-    a448:	e55b3011 	ldrb	r3, [fp, #-17]
-    a44c:	e3530001 	cmp	r3, #1	; 0x1
-    a450:	1a000003 	bne	a464 <.text+0xa464>
-    a454:	e59f33c0 	ldr	r3, [pc, #960]	; a81c <.text+0xa81c>
-    a458:	e3a02003 	mov	r2, #3	; 0x3
-    a45c:	e5c32000 	strb	r2, [r3]
-    a460:	ea0000e4 	b	a7f8 <.text+0xa7f8>
-    a464:	e55b3011 	ldrb	r3, [fp, #-17]
-    a468:	e3530005 	cmp	r3, #5	; 0x5
-    a46c:	1a000003 	bne	a480 <.text+0xa480>
-    a470:	e59f33a4 	ldr	r3, [pc, #932]	; a81c <.text+0xa81c>
-    a474:	e3a0200a 	mov	r2, #10	; 0xa
-    a478:	e5c32000 	strb	r2, [r3]
-    a47c:	ea0000dd 	b	a7f8 <.text+0xa7f8>
-    a480:	e59f3394 	ldr	r3, [pc, #916]	; a81c <.text+0xa81c>
-    a484:	e3a02000 	mov	r2, #0	; 0x0
-    a488:	e5c32000 	strb	r2, [r3]
-    a48c:	ea0000d9 	b	a7f8 <.text+0xa7f8>
-    a490:	e59f2388 	ldr	r2, [pc, #904]	; a820 <.text+0xa820>
-    a494:	e55b3011 	ldrb	r3, [fp, #-17]
-    a498:	e5c23000 	strb	r3, [r2]
-    a49c:	e59f2380 	ldr	r2, [pc, #896]	; a824 <.text+0xa824>
-    a4a0:	e3a03000 	mov	r3, #0	; 0x0
-    a4a4:	e1c230b0 	strh	r3, [r2]
-    a4a8:	e59f236c 	ldr	r2, [pc, #876]	; a81c <.text+0xa81c>
-    a4ac:	e3a03004 	mov	r3, #4	; 0x4
-    a4b0:	e5c23000 	strb	r3, [r2]
-    a4b4:	ea0000cf 	b	a7f8 <.text+0xa7f8>
-    a4b8:	e59f3364 	ldr	r3, [pc, #868]	; a824 <.text+0xa824>
-    a4bc:	e1d330b0 	ldrh	r3, [r3]
-    a4c0:	e3530000 	cmp	r3, #0	; 0x0
-    a4c4:	1a000002 	bne	a4d4 <.text+0xa4d4>
-    a4c8:	e55b2011 	ldrb	r2, [fp, #-17]
-    a4cc:	e59f3354 	ldr	r3, [pc, #852]	; a828 <.text+0xa828>
-    a4d0:	e1c320b0 	strh	r2, [r3]
-    a4d4:	e59f3344 	ldr	r3, [pc, #836]	; a820 <.text+0xa820>
-    a4d8:	e5d33000 	ldrb	r3, [r3]
-    a4dc:	e3530006 	cmp	r3, #6	; 0x6
-    a4e0:	1a000002 	bne	a4f0 <.text+0xa4f0>
-    a4e4:	e3a00000 	mov	r0, #0	; 0x0
-    a4e8:	e3a01001 	mov	r1, #1	; 0x1
-    a4ec:	ebfffec5 	bl	a008 <parse_NAVSOL>
-    a4f0:	e59f332c 	ldr	r3, [pc, #812]	; a824 <.text+0xa824>
-    a4f4:	e1d330b0 	ldrh	r3, [r3]
-    a4f8:	e2833001 	add	r3, r3, #1	; 0x1
-    a4fc:	e1a03803 	mov	r3, r3, lsl #16
-    a500:	e1a02823 	mov	r2, r3, lsr #16
-    a504:	e59f3318 	ldr	r3, [pc, #792]	; a824 <.text+0xa824>
-    a508:	e1c320b0 	strh	r2, [r3]
-    a50c:	e59f3310 	ldr	r3, [pc, #784]	; a824 <.text+0xa824>
-    a510:	e1d330b0 	ldrh	r3, [r3]
-    a514:	e3530002 	cmp	r3, #2	; 0x2
-    a518:	1a0000b6 	bne	a7f8 <.text+0xa7f8>
-    a51c:	e59f2300 	ldr	r2, [pc, #768]	; a824 <.text+0xa824>
-    a520:	e3a03000 	mov	r3, #0	; 0x0
-    a524:	e1c230b0 	strh	r3, [r2]
-    a528:	e59f22ec 	ldr	r2, [pc, #748]	; a81c <.text+0xa81c>
-    a52c:	e3a03005 	mov	r3, #5	; 0x5
-    a530:	e5c23000 	strb	r3, [r2]
-    a534:	ea0000af 	b	a7f8 <.text+0xa7f8>
-    a538:	e59f32e0 	ldr	r3, [pc, #736]	; a820 <.text+0xa820>
-    a53c:	e5d33000 	ldrb	r3, [r3]
-    a540:	e3530006 	cmp	r3, #6	; 0x6
-    a544:	1a000003 	bne	a558 <.text+0xa558>
-    a548:	e55b3011 	ldrb	r3, [fp, #-17]
-    a54c:	e1a00003 	mov	r0, r3
-    a550:	e3a01000 	mov	r1, #0	; 0x0
-    a554:	ebfffeab 	bl	a008 <parse_NAVSOL>
-    a558:	e59f32c4 	ldr	r3, [pc, #708]	; a824 <.text+0xa824>
-    a55c:	e1d330b0 	ldrh	r3, [r3]
-    a560:	e2833001 	add	r3, r3, #1	; 0x1
-    a564:	e1a03803 	mov	r3, r3, lsl #16
-    a568:	e1a02823 	mov	r2, r3, lsr #16
-    a56c:	e59f32b0 	ldr	r3, [pc, #688]	; a824 <.text+0xa824>
-    a570:	e1c320b0 	strh	r2, [r3]
-    a574:	e59f32a8 	ldr	r3, [pc, #680]	; a824 <.text+0xa824>
-    a578:	e1d330b0 	ldrh	r3, [r3]
-    a57c:	e3530004 	cmp	r3, #4	; 0x4
-    a580:	1a00009c 	bne	a7f8 <.text+0xa7f8>
-    a584:	e59f2298 	ldr	r2, [pc, #664]	; a824 <.text+0xa824>
-    a588:	e3a03000 	mov	r3, #0	; 0x0
-    a58c:	e1c230b0 	strh	r3, [r2]
-    a590:	e59f2284 	ldr	r2, [pc, #644]	; a81c <.text+0xa81c>
-    a594:	e3a03006 	mov	r3, #6	; 0x6
-    a598:	e5c23000 	strb	r3, [r2]
-    a59c:	e59f327c 	ldr	r3, [pc, #636]	; a820 <.text+0xa820>
-    a5a0:	e5d33000 	ldrb	r3, [r3]
-    a5a4:	e3530002 	cmp	r3, #2	; 0x2
-    a5a8:	1a000003 	bne	a5bc <.text+0xa5bc>
-    a5ac:	e3a00000 	mov	r0, #0	; 0x0
-    a5b0:	e3a01001 	mov	r1, #1	; 0x1
-    a5b4:	ebfffd0b 	bl	99e8 <parse_POSLLH>
-    a5b8:	ea00008e 	b	a7f8 <.text+0xa7f8>
-    a5bc:	e59f325c 	ldr	r3, [pc, #604]	; a820 <.text+0xa820>
-    a5c0:	e5d33000 	ldrb	r3, [r3]
-    a5c4:	e3530003 	cmp	r3, #3	; 0x3
-    a5c8:	1a000003 	bne	a5dc <.text+0xa5dc>
-    a5cc:	e3a00000 	mov	r0, #0	; 0x0
-    a5d0:	e3a01001 	mov	r1, #1	; 0x1
-    a5d4:	ebfffeff 	bl	a1d8 <parse_STATUS>
-    a5d8:	ea000086 	b	a7f8 <.text+0xa7f8>
-    a5dc:	e59f323c 	ldr	r3, [pc, #572]	; a820 <.text+0xa820>
-    a5e0:	e5d33000 	ldrb	r3, [r3]
-    a5e4:	e3530012 	cmp	r3, #18	; 0x12
-    a5e8:	1a000082 	bne	a7f8 <.text+0xa7f8>
-    a5ec:	e3a00000 	mov	r0, #0	; 0x0
-    a5f0:	e3a01001 	mov	r1, #1	; 0x1
-    a5f4:	ebfffc01 	bl	9600 <parse_VELNED>
-    a5f8:	ea00007e 	b	a7f8 <.text+0xa7f8>
-    a5fc:	e59f321c 	ldr	r3, [pc, #540]	; a820 <.text+0xa820>
-    a600:	e5d33000 	ldrb	r3, [r3]
-    a604:	e3530002 	cmp	r3, #2	; 0x2
-    a608:	1a000004 	bne	a620 <.text+0xa620>
-    a60c:	e55b3011 	ldrb	r3, [fp, #-17]
-    a610:	e1a00003 	mov	r0, r3
-    a614:	e3a01000 	mov	r1, #0	; 0x0
-    a618:	ebfffcf2 	bl	99e8 <parse_POSLLH>
-    a61c:	ea00001d 	b	a698 <.text+0xa698>
-    a620:	e59f31f8 	ldr	r3, [pc, #504]	; a820 <.text+0xa820>
-    a624:	e5d33000 	ldrb	r3, [r3]
-    a628:	e3530003 	cmp	r3, #3	; 0x3
-    a62c:	1a000004 	bne	a644 <.text+0xa644>
-    a630:	e55b3011 	ldrb	r3, [fp, #-17]
-    a634:	e1a00003 	mov	r0, r3
-    a638:	e3a01000 	mov	r1, #0	; 0x0
-    a63c:	ebfffee5 	bl	a1d8 <parse_STATUS>
-    a640:	ea000014 	b	a698 <.text+0xa698>
-    a644:	e59f31d4 	ldr	r3, [pc, #468]	; a820 <.text+0xa820>
-    a648:	e5d33000 	ldrb	r3, [r3]
-    a64c:	e3530012 	cmp	r3, #18	; 0x12
-    a650:	1a000004 	bne	a668 <.text+0xa668>
-    a654:	e55b3011 	ldrb	r3, [fp, #-17]
-    a658:	e1a00003 	mov	r0, r3
-    a65c:	e3a01000 	mov	r1, #0	; 0x0
-    a660:	ebfffbe6 	bl	9600 <parse_VELNED>
-    a664:	ea00000b 	b	a698 <.text+0xa698>
-    a668:	e59f31b0 	ldr	r3, [pc, #432]	; a820 <.text+0xa820>
-    a66c:	e5d33000 	ldrb	r3, [r3]
-    a670:	e3530006 	cmp	r3, #6	; 0x6
-    a674:	1a000004 	bne	a68c <.text+0xa68c>
-    a678:	e55b3011 	ldrb	r3, [fp, #-17]
-    a67c:	e1a00003 	mov	r0, r3
-    a680:	e3a01000 	mov	r1, #0	; 0x0
-    a684:	ebfffe5f 	bl	a008 <parse_NAVSOL>
-    a688:	ea000002 	b	a698 <.text+0xa698>
-    a68c:	e59f3188 	ldr	r3, [pc, #392]	; a81c <.text+0xa81c>
-    a690:	e3a02000 	mov	r2, #0	; 0x0
-    a694:	e5c32000 	strb	r2, [r3]
-    a698:	e59f3184 	ldr	r3, [pc, #388]	; a824 <.text+0xa824>
-    a69c:	e1d330b0 	ldrh	r3, [r3]
-    a6a0:	e2833001 	add	r3, r3, #1	; 0x1
-    a6a4:	e1a03803 	mov	r3, r3, lsl #16
-    a6a8:	e1a02823 	mov	r2, r3, lsr #16
-    a6ac:	e59f3170 	ldr	r3, [pc, #368]	; a824 <.text+0xa824>
-    a6b0:	e1c320b0 	strh	r2, [r3]
-    a6b4:	e59f3168 	ldr	r3, [pc, #360]	; a824 <.text+0xa824>
-    a6b8:	e1d330b0 	ldrh	r3, [r3]
-    a6bc:	e1a02003 	mov	r2, r3
-    a6c0:	e59f3160 	ldr	r3, [pc, #352]	; a828 <.text+0xa828>
-    a6c4:	e1d330b0 	ldrh	r3, [r3]
-    a6c8:	e2433004 	sub	r3, r3, #4	; 0x4
-    a6cc:	e1520003 	cmp	r2, r3
-    a6d0:	ba000048 	blt	a7f8 <.text+0xa7f8>
-    a6d4:	e59f3140 	ldr	r3, [pc, #320]	; a81c <.text+0xa81c>
-    a6d8:	e3a02000 	mov	r2, #0	; 0x0
-    a6dc:	e5c32000 	strb	r2, [r3]
-    a6e0:	ea000044 	b	a7f8 <.text+0xa7f8>
-    a6e4:	e55b3011 	ldrb	r3, [fp, #-17]
-    a6e8:	e3530001 	cmp	r3, #1	; 0x1
-    a6ec:	1a000006 	bne	a70c <.text+0xa70c>
-    a6f0:	e59f212c 	ldr	r2, [pc, #300]	; a824 <.text+0xa824>
-    a6f4:	e3a03000 	mov	r3, #0	; 0x0
-    a6f8:	e1c230b0 	strh	r3, [r2]
-    a6fc:	e59f2118 	ldr	r2, [pc, #280]	; a81c <.text+0xa81c>
-    a700:	e3a0300b 	mov	r3, #11	; 0xb
-    a704:	e5c23000 	strb	r3, [r2]
-    a708:	ea00003a 	b	a7f8 <.text+0xa7f8>
-    a70c:	e59f3108 	ldr	r3, [pc, #264]	; a81c <.text+0xa81c>
-    a710:	e3a02000 	mov	r2, #0	; 0x0
-    a714:	e5c32000 	strb	r2, [r3]
-    a718:	ea000036 	b	a7f8 <.text+0xa7f8>
-    a71c:	e59f3100 	ldr	r3, [pc, #256]	; a824 <.text+0xa824>
-    a720:	e1d330b0 	ldrh	r3, [r3]
-    a724:	e3530000 	cmp	r3, #0	; 0x0
-    a728:	1a000002 	bne	a738 <.text+0xa738>
-    a72c:	e55b2011 	ldrb	r2, [fp, #-17]
-    a730:	e59f30f0 	ldr	r3, [pc, #240]	; a828 <.text+0xa828>
-    a734:	e1c320b0 	strh	r2, [r3]
-    a738:	e59f30e4 	ldr	r3, [pc, #228]	; a824 <.text+0xa824>
-    a73c:	e1d330b0 	ldrh	r3, [r3]
-    a740:	e2833001 	add	r3, r3, #1	; 0x1
-    a744:	e1a03803 	mov	r3, r3, lsl #16
-    a748:	e1a02823 	mov	r2, r3, lsr #16
-    a74c:	e59f30d0 	ldr	r3, [pc, #208]	; a824 <.text+0xa824>
-    a750:	e1c320b0 	strh	r2, [r3]
-    a754:	e59f30c8 	ldr	r3, [pc, #200]	; a824 <.text+0xa824>
-    a758:	e1d330b0 	ldrh	r3, [r3]
-    a75c:	e3530002 	cmp	r3, #2	; 0x2
-    a760:	1a000024 	bne	a7f8 <.text+0xa7f8>
-    a764:	e59f20b8 	ldr	r2, [pc, #184]	; a824 <.text+0xa824>
-    a768:	e3a03000 	mov	r3, #0	; 0x0
-    a76c:	e1c230b0 	strh	r3, [r2]
-    a770:	e59f20a4 	ldr	r2, [pc, #164]	; a81c <.text+0xa81c>
-    a774:	e3a0300c 	mov	r3, #12	; 0xc
-    a778:	e5c23000 	strb	r3, [r2]
-    a77c:	ea00001d 	b	a7f8 <.text+0xa7f8>
-    a780:	e55b3011 	ldrb	r3, [fp, #-17]
-    a784:	e3530006 	cmp	r3, #6	; 0x6
-    a788:	1a000003 	bne	a79c <.text+0xa79c>
-    a78c:	e59f3088 	ldr	r3, [pc, #136]	; a81c <.text+0xa81c>
-    a790:	e3a0200d 	mov	r2, #13	; 0xd
-    a794:	e5c32000 	strb	r2, [r3]
-    a798:	ea000016 	b	a7f8 <.text+0xa7f8>
-    a79c:	e59f3078 	ldr	r3, [pc, #120]	; a81c <.text+0xa81c>
-    a7a0:	e3a02000 	mov	r2, #0	; 0x0
-    a7a4:	e5c32000 	strb	r2, [r3]
-    a7a8:	ea000012 	b	a7f8 <.text+0xa7f8>
-    a7ac:	e59f3068 	ldr	r3, [pc, #104]	; a81c <.text+0xa81c>
-    a7b0:	e3a0200e 	mov	r2, #14	; 0xe
-    a7b4:	e5c32000 	strb	r2, [r3]
-    a7b8:	ea00000e 	b	a7f8 <.text+0xa7f8>
-    a7bc:	e59f3068 	ldr	r3, [pc, #104]	; a82c <.text+0xa82c>
-    a7c0:	e5d33000 	ldrb	r3, [r3]
-    a7c4:	e20330ff 	and	r3, r3, #255	; 0xff
-    a7c8:	e3530000 	cmp	r3, #0	; 0x0
-    a7cc:	1a000009 	bne	a7f8 <.text+0xa7f8>
-    a7d0:	e59f2054 	ldr	r2, [pc, #84]	; a82c <.text+0xa82c>
-    a7d4:	e3a03001 	mov	r3, #1	; 0x1
-    a7d8:	e5c23000 	strb	r3, [r2]
-    a7dc:	e59f2038 	ldr	r2, [pc, #56]	; a81c <.text+0xa81c>
-    a7e0:	e3a03000 	mov	r3, #0	; 0x0
-    a7e4:	e5c23000 	strb	r3, [r2]
-    a7e8:	ea000002 	b	a7f8 <.text+0xa7f8>
-    a7ec:	e59f3028 	ldr	r3, [pc, #40]	; a81c <.text+0xa81c>
-    a7f0:	e3a02000 	mov	r2, #0	; 0x0
-    a7f4:	e5c32000 	strb	r2, [r3]
-    a7f8:	e3a03000 	mov	r3, #0	; 0x0
-    a7fc:	e2433efd 	sub	r3, r3, #4048	; 0xfd0
-    a800:	e3a02000 	mov	r2, #0	; 0x0
-    a804:	e5832000 	str	r2, [r3]
-    a808:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    a80c:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    a810:	e12fff1e 	bx	lr
-    a814:	400008de 	ldrmid	r0, [r0], -lr
-    a818:	400008e0 	andmi	r0, r0, r0, ror #17
-    a81c:	40000933 	andmi	r0, r0, r3, lsr r9
-    a820:	40000932 	andmi	r0, r0, r2, lsr r9
-    a824:	40000930 	andmi	r0, r0, r0, lsr r9
-    a828:	4000092e 	andmi	r0, r0, lr, lsr #18
-    a82c:	400008ea 	andmi	r0, r0, sl, ror #17
-
-0000a830 <UART1Initialize>:
-    a830:	e1a0c00d 	mov	ip, sp
-    a834:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    a838:	e24cb004 	sub	fp, ip, #4	; 0x4
-    a83c:	e24dd008 	sub	sp, sp, #8	; 0x8
-    a840:	e50b0014 	str	r0, [fp, #-20]
-    a844:	ebfff615 	bl	80a0 <peripheralClockFrequency>
-    a848:	e1a02000 	mov	r2, r0
-    a84c:	e51b3014 	ldr	r3, [fp, #-20]
-    a850:	e1a03203 	mov	r3, r3, lsl #4
-    a854:	e1a00002 	mov	r0, r2
-    a858:	e1a01003 	mov	r1, r3
-    a85c:	eb0028fa 	bl	14c4c <____udivsi3_from_arm>
-    a860:	e1a03000 	mov	r3, r0
-    a864:	e50b3010 	str	r3, [fp, #-16]
-    a868:	e3a032ce 	mov	r3, #-536870900	; 0xe000000c
-    a86c:	e2833801 	add	r3, r3, #65536	; 0x10000
-    a870:	e3a02083 	mov	r2, #131	; 0x83
-    a874:	e5832000 	str	r2, [r3]
-    a878:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    a87c:	e2833801 	add	r3, r3, #65536	; 0x10000
-    a880:	e51b2010 	ldr	r2, [fp, #-16]
-    a884:	e20220ff 	and	r2, r2, #255	; 0xff
-    a888:	e5832000 	str	r2, [r3]
-    a88c:	e3a0224e 	mov	r2, #-536870908	; 0xe0000004
-    a890:	e2822801 	add	r2, r2, #65536	; 0x10000
-    a894:	e51b3010 	ldr	r3, [fp, #-16]
-    a898:	e1a03423 	mov	r3, r3, lsr #8
-    a89c:	e20330ff 	and	r3, r3, #255	; 0xff
-    a8a0:	e5823000 	str	r3, [r2]
-    a8a4:	e3a022ce 	mov	r2, #-536870900	; 0xe000000c
-    a8a8:	e2822801 	add	r2, r2, #65536	; 0x10000
-    a8ac:	e3a032ce 	mov	r3, #-536870900	; 0xe000000c
-    a8b0:	e2833801 	add	r3, r3, #65536	; 0x10000
-    a8b4:	e5933000 	ldr	r3, [r3]
-    a8b8:	e3c33080 	bic	r3, r3, #128	; 0x80
-    a8bc:	e5823000 	str	r3, [r2]
-    a8c0:	e3a0328e 	mov	r3, #-536870904	; 0xe0000008
-    a8c4:	e2833801 	add	r3, r3, #65536	; 0x10000
-    a8c8:	e3a02001 	mov	r2, #1	; 0x1
-    a8cc:	e5832000 	str	r2, [r3]
-    a8d0:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    a8d4:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    a8d8:	e12fff1e 	bx	lr
-
-0000a8dc <UART1WriteChar>:
-    a8dc:	e1a0c00d 	mov	ip, sp
-    a8e0:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    a8e4:	e24cb004 	sub	fp, ip, #4	; 0x4
-    a8e8:	e24dd004 	sub	sp, sp, #4	; 0x4
-    a8ec:	e1a03000 	mov	r3, r0
-    a8f0:	e54b3010 	strb	r3, [fp, #-16]
-    a8f4:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    a8f8:	e2833801 	add	r3, r3, #65536	; 0x10000
-    a8fc:	e2833014 	add	r3, r3, #20	; 0x14
-    a900:	e5933000 	ldr	r3, [r3]
-    a904:	e2033020 	and	r3, r3, #32	; 0x20
-    a908:	e3530000 	cmp	r3, #0	; 0x0
-    a90c:	0afffff8 	beq	a8f4 <UART1WriteChar+0x18>
-    a910:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    a914:	e2833801 	add	r3, r3, #65536	; 0x10000
-    a918:	e55b2010 	ldrb	r2, [fp, #-16]
-    a91c:	e5832000 	str	r2, [r3]
-    a920:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    a924:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    a928:	e12fff1e 	bx	lr
-
-0000a92c <UART1ReadChar>:
-    a92c:	e1a0c00d 	mov	ip, sp
-    a930:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    a934:	e24cb004 	sub	fp, ip, #4	; 0x4
-    a938:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    a93c:	e2833801 	add	r3, r3, #65536	; 0x10000
-    a940:	e2833014 	add	r3, r3, #20	; 0x14
-    a944:	e5933000 	ldr	r3, [r3]
-    a948:	e2033001 	and	r3, r3, #1	; 0x1
-    a94c:	e3530000 	cmp	r3, #0	; 0x0
-    a950:	0afffff8 	beq	a938 <UART1ReadChar+0xc>
-    a954:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    a958:	e2833801 	add	r3, r3, #65536	; 0x10000
-    a95c:	e5933000 	ldr	r3, [r3]
-    a960:	e20330ff 	and	r3, r3, #255	; 0xff
-    a964:	e1a00003 	mov	r0, r3
-    a968:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    a96c:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    a970:	e12fff1e 	bx	lr
-
-0000a974 <UART1_send>:
-    a974:	e1a0c00d 	mov	ip, sp
-    a978:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    a97c:	e24cb004 	sub	fp, ip, #4	; 0x4
-    a980:	e24dd00c 	sub	sp, sp, #12	; 0xc
-    a984:	e50b0014 	str	r0, [fp, #-20]
-    a988:	e1a03001 	mov	r3, r1
-    a98c:	e54b3018 	strb	r3, [fp, #-24]
-    a990:	e3a03000 	mov	r3, #0	; 0x0
-    a994:	e54b300d 	strb	r3, [fp, #-13]
-    a998:	ea000011 	b	a9e4 <UART1_send+0x70>
-    a99c:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    a9a0:	e2833903 	add	r3, r3, #49152	; 0xc000
-    a9a4:	e2833014 	add	r3, r3, #20	; 0x14
-    a9a8:	e5933000 	ldr	r3, [r3]
-    a9ac:	e2033020 	and	r3, r3, #32	; 0x20
-    a9b0:	e3530000 	cmp	r3, #0	; 0x0
-    a9b4:	0afffff8 	beq	a99c <UART1_send+0x28>
-    a9b8:	e3a0220e 	mov	r2, #-536870912	; 0xe0000000
-    a9bc:	e2822801 	add	r2, r2, #65536	; 0x10000
-    a9c0:	e55b300d 	ldrb	r3, [fp, #-13]
-    a9c4:	e1a01003 	mov	r1, r3
-    a9c8:	e51b3014 	ldr	r3, [fp, #-20]
-    a9cc:	e0813003 	add	r3, r1, r3
-    a9d0:	e5d33000 	ldrb	r3, [r3]
-    a9d4:	e5823000 	str	r3, [r2]
-    a9d8:	e55b300d 	ldrb	r3, [fp, #-13]
-    a9dc:	e2833001 	add	r3, r3, #1	; 0x1
-    a9e0:	e54b300d 	strb	r3, [fp, #-13]
-    a9e4:	e55b3018 	ldrb	r3, [fp, #-24]
-    a9e8:	e2433001 	sub	r3, r3, #1	; 0x1
-    a9ec:	e54b3018 	strb	r3, [fp, #-24]
-    a9f0:	e55b3018 	ldrb	r3, [fp, #-24]
-    a9f4:	e35300ff 	cmp	r3, #255	; 0xff
-    a9f8:	1affffe7 	bne	a99c <UART1_send+0x28>
-    a9fc:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    aa00:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    aa04:	e12fff1e 	bx	lr
-
-0000aa08 <UART1_send_ringbuffer>:
-    aa08:	e1a0c00d 	mov	ip, sp
-    aa0c:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    aa10:	e24cb004 	sub	fp, ip, #4	; 0x4
-    aa14:	e24dd004 	sub	sp, sp, #4	; 0x4
-    aa18:	e59f304c 	ldr	r3, [pc, #76]	; aa6c <.text+0xaa6c>
-    aa1c:	e5d33000 	ldrb	r3, [r3]
-    aa20:	e3530000 	cmp	r3, #0	; 0x0
-    aa24:	1a00000d 	bne	aa60 <UART1_send_ringbuffer+0x58>
-    aa28:	e24b300d 	sub	r3, fp, #13	; 0xd
-    aa2c:	e3a00000 	mov	r0, #0	; 0x0
-    aa30:	e1a01003 	mov	r1, r3
-    aa34:	e3a02001 	mov	r2, #1	; 0x1
-    aa38:	eb00000c 	bl	aa70 <ringbuffer1>
-    aa3c:	e1a03000 	mov	r3, r0
-    aa40:	e3530000 	cmp	r3, #0	; 0x0
-    aa44:	0a000005 	beq	aa60 <UART1_send_ringbuffer+0x58>
-    aa48:	e59f201c 	ldr	r2, [pc, #28]	; aa6c <.text+0xaa6c>
-    aa4c:	e3a03001 	mov	r3, #1	; 0x1
-    aa50:	e5c23000 	strb	r3, [r2]
-    aa54:	e55b300d 	ldrb	r3, [fp, #-13]
-    aa58:	e1a00003 	mov	r0, r3
-    aa5c:	ebffff9e 	bl	a8dc <UART1WriteChar>
-    aa60:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    aa64:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    aa68:	e12fff1e 	bx	lr
-    aa6c:	400008de 	ldrmid	r0, [r0], -lr
-
-0000aa70 <ringbuffer1>:
-    aa70:	e1a0c00d 	mov	ip, sp
-    aa74:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    aa78:	e24cb004 	sub	fp, ip, #4	; 0x4
-    aa7c:	e24dd018 	sub	sp, sp, #24	; 0x18
-    aa80:	e1a03000 	mov	r3, r0
-    aa84:	e50b101c 	str	r1, [fp, #-28]
-    aa88:	e50b2020 	str	r2, [fp, #-32]
-    aa8c:	e54b3018 	strb	r3, [fp, #-24]
-    aa90:	e3a03000 	mov	r3, #0	; 0x0
-    aa94:	e50b3014 	str	r3, [fp, #-20]
-    aa98:	e3a03000 	mov	r3, #0	; 0x0
-    aa9c:	e50b3010 	str	r3, [fp, #-16]
-    aaa0:	e55b3018 	ldrb	r3, [fp, #-24]
-    aaa4:	e3530001 	cmp	r3, #1	; 0x1
-    aaa8:	1a000021 	bne	ab34 <ringbuffer1+0xc4>
-    aaac:	e59f3198 	ldr	r3, [pc, #408]	; ac4c <.text+0xac4c>
-    aab0:	e5933000 	ldr	r3, [r3]
-    aab4:	e2632d06 	rsb	r2, r3, #384	; 0x180
-    aab8:	e51b3020 	ldr	r3, [fp, #-32]
-    aabc:	e1520003 	cmp	r2, r3
-    aac0:	9a00005a 	bls	ac30 <ringbuffer1+0x1c0>
-    aac4:	ea00000d 	b	ab00 <ringbuffer1+0x90>
-    aac8:	e59f3180 	ldr	r3, [pc, #384]	; ac50 <.text+0xac50>
-    aacc:	e5931000 	ldr	r1, [r3]
-    aad0:	e51b2014 	ldr	r2, [fp, #-20]
-    aad4:	e51b301c 	ldr	r3, [fp, #-28]
-    aad8:	e0823003 	add	r3, r2, r3
-    aadc:	e5d33000 	ldrb	r3, [r3]
-    aae0:	e59f216c 	ldr	r2, [pc, #364]	; ac54 <.text+0xac54>
-    aae4:	e7c23001 	strb	r3, [r2, r1]
-    aae8:	e2812001 	add	r2, r1, #1	; 0x1
-    aaec:	e59f315c 	ldr	r3, [pc, #348]	; ac50 <.text+0xac50>
-    aaf0:	e5832000 	str	r2, [r3]
-    aaf4:	e51b3014 	ldr	r3, [fp, #-20]
-    aaf8:	e2833001 	add	r3, r3, #1	; 0x1
-    aafc:	e50b3014 	str	r3, [fp, #-20]
-    ab00:	e51b2014 	ldr	r2, [fp, #-20]
-    ab04:	e51b3020 	ldr	r3, [fp, #-32]
-    ab08:	e1520003 	cmp	r2, r3
-    ab0c:	3affffed 	bcc	aac8 <ringbuffer1+0x58>
-    ab10:	e59f3134 	ldr	r3, [pc, #308]	; ac4c <.text+0xac4c>
-    ab14:	e5932000 	ldr	r2, [r3]
-    ab18:	e51b3020 	ldr	r3, [fp, #-32]
-    ab1c:	e0822003 	add	r2, r2, r3
-    ab20:	e59f3124 	ldr	r3, [pc, #292]	; ac4c <.text+0xac4c>
-    ab24:	e5832000 	str	r2, [r3]
-    ab28:	e3a03001 	mov	r3, #1	; 0x1
-    ab2c:	e50b3024 	str	r3, [fp, #-36]
-    ab30:	ea000040 	b	ac38 <ringbuffer1+0x1c8>
-    ab34:	e55b3018 	ldrb	r3, [fp, #-24]
-    ab38:	e3530000 	cmp	r3, #0	; 0x0
-    ab3c:	1a00002b 	bne	abf0 <ringbuffer1+0x180>
-    ab40:	e59f3104 	ldr	r3, [pc, #260]	; ac4c <.text+0xac4c>
-    ab44:	e5932000 	ldr	r2, [r3]
-    ab48:	e51b3020 	ldr	r3, [fp, #-32]
-    ab4c:	e1520003 	cmp	r2, r3
-    ab50:	3a000036 	bcc	ac30 <ringbuffer1+0x1c0>
-    ab54:	ea00000e 	b	ab94 <ringbuffer1+0x124>
-    ab58:	e51b2010 	ldr	r2, [fp, #-16]
-    ab5c:	e51b301c 	ldr	r3, [fp, #-28]
-    ab60:	e0822003 	add	r2, r2, r3
-    ab64:	e59f30ec 	ldr	r3, [pc, #236]	; ac58 <.text+0xac58>
-    ab68:	e5931000 	ldr	r1, [r3]
-    ab6c:	e59f30e0 	ldr	r3, [pc, #224]	; ac54 <.text+0xac54>
-    ab70:	e7d33001 	ldrb	r3, [r3, r1]
-    ab74:	e20330ff 	and	r3, r3, #255	; 0xff
-    ab78:	e5c23000 	strb	r3, [r2]
-    ab7c:	e51b3010 	ldr	r3, [fp, #-16]
-    ab80:	e2833001 	add	r3, r3, #1	; 0x1
-    ab84:	e50b3010 	str	r3, [fp, #-16]
-    ab88:	e2812001 	add	r2, r1, #1	; 0x1
-    ab8c:	e59f30c4 	ldr	r3, [pc, #196]	; ac58 <.text+0xac58>
-    ab90:	e5832000 	str	r2, [r3]
-    ab94:	e51b2010 	ldr	r2, [fp, #-16]
-    ab98:	e51b3020 	ldr	r3, [fp, #-32]
-    ab9c:	e1520003 	cmp	r2, r3
-    aba0:	3affffec 	bcc	ab58 <ringbuffer1+0xe8>
-    aba4:	e59f30a0 	ldr	r3, [pc, #160]	; ac4c <.text+0xac4c>
-    aba8:	e5932000 	ldr	r2, [r3]
-    abac:	e51b3020 	ldr	r3, [fp, #-32]
-    abb0:	e0632002 	rsb	r2, r3, r2
-    abb4:	e59f3090 	ldr	r3, [pc, #144]	; ac4c <.text+0xac4c>
-    abb8:	e5832000 	str	r2, [r3]
-    abbc:	e59f3088 	ldr	r3, [pc, #136]	; ac4c <.text+0xac4c>
-    abc0:	e5933000 	ldr	r3, [r3]
-    abc4:	e3530000 	cmp	r3, #0	; 0x0
-    abc8:	1a000005 	bne	abe4 <ringbuffer1+0x174>
-    abcc:	e59f207c 	ldr	r2, [pc, #124]	; ac50 <.text+0xac50>
-    abd0:	e3a03000 	mov	r3, #0	; 0x0
-    abd4:	e5823000 	str	r3, [r2]
-    abd8:	e59f2078 	ldr	r2, [pc, #120]	; ac58 <.text+0xac58>
-    abdc:	e3a03000 	mov	r3, #0	; 0x0
-    abe0:	e5823000 	str	r3, [r2]
-    abe4:	e3a03001 	mov	r3, #1	; 0x1
-    abe8:	e50b3024 	str	r3, [fp, #-36]
-    abec:	ea000011 	b	ac38 <ringbuffer1+0x1c8>
-    abf0:	e55b3018 	ldrb	r3, [fp, #-24]
-    abf4:	e3530002 	cmp	r3, #2	; 0x2
-    abf8:	1a00000c 	bne	ac30 <ringbuffer1+0x1c0>
-    abfc:	e59f3048 	ldr	r3, [pc, #72]	; ac4c <.text+0xac4c>
-    ac00:	e5933000 	ldr	r3, [r3]
-    ac04:	e3530000 	cmp	r3, #0	; 0x0
-    ac08:	0a000002 	beq	ac18 <ringbuffer1+0x1a8>
-    ac0c:	e3a03000 	mov	r3, #0	; 0x0
-    ac10:	e50b3024 	str	r3, [fp, #-36]
-    ac14:	ea000007 	b	ac38 <ringbuffer1+0x1c8>
-    ac18:	e3a03f5d 	mov	r3, #372	; 0x174
-    ac1c:	e50b3024 	str	r3, [fp, #-36]
-    ac20:	e51b3024 	ldr	r3, [fp, #-36]
-    ac24:	e2833001 	add	r3, r3, #1	; 0x1
-    ac28:	e50b3024 	str	r3, [fp, #-36]
-    ac2c:	ea000001 	b	ac38 <ringbuffer1+0x1c8>
-    ac30:	e3a03000 	mov	r3, #0	; 0x0
-    ac34:	e50b3024 	str	r3, [fp, #-36]
-    ac38:	e51b3024 	ldr	r3, [fp, #-36]
-    ac3c:	e1a00003 	mov	r0, r3
-    ac40:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    ac44:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    ac48:	e12fff1e 	bx	lr
-    ac4c:	40000934 	andmi	r0, r0, r4, lsr r9
-    ac50:	40000938 	andmi	r0, r0, r8, lsr r9
-    ac54:	40000940 	andmi	r0, r0, r0, asr #18
-    ac58:	4000093c 	andmi	r0, r0, ip, lsr r9
-
-0000ac5c <GPS_configure>:
-    ac5c:	e1a0c00d 	mov	ip, sp
-    ac60:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    ac64:	e24cb004 	sub	fp, ip, #4	; 0x4
-    ac68:	e24dd004 	sub	sp, sp, #4	; 0x4
-    ac6c:	e59f3608 	ldr	r3, [pc, #1544]	; b27c <.text+0xb27c>
-    ac70:	e5d33000 	ldrb	r3, [r3]
-    ac74:	e3530007 	cmp	r3, #7	; 0x7
-    ac78:	979ff103 	ldrls	pc, [pc, r3, lsl #2]
-    ac7c:	ea000160 	b	b204 <.text+0xb204>
-    ac80:	0000aca0 	andeq	sl, r0, r0, lsr #25
-    ac84:	0000ad54 	andeq	sl, r0, r4, asr sp
-    ac88:	0000ae1c 	andeq	sl, r0, ip, lsl lr
-    ac8c:	0000af10 	andeq	sl, r0, r0, lsl pc
-    ac90:	0000afb4 	streqh	sl, [r0], -r4
-    ac94:	0000b058 	andeq	fp, r0, r8, asr r0
-    ac98:	0000b0fc 	streqd	fp, [r0], -ip
-    ac9c:	0000b1a0 	andeq	fp, r0, r0, lsr #3
-    aca0:	e59f35d8 	ldr	r3, [pc, #1496]	; b280 <.text+0xb280>
-    aca4:	e5d33000 	ldrb	r3, [r3]
-    aca8:	e3530000 	cmp	r3, #0	; 0x0
-    acac:	0a000005 	beq	acc8 <.text+0xacc8>
-    acb0:	e3a00ce1 	mov	r0, #57600	; 0xe100
-    acb4:	ebfffedd 	bl	a830 <UART1Initialize>
-    acb8:	e59f35c0 	ldr	r3, [pc, #1472]	; b280 <.text+0xb280>
-    acbc:	e3a02000 	mov	r2, #0	; 0x0
-    acc0:	e5c32000 	strb	r2, [r3]
-    acc4:	ea000001 	b	acd0 <.text+0xacd0>
-    acc8:	e3a00d96 	mov	r0, #9600	; 0x2580
-    accc:	ebfffed7 	bl	a830 <UART1Initialize>
-    acd0:	e3a00002 	mov	r0, #2	; 0x2
-    acd4:	e3a01000 	mov	r1, #0	; 0x0
-    acd8:	e3a02000 	mov	r2, #0	; 0x0
-    acdc:	ebffff63 	bl	aa70 <ringbuffer1>
-    ace0:	e1a03000 	mov	r3, r0
-    ace4:	e353001c 	cmp	r3, #28	; 0x1c
-    ace8:	da000015 	ble	ad44 <.text+0xad44>
-    acec:	e3a00001 	mov	r0, #1	; 0x1
-    acf0:	e59f158c 	ldr	r1, [pc, #1420]	; b284 <.text+0xb284>
-    acf4:	e3a02002 	mov	r2, #2	; 0x2
-    acf8:	ebffff5c 	bl	aa70 <ringbuffer1>
-    acfc:	e1a03000 	mov	r3, r0
-    ad00:	e50b3010 	str	r3, [fp, #-16]
-    ad04:	e3a00001 	mov	r0, #1	; 0x1
-    ad08:	e59f1578 	ldr	r1, [pc, #1400]	; b288 <.text+0xb288>
-    ad0c:	e3a0201a 	mov	r2, #26	; 0x1a
-    ad10:	ebffff56 	bl	aa70 <ringbuffer1>
-    ad14:	e1a03000 	mov	r3, r0
-    ad18:	e50b3010 	str	r3, [fp, #-16]
-    ad1c:	ebffff39 	bl	aa08 <UART1_send_ringbuffer>
-    ad20:	e59f2564 	ldr	r2, [pc, #1380]	; b28c <.text+0xb28c>
-    ad24:	e3a03001 	mov	r3, #1	; 0x1
-    ad28:	e5c23000 	strb	r3, [r2]
-    ad2c:	e59f3548 	ldr	r3, [pc, #1352]	; b27c <.text+0xb27c>
-    ad30:	e5d33000 	ldrb	r3, [r3]
-    ad34:	e2833001 	add	r3, r3, #1	; 0x1
-    ad38:	e20330ff 	and	r3, r3, #255	; 0xff
-    ad3c:	e59f2538 	ldr	r2, [pc, #1336]	; b27c <.text+0xb27c>
-    ad40:	e5c23000 	strb	r3, [r2]
-    ad44:	e59f3544 	ldr	r3, [pc, #1348]	; b290 <.text+0xb290>
-    ad48:	e3a02000 	mov	r2, #0	; 0x0
-    ad4c:	e5c32000 	strb	r2, [r3]
-    ad50:	ea00012e 	b	b210 <.text+0xb210>
-    ad54:	e59f3538 	ldr	r3, [pc, #1336]	; b294 <.text+0xb294>
-    ad58:	e5d33000 	ldrb	r3, [r3]
-    ad5c:	e20330ff 	and	r3, r3, #255	; 0xff
-    ad60:	e3530000 	cmp	r3, #0	; 0x0
-    ad64:	0a000022 	beq	adf4 <.text+0xadf4>
-    ad68:	e59f2524 	ldr	r2, [pc, #1316]	; b294 <.text+0xb294>
-    ad6c:	e3a03000 	mov	r3, #0	; 0x0
-    ad70:	e5c23000 	strb	r3, [r2]
-    ad74:	e3a00002 	mov	r0, #2	; 0x2
-    ad78:	e3a01000 	mov	r1, #0	; 0x0
-    ad7c:	e3a02000 	mov	r2, #0	; 0x0
-    ad80:	ebffff3a 	bl	aa70 <ringbuffer1>
-    ad84:	e1a03000 	mov	r3, r0
-    ad88:	e353000c 	cmp	r3, #12	; 0xc
-    ad8c:	da000011 	ble	add8 <.text+0xadd8>
-    ad90:	e3a00001 	mov	r0, #1	; 0x1
-    ad94:	e59f14e8 	ldr	r1, [pc, #1256]	; b284 <.text+0xb284>
-    ad98:	e3a02002 	mov	r2, #2	; 0x2
-    ad9c:	ebffff33 	bl	aa70 <ringbuffer1>
-    ada0:	e3a00001 	mov	r0, #1	; 0x1
-    ada4:	e59f14ec 	ldr	r1, [pc, #1260]	; b298 <.text+0xb298>
-    ada8:	e3a0200a 	mov	r2, #10	; 0xa
-    adac:	ebffff2f 	bl	aa70 <ringbuffer1>
-    adb0:	ebffff14 	bl	aa08 <UART1_send_ringbuffer>
-    adb4:	e59f24e0 	ldr	r2, [pc, #1248]	; b29c <.text+0xb29c>
-    adb8:	e3a03000 	mov	r3, #0	; 0x0
-    adbc:	e5c23000 	strb	r3, [r2]
-    adc0:	e59f34b4 	ldr	r3, [pc, #1204]	; b27c <.text+0xb27c>
-    adc4:	e5d33000 	ldrb	r3, [r3]
-    adc8:	e2833001 	add	r3, r3, #1	; 0x1
-    adcc:	e20330ff 	and	r3, r3, #255	; 0xff
-    add0:	e59f24a4 	ldr	r2, [pc, #1188]	; b27c <.text+0xb27c>
-    add4:	e5c23000 	strb	r3, [r2]
-    add8:	e59f24b0 	ldr	r2, [pc, #1200]	; b290 <.text+0xb290>
-    addc:	e3a03000 	mov	r3, #0	; 0x0
-    ade0:	e5c23000 	strb	r3, [r2]
-    ade4:	e59f2494 	ldr	r2, [pc, #1172]	; b280 <.text+0xb280>
-    ade8:	e3a03000 	mov	r3, #0	; 0x0
-    adec:	e5c23000 	strb	r3, [r2]
-    adf0:	ea000106 	b	b210 <.text+0xb210>
-    adf4:	e59f3494 	ldr	r3, [pc, #1172]	; b290 <.text+0xb290>
-    adf8:	e5d33000 	ldrb	r3, [r3]
-    adfc:	e2833001 	add	r3, r3, #1	; 0x1
-    ae00:	e20330ff 	and	r3, r3, #255	; 0xff
-    ae04:	e59f2484 	ldr	r2, [pc, #1156]	; b290 <.text+0xb290>
-    ae08:	e5c23000 	strb	r3, [r2]
-    ae0c:	e59f246c 	ldr	r2, [pc, #1132]	; b280 <.text+0xb280>
-    ae10:	e3a03001 	mov	r3, #1	; 0x1
-    ae14:	e5c23000 	strb	r3, [r2]
-    ae18:	ea0000fc 	b	b210 <.text+0xb210>
-    ae1c:	e59f3470 	ldr	r3, [pc, #1136]	; b294 <.text+0xb294>
-    ae20:	e5d33000 	ldrb	r3, [r3]
-    ae24:	e20330ff 	and	r3, r3, #255	; 0xff
-    ae28:	e3530000 	cmp	r3, #0	; 0x0
-    ae2c:	0a000030 	beq	aef4 <.text+0xaef4>
-    ae30:	e59f245c 	ldr	r2, [pc, #1116]	; b294 <.text+0xb294>
-    ae34:	e3a03000 	mov	r3, #0	; 0x0
-    ae38:	e5c23000 	strb	r3, [r2]
-    ae3c:	e3a00002 	mov	r0, #2	; 0x2
-    ae40:	e3a01000 	mov	r1, #0	; 0x0
-    ae44:	e3a02000 	mov	r2, #0	; 0x0
-    ae48:	ebffff08 	bl	aa70 <ringbuffer1>
-    ae4c:	e1a03000 	mov	r3, r0
-    ae50:	e353000e 	cmp	r3, #14	; 0xe
-    ae54:	da000022 	ble	aee4 <.text+0xaee4>
-    ae58:	e3a00001 	mov	r0, #1	; 0x1
-    ae5c:	e59f1420 	ldr	r1, [pc, #1056]	; b284 <.text+0xb284>
-    ae60:	e3a02002 	mov	r2, #2	; 0x2
-    ae64:	ebffff01 	bl	aa70 <ringbuffer1>
-    ae68:	e59f342c 	ldr	r3, [pc, #1068]	; b29c <.text+0xb29c>
-    ae6c:	e5d33000 	ldrb	r3, [r3]
-    ae70:	e1a02003 	mov	r2, r3
-    ae74:	e1a03002 	mov	r3, r2
-    ae78:	e1a03083 	mov	r3, r3, lsl #1
-    ae7c:	e0833002 	add	r3, r3, r2
-    ae80:	e1a03103 	mov	r3, r3, lsl #2
-    ae84:	e1a02003 	mov	r2, r3
-    ae88:	e59f3410 	ldr	r3, [pc, #1040]	; b2a0 <.text+0xb2a0>
-    ae8c:	e0823003 	add	r3, r2, r3
-    ae90:	e3a00001 	mov	r0, #1	; 0x1
-    ae94:	e1a01003 	mov	r1, r3
-    ae98:	e3a0200c 	mov	r2, #12	; 0xc
-    ae9c:	ebfffef3 	bl	aa70 <ringbuffer1>
-    aea0:	ebfffed8 	bl	aa08 <UART1_send_ringbuffer>
-    aea4:	e59f33f0 	ldr	r3, [pc, #1008]	; b29c <.text+0xb29c>
-    aea8:	e5d33000 	ldrb	r3, [r3]
-    aeac:	e2833001 	add	r3, r3, #1	; 0x1
-    aeb0:	e20330ff 	and	r3, r3, #255	; 0xff
-    aeb4:	e59f23e0 	ldr	r2, [pc, #992]	; b29c <.text+0xb29c>
-    aeb8:	e5c23000 	strb	r3, [r2]
-    aebc:	e59f33d8 	ldr	r3, [pc, #984]	; b29c <.text+0xb29c>
-    aec0:	e5d33000 	ldrb	r3, [r3]
-    aec4:	e353000b 	cmp	r3, #11	; 0xb
-    aec8:	1a000005 	bne	aee4 <.text+0xaee4>
-    aecc:	e59f33a8 	ldr	r3, [pc, #936]	; b27c <.text+0xb27c>
-    aed0:	e5d33000 	ldrb	r3, [r3]
-    aed4:	e2833001 	add	r3, r3, #1	; 0x1
-    aed8:	e20330ff 	and	r3, r3, #255	; 0xff
-    aedc:	e59f2398 	ldr	r2, [pc, #920]	; b27c <.text+0xb27c>
-    aee0:	e5c23000 	strb	r3, [r2]
-    aee4:	e59f33a4 	ldr	r3, [pc, #932]	; b290 <.text+0xb290>
-    aee8:	e3a02000 	mov	r2, #0	; 0x0
-    aeec:	e5c32000 	strb	r2, [r3]
-    aef0:	ea0000c6 	b	b210 <.text+0xb210>
-    aef4:	e59f3394 	ldr	r3, [pc, #916]	; b290 <.text+0xb290>
-    aef8:	e5d33000 	ldrb	r3, [r3]
-    aefc:	e2833001 	add	r3, r3, #1	; 0x1
-    af00:	e20330ff 	and	r3, r3, #255	; 0xff
-    af04:	e59f2384 	ldr	r2, [pc, #900]	; b290 <.text+0xb290>
-    af08:	e5c23000 	strb	r3, [r2]
-    af0c:	ea0000bf 	b	b210 <.text+0xb210>
-    af10:	e59f337c 	ldr	r3, [pc, #892]	; b294 <.text+0xb294>
-    af14:	e5d33000 	ldrb	r3, [r3]
-    af18:	e20330ff 	and	r3, r3, #255	; 0xff
-    af1c:	e3530000 	cmp	r3, #0	; 0x0
-    af20:	0a00001c 	beq	af98 <.text+0xaf98>
-    af24:	e59f2368 	ldr	r2, [pc, #872]	; b294 <.text+0xb294>
-    af28:	e3a03000 	mov	r3, #0	; 0x0
-    af2c:	e5c23000 	strb	r3, [r2]
-    af30:	e3a00002 	mov	r0, #2	; 0x2
-    af34:	e3a01000 	mov	r1, #0	; 0x0
-    af38:	e3a02000 	mov	r2, #0	; 0x0
-    af3c:	ebfffecb 	bl	aa70 <ringbuffer1>
-    af40:	e1a03000 	mov	r3, r0
-    af44:	e3530030 	cmp	r3, #48	; 0x30
-    af48:	da00000e 	ble	af88 <.text+0xaf88>
-    af4c:	e3a00001 	mov	r0, #1	; 0x1
-    af50:	e59f132c 	ldr	r1, [pc, #812]	; b284 <.text+0xb284>
-    af54:	e3a02002 	mov	r2, #2	; 0x2
-    af58:	ebfffec4 	bl	aa70 <ringbuffer1>
-    af5c:	e3a00001 	mov	r0, #1	; 0x1
-    af60:	e59f133c 	ldr	r1, [pc, #828]	; b2a4 <.text+0xb2a4>
-    af64:	e3a0202e 	mov	r2, #46	; 0x2e
-    af68:	ebfffec0 	bl	aa70 <ringbuffer1>
-    af6c:	ebfffea5 	bl	aa08 <UART1_send_ringbuffer>
-    af70:	e59f3304 	ldr	r3, [pc, #772]	; b27c <.text+0xb27c>
-    af74:	e5d33000 	ldrb	r3, [r3]
-    af78:	e2833001 	add	r3, r3, #1	; 0x1
-    af7c:	e20330ff 	and	r3, r3, #255	; 0xff
-    af80:	e59f22f4 	ldr	r2, [pc, #756]	; b27c <.text+0xb27c>
-    af84:	e5c23000 	strb	r3, [r2]
-    af88:	e59f3300 	ldr	r3, [pc, #768]	; b290 <.text+0xb290>
-    af8c:	e3a02000 	mov	r2, #0	; 0x0
-    af90:	e5c32000 	strb	r2, [r3]
-    af94:	ea00009d 	b	b210 <.text+0xb210>
-    af98:	e59f32f0 	ldr	r3, [pc, #752]	; b290 <.text+0xb290>
-    af9c:	e5d33000 	ldrb	r3, [r3]
-    afa0:	e2833001 	add	r3, r3, #1	; 0x1
-    afa4:	e20330ff 	and	r3, r3, #255	; 0xff
-    afa8:	e59f22e0 	ldr	r2, [pc, #736]	; b290 <.text+0xb290>
-    afac:	e5c23000 	strb	r3, [r2]
-    afb0:	ea000096 	b	b210 <.text+0xb210>
-    afb4:	e59f32d8 	ldr	r3, [pc, #728]	; b294 <.text+0xb294>
-    afb8:	e5d33000 	ldrb	r3, [r3]
-    afbc:	e20330ff 	and	r3, r3, #255	; 0xff
-    afc0:	e3530000 	cmp	r3, #0	; 0x0
-    afc4:	0a00001c 	beq	b03c <.text+0xb03c>
-    afc8:	e59f22c4 	ldr	r2, [pc, #708]	; b294 <.text+0xb294>
-    afcc:	e3a03000 	mov	r3, #0	; 0x0
-    afd0:	e5c23000 	strb	r3, [r2]
-    afd4:	e3a00002 	mov	r0, #2	; 0x2
-    afd8:	e3a01000 	mov	r1, #0	; 0x0
-    afdc:	e3a02000 	mov	r2, #0	; 0x0
-    afe0:	ebfffea2 	bl	aa70 <ringbuffer1>
-    afe4:	e1a03000 	mov	r3, r0
-    afe8:	e353000e 	cmp	r3, #14	; 0xe
-    afec:	da00000e 	ble	b02c <.text+0xb02c>
-    aff0:	e3a00001 	mov	r0, #1	; 0x1
-    aff4:	e59f1288 	ldr	r1, [pc, #648]	; b284 <.text+0xb284>
-    aff8:	e3a02002 	mov	r2, #2	; 0x2
-    affc:	ebfffe9b 	bl	aa70 <ringbuffer1>
-    b000:	e3a00001 	mov	r0, #1	; 0x1
-    b004:	e59f129c 	ldr	r1, [pc, #668]	; b2a8 <.text+0xb2a8>
-    b008:	e3a0200c 	mov	r2, #12	; 0xc
-    b00c:	ebfffe97 	bl	aa70 <ringbuffer1>
-    b010:	ebfffe7c 	bl	aa08 <UART1_send_ringbuffer>
-    b014:	e59f3260 	ldr	r3, [pc, #608]	; b27c <.text+0xb27c>
-    b018:	e5d33000 	ldrb	r3, [r3]
-    b01c:	e2833001 	add	r3, r3, #1	; 0x1
-    b020:	e20330ff 	and	r3, r3, #255	; 0xff
-    b024:	e59f2250 	ldr	r2, [pc, #592]	; b27c <.text+0xb27c>
-    b028:	e5c23000 	strb	r3, [r2]
-    b02c:	e59f325c 	ldr	r3, [pc, #604]	; b290 <.text+0xb290>
-    b030:	e3a02000 	mov	r2, #0	; 0x0
-    b034:	e5c32000 	strb	r2, [r3]
-    b038:	ea000074 	b	b210 <.text+0xb210>
-    b03c:	e59f324c 	ldr	r3, [pc, #588]	; b290 <.text+0xb290>
-    b040:	e5d33000 	ldrb	r3, [r3]
-    b044:	e2833001 	add	r3, r3, #1	; 0x1
-    b048:	e20330ff 	and	r3, r3, #255	; 0xff
-    b04c:	e59f223c 	ldr	r2, [pc, #572]	; b290 <.text+0xb290>
-    b050:	e5c23000 	strb	r3, [r2]
-    b054:	ea00006d 	b	b210 <.text+0xb210>
-    b058:	e59f3234 	ldr	r3, [pc, #564]	; b294 <.text+0xb294>
-    b05c:	e5d33000 	ldrb	r3, [r3]
-    b060:	e20330ff 	and	r3, r3, #255	; 0xff
-    b064:	e3530000 	cmp	r3, #0	; 0x0
-    b068:	0a00001c 	beq	b0e0 <.text+0xb0e0>
-    b06c:	e59f2220 	ldr	r2, [pc, #544]	; b294 <.text+0xb294>
-    b070:	e3a03000 	mov	r3, #0	; 0x0
-    b074:	e5c23000 	strb	r3, [r2]
-    b078:	e3a00002 	mov	r0, #2	; 0x2
-    b07c:	e3a01000 	mov	r1, #0	; 0x0
-    b080:	e3a02000 	mov	r2, #0	; 0x0
-    b084:	ebfffe79 	bl	aa70 <ringbuffer1>
-    b088:	e1a03000 	mov	r3, r0
-    b08c:	e3530010 	cmp	r3, #16	; 0x10
-    b090:	da00000e 	ble	b0d0 <.text+0xb0d0>
-    b094:	e3a00001 	mov	r0, #1	; 0x1
-    b098:	e59f11e4 	ldr	r1, [pc, #484]	; b284 <.text+0xb284>
-    b09c:	e3a02002 	mov	r2, #2	; 0x2
-    b0a0:	ebfffe72 	bl	aa70 <ringbuffer1>
-    b0a4:	e3a00001 	mov	r0, #1	; 0x1
-    b0a8:	e59f11fc 	ldr	r1, [pc, #508]	; b2ac <.text+0xb2ac>
-    b0ac:	e3a0200e 	mov	r2, #14	; 0xe
-    b0b0:	ebfffe6e 	bl	aa70 <ringbuffer1>
-    b0b4:	ebfffe53 	bl	aa08 <UART1_send_ringbuffer>
-    b0b8:	e59f31bc 	ldr	r3, [pc, #444]	; b27c <.text+0xb27c>
-    b0bc:	e5d33000 	ldrb	r3, [r3]
-    b0c0:	e2833001 	add	r3, r3, #1	; 0x1
-    b0c4:	e20330ff 	and	r3, r3, #255	; 0xff
-    b0c8:	e59f21ac 	ldr	r2, [pc, #428]	; b27c <.text+0xb27c>
-    b0cc:	e5c23000 	strb	r3, [r2]
-    b0d0:	e59f31b8 	ldr	r3, [pc, #440]	; b290 <.text+0xb290>
-    b0d4:	e3a02000 	mov	r2, #0	; 0x0
-    b0d8:	e5c32000 	strb	r2, [r3]
-    b0dc:	ea00004b 	b	b210 <.text+0xb210>
-    b0e0:	e59f31a8 	ldr	r3, [pc, #424]	; b290 <.text+0xb290>
-    b0e4:	e5d33000 	ldrb	r3, [r3]
-    b0e8:	e2833001 	add	r3, r3, #1	; 0x1
-    b0ec:	e20330ff 	and	r3, r3, #255	; 0xff
-    b0f0:	e59f2198 	ldr	r2, [pc, #408]	; b290 <.text+0xb290>
-    b0f4:	e5c23000 	strb	r3, [r2]
-    b0f8:	ea000044 	b	b210 <.text+0xb210>
-    b0fc:	e59f3190 	ldr	r3, [pc, #400]	; b294 <.text+0xb294>
-    b100:	e5d33000 	ldrb	r3, [r3]
-    b104:	e20330ff 	and	r3, r3, #255	; 0xff
-    b108:	e3530000 	cmp	r3, #0	; 0x0
-    b10c:	0a00001c 	beq	b184 <.text+0xb184>
-    b110:	e59f217c 	ldr	r2, [pc, #380]	; b294 <.text+0xb294>
-    b114:	e3a03000 	mov	r3, #0	; 0x0
-    b118:	e5c23000 	strb	r3, [r2]
-    b11c:	e3a00002 	mov	r0, #2	; 0x2
-    b120:	e3a01000 	mov	r1, #0	; 0x0
-    b124:	e3a02000 	mov	r2, #0	; 0x0
-    b128:	ebfffe50 	bl	aa70 <ringbuffer1>
-    b12c:	e1a03000 	mov	r3, r0
-    b130:	e3530015 	cmp	r3, #21	; 0x15
-    b134:	da00000e 	ble	b174 <.text+0xb174>
-    b138:	e3a00001 	mov	r0, #1	; 0x1
-    b13c:	e59f1140 	ldr	r1, [pc, #320]	; b284 <.text+0xb284>
-    b140:	e3a02002 	mov	r2, #2	; 0x2
-    b144:	ebfffe49 	bl	aa70 <ringbuffer1>
-    b148:	e3a00001 	mov	r0, #1	; 0x1
-    b14c:	e59f115c 	ldr	r1, [pc, #348]	; b2b0 <.text+0xb2b0>
-    b150:	e3a02013 	mov	r2, #19	; 0x13
-    b154:	ebfffe45 	bl	aa70 <ringbuffer1>
-    b158:	ebfffe2a 	bl	aa08 <UART1_send_ringbuffer>
-    b15c:	e59f3118 	ldr	r3, [pc, #280]	; b27c <.text+0xb27c>
-    b160:	e5d33000 	ldrb	r3, [r3]
-    b164:	e2833001 	add	r3, r3, #1	; 0x1
-    b168:	e20330ff 	and	r3, r3, #255	; 0xff
-    b16c:	e59f2108 	ldr	r2, [pc, #264]	; b27c <.text+0xb27c>
-    b170:	e5c23000 	strb	r3, [r2]
-    b174:	e59f3114 	ldr	r3, [pc, #276]	; b290 <.text+0xb290>
-    b178:	e3a02000 	mov	r2, #0	; 0x0
-    b17c:	e5c32000 	strb	r2, [r3]
-    b180:	ea000022 	b	b210 <.text+0xb210>
-    b184:	e59f3104 	ldr	r3, [pc, #260]	; b290 <.text+0xb290>
-    b188:	e5d33000 	ldrb	r3, [r3]
-    b18c:	e2833001 	add	r3, r3, #1	; 0x1
-    b190:	e20330ff 	and	r3, r3, #255	; 0xff
-    b194:	e59f20f4 	ldr	r2, [pc, #244]	; b290 <.text+0xb290>
-    b198:	e5c23000 	strb	r3, [r2]
-    b19c:	ea00001b 	b	b210 <.text+0xb210>
-    b1a0:	e59f30ec 	ldr	r3, [pc, #236]	; b294 <.text+0xb294>
-    b1a4:	e5d33000 	ldrb	r3, [r3]
-    b1a8:	e20330ff 	and	r3, r3, #255	; 0xff
-    b1ac:	e3530000 	cmp	r3, #0	; 0x0
-    b1b0:	0a00000c 	beq	b1e8 <.text+0xb1e8>
-    b1b4:	e59f20d8 	ldr	r2, [pc, #216]	; b294 <.text+0xb294>
-    b1b8:	e3a03000 	mov	r3, #0	; 0x0
-    b1bc:	e5c23000 	strb	r3, [r2]
-    b1c0:	e59f20ec 	ldr	r2, [pc, #236]	; b2b4 <.text+0xb2b4>
-    b1c4:	e3a03002 	mov	r3, #2	; 0x2
-    b1c8:	e5c23000 	strb	r3, [r2]
-    b1cc:	e59f20a8 	ldr	r2, [pc, #168]	; b27c <.text+0xb27c>
-    b1d0:	e3a03000 	mov	r3, #0	; 0x0
-    b1d4:	e5c23000 	strb	r3, [r2]
-    b1d8:	e59f20b0 	ldr	r2, [pc, #176]	; b290 <.text+0xb290>
-    b1dc:	e3a03000 	mov	r3, #0	; 0x0
-    b1e0:	e5c23000 	strb	r3, [r2]
-    b1e4:	ea000009 	b	b210 <.text+0xb210>
-    b1e8:	e59f30a0 	ldr	r3, [pc, #160]	; b290 <.text+0xb290>
-    b1ec:	e5d33000 	ldrb	r3, [r3]
-    b1f0:	e2833001 	add	r3, r3, #1	; 0x1
-    b1f4:	e20330ff 	and	r3, r3, #255	; 0xff
-    b1f8:	e59f2090 	ldr	r2, [pc, #144]	; b290 <.text+0xb290>
-    b1fc:	e5c23000 	strb	r3, [r2]
-    b200:	ea000002 	b	b210 <.text+0xb210>
-    b204:	e59f3070 	ldr	r3, [pc, #112]	; b27c <.text+0xb27c>
-    b208:	e3a02000 	mov	r2, #0	; 0x0
-    b20c:	e5c32000 	strb	r2, [r3]
-    b210:	e59f3078 	ldr	r3, [pc, #120]	; b290 <.text+0xb290>
-    b214:	e5d33000 	ldrb	r3, [r3]
-    b218:	e35300c8 	cmp	r3, #200	; 0xc8
-    b21c:	9a000013 	bls	b270 <.text+0xb270>
-    b220:	e59f3058 	ldr	r3, [pc, #88]	; b280 <.text+0xb280>
-    b224:	e5d33000 	ldrb	r3, [r3]
-    b228:	e3530000 	cmp	r3, #0	; 0x0
-    b22c:	0a000006 	beq	b24c <.text+0xb24c>
-    b230:	e59f2044 	ldr	r2, [pc, #68]	; b27c <.text+0xb27c>
-    b234:	e3a03000 	mov	r3, #0	; 0x0
-    b238:	e5c23000 	strb	r3, [r2]
-    b23c:	e59f204c 	ldr	r2, [pc, #76]	; b290 <.text+0xb290>
-    b240:	e3a03000 	mov	r3, #0	; 0x0
-    b244:	e5c23000 	strb	r3, [r2]
-    b248:	ea000008 	b	b270 <.text+0xb270>
-    b24c:	e59f2028 	ldr	r2, [pc, #40]	; b27c <.text+0xb27c>
-    b250:	e3a03000 	mov	r3, #0	; 0x0
-    b254:	e5c23000 	strb	r3, [r2]
-    b258:	e59f2030 	ldr	r2, [pc, #48]	; b290 <.text+0xb290>
-    b25c:	e3a03000 	mov	r3, #0	; 0x0
-    b260:	e5c23000 	strb	r3, [r2]
-    b264:	e59f2048 	ldr	r2, [pc, #72]	; b2b4 <.text+0xb2b4>
-    b268:	e3a03003 	mov	r3, #3	; 0x3
-    b26c:	e5c23000 	strb	r3, [r2]
-    b270:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    b274:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    b278:	e12fff1e 	bx	lr
-    b27c:	40000ac3 	andmi	r0, r0, r3, asr #21
-    b280:	40000ac0 	andmi	r0, r0, r0, asr #21
-    b284:	00014e63 	andeq	r4, r1, r3, ror #28
-    b288:	00014d60 	andeq	r4, r1, r0, ror #26
-    b28c:	400008e0 	andmi	r0, r0, r0, ror #17
-    b290:	40000ac1 	andmi	r0, r0, r1, asr #21
-    b294:	400008ea 	andmi	r0, r0, sl, ror #17
-    b298:	00014d7a 	andeq	r4, r1, sl, ror sp
-    b29c:	40000ac2 	andmi	r0, r0, r2, asr #21
-    b2a0:	00014d84 	andeq	r4, r1, r4, lsl #27
-    b2a4:	00014e16 	andeq	r4, r1, r6, lsl lr
-    b2a8:	00014e44 	andeq	r4, r1, r4, asr #28
-    b2ac:	00014e08 	andeq	r4, r1, r8, lsl #28
-    b2b0:	00014e50 	andeq	r4, r1, r0, asr lr
-    b2b4:	40000bf0 	strmid	r0, [r0], -r0
-
-0000b2b8 <_read_r>:
-    b2b8:	e1a0c00d 	mov	ip, sp
-    b2bc:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    b2c0:	e24cb004 	sub	fp, ip, #4	; 0x4
-    b2c4:	e24dd020 	sub	sp, sp, #32	; 0x20
-    b2c8:	e50b001c 	str	r0, [fp, #-28]
-    b2cc:	e50b1020 	str	r1, [fp, #-32]
-    b2d0:	e50b2024 	str	r2, [fp, #-36]
-    b2d4:	e50b3028 	str	r3, [fp, #-40]
-    b2d8:	e51b3024 	ldr	r3, [fp, #-36]
-    b2dc:	e50b3010 	str	r3, [fp, #-16]
-    b2e0:	e3a03000 	mov	r3, #0	; 0x0
-    b2e4:	e50b3014 	str	r3, [fp, #-20]
-    b2e8:	ea00001f 	b	b36c <_read_r+0xb4>
-    b2ec:	ebfff7f6 	bl	92cc <UARTReadChar>
-    b2f0:	e1a03000 	mov	r3, r0
-    b2f4:	e54b3015 	strb	r3, [fp, #-21]
-    b2f8:	e51b2010 	ldr	r2, [fp, #-16]
-    b2fc:	e55b3015 	ldrb	r3, [fp, #-21]
-    b300:	e5c23000 	strb	r3, [r2]
-    b304:	e51b3010 	ldr	r3, [fp, #-16]
-    b308:	e2833001 	add	r3, r3, #1	; 0x1
-    b30c:	e50b3010 	str	r3, [fp, #-16]
-    b310:	e55b3015 	ldrb	r3, [fp, #-21]
-    b314:	e1a00003 	mov	r0, r3
-    b318:	ebfff7d7 	bl	927c <UARTWriteChar>
-    b31c:	e55b3015 	ldrb	r3, [fp, #-21]
-    b320:	e353000d 	cmp	r3, #13	; 0xd
-    b324:	1a00000d 	bne	b360 <_read_r+0xa8>
-    b328:	e51b3014 	ldr	r3, [fp, #-20]
-    b32c:	e51b2028 	ldr	r2, [fp, #-40]
-    b330:	e2422002 	sub	r2, r2, #2	; 0x2
-    b334:	e1530002 	cmp	r3, r2
-    b338:	8a000008 	bhi	b360 <_read_r+0xa8>
-    b33c:	e51b2010 	ldr	r2, [fp, #-16]
-    b340:	e3a0300a 	mov	r3, #10	; 0xa
-    b344:	e5c23000 	strb	r3, [r2]
-    b348:	e3a0000a 	mov	r0, #10	; 0xa
-    b34c:	ebfff7ca 	bl	927c <UARTWriteChar>
-    b350:	e51b3014 	ldr	r3, [fp, #-20]
-    b354:	e2833002 	add	r3, r3, #2	; 0x2
-    b358:	e50b302c 	str	r3, [fp, #-44]
-    b35c:	ea000008 	b	b384 <_read_r+0xcc>
-    b360:	e51b3014 	ldr	r3, [fp, #-20]
-    b364:	e2833001 	add	r3, r3, #1	; 0x1
-    b368:	e50b3014 	str	r3, [fp, #-20]
-    b36c:	e51b2014 	ldr	r2, [fp, #-20]
-    b370:	e51b3028 	ldr	r3, [fp, #-40]
-    b374:	e1520003 	cmp	r2, r3
-    b378:	3affffdb 	bcc	b2ec <_read_r+0x34>
-    b37c:	e51b3014 	ldr	r3, [fp, #-20]
-    b380:	e50b302c 	str	r3, [fp, #-44]
-    b384:	e51b302c 	ldr	r3, [fp, #-44]
-    b388:	e1a00003 	mov	r0, r3
-    b38c:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    b390:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    b394:	e12fff1e 	bx	lr
-
-0000b398 <_write_r>:
-    b398:	e1a0c00d 	mov	ip, sp
-    b39c:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    b3a0:	e24cb004 	sub	fp, ip, #4	; 0x4
-    b3a4:	e24dd018 	sub	sp, sp, #24	; 0x18
-    b3a8:	e50b0018 	str	r0, [fp, #-24]
-    b3ac:	e50b101c 	str	r1, [fp, #-28]
-    b3b0:	e50b2020 	str	r2, [fp, #-32]
-    b3b4:	e50b3024 	str	r3, [fp, #-36]
-    b3b8:	e51b3020 	ldr	r3, [fp, #-32]
-    b3bc:	e50b3010 	str	r3, [fp, #-16]
-    b3c0:	e3a03000 	mov	r3, #0	; 0x0
-    b3c4:	e50b3014 	str	r3, [fp, #-20]
-    b3c8:	ea000010 	b	b410 <_write_r+0x78>
-    b3cc:	e51b3010 	ldr	r3, [fp, #-16]
-    b3d0:	e5d33000 	ldrb	r3, [r3]
-    b3d4:	e353000a 	cmp	r3, #10	; 0xa
-    b3d8:	1a000001 	bne	b3e4 <_write_r+0x4c>
-    b3dc:	e3a0000d 	mov	r0, #13	; 0xd
-    b3e0:	ebfff7a5 	bl	927c <UARTWriteChar>
-    b3e4:	e51b3010 	ldr	r3, [fp, #-16]
-    b3e8:	e5d33000 	ldrb	r3, [r3]
-    b3ec:	e1a02003 	mov	r2, r3
-    b3f0:	e51b3010 	ldr	r3, [fp, #-16]
-    b3f4:	e2833001 	add	r3, r3, #1	; 0x1
-    b3f8:	e50b3010 	str	r3, [fp, #-16]
-    b3fc:	e1a00002 	mov	r0, r2
-    b400:	ebfff79d 	bl	927c <UARTWriteChar>
-    b404:	e51b3014 	ldr	r3, [fp, #-20]
-    b408:	e2833001 	add	r3, r3, #1	; 0x1
-    b40c:	e50b3014 	str	r3, [fp, #-20]
-    b410:	e51b2014 	ldr	r2, [fp, #-20]
-    b414:	e51b3024 	ldr	r3, [fp, #-36]
-    b418:	e1520003 	cmp	r2, r3
-    b41c:	3affffea 	bcc	b3cc <_write_r+0x34>
-    b420:	e51b3024 	ldr	r3, [fp, #-36]
-    b424:	e1a00003 	mov	r0, r3
-    b428:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    b42c:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    b430:	e12fff1e 	bx	lr
-
-0000b434 <_close_r>:
-    b434:	e1a0c00d 	mov	ip, sp
-    b438:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    b43c:	e24cb004 	sub	fp, ip, #4	; 0x4
-    b440:	e24dd008 	sub	sp, sp, #8	; 0x8
-    b444:	e50b0010 	str	r0, [fp, #-16]
-    b448:	e50b1014 	str	r1, [fp, #-20]
-    b44c:	e3a03000 	mov	r3, #0	; 0x0
-    b450:	e1a00003 	mov	r0, r3
-    b454:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    b458:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    b45c:	e12fff1e 	bx	lr
-
-0000b460 <_lseek_r>:
-    b460:	e1a0c00d 	mov	ip, sp
-    b464:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    b468:	e24cb004 	sub	fp, ip, #4	; 0x4
-    b46c:	e24dd010 	sub	sp, sp, #16	; 0x10
-    b470:	e50b0010 	str	r0, [fp, #-16]
-    b474:	e50b1014 	str	r1, [fp, #-20]
-    b478:	e50b2018 	str	r2, [fp, #-24]
-    b47c:	e50b301c 	str	r3, [fp, #-28]
-    b480:	e3a03000 	mov	r3, #0	; 0x0
-    b484:	e1a00003 	mov	r0, r3
-    b488:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    b48c:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    b490:	e12fff1e 	bx	lr
-
-0000b494 <_fstat_r>:
-    b494:	e1a0c00d 	mov	ip, sp
-    b498:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    b49c:	e24cb004 	sub	fp, ip, #4	; 0x4
-    b4a0:	e24dd00c 	sub	sp, sp, #12	; 0xc
-    b4a4:	e50b0010 	str	r0, [fp, #-16]
-    b4a8:	e50b1014 	str	r1, [fp, #-20]
-    b4ac:	e50b2018 	str	r2, [fp, #-24]
-    b4b0:	e51b2018 	ldr	r2, [fp, #-24]
-    b4b4:	e3a03a02 	mov	r3, #8192	; 0x2000
-    b4b8:	e5823004 	str	r3, [r2, #4]
-    b4bc:	e3a03000 	mov	r3, #0	; 0x0
-    b4c0:	e1a00003 	mov	r0, r3
-    b4c4:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    b4c8:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    b4cc:	e12fff1e 	bx	lr
-
-0000b4d0 <isatty>:
-    b4d0:	e1a0c00d 	mov	ip, sp
-    b4d4:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    b4d8:	e24cb004 	sub	fp, ip, #4	; 0x4
-    b4dc:	e24dd004 	sub	sp, sp, #4	; 0x4
-    b4e0:	e50b0010 	str	r0, [fp, #-16]
-    b4e4:	e3a03001 	mov	r3, #1	; 0x1
-    b4e8:	e1a00003 	mov	r0, r3
-    b4ec:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    b4f0:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    b4f4:	e12fff1e 	bx	lr
-
-0000b4f8 <_sbrk_r>:
-    b4f8:	e1a0c00d 	mov	ip, sp
-    b4fc:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    b500:	e24cb004 	sub	fp, ip, #4	; 0x4
-    b504:	e24dd00c 	sub	sp, sp, #12	; 0xc
-    b508:	e50b0014 	str	r0, [fp, #-20]
-    b50c:	e50b1018 	str	r1, [fp, #-24]
-    b510:	e59f304c 	ldr	r3, [pc, #76]	; b564 <.text+0xb564>
-    b514:	e5933000 	ldr	r3, [r3]
-    b518:	e3530000 	cmp	r3, #0	; 0x0
-    b51c:	1a000002 	bne	b52c <_sbrk_r+0x34>
-    b520:	e59f203c 	ldr	r2, [pc, #60]	; b564 <.text+0xb564>
-    b524:	e59f303c 	ldr	r3, [pc, #60]	; b568 <.text+0xb568>
-    b528:	e5823000 	str	r3, [r2]
-    b52c:	e59f3030 	ldr	r3, [pc, #48]	; b564 <.text+0xb564>
-    b530:	e5933000 	ldr	r3, [r3]
-    b534:	e50b3010 	str	r3, [fp, #-16]
-    b538:	e59f3024 	ldr	r3, [pc, #36]	; b564 <.text+0xb564>
-    b53c:	e5932000 	ldr	r2, [r3]
-    b540:	e51b3018 	ldr	r3, [fp, #-24]
-    b544:	e0822003 	add	r2, r2, r3
-    b548:	e59f3014 	ldr	r3, [pc, #20]	; b564 <.text+0xb564>
-    b54c:	e5832000 	str	r2, [r3]
-    b550:	e51b3010 	ldr	r3, [fp, #-16]
-    b554:	e1a00003 	mov	r0, r3
-    b558:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    b55c:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    b560:	e12fff1e 	bx	lr
-    b564:	40000ac4 	andmi	r0, r0, r4, asr #21
-    b568:	40003a00 	andmi	r3, r0, r0, lsl #20
-
-0000b56c <I2C0MasterHandler>:
-    b56c:	e1a0c00d 	mov	ip, sp
-    b570:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    b574:	e24cb004 	sub	fp, ip, #4	; 0x4
-    b578:	e24dd004 	sub	sp, sp, #4	; 0x4
-    b57c:	e3a0324e 	mov	r3, #-536870908	; 0xe0000004
-    b580:	e2833907 	add	r3, r3, #114688	; 0x1c000
-    b584:	e5933000 	ldr	r3, [r3]
-    b588:	e54b300d 	strb	r3, [fp, #-13]
-    b58c:	e55b300d 	ldrb	r3, [fp, #-13]
-    b590:	e2433008 	sub	r3, r3, #8	; 0x8
-    b594:	e3530050 	cmp	r3, #80	; 0x50
-    b598:	979ff103 	ldrls	pc, [pc, r3, lsl #2]
-    b59c:	ea000106 	b	b9bc <.text+0xb9bc>
-    b5a0:	0000b6e4 	andeq	fp, r0, r4, ror #13
-    b5a4:	0000b9bc 	streqh	fp, [r0], -ip
-    b5a8:	0000b9bc 	streqh	fp, [r0], -ip
-    b5ac:	0000b9bc 	streqh	fp, [r0], -ip
-    b5b0:	0000b9bc 	streqh	fp, [r0], -ip
-    b5b4:	0000b9bc 	streqh	fp, [r0], -ip
-    b5b8:	0000b9bc 	streqh	fp, [r0], -ip
-    b5bc:	0000b9bc 	streqh	fp, [r0], -ip
-    b5c0:	0000b71c 	andeq	fp, r0, ip, lsl r7
-    b5c4:	0000b9bc 	streqh	fp, [r0], -ip
-    b5c8:	0000b9bc 	streqh	fp, [r0], -ip
-    b5cc:	0000b9bc 	streqh	fp, [r0], -ip
-    b5d0:	0000b9bc 	streqh	fp, [r0], -ip
-    b5d4:	0000b9bc 	streqh	fp, [r0], -ip
-    b5d8:	0000b9bc 	streqh	fp, [r0], -ip
-    b5dc:	0000b9bc 	streqh	fp, [r0], -ip
-    b5e0:	0000b774 	andeq	fp, r0, r4, ror r7
-    b5e4:	0000b9bc 	streqh	fp, [r0], -ip
-    b5e8:	0000b9bc 	streqh	fp, [r0], -ip
-    b5ec:	0000b9bc 	streqh	fp, [r0], -ip
-    b5f0:	0000b9bc 	streqh	fp, [r0], -ip
-    b5f4:	0000b9bc 	streqh	fp, [r0], -ip
-    b5f8:	0000b9bc 	streqh	fp, [r0], -ip
-    b5fc:	0000b9bc 	streqh	fp, [r0], -ip
-    b600:	0000b998 	muleq	r0, r8, r9
-    b604:	0000b9bc 	streqh	fp, [r0], -ip
-    b608:	0000b9bc 	streqh	fp, [r0], -ip
-    b60c:	0000b9bc 	streqh	fp, [r0], -ip
-    b610:	0000b9bc 	streqh	fp, [r0], -ip
-    b614:	0000b9bc 	streqh	fp, [r0], -ip
-    b618:	0000b9bc 	streqh	fp, [r0], -ip
-    b61c:	0000b9bc 	streqh	fp, [r0], -ip
-    b620:	0000b7dc 	ldreqd	fp, [r0], -ip
-    b624:	0000b9bc 	streqh	fp, [r0], -ip
-    b628:	0000b9bc 	streqh	fp, [r0], -ip
-    b62c:	0000b9bc 	streqh	fp, [r0], -ip
-    b630:	0000b9bc 	streqh	fp, [r0], -ip
-    b634:	0000b9bc 	streqh	fp, [r0], -ip
-    b638:	0000b9bc 	streqh	fp, [r0], -ip
-    b63c:	0000b9bc 	streqh	fp, [r0], -ip
-    b640:	0000b7dc 	ldreqd	fp, [r0], -ip
-    b644:	0000b9bc 	streqh	fp, [r0], -ip
-    b648:	0000b9bc 	streqh	fp, [r0], -ip
-    b64c:	0000b9bc 	streqh	fp, [r0], -ip
-    b650:	0000b9bc 	streqh	fp, [r0], -ip
-    b654:	0000b9bc 	streqh	fp, [r0], -ip
-    b658:	0000b9bc 	streqh	fp, [r0], -ip
-    b65c:	0000b9bc 	streqh	fp, [r0], -ip
-    b660:	0000b9bc 	streqh	fp, [r0], -ip
-    b664:	0000b9bc 	streqh	fp, [r0], -ip
-    b668:	0000b9bc 	streqh	fp, [r0], -ip
-    b66c:	0000b9bc 	streqh	fp, [r0], -ip
-    b670:	0000b9bc 	streqh	fp, [r0], -ip
-    b674:	0000b9bc 	streqh	fp, [r0], -ip
-    b678:	0000b9bc 	streqh	fp, [r0], -ip
-    b67c:	0000b9bc 	streqh	fp, [r0], -ip
-    b680:	0000b8e0 	andeq	fp, r0, r0, ror #17
-    b684:	0000b9bc 	streqh	fp, [r0], -ip
-    b688:	0000b9bc 	streqh	fp, [r0], -ip
-    b68c:	0000b9bc 	streqh	fp, [r0], -ip
-    b690:	0000b9bc 	streqh	fp, [r0], -ip
-    b694:	0000b9bc 	streqh	fp, [r0], -ip
-    b698:	0000b9bc 	streqh	fp, [r0], -ip
-    b69c:	0000b9bc 	streqh	fp, [r0], -ip
-    b6a0:	0000b998 	muleq	r0, r8, r9
-    b6a4:	0000b9bc 	streqh	fp, [r0], -ip
-    b6a8:	0000b9bc 	streqh	fp, [r0], -ip
-    b6ac:	0000b9bc 	streqh	fp, [r0], -ip
-    b6b0:	0000b9bc 	streqh	fp, [r0], -ip
-    b6b4:	0000b9bc 	streqh	fp, [r0], -ip
-    b6b8:	0000b9bc 	streqh	fp, [r0], -ip
-    b6bc:	0000b9bc 	streqh	fp, [r0], -ip
-    b6c0:	0000b8f8 	streqd	fp, [r0], -r8
-    b6c4:	0000b9bc 	streqh	fp, [r0], -ip
-    b6c8:	0000b9bc 	streqh	fp, [r0], -ip
-    b6cc:	0000b9bc 	streqh	fp, [r0], -ip
-    b6d0:	0000b9bc 	streqh	fp, [r0], -ip
-    b6d4:	0000b9bc 	streqh	fp, [r0], -ip
-    b6d8:	0000b9bc 	streqh	fp, [r0], -ip
-    b6dc:	0000b9bc 	streqh	fp, [r0], -ip
-    b6e0:	0000b8f8 	streqd	fp, [r0], -r8
-    b6e4:	e3a0228e 	mov	r2, #-536870904	; 0xe0000008
-    b6e8:	e2822907 	add	r2, r2, #114688	; 0x1c000
-    b6ec:	e59f32f8 	ldr	r3, [pc, #760]	; b9ec <.text+0xb9ec>
-    b6f0:	e5d33000 	ldrb	r3, [r3]
-    b6f4:	e5823000 	str	r3, [r2]
-    b6f8:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    b6fc:	e2833907 	add	r3, r3, #114688	; 0x1c000
-    b700:	e2833018 	add	r3, r3, #24	; 0x18
-    b704:	e3a02028 	mov	r2, #40	; 0x28
-    b708:	e5832000 	str	r2, [r3]
-    b70c:	e59f22dc 	ldr	r2, [pc, #732]	; b9f0 <.text+0xb9f0>
-    b710:	e3a03001 	mov	r3, #1	; 0x1
-    b714:	e5823000 	str	r3, [r2]
-    b718:	ea0000ac 	b	b9d0 <.text+0xb9d0>
-    b71c:	e59f32d0 	ldr	r3, [pc, #720]	; b9f4 <.text+0xb9f4>
-    b720:	e5933000 	ldr	r3, [r3]
-    b724:	e3530001 	cmp	r3, #1	; 0x1
-    b728:	0a000003 	beq	b73c <.text+0xb73c>
-    b72c:	e59f32c0 	ldr	r3, [pc, #704]	; b9f4 <.text+0xb9f4>
-    b730:	e5933000 	ldr	r3, [r3]
-    b734:	e3530002 	cmp	r3, #2	; 0x2
-    b738:	1a000004 	bne	b750 <.text+0xb750>
-    b73c:	e3a0228e 	mov	r2, #-536870904	; 0xe0000008
-    b740:	e2822907 	add	r2, r2, #114688	; 0x1c000
-    b744:	e59f32a0 	ldr	r3, [pc, #672]	; b9ec <.text+0xb9ec>
-    b748:	e5d33002 	ldrb	r3, [r3, #2]
-    b74c:	e5823000 	str	r3, [r2]
-    b750:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    b754:	e2833907 	add	r3, r3, #114688	; 0x1c000
-    b758:	e2833018 	add	r3, r3, #24	; 0x18
-    b75c:	e3a02028 	mov	r2, #40	; 0x28
-    b760:	e5832000 	str	r2, [r3]
-    b764:	e59f2284 	ldr	r2, [pc, #644]	; b9f0 <.text+0xb9f0>
-    b768:	e3a03002 	mov	r3, #2	; 0x2
-    b76c:	e5823000 	str	r3, [r2]
-    b770:	ea000096 	b	b9d0 <.text+0xb9d0>
-    b774:	e59f3274 	ldr	r3, [pc, #628]	; b9f0 <.text+0xb9f0>
-    b778:	e5933000 	ldr	r3, [r3]
-    b77c:	e3530001 	cmp	r3, #1	; 0x1
-    b780:	1a00000f 	bne	b7c4 <.text+0xb7c4>
-    b784:	e3a0228e 	mov	r2, #-536870904	; 0xe0000008
-    b788:	e2822907 	add	r2, r2, #114688	; 0x1c000
-    b78c:	e59f3264 	ldr	r3, [pc, #612]	; b9f8 <.text+0xb9f8>
-    b790:	e5933000 	ldr	r3, [r3]
-    b794:	e2831001 	add	r1, r3, #1	; 0x1
-    b798:	e59f324c 	ldr	r3, [pc, #588]	; b9ec <.text+0xb9ec>
-    b79c:	e7d33001 	ldrb	r3, [r3, r1]
-    b7a0:	e5823000 	str	r3, [r2]
-    b7a4:	e59f324c 	ldr	r3, [pc, #588]	; b9f8 <.text+0xb9f8>
-    b7a8:	e5933000 	ldr	r3, [r3]
-    b7ac:	e2832001 	add	r2, r3, #1	; 0x1
-    b7b0:	e59f3240 	ldr	r3, [pc, #576]	; b9f8 <.text+0xb9f8>
-    b7b4:	e5832000 	str	r2, [r3]
-    b7b8:	e59f2230 	ldr	r2, [pc, #560]	; b9f0 <.text+0xb9f0>
-    b7bc:	e3a03004 	mov	r3, #4	; 0x4
-    b7c0:	e5823000 	str	r3, [r2]
-    b7c4:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    b7c8:	e2833907 	add	r3, r3, #114688	; 0x1c000
-    b7cc:	e2833018 	add	r3, r3, #24	; 0x18
-    b7d0:	e3a02008 	mov	r2, #8	; 0x8
-    b7d4:	e5832000 	str	r2, [r3]
-    b7d8:	ea00007c 	b	b9d0 <.text+0xb9d0>
-    b7dc:	e59f3214 	ldr	r3, [pc, #532]	; b9f8 <.text+0xb9f8>
-    b7e0:	e5932000 	ldr	r2, [r3]
-    b7e4:	e59f3210 	ldr	r3, [pc, #528]	; b9fc <.text+0xb9fc>
-    b7e8:	e5933000 	ldr	r3, [r3]
-    b7ec:	e1520003 	cmp	r2, r3
-    b7f0:	0a000025 	beq	b88c <.text+0xb88c>
-    b7f4:	e3a0228e 	mov	r2, #-536870904	; 0xe0000008
-    b7f8:	e2822907 	add	r2, r2, #114688	; 0x1c000
-    b7fc:	e59f31f4 	ldr	r3, [pc, #500]	; b9f8 <.text+0xb9f8>
-    b800:	e5933000 	ldr	r3, [r3]
-    b804:	e2831001 	add	r1, r3, #1	; 0x1
-    b808:	e59f31dc 	ldr	r3, [pc, #476]	; b9ec <.text+0xb9ec>
-    b80c:	e7d33001 	ldrb	r3, [r3, r1]
-    b810:	e5823000 	str	r3, [r2]
-    b814:	e59f31dc 	ldr	r3, [pc, #476]	; b9f8 <.text+0xb9f8>
-    b818:	e5933000 	ldr	r3, [r3]
-    b81c:	e2832001 	add	r2, r3, #1	; 0x1
-    b820:	e59f31d0 	ldr	r3, [pc, #464]	; b9f8 <.text+0xb9f8>
-    b824:	e5832000 	str	r2, [r3]
-    b828:	e59f31c8 	ldr	r3, [pc, #456]	; b9f8 <.text+0xb9f8>
-    b82c:	e5932000 	ldr	r2, [r3]
-    b830:	e59f31c4 	ldr	r3, [pc, #452]	; b9fc <.text+0xb9fc>
-    b834:	e5933000 	ldr	r3, [r3]
-    b838:	e1520003 	cmp	r2, r3
-    b83c:	0a000003 	beq	b850 <.text+0xb850>
-    b840:	e59f21a8 	ldr	r2, [pc, #424]	; b9f0 <.text+0xb9f0>
-    b844:	e3a03004 	mov	r3, #4	; 0x4
-    b848:	e5823000 	str	r3, [r2]
-    b84c:	ea00001d 	b	b8c8 <.text+0xb8c8>
-    b850:	e59f2198 	ldr	r2, [pc, #408]	; b9f0 <.text+0xb9f0>
-    b854:	e3a03005 	mov	r3, #5	; 0x5
-    b858:	e5823000 	str	r3, [r2]
-    b85c:	e59f319c 	ldr	r3, [pc, #412]	; ba00 <.text+0xba00>
-    b860:	e5933000 	ldr	r3, [r3]
-    b864:	e3530000 	cmp	r3, #0	; 0x0
-    b868:	0a000016 	beq	b8c8 <.text+0xb8c8>
-    b86c:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    b870:	e2833907 	add	r3, r3, #114688	; 0x1c000
-    b874:	e3a02020 	mov	r2, #32	; 0x20
-    b878:	e5832000 	str	r2, [r3]
-    b87c:	e59f216c 	ldr	r2, [pc, #364]	; b9f0 <.text+0xb9f0>
-    b880:	e3a03003 	mov	r3, #3	; 0x3
-    b884:	e5823000 	str	r3, [r2]
-    b888:	ea00000e 	b	b8c8 <.text+0xb8c8>
-    b88c:	e59f316c 	ldr	r3, [pc, #364]	; ba00 <.text+0xba00>
-    b890:	e5933000 	ldr	r3, [r3]
-    b894:	e3530000 	cmp	r3, #0	; 0x0
-    b898:	0a000007 	beq	b8bc <.text+0xb8bc>
-    b89c:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    b8a0:	e2833907 	add	r3, r3, #114688	; 0x1c000
-    b8a4:	e3a02020 	mov	r2, #32	; 0x20
-    b8a8:	e5832000 	str	r2, [r3]
-    b8ac:	e59f213c 	ldr	r2, [pc, #316]	; b9f0 <.text+0xb9f0>
-    b8b0:	e3a03003 	mov	r3, #3	; 0x3
-    b8b4:	e5823000 	str	r3, [r2]
-    b8b8:	ea000002 	b	b8c8 <.text+0xb8c8>
-    b8bc:	e59f212c 	ldr	r2, [pc, #300]	; b9f0 <.text+0xb9f0>
-    b8c0:	e3a03005 	mov	r3, #5	; 0x5
-    b8c4:	e5823000 	str	r3, [r2]
-    b8c8:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    b8cc:	e2833907 	add	r3, r3, #114688	; 0x1c000
-    b8d0:	e2833018 	add	r3, r3, #24	; 0x18
-    b8d4:	e3a02008 	mov	r2, #8	; 0x8
-    b8d8:	e5832000 	str	r2, [r3]
-    b8dc:	ea00003b 	b	b9d0 <.text+0xb9d0>
-    b8e0:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    b8e4:	e2833907 	add	r3, r3, #114688	; 0x1c000
-    b8e8:	e2833018 	add	r3, r3, #24	; 0x18
-    b8ec:	e3a02008 	mov	r2, #8	; 0x8
-    b8f0:	e5832000 	str	r2, [r3]
-    b8f4:	ea000035 	b	b9d0 <.text+0xb9d0>
-    b8f8:	e59f3104 	ldr	r3, [pc, #260]	; ba04 <.text+0xba04>
-    b8fc:	e5933000 	ldr	r3, [r3]
-    b900:	e2831003 	add	r1, r3, #3	; 0x3
-    b904:	e3a0328e 	mov	r3, #-536870904	; 0xe0000008
-    b908:	e2833907 	add	r3, r3, #114688	; 0x1c000
-    b90c:	e5933000 	ldr	r3, [r3]
-    b910:	e20330ff 	and	r3, r3, #255	; 0xff
-    b914:	e59f20d0 	ldr	r2, [pc, #208]	; b9ec <.text+0xb9ec>
-    b918:	e7c23001 	strb	r3, [r2, r1]
-    b91c:	e59f30e0 	ldr	r3, [pc, #224]	; ba04 <.text+0xba04>
-    b920:	e5933000 	ldr	r3, [r3]
-    b924:	e2832001 	add	r2, r3, #1	; 0x1
-    b928:	e59f30d4 	ldr	r3, [pc, #212]	; ba04 <.text+0xba04>
-    b92c:	e5832000 	str	r2, [r3]
-    b930:	e59f30cc 	ldr	r3, [pc, #204]	; ba04 <.text+0xba04>
-    b934:	e5932000 	ldr	r2, [r3]
-    b938:	e59f30c0 	ldr	r3, [pc, #192]	; ba00 <.text+0xba00>
-    b93c:	e5933000 	ldr	r3, [r3]
-    b940:	e1520003 	cmp	r2, r3
-    b944:	0a000003 	beq	b958 <.text+0xb958>
-    b948:	e59f20a0 	ldr	r2, [pc, #160]	; b9f0 <.text+0xb9f0>
-    b94c:	e3a03004 	mov	r3, #4	; 0x4
-    b950:	e5823000 	str	r3, [r2]
-    b954:	ea000005 	b	b970 <.text+0xb970>
-    b958:	e59f20a4 	ldr	r2, [pc, #164]	; ba04 <.text+0xba04>
-    b95c:	e3a03000 	mov	r3, #0	; 0x0
-    b960:	e5823000 	str	r3, [r2]
-    b964:	e59f2084 	ldr	r2, [pc, #132]	; b9f0 <.text+0xb9f0>
-    b968:	e3a03005 	mov	r3, #5	; 0x5
-    b96c:	e5823000 	str	r3, [r2]
-    b970:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    b974:	e2833907 	add	r3, r3, #114688	; 0x1c000
-    b978:	e3a02004 	mov	r2, #4	; 0x4
-    b97c:	e5832000 	str	r2, [r3]
-    b980:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    b984:	e2833907 	add	r3, r3, #114688	; 0x1c000
-    b988:	e2833018 	add	r3, r3, #24	; 0x18
-    b98c:	e3a02008 	mov	r2, #8	; 0x8
-    b990:	e5832000 	str	r2, [r3]
-    b994:	ea00000d 	b	b9d0 <.text+0xb9d0>
-    b998:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    b99c:	e2833907 	add	r3, r3, #114688	; 0x1c000
-    b9a0:	e2833018 	add	r3, r3, #24	; 0x18
-    b9a4:	e3a02008 	mov	r2, #8	; 0x8
-    b9a8:	e5832000 	str	r2, [r3]
-    b9ac:	e59f203c 	ldr	r2, [pc, #60]	; b9f0 <.text+0xb9f0>
-    b9b0:	e3a03005 	mov	r3, #5	; 0x5
-    b9b4:	e5823000 	str	r3, [r2]
-    b9b8:	ea000004 	b	b9d0 <.text+0xb9d0>
-    b9bc:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    b9c0:	e2833907 	add	r3, r3, #114688	; 0x1c000
-    b9c4:	e2833018 	add	r3, r3, #24	; 0x18
-    b9c8:	e3a02008 	mov	r2, #8	; 0x8
-    b9cc:	e5832000 	str	r2, [r3]
-    b9d0:	e3a03000 	mov	r3, #0	; 0x0
-    b9d4:	e2433efd 	sub	r3, r3, #4048	; 0xfd0
-    b9d8:	e3a02000 	mov	r2, #0	; 0x0
-    b9dc:	e5832000 	str	r2, [r3]
-    b9e0:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    b9e4:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    b9e8:	e12fff1e 	bx	lr
-    b9ec:	40001da4 	andmi	r1, r0, r4, lsr #27
-    b9f0:	40000ac8 	andmi	r0, r0, r8, asr #21
-    b9f4:	40001dc4 	andmi	r1, r0, r4, asr #27
-    b9f8:	40000ad8 	ldrmid	r0, [r0], -r8
-    b9fc:	40001dc8 	andmi	r1, r0, r8, asr #27
-    ba00:	40001d7c 	andmi	r1, r0, ip, ror sp
-    ba04:	40000ad4 	ldrmid	r0, [r0], -r4
-
-0000ba08 <I2C0_send_motordata>:
-    ba08:	e1a0c00d 	mov	ip, sp
-    ba0c:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    ba10:	e24cb004 	sub	fp, ip, #4	; 0x4
-    ba14:	e59f2080 	ldr	r2, [pc, #128]	; ba9c <.text+0xba9c>
-    ba18:	e3a03000 	mov	r3, #0	; 0x0
-    ba1c:	e5823000 	str	r3, [r2]
-    ba20:	e59f2078 	ldr	r2, [pc, #120]	; baa0 <.text+0xbaa0>
-    ba24:	e3a03000 	mov	r3, #0	; 0x0
-    ba28:	e5823000 	str	r3, [r2]
-    ba2c:	e59f2070 	ldr	r2, [pc, #112]	; baa4 <.text+0xbaa4>
-    ba30:	e3a03005 	mov	r3, #5	; 0x5
-    ba34:	e5823000 	str	r3, [r2]
-    ba38:	e59f2068 	ldr	r2, [pc, #104]	; baa8 <.text+0xbaa8>
-    ba3c:	e3a03000 	mov	r3, #0	; 0x0
-    ba40:	e5823000 	str	r3, [r2]
-    ba44:	e59f2060 	ldr	r2, [pc, #96]	; baac <.text+0xbaac>
-    ba48:	e3a03002 	mov	r3, #2	; 0x2
-    ba4c:	e5c23000 	strb	r3, [r2]
-    ba50:	e59f2054 	ldr	r2, [pc, #84]	; baac <.text+0xbaac>
-    ba54:	e3a03064 	mov	r3, #100	; 0x64
-    ba58:	e5c23001 	strb	r3, [r2, #1]
-    ba5c:	e59f2048 	ldr	r2, [pc, #72]	; baac <.text+0xbaac>
-    ba60:	e3a03064 	mov	r3, #100	; 0x64
-    ba64:	e5c23002 	strb	r3, [r2, #2]
-    ba68:	e59f203c 	ldr	r2, [pc, #60]	; baac <.text+0xbaac>
-    ba6c:	e3a03064 	mov	r3, #100	; 0x64
-    ba70:	e5c23003 	strb	r3, [r2, #3]
-    ba74:	e59f2030 	ldr	r2, [pc, #48]	; baac <.text+0xbaac>
-    ba78:	e3a03001 	mov	r3, #1	; 0x1
-    ba7c:	e5c23004 	strb	r3, [r2, #4]
-    ba80:	e59f2028 	ldr	r2, [pc, #40]	; bab0 <.text+0xbab0>
-    ba84:	e3a03002 	mov	r3, #2	; 0x2
-    ba88:	e5823000 	str	r3, [r2]
-    ba8c:	eb000066 	bl	bc2c <I2CEngine>
-    ba90:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    ba94:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    ba98:	e12fff1e 	bx	lr
-    ba9c:	40000ad8 	ldrmid	r0, [r0], -r8
-    baa0:	40000ad4 	ldrmid	r0, [r0], -r4
-    baa4:	40001dc8 	andmi	r1, r0, r8, asr #27
-    baa8:	40001d7c 	andmi	r1, r0, ip, ror sp
-    baac:	40001da4 	andmi	r1, r0, r4, lsr #27
-    bab0:	40001dc4 	andmi	r1, r0, r4, asr #27
-
-0000bab4 <I2CStart>:
-    bab4:	e1a0c00d 	mov	ip, sp
-    bab8:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    babc:	e24cb004 	sub	fp, ip, #4	; 0x4
-    bac0:	e24dd008 	sub	sp, sp, #8	; 0x8
-    bac4:	e3a03000 	mov	r3, #0	; 0x0
-    bac8:	e50b3014 	str	r3, [fp, #-20]
-    bacc:	e3a03000 	mov	r3, #0	; 0x0
-    bad0:	e50b3010 	str	r3, [fp, #-16]
-    bad4:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    bad8:	e2833907 	add	r3, r3, #114688	; 0x1c000
-    badc:	e3a02020 	mov	r2, #32	; 0x20
-    bae0:	e5832000 	str	r2, [r3]
-    bae4:	e59f3058 	ldr	r3, [pc, #88]	; bb44 <.text+0xbb44>
-    bae8:	e5933000 	ldr	r3, [r3]
-    baec:	e3530001 	cmp	r3, #1	; 0x1
-    baf0:	1a000002 	bne	bb00 <I2CStart+0x4c>
-    baf4:	e3a03001 	mov	r3, #1	; 0x1
-    baf8:	e50b3010 	str	r3, [fp, #-16]
-    bafc:	ea00000b 	b	bb30 <I2CStart+0x7c>
-    bb00:	e51b2014 	ldr	r2, [fp, #-20]
-    bb04:	e3a03401 	mov	r3, #16777216	; 0x1000000
-    bb08:	e2433002 	sub	r3, r3, #2	; 0x2
-    bb0c:	e1520003 	cmp	r2, r3
-    bb10:	9a000002 	bls	bb20 <I2CStart+0x6c>
-    bb14:	e3a03000 	mov	r3, #0	; 0x0
-    bb18:	e50b3010 	str	r3, [fp, #-16]
-    bb1c:	ea000003 	b	bb30 <I2CStart+0x7c>
-    bb20:	e51b3014 	ldr	r3, [fp, #-20]
-    bb24:	e2833001 	add	r3, r3, #1	; 0x1
-    bb28:	e50b3014 	str	r3, [fp, #-20]
-    bb2c:	eaffffec 	b	bae4 <I2CStart+0x30>
-    bb30:	e51b3010 	ldr	r3, [fp, #-16]
-    bb34:	e1a00003 	mov	r0, r3
-    bb38:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    bb3c:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    bb40:	e12fff1e 	bx	lr
-    bb44:	40000ac8 	andmi	r0, r0, r8, asr #21
-
-0000bb48 <I2CStop>:
-    bb48:	e1a0c00d 	mov	ip, sp
-    bb4c:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    bb50:	e24cb004 	sub	fp, ip, #4	; 0x4
-    bb54:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    bb58:	e2833907 	add	r3, r3, #114688	; 0x1c000
-    bb5c:	e3a02010 	mov	r2, #16	; 0x10
-    bb60:	e5832000 	str	r2, [r3]
-    bb64:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    bb68:	e2833907 	add	r3, r3, #114688	; 0x1c000
-    bb6c:	e2833018 	add	r3, r3, #24	; 0x18
-    bb70:	e3a02008 	mov	r2, #8	; 0x8
-    bb74:	e5832000 	str	r2, [r3]
-    bb78:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    bb7c:	e2833907 	add	r3, r3, #114688	; 0x1c000
-    bb80:	e5933000 	ldr	r3, [r3]
-    bb84:	e2033010 	and	r3, r3, #16	; 0x10
-    bb88:	e3530000 	cmp	r3, #0	; 0x0
-    bb8c:	1afffff9 	bne	bb78 <I2CStop+0x30>
-    bb90:	e3a03001 	mov	r3, #1	; 0x1
-    bb94:	e1a00003 	mov	r0, r3
-    bb98:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    bb9c:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    bba0:	e12fff1e 	bx	lr
-
-0000bba4 <I2CInit>:
-    bba4:	e1a0c00d 	mov	ip, sp
-    bba8:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    bbac:	e24cb004 	sub	fp, ip, #4	; 0x4
-    bbb0:	e24dd004 	sub	sp, sp, #4	; 0x4
-    bbb4:	e50b0010 	str	r0, [fp, #-16]
-    bbb8:	e3a0228e 	mov	r2, #-536870904	; 0xe0000008
-    bbbc:	e282290a 	add	r2, r2, #163840	; 0x28000
-    bbc0:	e3a0328e 	mov	r3, #-536870904	; 0xe0000008
-    bbc4:	e283390a 	add	r3, r3, #163840	; 0x28000
-    bbc8:	e5933000 	ldr	r3, [r3]
-    bbcc:	e383300c 	orr	r3, r3, #12	; 0xc
-    bbd0:	e5823000 	str	r3, [r2]
-    bbd4:	e3a0324e 	mov	r3, #-536870908	; 0xe0000004
-    bbd8:	e283390a 	add	r3, r3, #163840	; 0x28000
-    bbdc:	e3a0200c 	mov	r2, #12	; 0xc
-    bbe0:	e5832000 	str	r2, [r3]
-    bbe4:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    bbe8:	e2833907 	add	r3, r3, #114688	; 0x1c000
-    bbec:	e2833018 	add	r3, r3, #24	; 0x18
-    bbf0:	e3a0206c 	mov	r2, #108	; 0x6c
-    bbf4:	e5832000 	str	r2, [r3]
-    bbf8:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    bbfc:	e2833907 	add	r3, r3, #114688	; 0x1c000
-    bc00:	e2833014 	add	r3, r3, #20	; 0x14
-    bc04:	e3a02080 	mov	r2, #128	; 0x80
-    bc08:	e5832000 	str	r2, [r3]
-    bc0c:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    bc10:	e2833907 	add	r3, r3, #114688	; 0x1c000
-    bc14:	e2833010 	add	r3, r3, #16	; 0x10
-    bc18:	e3a02080 	mov	r2, #128	; 0x80
-    bc1c:	e5832000 	str	r2, [r3]
-    bc20:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    bc24:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    bc28:	e12fff1e 	bx	lr
-
-0000bc2c <I2CEngine>:
-    bc2c:	e1a0c00d 	mov	ip, sp
-    bc30:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    bc34:	e24cb004 	sub	fp, ip, #4	; 0x4
-    bc38:	e24dd004 	sub	sp, sp, #4	; 0x4
-    bc3c:	e59f206c 	ldr	r2, [pc, #108]	; bcb0 <.text+0xbcb0>
-    bc40:	e3a03000 	mov	r3, #0	; 0x0
-    bc44:	e5823000 	str	r3, [r2]
-    bc48:	e59f2064 	ldr	r2, [pc, #100]	; bcb4 <.text+0xbcb4>
-    bc4c:	e3a03000 	mov	r3, #0	; 0x0
-    bc50:	e5823000 	str	r3, [r2]
-    bc54:	e59f205c 	ldr	r2, [pc, #92]	; bcb8 <.text+0xbcb8>
-    bc58:	e3a03000 	mov	r3, #0	; 0x0
-    bc5c:	e5823000 	str	r3, [r2]
-    bc60:	ebffff93 	bl	bab4 <I2CStart>
-    bc64:	e1a03000 	mov	r3, r0
-    bc68:	e3530001 	cmp	r3, #1	; 0x1
-    bc6c:	0a000003 	beq	bc80 <I2CEngine+0x54>
-    bc70:	ebffffb4 	bl	bb48 <I2CStop>
-    bc74:	e3a03000 	mov	r3, #0	; 0x0
-    bc78:	e50b3010 	str	r3, [fp, #-16]
-    bc7c:	ea000006 	b	bc9c <I2CEngine+0x70>
-    bc80:	e59f3028 	ldr	r3, [pc, #40]	; bcb0 <.text+0xbcb0>
-    bc84:	e5933000 	ldr	r3, [r3]
-    bc88:	e3530005 	cmp	r3, #5	; 0x5
-    bc8c:	1afffffb 	bne	bc80 <I2CEngine+0x54>
-    bc90:	ebffffac 	bl	bb48 <I2CStop>
-    bc94:	e3a03001 	mov	r3, #1	; 0x1
-    bc98:	e50b3010 	str	r3, [fp, #-16]
-    bc9c:	e51b3010 	ldr	r3, [fp, #-16]
-    bca0:	e1a00003 	mov	r0, r3
-    bca4:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    bca8:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    bcac:	e12fff1e 	bx	lr
-    bcb0:	40000ac8 	andmi	r0, r0, r8, asr #21
-    bcb4:	40000ad4 	ldrmid	r0, [r0], -r4
-    bcb8:	40000ad8 	ldrmid	r0, [r0], -r8
-
-0000bcbc <ADCInit>:
-    bcbc:	e1a0c00d 	mov	ip, sp
-    bcc0:	e92dd810 	stmdb	sp!, {r4, fp, ip, lr, pc}
-    bcc4:	e24cb004 	sub	fp, ip, #4	; 0x4
-    bcc8:	e24dd004 	sub	sp, sp, #4	; 0x4
-    bccc:	e50b0014 	str	r0, [fp, #-20]
-    bcd0:	e3a0420e 	mov	r4, #-536870912	; 0xe0000000
-    bcd4:	e284490d 	add	r4, r4, #212992	; 0x34000
-    bcd8:	e3a008e5 	mov	r0, #15007744	; 0xe50000
-    bcdc:	e2400d79 	sub	r0, r0, #7744	; 0x1e40
-    bce0:	e51b1014 	ldr	r1, [fp, #-20]
-    bce4:	eb0023d8 	bl	14c4c <____udivsi3_from_arm>
-    bce8:	e1a03000 	mov	r3, r0
-    bcec:	e2433001 	sub	r3, r3, #1	; 0x1
-    bcf0:	e1a03403 	mov	r3, r3, lsl #8
-    bcf4:	e3833602 	orr	r3, r3, #2097152	; 0x200000
-    bcf8:	e3833001 	orr	r3, r3, #1	; 0x1
-    bcfc:	e5843000 	str	r3, [r4]
-    bd00:	e3a0420e 	mov	r4, #-536870912	; 0xe0000000
-    bd04:	e2844806 	add	r4, r4, #393216	; 0x60000
-    bd08:	e3a008e5 	mov	r0, #15007744	; 0xe50000
-    bd0c:	e2400d79 	sub	r0, r0, #7744	; 0x1e40
-    bd10:	e51b1014 	ldr	r1, [fp, #-20]
-    bd14:	eb0023cc 	bl	14c4c <____udivsi3_from_arm>
-    bd18:	e1a03000 	mov	r3, r0
-    bd1c:	e2433001 	sub	r3, r3, #1	; 0x1
-    bd20:	e1a03403 	mov	r3, r3, lsl #8
-    bd24:	e3833602 	orr	r3, r3, #2097152	; 0x200000
-    bd28:	e3833001 	orr	r3, r3, #1	; 0x1
-    bd2c:	e5843000 	str	r3, [r4]
-    bd30:	e3a03001 	mov	r3, #1	; 0x1
-    bd34:	e1a00003 	mov	r0, r3
-    bd38:	e24bd010 	sub	sp, fp, #16	; 0x10
-    bd3c:	e89d6810 	ldmia	sp, {r4, fp, sp, lr}
-    bd40:	e12fff1e 	bx	lr
-
-0000bd44 <ADC0Read>:
-    bd44:	e1a0c00d 	mov	ip, sp
-    bd48:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    bd4c:	e24cb004 	sub	fp, ip, #4	; 0x4
-    bd50:	e24dd014 	sub	sp, sp, #20	; 0x14
-    bd54:	e1a03000 	mov	r3, r0
-    bd58:	e54b301c 	strb	r3, [fp, #-28]
-    bd5c:	e3a03000 	mov	r3, #0	; 0x0
-    bd60:	e50b3018 	str	r3, [fp, #-24]
-    bd64:	e55b301c 	ldrb	r3, [fp, #-28]
-    bd68:	e3530007 	cmp	r3, #7	; 0x7
-    bd6c:	9a000001 	bls	bd78 <ADC0Read+0x34>
-    bd70:	e3a03000 	mov	r3, #0	; 0x0
-    bd74:	e54b301c 	strb	r3, [fp, #-28]
-    bd78:	e3a0220e 	mov	r2, #-536870912	; 0xe0000000
-    bd7c:	e282290d 	add	r2, r2, #212992	; 0x34000
-    bd80:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    bd84:	e283390d 	add	r3, r3, #212992	; 0x34000
-    bd88:	e5933000 	ldr	r3, [r3]
-    bd8c:	e3c330ff 	bic	r3, r3, #255	; 0xff
-    bd90:	e5823000 	str	r3, [r2]
-    bd94:	e3a0120e 	mov	r1, #-536870912	; 0xe0000000
-    bd98:	e281190d 	add	r1, r1, #212992	; 0x34000
-    bd9c:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    bda0:	e283390d 	add	r3, r3, #212992	; 0x34000
-    bda4:	e5930000 	ldr	r0, [r3]
-    bda8:	e55b201c 	ldrb	r2, [fp, #-28]
-    bdac:	e3a03001 	mov	r3, #1	; 0x1
-    bdb0:	e1a03213 	mov	r3, r3, lsl r2
-    bdb4:	e1803003 	orr	r3, r0, r3
-    bdb8:	e3833401 	orr	r3, r3, #16777216	; 0x1000000
-    bdbc:	e5813000 	str	r3, [r1]
-    bdc0:	ea000009 	b	bdec <ADC0Read+0xa8>
-    bdc4:	e55b301c 	ldrb	r3, [fp, #-28]
-    bdc8:	e1a03103 	mov	r3, r3, lsl #2
-    bdcc:	e283320e 	add	r3, r3, #-536870912	; 0xe0000000
-    bdd0:	e283390d 	add	r3, r3, #212992	; 0x34000
-    bdd4:	e2833010 	add	r3, r3, #16	; 0x10
-    bdd8:	e5933000 	ldr	r3, [r3]
-    bddc:	e50b3014 	str	r3, [fp, #-20]
-    bde0:	e51b3014 	ldr	r3, [fp, #-20]
-    bde4:	e3530000 	cmp	r3, #0	; 0x0
-    bde8:	ba00000a 	blt	be18 <ADC0Read+0xd4>
-    bdec:	e51b1018 	ldr	r1, [fp, #-24]
-    bdf0:	e3a03d4e 	mov	r3, #4992	; 0x1380
-    bdf4:	e2833007 	add	r3, r3, #7	; 0x7
-    bdf8:	e1510003 	cmp	r1, r3
-    bdfc:	83a03000 	movhi	r3, #0	; 0x0
-    be00:	93a03001 	movls	r3, #1	; 0x1
-    be04:	e20320ff 	and	r2, r3, #255	; 0xff
-    be08:	e2813001 	add	r3, r1, #1	; 0x1
-    be0c:	e50b3018 	str	r3, [fp, #-24]
-    be10:	e3520000 	cmp	r2, #0	; 0x0
-    be14:	1affffea 	bne	bdc4 <ADC0Read+0x80>
-    be18:	e3a0220e 	mov	r2, #-536870912	; 0xe0000000
-    be1c:	e282290d 	add	r2, r2, #212992	; 0x34000
-    be20:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    be24:	e283390d 	add	r3, r3, #212992	; 0x34000
-    be28:	e5933000 	ldr	r3, [r3]
-    be2c:	e3c33407 	bic	r3, r3, #117440512	; 0x7000000
-    be30:	e5823000 	str	r3, [r2]
-    be34:	e51b3014 	ldr	r3, [fp, #-20]
-    be38:	e2033101 	and	r3, r3, #1073741824	; 0x40000000
-    be3c:	e3530000 	cmp	r3, #0	; 0x0
-    be40:	0a000002 	beq	be50 <ADC0Read+0x10c>
-    be44:	e3a03000 	mov	r3, #0	; 0x0
-    be48:	e50b3020 	str	r3, [fp, #-32]
-    be4c:	ea000006 	b	be6c <ADC0Read+0x128>
-    be50:	e51b3014 	ldr	r3, [fp, #-20]
-    be54:	e1a03323 	mov	r3, r3, lsr #6
-    be58:	e1a03b03 	mov	r3, r3, lsl #22
-    be5c:	e1a03b23 	mov	r3, r3, lsr #22
-    be60:	e50b3010 	str	r3, [fp, #-16]
-    be64:	e51b3010 	ldr	r3, [fp, #-16]
-    be68:	e50b3020 	str	r3, [fp, #-32]
-    be6c:	e51b3020 	ldr	r3, [fp, #-32]
-    be70:	e1a00003 	mov	r0, r3
-    be74:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    be78:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    be7c:	e12fff1e 	bx	lr
-
-0000be80 <ADC1Read>:
-    be80:	e1a0c00d 	mov	ip, sp
-    be84:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    be88:	e24cb004 	sub	fp, ip, #4	; 0x4
-    be8c:	e24dd010 	sub	sp, sp, #16	; 0x10
-    be90:	e1a03000 	mov	r3, r0
-    be94:	e54b3018 	strb	r3, [fp, #-24]
-    be98:	e55b3018 	ldrb	r3, [fp, #-24]
-    be9c:	e3530007 	cmp	r3, #7	; 0x7
-    bea0:	9a000001 	bls	beac <ADC1Read+0x2c>
-    bea4:	e3a03000 	mov	r3, #0	; 0x0
-    bea8:	e54b3018 	strb	r3, [fp, #-24]
-    beac:	e3a0220e 	mov	r2, #-536870912	; 0xe0000000
-    beb0:	e2822806 	add	r2, r2, #393216	; 0x60000
-    beb4:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    beb8:	e2833806 	add	r3, r3, #393216	; 0x60000
-    bebc:	e5933000 	ldr	r3, [r3]
-    bec0:	e3c330ff 	bic	r3, r3, #255	; 0xff
-    bec4:	e5823000 	str	r3, [r2]
-    bec8:	e3a0120e 	mov	r1, #-536870912	; 0xe0000000
-    becc:	e2811806 	add	r1, r1, #393216	; 0x60000
-    bed0:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    bed4:	e2833806 	add	r3, r3, #393216	; 0x60000
-    bed8:	e5930000 	ldr	r0, [r3]
-    bedc:	e55b2018 	ldrb	r2, [fp, #-24]
-    bee0:	e3a03001 	mov	r3, #1	; 0x1
-    bee4:	e1a03213 	mov	r3, r3, lsl r2
-    bee8:	e1803003 	orr	r3, r0, r3
-    beec:	e3833401 	orr	r3, r3, #16777216	; 0x1000000
-    bef0:	e5813000 	str	r3, [r1]
-    bef4:	e55b3018 	ldrb	r3, [fp, #-24]
-    bef8:	e1a03103 	mov	r3, r3, lsl #2
-    befc:	e283320e 	add	r3, r3, #-536870912	; 0xe0000000
-    bf00:	e2833806 	add	r3, r3, #393216	; 0x60000
-    bf04:	e2833010 	add	r3, r3, #16	; 0x10
-    bf08:	e5933000 	ldr	r3, [r3]
-    bf0c:	e50b3014 	str	r3, [fp, #-20]
-    bf10:	e51b3014 	ldr	r3, [fp, #-20]
-    bf14:	e3530000 	cmp	r3, #0	; 0x0
-    bf18:	ba000000 	blt	bf20 <ADC1Read+0xa0>
-    bf1c:	eafffff4 	b	bef4 <ADC1Read+0x74>
-    bf20:	e3a0220e 	mov	r2, #-536870912	; 0xe0000000
-    bf24:	e2822806 	add	r2, r2, #393216	; 0x60000
-    bf28:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    bf2c:	e2833806 	add	r3, r3, #393216	; 0x60000
-    bf30:	e5933000 	ldr	r3, [r3]
-    bf34:	e3c33407 	bic	r3, r3, #117440512	; 0x7000000
-    bf38:	e5823000 	str	r3, [r2]
-    bf3c:	e51b3014 	ldr	r3, [fp, #-20]
-    bf40:	e2033101 	and	r3, r3, #1073741824	; 0x40000000
-    bf44:	e3530000 	cmp	r3, #0	; 0x0
-    bf48:	0a000002 	beq	bf58 <ADC1Read+0xd8>
-    bf4c:	e3a03000 	mov	r3, #0	; 0x0
-    bf50:	e50b301c 	str	r3, [fp, #-28]
-    bf54:	ea000006 	b	bf74 <ADC1Read+0xf4>
-    bf58:	e51b3014 	ldr	r3, [fp, #-20]
-    bf5c:	e1a03323 	mov	r3, r3, lsr #6
-    bf60:	e1a03b03 	mov	r3, r3, lsl #22
-    bf64:	e1a03b23 	mov	r3, r3, lsr #22
-    bf68:	e50b3010 	str	r3, [fp, #-16]
-    bf6c:	e51b3010 	ldr	r3, [fp, #-16]
-    bf70:	e50b301c 	str	r3, [fp, #-28]
-    bf74:	e51b301c 	ldr	r3, [fp, #-28]
-    bf78:	e1a00003 	mov	r0, r3
-    bf7c:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    bf80:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    bf84:	e12fff1e 	bx	lr
-
-0000bf88 <SSPHandler>:
-    bf88:	e1a0c00d 	mov	ip, sp
-    bf8c:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    bf90:	e24cb004 	sub	fp, ip, #4	; 0x4
-    bf94:	e24dd008 	sub	sp, sp, #8	; 0x8
-    bf98:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    bf9c:	e283391a 	add	r3, r3, #425984	; 0x68000
-    bfa0:	e283301c 	add	r3, r3, #28	; 0x1c
-    bfa4:	e5933000 	ldr	r3, [r3]
-    bfa8:	e50b3014 	str	r3, [fp, #-20]
-    bfac:	e51b3014 	ldr	r3, [fp, #-20]
-    bfb0:	e2033001 	and	r3, r3, #1	; 0x1
-    bfb4:	e20330ff 	and	r3, r3, #255	; 0xff
-    bfb8:	e3530000 	cmp	r3, #0	; 0x0
-    bfbc:	0a000004 	beq	bfd4 <SSPHandler+0x4c>
-    bfc0:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    bfc4:	e283391a 	add	r3, r3, #425984	; 0x68000
-    bfc8:	e2833020 	add	r3, r3, #32	; 0x20
-    bfcc:	e3a02001 	mov	r2, #1	; 0x1
-    bfd0:	e5832000 	str	r2, [r3]
-    bfd4:	e51b3014 	ldr	r3, [fp, #-20]
-    bfd8:	e2033002 	and	r3, r3, #2	; 0x2
-    bfdc:	e3530000 	cmp	r3, #0	; 0x0
-    bfe0:	0a000004 	beq	bff8 <SSPHandler+0x70>
-    bfe4:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    bfe8:	e283391a 	add	r3, r3, #425984	; 0x68000
-    bfec:	e2833020 	add	r3, r3, #32	; 0x20
-    bff0:	e3a02002 	mov	r2, #2	; 0x2
-    bff4:	e5832000 	str	r2, [r3]
-    bff8:	e51b3014 	ldr	r3, [fp, #-20]
-    bffc:	e2033004 	and	r3, r3, #4	; 0x4
-    c000:	e3530000 	cmp	r3, #0	; 0x0
-    c004:	0a000016 	beq	c064 <SSPHandler+0xdc>
-    c008:	ea00000f 	b	c04c <SSPHandler+0xc4>
-    c00c:	e3a0328e 	mov	r3, #-536870904	; 0xe0000008
-    c010:	e283391a 	add	r3, r3, #425984	; 0x68000
-    c014:	e5933000 	ldr	r3, [r3]
-    c018:	e14b30be 	strh	r3, [fp, #-14]
-    c01c:	e15b30be 	ldrh	r3, [fp, #-14]
-    c020:	e20330ff 	and	r3, r3, #255	; 0xff
-    c024:	e20330ff 	and	r3, r3, #255	; 0xff
-    c028:	e1a00003 	mov	r0, r3
-    c02c:	ebffd1bc 	bl	724 <SSP_rx_handler_HL>
-    c030:	e15b30be 	ldrh	r3, [fp, #-14]
-    c034:	e1a03423 	mov	r3, r3, lsr #8
-    c038:	e1a03803 	mov	r3, r3, lsl #16
-    c03c:	e1a03823 	mov	r3, r3, lsr #16
-    c040:	e20330ff 	and	r3, r3, #255	; 0xff
-    c044:	e1a00003 	mov	r0, r3
-    c048:	ebffd1b5 	bl	724 <SSP_rx_handler_HL>
-    c04c:	e3a032ce 	mov	r3, #-536870900	; 0xe000000c
-    c050:	e283391a 	add	r3, r3, #425984	; 0x68000
-    c054:	e5933000 	ldr	r3, [r3]
-    c058:	e2033004 	and	r3, r3, #4	; 0x4
-    c05c:	e3530000 	cmp	r3, #0	; 0x0
-    c060:	1affffe9 	bne	c00c <SSPHandler+0x84>
-    c064:	e51b3014 	ldr	r3, [fp, #-20]
-    c068:	e2033008 	and	r3, r3, #8	; 0x8
-    c06c:	e3530000 	cmp	r3, #0	; 0x0
-    c070:	0a00002f 	beq	c134 <SSPHandler+0x1ac>
-    c074:	ea000028 	b	c11c <SSPHandler+0x194>
-    c078:	e59f30d0 	ldr	r3, [pc, #208]	; c150 <.text+0xc150>
-    c07c:	e5933000 	ldr	r3, [r3]
-    c080:	e1a02003 	mov	r2, r3
-    c084:	e59f30c8 	ldr	r3, [pc, #200]	; c154 <.text+0xc154>
-    c088:	e5933000 	ldr	r3, [r3]
-    c08c:	e1520003 	cmp	r2, r3
-    c090:	2a000014 	bcs	c0e8 <SSPHandler+0x160>
-    c094:	e3a0128e 	mov	r1, #-536870904	; 0xe0000008
-    c098:	e281191a 	add	r1, r1, #425984	; 0x68000
-    c09c:	e59f30ac 	ldr	r3, [pc, #172]	; c150 <.text+0xc150>
-    c0a0:	e5932000 	ldr	r2, [r3]
-    c0a4:	e59f30ac 	ldr	r3, [pc, #172]	; c158 <.text+0xc158>
-    c0a8:	e7d33002 	ldrb	r3, [r3, r2]
-    c0ac:	e1a00003 	mov	r0, r3
-    c0b0:	e59f3098 	ldr	r3, [pc, #152]	; c150 <.text+0xc150>
-    c0b4:	e5933000 	ldr	r3, [r3]
-    c0b8:	e2832001 	add	r2, r3, #1	; 0x1
-    c0bc:	e59f3094 	ldr	r3, [pc, #148]	; c158 <.text+0xc158>
-    c0c0:	e7d33002 	ldrb	r3, [r3, r2]
-    c0c4:	e1a03403 	mov	r3, r3, lsl #8
-    c0c8:	e1803003 	orr	r3, r0, r3
-    c0cc:	e5813000 	str	r3, [r1]
-    c0d0:	e59f3078 	ldr	r3, [pc, #120]	; c150 <.text+0xc150>
-    c0d4:	e5933000 	ldr	r3, [r3]
-    c0d8:	e2832002 	add	r2, r3, #2	; 0x2
-    c0dc:	e59f306c 	ldr	r3, [pc, #108]	; c150 <.text+0xc150>
-    c0e0:	e5832000 	str	r2, [r3]
-    c0e4:	ea00000c 	b	c11c <SSPHandler+0x194>
-    c0e8:	e59f2060 	ldr	r2, [pc, #96]	; c150 <.text+0xc150>
-    c0ec:	e3a03000 	mov	r3, #0	; 0x0
-    c0f0:	e5823000 	str	r3, [r2]
-    c0f4:	e59f2058 	ldr	r2, [pc, #88]	; c154 <.text+0xc154>
-    c0f8:	e3a03000 	mov	r3, #0	; 0x0
-    c0fc:	e5823000 	str	r3, [r2]
-    c100:	e59f2054 	ldr	r2, [pc, #84]	; c15c <.text+0xc15c>
-    c104:	e3a03001 	mov	r3, #1	; 0x1
-    c108:	e5c23000 	strb	r3, [r2]
-    c10c:	e3a0328e 	mov	r3, #-536870904	; 0xe0000008
-    c110:	e283391a 	add	r3, r3, #425984	; 0x68000
-    c114:	e3a02000 	mov	r2, #0	; 0x0
-    c118:	e5832000 	str	r2, [r3]
-    c11c:	e3a032ce 	mov	r3, #-536870900	; 0xe000000c
-    c120:	e283391a 	add	r3, r3, #425984	; 0x68000
-    c124:	e5933000 	ldr	r3, [r3]
-    c128:	e2033002 	and	r3, r3, #2	; 0x2
-    c12c:	e3530000 	cmp	r3, #0	; 0x0
-    c130:	1affffd0 	bne	c078 <SSPHandler+0xf0>
-    c134:	e3a03000 	mov	r3, #0	; 0x0
-    c138:	e2433efd 	sub	r3, r3, #4048	; 0xfd0
-    c13c:	e3a02000 	mov	r2, #0	; 0x0
-    c140:	e5832000 	str	r2, [r3]
-    c144:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    c148:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    c14c:	e12fff1e 	bx	lr
-    c150:	40001e14 	andmi	r1, r0, r4, lsl lr
-    c154:	40001e10 	andmi	r1, r0, r0, lsl lr
-    c158:	40001e18 	andmi	r1, r0, r8, lsl lr
-    c15c:	4000001b 	andmi	r0, r0, fp, lsl r0
-
-0000c160 <SSPReceive>:
-    c160:	e1a0c00d 	mov	ip, sp
-    c164:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    c168:	e24cb004 	sub	fp, ip, #4	; 0x4
-    c16c:	e24dd004 	sub	sp, sp, #4	; 0x4
-    c170:	e1a03000 	mov	r3, r0
-    c174:	e54b3010 	strb	r3, [fp, #-16]
-    c178:	e59f3288 	ldr	r3, [pc, #648]	; c408 <.text+0xc408>
-    c17c:	e5d33000 	ldrb	r3, [r3]
-    c180:	e3530000 	cmp	r3, #0	; 0x0
-    c184:	1a00000d 	bne	c1c0 <SSPReceive+0x60>
-    c188:	e55b3010 	ldrb	r3, [fp, #-16]
-    c18c:	e353003e 	cmp	r3, #62	; 0x3e
-    c190:	1a000006 	bne	c1b0 <SSPReceive+0x50>
-    c194:	e59f326c 	ldr	r3, [pc, #620]	; c408 <.text+0xc408>
-    c198:	e5d33000 	ldrb	r3, [r3]
-    c19c:	e2833001 	add	r3, r3, #1	; 0x1
-    c1a0:	e20330ff 	and	r3, r3, #255	; 0xff
-    c1a4:	e59f225c 	ldr	r2, [pc, #604]	; c408 <.text+0xc408>
-    c1a8:	e5c23000 	strb	r3, [r2]
-    c1ac:	ea000087 	b	c3d0 <SSPReceive+0x270>
-    c1b0:	e59f3250 	ldr	r3, [pc, #592]	; c408 <.text+0xc408>
-    c1b4:	e3a02000 	mov	r2, #0	; 0x0
-    c1b8:	e5c32000 	strb	r2, [r3]
-    c1bc:	ea000083 	b	c3d0 <SSPReceive+0x270>
-    c1c0:	e59f3240 	ldr	r3, [pc, #576]	; c408 <.text+0xc408>
-    c1c4:	e5d33000 	ldrb	r3, [r3]
-    c1c8:	e3530001 	cmp	r3, #1	; 0x1
-    c1cc:	1a00000d 	bne	c208 <SSPReceive+0xa8>
-    c1d0:	e55b3010 	ldrb	r3, [fp, #-16]
-    c1d4:	e353002a 	cmp	r3, #42	; 0x2a
-    c1d8:	1a000006 	bne	c1f8 <SSPReceive+0x98>
-    c1dc:	e59f3224 	ldr	r3, [pc, #548]	; c408 <.text+0xc408>
-    c1e0:	e5d33000 	ldrb	r3, [r3]
-    c1e4:	e2833001 	add	r3, r3, #1	; 0x1
-    c1e8:	e20330ff 	and	r3, r3, #255	; 0xff
-    c1ec:	e59f2214 	ldr	r2, [pc, #532]	; c408 <.text+0xc408>
-    c1f0:	e5c23000 	strb	r3, [r2]
-    c1f4:	ea000075 	b	c3d0 <SSPReceive+0x270>
-    c1f8:	e59f3208 	ldr	r3, [pc, #520]	; c408 <.text+0xc408>
-    c1fc:	e3a02000 	mov	r2, #0	; 0x0
-    c200:	e5c32000 	strb	r2, [r3]
-    c204:	ea000071 	b	c3d0 <SSPReceive+0x270>
-    c208:	e59f31f8 	ldr	r3, [pc, #504]	; c408 <.text+0xc408>
-    c20c:	e5d33000 	ldrb	r3, [r3]
-    c210:	e3530002 	cmp	r3, #2	; 0x2
-    c214:	1a00000d 	bne	c250 <SSPReceive+0xf0>
-    c218:	e55b3010 	ldrb	r3, [fp, #-16]
-    c21c:	e353003e 	cmp	r3, #62	; 0x3e
-    c220:	1a000006 	bne	c240 <SSPReceive+0xe0>
-    c224:	e59f31dc 	ldr	r3, [pc, #476]	; c408 <.text+0xc408>
-    c228:	e5d33000 	ldrb	r3, [r3]
-    c22c:	e2833001 	add	r3, r3, #1	; 0x1
-    c230:	e20330ff 	and	r3, r3, #255	; 0xff
-    c234:	e59f21cc 	ldr	r2, [pc, #460]	; c408 <.text+0xc408>
-    c238:	e5c23000 	strb	r3, [r2]
-    c23c:	ea000063 	b	c3d0 <SSPReceive+0x270>
-    c240:	e59f31c0 	ldr	r3, [pc, #448]	; c408 <.text+0xc408>
-    c244:	e3a02000 	mov	r2, #0	; 0x0
-    c248:	e5c32000 	strb	r2, [r3]
-    c24c:	ea00005f 	b	c3d0 <SSPReceive+0x270>
-    c250:	e59f31b0 	ldr	r3, [pc, #432]	; c408 <.text+0xc408>
-    c254:	e5d33000 	ldrb	r3, [r3]
-    c258:	e3530003 	cmp	r3, #3	; 0x3
-    c25c:	1a000023 	bne	c2f0 <SSPReceive+0x190>
-    c260:	e55b3010 	ldrb	r3, [fp, #-16]
-    c264:	e3530003 	cmp	r3, #3	; 0x3
-    c268:	1a00000c 	bne	c2a0 <SSPReceive+0x140>
-    c26c:	e59f2198 	ldr	r2, [pc, #408]	; c40c <.text+0xc40c>
-    c270:	e3a0305c 	mov	r3, #92	; 0x5c
-    c274:	e5c23000 	strb	r3, [r2]
-    c278:	e59f2190 	ldr	r2, [pc, #400]	; c410 <.text+0xc410>
-    c27c:	e59f3190 	ldr	r3, [pc, #400]	; c414 <.text+0xc414>
-    c280:	e5832000 	str	r2, [r3]
-    c284:	e59f217c 	ldr	r2, [pc, #380]	; c408 <.text+0xc408>
-    c288:	e3a03004 	mov	r3, #4	; 0x4
-    c28c:	e5c23000 	strb	r3, [r2]
-    c290:	e59f2180 	ldr	r2, [pc, #384]	; c418 <.text+0xc418>
-    c294:	e3a03003 	mov	r3, #3	; 0x3
-    c298:	e5c23000 	strb	r3, [r2]
-    c29c:	ea00004b 	b	c3d0 <SSPReceive+0x270>
-    c2a0:	e55b3010 	ldrb	r3, [fp, #-16]
-    c2a4:	e3530001 	cmp	r3, #1	; 0x1
-    c2a8:	1a00000c 	bne	c2e0 <SSPReceive+0x180>
-    c2ac:	e59f2158 	ldr	r2, [pc, #344]	; c40c <.text+0xc40c>
-    c2b0:	e3a0301c 	mov	r3, #28	; 0x1c
-    c2b4:	e5c23000 	strb	r3, [r2]
-    c2b8:	e59f215c 	ldr	r2, [pc, #348]	; c41c <.text+0xc41c>
-    c2bc:	e59f3150 	ldr	r3, [pc, #336]	; c414 <.text+0xc414>
-    c2c0:	e5832000 	str	r2, [r3]
-    c2c4:	e59f213c 	ldr	r2, [pc, #316]	; c408 <.text+0xc408>
-    c2c8:	e3a03004 	mov	r3, #4	; 0x4
-    c2cc:	e5c23000 	strb	r3, [r2]
-    c2d0:	e59f2140 	ldr	r2, [pc, #320]	; c418 <.text+0xc418>
-    c2d4:	e3a03001 	mov	r3, #1	; 0x1
-    c2d8:	e5c23000 	strb	r3, [r2]
-    c2dc:	ea00003b 	b	c3d0 <SSPReceive+0x270>
-    c2e0:	e59f3120 	ldr	r3, [pc, #288]	; c408 <.text+0xc408>
-    c2e4:	e3a02000 	mov	r2, #0	; 0x0
-    c2e8:	e5c32000 	strb	r2, [r3]
-    c2ec:	ea000037 	b	c3d0 <SSPReceive+0x270>
-    c2f0:	e59f3110 	ldr	r3, [pc, #272]	; c408 <.text+0xc408>
-    c2f4:	e5d33000 	ldrb	r3, [r3]
-    c2f8:	e3530004 	cmp	r3, #4	; 0x4
-    c2fc:	1a000021 	bne	c388 <SSPReceive+0x228>
-    c300:	e59f3104 	ldr	r3, [pc, #260]	; c40c <.text+0xc40c>
-    c304:	e5d33000 	ldrb	r3, [r3]
-    c308:	e2433001 	sub	r3, r3, #1	; 0x1
-    c30c:	e20330ff 	and	r3, r3, #255	; 0xff
-    c310:	e59f20f4 	ldr	r2, [pc, #244]	; c40c <.text+0xc40c>
-    c314:	e5c23000 	strb	r3, [r2]
-    c318:	e59f30f4 	ldr	r3, [pc, #244]	; c414 <.text+0xc414>
-    c31c:	e5932000 	ldr	r2, [r3]
-    c320:	e55b3010 	ldrb	r3, [fp, #-16]
-    c324:	e5c23000 	strb	r3, [r2]
-    c328:	e59f30e4 	ldr	r3, [pc, #228]	; c414 <.text+0xc414>
-    c32c:	e5933000 	ldr	r3, [r3]
-    c330:	e2832001 	add	r2, r3, #1	; 0x1
-    c334:	e59f30d8 	ldr	r3, [pc, #216]	; c414 <.text+0xc414>
-    c338:	e5832000 	str	r2, [r3]
-    c33c:	e59f30c8 	ldr	r3, [pc, #200]	; c40c <.text+0xc40c>
-    c340:	e5d33000 	ldrb	r3, [r3]
-    c344:	e3530000 	cmp	r3, #0	; 0x0
-    c348:	1a000020 	bne	c3d0 <SSPReceive+0x270>
-    c34c:	e59f20b4 	ldr	r2, [pc, #180]	; c408 <.text+0xc408>
-    c350:	e3a03005 	mov	r3, #5	; 0x5
-    c354:	e5c23000 	strb	r3, [r2]
-    c358:	e59f30b8 	ldr	r3, [pc, #184]	; c418 <.text+0xc418>
-    c35c:	e5d33000 	ldrb	r3, [r3]
-    c360:	e20330ff 	and	r3, r3, #255	; 0xff
-    c364:	e3530003 	cmp	r3, #3	; 0x3
-    c368:	1a000002 	bne	c378 <SSPReceive+0x218>
-    c36c:	e59f30ac 	ldr	r3, [pc, #172]	; c420 <.text+0xc420>
-    c370:	e3a02001 	mov	r2, #1	; 0x1
-    c374:	e5c32000 	strb	r2, [r3]
-    c378:	e59f3098 	ldr	r3, [pc, #152]	; c418 <.text+0xc418>
-    c37c:	e3a02000 	mov	r2, #0	; 0x0
-    c380:	e5c32000 	strb	r2, [r3]
-    c384:	ea000011 	b	c3d0 <SSPReceive+0x270>
-    c388:	e59f3078 	ldr	r3, [pc, #120]	; c408 <.text+0xc408>
-    c38c:	e5d33000 	ldrb	r3, [r3]
-    c390:	e3530005 	cmp	r3, #5	; 0x5
-    c394:	1a00000a 	bne	c3c4 <SSPReceive+0x264>
-    c398:	e55b3010 	ldrb	r3, [fp, #-16]
-    c39c:	e3530000 	cmp	r3, #0	; 0x0
-    c3a0:	1a000003 	bne	c3b4 <SSPReceive+0x254>
-    c3a4:	e59f305c 	ldr	r3, [pc, #92]	; c408 <.text+0xc408>
-    c3a8:	e3a02000 	mov	r2, #0	; 0x0
-    c3ac:	e5c32000 	strb	r2, [r3]
-    c3b0:	ea000006 	b	c3d0 <SSPReceive+0x270>
-    c3b4:	e59f304c 	ldr	r3, [pc, #76]	; c408 <.text+0xc408>
-    c3b8:	e3a02001 	mov	r2, #1	; 0x1
-    c3bc:	e5c32000 	strb	r2, [r3]
-    c3c0:	ea000002 	b	c3d0 <SSPReceive+0x270>
-    c3c4:	e59f303c 	ldr	r3, [pc, #60]	; c408 <.text+0xc408>
-    c3c8:	e3a02000 	mov	r2, #0	; 0x0
-    c3cc:	e5c32000 	strb	r2, [r3]
-    c3d0:	e59f3030 	ldr	r3, [pc, #48]	; c408 <.text+0xc408>
-    c3d4:	e5d33000 	ldrb	r3, [r3]
-    c3d8:	e3530000 	cmp	r3, #0	; 0x0
-    c3dc:	1a000003 	bne	c3f0 <SSPReceive+0x290>
-    c3e0:	e59f303c 	ldr	r3, [pc, #60]	; c424 <.text+0xc424>
-    c3e4:	e3a02001 	mov	r2, #1	; 0x1
-    c3e8:	e5c32000 	strb	r2, [r3]
-    c3ec:	ea000002 	b	c3fc <SSPReceive+0x29c>
-    c3f0:	e59f302c 	ldr	r3, [pc, #44]	; c424 <.text+0xc424>
-    c3f4:	e3a02000 	mov	r2, #0	; 0x0
-    c3f8:	e5c32000 	strb	r2, [r3]
-    c3fc:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    c400:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    c404:	e12fff1e 	bx	lr
-    c408:	40000af1 	strmid	r0, [r0], -r1
-    c40c:	40000af0 	strmid	r0, [r0], -r0
-    c410:	400013bc 	strmih	r1, [r0], -ip
-    c414:	40000aec 	andmi	r0, r0, ip, ror #21
-    c418:	40000ae9 	andmi	r0, r0, r9, ror #21
-    c41c:	4000136c 	andmi	r1, r0, ip, ror #6
-    c420:	40000ae8 	andmi	r0, r0, r8, ror #21
-    c424:	4000001c 	andmi	r0, r0, ip, lsl r0
-
-0000c428 <LL_write_init>:
-    c428:	e1a0c00d 	mov	ip, sp
-    c42c:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    c430:	e24cb004 	sub	fp, ip, #4	; 0x4
-    c434:	e59f2028 	ldr	r2, [pc, #40]	; c464 <.text+0xc464>
-    c438:	e3a0303e 	mov	r3, #62	; 0x3e
-    c43c:	e5c23000 	strb	r3, [r2]
-    c440:	e59f201c 	ldr	r2, [pc, #28]	; c464 <.text+0xc464>
-    c444:	e3a0302a 	mov	r3, #42	; 0x2a
-    c448:	e5c23001 	strb	r3, [r2, #1]
-    c44c:	e59f2010 	ldr	r2, [pc, #16]	; c464 <.text+0xc464>
-    c450:	e3a0303e 	mov	r3, #62	; 0x3e
-    c454:	e5c23002 	strb	r3, [r2, #2]
-    c458:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    c45c:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    c460:	e12fff1e 	bx	lr
-    c464:	40001e18 	andmi	r1, r0, r8, lsl lr
-
-0000c468 <LL_write>:
-    c468:	e1a0c00d 	mov	ip, sp
-    c46c:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    c470:	e24cb004 	sub	fp, ip, #4	; 0x4
-    c474:	e24dd014 	sub	sp, sp, #20	; 0x14
-    c478:	e50b0014 	str	r0, [fp, #-20]
-    c47c:	e1a03001 	mov	r3, r1
-    c480:	e14b31b8 	strh	r3, [fp, #-24]
-    c484:	e1a03002 	mov	r3, r2
-    c488:	e54b301c 	strb	r3, [fp, #-28]
-    c48c:	e59f31d0 	ldr	r3, [pc, #464]	; c664 <.text+0xc664>
-    c490:	e5d33000 	ldrb	r3, [r3]
-    c494:	e3530000 	cmp	r3, #0	; 0x0
-    c498:	0a00001f 	beq	c51c <LL_write+0xb4>
-    c49c:	e59f31c4 	ldr	r3, [pc, #452]	; c668 <.text+0xc668>
-    c4a0:	e55b201c 	ldrb	r2, [fp, #-28]
-    c4a4:	e5c32003 	strb	r2, [r3, #3]
-    c4a8:	e3a03000 	mov	r3, #0	; 0x0
-    c4ac:	e50b3010 	str	r3, [fp, #-16]
-    c4b0:	ea00000a 	b	c4e0 <LL_write+0x78>
-    c4b4:	e51b3010 	ldr	r3, [fp, #-16]
-    c4b8:	e2831004 	add	r1, r3, #4	; 0x4
-    c4bc:	e51b2010 	ldr	r2, [fp, #-16]
-    c4c0:	e51b3014 	ldr	r3, [fp, #-20]
-    c4c4:	e0823003 	add	r3, r2, r3
-    c4c8:	e5d33000 	ldrb	r3, [r3]
-    c4cc:	e59f2194 	ldr	r2, [pc, #404]	; c668 <.text+0xc668>
-    c4d0:	e7c23001 	strb	r3, [r2, r1]
-    c4d4:	e51b3010 	ldr	r3, [fp, #-16]
-    c4d8:	e2833001 	add	r3, r3, #1	; 0x1
-    c4dc:	e50b3010 	str	r3, [fp, #-16]
-    c4e0:	e15b21b8 	ldrh	r2, [fp, #-24]
-    c4e4:	e51b3010 	ldr	r3, [fp, #-16]
-    c4e8:	e1520003 	cmp	r2, r3
-    c4ec:	8afffff0 	bhi	c4b4 <LL_write+0x4c>
-    c4f0:	e15b31b8 	ldrh	r3, [fp, #-24]
-    c4f4:	e2831004 	add	r1, r3, #4	; 0x4
-    c4f8:	e59f2168 	ldr	r2, [pc, #360]	; c668 <.text+0xc668>
-    c4fc:	e3a03000 	mov	r3, #0	; 0x0
-    c500:	e7c23001 	strb	r3, [r2, r1]
-    c504:	e15b31b8 	ldrh	r3, [fp, #-24]
-    c508:	e2833005 	add	r3, r3, #5	; 0x5
-    c50c:	e1a02003 	mov	r2, r3
-    c510:	e59f3154 	ldr	r3, [pc, #340]	; c66c <.text+0xc66c>
-    c514:	e5832000 	str	r2, [r3]
-    c518:	ea000047 	b	c63c <LL_write+0x1d4>
-    c51c:	e15b21b8 	ldrh	r2, [fp, #-24]
-    c520:	e59f3144 	ldr	r3, [pc, #324]	; c66c <.text+0xc66c>
-    c524:	e5933000 	ldr	r3, [r3]
-    c528:	e0823003 	add	r3, r2, r3
-    c52c:	e353007e 	cmp	r3, #126	; 0x7e
-    c530:	8a00003e 	bhi	c630 <LL_write+0x1c8>
-    c534:	e59f3130 	ldr	r3, [pc, #304]	; c66c <.text+0xc66c>
-    c538:	e5933000 	ldr	r3, [r3]
-    c53c:	e2431001 	sub	r1, r3, #1	; 0x1
-    c540:	e59f2120 	ldr	r2, [pc, #288]	; c668 <.text+0xc668>
-    c544:	e3a0303e 	mov	r3, #62	; 0x3e
-    c548:	e7c23001 	strb	r3, [r2, r1]
-    c54c:	e59f3118 	ldr	r3, [pc, #280]	; c66c <.text+0xc66c>
-    c550:	e5931000 	ldr	r1, [r3]
-    c554:	e59f210c 	ldr	r2, [pc, #268]	; c668 <.text+0xc668>
-    c558:	e3a0302a 	mov	r3, #42	; 0x2a
-    c55c:	e7c23001 	strb	r3, [r2, r1]
-    c560:	e59f3104 	ldr	r3, [pc, #260]	; c66c <.text+0xc66c>
-    c564:	e5933000 	ldr	r3, [r3]
-    c568:	e2831001 	add	r1, r3, #1	; 0x1
-    c56c:	e59f20f4 	ldr	r2, [pc, #244]	; c668 <.text+0xc668>
-    c570:	e3a0303e 	mov	r3, #62	; 0x3e
-    c574:	e7c23001 	strb	r3, [r2, r1]
-    c578:	e59f30ec 	ldr	r3, [pc, #236]	; c66c <.text+0xc66c>
-    c57c:	e5933000 	ldr	r3, [r3]
-    c580:	e2831002 	add	r1, r3, #2	; 0x2
-    c584:	e59f20dc 	ldr	r2, [pc, #220]	; c668 <.text+0xc668>
-    c588:	e55b301c 	ldrb	r3, [fp, #-28]
-    c58c:	e7c23001 	strb	r3, [r2, r1]
-    c590:	e59f30d4 	ldr	r3, [pc, #212]	; c66c <.text+0xc66c>
-    c594:	e5933000 	ldr	r3, [r3]
-    c598:	e50b3010 	str	r3, [fp, #-16]
-    c59c:	ea00000e 	b	c5dc <LL_write+0x174>
-    c5a0:	e51b3010 	ldr	r3, [fp, #-16]
-    c5a4:	e2831003 	add	r1, r3, #3	; 0x3
-    c5a8:	e59f30bc 	ldr	r3, [pc, #188]	; c66c <.text+0xc66c>
-    c5ac:	e5932000 	ldr	r2, [r3]
-    c5b0:	e51b3010 	ldr	r3, [fp, #-16]
-    c5b4:	e0623003 	rsb	r3, r2, r3
-    c5b8:	e1a02003 	mov	r2, r3
-    c5bc:	e51b3014 	ldr	r3, [fp, #-20]
-    c5c0:	e0823003 	add	r3, r2, r3
-    c5c4:	e5d33000 	ldrb	r3, [r3]
-    c5c8:	e59f2098 	ldr	r2, [pc, #152]	; c668 <.text+0xc668>
-    c5cc:	e7c23001 	strb	r3, [r2, r1]
-    c5d0:	e51b3010 	ldr	r3, [fp, #-16]
-    c5d4:	e2833001 	add	r3, r3, #1	; 0x1
-    c5d8:	e50b3010 	str	r3, [fp, #-16]
-    c5dc:	e15b21b8 	ldrh	r2, [fp, #-24]
-    c5e0:	e59f3084 	ldr	r3, [pc, #132]	; c66c <.text+0xc66c>
-    c5e4:	e5933000 	ldr	r3, [r3]
-    c5e8:	e0822003 	add	r2, r2, r3
-    c5ec:	e51b3010 	ldr	r3, [fp, #-16]
-    c5f0:	e1520003 	cmp	r2, r3
-    c5f4:	8affffe9 	bhi	c5a0 <LL_write+0x138>
-    c5f8:	e15b21b8 	ldrh	r2, [fp, #-24]
-    c5fc:	e59f3068 	ldr	r3, [pc, #104]	; c66c <.text+0xc66c>
-    c600:	e5933000 	ldr	r3, [r3]
-    c604:	e0823003 	add	r3, r2, r3
-    c608:	e2832005 	add	r2, r3, #5	; 0x5
-    c60c:	e59f3058 	ldr	r3, [pc, #88]	; c66c <.text+0xc66c>
-    c610:	e5832000 	str	r2, [r3]
-    c614:	e59f3050 	ldr	r3, [pc, #80]	; c66c <.text+0xc66c>
-    c618:	e5933000 	ldr	r3, [r3]
-    c61c:	e2431001 	sub	r1, r3, #1	; 0x1
-    c620:	e59f2040 	ldr	r2, [pc, #64]	; c668 <.text+0xc668>
-    c624:	e3a03000 	mov	r3, #0	; 0x0
-    c628:	e7c23001 	strb	r3, [r2, r1]
-    c62c:	ea000002 	b	c63c <LL_write+0x1d4>
-    c630:	e3a03000 	mov	r3, #0	; 0x0
-    c634:	e50b3020 	str	r3, [fp, #-32]
-    c638:	ea000004 	b	c650 <LL_write+0x1e8>
-    c63c:	e59f3020 	ldr	r3, [pc, #32]	; c664 <.text+0xc664>
-    c640:	e3a02000 	mov	r2, #0	; 0x0
-    c644:	e5c32000 	strb	r2, [r3]
-    c648:	e3a03001 	mov	r3, #1	; 0x1
-    c64c:	e50b3020 	str	r3, [fp, #-32]
-    c650:	e51b3020 	ldr	r3, [fp, #-32]
-    c654:	e1a00003 	mov	r0, r3
-    c658:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    c65c:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    c660:	e12fff1e 	bx	lr
-    c664:	4000001b 	andmi	r0, r0, fp, lsl r0
-    c668:	40001e18 	andmi	r1, r0, r8, lsl lr
-    c66c:	40001e10 	andmi	r1, r0, r0, lsl lr
-
-0000c670 <DefaultVICHandler>:
-    c670:	e1a0c00d 	mov	ip, sp
-    c674:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    c678:	e24cb004 	sub	fp, ip, #4	; 0x4
-    c67c:	e3a03000 	mov	r3, #0	; 0x0
-    c680:	e2433efd 	sub	r3, r3, #4048	; 0xfd0
-    c684:	e3a02000 	mov	r2, #0	; 0x0
-    c688:	e5832000 	str	r2, [r3]
-    c68c:	eafffffe 	b	c68c <DefaultVICHandler+0x1c>
-
-0000c690 <init_VIC>:
-    c690:	e1a0c00d 	mov	ip, sp
-    c694:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    c698:	e24cb004 	sub	fp, ip, #4	; 0x4
-    c69c:	e24dd00c 	sub	sp, sp, #12	; 0xc
-    c6a0:	e3a03000 	mov	r3, #0	; 0x0
-    c6a4:	e50b3018 	str	r3, [fp, #-24]
-    c6a8:	e3e03efe 	mvn	r3, #4064	; 0xfe0
-    c6ac:	e243300b 	sub	r3, r3, #11	; 0xb
-    c6b0:	e3e02000 	mvn	r2, #0	; 0x0
-    c6b4:	e5832000 	str	r2, [r3]
-    c6b8:	e3a03000 	mov	r3, #0	; 0x0
-    c6bc:	e2433efd 	sub	r3, r3, #4048	; 0xfd0
-    c6c0:	e3a02000 	mov	r2, #0	; 0x0
-    c6c4:	e5832000 	str	r2, [r3]
-    c6c8:	e3e03eff 	mvn	r3, #4080	; 0xff0
-    c6cc:	e2433003 	sub	r3, r3, #3	; 0x3
-    c6d0:	e3a02000 	mov	r2, #0	; 0x0
-    c6d4:	e5832000 	str	r2, [r3]
-    c6d8:	e3a03000 	mov	r3, #0	; 0x0
-    c6dc:	e50b3018 	str	r3, [fp, #-24]
-    c6e0:	ea000010 	b	c728 <init_VIC+0x98>
-    c6e4:	e51b3018 	ldr	r3, [fp, #-24]
-    c6e8:	e1a03103 	mov	r3, r3, lsl #2
-    c6ec:	e2433c0f 	sub	r3, r3, #3840	; 0xf00
-    c6f0:	e50b3014 	str	r3, [fp, #-20]
-    c6f4:	e51b3018 	ldr	r3, [fp, #-24]
-    c6f8:	e1a03103 	mov	r3, r3, lsl #2
-    c6fc:	e2433c0e 	sub	r3, r3, #3584	; 0xe00
-    c700:	e50b3010 	str	r3, [fp, #-16]
-    c704:	e51b2014 	ldr	r2, [fp, #-20]
-    c708:	e3a03000 	mov	r3, #0	; 0x0
-    c70c:	e5823000 	str	r3, [r2]
-    c710:	e51b2010 	ldr	r2, [fp, #-16]
-    c714:	e3a03000 	mov	r3, #0	; 0x0
-    c718:	e5823000 	str	r3, [r2]
-    c71c:	e51b3018 	ldr	r3, [fp, #-24]
-    c720:	e2833001 	add	r3, r3, #1	; 0x1
-    c724:	e50b3018 	str	r3, [fp, #-24]
-    c728:	e51b3018 	ldr	r3, [fp, #-24]
-    c72c:	e353000f 	cmp	r3, #15	; 0xf
-    c730:	9affffeb 	bls	c6e4 <init_VIC+0x54>
-    c734:	e3e03d3f 	mvn	r3, #4032	; 0xfc0
-    c738:	e243300b 	sub	r3, r3, #11	; 0xb
-    c73c:	e59f200c 	ldr	r2, [pc, #12]	; c750 <.text+0xc750>
-    c740:	e5832000 	str	r2, [r3]
-    c744:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    c748:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    c74c:	e12fff1e 	bx	lr
-    c750:	0000c670 	andeq	ip, r0, r0, ror r6
-
-0000c754 <install_irq>:
-    c754:	e1a0c00d 	mov	ip, sp
-    c758:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    c75c:	e24cb004 	sub	fp, ip, #4	; 0x4
-    c760:	e24dd018 	sub	sp, sp, #24	; 0x18
-    c764:	e50b001c 	str	r0, [fp, #-28]
-    c768:	e50b1020 	str	r1, [fp, #-32]
-    c76c:	e3e02efe 	mvn	r2, #4064	; 0xfe0
-    c770:	e242200b 	sub	r2, r2, #11	; 0xb
-    c774:	e51b101c 	ldr	r1, [fp, #-28]
-    c778:	e3a03001 	mov	r3, #1	; 0x1
-    c77c:	e1a03113 	mov	r3, r3, lsl r1
-    c780:	e5823000 	str	r3, [r2]
-    c784:	e3a03000 	mov	r3, #0	; 0x0
-    c788:	e50b3018 	str	r3, [fp, #-24]
-    c78c:	ea000017 	b	c7f0 <install_irq+0x9c>
-    c790:	e51b3018 	ldr	r3, [fp, #-24]
-    c794:	e1a03103 	mov	r3, r3, lsl #2
-    c798:	e2433c0f 	sub	r3, r3, #3840	; 0xf00
-    c79c:	e50b3014 	str	r3, [fp, #-20]
-    c7a0:	e51b3018 	ldr	r3, [fp, #-24]
-    c7a4:	e1a03103 	mov	r3, r3, lsl #2
-    c7a8:	e2433c0e 	sub	r3, r3, #3584	; 0xe00
-    c7ac:	e50b3010 	str	r3, [fp, #-16]
-    c7b0:	e51b3014 	ldr	r3, [fp, #-20]
-    c7b4:	e5933000 	ldr	r3, [r3]
-    c7b8:	e3530000 	cmp	r3, #0	; 0x0
-    c7bc:	1a000008 	bne	c7e4 <install_irq+0x90>
-    c7c0:	e51b3020 	ldr	r3, [fp, #-32]
-    c7c4:	e1a02003 	mov	r2, r3
-    c7c8:	e51b3014 	ldr	r3, [fp, #-20]
-    c7cc:	e5832000 	str	r2, [r3]
-    c7d0:	e51b301c 	ldr	r3, [fp, #-28]
-    c7d4:	e3832020 	orr	r2, r3, #32	; 0x20
-    c7d8:	e51b3010 	ldr	r3, [fp, #-16]
-    c7dc:	e5832000 	str	r2, [r3]
-    c7e0:	ea000005 	b	c7fc <install_irq+0xa8>
-    c7e4:	e51b3018 	ldr	r3, [fp, #-24]
-    c7e8:	e2833001 	add	r3, r3, #1	; 0x1
-    c7ec:	e50b3018 	str	r3, [fp, #-24]
-    c7f0:	e51b3018 	ldr	r3, [fp, #-24]
-    c7f4:	e353000f 	cmp	r3, #15	; 0xf
-    c7f8:	9affffe4 	bls	c790 <install_irq+0x3c>
-    c7fc:	e51b3018 	ldr	r3, [fp, #-24]
-    c800:	e3530010 	cmp	r3, #16	; 0x10
-    c804:	1a000002 	bne	c814 <install_irq+0xc0>
-    c808:	e3a03000 	mov	r3, #0	; 0x0
-    c80c:	e50b3024 	str	r3, [fp, #-36]
-    c810:	ea000007 	b	c834 <install_irq+0xe0>
-    c814:	e3a02000 	mov	r2, #0	; 0x0
-    c818:	e2422eff 	sub	r2, r2, #4080	; 0xff0
-    c81c:	e51b101c 	ldr	r1, [fp, #-28]
-    c820:	e3a03001 	mov	r3, #1	; 0x1
-    c824:	e1a03113 	mov	r3, r3, lsl r1
-    c828:	e5823000 	str	r3, [r2]
-    c82c:	e3a03001 	mov	r3, #1	; 0x1
-    c830:	e50b3024 	str	r3, [fp, #-36]
-    c834:	e51b3024 	ldr	r3, [fp, #-36]
-    c838:	e1a00003 	mov	r0, r3
-    c83c:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    c840:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    c844:	e12fff1e 	bx	lr
-
-0000c848 <uninstall_irq>:
-    c848:	e1a0c00d 	mov	ip, sp
-    c84c:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    c850:	e24cb004 	sub	fp, ip, #4	; 0x4
-    c854:	e24dd014 	sub	sp, sp, #20	; 0x14
-    c858:	e50b001c 	str	r0, [fp, #-28]
-    c85c:	e3e02efe 	mvn	r2, #4064	; 0xfe0
-    c860:	e242200b 	sub	r2, r2, #11	; 0xb
-    c864:	e51b101c 	ldr	r1, [fp, #-28]
-    c868:	e3a03001 	mov	r3, #1	; 0x1
-    c86c:	e1a03113 	mov	r3, r3, lsl r1
-    c870:	e5823000 	str	r3, [r2]
-    c874:	e3a03000 	mov	r3, #0	; 0x0
-    c878:	e50b3018 	str	r3, [fp, #-24]
-    c87c:	ea000019 	b	c8e8 <uninstall_irq+0xa0>
-    c880:	e51b3018 	ldr	r3, [fp, #-24]
-    c884:	e1a03103 	mov	r3, r3, lsl #2
-    c888:	e2433c0f 	sub	r3, r3, #3840	; 0xf00
-    c88c:	e50b3014 	str	r3, [fp, #-20]
-    c890:	e51b3018 	ldr	r3, [fp, #-24]
-    c894:	e1a03103 	mov	r3, r3, lsl #2
-    c898:	e2433c0e 	sub	r3, r3, #3584	; 0xe00
-    c89c:	e50b3010 	str	r3, [fp, #-16]
-    c8a0:	e51b3010 	ldr	r3, [fp, #-16]
-    c8a4:	e5933000 	ldr	r3, [r3]
-    c8a8:	e3c32020 	bic	r2, r3, #32	; 0x20
-    c8ac:	e51b301c 	ldr	r3, [fp, #-28]
-    c8b0:	e1520003 	cmp	r2, r3
-    c8b4:	1a000008 	bne	c8dc <uninstall_irq+0x94>
-    c8b8:	e51b2014 	ldr	r2, [fp, #-20]
-    c8bc:	e3a03000 	mov	r3, #0	; 0x0
-    c8c0:	e5823000 	str	r3, [r2]
-    c8c4:	e51b3010 	ldr	r3, [fp, #-16]
-    c8c8:	e5933000 	ldr	r3, [r3]
-    c8cc:	e3c32020 	bic	r2, r3, #32	; 0x20
-    c8d0:	e51b3010 	ldr	r3, [fp, #-16]
-    c8d4:	e5832000 	str	r2, [r3]
-    c8d8:	ea000005 	b	c8f4 <uninstall_irq+0xac>
-    c8dc:	e51b3018 	ldr	r3, [fp, #-24]
-    c8e0:	e2833001 	add	r3, r3, #1	; 0x1
-    c8e4:	e50b3018 	str	r3, [fp, #-24]
-    c8e8:	e51b3018 	ldr	r3, [fp, #-24]
-    c8ec:	e353000f 	cmp	r3, #15	; 0xf
-    c8f0:	9affffe2 	bls	c880 <uninstall_irq+0x38>
-    c8f4:	e51b3018 	ldr	r3, [fp, #-24]
-    c8f8:	e3530010 	cmp	r3, #16	; 0x10
-    c8fc:	1a000002 	bne	c90c <uninstall_irq+0xc4>
-    c900:	e3a03000 	mov	r3, #0	; 0x0
-    c904:	e50b3020 	str	r3, [fp, #-32]
-    c908:	ea000007 	b	c92c <uninstall_irq+0xe4>
-    c90c:	e3a02000 	mov	r2, #0	; 0x0
-    c910:	e2422eff 	sub	r2, r2, #4080	; 0xff0
-    c914:	e51b101c 	ldr	r1, [fp, #-28]
-    c918:	e3a03001 	mov	r3, #1	; 0x1
-    c91c:	e1a03113 	mov	r3, r3, lsl r1
-    c920:	e5823000 	str	r3, [r2]
-    c924:	e3a03001 	mov	r3, #1	; 0x1
-    c928:	e50b3020 	str	r3, [fp, #-32]
-    c92c:	e51b3020 	ldr	r3, [fp, #-32]
-    c930:	e1a00003 	mov	r0, r3
-    c934:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    c938:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    c93c:	e12fff1e 	bx	lr
-
-0000c940 <disableIRQ>:
-    c940:	e1a0c00d 	mov	ip, sp
-    c944:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    c948:	e24cb004 	sub	fp, ip, #4	; 0x4
-    c94c:	e24dd004 	sub	sp, sp, #4	; 0x4
-    c950:	eb00000a 	bl	c980 <__get_cpsr>
-    c954:	e1a03000 	mov	r3, r0
-    c958:	e50b3010 	str	r3, [fp, #-16]
-    c95c:	e51b3010 	ldr	r3, [fp, #-16]
-    c960:	e3833080 	orr	r3, r3, #128	; 0x80
-    c964:	e1a00003 	mov	r0, r3
-    c968:	eb00000f 	bl	c9ac <__set_cpsr>
-    c96c:	e51b3010 	ldr	r3, [fp, #-16]
-    c970:	e1a00003 	mov	r0, r3
-    c974:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    c978:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    c97c:	e12fff1e 	bx	lr
-
-0000c980 <__get_cpsr>:
-    c980:	e1a0c00d 	mov	ip, sp
-    c984:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    c988:	e24cb004 	sub	fp, ip, #4	; 0x4
-    c98c:	e24dd004 	sub	sp, sp, #4	; 0x4
-    c990:	e10f3000 	mrs	r3, CPSR
-    c994:	e50b3010 	str	r3, [fp, #-16]
-    c998:	e51b3010 	ldr	r3, [fp, #-16]
-    c99c:	e1a00003 	mov	r0, r3
-    c9a0:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    c9a4:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    c9a8:	e12fff1e 	bx	lr
-
-0000c9ac <__set_cpsr>:
-    c9ac:	e1a0c00d 	mov	ip, sp
-    c9b0:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    c9b4:	e24cb004 	sub	fp, ip, #4	; 0x4
-    c9b8:	e24dd004 	sub	sp, sp, #4	; 0x4
-    c9bc:	e50b0010 	str	r0, [fp, #-16]
-    c9c0:	e51b3010 	ldr	r3, [fp, #-16]
-    c9c4:	e129f003 	msr	CPSR_fc, r3
-    c9c8:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    c9cc:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    c9d0:	e12fff1e 	bx	lr
-
-0000c9d4 <restoreIRQ>:
-    c9d4:	e1a0c00d 	mov	ip, sp
-    c9d8:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    c9dc:	e24cb004 	sub	fp, ip, #4	; 0x4
-    c9e0:	e24dd008 	sub	sp, sp, #8	; 0x8
-    c9e4:	e50b0014 	str	r0, [fp, #-20]
-    c9e8:	ebffffe4 	bl	c980 <__get_cpsr>
-    c9ec:	e1a03000 	mov	r3, r0
-    c9f0:	e50b3010 	str	r3, [fp, #-16]
-    c9f4:	e51b3010 	ldr	r3, [fp, #-16]
-    c9f8:	e3c32080 	bic	r2, r3, #128	; 0x80
-    c9fc:	e51b3014 	ldr	r3, [fp, #-20]
-    ca00:	e2033080 	and	r3, r3, #128	; 0x80
-    ca04:	e1823003 	orr	r3, r2, r3
-    ca08:	e1a00003 	mov	r0, r3
-    ca0c:	ebffffe6 	bl	c9ac <__set_cpsr>
-    ca10:	e51b3010 	ldr	r3, [fp, #-16]
-    ca14:	e1a00003 	mov	r0, r3
-    ca18:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    ca1c:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    ca20:	e12fff1e 	bx	lr
-
-0000ca24 <enableIRQ>:
-    ca24:	e1a0c00d 	mov	ip, sp
-    ca28:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    ca2c:	e24cb004 	sub	fp, ip, #4	; 0x4
-    ca30:	e24dd004 	sub	sp, sp, #4	; 0x4
-    ca34:	ebffffd1 	bl	c980 <__get_cpsr>
-    ca38:	e1a03000 	mov	r3, r0
-    ca3c:	e50b3010 	str	r3, [fp, #-16]
-    ca40:	e51b3010 	ldr	r3, [fp, #-16]
-    ca44:	e3c33080 	bic	r3, r3, #128	; 0x80
-    ca48:	e1a00003 	mov	r0, r3
-    ca4c:	ebffffd6 	bl	c9ac <__set_cpsr>
-    ca50:	e51b3010 	ldr	r3, [fp, #-16]
-    ca54:	e1a00003 	mov	r0, r3
-    ca58:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    ca5c:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    ca60:	e12fff1e 	bx	lr
-
-0000ca64 <disableFIQ>:
-    ca64:	e1a0c00d 	mov	ip, sp
-    ca68:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    ca6c:	e24cb004 	sub	fp, ip, #4	; 0x4
-    ca70:	e24dd004 	sub	sp, sp, #4	; 0x4
-    ca74:	ebffffc1 	bl	c980 <__get_cpsr>
-    ca78:	e1a03000 	mov	r3, r0
-    ca7c:	e50b3010 	str	r3, [fp, #-16]
-    ca80:	e51b3010 	ldr	r3, [fp, #-16]
-    ca84:	e3833040 	orr	r3, r3, #64	; 0x40
-    ca88:	e1a00003 	mov	r0, r3
-    ca8c:	ebffffc6 	bl	c9ac <__set_cpsr>
-    ca90:	e51b3010 	ldr	r3, [fp, #-16]
-    ca94:	e1a00003 	mov	r0, r3
-    ca98:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    ca9c:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    caa0:	e12fff1e 	bx	lr
-
-0000caa4 <restoreFIQ>:
-    caa4:	e1a0c00d 	mov	ip, sp
-    caa8:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    caac:	e24cb004 	sub	fp, ip, #4	; 0x4
-    cab0:	e24dd008 	sub	sp, sp, #8	; 0x8
-    cab4:	e50b0014 	str	r0, [fp, #-20]
-    cab8:	ebffffb0 	bl	c980 <__get_cpsr>
-    cabc:	e1a03000 	mov	r3, r0
-    cac0:	e50b3010 	str	r3, [fp, #-16]
-    cac4:	e51b3010 	ldr	r3, [fp, #-16]
-    cac8:	e3c32040 	bic	r2, r3, #64	; 0x40
-    cacc:	e51b3014 	ldr	r3, [fp, #-20]
-    cad0:	e2033040 	and	r3, r3, #64	; 0x40
-    cad4:	e1823003 	orr	r3, r2, r3
-    cad8:	e1a00003 	mov	r0, r3
-    cadc:	ebffffb2 	bl	c9ac <__set_cpsr>
-    cae0:	e51b3010 	ldr	r3, [fp, #-16]
-    cae4:	e1a00003 	mov	r0, r3
-    cae8:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    caec:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    caf0:	e12fff1e 	bx	lr
-
-0000caf4 <enableFIQ>:
-    caf4:	e1a0c00d 	mov	ip, sp
-    caf8:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    cafc:	e24cb004 	sub	fp, ip, #4	; 0x4
-    cb00:	e24dd004 	sub	sp, sp, #4	; 0x4
-    cb04:	ebffff9d 	bl	c980 <__get_cpsr>
-    cb08:	e1a03000 	mov	r3, r0
-    cb0c:	e50b3010 	str	r3, [fp, #-16]
-    cb10:	e51b3010 	ldr	r3, [fp, #-16]
-    cb14:	e3c33040 	bic	r3, r3, #64	; 0x40
-    cb18:	e1a00003 	mov	r0, r3
-    cb1c:	ebffffa2 	bl	c9ac <__set_cpsr>
-    cb20:	e51b3010 	ldr	r3, [fp, #-16]
-    cb24:	e1a00003 	mov	r0, r3
-    cb28:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    cb2c:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    cb30:	e12fff1e 	bx	lr
-
-0000cb34 <memcpy>:
-    cb34:	b510      	push	{r4, lr}
-    cb36:	1c04      	adds	r4, r0, #0
-    cb38:	1c10      	adds	r0, r2, #0
-    cb3a:	1c22      	adds	r2, r4, #0
-    cb3c:	e003      	b.n	cb46 <memcpy+0x12>
-    cb3e:	780b      	ldrb	r3, [r1, #0]
-    cb40:	3101      	adds	r1, #1
-    cb42:	7013      	strb	r3, [r2, #0]
-    cb44:	3201      	adds	r2, #1
-    cb46:	3801      	subs	r0, #1
-    cb48:	d2f9      	bcs.n	cb3e <memcpy+0xa>
-    cb4a:	1c20      	adds	r0, r4, #0
-    cb4c:	bc10      	pop	{r4}
-    cb4e:	bc02      	pop	{r1}
-    cb50:	4708      	bx	r1
-    cb52:	46c0      	nop			(mov r8, r8)
-
-0000cb54 <printf>:
-    cb54:	b40f      	push	{r0, r1, r2, r3}
-    cb56:	b500      	push	{lr}
-    cb58:	4b06      	ldr	r3, [pc, #24]	(cb74 <.text+0xcb74>)
-    cb5a:	b081      	sub	sp, #4
-    cb5c:	aa02      	add	r2, sp, #8
-    cb5e:	681b      	ldr	r3, [r3, #0]
-    cb60:	ca02      	ldmia	r2!, {r1}
-    cb62:	6898      	ldr	r0, [r3, #8]
-    cb64:	9200      	str	r2, [sp, #0]
-    cb66:	f001 fa6b 	bl	e040 <vfprintf>
-    cb6a:	b001      	add	sp, #4
-    cb6c:	bc08      	pop	{r3}
-    cb6e:	b004      	add	sp, #16
-    cb70:	4718      	bx	r3
-    cb72:	0000      	lsls	r0, r0, #0
-    cb74:	0020      	lsls	r0, r4, #0
-    cb76:	4000      	ands	r0, r0
-
-0000cb78 <_printf_r>:
-    cb78:	b40e      	push	{r1, r2, r3}
-    cb7a:	b500      	push	{lr}
-    cb7c:	b081      	sub	sp, #4
-    cb7e:	ab02      	add	r3, sp, #8
-    cb80:	cb04      	ldmia	r3!, {r2}
-    cb82:	6881      	ldr	r1, [r0, #8]
-    cb84:	9300      	str	r3, [sp, #0]
-    cb86:	f000 f84b 	bl	cc20 <_vfprintf_r>
-    cb8a:	b001      	add	sp, #4
-    cb8c:	bc08      	pop	{r3}
-    cb8e:	b003      	add	sp, #12
-    cb90:	4718      	bx	r3
-    cb92:	46c0      	nop			(mov r8, r8)
-
-0000cb94 <_puts_r>:
-    cb94:	b530      	push	{r4, r5, lr}
-    cb96:	b087      	sub	sp, #28
-    cb98:	1c05      	adds	r5, r0, #0
-    cb9a:	1c08      	adds	r0, r1, #0
-    cb9c:	1c0c      	adds	r4, r1, #0
-    cb9e:	f000 f827 	bl	cbf0 <strlen>
-    cba2:	4b0d      	ldr	r3, [pc, #52]	(cbd8 <.text+0xcbd8>)
-    cba4:	9302      	str	r3, [sp, #8]
-    cba6:	2301      	movs	r3, #1
-    cba8:	9001      	str	r0, [sp, #4]
-    cbaa:	9303      	str	r3, [sp, #12]
-    cbac:	3001      	adds	r0, #1
-    cbae:	466b      	mov	r3, sp
-    cbb0:	9006      	str	r0, [sp, #24]
-    cbb2:	9304      	str	r3, [sp, #16]
-    cbb4:	68a8      	ldr	r0, [r5, #8]
-    cbb6:	2302      	movs	r3, #2
-    cbb8:	a904      	add	r1, sp, #16
-    cbba:	9400      	str	r4, [sp, #0]
-    cbbc:	9305      	str	r3, [sp, #20]
-    cbbe:	f002 fd5d 	bl	f67c <__sfvwrite>
-    cbc2:	2800      	cmp	r0, #0
-    cbc4:	d002      	beq.n	cbcc <_puts_r+0x38>
-    cbc6:	2001      	movs	r0, #1
-    cbc8:	4240      	negs	r0, r0
-    cbca:	e000      	b.n	cbce <_puts_r+0x3a>
-    cbcc:	200a      	movs	r0, #10
-    cbce:	b007      	add	sp, #28
-    cbd0:	bc30      	pop	{r4, r5}
-    cbd2:	bc02      	pop	{r1}
-    cbd4:	4708      	bx	r1
-    cbd6:	0000      	lsls	r0, r0, #0
-    cbd8:	547c      	strb	r4, [r7, r1]
-    cbda:	0001      	lsls	r1, r0, #0
-
-0000cbdc <puts>:
-    cbdc:	b500      	push	{lr}
-    cbde:	4b03      	ldr	r3, [pc, #12]	(cbec <.text+0xcbec>)
-    cbe0:	1c01      	adds	r1, r0, #0
-    cbe2:	6818      	ldr	r0, [r3, #0]
-    cbe4:	f7ff ffd6 	bl	cb94 <_puts_r>
-    cbe8:	bc02      	pop	{r1}
-    cbea:	4708      	bx	r1
-    cbec:	0020      	lsls	r0, r4, #0
-    cbee:	4000      	ands	r0, r0
-
-0000cbf0 <strlen>:
-    cbf0:	1c02      	adds	r2, r0, #0
-    cbf2:	e000      	b.n	cbf6 <strlen+0x6>
-    cbf4:	3001      	adds	r0, #1
-    cbf6:	7803      	ldrb	r3, [r0, #0]
-    cbf8:	2b00      	cmp	r3, #0
-    cbfa:	d1fb      	bne.n	cbf4 <strlen+0x4>
-    cbfc:	1a80      	subs	r0, r0, r2
-    cbfe:	4770      	bx	lr
-
-0000cc00 <__sprint>:
-    cc00:	b510      	push	{r4, lr}
-    cc02:	688b      	ldr	r3, [r1, #8]
-    cc04:	1c0c      	adds	r4, r1, #0
-    cc06:	2b00      	cmp	r3, #0
-    cc08:	d102      	bne.n	cc10 <__sprint+0x10>
-    cc0a:	2000      	movs	r0, #0
-    cc0c:	604b      	str	r3, [r1, #4]
-    cc0e:	e004      	b.n	cc1a <__sprint+0x1a>
-    cc10:	f002 fd34 	bl	f67c <__sfvwrite>
-    cc14:	2300      	movs	r3, #0
-    cc16:	60a3      	str	r3, [r4, #8]
-    cc18:	6063      	str	r3, [r4, #4]
-    cc1a:	bc10      	pop	{r4}
-    cc1c:	bc02      	pop	{r1}
-    cc1e:	4708      	bx	r1
-
-0000cc20 <_vfprintf_r>:
-    cc20:	b5f0      	push	{r4, r5, r6, r7, lr}
-    cc22:	4cd2      	ldr	r4, [pc, #840]	(cf6c <.text+0xcf6c>)
-    cc24:	44a5      	add	sp, r4
-    cc26:	9005      	str	r0, [sp, #20]
-    cc28:	9104      	str	r1, [sp, #16]
-    cc2a:	1c16      	adds	r6, r2, #0
-    cc2c:	1c1d      	adds	r5, r3, #0
-    cc2e:	f002 fee5 	bl	f9fc <localeconv>
-    cc32:	6800      	ldr	r0, [r0, #0]
-    cc34:	900b      	str	r0, [sp, #44]
-    cc36:	9805      	ldr	r0, [sp, #20]
-    cc38:	2800      	cmp	r0, #0
-    cc3a:	d004      	beq.n	cc46 <_vfprintf_r+0x26>
-    cc3c:	6b83      	ldr	r3, [r0, #56]
-    cc3e:	2b00      	cmp	r3, #0
-    cc40:	d101      	bne.n	cc46 <_vfprintf_r+0x26>
-    cc42:	f002 fb3b 	bl	f2bc <__sinit>
-    cc46:	9904      	ldr	r1, [sp, #16]
-    cc48:	898b      	ldrh	r3, [r1, #12]
-    cc4a:	071a      	lsls	r2, r3, #28
-    cc4c:	d502      	bpl.n	cc54 <_vfprintf_r+0x34>
-    cc4e:	690b      	ldr	r3, [r1, #16]
-    cc50:	2b00      	cmp	r3, #0
-    cc52:	d106      	bne.n	cc62 <_vfprintf_r+0x42>
-    cc54:	9804      	ldr	r0, [sp, #16]
-    cc56:	f001 fbef 	bl	e438 <__swsetup>
-    cc5a:	2800      	cmp	r0, #0
-    cc5c:	d001      	beq.n	cc62 <_vfprintf_r+0x42>
-    cc5e:	f001 f9bd 	bl	dfdc <.text+0xdfdc>
-    cc62:	9b04      	ldr	r3, [sp, #16]
-    cc64:	899a      	ldrh	r2, [r3, #12]
-    cc66:	231a      	movs	r3, #26
-    cc68:	4013      	ands	r3, r2
-    cc6a:	2b0a      	cmp	r3, #10
-    cc6c:	d147      	bne.n	ccfe <_vfprintf_r+0xde>
-    cc6e:	9c04      	ldr	r4, [sp, #16]
-    cc70:	200e      	movs	r0, #14
-    cc72:	5e23      	ldrsh	r3, [r4, r0]
-    cc74:	2b00      	cmp	r3, #0
-    cc76:	db42      	blt.n	ccfe <_vfprintf_r+0xde>
-    cc78:	4cbd      	ldr	r4, [pc, #756]	(cf70 <.text+0xcf70>)
-    cc7a:	2302      	movs	r3, #2
-    cc7c:	446c      	add	r4, sp
-    cc7e:	439a      	bics	r2, r3
-    cc80:	9904      	ldr	r1, [sp, #16]
-    cc82:	81a2      	strh	r2, [r4, #12]
-    cc84:	89cb      	ldrh	r3, [r1, #14]
-    cc86:	22bd      	movs	r2, #189
-    cc88:	81e3      	strh	r3, [r4, #14]
-    cc8a:	00d2      	lsls	r2, r2, #3
-    cc8c:	69cb      	ldr	r3, [r1, #28]
-    cc8e:	446a      	add	r2, sp
-    cc90:	20be      	movs	r0, #190
-    cc92:	6013      	str	r3, [r2, #0]
-    cc94:	00c0      	lsls	r0, r0, #3
-    cc96:	6a4b      	ldr	r3, [r1, #36]
-    cc98:	4ab6      	ldr	r2, [pc, #728]	(cf74 <.text+0xcf74>)
-    cc9a:	4468      	add	r0, sp
-    cc9c:	6003      	str	r3, [r0, #0]
-    cc9e:	446a      	add	r2, sp
-    cca0:	ab1c      	add	r3, sp, #112
-    cca2:	48b5      	ldr	r0, [pc, #724]	(cf78 <.text+0xcf78>)
-    cca4:	21bc      	movs	r1, #188
-    cca6:	6013      	str	r3, [r2, #0]
-    cca8:	6023      	str	r3, [r4, #0]
-    ccaa:	00c9      	lsls	r1, r1, #3
-    ccac:	2380      	movs	r3, #128
-    ccae:	4ab3      	ldr	r2, [pc, #716]	(cf7c <.text+0xcf7c>)
-    ccb0:	00db      	lsls	r3, r3, #3
-    ccb2:	4468      	add	r0, sp
-    ccb4:	4469      	add	r1, sp
-    ccb6:	6003      	str	r3, [r0, #0]
-    ccb8:	600b      	str	r3, [r1, #0]
-    ccba:	446a      	add	r2, sp
-    ccbc:	2300      	movs	r3, #0
-    ccbe:	6013      	str	r3, [r2, #0]
-    ccc0:	9805      	ldr	r0, [sp, #20]
-    ccc2:	1c21      	adds	r1, r4, #0
-    ccc4:	1c32      	adds	r2, r6, #0
-    ccc6:	1c2b      	adds	r3, r5, #0
-    ccc8:	f7ff ffaa 	bl	cc20 <_vfprintf_r>
-    cccc:	9008      	str	r0, [sp, #32]
-    ccce:	2800      	cmp	r0, #0
-    ccd0:	db07      	blt.n	cce2 <_vfprintf_r+0xc2>
-    ccd2:	1c20      	adds	r0, r4, #0
-    ccd4:	f002 fa92 	bl	f1fc <fflush>
-    ccd8:	2800      	cmp	r0, #0
-    ccda:	d002      	beq.n	cce2 <_vfprintf_r+0xc2>
-    ccdc:	2301      	movs	r3, #1
-    ccde:	425b      	negs	r3, r3
-    cce0:	9308      	str	r3, [sp, #32]
-    cce2:	4ba3      	ldr	r3, [pc, #652]	(cf70 <.text+0xcf70>)
-    cce4:	446b      	add	r3, sp
-    cce6:	899b      	ldrh	r3, [r3, #12]
-    cce8:	065c      	lsls	r4, r3, #25
-    ccea:	d401      	bmi.n	ccf0 <_vfprintf_r+0xd0>
-    ccec:	f001 f991 	bl	e012 <.text+0xe012>
-    ccf0:	9804      	ldr	r0, [sp, #16]
-    ccf2:	8983      	ldrh	r3, [r0, #12]
-    ccf4:	2240      	movs	r2, #64
-    ccf6:	4313      	orrs	r3, r2
-    ccf8:	8183      	strh	r3, [r0, #12]
-    ccfa:	f001 f98a 	bl	e012 <.text+0xe012>
-    ccfe:	22c5      	movs	r2, #197
-    cd00:	23d2      	movs	r3, #210
-    cd02:	00d2      	lsls	r2, r2, #3
-    cd04:	00db      	lsls	r3, r3, #3
-    cd06:	24d3      	movs	r4, #211
-    cd08:	489d      	ldr	r0, [pc, #628]	(cf80 <.text+0xcf80>)
-    cd0a:	446a      	add	r2, sp
-    cd0c:	446b      	add	r3, sp
-    cd0e:	00e4      	lsls	r4, r4, #3
-    cd10:	446c      	add	r4, sp
-    cd12:	601a      	str	r2, [r3, #0]
-    cd14:	4468      	add	r0, sp
-    cd16:	2300      	movs	r3, #0
-    cd18:	6023      	str	r3, [r4, #0]
-    cd1a:	6003      	str	r3, [r0, #0]
-    cd1c:	4b99      	ldr	r3, [pc, #612]	(cf84 <.text+0xcf84>)
-    cd1e:	4c9a      	ldr	r4, [pc, #616]	(cf88 <.text+0xcf88>)
-    cd20:	9314      	str	r3, [sp, #80]
-    cd22:	9415      	str	r4, [sp, #84]
-    cd24:	2400      	movs	r4, #0
-    cd26:	961b      	str	r6, [sp, #108]
-    cd28:	9411      	str	r4, [sp, #68]
-    cd2a:	9412      	str	r4, [sp, #72]
-    cd2c:	9207      	str	r2, [sp, #28]
-    cd2e:	9408      	str	r4, [sp, #32]
-    cd30:	940d      	str	r4, [sp, #52]
-    cd32:	e001      	b.n	cd38 <_vfprintf_r+0x118>
-    cd34:	9407      	str	r4, [sp, #28]
-    cd36:	9d18      	ldr	r5, [sp, #96]
-    cd38:	9e1b      	ldr	r6, [sp, #108]
-    cd3a:	e000      	b.n	cd3e <_vfprintf_r+0x11e>
-    cd3c:	3601      	adds	r6, #1
-    cd3e:	7833      	ldrb	r3, [r6, #0]
-    cd40:	2b00      	cmp	r3, #0
-    cd42:	d001      	beq.n	cd48 <_vfprintf_r+0x128>
-    cd44:	2b25      	cmp	r3, #37
-    cd46:	d1f9      	bne.n	cd3c <_vfprintf_r+0x11c>
-    cd48:	981b      	ldr	r0, [sp, #108]
-    cd4a:	1a34      	subs	r4, r6, r0
-    cd4c:	2c00      	cmp	r4, #0
-    cd4e:	d022      	beq.n	cd96 <_vfprintf_r+0x176>
-    cd50:	22d3      	movs	r2, #211
-    cd52:	9907      	ldr	r1, [sp, #28]
-    cd54:	00d2      	lsls	r2, r2, #3
-    cd56:	446a      	add	r2, sp
-    cd58:	6813      	ldr	r3, [r2, #0]
-    cd5a:	6008      	str	r0, [r1, #0]
-    cd5c:	4888      	ldr	r0, [pc, #544]	(cf80 <.text+0xcf80>)
-    cd5e:	191b      	adds	r3, r3, r4
-    cd60:	4468      	add	r0, sp
-    cd62:	6013      	str	r3, [r2, #0]
-    cd64:	6803      	ldr	r3, [r0, #0]
-    cd66:	3301      	adds	r3, #1
-    cd68:	604c      	str	r4, [r1, #4]
-    cd6a:	6003      	str	r3, [r0, #0]
-    cd6c:	2b07      	cmp	r3, #7
-    cd6e:	dc01      	bgt.n	cd74 <_vfprintf_r+0x154>
-    cd70:	3108      	adds	r1, #8
-    cd72:	e00c      	b.n	cd8e <_vfprintf_r+0x16e>
-    cd74:	21d2      	movs	r1, #210
-    cd76:	00c9      	lsls	r1, r1, #3
-    cd78:	9804      	ldr	r0, [sp, #16]
-    cd7a:	4469      	add	r1, sp
-    cd7c:	f7ff ff40 	bl	cc00 <__sprint>
-    cd80:	2800      	cmp	r0, #0
-    cd82:	d001      	beq.n	cd88 <_vfprintf_r+0x168>
-    cd84:	f001 f926 	bl	dfd4 <.text+0xdfd4>
-    cd88:	21c5      	movs	r1, #197
-    cd8a:	00c9      	lsls	r1, r1, #3
-    cd8c:	4469      	add	r1, sp
-    cd8e:	9a08      	ldr	r2, [sp, #32]
-    cd90:	1912      	adds	r2, r2, r4
-    cd92:	9107      	str	r1, [sp, #28]
-    cd94:	9208      	str	r2, [sp, #32]
-    cd96:	7833      	ldrb	r3, [r6, #0]
-    cd98:	2b00      	cmp	r3, #0
-    cd9a:	d101      	bne.n	cda0 <_vfprintf_r+0x180>
-    cd9c:	f001 f900 	bl	dfa0 <.text+0xdfa0>
-    cda0:	4b7a      	ldr	r3, [pc, #488]	(cf8c <.text+0xcf8c>)
-    cda2:	2200      	movs	r2, #0
-    cda4:	446b      	add	r3, sp
-    cda6:	3601      	adds	r6, #1
-    cda8:	961b      	str	r6, [sp, #108]
-    cdaa:	701a      	strb	r2, [r3, #0]
-    cdac:	2301      	movs	r3, #1
-    cdae:	425b      	negs	r3, r3
-    cdb0:	9217      	str	r2, [sp, #92]
-    cdb2:	9209      	str	r2, [sp, #36]
-    cdb4:	9316      	str	r3, [sp, #88]
-    cdb6:	e003      	b.n	cdc0 <_vfprintf_r+0x1a0>
-    cdb8:	2401      	movs	r4, #1
-    cdba:	4264      	negs	r4, r4
-    cdbc:	9416      	str	r4, [sp, #88]
-    cdbe:	1c1d      	adds	r5, r3, #0
-    cdc0:	981b      	ldr	r0, [sp, #108]
-    cdc2:	991b      	ldr	r1, [sp, #108]
-    cdc4:	7800      	ldrb	r0, [r0, #0]
-    cdc6:	3101      	adds	r1, #1
-    cdc8:	9019      	str	r0, [sp, #100]
-    cdca:	911b      	str	r1, [sp, #108]
-    cdcc:	e000      	b.n	cdd0 <_vfprintf_r+0x1b0>
-    cdce:	9209      	str	r2, [sp, #36]
-    cdd0:	9b19      	ldr	r3, [sp, #100]
-    cdd2:	3b20      	subs	r3, #32
-    cdd4:	2b58      	cmp	r3, #88
-    cdd6:	d900      	bls.n	cdda <_vfprintf_r+0x1ba>
-    cdd8:	e3e9      	b.n	d5ae <.text+0xd5ae>
-    cdda:	4a6d      	ldr	r2, [pc, #436]	(cf90 <.text+0xcf90>)
-    cddc:	009b      	lsls	r3, r3, #2
-    cdde:	589b      	ldr	r3, [r3, r2]
-    cde0:	469f      	mov	pc, r3
-    cde2:	4a6c      	ldr	r2, [pc, #432]	(cf94 <.text+0xcf94>)
-    cde4:	9211      	str	r2, [sp, #68]
-    cde6:	e359      	b.n	d49c <.text+0xd49c>
-    cde8:	4a68      	ldr	r2, [pc, #416]	(cf8c <.text+0xcf8c>)
-    cdea:	446a      	add	r2, sp
-    cdec:	7813      	ldrb	r3, [r2, #0]
-    cdee:	2b00      	cmp	r3, #0
-    cdf0:	d1e6      	bne.n	cdc0 <_vfprintf_r+0x1a0>
-    cdf2:	2320      	movs	r3, #32
-    cdf4:	7013      	strb	r3, [r2, #0]
-    cdf6:	e7e3      	b.n	cdc0 <_vfprintf_r+0x1a0>
-    cdf8:	2301      	movs	r3, #1
-    cdfa:	e03a      	b.n	ce72 <_vfprintf_r+0x252>
-    cdfc:	1d2b      	adds	r3, r5, #4
-    cdfe:	682d      	ldr	r5, [r5, #0]
-    ce00:	9509      	str	r5, [sp, #36]
-    ce02:	2d00      	cmp	r5, #0
-    ce04:	da1a      	bge.n	ce3c <_vfprintf_r+0x21c>
-    ce06:	4268      	negs	r0, r5
-    ce08:	9009      	str	r0, [sp, #36]
-    ce0a:	1c1d      	adds	r5, r3, #0
-    ce0c:	9917      	ldr	r1, [sp, #92]
-    ce0e:	2304      	movs	r3, #4
-    ce10:	4319      	orrs	r1, r3
-    ce12:	9117      	str	r1, [sp, #92]
-    ce14:	e7d4      	b.n	cdc0 <_vfprintf_r+0x1a0>
-    ce16:	4b5d      	ldr	r3, [pc, #372]	(cf8c <.text+0xcf8c>)
-    ce18:	222b      	movs	r2, #43
-    ce1a:	446b      	add	r3, sp
-    ce1c:	701a      	strb	r2, [r3, #0]
-    ce1e:	e7cf      	b.n	cdc0 <_vfprintf_r+0x1a0>
-    ce20:	9a1b      	ldr	r2, [sp, #108]
-    ce22:	7813      	ldrb	r3, [r2, #0]
-    ce24:	3201      	adds	r2, #1
-    ce26:	921b      	str	r2, [sp, #108]
-    ce28:	2b2a      	cmp	r3, #42
-    ce2a:	d002      	beq.n	ce32 <_vfprintf_r+0x212>
-    ce2c:	2200      	movs	r2, #0
-    ce2e:	9319      	str	r3, [sp, #100]
-    ce30:	e013      	b.n	ce5a <_vfprintf_r+0x23a>
-    ce32:	1d2b      	adds	r3, r5, #4
-    ce34:	682d      	ldr	r5, [r5, #0]
-    ce36:	9516      	str	r5, [sp, #88]
-    ce38:	2d00      	cmp	r5, #0
-    ce3a:	dbbd      	blt.n	cdb8 <_vfprintf_r+0x198>
-    ce3c:	1c1d      	adds	r5, r3, #0
-    ce3e:	e7bf      	b.n	cdc0 <_vfprintf_r+0x1a0>
-    ce40:	0093      	lsls	r3, r2, #2
-    ce42:	981b      	ldr	r0, [sp, #108]
-    ce44:	189b      	adds	r3, r3, r2
-    ce46:	9c19      	ldr	r4, [sp, #100]
-    ce48:	991b      	ldr	r1, [sp, #108]
-    ce4a:	7800      	ldrb	r0, [r0, #0]
-    ce4c:	005b      	lsls	r3, r3, #1
-    ce4e:	191b      	adds	r3, r3, r4
-    ce50:	3101      	adds	r1, #1
-    ce52:	1c1a      	adds	r2, r3, #0
-    ce54:	9019      	str	r0, [sp, #100]
-    ce56:	911b      	str	r1, [sp, #108]
-    ce58:	3a30      	subs	r2, #48
-    ce5a:	9b19      	ldr	r3, [sp, #100]
-    ce5c:	3b30      	subs	r3, #48
-    ce5e:	2b09      	cmp	r3, #9
-    ce60:	d9ee      	bls.n	ce40 <_vfprintf_r+0x220>
-    ce62:	2a00      	cmp	r2, #0
-    ce64:	9216      	str	r2, [sp, #88]
-    ce66:	dab3      	bge.n	cdd0 <_vfprintf_r+0x1b0>
-    ce68:	2201      	movs	r2, #1
-    ce6a:	4252      	negs	r2, r2
-    ce6c:	9216      	str	r2, [sp, #88]
-    ce6e:	e7af      	b.n	cdd0 <_vfprintf_r+0x1b0>
-    ce70:	2380      	movs	r3, #128
-    ce72:	9c17      	ldr	r4, [sp, #92]
-    ce74:	431c      	orrs	r4, r3
-    ce76:	9417      	str	r4, [sp, #92]
-    ce78:	e7a2      	b.n	cdc0 <_vfprintf_r+0x1a0>
-    ce7a:	2200      	movs	r2, #0
-    ce7c:	0093      	lsls	r3, r2, #2
-    ce7e:	189b      	adds	r3, r3, r2
-    ce80:	9819      	ldr	r0, [sp, #100]
-    ce82:	005b      	lsls	r3, r3, #1
-    ce84:	181b      	adds	r3, r3, r0
-    ce86:	991b      	ldr	r1, [sp, #108]
-    ce88:	1c1a      	adds	r2, r3, #0
-    ce8a:	9b1b      	ldr	r3, [sp, #108]
-    ce8c:	7809      	ldrb	r1, [r1, #0]
-    ce8e:	3301      	adds	r3, #1
-    ce90:	931b      	str	r3, [sp, #108]
-    ce92:	1c0b      	adds	r3, r1, #0
-    ce94:	3b30      	subs	r3, #48
-    ce96:	3a30      	subs	r2, #48
-    ce98:	9119      	str	r1, [sp, #100]
-    ce9a:	2b09      	cmp	r3, #9
-    ce9c:	d897      	bhi.n	cdce <_vfprintf_r+0x1ae>
-    ce9e:	e7ed      	b.n	ce7c <_vfprintf_r+0x25c>
-    cea0:	2308      	movs	r3, #8
-    cea2:	e7e6      	b.n	ce72 <_vfprintf_r+0x252>
-    cea4:	2340      	movs	r3, #64
-    cea6:	e00d      	b.n	cec4 <_vfprintf_r+0x2a4>
-    cea8:	991b      	ldr	r1, [sp, #108]
-    ceaa:	780b      	ldrb	r3, [r1, #0]
-    ceac:	2b6c      	cmp	r3, #108
-    ceae:	d106      	bne.n	cebe <_vfprintf_r+0x29e>
-    ceb0:	9a17      	ldr	r2, [sp, #92]
-    ceb2:	2310      	movs	r3, #16
-    ceb4:	3101      	adds	r1, #1
-    ceb6:	431a      	orrs	r2, r3
-    ceb8:	911b      	str	r1, [sp, #108]
-    ceba:	9217      	str	r2, [sp, #92]
-    cebc:	e780      	b.n	cdc0 <_vfprintf_r+0x1a0>
-    cebe:	2310      	movs	r3, #16
-    cec0:	e7d7      	b.n	ce72 <_vfprintf_r+0x252>
-    cec2:	2310      	movs	r3, #16
-    cec4:	9817      	ldr	r0, [sp, #92]
-    cec6:	4318      	orrs	r0, r3
-    cec8:	9017      	str	r0, [sp, #92]
-    ceca:	e779      	b.n	cdc0 <_vfprintf_r+0x1a0>
-    cecc:	9919      	ldr	r1, [sp, #100]
-    cece:	2943      	cmp	r1, #67
-    ced0:	d002      	beq.n	ced8 <_vfprintf_r+0x2b8>
-    ced2:	9a17      	ldr	r2, [sp, #92]
-    ced4:	06d2      	lsls	r2, r2, #27
-    ced6:	d517      	bpl.n	cf08 <_vfprintf_r+0x2e8>
-    ced8:	4c2f      	ldr	r4, [pc, #188]	(cf98 <.text+0xcf98>)
-    ceda:	446c      	add	r4, sp
-    cedc:	2100      	movs	r1, #0
-    cede:	2208      	movs	r2, #8
-    cee0:	1c20      	adds	r0, r4, #0
-    cee2:	f003 f879 	bl	ffd8 <memset>
-    cee6:	218e      	movs	r1, #142
-    cee8:	00c9      	lsls	r1, r1, #3
-    ceea:	682a      	ldr	r2, [r5, #0]
-    ceec:	9805      	ldr	r0, [sp, #20]
-    ceee:	4469      	add	r1, sp
-    cef0:	1c23      	adds	r3, r4, #0
-    cef2:	f001 f8b5 	bl	e060 <_wcrtomb_r>
-    cef6:	1c06      	adds	r6, r0, #0
-    cef8:	1c43      	adds	r3, r0, #1
-    cefa:	d101      	bne.n	cf00 <_vfprintf_r+0x2e0>
-    cefc:	f001 f84a 	bl	df94 <.text+0xdf94>
-    cf00:	3504      	adds	r5, #4
-    cf02:	9518      	str	r5, [sp, #96]
-    cf04:	f001 f876 	bl	dff4 <.text+0xdff4>
-    cf08:	238e      	movs	r3, #142
-    cf0a:	682a      	ldr	r2, [r5, #0]
-    cf0c:	00db      	lsls	r3, r3, #3
-    cf0e:	1d29      	adds	r1, r5, #4
-    cf10:	446b      	add	r3, sp
-    cf12:	2601      	movs	r6, #1
-    cf14:	9118      	str	r1, [sp, #96]
-    cf16:	701a      	strb	r2, [r3, #0]
-    cf18:	f001 f86c 	bl	dff4 <.text+0xdff4>
-    cf1c:	9a17      	ldr	r2, [sp, #92]
-    cf1e:	2310      	movs	r3, #16
-    cf20:	431a      	orrs	r2, r3
-    cf22:	9217      	str	r2, [sp, #92]
-    cf24:	9b17      	ldr	r3, [sp, #92]
-    cf26:	06db      	lsls	r3, r3, #27
-    cf28:	d503      	bpl.n	cf32 <_vfprintf_r+0x312>
-    cf2a:	1d2c      	adds	r4, r5, #4
-    cf2c:	9418      	str	r4, [sp, #96]
-    cf2e:	682c      	ldr	r4, [r5, #0]
-    cf30:	e00a      	b.n	cf48 <_vfprintf_r+0x328>
-    cf32:	9917      	ldr	r1, [sp, #92]
-    cf34:	1d2b      	adds	r3, r5, #4
-    cf36:	6828      	ldr	r0, [r5, #0]
-    cf38:	0649      	lsls	r1, r1, #25
-    cf3a:	d503      	bpl.n	cf44 <_vfprintf_r+0x324>
-    cf3c:	9318      	str	r3, [sp, #96]
-    cf3e:	0403      	lsls	r3, r0, #16
-    cf40:	141c      	asrs	r4, r3, #16
-    cf42:	e001      	b.n	cf48 <_vfprintf_r+0x328>
-    cf44:	9318      	str	r3, [sp, #96]
-    cf46:	1c04      	adds	r4, r0, #0
-    cf48:	2c00      	cmp	r4, #0
-    cf4a:	da04      	bge.n	cf56 <_vfprintf_r+0x336>
-    cf4c:	4b0f      	ldr	r3, [pc, #60]	(cf8c <.text+0xcf8c>)
-    cf4e:	222d      	movs	r2, #45
-    cf50:	446b      	add	r3, sp
-    cf52:	701a      	strb	r2, [r3, #0]
-    cf54:	4264      	negs	r4, r4
-    cf56:	2101      	movs	r1, #1
-    cf58:	e2c0      	b.n	d4dc <.text+0xd4dc>
-    cf5a:	9a19      	ldr	r2, [sp, #100]
-    cf5c:	9b16      	ldr	r3, [sp, #88]
-    cf5e:	921a      	str	r2, [sp, #104]
-    cf60:	3301      	adds	r3, #1
-    cf62:	d11b      	bne.n	cf9c <.text+0xcf9c>
-    cf64:	2406      	movs	r4, #6
-    cf66:	9416      	str	r4, [sp, #88]
-    cf68:	e022      	b.n	cfb0 <.text+0xcfb0>
-    cf6a:	0000      	lsls	r0, r0, #0
-    cf6c:	f938 ffff 	ldrsh.w	pc, [r8, #255]!
-    cf70:	05cc      	lsls	r4, r1, #23
-    cf72:	0000      	lsls	r0, r0, #0
-    cf74:	05dc      	lsls	r4, r3, #23
-    cf76:	0000      	lsls	r0, r0, #0
-    cf78:	05d4      	lsls	r4, r2, #23
-    cf7a:	0000      	lsls	r0, r0, #0
-    cf7c:	05e4      	lsls	r4, r4, #23
-    cf7e:	0000      	lsls	r0, r0, #0
-    cf80:	0694      	lsls	r4, r2, #26
-	...
-    cf8a:	0000      	lsls	r0, r0, #0
-    cf8c:	06c7      	lsls	r7, r0, #27
-    cf8e:	0000      	lsls	r0, r0, #0
-    cf90:	4e68      	ldr	r6, [pc, #416]	(d134 <.text+0xd134>)
-    cf92:	0001      	lsls	r1, r0, #0
-    cf94:	5480      	strb	r0, [r0, r2]
-    cf96:	0001      	lsls	r1, r0, #0
-    cf98:	06a4      	lsls	r4, r4, #26
-    cf9a:	0000      	lsls	r0, r0, #0
-    cf9c:	9819      	ldr	r0, [sp, #100]
-    cf9e:	2867      	cmp	r0, #103
-    cfa0:	d001      	beq.n	cfa6 <.text+0xcfa6>
-    cfa2:	2847      	cmp	r0, #71
-    cfa4:	d104      	bne.n	cfb0 <.text+0xcfb0>
-    cfa6:	9916      	ldr	r1, [sp, #88]
-    cfa8:	2900      	cmp	r1, #0
-    cfaa:	d101      	bne.n	cfb0 <.text+0xcfb0>
-    cfac:	2201      	movs	r2, #1
-    cfae:	9216      	str	r2, [sp, #88]
-    cfb0:	9c17      	ldr	r4, [sp, #92]
-    cfb2:	1c2b      	adds	r3, r5, #0
-    cfb4:	3308      	adds	r3, #8
-    cfb6:	0724      	lsls	r4, r4, #28
-    cfb8:	d505      	bpl.n	cfc6 <.text+0xcfc6>
-    cfba:	6828      	ldr	r0, [r5, #0]
-    cfbc:	6869      	ldr	r1, [r5, #4]
-    cfbe:	9318      	str	r3, [sp, #96]
-    cfc0:	9014      	str	r0, [sp, #80]
-    cfc2:	9115      	str	r1, [sp, #84]
-    cfc4:	e004      	b.n	cfd0 <.text+0xcfd0>
-    cfc6:	6829      	ldr	r1, [r5, #0]
-    cfc8:	686a      	ldr	r2, [r5, #4]
-    cfca:	9114      	str	r1, [sp, #80]
-    cfcc:	9215      	str	r2, [sp, #84]
-    cfce:	9318      	str	r3, [sp, #96]
-    cfd0:	9814      	ldr	r0, [sp, #80]
-    cfd2:	9915      	ldr	r1, [sp, #84]
-    cfd4:	f003 fdaa 	bl	10b2c <isinf>
-    cfd8:	2800      	cmp	r0, #0
-    cfda:	d017      	beq.n	d00c <.text+0xd00c>
-    cfdc:	9814      	ldr	r0, [sp, #80]
-    cfde:	9915      	ldr	r1, [sp, #84]
-    cfe0:	4bc3      	ldr	r3, [pc, #780]	(d2f0 <.text+0xd2f0>)
-    cfe2:	4ac2      	ldr	r2, [pc, #776]	(d2ec <.text+0xd2ec>)
-    cfe4:	f007 fe3e 	bl	14c64 <____ltdf2_from_thumb>
-    cfe8:	2800      	cmp	r0, #0
-    cfea:	da03      	bge.n	cff4 <.text+0xcff4>
-    cfec:	4bc1      	ldr	r3, [pc, #772]	(d2f4 <.text+0xd2f4>)
-    cfee:	222d      	movs	r2, #45
-    cff0:	446b      	add	r3, sp
-    cff2:	701a      	strb	r2, [r3, #0]
-    cff4:	9b19      	ldr	r3, [sp, #100]
-    cff6:	3b45      	subs	r3, #69
-    cff8:	2b02      	cmp	r3, #2
-    cffa:	d904      	bls.n	d006 <.text+0xd006>
-    cffc:	4fbe      	ldr	r7, [pc, #760]	(d2f8 <.text+0xd2f8>)
-    cffe:	2200      	movs	r2, #0
-    d000:	2603      	movs	r6, #3
-    d002:	920f      	str	r2, [sp, #60]
-    d004:	e2ec      	b.n	d5e0 <.text+0xd5e0>
-    d006:	4fbd      	ldr	r7, [pc, #756]	(d2fc <.text+0xd2fc>)
-    d008:	2603      	movs	r6, #3
-    d00a:	e2e4      	b.n	d5d6 <.text+0xd5d6>
-    d00c:	9814      	ldr	r0, [sp, #80]
-    d00e:	9915      	ldr	r1, [sp, #84]
-    d010:	f003 fda2 	bl	10b58 <isnan>
-    d014:	2800      	cmp	r0, #0
-    d016:	d009      	beq.n	d02c <.text+0xd02c>
-    d018:	9b19      	ldr	r3, [sp, #100]
-    d01a:	3b45      	subs	r3, #69
-    d01c:	2b02      	cmp	r3, #2
-    d01e:	d802      	bhi.n	d026 <.text+0xd026>
-    d020:	4fb7      	ldr	r7, [pc, #732]	(d300 <.text+0xd300>)
-    d022:	2603      	movs	r6, #3
-    d024:	e2da      	b.n	d5dc <.text+0xd5dc>
-    d026:	4fb7      	ldr	r7, [pc, #732]	(d304 <.text+0xd304>)
-    d028:	2603      	movs	r6, #3
-    d02a:	e21b      	b.n	d464 <.text+0xd464>
-    d02c:	9917      	ldr	r1, [sp, #92]
-    d02e:	2380      	movs	r3, #128
-    d030:	005b      	lsls	r3, r3, #1
-    d032:	9a19      	ldr	r2, [sp, #100]
-    d034:	4319      	orrs	r1, r3
-    d036:	9117      	str	r1, [sp, #92]
-    d038:	2a66      	cmp	r2, #102
-    d03a:	d103      	bne.n	d044 <.text+0xd044>
-    d03c:	9b16      	ldr	r3, [sp, #88]
-    d03e:	2603      	movs	r6, #3
-    d040:	930a      	str	r3, [sp, #40]
-    d042:	e00b      	b.n	d05c <.text+0xd05c>
-    d044:	9c19      	ldr	r4, [sp, #100]
-    d046:	2c65      	cmp	r4, #101
-    d048:	d004      	beq.n	d054 <.text+0xd054>
-    d04a:	2c45      	cmp	r4, #69
-    d04c:	d002      	beq.n	d054 <.text+0xd054>
-    d04e:	9816      	ldr	r0, [sp, #88]
-    d050:	900a      	str	r0, [sp, #40]
-    d052:	e002      	b.n	d05a <.text+0xd05a>
-    d054:	9916      	ldr	r1, [sp, #88]
-    d056:	3101      	adds	r1, #1
-    d058:	910a      	str	r1, [sp, #40]
-    d05a:	2602      	movs	r6, #2
-    d05c:	9b14      	ldr	r3, [sp, #80]
-    d05e:	9c15      	ldr	r4, [sp, #84]
-    d060:	2b00      	cmp	r3, #0
-    d062:	db03      	blt.n	d06c <.text+0xd06c>
-    d064:	1c25      	adds	r5, r4, #0
-    d066:	2200      	movs	r2, #0
-    d068:	1c1c      	adds	r4, r3, #0
-    d06a:	e006      	b.n	d07a <.text+0xd07a>
-    d06c:	9b15      	ldr	r3, [sp, #84]
-    d06e:	9814      	ldr	r0, [sp, #80]
-    d070:	2180      	movs	r1, #128
-    d072:	0609      	lsls	r1, r1, #24
-    d074:	1844      	adds	r4, r0, r1
-    d076:	1c1d      	adds	r5, r3, #0
-    d078:	222d      	movs	r2, #45
-    d07a:	9b0a      	ldr	r3, [sp, #40]
-    d07c:	9300      	str	r3, [sp, #0]
-    d07e:	4ba2      	ldr	r3, [pc, #648]	(d308 <.text+0xd308>)
-    d080:	446b      	add	r3, sp
-    d082:	9301      	str	r3, [sp, #4]
-    d084:	4ba1      	ldr	r3, [pc, #644]	(d30c <.text+0xd30c>)
-    d086:	446b      	add	r3, sp
-    d088:	9302      	str	r3, [sp, #8]
-    d08a:	23d8      	movs	r3, #216
-    d08c:	00db      	lsls	r3, r3, #3
-    d08e:	446b      	add	r3, sp
-    d090:	920c      	str	r2, [sp, #48]
-    d092:	9303      	str	r3, [sp, #12]
-    d094:	9805      	ldr	r0, [sp, #20]
-    d096:	1c21      	adds	r1, r4, #0
-    d098:	1c2a      	adds	r2, r5, #0
-    d09a:	1c33      	adds	r3, r6, #0
-    d09c:	f001 fab0 	bl	e600 <_dtoa_r>
-    d0a0:	1c07      	adds	r7, r0, #0
-    d0a2:	9819      	ldr	r0, [sp, #100]
-    d0a4:	2867      	cmp	r0, #103
-    d0a6:	d001      	beq.n	d0ac <.text+0xd0ac>
-    d0a8:	2847      	cmp	r0, #71
-    d0aa:	d102      	bne.n	d0b2 <.text+0xd0b2>
-    d0ac:	9917      	ldr	r1, [sp, #92]
-    d0ae:	07c9      	lsls	r1, r1, #31
-    d0b0:	d533      	bpl.n	d11a <.text+0xd11a>
-    d0b2:	9a0a      	ldr	r2, [sp, #40]
-    d0b4:	9b19      	ldr	r3, [sp, #100]
-    d0b6:	18be      	adds	r6, r7, r2
-    d0b8:	2b66      	cmp	r3, #102
-    d0ba:	d114      	bne.n	d0e6 <.text+0xd0e6>
-    d0bc:	783b      	ldrb	r3, [r7, #0]
-    d0be:	2b30      	cmp	r3, #48
-    d0c0:	d10d      	bne.n	d0de <.text+0xd0de>
-    d0c2:	1c20      	adds	r0, r4, #0
-    d0c4:	1c29      	adds	r1, r5, #0
-    d0c6:	4b8a      	ldr	r3, [pc, #552]	(d2f0 <.text+0xd2f0>)
-    d0c8:	4a88      	ldr	r2, [pc, #544]	(d2ec <.text+0xd2ec>)
-    d0ca:	f007 fdcf 	bl	14c6c <____nedf2_from_thumb>
-    d0ce:	2800      	cmp	r0, #0
-    d0d0:	d005      	beq.n	d0de <.text+0xd0de>
-    d0d2:	980a      	ldr	r0, [sp, #40]
-    d0d4:	498c      	ldr	r1, [pc, #560]	(d308 <.text+0xd308>)
-    d0d6:	2301      	movs	r3, #1
-    d0d8:	1a1b      	subs	r3, r3, r0
-    d0da:	4469      	add	r1, sp
-    d0dc:	600b      	str	r3, [r1, #0]
-    d0de:	4a8a      	ldr	r2, [pc, #552]	(d308 <.text+0xd308>)
-    d0e0:	446a      	add	r2, sp
-    d0e2:	6813      	ldr	r3, [r2, #0]
-    d0e4:	18f6      	adds	r6, r6, r3
-    d0e6:	1c20      	adds	r0, r4, #0
-    d0e8:	1c29      	adds	r1, r5, #0
-    d0ea:	4b81      	ldr	r3, [pc, #516]	(d2f0 <.text+0xd2f0>)
-    d0ec:	4a7f      	ldr	r2, [pc, #508]	(d2ec <.text+0xd2ec>)
-    d0ee:	f007 fdc1 	bl	14c74 <____eqdf2_from_thumb>
-    d0f2:	2800      	cmp	r0, #0
-    d0f4:	d10b      	bne.n	d10e <.text+0xd10e>
-    d0f6:	23d8      	movs	r3, #216
-    d0f8:	00db      	lsls	r3, r3, #3
-    d0fa:	446b      	add	r3, sp
-    d0fc:	601e      	str	r6, [r3, #0]
-    d0fe:	e006      	b.n	d10e <.text+0xd10e>
-    d100:	24d8      	movs	r4, #216
-    d102:	2330      	movs	r3, #48
-    d104:	00e4      	lsls	r4, r4, #3
-    d106:	7013      	strb	r3, [r2, #0]
-    d108:	446c      	add	r4, sp
-    d10a:	1c53      	adds	r3, r2, #1
-    d10c:	6023      	str	r3, [r4, #0]
-    d10e:	20d8      	movs	r0, #216
-    d110:	00c0      	lsls	r0, r0, #3
-    d112:	4468      	add	r0, sp
-    d114:	6802      	ldr	r2, [r0, #0]
-    d116:	42b2      	cmp	r2, r6
-    d118:	d3f2      	bcc.n	d100 <.text+0xd100>
-    d11a:	21d8      	movs	r1, #216
-    d11c:	00c9      	lsls	r1, r1, #3
-    d11e:	4469      	add	r1, sp
-    d120:	680b      	ldr	r3, [r1, #0]
-    d122:	9a19      	ldr	r2, [sp, #100]
-    d124:	1bdb      	subs	r3, r3, r7
-    d126:	9313      	str	r3, [sp, #76]
-    d128:	2a67      	cmp	r2, #103
-    d12a:	d001      	beq.n	d130 <.text+0xd130>
-    d12c:	2a47      	cmp	r2, #71
-    d12e:	d112      	bne.n	d156 <.text+0xd156>
-    d130:	4c75      	ldr	r4, [pc, #468]	(d308 <.text+0xd308>)
-    d132:	446c      	add	r4, sp
-    d134:	6823      	ldr	r3, [r4, #0]
-    d136:	1d18      	adds	r0, r3, #4
-    d138:	dd05      	ble.n	d146 <.text+0xd146>
-    d13a:	9916      	ldr	r1, [sp, #88]
-    d13c:	428b      	cmp	r3, r1
-    d13e:	dc02      	bgt.n	d146 <.text+0xd146>
-    d140:	2267      	movs	r2, #103
-    d142:	921a      	str	r2, [sp, #104]
-    d144:	e074      	b.n	d230 <.text+0xd230>
-    d146:	9b19      	ldr	r3, [sp, #100]
-    d148:	2b67      	cmp	r3, #103
-    d14a:	d001      	beq.n	d150 <.text+0xd150>
-    d14c:	f000 ff4a 	bl	dfe4 <.text+0xdfe4>
-    d150:	2465      	movs	r4, #101
-    d152:	941a      	str	r4, [sp, #104]
-    d154:	e003      	b.n	d15e <.text+0xd15e>
-    d156:	9819      	ldr	r0, [sp, #100]
-    d158:	2865      	cmp	r0, #101
-    d15a:	dc4a      	bgt.n	d1f2 <.text+0xd1f2>
-    d15c:	901a      	str	r0, [sp, #104]
-    d15e:	496a      	ldr	r1, [pc, #424]	(d308 <.text+0xd308>)
-    d160:	4469      	add	r1, sp
-    d162:	680b      	ldr	r3, [r1, #0]
-    d164:	4a6a      	ldr	r2, [pc, #424]	(d310 <.text+0xd310>)
-    d166:	1e5d      	subs	r5, r3, #1
-    d168:	ab1a      	add	r3, sp, #104
-    d16a:	781b      	ldrb	r3, [r3, #0]
-    d16c:	446a      	add	r2, sp
-    d16e:	600d      	str	r5, [r1, #0]
-    d170:	7013      	strb	r3, [r2, #0]
-    d172:	2d00      	cmp	r5, #0
-    d174:	da02      	bge.n	d17c <.text+0xd17c>
-    d176:	426d      	negs	r5, r5
-    d178:	232d      	movs	r3, #45
-    d17a:	e000      	b.n	d17e <.text+0xd17e>
-    d17c:	232b      	movs	r3, #43
-    d17e:	7053      	strb	r3, [r2, #1]
-    d180:	2d09      	cmp	r5, #9
-    d182:	dd21      	ble.n	d1c8 <.text+0xd1c8>
-    d184:	24d2      	movs	r4, #210
-    d186:	00e4      	lsls	r4, r4, #3
-    d188:	446c      	add	r4, sp
-    d18a:	1c28      	adds	r0, r5, #0
-    d18c:	210a      	movs	r1, #10
-    d18e:	f006 f981 	bl	13494 <__modsi3>
-    d192:	3c01      	subs	r4, #1
-    d194:	3030      	adds	r0, #48
-    d196:	7020      	strb	r0, [r4, #0]
-    d198:	210a      	movs	r1, #10
-    d19a:	1c28      	adds	r0, r5, #0
-    d19c:	f006 f8c4 	bl	13328 <__aeabi_idiv>
-    d1a0:	1c05      	adds	r5, r0, #0
-    d1a2:	2809      	cmp	r0, #9
-    d1a4:	dcf1      	bgt.n	d18a <.text+0xd18a>
-    d1a6:	4a5b      	ldr	r2, [pc, #364]	(d314 <.text+0xd314>)
-    d1a8:	1c03      	adds	r3, r0, #0
-    d1aa:	1e61      	subs	r1, r4, #1
-    d1ac:	3330      	adds	r3, #48
-    d1ae:	446a      	add	r2, sp
-    d1b0:	700b      	strb	r3, [r1, #0]
-    d1b2:	e003      	b.n	d1bc <.text+0xd1bc>
-    d1b4:	780b      	ldrb	r3, [r1, #0]
-    d1b6:	3101      	adds	r1, #1
-    d1b8:	7013      	strb	r3, [r2, #0]
-    d1ba:	3201      	adds	r2, #1
-    d1bc:	23d2      	movs	r3, #210
-    d1be:	00db      	lsls	r3, r3, #3
-    d1c0:	446b      	add	r3, sp
-    d1c2:	4299      	cmp	r1, r3
-    d1c4:	d3f6      	bcc.n	d1b4 <.text+0xd1b4>
-    d1c6:	e008      	b.n	d1da <.text+0xd1da>
-    d1c8:	4b51      	ldr	r3, [pc, #324]	(d310 <.text+0xd310>)
-    d1ca:	2230      	movs	r2, #48
-    d1cc:	446b      	add	r3, sp
-    d1ce:	709a      	strb	r2, [r3, #2]
-    d1d0:	1c2a      	adds	r2, r5, #0
-    d1d2:	3230      	adds	r2, #48
-    d1d4:	70da      	strb	r2, [r3, #3]
-    d1d6:	4a50      	ldr	r2, [pc, #320]	(d318 <.text+0xd318>)
-    d1d8:	446a      	add	r2, sp
-    d1da:	4b4d      	ldr	r3, [pc, #308]	(d310 <.text+0xd310>)
-    d1dc:	9c13      	ldr	r4, [sp, #76]
-    d1de:	446b      	add	r3, sp
-    d1e0:	1ad2      	subs	r2, r2, r3
-    d1e2:	920d      	str	r2, [sp, #52]
-    d1e4:	1916      	adds	r6, r2, r4
-    d1e6:	2c01      	cmp	r4, #1
-    d1e8:	dc2b      	bgt.n	d242 <.text+0xd242>
-    d1ea:	9817      	ldr	r0, [sp, #92]
-    d1ec:	07c0      	lsls	r0, r0, #31
-    d1ee:	d532      	bpl.n	d256 <.text+0xd256>
-    d1f0:	e027      	b.n	d242 <.text+0xd242>
-    d1f2:	9919      	ldr	r1, [sp, #100]
-    d1f4:	2966      	cmp	r1, #102
-    d1f6:	d119      	bne.n	d22c <.text+0xd22c>
-    d1f8:	4a43      	ldr	r2, [pc, #268]	(d308 <.text+0xd308>)
-    d1fa:	446a      	add	r2, sp
-    d1fc:	6816      	ldr	r6, [r2, #0]
-    d1fe:	2e00      	cmp	r6, #0
-    d200:	dd09      	ble.n	d216 <.text+0xd216>
-    d202:	9b16      	ldr	r3, [sp, #88]
-    d204:	2b00      	cmp	r3, #0
-    d206:	d102      	bne.n	d20e <.text+0xd20e>
-    d208:	9c17      	ldr	r4, [sp, #92]
-    d20a:	07e4      	lsls	r4, r4, #31
-    d20c:	d523      	bpl.n	d256 <.text+0xd256>
-    d20e:	9816      	ldr	r0, [sp, #88]
-    d210:	1c73      	adds	r3, r6, #1
-    d212:	18c6      	adds	r6, r0, r3
-    d214:	e01f      	b.n	d256 <.text+0xd256>
-    d216:	9916      	ldr	r1, [sp, #88]
-    d218:	2900      	cmp	r1, #0
-    d21a:	d104      	bne.n	d226 <.text+0xd226>
-    d21c:	9a17      	ldr	r2, [sp, #92]
-    d21e:	07d2      	lsls	r2, r2, #31
-    d220:	d401      	bmi.n	d226 <.text+0xd226>
-    d222:	2601      	movs	r6, #1
-    d224:	e017      	b.n	d256 <.text+0xd256>
-    d226:	9e16      	ldr	r6, [sp, #88]
-    d228:	3602      	adds	r6, #2
-    d22a:	e014      	b.n	d256 <.text+0xd256>
-    d22c:	9b19      	ldr	r3, [sp, #100]
-    d22e:	931a      	str	r3, [sp, #104]
-    d230:	4c35      	ldr	r4, [pc, #212]	(d308 <.text+0xd308>)
-    d232:	446c      	add	r4, sp
-    d234:	6826      	ldr	r6, [r4, #0]
-    d236:	9813      	ldr	r0, [sp, #76]
-    d238:	4286      	cmp	r6, r0
-    d23a:	db04      	blt.n	d246 <.text+0xd246>
-    d23c:	9917      	ldr	r1, [sp, #92]
-    d23e:	07c9      	lsls	r1, r1, #31
-    d240:	d509      	bpl.n	d256 <.text+0xd256>
-    d242:	3601      	adds	r6, #1
-    d244:	e007      	b.n	d256 <.text+0xd256>
-    d246:	2e00      	cmp	r6, #0
-    d248:	dd01      	ble.n	d24e <.text+0xd24e>
-    d24a:	2001      	movs	r0, #1
-    d24c:	e001      	b.n	d252 <.text+0xd252>
-    d24e:	2302      	movs	r3, #2
-    d250:	1b98      	subs	r0, r3, r6
-    d252:	9a13      	ldr	r2, [sp, #76]
-    d254:	1816      	adds	r6, r2, r0
-    d256:	9b0c      	ldr	r3, [sp, #48]
-    d258:	2b00      	cmp	r3, #0
-    d25a:	d106      	bne.n	d26a <.text+0xd26a>
-    d25c:	9c1a      	ldr	r4, [sp, #104]
-    d25e:	9813      	ldr	r0, [sp, #76]
-    d260:	2100      	movs	r1, #0
-    d262:	9419      	str	r4, [sp, #100]
-    d264:	900e      	str	r0, [sp, #56]
-    d266:	910f      	str	r1, [sp, #60]
-    d268:	e1ba      	b.n	d5e0 <.text+0xd5e0>
-    d26a:	4b22      	ldr	r3, [pc, #136]	(d2f4 <.text+0xd2f4>)
-    d26c:	222d      	movs	r2, #45
-    d26e:	446b      	add	r3, sp
-    d270:	701a      	strb	r2, [r3, #0]
-    d272:	2e00      	cmp	r6, #0
-    d274:	9610      	str	r6, [sp, #64]
-    d276:	da01      	bge.n	d27c <.text+0xd27c>
-    d278:	2200      	movs	r2, #0
-    d27a:	9210      	str	r2, [sp, #64]
-    d27c:	9b1a      	ldr	r3, [sp, #104]
-    d27e:	9c13      	ldr	r4, [sp, #76]
-    d280:	2000      	movs	r0, #0
-    d282:	9319      	str	r3, [sp, #100]
-    d284:	940e      	str	r4, [sp, #56]
-    d286:	900f      	str	r0, [sp, #60]
-    d288:	e1b4      	b.n	d5f4 <.text+0xd5f4>
-    d28a:	9917      	ldr	r1, [sp, #92]
-    d28c:	06c9      	lsls	r1, r1, #27
-    d28e:	d505      	bpl.n	d29c <.text+0xd29c>
-    d290:	682b      	ldr	r3, [r5, #0]
-    d292:	9c08      	ldr	r4, [sp, #32]
-    d294:	1d2a      	adds	r2, r5, #4
-    d296:	9218      	str	r2, [sp, #96]
-    d298:	601c      	str	r4, [r3, #0]
-    d29a:	e54c      	b.n	cd36 <_vfprintf_r+0x116>
-    d29c:	9817      	ldr	r0, [sp, #92]
-    d29e:	1d2b      	adds	r3, r5, #4
-    d2a0:	0640      	lsls	r0, r0, #25
-    d2a2:	d505      	bpl.n	d2b0 <.text+0xd2b0>
-    d2a4:	4669      	mov	r1, sp
-    d2a6:	9318      	str	r3, [sp, #96]
-    d2a8:	8c09      	ldrh	r1, [r1, #32]
-    d2aa:	682b      	ldr	r3, [r5, #0]
-    d2ac:	8019      	strh	r1, [r3, #0]
-    d2ae:	e542      	b.n	cd36 <_vfprintf_r+0x116>
-    d2b0:	9318      	str	r3, [sp, #96]
-    d2b2:	9a08      	ldr	r2, [sp, #32]
-    d2b4:	682b      	ldr	r3, [r5, #0]
-    d2b6:	601a      	str	r2, [r3, #0]
-    d2b8:	e53d      	b.n	cd36 <_vfprintf_r+0x116>
-    d2ba:	9c17      	ldr	r4, [sp, #92]
-    d2bc:	2310      	movs	r3, #16
-    d2be:	431c      	orrs	r4, r3
-    d2c0:	9417      	str	r4, [sp, #92]
-    d2c2:	9817      	ldr	r0, [sp, #92]
-    d2c4:	06c0      	lsls	r0, r0, #27
-    d2c6:	d503      	bpl.n	d2d0 <.text+0xd2d0>
-    d2c8:	682c      	ldr	r4, [r5, #0]
-    d2ca:	1d29      	adds	r1, r5, #4
-    d2cc:	9118      	str	r1, [sp, #96]
-    d2ce:	e007      	b.n	d2e0 <.text+0xd2e0>
-    d2d0:	9a17      	ldr	r2, [sp, #92]
-    d2d2:	1d2b      	adds	r3, r5, #4
-    d2d4:	6828      	ldr	r0, [r5, #0]
-    d2d6:	0652      	lsls	r2, r2, #25
-    d2d8:	d504      	bpl.n	d2e4 <.text+0xd2e4>
-    d2da:	9318      	str	r3, [sp, #96]
-    d2dc:	0403      	lsls	r3, r0, #16
-    d2de:	0c1c      	lsrs	r4, r3, #16
-    d2e0:	2100      	movs	r1, #0
-    d2e2:	e0f7      	b.n	d4d4 <.text+0xd4d4>
-    d2e4:	1c04      	adds	r4, r0, #0
-    d2e6:	9318      	str	r3, [sp, #96]
-    d2e8:	e7fa      	b.n	d2e0 <.text+0xd2e0>
-	...
-    d2f2:	0000      	lsls	r0, r0, #0
-    d2f4:	06c7      	lsls	r7, r0, #27
-    d2f6:	0000      	lsls	r0, r0, #0
-    d2f8:	5494      	strb	r4, [r2, r2]
-    d2fa:	0001      	lsls	r1, r0, #0
-    d2fc:	5498      	strb	r0, [r3, r2]
-    d2fe:	0001      	lsls	r1, r0, #0
-    d300:	549c      	strb	r4, [r3, r2]
-    d302:	0001      	lsls	r1, r0, #0
-    d304:	54a0      	strb	r0, [r4, r2]
-    d306:	0001      	lsls	r1, r0, #0
-    d308:	06b4      	lsls	r4, r6, #26
-    d30a:	0000      	lsls	r0, r0, #0
-    d30c:	06bc      	lsls	r4, r7, #26
-    d30e:	0000      	lsls	r0, r0, #0
-    d310:	06ad      	lsls	r5, r5, #26
-    d312:	0000      	lsls	r0, r0, #0
-    d314:	06af      	lsls	r7, r5, #26
-    d316:	0000      	lsls	r0, r0, #0
-    d318:	06b1      	lsls	r1, r6, #26
-    d31a:	0000      	lsls	r0, r0, #0
-    d31c:	1d2b      	adds	r3, r5, #4
-    d31e:	9817      	ldr	r0, [sp, #92]
-    d320:	9318      	str	r3, [sp, #96]
-    d322:	49c9      	ldr	r1, [pc, #804]	(d648 <.text+0xd648>)
-    d324:	2302      	movs	r3, #2
-    d326:	682c      	ldr	r4, [r5, #0]
-    d328:	4318      	orrs	r0, r3
-    d32a:	2278      	movs	r2, #120
-    d32c:	9017      	str	r0, [sp, #92]
-    d32e:	9111      	str	r1, [sp, #68]
-    d330:	9219      	str	r2, [sp, #100]
-    d332:	e0ce      	b.n	d4d2 <.text+0xd4d2>
-    d334:	4bc5      	ldr	r3, [pc, #788]	(d64c <.text+0xd64c>)
-    d336:	2200      	movs	r2, #0
-    d338:	446b      	add	r3, sp
-    d33a:	701a      	strb	r2, [r3, #0]
-    d33c:	682f      	ldr	r7, [r5, #0]
-    d33e:	1d2b      	adds	r3, r5, #4
-    d340:	9318      	str	r3, [sp, #96]
-    d342:	2f00      	cmp	r7, #0
-    d344:	d101      	bne.n	d34a <.text+0xd34a>
-    d346:	f000 fe51 	bl	dfec <.text+0xdfec>
-    d34a:	9c19      	ldr	r4, [sp, #100]
-    d34c:	2c53      	cmp	r4, #83
-    d34e:	d002      	beq.n	d356 <.text+0xd356>
-    d350:	9817      	ldr	r0, [sp, #92]
-    d352:	06c0      	lsls	r0, r0, #27
-    d354:	d571      	bpl.n	d43a <.text+0xd43a>
-    d356:	21d7      	movs	r1, #215
-    d358:	00c9      	lsls	r1, r1, #3
-    d35a:	48bd      	ldr	r0, [pc, #756]	(d650 <.text+0xd650>)
-    d35c:	4469      	add	r1, sp
-    d35e:	600f      	str	r7, [r1, #0]
-    d360:	2208      	movs	r2, #8
-    d362:	4468      	add	r0, sp
-    d364:	2100      	movs	r1, #0
-    d366:	f002 fe37 	bl	ffd8 <memset>
-    d36a:	9a16      	ldr	r2, [sp, #88]
-    d36c:	2a00      	cmp	r2, #0
-    d36e:	db1d      	blt.n	d3ac <.text+0xd3ac>
-    d370:	2600      	movs	r6, #0
-    d372:	2400      	movs	r4, #0
-    d374:	20d7      	movs	r0, #215
-    d376:	00c0      	lsls	r0, r0, #3
-    d378:	4468      	add	r0, sp
-    d37a:	6803      	ldr	r3, [r0, #0]
-    d37c:	591a      	ldr	r2, [r3, r4]
-    d37e:	2a00      	cmp	r2, #0
-    d380:	d02a      	beq.n	d3d8 <.text+0xd3d8>
-    d382:	218e      	movs	r1, #142
-    d384:	4bb2      	ldr	r3, [pc, #712]	(d650 <.text+0xd650>)
-    d386:	00c9      	lsls	r1, r1, #3
-    d388:	4469      	add	r1, sp
-    d38a:	9805      	ldr	r0, [sp, #20]
-    d38c:	446b      	add	r3, sp
-    d38e:	f000 fe67 	bl	e060 <_wcrtomb_r>
-    d392:	1c41      	adds	r1, r0, #1
-    d394:	d101      	bne.n	d39a <.text+0xd39a>
-    d396:	f000 fdfd 	bl	df94 <.text+0xdf94>
-    d39a:	9a16      	ldr	r2, [sp, #88]
-    d39c:	1980      	adds	r0, r0, r6
-    d39e:	4290      	cmp	r0, r2
-    d3a0:	dc1a      	bgt.n	d3d8 <.text+0xd3d8>
-    d3a2:	3404      	adds	r4, #4
-    d3a4:	4290      	cmp	r0, r2
-    d3a6:	d011      	beq.n	d3cc <.text+0xd3cc>
-    d3a8:	1c06      	adds	r6, r0, #0
-    d3aa:	e7e3      	b.n	d374 <.text+0xd374>
-    d3ac:	4ba8      	ldr	r3, [pc, #672]	(d650 <.text+0xd650>)
-    d3ae:	22d7      	movs	r2, #215
-    d3b0:	446b      	add	r3, sp
-    d3b2:	00d2      	lsls	r2, r2, #3
-    d3b4:	9300      	str	r3, [sp, #0]
-    d3b6:	9805      	ldr	r0, [sp, #20]
-    d3b8:	2100      	movs	r1, #0
-    d3ba:	446a      	add	r2, sp
-    d3bc:	2300      	movs	r3, #0
-    d3be:	f000 fe77 	bl	e0b0 <_wcsrtombs_r>
-    d3c2:	1c06      	adds	r6, r0, #0
-    d3c4:	1c43      	adds	r3, r0, #1
-    d3c6:	d103      	bne.n	d3d0 <.text+0xd3d0>
-    d3c8:	f000 fde4 	bl	df94 <.text+0xdf94>
-    d3cc:	9e16      	ldr	r6, [sp, #88]
-    d3ce:	e003      	b.n	d3d8 <.text+0xd3d8>
-    d3d0:	21d7      	movs	r1, #215
-    d3d2:	00c9      	lsls	r1, r1, #3
-    d3d4:	4469      	add	r1, sp
-    d3d6:	600f      	str	r7, [r1, #0]
-    d3d8:	2e00      	cmp	r6, #0
-    d3da:	d100      	bne.n	d3de <.text+0xd3de>
-    d3dc:	e0fb      	b.n	d5d6 <.text+0xd5d6>
-    d3de:	1c71      	adds	r1, r6, #1
-    d3e0:	9805      	ldr	r0, [sp, #20]
-    d3e2:	f002 fb7b 	bl	fadc <_malloc_r>
-    d3e6:	2800      	cmp	r0, #0
-    d3e8:	d107      	bne.n	d3fa <.text+0xd3fa>
-    d3ea:	9a04      	ldr	r2, [sp, #16]
-    d3ec:	8993      	ldrh	r3, [r2, #12]
-    d3ee:	9c04      	ldr	r4, [sp, #16]
-    d3f0:	2240      	movs	r2, #64
-    d3f2:	4313      	orrs	r3, r2
-    d3f4:	81a3      	strh	r3, [r4, #12]
-    d3f6:	f000 fded 	bl	dfd4 <.text+0xdfd4>
-    d3fa:	4c95      	ldr	r4, [pc, #596]	(d650 <.text+0xd650>)
-    d3fc:	446c      	add	r4, sp
-    d3fe:	9012      	str	r0, [sp, #72]
-    d400:	2100      	movs	r1, #0
-    d402:	2208      	movs	r2, #8
-    d404:	1c20      	adds	r0, r4, #0
-    d406:	f002 fde7 	bl	ffd8 <memset>
-    d40a:	22d7      	movs	r2, #215
-    d40c:	00d2      	lsls	r2, r2, #3
-    d40e:	9805      	ldr	r0, [sp, #20]
-    d410:	9912      	ldr	r1, [sp, #72]
-    d412:	446a      	add	r2, sp
-    d414:	1c33      	adds	r3, r6, #0
-    d416:	9400      	str	r4, [sp, #0]
-    d418:	f000 fe4a 	bl	e0b0 <_wcsrtombs_r>
-    d41c:	42b0      	cmp	r0, r6
-    d41e:	d006      	beq.n	d42e <.text+0xd42e>
-    d420:	9804      	ldr	r0, [sp, #16]
-    d422:	8983      	ldrh	r3, [r0, #12]
-    d424:	2240      	movs	r2, #64
-    d426:	4313      	orrs	r3, r2
-    d428:	8183      	strh	r3, [r0, #12]
-    d42a:	f000 fdcf 	bl	dfcc <.text+0xdfcc>
-    d42e:	9a12      	ldr	r2, [sp, #72]
-    d430:	2300      	movs	r3, #0
-    d432:	5593      	strb	r3, [r2, r6]
-    d434:	9f12      	ldr	r7, [sp, #72]
-    d436:	930f      	str	r3, [sp, #60]
-    d438:	e0d2      	b.n	d5e0 <.text+0xd5e0>
-    d43a:	9b16      	ldr	r3, [sp, #88]
-    d43c:	2b00      	cmp	r3, #0
-    d43e:	db0d      	blt.n	d45c <.text+0xd45c>
-    d440:	1c38      	adds	r0, r7, #0
-    d442:	2100      	movs	r1, #0
-    d444:	1c1a      	adds	r2, r3, #0
-    d446:	f002 fd9f 	bl	ff88 <memchr>
-    d44a:	2800      	cmp	r0, #0
-    d44c:	d100      	bne.n	d450 <.text+0xd450>
-    d44e:	e0c4      	b.n	d5da <.text+0xd5da>
-    d450:	9c16      	ldr	r4, [sp, #88]
-    d452:	1bc6      	subs	r6, r0, r7
-    d454:	42a6      	cmp	r6, r4
-    d456:	dd00      	ble.n	d45a <.text+0xd45a>
-    d458:	e0bf      	b.n	d5da <.text+0xd5da>
-    d45a:	e0bc      	b.n	d5d6 <.text+0xd5d6>
-    d45c:	1c38      	adds	r0, r7, #0
-    d45e:	f7ff fbc7 	bl	cbf0 <strlen>
-    d462:	1c06      	adds	r6, r0, #0
-    d464:	2000      	movs	r0, #0
-    d466:	e0a0      	b.n	d5aa <.text+0xd5aa>
-    d468:	9917      	ldr	r1, [sp, #92]
-    d46a:	2310      	movs	r3, #16
-    d46c:	4319      	orrs	r1, r3
-    d46e:	9117      	str	r1, [sp, #92]
-    d470:	9a17      	ldr	r2, [sp, #92]
-    d472:	06d2      	lsls	r2, r2, #27
-    d474:	d503      	bpl.n	d47e <.text+0xd47e>
-    d476:	682c      	ldr	r4, [r5, #0]
-    d478:	1d2b      	adds	r3, r5, #4
-    d47a:	9318      	str	r3, [sp, #96]
-    d47c:	e00a      	b.n	d494 <.text+0xd494>
-    d47e:	9c17      	ldr	r4, [sp, #92]
-    d480:	1d2b      	adds	r3, r5, #4
-    d482:	6828      	ldr	r0, [r5, #0]
-    d484:	0664      	lsls	r4, r4, #25
-    d486:	d503      	bpl.n	d490 <.text+0xd490>
-    d488:	9318      	str	r3, [sp, #96]
-    d48a:	0403      	lsls	r3, r0, #16
-    d48c:	0c1c      	lsrs	r4, r3, #16
-    d48e:	e001      	b.n	d494 <.text+0xd494>
-    d490:	9318      	str	r3, [sp, #96]
-    d492:	1c04      	adds	r4, r0, #0
-    d494:	2101      	movs	r1, #1
-    d496:	e01d      	b.n	d4d4 <.text+0xd4d4>
-    d498:	486e      	ldr	r0, [pc, #440]	(d654 <.text+0xd654>)
-    d49a:	9011      	str	r0, [sp, #68]
-    d49c:	9917      	ldr	r1, [sp, #92]
-    d49e:	06c9      	lsls	r1, r1, #27
-    d4a0:	d503      	bpl.n	d4aa <.text+0xd4aa>
-    d4a2:	682c      	ldr	r4, [r5, #0]
-    d4a4:	1d2a      	adds	r2, r5, #4
-    d4a6:	9218      	str	r2, [sp, #96]
-    d4a8:	e00a      	b.n	d4c0 <.text+0xd4c0>
-    d4aa:	9c17      	ldr	r4, [sp, #92]
-    d4ac:	1d2b      	adds	r3, r5, #4
-    d4ae:	6828      	ldr	r0, [r5, #0]
-    d4b0:	0664      	lsls	r4, r4, #25
-    d4b2:	d503      	bpl.n	d4bc <.text+0xd4bc>
-    d4b4:	9318      	str	r3, [sp, #96]
-    d4b6:	0403      	lsls	r3, r0, #16
-    d4b8:	0c1c      	lsrs	r4, r3, #16
-    d4ba:	e001      	b.n	d4c0 <.text+0xd4c0>
-    d4bc:	9318      	str	r3, [sp, #96]
-    d4be:	1c04      	adds	r4, r0, #0
-    d4c0:	9817      	ldr	r0, [sp, #92]
-    d4c2:	07c0      	lsls	r0, r0, #31
-    d4c4:	d505      	bpl.n	d4d2 <.text+0xd4d2>
-    d4c6:	2c00      	cmp	r4, #0
-    d4c8:	d003      	beq.n	d4d2 <.text+0xd4d2>
-    d4ca:	9917      	ldr	r1, [sp, #92]
-    d4cc:	2302      	movs	r3, #2
-    d4ce:	4319      	orrs	r1, r3
-    d4d0:	9117      	str	r1, [sp, #92]
-    d4d2:	2102      	movs	r1, #2
-    d4d4:	4b5d      	ldr	r3, [pc, #372]	(d64c <.text+0xd64c>)
-    d4d6:	2200      	movs	r2, #0
-    d4d8:	446b      	add	r3, sp
-    d4da:	701a      	strb	r2, [r3, #0]
-    d4dc:	9a16      	ldr	r2, [sp, #88]
-    d4de:	2a00      	cmp	r2, #0
-    d4e0:	db03      	blt.n	d4ea <.text+0xd4ea>
-    d4e2:	9817      	ldr	r0, [sp, #92]
-    d4e4:	2380      	movs	r3, #128
-    d4e6:	4398      	bics	r0, r3
-    d4e8:	9017      	str	r0, [sp, #92]
-    d4ea:	2c00      	cmp	r4, #0
-    d4ec:	d102      	bne.n	d4f4 <.text+0xd4f4>
-    d4ee:	9a16      	ldr	r2, [sp, #88]
-    d4f0:	2a00      	cmp	r2, #0
-    d4f2:	d044      	beq.n	d57e <.text+0xd57e>
-    d4f4:	2901      	cmp	r1, #1
-    d4f6:	d004      	beq.n	d502 <.text+0xd502>
-    d4f8:	2901      	cmp	r1, #1
-    d4fa:	d305      	bcc.n	d508 <.text+0xd508>
-    d4fc:	2902      	cmp	r1, #2
-    d4fe:	d135      	bne.n	d56c <.text+0xd56c>
-    d500:	e028      	b.n	d554 <.text+0xd554>
-    d502:	4d55      	ldr	r5, [pc, #340]	(d658 <.text+0xd658>)
-    d504:	446d      	add	r5, sp
-    d506:	e01d      	b.n	d544 <.text+0xd544>
-    d508:	4f53      	ldr	r7, [pc, #332]	(d658 <.text+0xd658>)
-    d50a:	446f      	add	r7, sp
-    d50c:	2307      	movs	r3, #7
-    d50e:	4023      	ands	r3, r4
-    d510:	3f01      	subs	r7, #1
-    d512:	3330      	adds	r3, #48
-    d514:	08e4      	lsrs	r4, r4, #3
-    d516:	703b      	strb	r3, [r7, #0]
-    d518:	2c00      	cmp	r4, #0
-    d51a:	d1f7      	bne.n	d50c <.text+0xd50c>
-    d51c:	9c17      	ldr	r4, [sp, #92]
-    d51e:	07e4      	lsls	r4, r4, #31
-    d520:	d53c      	bpl.n	d59c <.text+0xd59c>
-    d522:	2b30      	cmp	r3, #48
-    d524:	d03a      	beq.n	d59c <.text+0xd59c>
-    d526:	3f01      	subs	r7, #1
-    d528:	2330      	movs	r3, #48
-    d52a:	e011      	b.n	d550 <.text+0xd550>
-    d52c:	1c05      	adds	r5, r0, #0
-    d52e:	210a      	movs	r1, #10
-    d530:	1c20      	adds	r0, r4, #0
-    d532:	f005 ff4b 	bl	133cc <__umodsi3>
-    d536:	3030      	adds	r0, #48
-    d538:	7028      	strb	r0, [r5, #0]
-    d53a:	210a      	movs	r1, #10
-    d53c:	1c20      	adds	r0, r4, #0
-    d53e:	f005 fead 	bl	1329c <__aeabi_uidiv>
-    d542:	1c04      	adds	r4, r0, #0
-    d544:	1e68      	subs	r0, r5, #1
-    d546:	2c09      	cmp	r4, #9
-    d548:	d8f0      	bhi.n	d52c <.text+0xd52c>
-    d54a:	1c23      	adds	r3, r4, #0
-    d54c:	1c07      	adds	r7, r0, #0
-    d54e:	3330      	adds	r3, #48
-    d550:	703b      	strb	r3, [r7, #0]
-    d552:	e023      	b.n	d59c <.text+0xd59c>
-    d554:	4f40      	ldr	r7, [pc, #256]	(d658 <.text+0xd658>)
-    d556:	446f      	add	r7, sp
-    d558:	9811      	ldr	r0, [sp, #68]
-    d55a:	230f      	movs	r3, #15
-    d55c:	4023      	ands	r3, r4
-    d55e:	5cc3      	ldrb	r3, [r0, r3]
-    d560:	3f01      	subs	r7, #1
-    d562:	0924      	lsrs	r4, r4, #4
-    d564:	703b      	strb	r3, [r7, #0]
-    d566:	2c00      	cmp	r4, #0
-    d568:	d018      	beq.n	d59c <.text+0xd59c>
-    d56a:	e7f5      	b.n	d558 <.text+0xd558>
-    d56c:	4c3b      	ldr	r4, [pc, #236]	(d65c <.text+0xd65c>)
-    d56e:	1c20      	adds	r0, r4, #0
-    d570:	f7ff fb3e 	bl	cbf0 <strlen>
-    d574:	9916      	ldr	r1, [sp, #88]
-    d576:	1c06      	adds	r6, r0, #0
-    d578:	1c27      	adds	r7, r4, #0
-    d57a:	910f      	str	r1, [sp, #60]
-    d57c:	e030      	b.n	d5e0 <.text+0xd5e0>
-    d57e:	2900      	cmp	r1, #0
-    d580:	d102      	bne.n	d588 <.text+0xd588>
-    d582:	9a17      	ldr	r2, [sp, #92]
-    d584:	07d2      	lsls	r2, r2, #31
-    d586:	d401      	bmi.n	d58c <.text+0xd58c>
-    d588:	4f33      	ldr	r7, [pc, #204]	(d658 <.text+0xd658>)
-    d58a:	e006      	b.n	d59a <.text+0xd59a>
-    d58c:	228e      	movs	r2, #142
-    d58e:	00d2      	lsls	r2, r2, #3
-    d590:	4b33      	ldr	r3, [pc, #204]	(d660 <.text+0xd660>)
-    d592:	2130      	movs	r1, #48
-    d594:	446a      	add	r2, sp
-    d596:	54d1      	strb	r1, [r2, r3]
-    d598:	4f32      	ldr	r7, [pc, #200]	(d664 <.text+0xd664>)
-    d59a:	446f      	add	r7, sp
-    d59c:	24d9      	movs	r4, #217
-    d59e:	00e4      	lsls	r4, r4, #3
-    d5a0:	446c      	add	r4, sp
-    d5a2:	1be3      	subs	r3, r4, r7
-    d5a4:	1c1e      	adds	r6, r3, #0
-    d5a6:	9816      	ldr	r0, [sp, #88]
-    d5a8:	3efc      	subs	r6, #252
-    d5aa:	900f      	str	r0, [sp, #60]
-    d5ac:	e018      	b.n	d5e0 <.text+0xd5e0>
-    d5ae:	9919      	ldr	r1, [sp, #100]
-    d5b0:	2900      	cmp	r1, #0
-    d5b2:	d101      	bne.n	d5b8 <.text+0xd5b8>
-    d5b4:	f000 fcf4 	bl	dfa0 <.text+0xdfa0>
-    d5b8:	218e      	movs	r1, #142
-    d5ba:	aa19      	add	r2, sp, #100
-    d5bc:	7812      	ldrb	r2, [r2, #0]
-    d5be:	00c9      	lsls	r1, r1, #3
-    d5c0:	4b22      	ldr	r3, [pc, #136]	(d64c <.text+0xd64c>)
-    d5c2:	4469      	add	r1, sp
-    d5c4:	700a      	strb	r2, [r1, #0]
-    d5c6:	446b      	add	r3, sp
-    d5c8:	2200      	movs	r2, #0
-    d5ca:	2601      	movs	r6, #1
-    d5cc:	1c0f      	adds	r7, r1, #0
-    d5ce:	701a      	strb	r2, [r3, #0]
-    d5d0:	9518      	str	r5, [sp, #96]
-    d5d2:	f000 fd0d 	bl	dff0 <.text+0xdff0>
-    d5d6:	2300      	movs	r3, #0
-    d5d8:	e72d      	b.n	d436 <.text+0xd436>
-    d5da:	9e16      	ldr	r6, [sp, #88]
-    d5dc:	2400      	movs	r4, #0
-    d5de:	940f      	str	r4, [sp, #60]
-    d5e0:	980f      	ldr	r0, [sp, #60]
-    d5e2:	9610      	str	r6, [sp, #64]
-    d5e4:	4286      	cmp	r6, r0
-    d5e6:	da00      	bge.n	d5ea <.text+0xd5ea>
-    d5e8:	9010      	str	r0, [sp, #64]
-    d5ea:	4b18      	ldr	r3, [pc, #96]	(d64c <.text+0xd64c>)
-    d5ec:	446b      	add	r3, sp
-    d5ee:	781b      	ldrb	r3, [r3, #0]
-    d5f0:	2b00      	cmp	r3, #0
-    d5f2:	d003      	beq.n	d5fc <.text+0xd5fc>
-    d5f4:	9910      	ldr	r1, [sp, #64]
-    d5f6:	3101      	adds	r1, #1
-    d5f8:	9110      	str	r1, [sp, #64]
-    d5fa:	e005      	b.n	d608 <.text+0xd608>
-    d5fc:	9a17      	ldr	r2, [sp, #92]
-    d5fe:	0792      	lsls	r2, r2, #30
-    d600:	d502      	bpl.n	d608 <.text+0xd608>
-    d602:	9b10      	ldr	r3, [sp, #64]
-    d604:	3302      	adds	r3, #2
-    d606:	9310      	str	r3, [sp, #64]
-    d608:	9c17      	ldr	r4, [sp, #92]
-    d60a:	2384      	movs	r3, #132
-    d60c:	401c      	ands	r4, r3
-    d60e:	9406      	str	r4, [sp, #24]
-    d610:	d161      	bne.n	d6d6 <.text+0xd6d6>
-    d612:	9809      	ldr	r0, [sp, #36]
-    d614:	9910      	ldr	r1, [sp, #64]
-    d616:	1a44      	subs	r4, r0, r1
-    d618:	2c00      	cmp	r4, #0
-    d61a:	dc33      	bgt.n	d684 <.text+0xd684>
-    d61c:	e05b      	b.n	d6d6 <.text+0xd6d6>
-    d61e:	9a07      	ldr	r2, [sp, #28]
-    d620:	6013      	str	r3, [r2, #0]
-    d622:	2310      	movs	r3, #16
-    d624:	6053      	str	r3, [r2, #4]
-    d626:	1c03      	adds	r3, r0, #0
-    d628:	20d3      	movs	r0, #211
-    d62a:	00c0      	lsls	r0, r0, #3
-    d62c:	4a0e      	ldr	r2, [pc, #56]	(d668 <.text+0xd668>)
-    d62e:	3310      	adds	r3, #16
-    d630:	4468      	add	r0, sp
-    d632:	6003      	str	r3, [r0, #0]
-    d634:	446a      	add	r2, sp
-    d636:	1c6b      	adds	r3, r5, #1
-    d638:	6013      	str	r3, [r2, #0]
-    d63a:	2b07      	cmp	r3, #7
-    d63c:	dc16      	bgt.n	d66c <.text+0xd66c>
-    d63e:	9b07      	ldr	r3, [sp, #28]
-    d640:	3308      	adds	r3, #8
-    d642:	9307      	str	r3, [sp, #28]
-    d644:	e01d      	b.n	d682 <.text+0xd682>
-    d646:	0000      	lsls	r0, r0, #0
-    d648:	5480      	strb	r0, [r0, r2]
-    d64a:	0001      	lsls	r1, r0, #0
-    d64c:	06c7      	lsls	r7, r0, #27
-    d64e:	0000      	lsls	r0, r0, #0
-    d650:	069c      	lsls	r4, r3, #26
-    d652:	0000      	lsls	r0, r0, #0
-    d654:	54a4      	strb	r4, [r4, r2]
-    d656:	0001      	lsls	r1, r0, #0
-    d658:	05cc      	lsls	r4, r1, #23
-    d65a:	0000      	lsls	r0, r0, #0
-    d65c:	54b8      	strb	r0, [r7, r2]
-    d65e:	0001      	lsls	r1, r0, #0
-    d660:	015b      	lsls	r3, r3, #5
-    d662:	0000      	lsls	r0, r0, #0
-    d664:	05cb      	lsls	r3, r1, #23
-    d666:	0000      	lsls	r0, r0, #0
-    d668:	0694      	lsls	r4, r2, #26
-    d66a:	0000      	lsls	r0, r0, #0
-    d66c:	9804      	ldr	r0, [sp, #16]
-    d66e:	f7ff fac7 	bl	cc00 <__sprint>
-    d672:	2800      	cmp	r0, #0
-    d674:	d001      	beq.n	d67a <.text+0xd67a>
-    d676:	f000 fca6 	bl	dfc6 <.text+0xdfc6>
-    d67a:	20c5      	movs	r0, #197
-    d67c:	00c0      	lsls	r0, r0, #3
-    d67e:	4468      	add	r0, sp
-    d680:	9007      	str	r0, [sp, #28]
-    d682:	3c10      	subs	r4, #16
-    d684:	22d3      	movs	r2, #211
-    d686:	4bce      	ldr	r3, [pc, #824]	(d9c0 <.text+0xd9c0>)
-    d688:	21d2      	movs	r1, #210
-    d68a:	00d2      	lsls	r2, r2, #3
-    d68c:	446b      	add	r3, sp
-    d68e:	00c9      	lsls	r1, r1, #3
-    d690:	446a      	add	r2, sp
-    d692:	681d      	ldr	r5, [r3, #0]
-    d694:	4469      	add	r1, sp
-    d696:	6810      	ldr	r0, [r2, #0]
-    d698:	4bca      	ldr	r3, [pc, #808]	(d9c4 <.text+0xd9c4>)
-    d69a:	2c10      	cmp	r4, #16
-    d69c:	dcbf      	bgt.n	d61e <.text+0xd61e>
-    d69e:	9a07      	ldr	r2, [sp, #28]
-    d6a0:	6013      	str	r3, [r2, #0]
-    d6a2:	6054      	str	r4, [r2, #4]
-    d6a4:	1903      	adds	r3, r0, r4
-    d6a6:	24d3      	movs	r4, #211
-    d6a8:	00e4      	lsls	r4, r4, #3
-    d6aa:	48c5      	ldr	r0, [pc, #788]	(d9c0 <.text+0xd9c0>)
-    d6ac:	446c      	add	r4, sp
-    d6ae:	6023      	str	r3, [r4, #0]
-    d6b0:	4468      	add	r0, sp
-    d6b2:	1c6b      	adds	r3, r5, #1
-    d6b4:	6003      	str	r3, [r0, #0]
-    d6b6:	2b07      	cmp	r3, #7
-    d6b8:	dc02      	bgt.n	d6c0 <.text+0xd6c0>
-    d6ba:	3208      	adds	r2, #8
-    d6bc:	9207      	str	r2, [sp, #28]
-    d6be:	e00a      	b.n	d6d6 <.text+0xd6d6>
-    d6c0:	9804      	ldr	r0, [sp, #16]
-    d6c2:	f7ff fa9d 	bl	cc00 <__sprint>
-    d6c6:	2800      	cmp	r0, #0
-    d6c8:	d001      	beq.n	d6ce <.text+0xd6ce>
-    d6ca:	f000 fc7c 	bl	dfc6 <.text+0xdfc6>
-    d6ce:	21c5      	movs	r1, #197
-    d6d0:	00c9      	lsls	r1, r1, #3
-    d6d2:	4469      	add	r1, sp
-    d6d4:	9107      	str	r1, [sp, #28]
-    d6d6:	4abc      	ldr	r2, [pc, #752]	(d9c8 <.text+0xd9c8>)
-    d6d8:	446a      	add	r2, sp
-    d6da:	7813      	ldrb	r3, [r2, #0]
-    d6dc:	2b00      	cmp	r3, #0
-    d6de:	d023      	beq.n	d728 <.text+0xd728>
-    d6e0:	9b07      	ldr	r3, [sp, #28]
-    d6e2:	20d3      	movs	r0, #211
-    d6e4:	9c07      	ldr	r4, [sp, #28]
-    d6e6:	00c0      	lsls	r0, r0, #3
-    d6e8:	4468      	add	r0, sp
-    d6ea:	601a      	str	r2, [r3, #0]
-    d6ec:	2301      	movs	r3, #1
-    d6ee:	6063      	str	r3, [r4, #4]
-    d6f0:	49b3      	ldr	r1, [pc, #716]	(d9c0 <.text+0xd9c0>)
-    d6f2:	6803      	ldr	r3, [r0, #0]
-    d6f4:	4469      	add	r1, sp
-    d6f6:	3301      	adds	r3, #1
-    d6f8:	6003      	str	r3, [r0, #0]
-    d6fa:	680b      	ldr	r3, [r1, #0]
-    d6fc:	3301      	adds	r3, #1
-    d6fe:	600b      	str	r3, [r1, #0]
-    d700:	2b07      	cmp	r3, #7
-    d702:	dc02      	bgt.n	d70a <.text+0xd70a>
-    d704:	3408      	adds	r4, #8
-    d706:	9407      	str	r4, [sp, #28]
-    d708:	e03a      	b.n	d780 <.text+0xd780>
-    d70a:	21d2      	movs	r1, #210
-    d70c:	00c9      	lsls	r1, r1, #3
-    d70e:	9804      	ldr	r0, [sp, #16]
-    d710:	4469      	add	r1, sp
-    d712:	f7ff fa75 	bl	cc00 <__sprint>
-    d716:	2800      	cmp	r0, #0
-    d718:	d001      	beq.n	d71e <.text+0xd71e>
-    d71a:	f000 fc54 	bl	dfc6 <.text+0xdfc6>
-    d71e:	22c5      	movs	r2, #197
-    d720:	00d2      	lsls	r2, r2, #3
-    d722:	446a      	add	r2, sp
-    d724:	9207      	str	r2, [sp, #28]
-    d726:	e02b      	b.n	d780 <.text+0xd780>
-    d728:	9b17      	ldr	r3, [sp, #92]
-    d72a:	2102      	movs	r1, #2
-    d72c:	420b      	tst	r3, r1
-    d72e:	d027      	beq.n	d780 <.text+0xd780>
-    d730:	4ba6      	ldr	r3, [pc, #664]	(d9cc <.text+0xd9cc>)
-    d732:	2230      	movs	r2, #48
-    d734:	446b      	add	r3, sp
-    d736:	701a      	strb	r2, [r3, #0]
-    d738:	ac19      	add	r4, sp, #100
-    d73a:	7824      	ldrb	r4, [r4, #0]
-    d73c:	705c      	strb	r4, [r3, #1]
-    d73e:	9807      	ldr	r0, [sp, #28]
-    d740:	6041      	str	r1, [r0, #4]
-    d742:	21d3      	movs	r1, #211
-    d744:	00c9      	lsls	r1, r1, #3
-    d746:	4469      	add	r1, sp
-    d748:	6003      	str	r3, [r0, #0]
-    d74a:	4a9d      	ldr	r2, [pc, #628]	(d9c0 <.text+0xd9c0>)
-    d74c:	680b      	ldr	r3, [r1, #0]
-    d74e:	446a      	add	r2, sp
-    d750:	3302      	adds	r3, #2
-    d752:	600b      	str	r3, [r1, #0]
-    d754:	6813      	ldr	r3, [r2, #0]
-    d756:	3301      	adds	r3, #1
-    d758:	6013      	str	r3, [r2, #0]
-    d75a:	2b07      	cmp	r3, #7
-    d75c:	dc02      	bgt.n	d764 <.text+0xd764>
-    d75e:	3008      	adds	r0, #8
-    d760:	9007      	str	r0, [sp, #28]
-    d762:	e00d      	b.n	d780 <.text+0xd780>
-    d764:	21d2      	movs	r1, #210
-    d766:	00c9      	lsls	r1, r1, #3
-    d768:	9804      	ldr	r0, [sp, #16]
-    d76a:	4469      	add	r1, sp
-    d76c:	f7ff fa48 	bl	cc00 <__sprint>
-    d770:	2800      	cmp	r0, #0
-    d772:	d001      	beq.n	d778 <.text+0xd778>
-    d774:	f000 fc27 	bl	dfc6 <.text+0xdfc6>
-    d778:	23c5      	movs	r3, #197
-    d77a:	00db      	lsls	r3, r3, #3
-    d77c:	446b      	add	r3, sp
-    d77e:	9307      	str	r3, [sp, #28]
-    d780:	9c06      	ldr	r4, [sp, #24]
-    d782:	2c80      	cmp	r4, #128
-    d784:	d14d      	bne.n	d822 <.text+0xd822>
-    d786:	9809      	ldr	r0, [sp, #36]
-    d788:	9910      	ldr	r1, [sp, #64]
-    d78a:	1a44      	subs	r4, r0, r1
-    d78c:	2c00      	cmp	r4, #0
-    d78e:	dc20      	bgt.n	d7d2 <.text+0xd7d2>
-    d790:	e047      	b.n	d822 <.text+0xd822>
-    d792:	9a07      	ldr	r2, [sp, #28]
-    d794:	6013      	str	r3, [r2, #0]
-    d796:	2310      	movs	r3, #16
-    d798:	6053      	str	r3, [r2, #4]
-    d79a:	1c03      	adds	r3, r0, #0
-    d79c:	20d3      	movs	r0, #211
-    d79e:	00c0      	lsls	r0, r0, #3
-    d7a0:	4a87      	ldr	r2, [pc, #540]	(d9c0 <.text+0xd9c0>)
-    d7a2:	3310      	adds	r3, #16
-    d7a4:	4468      	add	r0, sp
-    d7a6:	6003      	str	r3, [r0, #0]
-    d7a8:	446a      	add	r2, sp
-    d7aa:	1c6b      	adds	r3, r5, #1
-    d7ac:	6013      	str	r3, [r2, #0]
-    d7ae:	2b07      	cmp	r3, #7
-    d7b0:	dc03      	bgt.n	d7ba <.text+0xd7ba>
-    d7b2:	9b07      	ldr	r3, [sp, #28]
-    d7b4:	3308      	adds	r3, #8
-    d7b6:	9307      	str	r3, [sp, #28]
-    d7b8:	e00a      	b.n	d7d0 <.text+0xd7d0>
-    d7ba:	9804      	ldr	r0, [sp, #16]
-    d7bc:	f7ff fa20 	bl	cc00 <__sprint>
-    d7c0:	2800      	cmp	r0, #0
-    d7c2:	d001      	beq.n	d7c8 <.text+0xd7c8>
-    d7c4:	f000 fbff 	bl	dfc6 <.text+0xdfc6>
-    d7c8:	20c5      	movs	r0, #197
-    d7ca:	00c0      	lsls	r0, r0, #3
-    d7cc:	4468      	add	r0, sp
-    d7ce:	9007      	str	r0, [sp, #28]
-    d7d0:	3c10      	subs	r4, #16
-    d7d2:	22d3      	movs	r2, #211
-    d7d4:	4b7a      	ldr	r3, [pc, #488]	(d9c0 <.text+0xd9c0>)
-    d7d6:	21d2      	movs	r1, #210
-    d7d8:	00d2      	lsls	r2, r2, #3
-    d7da:	446b      	add	r3, sp
-    d7dc:	00c9      	lsls	r1, r1, #3
-    d7de:	446a      	add	r2, sp
-    d7e0:	681d      	ldr	r5, [r3, #0]
-    d7e2:	4469      	add	r1, sp
-    d7e4:	6810      	ldr	r0, [r2, #0]
-    d7e6:	4b7a      	ldr	r3, [pc, #488]	(d9d0 <.text+0xd9d0>)
-    d7e8:	2c10      	cmp	r4, #16
-    d7ea:	dcd2      	bgt.n	d792 <.text+0xd792>
-    d7ec:	9a07      	ldr	r2, [sp, #28]
-    d7ee:	6013      	str	r3, [r2, #0]
-    d7f0:	6054      	str	r4, [r2, #4]
-    d7f2:	1903      	adds	r3, r0, r4
-    d7f4:	24d3      	movs	r4, #211
-    d7f6:	00e4      	lsls	r4, r4, #3
-    d7f8:	4871      	ldr	r0, [pc, #452]	(d9c0 <.text+0xd9c0>)
-    d7fa:	446c      	add	r4, sp
-    d7fc:	6023      	str	r3, [r4, #0]
-    d7fe:	4468      	add	r0, sp
-    d800:	1c6b      	adds	r3, r5, #1
-    d802:	6003      	str	r3, [r0, #0]
-    d804:	2b07      	cmp	r3, #7
-    d806:	dc02      	bgt.n	d80e <.text+0xd80e>
-    d808:	3208      	adds	r2, #8
-    d80a:	9207      	str	r2, [sp, #28]
-    d80c:	e009      	b.n	d822 <.text+0xd822>
-    d80e:	9804      	ldr	r0, [sp, #16]
-    d810:	f7ff f9f6 	bl	cc00 <__sprint>
-    d814:	2800      	cmp	r0, #0
-    d816:	d000      	beq.n	d81a <.text+0xd81a>
-    d818:	e3d5      	b.n	dfc6 <.text+0xdfc6>
-    d81a:	21c5      	movs	r1, #197
-    d81c:	00c9      	lsls	r1, r1, #3
-    d81e:	4469      	add	r1, sp
-    d820:	9107      	str	r1, [sp, #28]
-    d822:	9a0f      	ldr	r2, [sp, #60]
-    d824:	1b94      	subs	r4, r2, r6
-    d826:	2c00      	cmp	r4, #0
-    d828:	dc1f      	bgt.n	d86a <.text+0xd86a>
-    d82a:	e046      	b.n	d8ba <.text+0xd8ba>
-    d82c:	9a07      	ldr	r2, [sp, #28]
-    d82e:	6013      	str	r3, [r2, #0]
-    d830:	2310      	movs	r3, #16
-    d832:	6053      	str	r3, [r2, #4]
-    d834:	1c03      	adds	r3, r0, #0
-    d836:	20d3      	movs	r0, #211
-    d838:	00c0      	lsls	r0, r0, #3
-    d83a:	4a61      	ldr	r2, [pc, #388]	(d9c0 <.text+0xd9c0>)
-    d83c:	3310      	adds	r3, #16
-    d83e:	4468      	add	r0, sp
-    d840:	6003      	str	r3, [r0, #0]
-    d842:	446a      	add	r2, sp
-    d844:	1c6b      	adds	r3, r5, #1
-    d846:	6013      	str	r3, [r2, #0]
-    d848:	2b07      	cmp	r3, #7
-    d84a:	dc03      	bgt.n	d854 <.text+0xd854>
-    d84c:	9b07      	ldr	r3, [sp, #28]
-    d84e:	3308      	adds	r3, #8
-    d850:	9307      	str	r3, [sp, #28]
-    d852:	e009      	b.n	d868 <.text+0xd868>
-    d854:	9804      	ldr	r0, [sp, #16]
-    d856:	f7ff f9d3 	bl	cc00 <__sprint>
-    d85a:	2800      	cmp	r0, #0
-    d85c:	d000      	beq.n	d860 <.text+0xd860>
-    d85e:	e3b2      	b.n	dfc6 <.text+0xdfc6>
-    d860:	20c5      	movs	r0, #197
-    d862:	00c0      	lsls	r0, r0, #3
-    d864:	4468      	add	r0, sp
-    d866:	9007      	str	r0, [sp, #28]
-    d868:	3c10      	subs	r4, #16
-    d86a:	22d3      	movs	r2, #211
-    d86c:	4b54      	ldr	r3, [pc, #336]	(d9c0 <.text+0xd9c0>)
-    d86e:	21d2      	movs	r1, #210
-    d870:	00d2      	lsls	r2, r2, #3
-    d872:	446b      	add	r3, sp
-    d874:	00c9      	lsls	r1, r1, #3
-    d876:	446a      	add	r2, sp
-    d878:	681d      	ldr	r5, [r3, #0]
-    d87a:	4469      	add	r1, sp
-    d87c:	6810      	ldr	r0, [r2, #0]
-    d87e:	4b54      	ldr	r3, [pc, #336]	(d9d0 <.text+0xd9d0>)
-    d880:	2c10      	cmp	r4, #16
-    d882:	dcd3      	bgt.n	d82c <.text+0xd82c>
-    d884:	9a07      	ldr	r2, [sp, #28]
-    d886:	6013      	str	r3, [r2, #0]
-    d888:	6054      	str	r4, [r2, #4]
-    d88a:	1903      	adds	r3, r0, r4
-    d88c:	24d3      	movs	r4, #211
-    d88e:	00e4      	lsls	r4, r4, #3
-    d890:	484b      	ldr	r0, [pc, #300]	(d9c0 <.text+0xd9c0>)
-    d892:	446c      	add	r4, sp
-    d894:	6023      	str	r3, [r4, #0]
-    d896:	4468      	add	r0, sp
-    d898:	1c6b      	adds	r3, r5, #1
-    d89a:	6003      	str	r3, [r0, #0]
-    d89c:	2b07      	cmp	r3, #7
-    d89e:	dc02      	bgt.n	d8a6 <.text+0xd8a6>
-    d8a0:	3208      	adds	r2, #8
-    d8a2:	9207      	str	r2, [sp, #28]
-    d8a4:	e009      	b.n	d8ba <.text+0xd8ba>
-    d8a6:	9804      	ldr	r0, [sp, #16]
-    d8a8:	f7ff f9aa 	bl	cc00 <__sprint>
-    d8ac:	2800      	cmp	r0, #0
-    d8ae:	d000      	beq.n	d8b2 <.text+0xd8b2>
-    d8b0:	e389      	b.n	dfc6 <.text+0xdfc6>
-    d8b2:	21c5      	movs	r1, #197
-    d8b4:	00c9      	lsls	r1, r1, #3
-    d8b6:	4469      	add	r1, sp
-    d8b8:	9107      	str	r1, [sp, #28]
-    d8ba:	9a17      	ldr	r2, [sp, #92]
-    d8bc:	05d2      	lsls	r2, r2, #23
-    d8be:	d412      	bmi.n	d8e6 <.text+0xd8e6>
-    d8c0:	24d3      	movs	r4, #211
-    d8c2:	9b07      	ldr	r3, [sp, #28]
-    d8c4:	00e4      	lsls	r4, r4, #3
-    d8c6:	446c      	add	r4, sp
-    d8c8:	601f      	str	r7, [r3, #0]
-    d8ca:	605e      	str	r6, [r3, #4]
-    d8cc:	483c      	ldr	r0, [pc, #240]	(d9c0 <.text+0xd9c0>)
-    d8ce:	6823      	ldr	r3, [r4, #0]
-    d8d0:	4468      	add	r0, sp
-    d8d2:	199b      	adds	r3, r3, r6
-    d8d4:	6023      	str	r3, [r4, #0]
-    d8d6:	6803      	ldr	r3, [r0, #0]
-    d8d8:	3301      	adds	r3, #1
-    d8da:	6003      	str	r3, [r0, #0]
-    d8dc:	2b07      	cmp	r3, #7
-    d8de:	dd00      	ble.n	d8e2 <.text+0xd8e2>
-    d8e0:	e2e5      	b.n	deae <.text+0xdeae>
-    d8e2:	9a07      	ldr	r2, [sp, #28]
-    d8e4:	e2e1      	b.n	deaa <.text+0xdeaa>
-    d8e6:	9919      	ldr	r1, [sp, #100]
-    d8e8:	2965      	cmp	r1, #101
-    d8ea:	dc00      	bgt.n	d8ee <.text+0xd8ee>
-    d8ec:	e21c      	b.n	dd28 <.text+0xdd28>
-    d8ee:	9814      	ldr	r0, [sp, #80]
-    d8f0:	9915      	ldr	r1, [sp, #84]
-    d8f2:	4a38      	ldr	r2, [pc, #224]	(d9d4 <.text+0xd9d4>)
-    d8f4:	4b38      	ldr	r3, [pc, #224]	(d9d8 <.text+0xd9d8>)
-    d8f6:	f007 f9bd 	bl	14c74 <____eqdf2_from_thumb>
-    d8fa:	2800      	cmp	r0, #0
-    d8fc:	d000      	beq.n	d900 <.text+0xd900>
-    d8fe:	e09d      	b.n	da3c <.text+0xda3c>
-    d900:	4b36      	ldr	r3, [pc, #216]	(d9dc <.text+0xd9dc>)
-    d902:	9a07      	ldr	r2, [sp, #28]
-    d904:	24d3      	movs	r4, #211
-    d906:	00e4      	lsls	r4, r4, #3
-    d908:	446c      	add	r4, sp
-    d90a:	6013      	str	r3, [r2, #0]
-    d90c:	2301      	movs	r3, #1
-    d90e:	6053      	str	r3, [r2, #4]
-    d910:	482b      	ldr	r0, [pc, #172]	(d9c0 <.text+0xd9c0>)
-    d912:	6823      	ldr	r3, [r4, #0]
-    d914:	4468      	add	r0, sp
-    d916:	3301      	adds	r3, #1
-    d918:	6023      	str	r3, [r4, #0]
-    d91a:	6803      	ldr	r3, [r0, #0]
-    d91c:	3301      	adds	r3, #1
-    d91e:	6003      	str	r3, [r0, #0]
-    d920:	2b07      	cmp	r3, #7
-    d922:	dc01      	bgt.n	d928 <.text+0xd928>
-    d924:	3208      	adds	r2, #8
-    d926:	e00b      	b.n	d940 <.text+0xd940>
-    d928:	21d2      	movs	r1, #210
-    d92a:	00c9      	lsls	r1, r1, #3
-    d92c:	9804      	ldr	r0, [sp, #16]
-    d92e:	4469      	add	r1, sp
-    d930:	f7ff f966 	bl	cc00 <__sprint>
-    d934:	2800      	cmp	r0, #0
-    d936:	d000      	beq.n	d93a <.text+0xd93a>
-    d938:	e345      	b.n	dfc6 <.text+0xdfc6>
-    d93a:	22c5      	movs	r2, #197
-    d93c:	00d2      	lsls	r2, r2, #3
-    d93e:	446a      	add	r2, sp
-    d940:	4927      	ldr	r1, [pc, #156]	(d9e0 <.text+0xd9e0>)
-    d942:	4469      	add	r1, sp
-    d944:	680b      	ldr	r3, [r1, #0]
-    d946:	9c0e      	ldr	r4, [sp, #56]
-    d948:	42a3      	cmp	r3, r4
-    d94a:	db03      	blt.n	d954 <.text+0xd954>
-    d94c:	9817      	ldr	r0, [sp, #92]
-    d94e:	07c0      	lsls	r0, r0, #31
-    d950:	d400      	bmi.n	d954 <.text+0xd954>
-    d952:	e2b4      	b.n	debe <.text+0xdebe>
-    d954:	24d3      	movs	r4, #211
-    d956:	00e4      	lsls	r4, r4, #3
-    d958:	2301      	movs	r3, #1
-    d95a:	446c      	add	r4, sp
-    d95c:	6053      	str	r3, [r2, #4]
-    d95e:	4818      	ldr	r0, [pc, #96]	(d9c0 <.text+0xd9c0>)
-    d960:	6823      	ldr	r3, [r4, #0]
-    d962:	4468      	add	r0, sp
-    d964:	3301      	adds	r3, #1
-    d966:	6023      	str	r3, [r4, #0]
-    d968:	6803      	ldr	r3, [r0, #0]
-    d96a:	990b      	ldr	r1, [sp, #44]
-    d96c:	3301      	adds	r3, #1
-    d96e:	6011      	str	r1, [r2, #0]
-    d970:	6003      	str	r3, [r0, #0]
-    d972:	2b07      	cmp	r3, #7
-    d974:	dc01      	bgt.n	d97a <.text+0xd97a>
-    d976:	3208      	adds	r2, #8
-    d978:	e00b      	b.n	d992 <.text+0xd992>
-    d97a:	21d2      	movs	r1, #210
-    d97c:	00c9      	lsls	r1, r1, #3
-    d97e:	9804      	ldr	r0, [sp, #16]
-    d980:	4469      	add	r1, sp
-    d982:	f7ff f93d 	bl	cc00 <__sprint>
-    d986:	2800      	cmp	r0, #0
-    d988:	d000      	beq.n	d98c <.text+0xd98c>
-    d98a:	e31c      	b.n	dfc6 <.text+0xdfc6>
-    d98c:	22c5      	movs	r2, #197
-    d98e:	00d2      	lsls	r2, r2, #3
-    d990:	446a      	add	r2, sp
-    d992:	9c0e      	ldr	r4, [sp, #56]
-    d994:	3c01      	subs	r4, #1
-    d996:	2c00      	cmp	r4, #0
-    d998:	dc2e      	bgt.n	d9f8 <.text+0xd9f8>
-    d99a:	e290      	b.n	debe <.text+0xdebe>
-    d99c:	6013      	str	r3, [r2, #0]
-    d99e:	2310      	movs	r3, #16
-    d9a0:	6053      	str	r3, [r2, #4]
-    d9a2:	1c03      	adds	r3, r0, #0
-    d9a4:	20d3      	movs	r0, #211
-    d9a6:	00c0      	lsls	r0, r0, #3
-    d9a8:	3310      	adds	r3, #16
-    d9aa:	4468      	add	r0, sp
-    d9ac:	6003      	str	r3, [r0, #0]
-    d9ae:	4804      	ldr	r0, [pc, #16]	(d9c0 <.text+0xd9c0>)
-    d9b0:	1c6b      	adds	r3, r5, #1
-    d9b2:	4468      	add	r0, sp
-    d9b4:	6003      	str	r3, [r0, #0]
-    d9b6:	2b07      	cmp	r3, #7
-    d9b8:	dc14      	bgt.n	d9e4 <.text+0xd9e4>
-    d9ba:	3208      	adds	r2, #8
-    d9bc:	e01b      	b.n	d9f6 <.text+0xd9f6>
-    d9be:	0000      	lsls	r0, r0, #0
-    d9c0:	0694      	lsls	r4, r2, #26
-    d9c2:	0000      	lsls	r0, r0, #0
-    d9c4:	4fdc      	ldr	r7, [pc, #880]	(dd38 <.text+0xdd38>)
-    d9c6:	0001      	lsls	r1, r0, #0
-    d9c8:	06c7      	lsls	r7, r0, #27
-    d9ca:	0000      	lsls	r0, r0, #0
-    d9cc:	06c5      	lsls	r5, r0, #27
-    d9ce:	0000      	lsls	r0, r0, #0
-    d9d0:	4fcc      	ldr	r7, [pc, #816]	(dd04 <.text+0xdd04>)
-    d9d2:	0001      	lsls	r1, r0, #0
-	...
-    d9dc:	54d4      	strb	r4, [r2, r3]
-    d9de:	0001      	lsls	r1, r0, #0
-    d9e0:	06b4      	lsls	r4, r6, #26
-    d9e2:	0000      	lsls	r0, r0, #0
-    d9e4:	9804      	ldr	r0, [sp, #16]
-    d9e6:	f7ff f90b 	bl	cc00 <__sprint>
-    d9ea:	2800      	cmp	r0, #0
-    d9ec:	d000      	beq.n	d9f0 <.text+0xd9f0>
-    d9ee:	e2ea      	b.n	dfc6 <.text+0xdfc6>
-    d9f0:	22c5      	movs	r2, #197
-    d9f2:	00d2      	lsls	r2, r2, #3
-    d9f4:	446a      	add	r2, sp
-    d9f6:	3c10      	subs	r4, #16
-    d9f8:	23d3      	movs	r3, #211
-    d9fa:	00db      	lsls	r3, r3, #3
-    d9fc:	446b      	add	r3, sp
-    d9fe:	6818      	ldr	r0, [r3, #0]
-    da00:	4bda      	ldr	r3, [pc, #872]	(dd6c <.text+0xdd6c>)
-    da02:	21d2      	movs	r1, #210
-    da04:	446b      	add	r3, sp
-    da06:	00c9      	lsls	r1, r1, #3
-    da08:	681d      	ldr	r5, [r3, #0]
-    da0a:	4469      	add	r1, sp
-    da0c:	4bd8      	ldr	r3, [pc, #864]	(dd70 <.text+0xdd70>)
-    da0e:	2c10      	cmp	r4, #16
-    da10:	dcc4      	bgt.n	d99c <.text+0xd99c>
-    da12:	6013      	str	r3, [r2, #0]
-    da14:	6054      	str	r4, [r2, #4]
-    da16:	1903      	adds	r3, r0, r4
-    da18:	24d3      	movs	r4, #211
-    da1a:	00e4      	lsls	r4, r4, #3
-    da1c:	48d3      	ldr	r0, [pc, #844]	(dd6c <.text+0xdd6c>)
-    da1e:	446c      	add	r4, sp
-    da20:	6023      	str	r3, [r4, #0]
-    da22:	4468      	add	r0, sp
-    da24:	1c6b      	adds	r3, r5, #1
-    da26:	6003      	str	r3, [r0, #0]
-    da28:	2b07      	cmp	r3, #7
-    da2a:	dc00      	bgt.n	da2e <.text+0xda2e>
-    da2c:	e23d      	b.n	deaa <.text+0xdeaa>
-    da2e:	9804      	ldr	r0, [sp, #16]
-    da30:	f7ff f8e6 	bl	cc00 <__sprint>
-    da34:	2800      	cmp	r0, #0
-    da36:	d000      	beq.n	da3a <.text+0xda3a>
-    da38:	e2c5      	b.n	dfc6 <.text+0xdfc6>
-    da3a:	e23d      	b.n	deb8 <.text+0xdeb8>
-    da3c:	49cd      	ldr	r1, [pc, #820]	(dd74 <.text+0xdd74>)
-    da3e:	4469      	add	r1, sp
-    da40:	680b      	ldr	r3, [r1, #0]
-    da42:	2b00      	cmp	r3, #0
-    da44:	dd00      	ble.n	da48 <.text+0xda48>
-    da46:	e095      	b.n	db74 <.text+0xdb74>
-    da48:	4bcb      	ldr	r3, [pc, #812]	(dd78 <.text+0xdd78>)
-    da4a:	9a07      	ldr	r2, [sp, #28]
-    da4c:	24d3      	movs	r4, #211
-    da4e:	00e4      	lsls	r4, r4, #3
-    da50:	446c      	add	r4, sp
-    da52:	6013      	str	r3, [r2, #0]
-    da54:	2301      	movs	r3, #1
-    da56:	6053      	str	r3, [r2, #4]
-    da58:	48c4      	ldr	r0, [pc, #784]	(dd6c <.text+0xdd6c>)
-    da5a:	6823      	ldr	r3, [r4, #0]
-    da5c:	4468      	add	r0, sp
-    da5e:	3301      	adds	r3, #1
-    da60:	6023      	str	r3, [r4, #0]
-    da62:	6803      	ldr	r3, [r0, #0]
-    da64:	3301      	adds	r3, #1
-    da66:	6003      	str	r3, [r0, #0]
-    da68:	2b07      	cmp	r3, #7
-    da6a:	dc01      	bgt.n	da70 <.text+0xda70>
-    da6c:	3208      	adds	r2, #8
-    da6e:	e00b      	b.n	da88 <.text+0xda88>
-    da70:	21d2      	movs	r1, #210
-    da72:	00c9      	lsls	r1, r1, #3
-    da74:	9804      	ldr	r0, [sp, #16]
-    da76:	4469      	add	r1, sp
-    da78:	f7ff f8c2 	bl	cc00 <__sprint>
-    da7c:	2800      	cmp	r0, #0
-    da7e:	d000      	beq.n	da82 <.text+0xda82>
-    da80:	e2a1      	b.n	dfc6 <.text+0xdfc6>
-    da82:	22c5      	movs	r2, #197
-    da84:	00d2      	lsls	r2, r2, #3
-    da86:	446a      	add	r2, sp
-    da88:	49ba      	ldr	r1, [pc, #744]	(dd74 <.text+0xdd74>)
-    da8a:	4469      	add	r1, sp
-    da8c:	680b      	ldr	r3, [r1, #0]
-    da8e:	2b00      	cmp	r3, #0
-    da90:	d103      	bne.n	da9a <.text+0xda9a>
-    da92:	9b0e      	ldr	r3, [sp, #56]
-    da94:	2b00      	cmp	r3, #0
-    da96:	d100      	bne.n	da9a <.text+0xda9a>
-    da98:	e211      	b.n	debe <.text+0xdebe>
-    da9a:	20d3      	movs	r0, #211
-    da9c:	00c0      	lsls	r0, r0, #3
-    da9e:	2301      	movs	r3, #1
-    daa0:	4468      	add	r0, sp
-    daa2:	6053      	str	r3, [r2, #4]
-    daa4:	49b1      	ldr	r1, [pc, #708]	(dd6c <.text+0xdd6c>)
-    daa6:	6803      	ldr	r3, [r0, #0]
-    daa8:	4469      	add	r1, sp
-    daaa:	3301      	adds	r3, #1
-    daac:	6003      	str	r3, [r0, #0]
-    daae:	680b      	ldr	r3, [r1, #0]
-    dab0:	9c0b      	ldr	r4, [sp, #44]
-    dab2:	3301      	adds	r3, #1
-    dab4:	6014      	str	r4, [r2, #0]
-    dab6:	600b      	str	r3, [r1, #0]
-    dab8:	2b07      	cmp	r3, #7
-    daba:	dc01      	bgt.n	dac0 <.text+0xdac0>
-    dabc:	3208      	adds	r2, #8
-    dabe:	e00b      	b.n	dad8 <.text+0xdad8>
-    dac0:	21d2      	movs	r1, #210
-    dac2:	00c9      	lsls	r1, r1, #3
-    dac4:	9804      	ldr	r0, [sp, #16]
-    dac6:	4469      	add	r1, sp
-    dac8:	f7ff f89a 	bl	cc00 <__sprint>
-    dacc:	2800      	cmp	r0, #0
-    dace:	d000      	beq.n	dad2 <.text+0xdad2>
-    dad0:	e279      	b.n	dfc6 <.text+0xdfc6>
-    dad2:	22c5      	movs	r2, #197
-    dad4:	00d2      	lsls	r2, r2, #3
-    dad6:	446a      	add	r2, sp
-    dad8:	4ca6      	ldr	r4, [pc, #664]	(dd74 <.text+0xdd74>)
-    dada:	446c      	add	r4, sp
-    dadc:	6823      	ldr	r3, [r4, #0]
-    dade:	425e      	negs	r6, r3
-    dae0:	2e00      	cmp	r6, #0
-    dae2:	dc1b      	bgt.n	db1c <.text+0xdb1c>
-    dae4:	e03d      	b.n	db62 <.text+0xdb62>
-    dae6:	6013      	str	r3, [r2, #0]
-    dae8:	2310      	movs	r3, #16
-    daea:	6053      	str	r3, [r2, #4]
-    daec:	1c03      	adds	r3, r0, #0
-    daee:	20d3      	movs	r0, #211
-    daf0:	00c0      	lsls	r0, r0, #3
-    daf2:	4c9e      	ldr	r4, [pc, #632]	(dd6c <.text+0xdd6c>)
-    daf4:	3310      	adds	r3, #16
-    daf6:	4468      	add	r0, sp
-    daf8:	6003      	str	r3, [r0, #0]
-    dafa:	446c      	add	r4, sp
-    dafc:	1c6b      	adds	r3, r5, #1
-    dafe:	6023      	str	r3, [r4, #0]
-    db00:	2b07      	cmp	r3, #7
-    db02:	dc01      	bgt.n	db08 <.text+0xdb08>
-    db04:	3208      	adds	r2, #8
-    db06:	e008      	b.n	db1a <.text+0xdb1a>
-    db08:	9804      	ldr	r0, [sp, #16]
-    db0a:	f7ff f879 	bl	cc00 <__sprint>
-    db0e:	2800      	cmp	r0, #0
-    db10:	d000      	beq.n	db14 <.text+0xdb14>
-    db12:	e258      	b.n	dfc6 <.text+0xdfc6>
-    db14:	22c5      	movs	r2, #197
-    db16:	00d2      	lsls	r2, r2, #3
-    db18:	446a      	add	r2, sp
-    db1a:	3e10      	subs	r6, #16
-    db1c:	23d3      	movs	r3, #211
-    db1e:	4c93      	ldr	r4, [pc, #588]	(dd6c <.text+0xdd6c>)
-    db20:	21d2      	movs	r1, #210
-    db22:	00db      	lsls	r3, r3, #3
-    db24:	446b      	add	r3, sp
-    db26:	00c9      	lsls	r1, r1, #3
-    db28:	446c      	add	r4, sp
-    db2a:	6818      	ldr	r0, [r3, #0]
-    db2c:	4469      	add	r1, sp
-    db2e:	6825      	ldr	r5, [r4, #0]
-    db30:	4b8f      	ldr	r3, [pc, #572]	(dd70 <.text+0xdd70>)
-    db32:	2e10      	cmp	r6, #16
-    db34:	dcd7      	bgt.n	dae6 <.text+0xdae6>
-    db36:	6013      	str	r3, [r2, #0]
-    db38:	1983      	adds	r3, r0, r6
-    db3a:	20d3      	movs	r0, #211
-    db3c:	00c0      	lsls	r0, r0, #3
-    db3e:	4468      	add	r0, sp
-    db40:	6003      	str	r3, [r0, #0]
-    db42:	1c6b      	adds	r3, r5, #1
-    db44:	6056      	str	r6, [r2, #4]
-    db46:	6023      	str	r3, [r4, #0]
-    db48:	2b07      	cmp	r3, #7
-    db4a:	dc01      	bgt.n	db50 <.text+0xdb50>
-    db4c:	3208      	adds	r2, #8
-    db4e:	e008      	b.n	db62 <.text+0xdb62>
-    db50:	9804      	ldr	r0, [sp, #16]
-    db52:	f7ff f855 	bl	cc00 <__sprint>
-    db56:	2800      	cmp	r0, #0
-    db58:	d000      	beq.n	db5c <.text+0xdb5c>
-    db5a:	e234      	b.n	dfc6 <.text+0xdfc6>
-    db5c:	22c5      	movs	r2, #197
-    db5e:	00d2      	lsls	r2, r2, #3
-    db60:	446a      	add	r2, sp
-    db62:	24d3      	movs	r4, #211
-    db64:	00e4      	lsls	r4, r4, #3
-    db66:	446c      	add	r4, sp
-    db68:	990e      	ldr	r1, [sp, #56]
-    db6a:	6823      	ldr	r3, [r4, #0]
-    db6c:	185b      	adds	r3, r3, r1
-    db6e:	6017      	str	r7, [r2, #0]
-    db70:	6051      	str	r1, [r2, #4]
-    db72:	e07b      	b.n	dc6c <.text+0xdc6c>
-    db74:	22d3      	movs	r2, #211
-    db76:	00d2      	lsls	r2, r2, #3
-    db78:	446a      	add	r2, sp
-    db7a:	4c7c      	ldr	r4, [pc, #496]	(dd6c <.text+0xdd6c>)
-    db7c:	21d2      	movs	r1, #210
-    db7e:	6810      	ldr	r0, [r2, #0]
-    db80:	9a0e      	ldr	r2, [sp, #56]
-    db82:	00c9      	lsls	r1, r1, #3
-    db84:	446c      	add	r4, sp
-    db86:	4469      	add	r1, sp
-    db88:	6825      	ldr	r5, [r4, #0]
-    db8a:	4293      	cmp	r3, r2
-    db8c:	db78      	blt.n	dc80 <.text+0xdc80>
-    db8e:	9b07      	ldr	r3, [sp, #28]
-    db90:	24d3      	movs	r4, #211
-    db92:	601f      	str	r7, [r3, #0]
-    db94:	605a      	str	r2, [r3, #4]
-    db96:	00e4      	lsls	r4, r4, #3
-    db98:	1883      	adds	r3, r0, r2
-    db9a:	4874      	ldr	r0, [pc, #464]	(dd6c <.text+0xdd6c>)
-    db9c:	446c      	add	r4, sp
-    db9e:	6023      	str	r3, [r4, #0]
-    dba0:	4468      	add	r0, sp
-    dba2:	1c6b      	adds	r3, r5, #1
-    dba4:	6003      	str	r3, [r0, #0]
-    dba6:	2b07      	cmp	r3, #7
-    dba8:	dc02      	bgt.n	dbb0 <.text+0xdbb0>
-    dbaa:	9a07      	ldr	r2, [sp, #28]
-    dbac:	3208      	adds	r2, #8
-    dbae:	e008      	b.n	dbc2 <.text+0xdbc2>
-    dbb0:	9804      	ldr	r0, [sp, #16]
-    dbb2:	f7ff f825 	bl	cc00 <__sprint>
-    dbb6:	2800      	cmp	r0, #0
-    dbb8:	d000      	beq.n	dbbc <.text+0xdbbc>
-    dbba:	e204      	b.n	dfc6 <.text+0xdfc6>
-    dbbc:	22c5      	movs	r2, #197
-    dbbe:	00d2      	lsls	r2, r2, #3
-    dbc0:	446a      	add	r2, sp
-    dbc2:	496c      	ldr	r1, [pc, #432]	(dd74 <.text+0xdd74>)
-    dbc4:	4469      	add	r1, sp
-    dbc6:	680b      	ldr	r3, [r1, #0]
-    dbc8:	980e      	ldr	r0, [sp, #56]
-    dbca:	1a1c      	subs	r4, r3, r0
-    dbcc:	2c00      	cmp	r4, #0
-    dbce:	dc1b      	bgt.n	dc08 <.text+0xdc08>
-    dbd0:	e03f      	b.n	dc52 <.text+0xdc52>
-    dbd2:	6013      	str	r3, [r2, #0]
-    dbd4:	2310      	movs	r3, #16
-    dbd6:	6053      	str	r3, [r2, #4]
-    dbd8:	1c03      	adds	r3, r0, #0
-    dbda:	20d3      	movs	r0, #211
-    dbdc:	00c0      	lsls	r0, r0, #3
-    dbde:	3310      	adds	r3, #16
-    dbe0:	4468      	add	r0, sp
-    dbe2:	6003      	str	r3, [r0, #0]
-    dbe4:	4861      	ldr	r0, [pc, #388]	(dd6c <.text+0xdd6c>)
-    dbe6:	1c6b      	adds	r3, r5, #1
-    dbe8:	4468      	add	r0, sp
-    dbea:	6003      	str	r3, [r0, #0]
-    dbec:	2b07      	cmp	r3, #7
-    dbee:	dc01      	bgt.n	dbf4 <.text+0xdbf4>
-    dbf0:	3208      	adds	r2, #8
-    dbf2:	e008      	b.n	dc06 <.text+0xdc06>
-    dbf4:	9804      	ldr	r0, [sp, #16]
-    dbf6:	f7ff f803 	bl	cc00 <__sprint>
-    dbfa:	2800      	cmp	r0, #0
-    dbfc:	d000      	beq.n	dc00 <.text+0xdc00>
-    dbfe:	e1e2      	b.n	dfc6 <.text+0xdfc6>
-    dc00:	22c5      	movs	r2, #197
-    dc02:	00d2      	lsls	r2, r2, #3
-    dc04:	446a      	add	r2, sp
-    dc06:	3c10      	subs	r4, #16
-    dc08:	23d3      	movs	r3, #211
-    dc0a:	00db      	lsls	r3, r3, #3
-    dc0c:	446b      	add	r3, sp
-    dc0e:	6818      	ldr	r0, [r3, #0]
-    dc10:	4b56      	ldr	r3, [pc, #344]	(dd6c <.text+0xdd6c>)
-    dc12:	21d2      	movs	r1, #210
-    dc14:	446b      	add	r3, sp
-    dc16:	00c9      	lsls	r1, r1, #3
-    dc18:	681d      	ldr	r5, [r3, #0]
-    dc1a:	4469      	add	r1, sp
-    dc1c:	4b54      	ldr	r3, [pc, #336]	(dd70 <.text+0xdd70>)
-    dc1e:	2c10      	cmp	r4, #16
-    dc20:	dcd7      	bgt.n	dbd2 <.text+0xdbd2>
-    dc22:	6013      	str	r3, [r2, #0]
-    dc24:	6054      	str	r4, [r2, #4]
-    dc26:	1903      	adds	r3, r0, r4
-    dc28:	24d3      	movs	r4, #211
-    dc2a:	00e4      	lsls	r4, r4, #3
-    dc2c:	484f      	ldr	r0, [pc, #316]	(dd6c <.text+0xdd6c>)
-    dc2e:	446c      	add	r4, sp
-    dc30:	6023      	str	r3, [r4, #0]
-    dc32:	4468      	add	r0, sp
-    dc34:	1c6b      	adds	r3, r5, #1
-    dc36:	6003      	str	r3, [r0, #0]
-    dc38:	2b07      	cmp	r3, #7
-    dc3a:	dc01      	bgt.n	dc40 <.text+0xdc40>
-    dc3c:	3208      	adds	r2, #8
-    dc3e:	e008      	b.n	dc52 <.text+0xdc52>
-    dc40:	9804      	ldr	r0, [sp, #16]
-    dc42:	f7fe ffdd 	bl	cc00 <__sprint>
-    dc46:	2800      	cmp	r0, #0
-    dc48:	d000      	beq.n	dc4c <.text+0xdc4c>
-    dc4a:	e1bc      	b.n	dfc6 <.text+0xdfc6>
-    dc4c:	22c5      	movs	r2, #197
-    dc4e:	00d2      	lsls	r2, r2, #3
-    dc50:	446a      	add	r2, sp
-    dc52:	9b17      	ldr	r3, [sp, #92]
-    dc54:	2101      	movs	r1, #1
-    dc56:	420b      	tst	r3, r1
-    dc58:	d100      	bne.n	dc5c <.text+0xdc5c>
-    dc5a:	e130      	b.n	debe <.text+0xdebe>
-    dc5c:	24d3      	movs	r4, #211
-    dc5e:	4b47      	ldr	r3, [pc, #284]	(dd7c <.text+0xdd7c>)
-    dc60:	00e4      	lsls	r4, r4, #3
-    dc62:	446c      	add	r4, sp
-    dc64:	6013      	str	r3, [r2, #0]
-    dc66:	6823      	ldr	r3, [r4, #0]
-    dc68:	6051      	str	r1, [r2, #4]
-    dc6a:	3301      	adds	r3, #1
-    dc6c:	483f      	ldr	r0, [pc, #252]	(dd6c <.text+0xdd6c>)
-    dc6e:	4468      	add	r0, sp
-    dc70:	6023      	str	r3, [r4, #0]
-    dc72:	6803      	ldr	r3, [r0, #0]
-    dc74:	3301      	adds	r3, #1
-    dc76:	6003      	str	r3, [r0, #0]
-    dc78:	2b07      	cmp	r3, #7
-    dc7a:	dc00      	bgt.n	dc7e <.text+0xdc7e>
-    dc7c:	e115      	b.n	deaa <.text+0xdeaa>
-    dc7e:	e116      	b.n	deae <.text+0xdeae>
-    dc80:	9a07      	ldr	r2, [sp, #28]
-    dc82:	24d3      	movs	r4, #211
-    dc84:	6053      	str	r3, [r2, #4]
-    dc86:	00e4      	lsls	r4, r4, #3
-    dc88:	18c3      	adds	r3, r0, r3
-    dc8a:	4838      	ldr	r0, [pc, #224]	(dd6c <.text+0xdd6c>)
-    dc8c:	446c      	add	r4, sp
-    dc8e:	6023      	str	r3, [r4, #0]
-    dc90:	4468      	add	r0, sp
-    dc92:	1c6b      	adds	r3, r5, #1
-    dc94:	6017      	str	r7, [r2, #0]
-    dc96:	6003      	str	r3, [r0, #0]
-    dc98:	2b07      	cmp	r3, #7
-    dc9a:	dc01      	bgt.n	dca0 <.text+0xdca0>
-    dc9c:	3208      	adds	r2, #8
-    dc9e:	e008      	b.n	dcb2 <.text+0xdcb2>
-    dca0:	9804      	ldr	r0, [sp, #16]
-    dca2:	f7fe ffad 	bl	cc00 <__sprint>
-    dca6:	2800      	cmp	r0, #0
-    dca8:	d000      	beq.n	dcac <.text+0xdcac>
-    dcaa:	e18c      	b.n	dfc6 <.text+0xdfc6>
-    dcac:	22c5      	movs	r2, #197
-    dcae:	00d2      	lsls	r2, r2, #3
-    dcb0:	446a      	add	r2, sp
-    dcb2:	4b32      	ldr	r3, [pc, #200]	(dd7c <.text+0xdd7c>)
-    dcb4:	492f      	ldr	r1, [pc, #188]	(dd74 <.text+0xdd74>)
-    dcb6:	20d3      	movs	r0, #211
-    dcb8:	00c0      	lsls	r0, r0, #3
-    dcba:	4469      	add	r1, sp
-    dcbc:	4468      	add	r0, sp
-    dcbe:	6013      	str	r3, [r2, #0]
-    dcc0:	2301      	movs	r3, #1
-    dcc2:	680c      	ldr	r4, [r1, #0]
-    dcc4:	6053      	str	r3, [r2, #4]
-    dcc6:	4929      	ldr	r1, [pc, #164]	(dd6c <.text+0xdd6c>)
-    dcc8:	6803      	ldr	r3, [r0, #0]
-    dcca:	4469      	add	r1, sp
-    dccc:	3301      	adds	r3, #1
-    dcce:	6003      	str	r3, [r0, #0]
-    dcd0:	680b      	ldr	r3, [r1, #0]
-    dcd2:	3301      	adds	r3, #1
-    dcd4:	600b      	str	r3, [r1, #0]
-    dcd6:	2b07      	cmp	r3, #7
-    dcd8:	dc02      	bgt.n	dce0 <.text+0xdce0>
-    dcda:	1c11      	adds	r1, r2, #0
-    dcdc:	3108      	adds	r1, #8
-    dcde:	e00b      	b.n	dcf8 <.text+0xdcf8>
-    dce0:	21d2      	movs	r1, #210
-    dce2:	00c9      	lsls	r1, r1, #3
-    dce4:	9804      	ldr	r0, [sp, #16]
-    dce6:	4469      	add	r1, sp
-    dce8:	f7fe ff8a 	bl	cc00 <__sprint>
-    dcec:	2800      	cmp	r0, #0
-    dcee:	d000      	beq.n	dcf2 <.text+0xdcf2>
-    dcf0:	e169      	b.n	dfc6 <.text+0xdfc6>
-    dcf2:	21c5      	movs	r1, #197
-    dcf4:	00c9      	lsls	r1, r1, #3
-    dcf6:	4469      	add	r1, sp
-    dcf8:	193b      	adds	r3, r7, r4
-    dcfa:	600b      	str	r3, [r1, #0]
-    dcfc:	4b1d      	ldr	r3, [pc, #116]	(dd74 <.text+0xdd74>)
-    dcfe:	20d3      	movs	r0, #211
-    dd00:	446b      	add	r3, sp
-    dd02:	00c0      	lsls	r0, r0, #3
-    dd04:	681a      	ldr	r2, [r3, #0]
-    dd06:	4468      	add	r0, sp
-    dd08:	9c0e      	ldr	r4, [sp, #56]
-    dd0a:	6803      	ldr	r3, [r0, #0]
-    dd0c:	1aa2      	subs	r2, r4, r2
-    dd0e:	189b      	adds	r3, r3, r2
-    dd10:	604a      	str	r2, [r1, #4]
-    dd12:	4a16      	ldr	r2, [pc, #88]	(dd6c <.text+0xdd6c>)
-    dd14:	446a      	add	r2, sp
-    dd16:	6003      	str	r3, [r0, #0]
-    dd18:	6813      	ldr	r3, [r2, #0]
-    dd1a:	3301      	adds	r3, #1
-    dd1c:	6013      	str	r3, [r2, #0]
-    dd1e:	2b07      	cmp	r3, #7
-    dd20:	dd00      	ble.n	dd24 <.text+0xdd24>
-    dd22:	e0c4      	b.n	deae <.text+0xdeae>
-    dd24:	1c0a      	adds	r2, r1, #0
-    dd26:	e0c0      	b.n	deaa <.text+0xdeaa>
-    dd28:	9b0e      	ldr	r3, [sp, #56]
-    dd2a:	2b01      	cmp	r3, #1
-    dd2c:	dc04      	bgt.n	dd38 <.text+0xdd38>
-    dd2e:	9c17      	ldr	r4, [sp, #92]
-    dd30:	2301      	movs	r3, #1
-    dd32:	421c      	tst	r4, r3
-    dd34:	d100      	bne.n	dd38 <.text+0xdd38>
-    dd36:	e086      	b.n	de46 <.text+0xde46>
-    dd38:	4a11      	ldr	r2, [pc, #68]	(dd80 <.text+0xdd80>)
-    dd3a:	783b      	ldrb	r3, [r7, #0]
-    dd3c:	446a      	add	r2, sp
-    dd3e:	7013      	strb	r3, [r2, #0]
-    dd40:	232e      	movs	r3, #46
-    dd42:	7053      	strb	r3, [r2, #1]
-    dd44:	21d3      	movs	r1, #211
-    dd46:	9807      	ldr	r0, [sp, #28]
-    dd48:	00c9      	lsls	r1, r1, #3
-    dd4a:	2302      	movs	r3, #2
-    dd4c:	4469      	add	r1, sp
-    dd4e:	6002      	str	r2, [r0, #0]
-    dd50:	6043      	str	r3, [r0, #4]
-    dd52:	4a06      	ldr	r2, [pc, #24]	(dd6c <.text+0xdd6c>)
-    dd54:	680b      	ldr	r3, [r1, #0]
-    dd56:	446a      	add	r2, sp
-    dd58:	3302      	adds	r3, #2
-    dd5a:	600b      	str	r3, [r1, #0]
-    dd5c:	6813      	ldr	r3, [r2, #0]
-    dd5e:	3301      	adds	r3, #1
-    dd60:	6013      	str	r3, [r2, #0]
-    dd62:	2b07      	cmp	r3, #7
-    dd64:	dc0e      	bgt.n	dd84 <.text+0xdd84>
-    dd66:	1c04      	adds	r4, r0, #0
-    dd68:	3408      	adds	r4, #8
-    dd6a:	e017      	b.n	dd9c <.text+0xdd9c>
-    dd6c:	0694      	lsls	r4, r2, #26
-    dd6e:	0000      	lsls	r0, r0, #0
-    dd70:	4fcc      	ldr	r7, [pc, #816]	(e0a4 <wcrtomb+0x14>)
-    dd72:	0001      	lsls	r1, r0, #0
-    dd74:	06b4      	lsls	r4, r6, #26
-    dd76:	0000      	lsls	r0, r0, #0
-    dd78:	54d4      	strb	r4, [r2, r3]
-    dd7a:	0001      	lsls	r1, r0, #0
-    dd7c:	54d8      	strb	r0, [r3, r3]
-    dd7e:	0001      	lsls	r1, r0, #0
-    dd80:	06c5      	lsls	r5, r0, #27
-    dd82:	0000      	lsls	r0, r0, #0
-    dd84:	21d2      	movs	r1, #210
-    dd86:	00c9      	lsls	r1, r1, #3
-    dd88:	9804      	ldr	r0, [sp, #16]
-    dd8a:	4469      	add	r1, sp
-    dd8c:	f7fe ff38 	bl	cc00 <__sprint>
-    dd90:	2800      	cmp	r0, #0
-    dd92:	d000      	beq.n	dd96 <.text+0xdd96>
-    dd94:	e117      	b.n	dfc6 <.text+0xdfc6>
-    dd96:	24c5      	movs	r4, #197
-    dd98:	00e4      	lsls	r4, r4, #3
-    dd9a:	446c      	add	r4, sp
-    dd9c:	9814      	ldr	r0, [sp, #80]
-    dd9e:	9915      	ldr	r1, [sp, #84]
-    dda0:	4ba0      	ldr	r3, [pc, #640]	(e024 <.text+0xe024>)
-    dda2:	4a9f      	ldr	r2, [pc, #636]	(e020 <.text+0xe020>)
-    dda4:	f006 ff62 	bl	14c6c <____nedf2_from_thumb>
-    dda8:	9d0e      	ldr	r5, [sp, #56]
-    ddaa:	3d01      	subs	r5, #1
-    ddac:	2800      	cmp	r0, #0
-    ddae:	d012      	beq.n	ddd6 <.text+0xddd6>
-    ddb0:	20d3      	movs	r0, #211
-    ddb2:	00c0      	lsls	r0, r0, #3
-    ddb4:	1c7b      	adds	r3, r7, #1
-    ddb6:	4468      	add	r0, sp
-    ddb8:	6023      	str	r3, [r4, #0]
-    ddba:	990e      	ldr	r1, [sp, #56]
-    ddbc:	6803      	ldr	r3, [r0, #0]
-    ddbe:	4a9a      	ldr	r2, [pc, #616]	(e028 <.text+0xe028>)
-    ddc0:	18cb      	adds	r3, r1, r3
-    ddc2:	3b01      	subs	r3, #1
-    ddc4:	446a      	add	r2, sp
-    ddc6:	6003      	str	r3, [r0, #0]
-    ddc8:	6813      	ldr	r3, [r2, #0]
-    ddca:	3301      	adds	r3, #1
-    ddcc:	6065      	str	r5, [r4, #4]
-    ddce:	6013      	str	r3, [r2, #0]
-    ddd0:	2b07      	cmp	r3, #7
-    ddd2:	dd49      	ble.n	de68 <.text+0xde68>
-    ddd4:	e04a      	b.n	de6c <.text+0xde6c>
-    ddd6:	1e2e      	subs	r6, r5, #0
-    ddd8:	dc1b      	bgt.n	de12 <.text+0xde12>
-    ddda:	e053      	b.n	de84 <.text+0xde84>
-    dddc:	6023      	str	r3, [r4, #0]
-    ddde:	2310      	movs	r3, #16
-    dde0:	6063      	str	r3, [r4, #4]
-    dde2:	1c03      	adds	r3, r0, #0
-    dde4:	20d3      	movs	r0, #211
-    dde6:	00c0      	lsls	r0, r0, #3
-    dde8:	4a8f      	ldr	r2, [pc, #572]	(e028 <.text+0xe028>)
-    ddea:	3310      	adds	r3, #16
-    ddec:	4468      	add	r0, sp
-    ddee:	6003      	str	r3, [r0, #0]
-    ddf0:	446a      	add	r2, sp
-    ddf2:	1c6b      	adds	r3, r5, #1
-    ddf4:	6013      	str	r3, [r2, #0]
-    ddf6:	2b07      	cmp	r3, #7
-    ddf8:	dc01      	bgt.n	ddfe <.text+0xddfe>
-    ddfa:	3408      	adds	r4, #8
-    ddfc:	e008      	b.n	de10 <.text+0xde10>
-    ddfe:	9804      	ldr	r0, [sp, #16]
-    de00:	f7fe fefe 	bl	cc00 <__sprint>
-    de04:	2800      	cmp	r0, #0
-    de06:	d000      	beq.n	de0a <.text+0xde0a>
-    de08:	e0dd      	b.n	dfc6 <.text+0xdfc6>
-    de0a:	24c5      	movs	r4, #197
-    de0c:	00e4      	lsls	r4, r4, #3
-    de0e:	446c      	add	r4, sp
-    de10:	3e10      	subs	r6, #16
-    de12:	23d3      	movs	r3, #211
-    de14:	4a84      	ldr	r2, [pc, #528]	(e028 <.text+0xe028>)
-    de16:	21d2      	movs	r1, #210
-    de18:	00db      	lsls	r3, r3, #3
-    de1a:	446b      	add	r3, sp
-    de1c:	00c9      	lsls	r1, r1, #3
-    de1e:	446a      	add	r2, sp
-    de20:	6818      	ldr	r0, [r3, #0]
-    de22:	4469      	add	r1, sp
-    de24:	6815      	ldr	r5, [r2, #0]
-    de26:	4b81      	ldr	r3, [pc, #516]	(e02c <.text+0xe02c>)
-    de28:	2e10      	cmp	r6, #16
-    de2a:	dcd7      	bgt.n	dddc <.text+0xdddc>
-    de2c:	6023      	str	r3, [r4, #0]
-    de2e:	1983      	adds	r3, r0, r6
-    de30:	20d3      	movs	r0, #211
-    de32:	00c0      	lsls	r0, r0, #3
-    de34:	4468      	add	r0, sp
-    de36:	6003      	str	r3, [r0, #0]
-    de38:	1c6b      	adds	r3, r5, #1
-    de3a:	6066      	str	r6, [r4, #4]
-    de3c:	6013      	str	r3, [r2, #0]
-    de3e:	2b07      	cmp	r3, #7
-    de40:	dd12      	ble.n	de68 <.text+0xde68>
-    de42:	9804      	ldr	r0, [sp, #16]
-    de44:	e016      	b.n	de74 <.text+0xde74>
-    de46:	22d3      	movs	r2, #211
-    de48:	9907      	ldr	r1, [sp, #28]
-    de4a:	00d2      	lsls	r2, r2, #3
-    de4c:	446a      	add	r2, sp
-    de4e:	604b      	str	r3, [r1, #4]
-    de50:	4c75      	ldr	r4, [pc, #468]	(e028 <.text+0xe028>)
-    de52:	6813      	ldr	r3, [r2, #0]
-    de54:	446c      	add	r4, sp
-    de56:	3301      	adds	r3, #1
-    de58:	6013      	str	r3, [r2, #0]
-    de5a:	6823      	ldr	r3, [r4, #0]
-    de5c:	3301      	adds	r3, #1
-    de5e:	600f      	str	r7, [r1, #0]
-    de60:	6023      	str	r3, [r4, #0]
-    de62:	2b07      	cmp	r3, #7
-    de64:	dc02      	bgt.n	de6c <.text+0xde6c>
-    de66:	1c0c      	adds	r4, r1, #0
-    de68:	3408      	adds	r4, #8
-    de6a:	e00b      	b.n	de84 <.text+0xde84>
-    de6c:	21d2      	movs	r1, #210
-    de6e:	00c9      	lsls	r1, r1, #3
-    de70:	9804      	ldr	r0, [sp, #16]
-    de72:	4469      	add	r1, sp
-    de74:	f7fe fec4 	bl	cc00 <__sprint>
-    de78:	2800      	cmp	r0, #0
-    de7a:	d000      	beq.n	de7e <.text+0xde7e>
-    de7c:	e0a3      	b.n	dfc6 <.text+0xdfc6>
-    de7e:	24c5      	movs	r4, #197
-    de80:	00e4      	lsls	r4, r4, #3
-    de82:	446c      	add	r4, sp
-    de84:	4b6a      	ldr	r3, [pc, #424]	(e030 <.text+0xe030>)
-    de86:	21d3      	movs	r1, #211
-    de88:	00c9      	lsls	r1, r1, #3
-    de8a:	446b      	add	r3, sp
-    de8c:	4469      	add	r1, sp
-    de8e:	980d      	ldr	r0, [sp, #52]
-    de90:	6023      	str	r3, [r4, #0]
-    de92:	4a65      	ldr	r2, [pc, #404]	(e028 <.text+0xe028>)
-    de94:	680b      	ldr	r3, [r1, #0]
-    de96:	446a      	add	r2, sp
-    de98:	181b      	adds	r3, r3, r0
-    de9a:	600b      	str	r3, [r1, #0]
-    de9c:	6813      	ldr	r3, [r2, #0]
-    de9e:	3301      	adds	r3, #1
-    dea0:	6060      	str	r0, [r4, #4]
-    dea2:	6013      	str	r3, [r2, #0]
-    dea4:	2b07      	cmp	r3, #7
-    dea6:	dc02      	bgt.n	deae <.text+0xdeae>
-    dea8:	1c22      	adds	r2, r4, #0
-    deaa:	3208      	adds	r2, #8
-    deac:	e007      	b.n	debe <.text+0xdebe>
-    deae:	21d2      	movs	r1, #210
-    deb0:	00c9      	lsls	r1, r1, #3
-    deb2:	9804      	ldr	r0, [sp, #16]
-    deb4:	4469      	add	r1, sp
-    deb6:	e5bb      	b.n	da30 <.text+0xda30>
-    deb8:	22c5      	movs	r2, #197
-    deba:	00d2      	lsls	r2, r2, #3
-    debc:	446a      	add	r2, sp
-    debe:	9b17      	ldr	r3, [sp, #92]
-    dec0:	075b      	lsls	r3, r3, #29
-    dec2:	d53e      	bpl.n	df42 <.text+0xdf42>
-    dec4:	9809      	ldr	r0, [sp, #36]
-    dec6:	9910      	ldr	r1, [sp, #64]
-    dec8:	1a44      	subs	r4, r0, r1
-    deca:	2c00      	cmp	r4, #0
-    decc:	dc1a      	bgt.n	df04 <.text+0xdf04>
-    dece:	e038      	b.n	df42 <.text+0xdf42>
-    ded0:	6013      	str	r3, [r2, #0]
-    ded2:	2310      	movs	r3, #16
-    ded4:	6053      	str	r3, [r2, #4]
-    ded6:	1c03      	adds	r3, r0, #0
-    ded8:	20d3      	movs	r0, #211
-    deda:	00c0      	lsls	r0, r0, #3
-    dedc:	3310      	adds	r3, #16
-    dede:	4468      	add	r0, sp
-    dee0:	6003      	str	r3, [r0, #0]
-    dee2:	4851      	ldr	r0, [pc, #324]	(e028 <.text+0xe028>)
-    dee4:	1c6b      	adds	r3, r5, #1
-    dee6:	4468      	add	r0, sp
-    dee8:	6003      	str	r3, [r0, #0]
-    deea:	2b07      	cmp	r3, #7
-    deec:	dc01      	bgt.n	def2 <.text+0xdef2>
-    deee:	3208      	adds	r2, #8
-    def0:	e007      	b.n	df02 <.text+0xdf02>
-    def2:	9804      	ldr	r0, [sp, #16]
-    def4:	f7fe fe84 	bl	cc00 <__sprint>
-    def8:	2800      	cmp	r0, #0
-    defa:	d164      	bne.n	dfc6 <.text+0xdfc6>
-    defc:	22c5      	movs	r2, #197
-    defe:	00d2      	lsls	r2, r2, #3
-    df00:	446a      	add	r2, sp
-    df02:	3c10      	subs	r4, #16
-    df04:	23d3      	movs	r3, #211
-    df06:	00db      	lsls	r3, r3, #3
-    df08:	446b      	add	r3, sp
-    df0a:	6818      	ldr	r0, [r3, #0]
-    df0c:	4b46      	ldr	r3, [pc, #280]	(e028 <.text+0xe028>)
-    df0e:	21d2      	movs	r1, #210
-    df10:	446b      	add	r3, sp
-    df12:	00c9      	lsls	r1, r1, #3
-    df14:	681d      	ldr	r5, [r3, #0]
-    df16:	4469      	add	r1, sp
-    df18:	4b46      	ldr	r3, [pc, #280]	(e034 <.text+0xe034>)
-    df1a:	2c10      	cmp	r4, #16
-    df1c:	dcd8      	bgt.n	ded0 <.text+0xded0>
-    df1e:	6013      	str	r3, [r2, #0]
-    df20:	6054      	str	r4, [r2, #4]
-    df22:	1903      	adds	r3, r0, r4
-    df24:	24d3      	movs	r4, #211
-    df26:	00e4      	lsls	r4, r4, #3
-    df28:	483f      	ldr	r0, [pc, #252]	(e028 <.text+0xe028>)
-    df2a:	446c      	add	r4, sp
-    df2c:	6023      	str	r3, [r4, #0]
-    df2e:	4468      	add	r0, sp
-    df30:	1c6b      	adds	r3, r5, #1
-    df32:	6003      	str	r3, [r0, #0]
-    df34:	2b07      	cmp	r3, #7
-    df36:	dd04      	ble.n	df42 <.text+0xdf42>
-    df38:	9804      	ldr	r0, [sp, #16]
-    df3a:	f7fe fe61 	bl	cc00 <__sprint>
-    df3e:	2800      	cmp	r0, #0
-    df40:	d141      	bne.n	dfc6 <.text+0xdfc6>
-    df42:	9b10      	ldr	r3, [sp, #64]
-    df44:	9909      	ldr	r1, [sp, #36]
-    df46:	428b      	cmp	r3, r1
-    df48:	da00      	bge.n	df4c <.text+0xdf4c>
-    df4a:	1c0b      	adds	r3, r1, #0
-    df4c:	24d3      	movs	r4, #211
-    df4e:	9a08      	ldr	r2, [sp, #32]
-    df50:	00e4      	lsls	r4, r4, #3
-    df52:	446c      	add	r4, sp
-    df54:	18d2      	adds	r2, r2, r3
-    df56:	6823      	ldr	r3, [r4, #0]
-    df58:	9208      	str	r2, [sp, #32]
-    df5a:	2b00      	cmp	r3, #0
-    df5c:	d007      	beq.n	df6e <.text+0xdf6e>
-    df5e:	21d2      	movs	r1, #210
-    df60:	00c9      	lsls	r1, r1, #3
-    df62:	9804      	ldr	r0, [sp, #16]
-    df64:	4469      	add	r1, sp
-    df66:	f7fe fe4b 	bl	cc00 <__sprint>
-    df6a:	2800      	cmp	r0, #0
-    df6c:	d12b      	bne.n	dfc6 <.text+0xdfc6>
-    df6e:	482e      	ldr	r0, [pc, #184]	(e028 <.text+0xe028>)
-    df70:	24c5      	movs	r4, #197
-    df72:	9912      	ldr	r1, [sp, #72]
-    df74:	2300      	movs	r3, #0
-    df76:	4468      	add	r0, sp
-    df78:	00e4      	lsls	r4, r4, #3
-    df7a:	6003      	str	r3, [r0, #0]
-    df7c:	446c      	add	r4, sp
-    df7e:	2900      	cmp	r1, #0
-    df80:	d101      	bne.n	df86 <.text+0xdf86>
-    df82:	f7fe fed7 	bl	cd34 <_vfprintf_r+0x114>
-    df86:	9805      	ldr	r0, [sp, #20]
-    df88:	f001 faa4 	bl	f4d4 <_free_r>
-    df8c:	2200      	movs	r2, #0
-    df8e:	9212      	str	r2, [sp, #72]
-    df90:	f7fe fed0 	bl	cd34 <_vfprintf_r+0x114>
-    df94:	9c04      	ldr	r4, [sp, #16]
-    df96:	89a3      	ldrh	r3, [r4, #12]
-    df98:	2240      	movs	r2, #64
-    df9a:	4313      	orrs	r3, r2
-    df9c:	81a3      	strh	r3, [r4, #12]
-    df9e:	e019      	b.n	dfd4 <.text+0xdfd4>
-    dfa0:	21d3      	movs	r1, #211
-    dfa2:	00c9      	lsls	r1, r1, #3
-    dfa4:	4469      	add	r1, sp
-    dfa6:	680b      	ldr	r3, [r1, #0]
-    dfa8:	2b00      	cmp	r3, #0
-    dfaa:	d007      	beq.n	dfbc <.text+0xdfbc>
-    dfac:	21d2      	movs	r1, #210
-    dfae:	00c9      	lsls	r1, r1, #3
-    dfb0:	9804      	ldr	r0, [sp, #16]
-    dfb2:	4469      	add	r1, sp
-    dfb4:	f7fe fe24 	bl	cc00 <__sprint>
-    dfb8:	2800      	cmp	r0, #0
-    dfba:	d10b      	bne.n	dfd4 <.text+0xdfd4>
-    dfbc:	4a1a      	ldr	r2, [pc, #104]	(e028 <.text+0xe028>)
-    dfbe:	2300      	movs	r3, #0
-    dfc0:	446a      	add	r2, sp
-    dfc2:	6013      	str	r3, [r2, #0]
-    dfc4:	e006      	b.n	dfd4 <.text+0xdfd4>
-    dfc6:	9b12      	ldr	r3, [sp, #72]
-    dfc8:	2b00      	cmp	r3, #0
-    dfca:	d003      	beq.n	dfd4 <.text+0xdfd4>
-    dfcc:	9805      	ldr	r0, [sp, #20]
-    dfce:	9912      	ldr	r1, [sp, #72]
-    dfd0:	f001 fa80 	bl	f4d4 <_free_r>
-    dfd4:	9c04      	ldr	r4, [sp, #16]
-    dfd6:	89a3      	ldrh	r3, [r4, #12]
-    dfd8:	0658      	lsls	r0, r3, #25
-    dfda:	d51a      	bpl.n	e012 <.text+0xe012>
-    dfdc:	2101      	movs	r1, #1
-    dfde:	4249      	negs	r1, r1
-    dfe0:	9108      	str	r1, [sp, #32]
-    dfe2:	e016      	b.n	e012 <.text+0xe012>
-    dfe4:	2245      	movs	r2, #69
-    dfe6:	921a      	str	r2, [sp, #104]
-    dfe8:	f7ff f8b9 	bl	d15e <.text+0xd15e>
-    dfec:	4f12      	ldr	r7, [pc, #72]	(e038 <.text+0xe038>)
-    dfee:	2606      	movs	r6, #6
-    dff0:	9610      	str	r6, [sp, #64]
-    dff2:	e00a      	b.n	e00a <.text+0xe00a>
-    dff4:	4b11      	ldr	r3, [pc, #68]	(e03c <.text+0xe03c>)
-    dff6:	278e      	movs	r7, #142
-    dff8:	2200      	movs	r2, #0
-    dffa:	446b      	add	r3, sp
-    dffc:	00ff      	lsls	r7, r7, #3
-    dffe:	701a      	strb	r2, [r3, #0]
-    e000:	446f      	add	r7, sp
-    e002:	2e00      	cmp	r6, #0
-    e004:	9610      	str	r6, [sp, #64]
-    e006:	da00      	bge.n	e00a <.text+0xe00a>
-    e008:	9210      	str	r2, [sp, #64]
-    e00a:	2300      	movs	r3, #0
-    e00c:	930f      	str	r3, [sp, #60]
-    e00e:	f7ff faf5 	bl	d5fc <.text+0xd5fc>
-    e012:	23d9      	movs	r3, #217
-    e014:	9808      	ldr	r0, [sp, #32]
-    e016:	00db      	lsls	r3, r3, #3
-    e018:	449d      	add	sp, r3
-    e01a:	bcf0      	pop	{r4, r5, r6, r7}
-    e01c:	bc02      	pop	{r1}
-    e01e:	4708      	bx	r1
-	...
-    e028:	0694      	lsls	r4, r2, #26
-    e02a:	0000      	lsls	r0, r0, #0
-    e02c:	4fcc      	ldr	r7, [pc, #816]	(e360 <_wctomb_r+0x1d8>)
-    e02e:	0001      	lsls	r1, r0, #0
-    e030:	06ad      	lsls	r5, r5, #26
-    e032:	0000      	lsls	r0, r0, #0
-    e034:	4fdc      	ldr	r7, [pc, #880]	(e3a8 <_wctomb_r+0x220>)
-    e036:	0001      	lsls	r1, r0, #0
-    e038:	54dc      	strb	r4, [r3, r3]
-    e03a:	0001      	lsls	r1, r0, #0
-    e03c:	06c7      	lsls	r7, r0, #27
-	...
-
-0000e040 <vfprintf>:
-    e040:	b530      	push	{r4, r5, lr}
-    e042:	1c13      	adds	r3, r2, #0
-    e044:	4a05      	ldr	r2, [pc, #20]	(e05c <.text+0xe05c>)
-    e046:	1c0d      	adds	r5, r1, #0
-    e048:	1c04      	adds	r4, r0, #0
-    e04a:	1c21      	adds	r1, r4, #0
-    e04c:	6810      	ldr	r0, [r2, #0]
-    e04e:	1c2a      	adds	r2, r5, #0
-    e050:	f7fe fde6 	bl	cc20 <_vfprintf_r>
-    e054:	bc30      	pop	{r4, r5}
-    e056:	bc02      	pop	{r1}
-    e058:	4708      	bx	r1
-    e05a:	0000      	lsls	r0, r0, #0
-    e05c:	0020      	lsls	r0, r4, #0
-    e05e:	4000      	ands	r0, r0
-
-0000e060 <_wcrtomb_r>:
-    e060:	b530      	push	{r4, r5, lr}
-    e062:	b083      	sub	sp, #12
-    e064:	1c05      	adds	r5, r0, #0
-    e066:	1c1c      	adds	r4, r3, #0
-    e068:	2900      	cmp	r1, #0
-    e06a:	d102      	bne.n	e072 <_wcrtomb_r+0x12>
-    e06c:	4669      	mov	r1, sp
-    e06e:	3102      	adds	r1, #2
-    e070:	2200      	movs	r2, #0
-    e072:	1c23      	adds	r3, r4, #0
-    e074:	f000 f888 	bl	e188 <_wctomb_r>
-    e078:	1c43      	adds	r3, r0, #1
-    e07a:	d105      	bne.n	e088 <_wcrtomb_r+0x28>
-    e07c:	2300      	movs	r3, #0
-    e07e:	6023      	str	r3, [r4, #0]
-    e080:	238a      	movs	r3, #138
-    e082:	2001      	movs	r0, #1
-    e084:	602b      	str	r3, [r5, #0]
-    e086:	4240      	negs	r0, r0
-    e088:	b003      	add	sp, #12
-    e08a:	bc30      	pop	{r4, r5}
-    e08c:	bc02      	pop	{r1}
-    e08e:	4708      	bx	r1
-
-0000e090 <wcrtomb>:
-    e090:	b530      	push	{r4, r5, lr}
-    e092:	1c13      	adds	r3, r2, #0
-    e094:	4a05      	ldr	r2, [pc, #20]	(e0ac <.text+0xe0ac>)
-    e096:	1c0d      	adds	r5, r1, #0
-    e098:	1c04      	adds	r4, r0, #0
-    e09a:	1c21      	adds	r1, r4, #0
-    e09c:	6810      	ldr	r0, [r2, #0]
-    e09e:	1c2a      	adds	r2, r5, #0
-    e0a0:	f7ff ffde 	bl	e060 <_wcrtomb_r>
-    e0a4:	bc30      	pop	{r4, r5}
-    e0a6:	bc02      	pop	{r1}
-    e0a8:	4708      	bx	r1
-    e0aa:	0000      	lsls	r0, r0, #0
-    e0ac:	0020      	lsls	r0, r4, #0
-    e0ae:	4000      	ands	r0, r0
-
-0000e0b0 <_wcsrtombs_r>:
-    e0b0:	b5f0      	push	{r4, r5, r6, r7, lr}
-    e0b2:	b089      	sub	sp, #36
-    e0b4:	9002      	str	r0, [sp, #8]
-    e0b6:	9101      	str	r1, [sp, #4]
-    e0b8:	9200      	str	r2, [sp, #0]
-    e0ba:	1c1d      	adds	r5, r3, #0
-    e0bc:	9f0e      	ldr	r7, [sp, #56]
-    e0be:	2900      	cmp	r1, #0
-    e0c0:	d101      	bne.n	e0c6 <_wcsrtombs_r+0x16>
-    e0c2:	2501      	movs	r5, #1
-    e0c4:	426d      	negs	r5, r5
-    e0c6:	9900      	ldr	r1, [sp, #0]
-    e0c8:	9a01      	ldr	r2, [sp, #4]
-    e0ca:	680e      	ldr	r6, [r1, #0]
-    e0cc:	2400      	movs	r4, #0
-    e0ce:	9203      	str	r2, [sp, #12]
-    e0d0:	e03f      	b.n	e152 <_wcsrtombs_r+0xa2>
-    e0d2:	683b      	ldr	r3, [r7, #0]
-    e0d4:	9304      	str	r3, [sp, #16]
-    e0d6:	6879      	ldr	r1, [r7, #4]
-    e0d8:	9105      	str	r1, [sp, #20]
-    e0da:	4669      	mov	r1, sp
-    e0dc:	6832      	ldr	r2, [r6, #0]
-    e0de:	9802      	ldr	r0, [sp, #8]
-    e0e0:	311a      	adds	r1, #26
-    e0e2:	1c3b      	adds	r3, r7, #0
-    e0e4:	f7ff ffbc 	bl	e060 <_wcrtomb_r>
-    e0e8:	1c42      	adds	r2, r0, #1
-    e0ea:	d107      	bne.n	e0fc <_wcsrtombs_r+0x4c>
-    e0ec:	9902      	ldr	r1, [sp, #8]
-    e0ee:	238a      	movs	r3, #138
-    e0f0:	2401      	movs	r4, #1
-    e0f2:	600b      	str	r3, [r1, #0]
-    e0f4:	4264      	negs	r4, r4
-    e0f6:	2300      	movs	r3, #0
-    e0f8:	603b      	str	r3, [r7, #0]
-    e0fa:	e02c      	b.n	e156 <_wcsrtombs_r+0xa6>
-    e0fc:	1a2b      	subs	r3, r5, r0
-    e0fe:	429c      	cmp	r4, r3
-    e100:	d822      	bhi.n	e148 <_wcsrtombs_r+0x98>
-    e102:	42a8      	cmp	r0, r5
-    e104:	d220      	bcs.n	e148 <_wcsrtombs_r+0x98>
-    e106:	9a01      	ldr	r2, [sp, #4]
-    e108:	1824      	adds	r4, r4, r0
-    e10a:	2a00      	cmp	r2, #0
-    e10c:	d00f      	beq.n	e12e <_wcsrtombs_r+0x7e>
-    e10e:	2200      	movs	r2, #0
-    e110:	e007      	b.n	e122 <_wcsrtombs_r+0x72>
-    e112:	466b      	mov	r3, sp
-    e114:	331a      	adds	r3, #26
-    e116:	5cd3      	ldrb	r3, [r2, r3]
-    e118:	9903      	ldr	r1, [sp, #12]
-    e11a:	700b      	strb	r3, [r1, #0]
-    e11c:	3101      	adds	r1, #1
-    e11e:	9103      	str	r1, [sp, #12]
-    e120:	3201      	adds	r2, #1
-    e122:	4282      	cmp	r2, r0
-    e124:	dbf5      	blt.n	e112 <_wcsrtombs_r+0x62>
-    e126:	9a00      	ldr	r2, [sp, #0]
-    e128:	6813      	ldr	r3, [r2, #0]
-    e12a:	3304      	adds	r3, #4
-    e12c:	6013      	str	r3, [r2, #0]
-    e12e:	6833      	ldr	r3, [r6, #0]
-    e130:	2b00      	cmp	r3, #0
-    e132:	d001      	beq.n	e138 <_wcsrtombs_r+0x88>
-    e134:	3604      	adds	r6, #4
-    e136:	e00c      	b.n	e152 <_wcsrtombs_r+0xa2>
-    e138:	9901      	ldr	r1, [sp, #4]
-    e13a:	2900      	cmp	r1, #0
-    e13c:	d001      	beq.n	e142 <_wcsrtombs_r+0x92>
-    e13e:	9a00      	ldr	r2, [sp, #0]
-    e140:	6013      	str	r3, [r2, #0]
-    e142:	3c01      	subs	r4, #1
-    e144:	603b      	str	r3, [r7, #0]
-    e146:	e006      	b.n	e156 <_wcsrtombs_r+0xa6>
-    e148:	9b04      	ldr	r3, [sp, #16]
-    e14a:	9905      	ldr	r1, [sp, #20]
-    e14c:	603b      	str	r3, [r7, #0]
-    e14e:	6079      	str	r1, [r7, #4]
-    e150:	e001      	b.n	e156 <_wcsrtombs_r+0xa6>
-    e152:	42ac      	cmp	r4, r5
-    e154:	d3bd      	bcc.n	e0d2 <_wcsrtombs_r+0x22>
-    e156:	1c20      	adds	r0, r4, #0
-    e158:	b009      	add	sp, #36
-    e15a:	bcf0      	pop	{r4, r5, r6, r7}
-    e15c:	bc02      	pop	{r1}
-    e15e:	4708      	bx	r1
-
-0000e160 <wcsrtombs>:
-    e160:	b570      	push	{r4, r5, r6, lr}
-    e162:	1c16      	adds	r6, r2, #0
-    e164:	4a07      	ldr	r2, [pc, #28]	(e184 <.text+0xe184>)
-    e166:	1c0d      	adds	r5, r1, #0
-    e168:	b081      	sub	sp, #4
-    e16a:	1c04      	adds	r4, r0, #0
-    e16c:	1c21      	adds	r1, r4, #0
-    e16e:	6810      	ldr	r0, [r2, #0]
-    e170:	9300      	str	r3, [sp, #0]
-    e172:	1c2a      	adds	r2, r5, #0
-    e174:	1c33      	adds	r3, r6, #0
-    e176:	f7ff ff9b 	bl	e0b0 <_wcsrtombs_r>
-    e17a:	b001      	add	sp, #4
-    e17c:	bc70      	pop	{r4, r5, r6}
-    e17e:	bc02      	pop	{r1}
-    e180:	4708      	bx	r1
-    e182:	0000      	lsls	r0, r0, #0
-    e184:	0020      	lsls	r0, r4, #0
-    e186:	4000      	ands	r0, r0
-
-0000e188 <_wctomb_r>:
-    e188:	b5f0      	push	{r4, r5, r6, r7, lr}
-    e18a:	4e9c      	ldr	r6, [pc, #624]	(e3fc <.text+0xe3fc>)
-    e18c:	1c30      	adds	r0, r6, #0
-    e18e:	1c0d      	adds	r5, r1, #0
-    e190:	1c14      	adds	r4, r2, #0
-    e192:	1c1f      	adds	r7, r3, #0
-    e194:	f7fe fd2c 	bl	cbf0 <strlen>
-    e198:	2801      	cmp	r0, #1
-    e19a:	d800      	bhi.n	e19e <_wctomb_r+0x16>
-    e19c:	e121      	b.n	e3e2 <_wctomb_r+0x25a>
-    e19e:	4998      	ldr	r1, [pc, #608]	(e400 <.text+0xe400>)
-    e1a0:	1c30      	adds	r0, r6, #0
-    e1a2:	f002 fd53 	bl	10c4c <strcmp>
-    e1a6:	2800      	cmp	r0, #0
-    e1a8:	d000      	beq.n	e1ac <_wctomb_r+0x24>
-    e1aa:	e097      	b.n	e2dc <_wctomb_r+0x154>
-    e1ac:	2d00      	cmp	r5, #0
-    e1ae:	d100      	bne.n	e1b2 <_wctomb_r+0x2a>
-    e1b0:	e11c      	b.n	e3ec <_wctomb_r+0x264>
-    e1b2:	2c7f      	cmp	r4, #127
-    e1b4:	dc00      	bgt.n	e1b8 <_wctomb_r+0x30>
-    e1b6:	e116      	b.n	e3e6 <_wctomb_r+0x25e>
-    e1b8:	1c22      	adds	r2, r4, #0
-    e1ba:	4b92      	ldr	r3, [pc, #584]	(e404 <.text+0xe404>)
-    e1bc:	3a80      	subs	r2, #128
-    e1be:	429a      	cmp	r2, r3
-    e1c0:	d80d      	bhi.n	e1de <_wctomb_r+0x56>
-    e1c2:	0562      	lsls	r2, r4, #21
-    e1c4:	2340      	movs	r3, #64
-    e1c6:	425b      	negs	r3, r3
-    e1c8:	0ed2      	lsrs	r2, r2, #27
-    e1ca:	431a      	orrs	r2, r3
-    e1cc:	702a      	strb	r2, [r5, #0]
-    e1ce:	233f      	movs	r3, #63
-    e1d0:	1c22      	adds	r2, r4, #0
-    e1d2:	401a      	ands	r2, r3
-    e1d4:	2380      	movs	r3, #128
-    e1d6:	425b      	negs	r3, r3
-    e1d8:	431a      	orrs	r2, r3
-    e1da:	706a      	strb	r2, [r5, #1]
-    e1dc:	e0a4      	b.n	e328 <_wctomb_r+0x1a0>
-    e1de:	488a      	ldr	r0, [pc, #552]	(e408 <.text+0xe408>)
-    e1e0:	4b8a      	ldr	r3, [pc, #552]	(e40c <.text+0xe40c>)
-    e1e2:	1822      	adds	r2, r4, r0
-    e1e4:	429a      	cmp	r2, r3
-    e1e6:	d817      	bhi.n	e218 <_wctomb_r+0x90>
-    e1e8:	4b89      	ldr	r3, [pc, #548]	(e410 <.text+0xe410>)
-    e1ea:	18e2      	adds	r2, r4, r3
-    e1ec:	4b89      	ldr	r3, [pc, #548]	(e414 <.text+0xe414>)
-    e1ee:	429a      	cmp	r2, r3
-    e1f0:	d800      	bhi.n	e1f4 <_wctomb_r+0x6c>
-    e1f2:	e0fd      	b.n	e3f0 <_wctomb_r+0x268>
-    e1f4:	0422      	lsls	r2, r4, #16
-    e1f6:	2320      	movs	r3, #32
-    e1f8:	425b      	negs	r3, r3
-    e1fa:	0f12      	lsrs	r2, r2, #28
-    e1fc:	431a      	orrs	r2, r3
-    e1fe:	702a      	strb	r2, [r5, #0]
-    e200:	0523      	lsls	r3, r4, #20
-    e202:	2280      	movs	r2, #128
-    e204:	4252      	negs	r2, r2
-    e206:	0e9b      	lsrs	r3, r3, #26
-    e208:	4313      	orrs	r3, r2
-    e20a:	706b      	strb	r3, [r5, #1]
-    e20c:	233f      	movs	r3, #63
-    e20e:	4023      	ands	r3, r4
-    e210:	4313      	orrs	r3, r2
-    e212:	2003      	movs	r0, #3
-    e214:	70ab      	strb	r3, [r5, #2]
-    e216:	e0ed      	b.n	e3f4 <_wctomb_r+0x26c>
-    e218:	487f      	ldr	r0, [pc, #508]	(e418 <.text+0xe418>)
-    e21a:	4b80      	ldr	r3, [pc, #512]	(e41c <.text+0xe41c>)
-    e21c:	1822      	adds	r2, r4, r0
-    e21e:	429a      	cmp	r2, r3
-    e220:	d816      	bhi.n	e250 <_wctomb_r+0xc8>
-    e222:	02e2      	lsls	r2, r4, #11
-    e224:	2310      	movs	r3, #16
-    e226:	425b      	negs	r3, r3
-    e228:	0f52      	lsrs	r2, r2, #29
-    e22a:	431a      	orrs	r2, r3
-    e22c:	702a      	strb	r2, [r5, #0]
-    e22e:	03a3      	lsls	r3, r4, #14
-    e230:	2280      	movs	r2, #128
-    e232:	4252      	negs	r2, r2
-    e234:	0e9b      	lsrs	r3, r3, #26
-    e236:	4313      	orrs	r3, r2
-    e238:	706b      	strb	r3, [r5, #1]
-    e23a:	0523      	lsls	r3, r4, #20
-    e23c:	0e9b      	lsrs	r3, r3, #26
-    e23e:	1c69      	adds	r1, r5, #1
-    e240:	4313      	orrs	r3, r2
-    e242:	704b      	strb	r3, [r1, #1]
-    e244:	233f      	movs	r3, #63
-    e246:	4023      	ands	r3, r4
-    e248:	4313      	orrs	r3, r2
-    e24a:	2004      	movs	r0, #4
-    e24c:	708b      	strb	r3, [r1, #2]
-    e24e:	e0d1      	b.n	e3f4 <_wctomb_r+0x26c>
-    e250:	4b73      	ldr	r3, [pc, #460]	(e420 <.text+0xe420>)
-    e252:	18e2      	adds	r2, r4, r3
-    e254:	4b73      	ldr	r3, [pc, #460]	(e424 <.text+0xe424>)
-    e256:	429a      	cmp	r2, r3
-    e258:	d81b      	bhi.n	e292 <_wctomb_r+0x10a>
-    e25a:	01a2      	lsls	r2, r4, #6
-    e25c:	2308      	movs	r3, #8
-    e25e:	425b      	negs	r3, r3
-    e260:	0f92      	lsrs	r2, r2, #30
-    e262:	431a      	orrs	r2, r3
-    e264:	702a      	strb	r2, [r5, #0]
-    e266:	0223      	lsls	r3, r4, #8
-    e268:	2280      	movs	r2, #128
-    e26a:	4252      	negs	r2, r2
-    e26c:	0e9b      	lsrs	r3, r3, #26
-    e26e:	4313      	orrs	r3, r2
-    e270:	706b      	strb	r3, [r5, #1]
-    e272:	03a3      	lsls	r3, r4, #14
-    e274:	0e9b      	lsrs	r3, r3, #26
-    e276:	1c69      	adds	r1, r5, #1
-    e278:	4313      	orrs	r3, r2
-    e27a:	704b      	strb	r3, [r1, #1]
-    e27c:	0523      	lsls	r3, r4, #20
-    e27e:	0e9b      	lsrs	r3, r3, #26
-    e280:	1c48      	adds	r0, r1, #1
-    e282:	4313      	orrs	r3, r2
-    e284:	7043      	strb	r3, [r0, #1]
-    e286:	233f      	movs	r3, #63
-    e288:	4023      	ands	r3, r4
-    e28a:	4313      	orrs	r3, r2
-    e28c:	7083      	strb	r3, [r0, #2]
-    e28e:	2005      	movs	r0, #5
-    e290:	e0b0      	b.n	e3f4 <_wctomb_r+0x26c>
-    e292:	4b65      	ldr	r3, [pc, #404]	(e428 <.text+0xe428>)
-    e294:	429c      	cmp	r4, r3
-    e296:	dc00      	bgt.n	e29a <_wctomb_r+0x112>
-    e298:	e0aa      	b.n	e3f0 <_wctomb_r+0x268>
-    e29a:	0062      	lsls	r2, r4, #1
-    e29c:	2304      	movs	r3, #4
-    e29e:	425b      	negs	r3, r3
-    e2a0:	0fd2      	lsrs	r2, r2, #31
-    e2a2:	431a      	orrs	r2, r3
-    e2a4:	702a      	strb	r2, [r5, #0]
-    e2a6:	00a3      	lsls	r3, r4, #2
-    e2a8:	2280      	movs	r2, #128
-    e2aa:	4252      	negs	r2, r2
-    e2ac:	0e9b      	lsrs	r3, r3, #26
-    e2ae:	4313      	orrs	r3, r2
-    e2b0:	706b      	strb	r3, [r5, #1]
-    e2b2:	0223      	lsls	r3, r4, #8
-    e2b4:	0e9b      	lsrs	r3, r3, #26
-    e2b6:	1c68      	adds	r0, r5, #1
-    e2b8:	4313      	orrs	r3, r2
-    e2ba:	7043      	strb	r3, [r0, #1]
-    e2bc:	03a3      	lsls	r3, r4, #14
-    e2be:	0e9b      	lsrs	r3, r3, #26
-    e2c0:	1c41      	adds	r1, r0, #1
-    e2c2:	4313      	orrs	r3, r2
-    e2c4:	704b      	strb	r3, [r1, #1]
-    e2c6:	0523      	lsls	r3, r4, #20
-    e2c8:	0e9b      	lsrs	r3, r3, #26
-    e2ca:	1c48      	adds	r0, r1, #1
-    e2cc:	4313      	orrs	r3, r2
-    e2ce:	7043      	strb	r3, [r0, #1]
-    e2d0:	233f      	movs	r3, #63
-    e2d2:	4023      	ands	r3, r4
-    e2d4:	4313      	orrs	r3, r2
-    e2d6:	7083      	strb	r3, [r0, #2]
-    e2d8:	2006      	movs	r0, #6
-    e2da:	e08b      	b.n	e3f4 <_wctomb_r+0x26c>
-    e2dc:	4953      	ldr	r1, [pc, #332]	(e42c <.text+0xe42c>)
-    e2de:	1c30      	adds	r0, r6, #0
-    e2e0:	f002 fcb4 	bl	10c4c <strcmp>
-    e2e4:	2800      	cmp	r0, #0
-    e2e6:	d121      	bne.n	e32c <_wctomb_r+0x1a4>
-    e2e8:	2d00      	cmp	r5, #0
-    e2ea:	d07f      	beq.n	e3ec <_wctomb_r+0x264>
-    e2ec:	0423      	lsls	r3, r4, #16
-    e2ee:	0e1a      	lsrs	r2, r3, #24
-    e2f0:	2a00      	cmp	r2, #0
-    e2f2:	d078      	beq.n	e3e6 <_wctomb_r+0x25e>
-    e2f4:	1c13      	adds	r3, r2, #0
-    e2f6:	337f      	adds	r3, #127
-    e2f8:	061b      	lsls	r3, r3, #24
-    e2fa:	0e1b      	lsrs	r3, r3, #24
-    e2fc:	2b1e      	cmp	r3, #30
-    e2fe:	d905      	bls.n	e30c <_wctomb_r+0x184>
-    e300:	1c13      	adds	r3, r2, #0
-    e302:	3320      	adds	r3, #32
-    e304:	061b      	lsls	r3, r3, #24
-    e306:	0e1b      	lsrs	r3, r3, #24
-    e308:	2b0f      	cmp	r3, #15
-    e30a:	d871      	bhi.n	e3f0 <_wctomb_r+0x268>
-    e30c:	20c0      	movs	r0, #192
-    e30e:	0623      	lsls	r3, r4, #24
-    e310:	0600      	lsls	r0, r0, #24
-    e312:	0e19      	lsrs	r1, r3, #24
-    e314:	181b      	adds	r3, r3, r0
-    e316:	0e1b      	lsrs	r3, r3, #24
-    e318:	2b3e      	cmp	r3, #62
-    e31a:	d903      	bls.n	e324 <_wctomb_r+0x19c>
-    e31c:	2380      	movs	r3, #128
-    e31e:	404b      	eors	r3, r1
-    e320:	2b7c      	cmp	r3, #124
-    e322:	d865      	bhi.n	e3f0 <_wctomb_r+0x268>
-    e324:	702a      	strb	r2, [r5, #0]
-    e326:	7069      	strb	r1, [r5, #1]
-    e328:	2002      	movs	r0, #2
-    e32a:	e063      	b.n	e3f4 <_wctomb_r+0x26c>
-    e32c:	4940      	ldr	r1, [pc, #256]	(e430 <.text+0xe430>)
-    e32e:	1c30      	adds	r0, r6, #0
-    e330:	f002 fc8c 	bl	10c4c <strcmp>
-    e334:	2800      	cmp	r0, #0
-    e336:	d114      	bne.n	e362 <_wctomb_r+0x1da>
-    e338:	2d00      	cmp	r5, #0
-    e33a:	d057      	beq.n	e3ec <_wctomb_r+0x264>
-    e33c:	0423      	lsls	r3, r4, #16
-    e33e:	0e1a      	lsrs	r2, r3, #24
-    e340:	2a00      	cmp	r2, #0
-    e342:	d050      	beq.n	e3e6 <_wctomb_r+0x25e>
-    e344:	1c13      	adds	r3, r2, #0
-    e346:	335f      	adds	r3, #95
-    e348:	061b      	lsls	r3, r3, #24
-    e34a:	0e1b      	lsrs	r3, r3, #24
-    e34c:	2b5d      	cmp	r3, #93
-    e34e:	d84f      	bhi.n	e3f0 <_wctomb_r+0x268>
-    e350:	20be      	movs	r0, #190
-    e352:	0623      	lsls	r3, r4, #24
-    e354:	05c0      	lsls	r0, r0, #23
-    e356:	0e19      	lsrs	r1, r3, #24
-    e358:	181b      	adds	r3, r3, r0
-    e35a:	0e1b      	lsrs	r3, r3, #24
-    e35c:	2b5d      	cmp	r3, #93
-    e35e:	d847      	bhi.n	e3f0 <_wctomb_r+0x268>
-    e360:	e7e0      	b.n	e324 <_wctomb_r+0x19c>
-    e362:	4934      	ldr	r1, [pc, #208]	(e434 <.text+0xe434>)
-    e364:	1c30      	adds	r0, r6, #0
-    e366:	f002 fc71 	bl	10c4c <strcmp>
-    e36a:	2800      	cmp	r0, #0
-    e36c:	d139      	bne.n	e3e2 <_wctomb_r+0x25a>
-    e36e:	2d00      	cmp	r5, #0
-    e370:	d03a      	beq.n	e3e8 <_wctomb_r+0x260>
-    e372:	0623      	lsls	r3, r4, #24
-    e374:	0e1e      	lsrs	r6, r3, #24
-    e376:	0423      	lsls	r3, r4, #16
-    e378:	0e19      	lsrs	r1, r3, #24
-    e37a:	2900      	cmp	r1, #0
-    e37c:	d01f      	beq.n	e3be <_wctomb_r+0x236>
-    e37e:	1c0b      	adds	r3, r1, #0
-    e380:	3b21      	subs	r3, #33
-    e382:	061b      	lsls	r3, r3, #24
-    e384:	0e1b      	lsrs	r3, r3, #24
-    e386:	2b5d      	cmp	r3, #93
-    e388:	d832      	bhi.n	e3f0 <_wctomb_r+0x268>
-    e38a:	1c33      	adds	r3, r6, #0
-    e38c:	3b21      	subs	r3, #33
-    e38e:	061b      	lsls	r3, r3, #24
-    e390:	0e1b      	lsrs	r3, r3, #24
-    e392:	2b5d      	cmp	r3, #93
-    e394:	d82c      	bhi.n	e3f0 <_wctomb_r+0x268>
-    e396:	683b      	ldr	r3, [r7, #0]
-    e398:	2b00      	cmp	r3, #0
-    e39a:	d001      	beq.n	e3a0 <_wctomb_r+0x218>
-    e39c:	2000      	movs	r0, #0
-    e39e:	e00a      	b.n	e3b6 <_wctomb_r+0x22e>
-    e3a0:	2301      	movs	r3, #1
-    e3a2:	603b      	str	r3, [r7, #0]
-    e3a4:	231b      	movs	r3, #27
-    e3a6:	702b      	strb	r3, [r5, #0]
-    e3a8:	2324      	movs	r3, #36
-    e3aa:	706b      	strb	r3, [r5, #1]
-    e3ac:	1c6a      	adds	r2, r5, #1
-    e3ae:	2342      	movs	r3, #66
-    e3b0:	7053      	strb	r3, [r2, #1]
-    e3b2:	1c95      	adds	r5, r2, #2
-    e3b4:	2003      	movs	r0, #3
-    e3b6:	3002      	adds	r0, #2
-    e3b8:	7029      	strb	r1, [r5, #0]
-    e3ba:	706e      	strb	r6, [r5, #1]
-    e3bc:	e01a      	b.n	e3f4 <_wctomb_r+0x26c>
-    e3be:	683b      	ldr	r3, [r7, #0]
-    e3c0:	2b00      	cmp	r3, #0
-    e3c2:	d101      	bne.n	e3c8 <_wctomb_r+0x240>
-    e3c4:	2000      	movs	r0, #0
-    e3c6:	e009      	b.n	e3dc <_wctomb_r+0x254>
-    e3c8:	231b      	movs	r3, #27
-    e3ca:	6039      	str	r1, [r7, #0]
-    e3cc:	702b      	strb	r3, [r5, #0]
-    e3ce:	2328      	movs	r3, #40
-    e3d0:	706b      	strb	r3, [r5, #1]
-    e3d2:	1c6a      	adds	r2, r5, #1
-    e3d4:	2342      	movs	r3, #66
-    e3d6:	7053      	strb	r3, [r2, #1]
-    e3d8:	1c95      	adds	r5, r2, #2
-    e3da:	2003      	movs	r0, #3
-    e3dc:	3001      	adds	r0, #1
-    e3de:	702e      	strb	r6, [r5, #0]
-    e3e0:	e008      	b.n	e3f4 <_wctomb_r+0x26c>
-    e3e2:	2d00      	cmp	r5, #0
-    e3e4:	d002      	beq.n	e3ec <_wctomb_r+0x264>
-    e3e6:	702c      	strb	r4, [r5, #0]
-    e3e8:	2001      	movs	r0, #1
-    e3ea:	e003      	b.n	e3f4 <_wctomb_r+0x26c>
-    e3ec:	2000      	movs	r0, #0
-    e3ee:	e001      	b.n	e3f4 <_wctomb_r+0x26c>
-    e3f0:	2001      	movs	r0, #1
-    e3f2:	4240      	negs	r0, r0
-    e3f4:	bcf0      	pop	{r4, r5, r6, r7}
-    e3f6:	bc02      	pop	{r1}
-    e3f8:	4708      	bx	r1
-    e3fa:	0000      	lsls	r0, r0, #0
-    e3fc:	0428      	lsls	r0, r5, #16
-    e3fe:	4000      	ands	r0, r0
-    e400:	54e4      	strb	r4, [r4, r3]
-    e402:	0001      	lsls	r1, r0, #0
-    e404:	077f      	lsls	r7, r7, #29
-    e406:	0000      	lsls	r0, r0, #0
-    e408:	f800 ffff 	strb.w	pc, [r0, #255]!
-    e40c:	f7ff 0000 	undefined
-    e410:	2800      	cmp	r0, #0
-    e412:	ffff 07ff 	vqshl.u64	q8, <illegal reg q15.5>, #63
-    e416:	0000      	lsls	r0, r0, #0
-    e418:	0000      	lsls	r0, r0, #0
-    e41a:	ffff ffff 	undefined
-    e41e:	001e      	lsls	r6, r3, #0
-    e420:	0000      	lsls	r0, r0, #0
-    e422:	ffe0 ffff 	undefined
-    e426:	03df      	lsls	r7, r3, #15
-    e428:	ffff 03ff 	vrsra.u64	q8, <illegal reg q15.5>, #1
-    e42c:	54ec      	strb	r4, [r5, r3]
-    e42e:	0001      	lsls	r1, r0, #0
-    e430:	54f4      	strb	r4, [r6, r3]
-    e432:	0001      	lsls	r1, r0, #0
-    e434:	54fc      	strb	r4, [r7, r3]
-    e436:	0001      	lsls	r1, r0, #0
-
-0000e438 <__swsetup>:
-    e438:	b530      	push	{r4, r5, lr}
-    e43a:	4b23      	ldr	r3, [pc, #140]	(e4c8 <.text+0xe4c8>)
-    e43c:	1c04      	adds	r4, r0, #0
-    e43e:	6818      	ldr	r0, [r3, #0]
-    e440:	2800      	cmp	r0, #0
-    e442:	d004      	beq.n	e44e <__swsetup+0x16>
-    e444:	6b83      	ldr	r3, [r0, #56]
-    e446:	2b00      	cmp	r3, #0
-    e448:	d101      	bne.n	e44e <__swsetup+0x16>
-    e44a:	f000 ff37 	bl	f2bc <__sinit>
-    e44e:	89a2      	ldrh	r2, [r4, #12]
-    e450:	2308      	movs	r3, #8
-    e452:	1c15      	adds	r5, r2, #0
-    e454:	401d      	ands	r5, r3
-    e456:	d11e      	bne.n	e496 <__swsetup+0x5e>
-    e458:	06d3      	lsls	r3, r2, #27
-    e45a:	d402      	bmi.n	e462 <__swsetup+0x2a>
-    e45c:	2001      	movs	r0, #1
-    e45e:	4240      	negs	r0, r0
-    e460:	e02f      	b.n	e4c2 <__swsetup+0x8a>
-    e462:	0753      	lsls	r3, r2, #29
-    e464:	d513      	bpl.n	e48e <__swsetup+0x56>
-    e466:	6b21      	ldr	r1, [r4, #48]
-    e468:	2900      	cmp	r1, #0
-    e46a:	d008      	beq.n	e47e <__swsetup+0x46>
-    e46c:	1c23      	adds	r3, r4, #0
-    e46e:	3340      	adds	r3, #64
-    e470:	4299      	cmp	r1, r3
-    e472:	d003      	beq.n	e47c <__swsetup+0x44>
-    e474:	4b14      	ldr	r3, [pc, #80]	(e4c8 <.text+0xe4c8>)
-    e476:	6818      	ldr	r0, [r3, #0]
-    e478:	f001 f82c 	bl	f4d4 <_free_r>
-    e47c:	6325      	str	r5, [r4, #48]
-    e47e:	89a3      	ldrh	r3, [r4, #12]
-    e480:	2224      	movs	r2, #36
-    e482:	4393      	bics	r3, r2
-    e484:	81a3      	strh	r3, [r4, #12]
-    e486:	2300      	movs	r3, #0
-    e488:	6063      	str	r3, [r4, #4]
-    e48a:	6923      	ldr	r3, [r4, #16]
-    e48c:	6023      	str	r3, [r4, #0]
-    e48e:	89a3      	ldrh	r3, [r4, #12]
-    e490:	2208      	movs	r2, #8
-    e492:	4313      	orrs	r3, r2
-    e494:	81a3      	strh	r3, [r4, #12]
-    e496:	6923      	ldr	r3, [r4, #16]
-    e498:	2b00      	cmp	r3, #0
-    e49a:	d102      	bne.n	e4a2 <__swsetup+0x6a>
-    e49c:	1c20      	adds	r0, r4, #0
-    e49e:	f001 fab1 	bl	fa04 <__smakebuf>
-    e4a2:	89a3      	ldrh	r3, [r4, #12]
-    e4a4:	07da      	lsls	r2, r3, #31
-    e4a6:	d505      	bpl.n	e4b4 <__swsetup+0x7c>
-    e4a8:	2300      	movs	r3, #0
-    e4aa:	60a3      	str	r3, [r4, #8]
-    e4ac:	6963      	ldr	r3, [r4, #20]
-    e4ae:	425b      	negs	r3, r3
-    e4b0:	61a3      	str	r3, [r4, #24]
-    e4b2:	e005      	b.n	e4c0 <__swsetup+0x88>
-    e4b4:	079a      	lsls	r2, r3, #30
-    e4b6:	d501      	bpl.n	e4bc <__swsetup+0x84>
-    e4b8:	2300      	movs	r3, #0
-    e4ba:	e000      	b.n	e4be <__swsetup+0x86>
-    e4bc:	6963      	ldr	r3, [r4, #20]
-    e4be:	60a3      	str	r3, [r4, #8]
-    e4c0:	2000      	movs	r0, #0
-    e4c2:	bc30      	pop	{r4, r5}
-    e4c4:	bc02      	pop	{r1}
-    e4c6:	4708      	bx	r1
-    e4c8:	0020      	lsls	r0, r4, #0
-    e4ca:	4000      	ands	r0, r0
-
-0000e4cc <quorem>:
-    e4cc:	b5f0      	push	{r4, r5, r6, r7, lr}
-    e4ce:	690a      	ldr	r2, [r1, #16]
-    e4d0:	6903      	ldr	r3, [r0, #16]
-    e4d2:	b089      	sub	sp, #36
-    e4d4:	9001      	str	r0, [sp, #4]
-    e4d6:	9100      	str	r1, [sp, #0]
-    e4d8:	4293      	cmp	r3, r2
-    e4da:	da01      	bge.n	e4e0 <quorem+0x14>
-    e4dc:	2000      	movs	r0, #0
-    e4de:	e089      	b.n	e5f4 <quorem+0x128>
-    e4e0:	1e56      	subs	r6, r2, #1
-    e4e2:	9800      	ldr	r0, [sp, #0]
-    e4e4:	9a01      	ldr	r2, [sp, #4]
-    e4e6:	3014      	adds	r0, #20
-    e4e8:	3214      	adds	r2, #20
-    e4ea:	00b3      	lsls	r3, r6, #2
-    e4ec:	18c1      	adds	r1, r0, r3
-    e4ee:	18d3      	adds	r3, r2, r3
-    e4f0:	9106      	str	r1, [sp, #24]
-    e4f2:	9305      	str	r3, [sp, #20]
-    e4f4:	6809      	ldr	r1, [r1, #0]
-    e4f6:	681b      	ldr	r3, [r3, #0]
-    e4f8:	9008      	str	r0, [sp, #32]
-    e4fa:	3101      	adds	r1, #1
-    e4fc:	1c18      	adds	r0, r3, #0
-    e4fe:	9207      	str	r2, [sp, #28]
-    e500:	9302      	str	r3, [sp, #8]
-    e502:	f004 fecb 	bl	1329c <__aeabi_uidiv>
-    e506:	9004      	str	r0, [sp, #16]
-    e508:	2800      	cmp	r0, #0
-    e50a:	d036      	beq.n	e57a <quorem+0xae>
-    e50c:	2000      	movs	r0, #0
-    e50e:	9d07      	ldr	r5, [sp, #28]
-    e510:	9f08      	ldr	r7, [sp, #32]
-    e512:	9003      	str	r0, [sp, #12]
-    e514:	4684      	mov	ip, r0
-    e516:	cf04      	ldmia	r7!, {r2}
-    e518:	4c38      	ldr	r4, [pc, #224]	(e5fc <.text+0xe5fc>)
-    e51a:	9804      	ldr	r0, [sp, #16]
-    e51c:	1c13      	adds	r3, r2, #0
-    e51e:	4023      	ands	r3, r4
-    e520:	1c01      	adds	r1, r0, #0
-    e522:	4359      	muls	r1, r3
-    e524:	0c12      	lsrs	r2, r2, #16
-    e526:	4342      	muls	r2, r0
-    e528:	4461      	add	r1, ip
-    e52a:	0c0b      	lsrs	r3, r1, #16
-    e52c:	18d2      	adds	r2, r2, r3
-    e52e:	0c13      	lsrs	r3, r2, #16
-    e530:	469c      	mov	ip, r3
-    e532:	682b      	ldr	r3, [r5, #0]
-    e534:	1c18      	adds	r0, r3, #0
-    e536:	4021      	ands	r1, r4
-    e538:	4020      	ands	r0, r4
-    e53a:	1a40      	subs	r0, r0, r1
-    e53c:	9903      	ldr	r1, [sp, #12]
-    e53e:	4022      	ands	r2, r4
-    e540:	1840      	adds	r0, r0, r1
-    e542:	0c1b      	lsrs	r3, r3, #16
-    e544:	1a9b      	subs	r3, r3, r2
-    e546:	1402      	asrs	r2, r0, #16
-    e548:	189b      	adds	r3, r3, r2
-    e54a:	141a      	asrs	r2, r3, #16
-    e54c:	806b      	strh	r3, [r5, #2]
-    e54e:	9b06      	ldr	r3, [sp, #24]
-    e550:	8028      	strh	r0, [r5, #0]
-    e552:	9203      	str	r2, [sp, #12]
-    e554:	3504      	adds	r5, #4
-    e556:	429f      	cmp	r7, r3
-    e558:	d9dd      	bls.n	e516 <quorem+0x4a>
-    e55a:	9802      	ldr	r0, [sp, #8]
-    e55c:	2800      	cmp	r0, #0
-    e55e:	d001      	beq.n	e564 <quorem+0x98>
-    e560:	e00b      	b.n	e57a <quorem+0xae>
-    e562:	3e01      	subs	r6, #1
-    e564:	9905      	ldr	r1, [sp, #20]
-    e566:	9a07      	ldr	r2, [sp, #28]
-    e568:	3904      	subs	r1, #4
-    e56a:	9105      	str	r1, [sp, #20]
-    e56c:	4291      	cmp	r1, r2
-    e56e:	d902      	bls.n	e576 <quorem+0xaa>
-    e570:	680b      	ldr	r3, [r1, #0]
-    e572:	2b00      	cmp	r3, #0
-    e574:	d0f5      	beq.n	e562 <quorem+0x96>
-    e576:	9b01      	ldr	r3, [sp, #4]
-    e578:	611e      	str	r6, [r3, #16]
-    e57a:	9801      	ldr	r0, [sp, #4]
-    e57c:	9900      	ldr	r1, [sp, #0]
-    e57e:	f001 fd9d 	bl	100bc <__mcmp>
-    e582:	2800      	cmp	r0, #0
-    e584:	db35      	blt.n	e5f2 <quorem+0x126>
-    e586:	9804      	ldr	r0, [sp, #16]
-    e588:	3001      	adds	r0, #1
-    e58a:	2700      	movs	r7, #0
-    e58c:	9004      	str	r0, [sp, #16]
-    e58e:	9d07      	ldr	r5, [sp, #28]
-    e590:	46bc      	mov	ip, r7
-    e592:	9908      	ldr	r1, [sp, #32]
-    e594:	c904      	ldmia	r1!, {r2}
-    e596:	4c19      	ldr	r4, [pc, #100]	(e5fc <.text+0xe5fc>)
-    e598:	9108      	str	r1, [sp, #32]
-    e59a:	1c11      	adds	r1, r2, #0
-    e59c:	4021      	ands	r1, r4
-    e59e:	4461      	add	r1, ip
-    e5a0:	0c0b      	lsrs	r3, r1, #16
-    e5a2:	0c12      	lsrs	r2, r2, #16
-    e5a4:	18d2      	adds	r2, r2, r3
-    e5a6:	0c13      	lsrs	r3, r2, #16
-    e5a8:	469c      	mov	ip, r3
-    e5aa:	682b      	ldr	r3, [r5, #0]
-    e5ac:	1c18      	adds	r0, r3, #0
-    e5ae:	4021      	ands	r1, r4
-    e5b0:	4020      	ands	r0, r4
-    e5b2:	1a40      	subs	r0, r0, r1
-    e5b4:	19c0      	adds	r0, r0, r7
-    e5b6:	4022      	ands	r2, r4
-    e5b8:	0c1b      	lsrs	r3, r3, #16
-    e5ba:	1a9b      	subs	r3, r3, r2
-    e5bc:	8028      	strh	r0, [r5, #0]
-    e5be:	1402      	asrs	r2, r0, #16
-    e5c0:	9906      	ldr	r1, [sp, #24]
-    e5c2:	9808      	ldr	r0, [sp, #32]
-    e5c4:	189b      	adds	r3, r3, r2
-    e5c6:	806b      	strh	r3, [r5, #2]
-    e5c8:	141f      	asrs	r7, r3, #16
-    e5ca:	3504      	adds	r5, #4
-    e5cc:	4288      	cmp	r0, r1
-    e5ce:	d9e0      	bls.n	e592 <quorem+0xc6>
-    e5d0:	9807      	ldr	r0, [sp, #28]
-    e5d2:	00b3      	lsls	r3, r6, #2
-    e5d4:	18c2      	adds	r2, r0, r3
-    e5d6:	6813      	ldr	r3, [r2, #0]
-    e5d8:	2b00      	cmp	r3, #0
-    e5da:	d001      	beq.n	e5e0 <quorem+0x114>
-    e5dc:	e009      	b.n	e5f2 <quorem+0x126>
-    e5de:	3e01      	subs	r6, #1
-    e5e0:	9907      	ldr	r1, [sp, #28]
-    e5e2:	3a04      	subs	r2, #4
-    e5e4:	428a      	cmp	r2, r1
-    e5e6:	d902      	bls.n	e5ee <quorem+0x122>
-    e5e8:	6813      	ldr	r3, [r2, #0]
-    e5ea:	2b00      	cmp	r3, #0
-    e5ec:	d0f7      	beq.n	e5de <quorem+0x112>
-    e5ee:	9a01      	ldr	r2, [sp, #4]
-    e5f0:	6116      	str	r6, [r2, #16]
-    e5f2:	9804      	ldr	r0, [sp, #16]
-    e5f4:	b009      	add	sp, #36
-    e5f6:	bcf0      	pop	{r4, r5, r6, r7}
-    e5f8:	bc02      	pop	{r1}
-    e5fa:	4708      	bx	r1
-    e5fc:	ffff 0000 	vaddl.u<illegal width 64>	q8, d15, d0
-
-0000e600 <_dtoa_r>:
-    e600:	b5f0      	push	{r4, r5, r6, r7, lr}
-    e602:	b0a4      	sub	sp, #144
-    e604:	9103      	str	r1, [sp, #12]
-    e606:	9204      	str	r2, [sp, #16]
-    e608:	6c01      	ldr	r1, [r0, #64]
-    e60a:	9002      	str	r0, [sp, #8]
-    e60c:	9301      	str	r3, [sp, #4]
-    e60e:	9c2b      	ldr	r4, [sp, #172]
-    e610:	2900      	cmp	r1, #0
-    e612:	d00a      	beq.n	e62a <_dtoa_r+0x2a>
-    e614:	6c43      	ldr	r3, [r0, #68]
-    e616:	604b      	str	r3, [r1, #4]
-    e618:	6c42      	ldr	r2, [r0, #68]
-    e61a:	2301      	movs	r3, #1
-    e61c:	4093      	lsls	r3, r2
-    e61e:	608b      	str	r3, [r1, #8]
-    e620:	f001 fce6 	bl	fff0 <_Bfree>
-    e624:	9802      	ldr	r0, [sp, #8]
-    e626:	2300      	movs	r3, #0
-    e628:	6403      	str	r3, [r0, #64]
-    e62a:	9a03      	ldr	r2, [sp, #12]
-    e62c:	2a00      	cmp	r2, #0
-    e62e:	da05      	bge.n	e63c <_dtoa_r+0x3c>
-    e630:	2301      	movs	r3, #1
-    e632:	6023      	str	r3, [r4, #0]
-    e634:	4bcd      	ldr	r3, [pc, #820]	(e96c <.text+0xe96c>)
-    e636:	401a      	ands	r2, r3
-    e638:	9203      	str	r2, [sp, #12]
-    e63a:	e001      	b.n	e640 <_dtoa_r+0x40>
-    e63c:	2300      	movs	r3, #0
-    e63e:	6023      	str	r3, [r4, #0]
-    e640:	9e03      	ldr	r6, [sp, #12]
-    e642:	4acb      	ldr	r2, [pc, #812]	(e970 <.text+0xe970>)
-    e644:	1c33      	adds	r3, r6, #0
-    e646:	4013      	ands	r3, r2
-    e648:	4293      	cmp	r3, r2
-    e64a:	d119      	bne.n	e680 <_dtoa_r+0x80>
-    e64c:	4bc9      	ldr	r3, [pc, #804]	(e974 <.text+0xe974>)
-    e64e:	992a      	ldr	r1, [sp, #168]
-    e650:	9a04      	ldr	r2, [sp, #16]
-    e652:	600b      	str	r3, [r1, #0]
-    e654:	2a00      	cmp	r2, #0
-    e656:	d104      	bne.n	e662 <_dtoa_r+0x62>
-    e658:	4bc7      	ldr	r3, [pc, #796]	(e978 <.text+0xe978>)
-    e65a:	421e      	tst	r6, r3
-    e65c:	d101      	bne.n	e662 <_dtoa_r+0x62>
-    e65e:	48c7      	ldr	r0, [pc, #796]	(e97c <.text+0xe97c>)
-    e660:	e000      	b.n	e664 <_dtoa_r+0x64>
-    e662:	48c7      	ldr	r0, [pc, #796]	(e980 <.text+0xe980>)
-    e664:	9b2c      	ldr	r3, [sp, #176]
-    e666:	2b00      	cmp	r3, #0
-    e668:	d101      	bne.n	e66e <_dtoa_r+0x6e>
-    e66a:	f000 fdc3 	bl	f1f4 <.text+0xf1f4>
-    e66e:	78c3      	ldrb	r3, [r0, #3]
-    e670:	1cc2      	adds	r2, r0, #3
-    e672:	2b00      	cmp	r3, #0
-    e674:	d000      	beq.n	e678 <_dtoa_r+0x78>
-    e676:	3205      	adds	r2, #5
-    e678:	9c2c      	ldr	r4, [sp, #176]
-    e67a:	6022      	str	r2, [r4, #0]
-    e67c:	f000 fdba 	bl	f1f4 <.text+0xf1f4>
-    e680:	9803      	ldr	r0, [sp, #12]
-    e682:	9904      	ldr	r1, [sp, #16]
-    e684:	4abf      	ldr	r2, [pc, #764]	(e984 <.text+0xe984>)
-    e686:	4bc0      	ldr	r3, [pc, #768]	(e988 <.text+0xe988>)
-    e688:	9005      	str	r0, [sp, #20]
-    e68a:	9106      	str	r1, [sp, #24]
-    e68c:	f006 faee 	bl	14c6c <____nedf2_from_thumb>
-    e690:	2800      	cmp	r0, #0
-    e692:	d10e      	bne.n	e6b2 <_dtoa_r+0xb2>
-    e694:	992a      	ldr	r1, [sp, #168]
-    e696:	9a2c      	ldr	r2, [sp, #176]
-    e698:	2301      	movs	r3, #1
-    e69a:	600b      	str	r3, [r1, #0]
-    e69c:	2a00      	cmp	r2, #0
-    e69e:	d102      	bne.n	e6a6 <_dtoa_r+0xa6>
-    e6a0:	48ba      	ldr	r0, [pc, #744]	(e98c <.text+0xe98c>)
-    e6a2:	f000 fda7 	bl	f1f4 <.text+0xf1f4>
-    e6a6:	4bba      	ldr	r3, [pc, #744]	(e990 <.text+0xe990>)
-    e6a8:	9c2c      	ldr	r4, [sp, #176]
-    e6aa:	1e58      	subs	r0, r3, #1
-    e6ac:	6023      	str	r3, [r4, #0]
-    e6ae:	f000 fda1 	bl	f1f4 <.text+0xf1f4>
-    e6b2:	ab22      	add	r3, sp, #136
-    e6b4:	9300      	str	r3, [sp, #0]
-    e6b6:	9802      	ldr	r0, [sp, #8]
-    e6b8:	ab23      	add	r3, sp, #140
-    e6ba:	9905      	ldr	r1, [sp, #20]
-    e6bc:	9a06      	ldr	r2, [sp, #24]
-    e6be:	f001 fe1f 	bl	10300 <_d2b>
-    e6c2:	0073      	lsls	r3, r6, #1
-    e6c4:	0d5c      	lsrs	r4, r3, #21
-    e6c6:	9014      	str	r0, [sp, #80]
-    e6c8:	2c00      	cmp	r4, #0
-    e6ca:	d00b      	beq.n	e6e4 <_dtoa_r+0xe4>
-    e6cc:	9805      	ldr	r0, [sp, #20]
-    e6ce:	9906      	ldr	r1, [sp, #24]
-    e6d0:	4ba9      	ldr	r3, [pc, #676]	(e978 <.text+0xe978>)
-    e6d2:	4ab0      	ldr	r2, [pc, #704]	(e994 <.text+0xe994>)
-    e6d4:	4003      	ands	r3, r0
-    e6d6:	1c18      	adds	r0, r3, #0
-    e6d8:	4310      	orrs	r0, r2
-    e6da:	4aaf      	ldr	r2, [pc, #700]	(e998 <.text+0xe998>)
-    e6dc:	2300      	movs	r3, #0
-    e6de:	18a6      	adds	r6, r4, r2
-    e6e0:	9313      	str	r3, [sp, #76]
-    e6e2:	e023      	b.n	e72c <_dtoa_r+0x12c>
-    e6e4:	9b22      	ldr	r3, [sp, #136]
-    e6e6:	4cad      	ldr	r4, [pc, #692]	(e99c <.text+0xe99c>)
-    e6e8:	9a23      	ldr	r2, [sp, #140]
-    e6ea:	191b      	adds	r3, r3, r4
-    e6ec:	189d      	adds	r5, r3, r2
-    e6ee:	2d20      	cmp	r5, #32
-    e6f0:	dd09      	ble.n	e706 <_dtoa_r+0x106>
-    e6f2:	2240      	movs	r2, #64
-    e6f4:	1b52      	subs	r2, r2, r5
-    e6f6:	1c2b      	adds	r3, r5, #0
-    e6f8:	9804      	ldr	r0, [sp, #16]
-    e6fa:	4096      	lsls	r6, r2
-    e6fc:	3b20      	subs	r3, #32
-    e6fe:	40d8      	lsrs	r0, r3
-    e700:	1c34      	adds	r4, r6, #0
-    e702:	4304      	orrs	r4, r0
-    e704:	e003      	b.n	e70e <_dtoa_r+0x10e>
-    e706:	2320      	movs	r3, #32
-    e708:	9c04      	ldr	r4, [sp, #16]
-    e70a:	1b5b      	subs	r3, r3, r5
-    e70c:	409c      	lsls	r4, r3
-    e70e:	1c20      	adds	r0, r4, #0
-    e710:	f006 fab4 	bl	14c7c <____floatsidf_from_thumb>
-    e714:	2c00      	cmp	r4, #0
-    e716:	da03      	bge.n	e720 <_dtoa_r+0x120>
-    e718:	4aa1      	ldr	r2, [pc, #644]	(e9a0 <.text+0xe9a0>)
-    e71a:	4ba2      	ldr	r3, [pc, #648]	(e9a4 <.text+0xe9a4>)
-    e71c:	f006 fab2 	bl	14c84 <____adddf3_from_thumb>
-    e720:	4aa1      	ldr	r2, [pc, #644]	(e9a8 <.text+0xe9a8>)
-    e722:	4ba2      	ldr	r3, [pc, #648]	(e9ac <.text+0xe9ac>)
-    e724:	2401      	movs	r4, #1
-    e726:	9413      	str	r4, [sp, #76]
-    e728:	1880      	adds	r0, r0, r2
-    e72a:	18ee      	adds	r6, r5, r3
-    e72c:	4aa0      	ldr	r2, [pc, #640]	(e9b0 <.text+0xe9b0>)
-    e72e:	4ba1      	ldr	r3, [pc, #644]	(e9b4 <.text+0xe9b4>)
-    e730:	f006 faac 	bl	14c8c <____subdf3_from_thumb>
-    e734:	4aa0      	ldr	r2, [pc, #640]	(e9b8 <.text+0xe9b8>)
-    e736:	4ba1      	ldr	r3, [pc, #644]	(e9bc <.text+0xe9bc>)
-    e738:	f006 faac 	bl	14c94 <____muldf3_from_thumb>
-    e73c:	4aa0      	ldr	r2, [pc, #640]	(e9c0 <.text+0xe9c0>)
-    e73e:	4ba1      	ldr	r3, [pc, #644]	(e9c4 <.text+0xe9c4>)
-    e740:	f006 faa0 	bl	14c84 <____adddf3_from_thumb>
-    e744:	1c04      	adds	r4, r0, #0
-    e746:	1c30      	adds	r0, r6, #0
-    e748:	1c0d      	adds	r5, r1, #0
-    e74a:	f006 fa97 	bl	14c7c <____floatsidf_from_thumb>
-    e74e:	4a9e      	ldr	r2, [pc, #632]	(e9c8 <.text+0xe9c8>)
-    e750:	4b9e      	ldr	r3, [pc, #632]	(e9cc <.text+0xe9cc>)
-    e752:	f006 fa9f 	bl	14c94 <____muldf3_from_thumb>
-    e756:	1c02      	adds	r2, r0, #0
-    e758:	1c0b      	adds	r3, r1, #0
-    e75a:	1c20      	adds	r0, r4, #0
-    e75c:	1c29      	adds	r1, r5, #0
-    e75e:	f006 fa91 	bl	14c84 <____adddf3_from_thumb>
-    e762:	1c04      	adds	r4, r0, #0
-    e764:	1c0d      	adds	r5, r1, #0
-    e766:	f006 fa99 	bl	14c9c <____fixdfsi_from_thumb>
-    e76a:	1c29      	adds	r1, r5, #0
-    e76c:	900e      	str	r0, [sp, #56]
-    e76e:	4a85      	ldr	r2, [pc, #532]	(e984 <.text+0xe984>)
-    e770:	4b85      	ldr	r3, [pc, #532]	(e988 <.text+0xe988>)
-    e772:	1c20      	adds	r0, r4, #0
-    e774:	f006 fa76 	bl	14c64 <____ltdf2_from_thumb>
-    e778:	2800      	cmp	r0, #0
-    e77a:	da0d      	bge.n	e798 <_dtoa_r+0x198>
-    e77c:	980e      	ldr	r0, [sp, #56]
-    e77e:	f006 fa7d 	bl	14c7c <____floatsidf_from_thumb>
-    e782:	1c02      	adds	r2, r0, #0
-    e784:	1c0b      	adds	r3, r1, #0
-    e786:	1c20      	adds	r0, r4, #0
-    e788:	1c29      	adds	r1, r5, #0
-    e78a:	f006 fa6f 	bl	14c6c <____nedf2_from_thumb>
-    e78e:	2800      	cmp	r0, #0
-    e790:	d002      	beq.n	e798 <_dtoa_r+0x198>
-    e792:	980e      	ldr	r0, [sp, #56]
-    e794:	3801      	subs	r0, #1
-    e796:	900e      	str	r0, [sp, #56]
-    e798:	990e      	ldr	r1, [sp, #56]
-    e79a:	2916      	cmp	r1, #22
-    e79c:	d901      	bls.n	e7a2 <_dtoa_r+0x1a2>
-    e79e:	2201      	movs	r2, #1
-    e7a0:	e012      	b.n	e7c8 <_dtoa_r+0x1c8>
-    e7a2:	9c0e      	ldr	r4, [sp, #56]
-    e7a4:	4b8a      	ldr	r3, [pc, #552]	(e9d0 <.text+0xe9d0>)
-    e7a6:	00e2      	lsls	r2, r4, #3
-    e7a8:	18d2      	adds	r2, r2, r3
-    e7aa:	9805      	ldr	r0, [sp, #20]
-    e7ac:	9906      	ldr	r1, [sp, #24]
-    e7ae:	6853      	ldr	r3, [r2, #4]
-    e7b0:	6812      	ldr	r2, [r2, #0]
-    e7b2:	f006 fa57 	bl	14c64 <____ltdf2_from_thumb>
-    e7b6:	2800      	cmp	r0, #0
-    e7b8:	db02      	blt.n	e7c0 <_dtoa_r+0x1c0>
-    e7ba:	2000      	movs	r0, #0
-    e7bc:	900f      	str	r0, [sp, #60]
-    e7be:	e004      	b.n	e7ca <_dtoa_r+0x1ca>
-    e7c0:	990e      	ldr	r1, [sp, #56]
-    e7c2:	3901      	subs	r1, #1
-    e7c4:	910e      	str	r1, [sp, #56]
-    e7c6:	2200      	movs	r2, #0
-    e7c8:	920f      	str	r2, [sp, #60]
-    e7ca:	9b22      	ldr	r3, [sp, #136]
-    e7cc:	1b9b      	subs	r3, r3, r6
-    e7ce:	1e5a      	subs	r2, r3, #1
-    e7d0:	d403      	bmi.n	e7da <_dtoa_r+0x1da>
-    e7d2:	2300      	movs	r3, #0
-    e7d4:	9211      	str	r2, [sp, #68]
-    e7d6:	9309      	str	r3, [sp, #36]
-    e7d8:	e003      	b.n	e7e2 <_dtoa_r+0x1e2>
-    e7da:	4252      	negs	r2, r2
-    e7dc:	2400      	movs	r4, #0
-    e7de:	9209      	str	r2, [sp, #36]
-    e7e0:	9411      	str	r4, [sp, #68]
-    e7e2:	980e      	ldr	r0, [sp, #56]
-    e7e4:	2800      	cmp	r0, #0
-    e7e6:	db06      	blt.n	e7f6 <_dtoa_r+0x1f6>
-    e7e8:	9911      	ldr	r1, [sp, #68]
-    e7ea:	2200      	movs	r2, #0
-    e7ec:	1809      	adds	r1, r1, r0
-    e7ee:	9111      	str	r1, [sp, #68]
-    e7f0:	9012      	str	r0, [sp, #72]
-    e7f2:	920a      	str	r2, [sp, #40]
-    e7f4:	e007      	b.n	e806 <_dtoa_r+0x206>
-    e7f6:	9b09      	ldr	r3, [sp, #36]
-    e7f8:	9c0e      	ldr	r4, [sp, #56]
-    e7fa:	2100      	movs	r1, #0
-    e7fc:	1b1b      	subs	r3, r3, r4
-    e7fe:	4260      	negs	r0, r4
-    e800:	9309      	str	r3, [sp, #36]
-    e802:	900a      	str	r0, [sp, #40]
-    e804:	9112      	str	r1, [sp, #72]
-    e806:	9a01      	ldr	r2, [sp, #4]
-    e808:	2a09      	cmp	r2, #9
-    e80a:	d81b      	bhi.n	e844 <_dtoa_r+0x244>
-    e80c:	2a05      	cmp	r2, #5
-    e80e:	dc01      	bgt.n	e814 <_dtoa_r+0x214>
-    e810:	2401      	movs	r4, #1
-    e812:	e003      	b.n	e81c <_dtoa_r+0x21c>
-    e814:	9b01      	ldr	r3, [sp, #4]
-    e816:	3b04      	subs	r3, #4
-    e818:	9301      	str	r3, [sp, #4]
-    e81a:	2400      	movs	r4, #0
-    e81c:	9801      	ldr	r0, [sp, #4]
-    e81e:	2805      	cmp	r0, #5
-    e820:	d803      	bhi.n	e82a <_dtoa_r+0x22a>
-    e822:	4a6c      	ldr	r2, [pc, #432]	(e9d4 <.text+0xe9d4>)
-    e824:	0083      	lsls	r3, r0, #2
-    e826:	589b      	ldr	r3, [r3, r2]
-    e828:	469f      	mov	pc, r3
-    e82a:	2101      	movs	r1, #1
-    e82c:	4249      	negs	r1, r1
-    e82e:	2201      	movs	r2, #1
-    e830:	910c      	str	r1, [sp, #48]
-    e832:	910d      	str	r1, [sp, #52]
-    e834:	9210      	str	r2, [sp, #64]
-    e836:	e02f      	b.n	e898 <_dtoa_r+0x298>
-    e838:	2301      	movs	r3, #1
-    e83a:	9310      	str	r3, [sp, #64]
-    e83c:	e020      	b.n	e880 <_dtoa_r+0x280>
-    e83e:	2001      	movs	r0, #1
-    e840:	9010      	str	r0, [sp, #64]
-    e842:	e00e      	b.n	e862 <_dtoa_r+0x262>
-    e844:	2100      	movs	r1, #0
-    e846:	9101      	str	r1, [sp, #4]
-    e848:	2401      	movs	r4, #1
-    e84a:	2301      	movs	r3, #1
-    e84c:	425b      	negs	r3, r3
-    e84e:	2200      	movs	r2, #0
-    e850:	2001      	movs	r0, #1
-    e852:	2612      	movs	r6, #18
-    e854:	9229      	str	r2, [sp, #164]
-    e856:	930c      	str	r3, [sp, #48]
-    e858:	930d      	str	r3, [sp, #52]
-    e85a:	9010      	str	r0, [sp, #64]
-    e85c:	e01c      	b.n	e898 <_dtoa_r+0x298>
-    e85e:	2100      	movs	r1, #0
-    e860:	9110      	str	r1, [sp, #64]
-    e862:	9a29      	ldr	r2, [sp, #164]
-    e864:	2a00      	cmp	r2, #0
-    e866:	dd03      	ble.n	e870 <_dtoa_r+0x270>
-    e868:	1c16      	adds	r6, r2, #0
-    e86a:	920c      	str	r2, [sp, #48]
-    e86c:	920d      	str	r2, [sp, #52]
-    e86e:	e013      	b.n	e898 <_dtoa_r+0x298>
-    e870:	2601      	movs	r6, #1
-    e872:	2301      	movs	r3, #1
-    e874:	9329      	str	r3, [sp, #164]
-    e876:	960c      	str	r6, [sp, #48]
-    e878:	960d      	str	r6, [sp, #52]
-    e87a:	e00d      	b.n	e898 <_dtoa_r+0x298>
-    e87c:	2000      	movs	r0, #0
-    e87e:	9010      	str	r0, [sp, #64]
-    e880:	9b29      	ldr	r3, [sp, #164]
-    e882:	990e      	ldr	r1, [sp, #56]
-    e884:	3301      	adds	r3, #1
-    e886:	18ce      	adds	r6, r1, r3
-    e888:	1e72      	subs	r2, r6, #1
-    e88a:	920d      	str	r2, [sp, #52]
-    e88c:	2e00      	cmp	r6, #0
-    e88e:	dc02      	bgt.n	e896 <_dtoa_r+0x296>
-    e890:	960c      	str	r6, [sp, #48]
-    e892:	2601      	movs	r6, #1
-    e894:	e000      	b.n	e898 <_dtoa_r+0x298>
-    e896:	960c      	str	r6, [sp, #48]
-    e898:	9802      	ldr	r0, [sp, #8]
-    e89a:	2300      	movs	r3, #0
-    e89c:	2204      	movs	r2, #4
-    e89e:	6443      	str	r3, [r0, #68]
-    e8a0:	e003      	b.n	e8aa <_dtoa_r+0x2aa>
-    e8a2:	1c4b      	adds	r3, r1, #1
-    e8a4:	9902      	ldr	r1, [sp, #8]
-    e8a6:	644b      	str	r3, [r1, #68]
-    e8a8:	0052      	lsls	r2, r2, #1
-    e8aa:	1c13      	adds	r3, r2, #0
-    e8ac:	9802      	ldr	r0, [sp, #8]
-    e8ae:	3314      	adds	r3, #20
-    e8b0:	6c41      	ldr	r1, [r0, #68]
-    e8b2:	42b3      	cmp	r3, r6
-    e8b4:	d9f5      	bls.n	e8a2 <_dtoa_r+0x2a2>
-    e8b6:	f001 fcf5 	bl	102a4 <_Balloc>
-    e8ba:	9902      	ldr	r1, [sp, #8]
-    e8bc:	9a0c      	ldr	r2, [sp, #48]
-    e8be:	901a      	str	r0, [sp, #104]
-    e8c0:	6408      	str	r0, [r1, #64]
-    e8c2:	2a0e      	cmp	r2, #14
-    e8c4:	d900      	bls.n	e8c8 <_dtoa_r+0x2c8>
-    e8c6:	e1a5      	b.n	ec14 <.text+0xec14>
-    e8c8:	2c00      	cmp	r4, #0
-    e8ca:	d100      	bne.n	e8ce <_dtoa_r+0x2ce>
-    e8cc:	e1a2      	b.n	ec14 <.text+0xec14>
-    e8ce:	9b0e      	ldr	r3, [sp, #56]
-    e8d0:	2b00      	cmp	r3, #0
-    e8d2:	dd33      	ble.n	e93c <_dtoa_r+0x33c>
-    e8d4:	210f      	movs	r1, #15
-    e8d6:	4a3e      	ldr	r2, [pc, #248]	(e9d0 <.text+0xe9d0>)
-    e8d8:	400b      	ands	r3, r1
-    e8da:	980e      	ldr	r0, [sp, #56]
-    e8dc:	00db      	lsls	r3, r3, #3
-    e8de:	189b      	adds	r3, r3, r2
-    e8e0:	1104      	asrs	r4, r0, #4
-    e8e2:	681e      	ldr	r6, [r3, #0]
-    e8e4:	685f      	ldr	r7, [r3, #4]
-    e8e6:	06e2      	lsls	r2, r4, #27
-    e8e8:	d402      	bmi.n	e8f0 <_dtoa_r+0x2f0>
-    e8ea:	2302      	movs	r3, #2
-    e8ec:	930b      	str	r3, [sp, #44]
-    e8ee:	e00b      	b.n	e908 <_dtoa_r+0x308>
-    e8f0:	4b39      	ldr	r3, [pc, #228]	(e9d8 <.text+0xe9d8>)
-    e8f2:	400c      	ands	r4, r1
-    e8f4:	6a1a      	ldr	r2, [r3, #32]
-    e8f6:	6a5b      	ldr	r3, [r3, #36]
-    e8f8:	9805      	ldr	r0, [sp, #20]
-    e8fa:	9906      	ldr	r1, [sp, #24]
-    e8fc:	f006 f9d2 	bl	14ca4 <____divdf3_from_thumb>
-    e900:	9003      	str	r0, [sp, #12]
-    e902:	9104      	str	r1, [sp, #16]
-    e904:	2003      	movs	r0, #3
-    e906:	900b      	str	r0, [sp, #44]
-    e908:	4d33      	ldr	r5, [pc, #204]	(e9d8 <.text+0xe9d8>)
-    e90a:	e00e      	b.n	e92a <_dtoa_r+0x32a>
-    e90c:	07e1      	lsls	r1, r4, #31
-    e90e:	d50a      	bpl.n	e926 <_dtoa_r+0x326>
-    e910:	9a0b      	ldr	r2, [sp, #44]
-    e912:	3201      	adds	r2, #1
-    e914:	920b      	str	r2, [sp, #44]
-    e916:	1c30      	adds	r0, r6, #0
-    e918:	1c39      	adds	r1, r7, #0
-    e91a:	682a      	ldr	r2, [r5, #0]
-    e91c:	686b      	ldr	r3, [r5, #4]
-    e91e:	f006 f9b9 	bl	14c94 <____muldf3_from_thumb>
-    e922:	1c06      	adds	r6, r0, #0
-    e924:	1c0f      	adds	r7, r1, #0
-    e926:	1064      	asrs	r4, r4, #1
-    e928:	3508      	adds	r5, #8
-    e92a:	2c00      	cmp	r4, #0
-    e92c:	d1ee      	bne.n	e90c <_dtoa_r+0x30c>
-    e92e:	9803      	ldr	r0, [sp, #12]
-    e930:	9904      	ldr	r1, [sp, #16]
-    e932:	1c32      	adds	r2, r6, #0
-    e934:	1c3b      	adds	r3, r7, #0
-    e936:	f006 f9b5 	bl	14ca4 <____divdf3_from_thumb>
-    e93a:	e05c      	b.n	e9f6 <.text+0xe9f6>
-    e93c:	9b0e      	ldr	r3, [sp, #56]
-    e93e:	425c      	negs	r4, r3
-    e940:	2c00      	cmp	r4, #0
-    e942:	d102      	bne.n	e94a <_dtoa_r+0x34a>
-    e944:	2402      	movs	r4, #2
-    e946:	940b      	str	r4, [sp, #44]
-    e948:	e057      	b.n	e9fa <.text+0xe9fa>
-    e94a:	230f      	movs	r3, #15
-    e94c:	4a20      	ldr	r2, [pc, #128]	(e9d0 <.text+0xe9d0>)
-    e94e:	4023      	ands	r3, r4
-    e950:	00db      	lsls	r3, r3, #3
-    e952:	189b      	adds	r3, r3, r2
-    e954:	681a      	ldr	r2, [r3, #0]
-    e956:	685b      	ldr	r3, [r3, #4]
-    e958:	9805      	ldr	r0, [sp, #20]
-    e95a:	9906      	ldr	r1, [sp, #24]
-    e95c:	f006 f99a 	bl	14c94 <____muldf3_from_thumb>
-    e960:	4d1d      	ldr	r5, [pc, #116]	(e9d8 <.text+0xe9d8>)
-    e962:	2202      	movs	r2, #2
-    e964:	1124      	asrs	r4, r4, #4
-    e966:	920b      	str	r2, [sp, #44]
-    e968:	e043      	b.n	e9f2 <.text+0xe9f2>
-    e96a:	0000      	lsls	r0, r0, #0
-    e96c:	ffff 7fff 	undefined
-    e970:	0000      	lsls	r0, r0, #0
-    e972:	7ff0      	ldrb	r0, [r6, #31]
-    e974:	270f      	movs	r7, #15
-    e976:	0000      	lsls	r0, r0, #0
-    e978:	ffff 000f 	vaddl.u<illegal width 64>	q8, d15, d15
-    e97c:	5504      	strb	r4, [r0, r4]
-    e97e:	0001      	lsls	r1, r0, #0
-    e980:	5510      	strb	r0, [r2, r4]
-    e982:	0001      	lsls	r1, r0, #0
-	...
-    e98c:	54d4      	strb	r4, [r2, r3]
-    e98e:	0001      	lsls	r1, r0, #0
-    e990:	54d5      	strb	r5, [r2, r3]
-    e992:	0001      	lsls	r1, r0, #0
-    e994:	0000      	lsls	r0, r0, #0
-    e996:	3ff0      	subs	r7, #240
-    e998:	fc01 ffff 	stc2	15, cr15, [r1], {255}
-    e99c:	0432      	lsls	r2, r6, #16
-    e99e:	0000      	lsls	r0, r0, #0
-    e9a0:	0000      	lsls	r0, r0, #0
-    e9a2:	41f0      	rors	r0, r6
-    e9a4:	0000      	lsls	r0, r0, #0
-    e9a6:	0000      	lsls	r0, r0, #0
-    e9a8:	0000      	lsls	r0, r0, #0
-    e9aa:	fe10 fbcd 	cdp2	11, 1, cr15, cr0, cr13, {6}
-    e9ae:	ffff 0000 	vaddl.u<illegal width 64>	q8, d15, d0
-    e9b2:	3ff8      	subs	r7, #248
-    e9b4:	0000      	lsls	r0, r0, #0
-    e9b6:	0000      	lsls	r0, r0, #0
-    e9b8:	87a7      	strh	r7, [r4, #60]
-    e9ba:	3fd2      	subs	r7, #210
-    e9bc:	4361      	muls	r1, r4
-    e9be:	636f      	str	r7, [r5, #52]
-    e9c0:	8a28      	ldrh	r0, [r5, #16]
-    e9c2:	3fc6      	subs	r7, #198
-    e9c4:	c8b3      	ldmia	r0!, {r0, r1, r4, r5, r7}
-    e9c6:	8b60      	ldrh	r0, [r4, #26]
-    e9c8:	4413      	add	r3, r2
-    e9ca:	3fd3      	subs	r7, #211
-    e9cc:	79fb      	ldrb	r3, [r7, #7]
-    e9ce:	509f      	str	r7, [r3, r2]
-    e9d0:	503c      	str	r4, [r7, r0]
-    e9d2:	0001      	lsls	r1, r0, #0
-    e9d4:	4fec      	ldr	r7, [pc, #944]	(ed88 <.text+0xed88>)
-    e9d6:	0001      	lsls	r1, r0, #0
-    e9d8:	5104      	str	r4, [r0, r4]
-    e9da:	0001      	lsls	r1, r0, #0
-    e9dc:	07e3      	lsls	r3, r4, #31
-    e9de:	d506      	bpl.n	e9ee <.text+0xe9ee>
-    e9e0:	9a0b      	ldr	r2, [sp, #44]
-    e9e2:	3201      	adds	r2, #1
-    e9e4:	920b      	str	r2, [sp, #44]
-    e9e6:	682a      	ldr	r2, [r5, #0]
-    e9e8:	686b      	ldr	r3, [r5, #4]
-    e9ea:	f006 f953 	bl	14c94 <____muldf3_from_thumb>
-    e9ee:	1064      	asrs	r4, r4, #1
-    e9f0:	3508      	adds	r5, #8
-    e9f2:	2c00      	cmp	r4, #0
-    e9f4:	d1f2      	bne.n	e9dc <.text+0xe9dc>
-    e9f6:	9003      	str	r0, [sp, #12]
-    e9f8:	9104      	str	r1, [sp, #16]
-    e9fa:	9b0f      	ldr	r3, [sp, #60]
-    e9fc:	2b00      	cmp	r3, #0
-    e9fe:	d02f      	beq.n	ea60 <.text+0xea60>
-    ea00:	9c03      	ldr	r4, [sp, #12]
-    ea02:	9d04      	ldr	r5, [sp, #16]
-    ea04:	4bce      	ldr	r3, [pc, #824]	(ed40 <.text+0xed40>)
-    ea06:	4acd      	ldr	r2, [pc, #820]	(ed3c <.text+0xed3c>)
-    ea08:	1c20      	adds	r0, r4, #0
-    ea0a:	1c29      	adds	r1, r5, #0
-    ea0c:	f006 f92a 	bl	14c64 <____ltdf2_from_thumb>
-    ea10:	2800      	cmp	r0, #0
-    ea12:	da25      	bge.n	ea60 <.text+0xea60>
-    ea14:	980c      	ldr	r0, [sp, #48]
-    ea16:	2800      	cmp	r0, #0
-    ea18:	dd22      	ble.n	ea60 <.text+0xea60>
-    ea1a:	990d      	ldr	r1, [sp, #52]
-    ea1c:	2900      	cmp	r1, #0
-    ea1e:	dc00      	bgt.n	ea22 <.text+0xea22>
-    ea20:	e0f4      	b.n	ec0c <.text+0xec0c>
-    ea22:	9a0e      	ldr	r2, [sp, #56]
-    ea24:	3a01      	subs	r2, #1
-    ea26:	9220      	str	r2, [sp, #128]
-    ea28:	1c20      	adds	r0, r4, #0
-    ea2a:	4ac6      	ldr	r2, [pc, #792]	(ed44 <.text+0xed44>)
-    ea2c:	4bc6      	ldr	r3, [pc, #792]	(ed48 <.text+0xed48>)
-    ea2e:	1c29      	adds	r1, r5, #0
-    ea30:	f006 f930 	bl	14c94 <____muldf3_from_thumb>
-    ea34:	1c04      	adds	r4, r0, #0
-    ea36:	980b      	ldr	r0, [sp, #44]
-    ea38:	1c0d      	adds	r5, r1, #0
-    ea3a:	3001      	adds	r0, #1
-    ea3c:	9403      	str	r4, [sp, #12]
-    ea3e:	9504      	str	r5, [sp, #16]
-    ea40:	f006 f91c 	bl	14c7c <____floatsidf_from_thumb>
-    ea44:	1c22      	adds	r2, r4, #0
-    ea46:	1c2b      	adds	r3, r5, #0
-    ea48:	f006 f924 	bl	14c94 <____muldf3_from_thumb>
-    ea4c:	4abf      	ldr	r2, [pc, #764]	(ed4c <.text+0xed4c>)
-    ea4e:	4bc0      	ldr	r3, [pc, #768]	(ed50 <.text+0xed50>)
-    ea50:	f006 f918 	bl	14c84 <____adddf3_from_thumb>
-    ea54:	4bbf      	ldr	r3, [pc, #764]	(ed54 <.text+0xed54>)
-    ea56:	18c4      	adds	r4, r0, r3
-    ea58:	980d      	ldr	r0, [sp, #52]
-    ea5a:	1c0d      	adds	r5, r1, #0
-    ea5c:	9021      	str	r0, [sp, #132]
-    ea5e:	e032      	b.n	eac6 <.text+0xeac6>
-    ea60:	9e03      	ldr	r6, [sp, #12]
-    ea62:	9f04      	ldr	r7, [sp, #16]
-    ea64:	980b      	ldr	r0, [sp, #44]
-    ea66:	f006 f909 	bl	14c7c <____floatsidf_from_thumb>
-    ea6a:	1c32      	adds	r2, r6, #0
-    ea6c:	1c3b      	adds	r3, r7, #0
-    ea6e:	f006 f911 	bl	14c94 <____muldf3_from_thumb>
-    ea72:	4ab6      	ldr	r2, [pc, #728]	(ed4c <.text+0xed4c>)
-    ea74:	4bb6      	ldr	r3, [pc, #728]	(ed50 <.text+0xed50>)
-    ea76:	f006 f905 	bl	14c84 <____adddf3_from_thumb>
-    ea7a:	9a0c      	ldr	r2, [sp, #48]
-    ea7c:	1c0d      	adds	r5, r1, #0
-    ea7e:	49b5      	ldr	r1, [pc, #724]	(ed54 <.text+0xed54>)
-    ea80:	1c04      	adds	r4, r0, #0
-    ea82:	1864      	adds	r4, r4, r1
-    ea84:	2a00      	cmp	r2, #0
-    ea86:	d11a      	bne.n	eabe <.text+0xeabe>
-    ea88:	4ab3      	ldr	r2, [pc, #716]	(ed58 <.text+0xed58>)
-    ea8a:	4bb4      	ldr	r3, [pc, #720]	(ed5c <.text+0xed5c>)
-    ea8c:	1c30      	adds	r0, r6, #0
-    ea8e:	1c39      	adds	r1, r7, #0
-    ea90:	f006 f8fc 	bl	14c8c <____subdf3_from_thumb>
-    ea94:	1c22      	adds	r2, r4, #0
-    ea96:	1c2b      	adds	r3, r5, #0
-    ea98:	1c06      	adds	r6, r0, #0
-    ea9a:	1c0f      	adds	r7, r1, #0
-    ea9c:	f006 f906 	bl	14cac <____gtdf2_from_thumb>
-    eaa0:	2800      	cmp	r0, #0
-    eaa2:	dd00      	ble.n	eaa6 <.text+0xeaa6>
-    eaa4:	e26f      	b.n	ef86 <.text+0xef86>
-    eaa6:	2080      	movs	r0, #128
-    eaa8:	0600      	lsls	r0, r0, #24
-    eaaa:	1822      	adds	r2, r4, r0
-    eaac:	1c2b      	adds	r3, r5, #0
-    eaae:	1c30      	adds	r0, r6, #0
-    eab0:	1c39      	adds	r1, r7, #0
-    eab2:	f006 f8d7 	bl	14c64 <____ltdf2_from_thumb>
-    eab6:	2800      	cmp	r0, #0
-    eab8:	da00      	bge.n	eabc <.text+0xeabc>
-    eaba:	e25a      	b.n	ef72 <.text+0xef72>
-    eabc:	e0a6      	b.n	ec0c <.text+0xec0c>
-    eabe:	990c      	ldr	r1, [sp, #48]
-    eac0:	9a0e      	ldr	r2, [sp, #56]
-    eac2:	9121      	str	r1, [sp, #132]
-    eac4:	9220      	str	r2, [sp, #128]
-    eac6:	9821      	ldr	r0, [sp, #132]
-    eac8:	9910      	ldr	r1, [sp, #64]
-    eaca:	4aa5      	ldr	r2, [pc, #660]	(ed60 <.text+0xed60>)
-    eacc:	00c3      	lsls	r3, r0, #3
-    eace:	2900      	cmp	r1, #0
-    ead0:	d04c      	beq.n	eb6c <.text+0xeb6c>
-    ead2:	189b      	adds	r3, r3, r2
-    ead4:	3b08      	subs	r3, #8
-    ead6:	681a      	ldr	r2, [r3, #0]
-    ead8:	685b      	ldr	r3, [r3, #4]
-    eada:	48a2      	ldr	r0, [pc, #648]	(ed64 <.text+0xed64>)
-    eadc:	49a2      	ldr	r1, [pc, #648]	(ed68 <.text+0xed68>)
-    eade:	f006 f8e1 	bl	14ca4 <____divdf3_from_thumb>
-    eae2:	1c2b      	adds	r3, r5, #0
-    eae4:	1c22      	adds	r2, r4, #0
-    eae6:	f006 f8d1 	bl	14c8c <____subdf3_from_thumb>
-    eaea:	9018      	str	r0, [sp, #96]
-    eaec:	9119      	str	r1, [sp, #100]
-    eaee:	9d03      	ldr	r5, [sp, #12]
-    eaf0:	9e04      	ldr	r6, [sp, #16]
-    eaf2:	9f1a      	ldr	r7, [sp, #104]
-    eaf4:	1c31      	adds	r1, r6, #0
-    eaf6:	1c28      	adds	r0, r5, #0
-    eaf8:	f006 f8d0 	bl	14c9c <____fixdfsi_from_thumb>
-    eafc:	1c04      	adds	r4, r0, #0
-    eafe:	f006 f8bd 	bl	14c7c <____floatsidf_from_thumb>
-    eb02:	1c02      	adds	r2, r0, #0
-    eb04:	1c0b      	adds	r3, r1, #0
-    eb06:	1c28      	adds	r0, r5, #0
-    eb08:	1c31      	adds	r1, r6, #0
-    eb0a:	f006 f8bf 	bl	14c8c <____subdf3_from_thumb>
-    eb0e:	3430      	adds	r4, #48
-    eb10:	703c      	strb	r4, [r7, #0]
-    eb12:	9a18      	ldr	r2, [sp, #96]
-    eb14:	9b19      	ldr	r3, [sp, #100]
-    eb16:	1c05      	adds	r5, r0, #0
-    eb18:	1c0e      	adds	r6, r1, #0
-    eb1a:	3701      	adds	r7, #1
-    eb1c:	f006 f8a2 	bl	14c64 <____ltdf2_from_thumb>
-    eb20:	2800      	cmp	r0, #0
-    eb22:	da00      	bge.n	eb26 <.text+0xeb26>
-    eb24:	e334      	b.n	f190 <.text+0xf190>
-    eb26:	1c2a      	adds	r2, r5, #0
-    eb28:	1c33      	adds	r3, r6, #0
-    eb2a:	4985      	ldr	r1, [pc, #532]	(ed40 <.text+0xed40>)
-    eb2c:	4883      	ldr	r0, [pc, #524]	(ed3c <.text+0xed3c>)
-    eb2e:	f006 f8ad 	bl	14c8c <____subdf3_from_thumb>
-    eb32:	9a18      	ldr	r2, [sp, #96]
-    eb34:	9b19      	ldr	r3, [sp, #100]
-    eb36:	f006 f895 	bl	14c64 <____ltdf2_from_thumb>
-    eb3a:	2800      	cmp	r0, #0
-    eb3c:	da00      	bge.n	eb40 <.text+0xeb40>
-    eb3e:	e0da      	b.n	ecf6 <.text+0xecf6>
-    eb40:	9a1a      	ldr	r2, [sp, #104]
-    eb42:	9c21      	ldr	r4, [sp, #132]
-    eb44:	1abb      	subs	r3, r7, r2
-    eb46:	42a3      	cmp	r3, r4
-    eb48:	da60      	bge.n	ec0c <.text+0xec0c>
-    eb4a:	9818      	ldr	r0, [sp, #96]
-    eb4c:	9919      	ldr	r1, [sp, #100]
-    eb4e:	4a7d      	ldr	r2, [pc, #500]	(ed44 <.text+0xed44>)
-    eb50:	4b7d      	ldr	r3, [pc, #500]	(ed48 <.text+0xed48>)
-    eb52:	f006 f89f 	bl	14c94 <____muldf3_from_thumb>
-    eb56:	4a7b      	ldr	r2, [pc, #492]	(ed44 <.text+0xed44>)
-    eb58:	4b7b      	ldr	r3, [pc, #492]	(ed48 <.text+0xed48>)
-    eb5a:	9018      	str	r0, [sp, #96]
-    eb5c:	9119      	str	r1, [sp, #100]
-    eb5e:	1c28      	adds	r0, r5, #0
-    eb60:	1c31      	adds	r1, r6, #0
-    eb62:	f006 f897 	bl	14c94 <____muldf3_from_thumb>
-    eb66:	1c05      	adds	r5, r0, #0
-    eb68:	1c0e      	adds	r6, r1, #0
-    eb6a:	e7c3      	b.n	eaf4 <.text+0xeaf4>
-    eb6c:	189b      	adds	r3, r3, r2
-    eb6e:	3b08      	subs	r3, #8
-    eb70:	1c29      	adds	r1, r5, #0
-    eb72:	1c20      	adds	r0, r4, #0
-    eb74:	681a      	ldr	r2, [r3, #0]
-    eb76:	685b      	ldr	r3, [r3, #4]
-    eb78:	f006 f88c 	bl	14c94 <____muldf3_from_thumb>
-    eb7c:	901b      	str	r0, [sp, #108]
-    eb7e:	911c      	str	r1, [sp, #112]
-    eb80:	9d03      	ldr	r5, [sp, #12]
-    eb82:	9e04      	ldr	r6, [sp, #16]
-    eb84:	2700      	movs	r7, #0
-    eb86:	1c31      	adds	r1, r6, #0
-    eb88:	1c28      	adds	r0, r5, #0
-    eb8a:	f006 f887 	bl	14c9c <____fixdfsi_from_thumb>
-    eb8e:	1c04      	adds	r4, r0, #0
-    eb90:	f006 f874 	bl	14c7c <____floatsidf_from_thumb>
-    eb94:	1c02      	adds	r2, r0, #0
-    eb96:	1c0b      	adds	r3, r1, #0
-    eb98:	1c28      	adds	r0, r5, #0
-    eb9a:	1c31      	adds	r1, r6, #0
-    eb9c:	f006 f876 	bl	14c8c <____subdf3_from_thumb>
-    eba0:	1c05      	adds	r5, r0, #0
-    eba2:	981a      	ldr	r0, [sp, #104]
-    eba4:	3430      	adds	r4, #48
-    eba6:	543c      	strb	r4, [r7, r0]
-    eba8:	1c0e      	adds	r6, r1, #0
-    ebaa:	9921      	ldr	r1, [sp, #132]
-    ebac:	3701      	adds	r7, #1
-    ebae:	428f      	cmp	r7, r1
-    ebb0:	d123      	bne.n	ebfa <.text+0xebfa>
-    ebb2:	4a6c      	ldr	r2, [pc, #432]	(ed64 <.text+0xed64>)
-    ebb4:	4b6c      	ldr	r3, [pc, #432]	(ed68 <.text+0xed68>)
-    ebb6:	19c7      	adds	r7, r0, r7
-    ebb8:	981b      	ldr	r0, [sp, #108]
-    ebba:	991c      	ldr	r1, [sp, #112]
-    ebbc:	f006 f862 	bl	14c84 <____adddf3_from_thumb>
-    ebc0:	1c02      	adds	r2, r0, #0
-    ebc2:	1c0b      	adds	r3, r1, #0
-    ebc4:	1c28      	adds	r0, r5, #0
-    ebc6:	1c31      	adds	r1, r6, #0
-    ebc8:	f006 f870 	bl	14cac <____gtdf2_from_thumb>
-    ebcc:	2800      	cmp	r0, #0
-    ebce:	dd00      	ble.n	ebd2 <.text+0xebd2>
-    ebd0:	e091      	b.n	ecf6 <.text+0xecf6>
-    ebd2:	9a1b      	ldr	r2, [sp, #108]
-    ebd4:	9b1c      	ldr	r3, [sp, #112]
-    ebd6:	4863      	ldr	r0, [pc, #396]	(ed64 <.text+0xed64>)
-    ebd8:	4963      	ldr	r1, [pc, #396]	(ed68 <.text+0xed68>)
-    ebda:	f006 f857 	bl	14c8c <____subdf3_from_thumb>
-    ebde:	1c02      	adds	r2, r0, #0
-    ebe0:	1c0b      	adds	r3, r1, #0
-    ebe2:	1c28      	adds	r0, r5, #0
-    ebe4:	1c31      	adds	r1, r6, #0
-    ebe6:	f006 f83d 	bl	14c64 <____ltdf2_from_thumb>
-    ebea:	2800      	cmp	r0, #0
-    ebec:	da0e      	bge.n	ec0c <.text+0xec0c>
-    ebee:	3f01      	subs	r7, #1
-    ebf0:	783b      	ldrb	r3, [r7, #0]
-    ebf2:	2b30      	cmp	r3, #48
-    ebf4:	d0fb      	beq.n	ebee <.text+0xebee>
-    ebf6:	3701      	adds	r7, #1
-    ebf8:	e086      	b.n	ed08 <.text+0xed08>
-    ebfa:	1c28      	adds	r0, r5, #0
-    ebfc:	1c31      	adds	r1, r6, #0
-    ebfe:	4a51      	ldr	r2, [pc, #324]	(ed44 <.text+0xed44>)
-    ec00:	4b51      	ldr	r3, [pc, #324]	(ed48 <.text+0xed48>)
-    ec02:	f006 f847 	bl	14c94 <____muldf3_from_thumb>
-    ec06:	1c05      	adds	r5, r0, #0
-    ec08:	1c0e      	adds	r6, r1, #0
-    ec0a:	e7bc      	b.n	eb86 <.text+0xeb86>
-    ec0c:	9b05      	ldr	r3, [sp, #20]
-    ec0e:	9c06      	ldr	r4, [sp, #24]
-    ec10:	9303      	str	r3, [sp, #12]
-    ec12:	9404      	str	r4, [sp, #16]
-    ec14:	9b23      	ldr	r3, [sp, #140]
-    ec16:	2b00      	cmp	r3, #0
-    ec18:	da00      	bge.n	ec1c <.text+0xec1c>
-    ec1a:	e088      	b.n	ed2e <.text+0xed2e>
-    ec1c:	9c0e      	ldr	r4, [sp, #56]
-    ec1e:	2c0e      	cmp	r4, #14
-    ec20:	dd00      	ble.n	ec24 <.text+0xec24>
-    ec22:	e084      	b.n	ed2e <.text+0xed2e>
-    ec24:	4a4e      	ldr	r2, [pc, #312]	(ed60 <.text+0xed60>)
-    ec26:	00e3      	lsls	r3, r4, #3
-    ec28:	189b      	adds	r3, r3, r2
-    ec2a:	6818      	ldr	r0, [r3, #0]
-    ec2c:	6859      	ldr	r1, [r3, #4]
-    ec2e:	901d      	str	r0, [sp, #116]
-    ec30:	911e      	str	r1, [sp, #120]
-    ec32:	9929      	ldr	r1, [sp, #164]
-    ec34:	2900      	cmp	r1, #0
-    ec36:	da02      	bge.n	ec3e <.text+0xec3e>
-    ec38:	9a0c      	ldr	r2, [sp, #48]
-    ec3a:	2a00      	cmp	r2, #0
-    ec3c:	dd03      	ble.n	ec46 <.text+0xec46>
-    ec3e:	9c03      	ldr	r4, [sp, #12]
-    ec40:	9d04      	ldr	r5, [sp, #16]
-    ec42:	9f1a      	ldr	r7, [sp, #104]
-    ec44:	e011      	b.n	ec6a <.text+0xec6a>
-    ec46:	9b0c      	ldr	r3, [sp, #48]
-    ec48:	2b00      	cmp	r3, #0
-    ec4a:	d000      	beq.n	ec4e <.text+0xec4e>
-    ec4c:	e191      	b.n	ef72 <.text+0xef72>
-    ec4e:	4a42      	ldr	r2, [pc, #264]	(ed58 <.text+0xed58>)
-    ec50:	4b42      	ldr	r3, [pc, #264]	(ed5c <.text+0xed5c>)
-    ec52:	981d      	ldr	r0, [sp, #116]
-    ec54:	991e      	ldr	r1, [sp, #120]
-    ec56:	f006 f81d 	bl	14c94 <____muldf3_from_thumb>
-    ec5a:	9a03      	ldr	r2, [sp, #12]
-    ec5c:	9b04      	ldr	r3, [sp, #16]
-    ec5e:	f006 f829 	bl	14cb4 <____gedf2_from_thumb>
-    ec62:	2800      	cmp	r0, #0
-    ec64:	db00      	blt.n	ec68 <.text+0xec68>
-    ec66:	e184      	b.n	ef72 <.text+0xef72>
-    ec68:	e18d      	b.n	ef86 <.text+0xef86>
-    ec6a:	9a1d      	ldr	r2, [sp, #116]
-    ec6c:	9b1e      	ldr	r3, [sp, #120]
-    ec6e:	1c20      	adds	r0, r4, #0
-    ec70:	1c29      	adds	r1, r5, #0
-    ec72:	f006 f817 	bl	14ca4 <____divdf3_from_thumb>
-    ec76:	f006 f811 	bl	14c9c <____fixdfsi_from_thumb>
-    ec7a:	1c06      	adds	r6, r0, #0
-    ec7c:	f005 fffe 	bl	14c7c <____floatsidf_from_thumb>
-    ec80:	9a1d      	ldr	r2, [sp, #116]
-    ec82:	9b1e      	ldr	r3, [sp, #120]
-    ec84:	f006 f806 	bl	14c94 <____muldf3_from_thumb>
-    ec88:	1c0b      	adds	r3, r1, #0
-    ec8a:	1c02      	adds	r2, r0, #0
-    ec8c:	1c29      	adds	r1, r5, #0
-    ec8e:	1c20      	adds	r0, r4, #0
-    ec90:	f005 fffc 	bl	14c8c <____subdf3_from_thumb>
-    ec94:	1c33      	adds	r3, r6, #0
-    ec96:	3330      	adds	r3, #48
-    ec98:	703b      	strb	r3, [r7, #0]
-    ec9a:	1c04      	adds	r4, r0, #0
-    ec9c:	1c0d      	adds	r5, r1, #0
-    ec9e:	981a      	ldr	r0, [sp, #104]
-    eca0:	990c      	ldr	r1, [sp, #48]
-    eca2:	3701      	adds	r7, #1
-    eca4:	1843      	adds	r3, r0, r1
-    eca6:	429f      	cmp	r7, r3
-    eca8:	d131      	bne.n	ed0e <.text+0xed0e>
-    ecaa:	1c22      	adds	r2, r4, #0
-    ecac:	1c2b      	adds	r3, r5, #0
-    ecae:	1c20      	adds	r0, r4, #0
-    ecb0:	1c29      	adds	r1, r5, #0
-    ecb2:	f005 ffe7 	bl	14c84 <____adddf3_from_thumb>
-    ecb6:	9a1d      	ldr	r2, [sp, #116]
-    ecb8:	9b1e      	ldr	r3, [sp, #120]
-    ecba:	1c04      	adds	r4, r0, #0
-    ecbc:	1c0d      	adds	r5, r1, #0
-    ecbe:	f005 fff5 	bl	14cac <____gtdf2_from_thumb>
-    ecc2:	2800      	cmp	r0, #0
-    ecc4:	dc15      	bgt.n	ecf2 <.text+0xecf2>
-    ecc6:	1c20      	adds	r0, r4, #0
-    ecc8:	1c29      	adds	r1, r5, #0
-    ecca:	9a1d      	ldr	r2, [sp, #116]
-    eccc:	9b1e      	ldr	r3, [sp, #120]
-    ecce:	f005 ffd1 	bl	14c74 <____eqdf2_from_thumb>
-    ecd2:	2800      	cmp	r0, #0
-    ecd4:	d000      	beq.n	ecd8 <.text+0xecd8>
-    ecd6:	e277      	b.n	f1c8 <.text+0xf1c8>
-    ecd8:	07f2      	lsls	r2, r6, #31
-    ecda:	d40a      	bmi.n	ecf2 <.text+0xecf2>
-    ecdc:	e274      	b.n	f1c8 <.text+0xf1c8>
-    ecde:	9b1a      	ldr	r3, [sp, #104]
-    ece0:	429a      	cmp	r2, r3
-    ece2:	d109      	bne.n	ecf8 <.text+0xecf8>
-    ece4:	9c20      	ldr	r4, [sp, #128]
-    ece6:	981a      	ldr	r0, [sp, #104]
-    ece8:	3401      	adds	r4, #1
-    ecea:	2330      	movs	r3, #48
-    ecec:	9420      	str	r4, [sp, #128]
-    ecee:	7003      	strb	r3, [r0, #0]
-    ecf0:	e006      	b.n	ed00 <.text+0xed00>
-    ecf2:	990e      	ldr	r1, [sp, #56]
-    ecf4:	9120      	str	r1, [sp, #128]
-    ecf6:	1c3a      	adds	r2, r7, #0
-    ecf8:	3a01      	subs	r2, #1
-    ecfa:	7813      	ldrb	r3, [r2, #0]
-    ecfc:	2b39      	cmp	r3, #57
-    ecfe:	d0ee      	beq.n	ecde <.text+0xecde>
-    ed00:	7813      	ldrb	r3, [r2, #0]
-    ed02:	3301      	adds	r3, #1
-    ed04:	7013      	strb	r3, [r2, #0]
-    ed06:	1c57      	adds	r7, r2, #1
-    ed08:	9a20      	ldr	r2, [sp, #128]
-    ed0a:	920e      	str	r2, [sp, #56]
-    ed0c:	e25c      	b.n	f1c8 <.text+0xf1c8>
-    ed0e:	1c20      	adds	r0, r4, #0
-    ed10:	1c29      	adds	r1, r5, #0
-    ed12:	4a0c      	ldr	r2, [pc, #48]	(ed44 <.text+0xed44>)
-    ed14:	4b0c      	ldr	r3, [pc, #48]	(ed48 <.text+0xed48>)
-    ed16:	f005 ffbd 	bl	14c94 <____muldf3_from_thumb>
-    ed1a:	4a14      	ldr	r2, [pc, #80]	(ed6c <.text+0xed6c>)
-    ed1c:	4b14      	ldr	r3, [pc, #80]	(ed70 <.text+0xed70>)
-    ed1e:	1c04      	adds	r4, r0, #0
-    ed20:	1c0d      	adds	r5, r1, #0
-    ed22:	f005 ffa3 	bl	14c6c <____nedf2_from_thumb>
-    ed26:	2800      	cmp	r0, #0
-    ed28:	d100      	bne.n	ed2c <.text+0xed2c>
-    ed2a:	e24d      	b.n	f1c8 <.text+0xf1c8>
-    ed2c:	e79d      	b.n	ec6a <.text+0xec6a>
-    ed2e:	9c10      	ldr	r4, [sp, #64]
-    ed30:	2c00      	cmp	r4, #0
-    ed32:	d11f      	bne.n	ed74 <.text+0xed74>
-    ed34:	9e09      	ldr	r6, [sp, #36]
-    ed36:	9d0a      	ldr	r5, [sp, #40]
-    ed38:	2000      	movs	r0, #0
-    ed3a:	e04c      	b.n	edd6 <.text+0xedd6>
-    ed3c:	0000      	lsls	r0, r0, #0
-    ed3e:	3ff0      	subs	r7, #240
-    ed40:	0000      	lsls	r0, r0, #0
-    ed42:	0000      	lsls	r0, r0, #0
-    ed44:	0000      	lsls	r0, r0, #0
-    ed46:	4024      	ands	r4, r4
-    ed48:	0000      	lsls	r0, r0, #0
-    ed4a:	0000      	lsls	r0, r0, #0
-    ed4c:	0000      	lsls	r0, r0, #0
-    ed4e:	401c      	ands	r4, r3
-    ed50:	0000      	lsls	r0, r0, #0
-    ed52:	0000      	lsls	r0, r0, #0
-    ed54:	0000      	lsls	r0, r0, #0
-    ed56:	fcc0 0000 	stc2l	0, cr0, [r0], {0}
-    ed5a:	4014      	ands	r4, r2
-    ed5c:	0000      	lsls	r0, r0, #0
-    ed5e:	0000      	lsls	r0, r0, #0
-    ed60:	503c      	str	r4, [r7, r0]
-    ed62:	0001      	lsls	r1, r0, #0
-    ed64:	0000      	lsls	r0, r0, #0
-    ed66:	3fe0      	subs	r7, #224
-	...
-    ed74:	9901      	ldr	r1, [sp, #4]
-    ed76:	2901      	cmp	r1, #1
-    ed78:	dc0b      	bgt.n	ed92 <.text+0xed92>
-    ed7a:	9a13      	ldr	r2, [sp, #76]
-    ed7c:	2a00      	cmp	r2, #0
-    ed7e:	d002      	beq.n	ed86 <.text+0xed86>
-    ed80:	4cc6      	ldr	r4, [pc, #792]	(f09c <.text+0xf09c>)
-    ed82:	191b      	adds	r3, r3, r4
-    ed84:	e002      	b.n	ed8c <.text+0xed8c>
-    ed86:	9a22      	ldr	r2, [sp, #136]
-    ed88:	2336      	movs	r3, #54
-    ed8a:	1a9b      	subs	r3, r3, r2
-    ed8c:	9e09      	ldr	r6, [sp, #36]
-    ed8e:	9d0a      	ldr	r5, [sp, #40]
-    ed90:	e017      	b.n	edc2 <.text+0xedc2>
-    ed92:	9a0c      	ldr	r2, [sp, #48]
-    ed94:	980a      	ldr	r0, [sp, #40]
-    ed96:	3a01      	subs	r2, #1
-    ed98:	4290      	cmp	r0, r2
-    ed9a:	db01      	blt.n	eda0 <.text+0xeda0>
-    ed9c:	1a85      	subs	r5, r0, r2
-    ed9e:	e007      	b.n	edb0 <.text+0xedb0>
-    eda0:	990a      	ldr	r1, [sp, #40]
-    eda2:	1a53      	subs	r3, r2, r1
-    eda4:	9a12      	ldr	r2, [sp, #72]
-    eda6:	18c9      	adds	r1, r1, r3
-    eda8:	18d2      	adds	r2, r2, r3
-    edaa:	9212      	str	r2, [sp, #72]
-    edac:	910a      	str	r1, [sp, #40]
-    edae:	2500      	movs	r5, #0
-    edb0:	9b0c      	ldr	r3, [sp, #48]
-    edb2:	2b00      	cmp	r3, #0
-    edb4:	db01      	blt.n	edba <.text+0xedba>
-    edb6:	9e09      	ldr	r6, [sp, #36]
-    edb8:	e003      	b.n	edc2 <.text+0xedc2>
-    edba:	9c09      	ldr	r4, [sp, #36]
-    edbc:	980c      	ldr	r0, [sp, #48]
-    edbe:	2300      	movs	r3, #0
-    edc0:	1a26      	subs	r6, r4, r0
-    edc2:	9909      	ldr	r1, [sp, #36]
-    edc4:	9a11      	ldr	r2, [sp, #68]
-    edc6:	18c9      	adds	r1, r1, r3
-    edc8:	9109      	str	r1, [sp, #36]
-    edca:	18d2      	adds	r2, r2, r3
-    edcc:	9802      	ldr	r0, [sp, #8]
-    edce:	2101      	movs	r1, #1
-    edd0:	9211      	str	r2, [sp, #68]
-    edd2:	f001 fc4d 	bl	10670 <_i2b>
-    edd6:	9016      	str	r0, [sp, #88]
-    edd8:	2e00      	cmp	r6, #0
-    edda:	dd0c      	ble.n	edf6 <.text+0xedf6>
-    eddc:	9b11      	ldr	r3, [sp, #68]
-    edde:	2b00      	cmp	r3, #0
-    ede0:	dd09      	ble.n	edf6 <.text+0xedf6>
-    ede2:	42b3      	cmp	r3, r6
-    ede4:	dd00      	ble.n	ede8 <.text+0xede8>
-    ede6:	1c33      	adds	r3, r6, #0
-    ede8:	9c09      	ldr	r4, [sp, #36]
-    edea:	9811      	ldr	r0, [sp, #68]
-    edec:	1ae4      	subs	r4, r4, r3
-    edee:	1ac0      	subs	r0, r0, r3
-    edf0:	9409      	str	r4, [sp, #36]
-    edf2:	9011      	str	r0, [sp, #68]
-    edf4:	1af6      	subs	r6, r6, r3
-    edf6:	990a      	ldr	r1, [sp, #40]
-    edf8:	2900      	cmp	r1, #0
-    edfa:	dd22      	ble.n	ee42 <.text+0xee42>
-    edfc:	9a10      	ldr	r2, [sp, #64]
-    edfe:	2a00      	cmp	r2, #0
-    ee00:	d019      	beq.n	ee36 <.text+0xee36>
-    ee02:	2d00      	cmp	r5, #0
-    ee04:	dd10      	ble.n	ee28 <.text+0xee28>
-    ee06:	9916      	ldr	r1, [sp, #88]
-    ee08:	1c2a      	adds	r2, r5, #0
-    ee0a:	9802      	ldr	r0, [sp, #8]
-    ee0c:	f001 fc82 	bl	10714 <_pow5mult>
-    ee10:	9016      	str	r0, [sp, #88]
-    ee12:	9916      	ldr	r1, [sp, #88]
-    ee14:	9a14      	ldr	r2, [sp, #80]
-    ee16:	9802      	ldr	r0, [sp, #8]
-    ee18:	f001 fb94 	bl	10544 <_multiply>
-    ee1c:	9914      	ldr	r1, [sp, #80]
-    ee1e:	1c04      	adds	r4, r0, #0
-    ee20:	9802      	ldr	r0, [sp, #8]
-    ee22:	f001 f8e5 	bl	fff0 <_Bfree>
-    ee26:	9414      	str	r4, [sp, #80]
-    ee28:	9b0a      	ldr	r3, [sp, #40]
-    ee2a:	1b5a      	subs	r2, r3, r5
-    ee2c:	2a00      	cmp	r2, #0
-    ee2e:	d008      	beq.n	ee42 <.text+0xee42>
-    ee30:	9802      	ldr	r0, [sp, #8]
-    ee32:	9914      	ldr	r1, [sp, #80]
-    ee34:	e002      	b.n	ee3c <.text+0xee3c>
-    ee36:	9802      	ldr	r0, [sp, #8]
-    ee38:	9914      	ldr	r1, [sp, #80]
-    ee3a:	9a0a      	ldr	r2, [sp, #40]
-    ee3c:	f001 fc6a 	bl	10714 <_pow5mult>
-    ee40:	9014      	str	r0, [sp, #80]
-    ee42:	9802      	ldr	r0, [sp, #8]
-    ee44:	2101      	movs	r1, #1
-    ee46:	f001 fc13 	bl	10670 <_i2b>
-    ee4a:	9c12      	ldr	r4, [sp, #72]
-    ee4c:	9017      	str	r0, [sp, #92]
-    ee4e:	2c00      	cmp	r4, #0
-    ee50:	dd05      	ble.n	ee5e <.text+0xee5e>
-    ee52:	9802      	ldr	r0, [sp, #8]
-    ee54:	9917      	ldr	r1, [sp, #92]
-    ee56:	1c22      	adds	r2, r4, #0
-    ee58:	f001 fc5c 	bl	10714 <_pow5mult>
-    ee5c:	9017      	str	r0, [sp, #92]
-    ee5e:	9801      	ldr	r0, [sp, #4]
-    ee60:	2801      	cmp	r0, #1
-    ee62:	dc11      	bgt.n	ee88 <.text+0xee88>
-    ee64:	9904      	ldr	r1, [sp, #16]
-    ee66:	2900      	cmp	r1, #0
-    ee68:	d10e      	bne.n	ee88 <.text+0xee88>
-    ee6a:	9a03      	ldr	r2, [sp, #12]
-    ee6c:	4b8c      	ldr	r3, [pc, #560]	(f0a0 <.text+0xf0a0>)
-    ee6e:	421a      	tst	r2, r3
-    ee70:	d10a      	bne.n	ee88 <.text+0xee88>
-    ee72:	4b8c      	ldr	r3, [pc, #560]	(f0a4 <.text+0xf0a4>)
-    ee74:	421a      	tst	r2, r3
-    ee76:	d007      	beq.n	ee88 <.text+0xee88>
-    ee78:	9a09      	ldr	r2, [sp, #36]
-    ee7a:	9b11      	ldr	r3, [sp, #68]
-    ee7c:	3201      	adds	r2, #1
-    ee7e:	3301      	adds	r3, #1
-    ee80:	2401      	movs	r4, #1
-    ee82:	9209      	str	r2, [sp, #36]
-    ee84:	9311      	str	r3, [sp, #68]
-    ee86:	e000      	b.n	ee8a <.text+0xee8a>
-    ee88:	2400      	movs	r4, #0
-    ee8a:	9812      	ldr	r0, [sp, #72]
-    ee8c:	2800      	cmp	r0, #0
-    ee8e:	d101      	bne.n	ee94 <.text+0xee94>
-    ee90:	2201      	movs	r2, #1
-    ee92:	e008      	b.n	eea6 <.text+0xeea6>
-    ee94:	9917      	ldr	r1, [sp, #92]
-    ee96:	690b      	ldr	r3, [r1, #16]
-    ee98:	009b      	lsls	r3, r3, #2
-    ee9a:	185b      	adds	r3, r3, r1
-    ee9c:	6918      	ldr	r0, [r3, #16]
-    ee9e:	f001 f8b3 	bl	10008 <_hi0bits>
-    eea2:	2320      	movs	r3, #32
-    eea4:	1a1a      	subs	r2, r3, r0
-    eea6:	9b11      	ldr	r3, [sp, #68]
-    eea8:	18d2      	adds	r2, r2, r3
-    eeaa:	231f      	movs	r3, #31
-    eeac:	401a      	ands	r2, r3
-    eeae:	d00e      	beq.n	eece <.text+0xeece>
-    eeb0:	2320      	movs	r3, #32
-    eeb2:	1a9a      	subs	r2, r3, r2
-    eeb4:	2a04      	cmp	r2, #4
-    eeb6:	dd08      	ble.n	eeca <.text+0xeeca>
-    eeb8:	9809      	ldr	r0, [sp, #36]
-    eeba:	9911      	ldr	r1, [sp, #68]
-    eebc:	1f13      	subs	r3, r2, #4
-    eebe:	18c0      	adds	r0, r0, r3
-    eec0:	18c9      	adds	r1, r1, r3
-    eec2:	18f6      	adds	r6, r6, r3
-    eec4:	9009      	str	r0, [sp, #36]
-    eec6:	9111      	str	r1, [sp, #68]
-    eec8:	e00a      	b.n	eee0 <.text+0xeee0>
-    eeca:	2a03      	cmp	r2, #3
-    eecc:	dc08      	bgt.n	eee0 <.text+0xeee0>
-    eece:	1c13      	adds	r3, r2, #0
-    eed0:	9811      	ldr	r0, [sp, #68]
-    eed2:	9a09      	ldr	r2, [sp, #36]
-    eed4:	331c      	adds	r3, #28
-    eed6:	18d2      	adds	r2, r2, r3
-    eed8:	18c0      	adds	r0, r0, r3
-    eeda:	9209      	str	r2, [sp, #36]
-    eedc:	9011      	str	r0, [sp, #68]
-    eede:	18f6      	adds	r6, r6, r3
-    eee0:	9909      	ldr	r1, [sp, #36]
-    eee2:	2900      	cmp	r1, #0
-    eee4:	dd05      	ble.n	eef2 <.text+0xeef2>
-    eee6:	9802      	ldr	r0, [sp, #8]
-    eee8:	9914      	ldr	r1, [sp, #80]
-    eeea:	9a09      	ldr	r2, [sp, #36]
-    eeec:	f001 fae2 	bl	104b4 <_lshift>
-    eef0:	9014      	str	r0, [sp, #80]
-    eef2:	9a11      	ldr	r2, [sp, #68]
-    eef4:	2a00      	cmp	r2, #0
-    eef6:	dd04      	ble.n	ef02 <.text+0xef02>
-    eef8:	9802      	ldr	r0, [sp, #8]
-    eefa:	9917      	ldr	r1, [sp, #92]
-    eefc:	f001 fada 	bl	104b4 <_lshift>
-    ef00:	9017      	str	r0, [sp, #92]
-    ef02:	9b0f      	ldr	r3, [sp, #60]
-    ef04:	2b00      	cmp	r3, #0
-    ef06:	d01e      	beq.n	ef46 <.text+0xef46>
-    ef08:	9814      	ldr	r0, [sp, #80]
-    ef0a:	9917      	ldr	r1, [sp, #92]
-    ef0c:	f001 f8d6 	bl	100bc <__mcmp>
-    ef10:	2800      	cmp	r0, #0
-    ef12:	da18      	bge.n	ef46 <.text+0xef46>
-    ef14:	980e      	ldr	r0, [sp, #56]
-    ef16:	3801      	subs	r0, #1
-    ef18:	900e      	str	r0, [sp, #56]
-    ef1a:	9914      	ldr	r1, [sp, #80]
-    ef1c:	9802      	ldr	r0, [sp, #8]
-    ef1e:	220a      	movs	r2, #10
-    ef20:	2300      	movs	r3, #0
-    ef22:	f001 fbb1 	bl	10688 <_multadd>
-    ef26:	9910      	ldr	r1, [sp, #64]
-    ef28:	9014      	str	r0, [sp, #80]
-    ef2a:	2900      	cmp	r1, #0
-    ef2c:	d102      	bne.n	ef34 <.text+0xef34>
-    ef2e:	9a0d      	ldr	r2, [sp, #52]
-    ef30:	920c      	str	r2, [sp, #48]
-    ef32:	e008      	b.n	ef46 <.text+0xef46>
-    ef34:	2300      	movs	r3, #0
-    ef36:	9802      	ldr	r0, [sp, #8]
-    ef38:	9916      	ldr	r1, [sp, #88]
-    ef3a:	220a      	movs	r2, #10
-    ef3c:	f001 fba4 	bl	10688 <_multadd>
-    ef40:	9b0d      	ldr	r3, [sp, #52]
-    ef42:	9016      	str	r0, [sp, #88]
-    ef44:	930c      	str	r3, [sp, #48]
-    ef46:	980c      	ldr	r0, [sp, #48]
-    ef48:	2800      	cmp	r0, #0
-    ef4a:	dc2a      	bgt.n	efa2 <.text+0xefa2>
-    ef4c:	9901      	ldr	r1, [sp, #4]
-    ef4e:	2902      	cmp	r1, #2
-    ef50:	dd27      	ble.n	efa2 <.text+0xefa2>
-    ef52:	2800      	cmp	r0, #0
-    ef54:	d110      	bne.n	ef78 <.text+0xef78>
-    ef56:	9917      	ldr	r1, [sp, #92]
-    ef58:	9802      	ldr	r0, [sp, #8]
-    ef5a:	2205      	movs	r2, #5
-    ef5c:	2300      	movs	r3, #0
-    ef5e:	f001 fb93 	bl	10688 <_multadd>
-    ef62:	9017      	str	r0, [sp, #92]
-    ef64:	9917      	ldr	r1, [sp, #92]
-    ef66:	9814      	ldr	r0, [sp, #80]
-    ef68:	f001 f8a8 	bl	100bc <__mcmp>
-    ef6c:	2800      	cmp	r0, #0
-    ef6e:	dc0d      	bgt.n	ef8c <.text+0xef8c>
-    ef70:	e002      	b.n	ef78 <.text+0xef78>
-    ef72:	2200      	movs	r2, #0
-    ef74:	9216      	str	r2, [sp, #88]
-    ef76:	9217      	str	r2, [sp, #92]
-    ef78:	9b29      	ldr	r3, [sp, #164]
-    ef7a:	9f1a      	ldr	r7, [sp, #104]
-    ef7c:	43db      	mvns	r3, r3
-    ef7e:	2400      	movs	r4, #0
-    ef80:	930e      	str	r3, [sp, #56]
-    ef82:	9415      	str	r4, [sp, #84]
-    ef84:	e10c      	b.n	f1a0 <.text+0xf1a0>
-    ef86:	2000      	movs	r0, #0
-    ef88:	9016      	str	r0, [sp, #88]
-    ef8a:	9017      	str	r0, [sp, #92]
-    ef8c:	991a      	ldr	r1, [sp, #104]
-    ef8e:	2331      	movs	r3, #49
-    ef90:	700b      	strb	r3, [r1, #0]
-    ef92:	9a0e      	ldr	r2, [sp, #56]
-    ef94:	1c0f      	adds	r7, r1, #0
-    ef96:	3201      	adds	r2, #1
-    ef98:	2300      	movs	r3, #0
-    ef9a:	3701      	adds	r7, #1
-    ef9c:	920e      	str	r2, [sp, #56]
-    ef9e:	9315      	str	r3, [sp, #84]
-    efa0:	e0fe      	b.n	f1a0 <.text+0xf1a0>
-    efa2:	9810      	ldr	r0, [sp, #64]
-    efa4:	2800      	cmp	r0, #0
-    efa6:	d100      	bne.n	efaa <.text+0xefaa>
-    efa8:	e0b8      	b.n	f11c <.text+0xf11c>
-    efaa:	2e00      	cmp	r6, #0
-    efac:	dd05      	ble.n	efba <.text+0xefba>
-    efae:	9802      	ldr	r0, [sp, #8]
-    efb0:	9916      	ldr	r1, [sp, #88]
-    efb2:	1c32      	adds	r2, r6, #0
-    efb4:	f001 fa7e 	bl	104b4 <_lshift>
-    efb8:	9016      	str	r0, [sp, #88]
-    efba:	2c00      	cmp	r4, #0
-    efbc:	d101      	bne.n	efc2 <.text+0xefc2>
-    efbe:	9816      	ldr	r0, [sp, #88]
-    efc0:	e013      	b.n	efea <.text+0xefea>
-    efc2:	9a16      	ldr	r2, [sp, #88]
-    efc4:	9802      	ldr	r0, [sp, #8]
-    efc6:	6851      	ldr	r1, [r2, #4]
-    efc8:	f001 f96c 	bl	102a4 <_Balloc>
-    efcc:	9b16      	ldr	r3, [sp, #88]
-    efce:	691a      	ldr	r2, [r3, #16]
-    efd0:	9916      	ldr	r1, [sp, #88]
-    efd2:	0092      	lsls	r2, r2, #2
-    efd4:	1c04      	adds	r4, r0, #0
-    efd6:	310c      	adds	r1, #12
-    efd8:	3208      	adds	r2, #8
-    efda:	300c      	adds	r0, #12
-    efdc:	f7fd fdaa 	bl	cb34 <memcpy>
-    efe0:	9802      	ldr	r0, [sp, #8]
-    efe2:	1c21      	adds	r1, r4, #0
-    efe4:	2201      	movs	r2, #1
-    efe6:	f001 fa65 	bl	104b4 <_lshift>
-    efea:	9c04      	ldr	r4, [sp, #16]
-    efec:	9916      	ldr	r1, [sp, #88]
-    efee:	2301      	movs	r3, #1
-    eff0:	401c      	ands	r4, r3
-    eff2:	9408      	str	r4, [sp, #32]
-    eff4:	9115      	str	r1, [sp, #84]
-    eff6:	9016      	str	r0, [sp, #88]
-    eff8:	9c1a      	ldr	r4, [sp, #104]
-    effa:	9917      	ldr	r1, [sp, #92]
-    effc:	9814      	ldr	r0, [sp, #80]
-    effe:	f7ff fa65 	bl	e4cc <quorem>
-    f002:	9915      	ldr	r1, [sp, #84]
-    f004:	9007      	str	r0, [sp, #28]
-    f006:	1c05      	adds	r5, r0, #0
-    f008:	9814      	ldr	r0, [sp, #80]
-    f00a:	f001 f857 	bl	100bc <__mcmp>
-    f00e:	9917      	ldr	r1, [sp, #92]
-    f010:	901f      	str	r0, [sp, #124]
-    f012:	9a16      	ldr	r2, [sp, #88]
-    f014:	9802      	ldr	r0, [sp, #8]
-    f016:	f001 f9dd 	bl	103d4 <__mdiff>
-    f01a:	68c3      	ldr	r3, [r0, #12]
-    f01c:	3530      	adds	r5, #48
-    f01e:	1c06      	adds	r6, r0, #0
-    f020:	2b00      	cmp	r3, #0
-    f022:	d000      	beq.n	f026 <.text+0xf026>
-    f024:	e0e0      	b.n	f1e8 <.text+0xf1e8>
-    f026:	1c31      	adds	r1, r6, #0
-    f028:	9814      	ldr	r0, [sp, #80]
-    f02a:	f001 f847 	bl	100bc <__mcmp>
-    f02e:	1c31      	adds	r1, r6, #0
-    f030:	1c07      	adds	r7, r0, #0
-    f032:	9802      	ldr	r0, [sp, #8]
-    f034:	f000 ffdc 	bl	fff0 <_Bfree>
-    f038:	2f00      	cmp	r7, #0
-    f03a:	d10d      	bne.n	f058 <.text+0xf058>
-    f03c:	9a01      	ldr	r2, [sp, #4]
-    f03e:	2a00      	cmp	r2, #0
-    f040:	d10a      	bne.n	f058 <.text+0xf058>
-    f042:	9b08      	ldr	r3, [sp, #32]
-    f044:	2b00      	cmp	r3, #0
-    f046:	d107      	bne.n	f058 <.text+0xf058>
-    f048:	2d39      	cmp	r5, #57
-    f04a:	d031      	beq.n	f0b0 <.text+0xf0b0>
-    f04c:	981f      	ldr	r0, [sp, #124]
-    f04e:	2800      	cmp	r0, #0
-    f050:	dd21      	ble.n	f096 <.text+0xf096>
-    f052:	9d07      	ldr	r5, [sp, #28]
-    f054:	3531      	adds	r5, #49
-    f056:	e01e      	b.n	f096 <.text+0xf096>
-    f058:	991f      	ldr	r1, [sp, #124]
-    f05a:	2900      	cmp	r1, #0
-    f05c:	db07      	blt.n	f06e <.text+0xf06e>
-    f05e:	2900      	cmp	r1, #0
-    f060:	d122      	bne.n	f0a8 <.text+0xf0a8>
-    f062:	9a01      	ldr	r2, [sp, #4]
-    f064:	2a00      	cmp	r2, #0
-    f066:	d11f      	bne.n	f0a8 <.text+0xf0a8>
-    f068:	9b08      	ldr	r3, [sp, #32]
-    f06a:	2b00      	cmp	r3, #0
-    f06c:	d11c      	bne.n	f0a8 <.text+0xf0a8>
-    f06e:	2f00      	cmp	r7, #0
-    f070:	dd11      	ble.n	f096 <.text+0xf096>
-    f072:	9914      	ldr	r1, [sp, #80]
-    f074:	9802      	ldr	r0, [sp, #8]
-    f076:	2201      	movs	r2, #1
-    f078:	f001 fa1c 	bl	104b4 <_lshift>
-    f07c:	9917      	ldr	r1, [sp, #92]
-    f07e:	9014      	str	r0, [sp, #80]
-    f080:	f001 f81c 	bl	100bc <__mcmp>
-    f084:	2800      	cmp	r0, #0
-    f086:	dc03      	bgt.n	f090 <.text+0xf090>
-    f088:	2800      	cmp	r0, #0
-    f08a:	d104      	bne.n	f096 <.text+0xf096>
-    f08c:	07e8      	lsls	r0, r5, #31
-    f08e:	d502      	bpl.n	f096 <.text+0xf096>
-    f090:	3501      	adds	r5, #1
-    f092:	2d3a      	cmp	r5, #58
-    f094:	d00c      	beq.n	f0b0 <.text+0xf0b0>
-    f096:	7025      	strb	r5, [r4, #0]
-    f098:	e081      	b.n	f19e <.text+0xf19e>
-    f09a:	0000      	lsls	r0, r0, #0
-    f09c:	0433      	lsls	r3, r6, #16
-    f09e:	0000      	lsls	r0, r0, #0
-    f0a0:	ffff 000f 	vaddl.u<illegal width 64>	q8, d15, d15
-    f0a4:	0000      	lsls	r0, r0, #0
-    f0a6:	7ff0      	ldrb	r0, [r6, #31]
-    f0a8:	2f00      	cmp	r7, #0
-    f0aa:	dd08      	ble.n	f0be <.text+0xf0be>
-    f0ac:	2d39      	cmp	r5, #57
-    f0ae:	d103      	bne.n	f0b8 <.text+0xf0b8>
-    f0b0:	2339      	movs	r3, #57
-    f0b2:	7023      	strb	r3, [r4, #0]
-    f0b4:	3401      	adds	r4, #1
-    f0b6:	e062      	b.n	f17e <.text+0xf17e>
-    f0b8:	1c6b      	adds	r3, r5, #1
-    f0ba:	7023      	strb	r3, [r4, #0]
-    f0bc:	e06f      	b.n	f19e <.text+0xf19e>
-    f0be:	7025      	strb	r5, [r4, #0]
-    f0c0:	991a      	ldr	r1, [sp, #104]
-    f0c2:	9a0c      	ldr	r2, [sp, #48]
-    f0c4:	3401      	adds	r4, #1
-    f0c6:	188b      	adds	r3, r1, r2
-    f0c8:	429c      	cmp	r4, r3
-    f0ca:	d03c      	beq.n	f146 <.text+0xf146>
-    f0cc:	2300      	movs	r3, #0
-    f0ce:	9802      	ldr	r0, [sp, #8]
-    f0d0:	9914      	ldr	r1, [sp, #80]
-    f0d2:	220a      	movs	r2, #10
-    f0d4:	f001 fad8 	bl	10688 <_multadd>
-    f0d8:	9b15      	ldr	r3, [sp, #84]
-    f0da:	9014      	str	r0, [sp, #80]
-    f0dc:	9816      	ldr	r0, [sp, #88]
-    f0de:	4283      	cmp	r3, r0
-    f0e0:	d108      	bne.n	f0f4 <.text+0xf0f4>
-    f0e2:	9802      	ldr	r0, [sp, #8]
-    f0e4:	9916      	ldr	r1, [sp, #88]
-    f0e6:	220a      	movs	r2, #10
-    f0e8:	2300      	movs	r3, #0
-    f0ea:	f001 facd 	bl	10688 <_multadd>
-    f0ee:	9016      	str	r0, [sp, #88]
-    f0f0:	9015      	str	r0, [sp, #84]
-    f0f2:	e782      	b.n	effa <.text+0xeffa>
-    f0f4:	9915      	ldr	r1, [sp, #84]
-    f0f6:	220a      	movs	r2, #10
-    f0f8:	2300      	movs	r3, #0
-    f0fa:	9802      	ldr	r0, [sp, #8]
-    f0fc:	f001 fac4 	bl	10688 <_multadd>
-    f100:	9916      	ldr	r1, [sp, #88]
-    f102:	9015      	str	r0, [sp, #84]
-    f104:	220a      	movs	r2, #10
-    f106:	9802      	ldr	r0, [sp, #8]
-    f108:	2300      	movs	r3, #0
-    f10a:	f001 fabd 	bl	10688 <_multadd>
-    f10e:	9016      	str	r0, [sp, #88]
-    f110:	e773      	b.n	effa <.text+0xeffa>
-    f112:	991a      	ldr	r1, [sp, #104]
-    f114:	2200      	movs	r2, #0
-    f116:	190c      	adds	r4, r1, r4
-    f118:	9215      	str	r2, [sp, #84]
-    f11a:	e014      	b.n	f146 <.text+0xf146>
-    f11c:	2400      	movs	r4, #0
-    f11e:	9814      	ldr	r0, [sp, #80]
-    f120:	9917      	ldr	r1, [sp, #92]
-    f122:	f7ff f9d3 	bl	e4cc <quorem>
-    f126:	9b1a      	ldr	r3, [sp, #104]
-    f128:	1c05      	adds	r5, r0, #0
-    f12a:	3530      	adds	r5, #48
-    f12c:	54e5      	strb	r5, [r4, r3]
-    f12e:	980c      	ldr	r0, [sp, #48]
-    f130:	3401      	adds	r4, #1
-    f132:	4284      	cmp	r4, r0
-    f134:	daed      	bge.n	f112 <.text+0xf112>
-    f136:	9802      	ldr	r0, [sp, #8]
-    f138:	9914      	ldr	r1, [sp, #80]
-    f13a:	220a      	movs	r2, #10
-    f13c:	2300      	movs	r3, #0
-    f13e:	f001 faa3 	bl	10688 <_multadd>
-    f142:	9014      	str	r0, [sp, #80]
-    f144:	e7eb      	b.n	f11e <.text+0xf11e>
-    f146:	9914      	ldr	r1, [sp, #80]
-    f148:	9802      	ldr	r0, [sp, #8]
-    f14a:	2201      	movs	r2, #1
-    f14c:	f001 f9b2 	bl	104b4 <_lshift>
-    f150:	9917      	ldr	r1, [sp, #92]
-    f152:	9014      	str	r0, [sp, #80]
-    f154:	f000 ffb2 	bl	100bc <__mcmp>
-    f158:	2800      	cmp	r0, #0
-    f15a:	dc10      	bgt.n	f17e <.text+0xf17e>
-    f15c:	2800      	cmp	r0, #0
-    f15e:	d11a      	bne.n	f196 <.text+0xf196>
-    f160:	07e9      	lsls	r1, r5, #31
-    f162:	d40c      	bmi.n	f17e <.text+0xf17e>
-    f164:	e017      	b.n	f196 <.text+0xf196>
-    f166:	9b1a      	ldr	r3, [sp, #104]
-    f168:	429a      	cmp	r2, r3
-    f16a:	d109      	bne.n	f180 <.text+0xf180>
-    f16c:	981a      	ldr	r0, [sp, #104]
-    f16e:	9c0e      	ldr	r4, [sp, #56]
-    f170:	1c07      	adds	r7, r0, #0
-    f172:	3401      	adds	r4, #1
-    f174:	2331      	movs	r3, #49
-    f176:	3701      	adds	r7, #1
-    f178:	940e      	str	r4, [sp, #56]
-    f17a:	7003      	strb	r3, [r0, #0]
-    f17c:	e010      	b.n	f1a0 <.text+0xf1a0>
-    f17e:	1c22      	adds	r2, r4, #0
-    f180:	3a01      	subs	r2, #1
-    f182:	7813      	ldrb	r3, [r2, #0]
-    f184:	2b39      	cmp	r3, #57
-    f186:	d0ee      	beq.n	f166 <.text+0xf166>
-    f188:	3301      	adds	r3, #1
-    f18a:	1c57      	adds	r7, r2, #1
-    f18c:	7013      	strb	r3, [r2, #0]
-    f18e:	e007      	b.n	f1a0 <.text+0xf1a0>
-    f190:	9920      	ldr	r1, [sp, #128]
-    f192:	910e      	str	r1, [sp, #56]
-    f194:	e018      	b.n	f1c8 <.text+0xf1c8>
-    f196:	3c01      	subs	r4, #1
-    f198:	7823      	ldrb	r3, [r4, #0]
-    f19a:	2b30      	cmp	r3, #48
-    f19c:	d0fb      	beq.n	f196 <.text+0xf196>
-    f19e:	1c67      	adds	r7, r4, #1
-    f1a0:	9802      	ldr	r0, [sp, #8]
-    f1a2:	9917      	ldr	r1, [sp, #92]
-    f1a4:	f000 ff24 	bl	fff0 <_Bfree>
-    f1a8:	9a16      	ldr	r2, [sp, #88]
-    f1aa:	2a00      	cmp	r2, #0
-    f1ac:	d00c      	beq.n	f1c8 <.text+0xf1c8>
-    f1ae:	9b15      	ldr	r3, [sp, #84]
-    f1b0:	2b00      	cmp	r3, #0
-    f1b2:	d005      	beq.n	f1c0 <.text+0xf1c0>
-    f1b4:	4293      	cmp	r3, r2
-    f1b6:	d003      	beq.n	f1c0 <.text+0xf1c0>
-    f1b8:	9802      	ldr	r0, [sp, #8]
-    f1ba:	1c19      	adds	r1, r3, #0
-    f1bc:	f000 ff18 	bl	fff0 <_Bfree>
-    f1c0:	9802      	ldr	r0, [sp, #8]
-    f1c2:	9916      	ldr	r1, [sp, #88]
-    f1c4:	f000 ff14 	bl	fff0 <_Bfree>
-    f1c8:	9802      	ldr	r0, [sp, #8]
-    f1ca:	9914      	ldr	r1, [sp, #80]
-    f1cc:	f000 ff10 	bl	fff0 <_Bfree>
-    f1d0:	2300      	movs	r3, #0
-    f1d2:	703b      	strb	r3, [r7, #0]
-    f1d4:	9b0e      	ldr	r3, [sp, #56]
-    f1d6:	9c2a      	ldr	r4, [sp, #168]
-    f1d8:	982c      	ldr	r0, [sp, #176]
-    f1da:	3301      	adds	r3, #1
-    f1dc:	6023      	str	r3, [r4, #0]
-    f1de:	2800      	cmp	r0, #0
-    f1e0:	d000      	beq.n	f1e4 <.text+0xf1e4>
-    f1e2:	6007      	str	r7, [r0, #0]
-    f1e4:	981a      	ldr	r0, [sp, #104]
-    f1e6:	e005      	b.n	f1f4 <.text+0xf1f4>
-    f1e8:	9802      	ldr	r0, [sp, #8]
-    f1ea:	1c31      	adds	r1, r6, #0
-    f1ec:	f000 ff00 	bl	fff0 <_Bfree>
-    f1f0:	2701      	movs	r7, #1
-    f1f2:	e731      	b.n	f058 <.text+0xf058>
-    f1f4:	b024      	add	sp, #144
-    f1f6:	bcf0      	pop	{r4, r5, r6, r7}
-    f1f8:	bc02      	pop	{r1}
-    f1fa:	4708      	bx	r1
-
-0000f1fc <fflush>:
-    f1fc:	b570      	push	{r4, r5, r6, lr}
-    f1fe:	1c04      	adds	r4, r0, #0
-    f200:	2800      	cmp	r0, #0
-    f202:	d105      	bne.n	f210 <fflush+0x14>
-    f204:	4b1b      	ldr	r3, [pc, #108]	(f274 <.text+0xf274>)
-    f206:	491c      	ldr	r1, [pc, #112]	(f278 <.text+0xf278>)
-    f208:	6818      	ldr	r0, [r3, #0]
-    f20a:	f000 fb93 	bl	f934 <_fwalk>
-    f20e:	e02e      	b.n	f26e <fflush+0x72>
-    f210:	4b1a      	ldr	r3, [pc, #104]	(f27c <.text+0xf27c>)
-    f212:	6818      	ldr	r0, [r3, #0]
-    f214:	2800      	cmp	r0, #0
-    f216:	d004      	beq.n	f222 <fflush+0x26>
-    f218:	6b83      	ldr	r3, [r0, #56]
-    f21a:	2b00      	cmp	r3, #0
-    f21c:	d101      	bne.n	f222 <fflush+0x26>
-    f21e:	f000 f84d 	bl	f2bc <__sinit>
-    f222:	230c      	movs	r3, #12
-    f224:	5ee1      	ldrsh	r1, [r4, r3]
-    f226:	070b      	lsls	r3, r1, #28
-    f228:	d520      	bpl.n	f26c <fflush+0x70>
-    f22a:	6926      	ldr	r6, [r4, #16]
-    f22c:	2e00      	cmp	r6, #0
-    f22e:	d01d      	beq.n	f26c <fflush+0x70>
-    f230:	2303      	movs	r3, #3
-    f232:	6822      	ldr	r2, [r4, #0]
-    f234:	6026      	str	r6, [r4, #0]
-    f236:	4219      	tst	r1, r3
-    f238:	d008      	beq.n	f24c <fflush+0x50>
-    f23a:	2300      	movs	r3, #0
-    f23c:	e007      	b.n	f24e <fflush+0x52>
-    f23e:	89a3      	ldrh	r3, [r4, #12]
-    f240:	2240      	movs	r2, #64
-    f242:	2001      	movs	r0, #1
-    f244:	4313      	orrs	r3, r2
-    f246:	4240      	negs	r0, r0
-    f248:	81a3      	strh	r3, [r4, #12]
-    f24a:	e010      	b.n	f26e <fflush+0x72>
-    f24c:	6963      	ldr	r3, [r4, #20]
-    f24e:	1b95      	subs	r5, r2, r6
-    f250:	60a3      	str	r3, [r4, #8]
-    f252:	e009      	b.n	f268 <fflush+0x6c>
-    f254:	69e0      	ldr	r0, [r4, #28]
-    f256:	6a63      	ldr	r3, [r4, #36]
-    f258:	1c31      	adds	r1, r6, #0
-    f25a:	1c2a      	adds	r2, r5, #0
-    f25c:	f000 f810 	bl	f280 <.text+0xf280>
-    f260:	2800      	cmp	r0, #0
-    f262:	ddec      	ble.n	f23e <fflush+0x42>
-    f264:	1836      	adds	r6, r6, r0
-    f266:	1a2d      	subs	r5, r5, r0
-    f268:	2d00      	cmp	r5, #0
-    f26a:	dcf3      	bgt.n	f254 <fflush+0x58>
-    f26c:	2000      	movs	r0, #0
-    f26e:	bc70      	pop	{r4, r5, r6}
-    f270:	bc02      	pop	{r1}
-    f272:	4708      	bx	r1
-    f274:	5004      	str	r4, [r0, r0]
-    f276:	0001      	lsls	r1, r0, #0
-    f278:	f1fd 0000 	undefined
-    f27c:	0020      	lsls	r0, r4, #0
-    f27e:	4000      	ands	r0, r0
-    f280:	4718      	bx	r3
-    f282:	46c0      	nop			(mov r8, r8)
-
-0000f284 <std>:
-    f284:	2300      	movs	r3, #0
-    f286:	6003      	str	r3, [r0, #0]
-    f288:	6043      	str	r3, [r0, #4]
-    f28a:	6083      	str	r3, [r0, #8]
-    f28c:	6103      	str	r3, [r0, #16]
-    f28e:	6143      	str	r3, [r0, #20]
-    f290:	6183      	str	r3, [r0, #24]
-    f292:	4b06      	ldr	r3, [pc, #24]	(f2ac <.text+0xf2ac>)
-    f294:	6203      	str	r3, [r0, #32]
-    f296:	4b06      	ldr	r3, [pc, #24]	(f2b0 <.text+0xf2b0>)
-    f298:	6243      	str	r3, [r0, #36]
-    f29a:	4b06      	ldr	r3, [pc, #24]	(f2b4 <.text+0xf2b4>)
-    f29c:	6283      	str	r3, [r0, #40]
-    f29e:	4b06      	ldr	r3, [pc, #24]	(f2b8 <.text+0xf2b8>)
-    f2a0:	8181      	strh	r1, [r0, #12]
-    f2a2:	81c2      	strh	r2, [r0, #14]
-    f2a4:	61c0      	str	r0, [r0, #28]
-    f2a6:	62c3      	str	r3, [r0, #44]
-    f2a8:	4770      	bx	lr
-    f2aa:	0000      	lsls	r0, r0, #0
-    f2ac:	0c15      	lsrs	r5, r2, #16
-    f2ae:	0001      	lsls	r1, r0, #0
-    f2b0:	0bd1      	lsrs	r1, r2, #15
-    f2b2:	0001      	lsls	r1, r0, #0
-    f2b4:	0b95      	lsrs	r5, r2, #14
-    f2b6:	0001      	lsls	r1, r0, #0
-    f2b8:	0b7d      	lsrs	r5, r7, #13
-    f2ba:	0001      	lsls	r1, r0, #0
-
-0000f2bc <__sinit>:
-    f2bc:	b510      	push	{r4, lr}
-    f2be:	6b82      	ldr	r2, [r0, #56]
-    f2c0:	1c04      	adds	r4, r0, #0
-    f2c2:	2a00      	cmp	r2, #0
-    f2c4:	d122      	bne.n	f30c <__sinit+0x50>
-    f2c6:	4b13      	ldr	r3, [pc, #76]	(f314 <.text+0xf314>)
-    f2c8:	63c3      	str	r3, [r0, #60]
-    f2ca:	2301      	movs	r3, #1
-    f2cc:	6383      	str	r3, [r0, #56]
-    f2ce:	23b8      	movs	r3, #184
-    f2d0:	009b      	lsls	r3, r3, #2
-    f2d2:	50c2      	str	r2, [r0, r3]
-    f2d4:	23b9      	movs	r3, #185
-    f2d6:	009b      	lsls	r3, r3, #2
-    f2d8:	2203      	movs	r2, #3
-    f2da:	21bb      	movs	r1, #187
-    f2dc:	50c2      	str	r2, [r0, r3]
-    f2de:	0089      	lsls	r1, r1, #2
-    f2e0:	23ba      	movs	r3, #186
-    f2e2:	1842      	adds	r2, r0, r1
-    f2e4:	009b      	lsls	r3, r3, #2
-    f2e6:	50c2      	str	r2, [r0, r3]
-    f2e8:	2104      	movs	r1, #4
-    f2ea:	6840      	ldr	r0, [r0, #4]
-    f2ec:	2200      	movs	r2, #0
-    f2ee:	1c23      	adds	r3, r4, #0
-    f2f0:	f7ff ffc8 	bl	f284 <std>
-    f2f4:	68a0      	ldr	r0, [r4, #8]
-    f2f6:	2109      	movs	r1, #9
-    f2f8:	2201      	movs	r2, #1
-    f2fa:	1c23      	adds	r3, r4, #0
-    f2fc:	f7ff ffc2 	bl	f284 <std>
-    f300:	68e0      	ldr	r0, [r4, #12]
-    f302:	210a      	movs	r1, #10
-    f304:	2202      	movs	r2, #2
-    f306:	1c23      	adds	r3, r4, #0
-    f308:	f7ff ffbc 	bl	f284 <std>
-    f30c:	bc10      	pop	{r4}
-    f30e:	bc01      	pop	{r0}
-    f310:	4700      	bx	r0
-    f312:	0000      	lsls	r0, r0, #0
-    f314:	f331 0000 	undefined
-
-0000f318 <__sfp_lock_acquire>:
-    f318:	4770      	bx	lr
-	...
-
-0000f31c <__sfp_lock_release>:
-    f31c:	4770      	bx	lr
-	...
-
-0000f320 <__sinit_lock_acquire>:
-    f320:	4770      	bx	lr
-	...
-
-0000f324 <__sinit_lock_release>:
-    f324:	4770      	bx	lr
-	...
-
-0000f328 <__fp_lock>:
-    f328:	2000      	movs	r0, #0
-    f32a:	4770      	bx	lr
-
-0000f32c <__fp_unlock>:
-    f32c:	2000      	movs	r0, #0
-    f32e:	4770      	bx	lr
-
-0000f330 <_cleanup_r>:
-    f330:	b500      	push	{lr}
-    f332:	4902      	ldr	r1, [pc, #8]	(f33c <.text+0xf33c>)
-    f334:	f000 fafe 	bl	f934 <_fwalk>
-    f338:	bc01      	pop	{r0}
-    f33a:	4700      	bx	r0
-    f33c:	0d61      	lsrs	r1, r4, #21
-    f33e:	0001      	lsls	r1, r0, #0
-
-0000f340 <_cleanup>:
-    f340:	b500      	push	{lr}
-    f342:	4b03      	ldr	r3, [pc, #12]	(f350 <.text+0xf350>)
-    f344:	6818      	ldr	r0, [r3, #0]
-    f346:	f7ff fff3 	bl	f330 <_cleanup_r>
-    f34a:	bc01      	pop	{r0}
-    f34c:	4700      	bx	r0
-    f34e:	0000      	lsls	r0, r0, #0
-    f350:	5004      	str	r4, [r0, r0]
-    f352:	0001      	lsls	r1, r0, #0
-
-0000f354 <__sfmoreglue>:
-    f354:	b570      	push	{r4, r5, r6, lr}
-    f356:	235c      	movs	r3, #92
-    f358:	1c0e      	adds	r6, r1, #0
-    f35a:	435e      	muls	r6, r3
-    f35c:	1c0d      	adds	r5, r1, #0
-    f35e:	1c31      	adds	r1, r6, #0
-    f360:	310c      	adds	r1, #12
-    f362:	f000 fbbb 	bl	fadc <_malloc_r>
-    f366:	2800      	cmp	r0, #0
-    f368:	d101      	bne.n	f36e <__sfmoreglue+0x1a>
-    f36a:	2400      	movs	r4, #0
-    f36c:	e009      	b.n	f382 <__sfmoreglue+0x2e>
-    f36e:	1c04      	adds	r4, r0, #0
-    f370:	2300      	movs	r3, #0
-    f372:	300c      	adds	r0, #12
-    f374:	6023      	str	r3, [r4, #0]
-    f376:	6065      	str	r5, [r4, #4]
-    f378:	60a0      	str	r0, [r4, #8]
-    f37a:	2100      	movs	r1, #0
-    f37c:	1c32      	adds	r2, r6, #0
-    f37e:	f000 fe2b 	bl	ffd8 <memset>
-    f382:	1c20      	adds	r0, r4, #0
-    f384:	bc70      	pop	{r4, r5, r6}
-    f386:	bc02      	pop	{r1}
-    f388:	4708      	bx	r1
-	...
-
-0000f38c <__fp_unlock_all>:
-    f38c:	b500      	push	{lr}
-    f38e:	4b03      	ldr	r3, [pc, #12]	(f39c <.text+0xf39c>)
-    f390:	4903      	ldr	r1, [pc, #12]	(f3a0 <.text+0xf3a0>)
-    f392:	6818      	ldr	r0, [r3, #0]
-    f394:	f000 face 	bl	f934 <_fwalk>
-    f398:	bc01      	pop	{r0}
-    f39a:	4700      	bx	r0
-    f39c:	0020      	lsls	r0, r4, #0
-    f39e:	4000      	ands	r0, r0
-    f3a0:	f32d 0000 	ssat16	r0, #0, sp
-
-0000f3a4 <__fp_lock_all>:
-    f3a4:	b500      	push	{lr}
-    f3a6:	4b03      	ldr	r3, [pc, #12]	(f3b4 <.text+0xf3b4>)
-    f3a8:	4903      	ldr	r1, [pc, #12]	(f3b8 <.text+0xf3b8>)
-    f3aa:	6818      	ldr	r0, [r3, #0]
-    f3ac:	f000 fac2 	bl	f934 <_fwalk>
-    f3b0:	bc01      	pop	{r0}
-    f3b2:	4700      	bx	r0
-    f3b4:	0020      	lsls	r0, r4, #0
-    f3b6:	4000      	ands	r0, r0
-    f3b8:	f329 0000 	ssat16	r0, #0, r9
-
-0000f3bc <__sfp>:
-    f3bc:	b530      	push	{r4, r5, lr}
-    f3be:	4b1c      	ldr	r3, [pc, #112]	(f430 <.text+0xf430>)
-    f3c0:	681c      	ldr	r4, [r3, #0]
-    f3c2:	6ba3      	ldr	r3, [r4, #56]
-    f3c4:	1c05      	adds	r5, r0, #0
-    f3c6:	2b00      	cmp	r3, #0
-    f3c8:	d102      	bne.n	f3d0 <__sfp+0x14>
-    f3ca:	1c20      	adds	r0, r4, #0
-    f3cc:	f7ff ff76 	bl	f2bc <__sinit>
-    f3d0:	21b8      	movs	r1, #184
-    f3d2:	0089      	lsls	r1, r1, #2
-    f3d4:	1864      	adds	r4, r4, r1
-    f3d6:	68a0      	ldr	r0, [r4, #8]
-    f3d8:	6863      	ldr	r3, [r4, #4]
-    f3da:	e004      	b.n	f3e6 <__sfp+0x2a>
-    f3dc:	210c      	movs	r1, #12
-    f3de:	5e42      	ldrsh	r2, [r0, r1]
-    f3e0:	2a00      	cmp	r2, #0
-    f3e2:	d012      	beq.n	f40a <__sfp+0x4e>
-    f3e4:	305c      	adds	r0, #92
-    f3e6:	3b01      	subs	r3, #1
-    f3e8:	d5f8      	bpl.n	f3dc <__sfp+0x20>
-    f3ea:	6823      	ldr	r3, [r4, #0]
-    f3ec:	2b00      	cmp	r3, #0
-    f3ee:	d106      	bne.n	f3fe <__sfp+0x42>
-    f3f0:	1c28      	adds	r0, r5, #0
-    f3f2:	2104      	movs	r1, #4
-    f3f4:	f7ff ffae 	bl	f354 <__sfmoreglue>
-    f3f8:	6020      	str	r0, [r4, #0]
-    f3fa:	2800      	cmp	r0, #0
-    f3fc:	d001      	beq.n	f402 <__sfp+0x46>
-    f3fe:	6824      	ldr	r4, [r4, #0]
-    f400:	e7e9      	b.n	f3d6 <__sfp+0x1a>
-    f402:	230c      	movs	r3, #12
-    f404:	2000      	movs	r0, #0
-    f406:	602b      	str	r3, [r5, #0]
-    f408:	e00e      	b.n	f428 <__sfp+0x6c>
-    f40a:	2301      	movs	r3, #1
-    f40c:	425b      	negs	r3, r3
-    f40e:	81c3      	strh	r3, [r0, #14]
-    f410:	2301      	movs	r3, #1
-    f412:	8183      	strh	r3, [r0, #12]
-    f414:	6002      	str	r2, [r0, #0]
-    f416:	6082      	str	r2, [r0, #8]
-    f418:	6042      	str	r2, [r0, #4]
-    f41a:	6102      	str	r2, [r0, #16]
-    f41c:	6142      	str	r2, [r0, #20]
-    f41e:	6182      	str	r2, [r0, #24]
-    f420:	6302      	str	r2, [r0, #48]
-    f422:	6342      	str	r2, [r0, #52]
-    f424:	6442      	str	r2, [r0, #68]
-    f426:	6482      	str	r2, [r0, #72]
-    f428:	bc30      	pop	{r4, r5}
-    f42a:	bc02      	pop	{r1}
-    f42c:	4708      	bx	r1
-    f42e:	0000      	lsls	r0, r0, #0
-    f430:	5004      	str	r4, [r0, r0]
-    f432:	0001      	lsls	r1, r0, #0
-
-0000f434 <_malloc_trim_r>:
-    f434:	b5f0      	push	{r4, r5, r6, r7, lr}
-    f436:	1c0c      	adds	r4, r1, #0
-    f438:	1c05      	adds	r5, r0, #0
-    f43a:	f000 fdd5 	bl	ffe8 <__malloc_lock>
-    f43e:	4f21      	ldr	r7, [pc, #132]	(f4c4 <.text+0xf4c4>)
-    f440:	68bb      	ldr	r3, [r7, #8]
-    f442:	685a      	ldr	r2, [r3, #4]
-    f444:	2303      	movs	r3, #3
-    f446:	1c16      	adds	r6, r2, #0
-    f448:	439e      	bics	r6, r3
-    f44a:	4b1f      	ldr	r3, [pc, #124]	(f4c8 <.text+0xf4c8>)
-    f44c:	1b34      	subs	r4, r6, r4
-    f44e:	18e4      	adds	r4, r4, r3
-    f450:	0b24      	lsrs	r4, r4, #12
-    f452:	3c01      	subs	r4, #1
-    f454:	0324      	lsls	r4, r4, #12
-    f456:	3310      	adds	r3, #16
-    f458:	429c      	cmp	r4, r3
-    f45a:	dd1d      	ble.n	f498 <_malloc_trim_r+0x64>
-    f45c:	1c28      	adds	r0, r5, #0
-    f45e:	2100      	movs	r1, #0
-    f460:	f005 fc2c 	bl	14cbc <___sbrk_r_from_thumb>
-    f464:	68bb      	ldr	r3, [r7, #8]
-    f466:	18f3      	adds	r3, r6, r3
-    f468:	4298      	cmp	r0, r3
-    f46a:	d115      	bne.n	f498 <_malloc_trim_r+0x64>
-    f46c:	4261      	negs	r1, r4
-    f46e:	1c28      	adds	r0, r5, #0
-    f470:	f005 fc24 	bl	14cbc <___sbrk_r_from_thumb>
-    f474:	3001      	adds	r0, #1
-    f476:	d114      	bne.n	f4a2 <_malloc_trim_r+0x6e>
-    f478:	2100      	movs	r1, #0
-    f47a:	1c28      	adds	r0, r5, #0
-    f47c:	f005 fc1e 	bl	14cbc <___sbrk_r_from_thumb>
-    f480:	68bc      	ldr	r4, [r7, #8]
-    f482:	1b01      	subs	r1, r0, r4
-    f484:	290f      	cmp	r1, #15
-    f486:	dd07      	ble.n	f498 <_malloc_trim_r+0x64>
-    f488:	4b10      	ldr	r3, [pc, #64]	(f4cc <.text+0xf4cc>)
-    f48a:	681b      	ldr	r3, [r3, #0]
-    f48c:	4a10      	ldr	r2, [pc, #64]	(f4d0 <.text+0xf4d0>)
-    f48e:	1ac3      	subs	r3, r0, r3
-    f490:	6013      	str	r3, [r2, #0]
-    f492:	2301      	movs	r3, #1
-    f494:	430b      	orrs	r3, r1
-    f496:	6063      	str	r3, [r4, #4]
-    f498:	1c28      	adds	r0, r5, #0
-    f49a:	f000 fda7 	bl	ffec <__malloc_unlock>
-    f49e:	2000      	movs	r0, #0
-    f4a0:	e00c      	b.n	f4bc <_malloc_trim_r+0x88>
-    f4a2:	2201      	movs	r2, #1
-    f4a4:	1b33      	subs	r3, r6, r4
-    f4a6:	4313      	orrs	r3, r2
-    f4a8:	68b9      	ldr	r1, [r7, #8]
-    f4aa:	4a09      	ldr	r2, [pc, #36]	(f4d0 <.text+0xf4d0>)
-    f4ac:	604b      	str	r3, [r1, #4]
-    f4ae:	6813      	ldr	r3, [r2, #0]
-    f4b0:	1b1b      	subs	r3, r3, r4
-    f4b2:	1c28      	adds	r0, r5, #0
-    f4b4:	6013      	str	r3, [r2, #0]
-    f4b6:	f000 fd99 	bl	ffec <__malloc_unlock>
-    f4ba:	2001      	movs	r0, #1
-    f4bc:	bcf0      	pop	{r4, r5, r6, r7}
-    f4be:	bc02      	pop	{r1}
-    f4c0:	4708      	bx	r1
-    f4c2:	0000      	lsls	r0, r0, #0
-    f4c4:	0434      	lsls	r4, r6, #16
-    f4c6:	4000      	ands	r0, r0
-    f4c8:	0fef      	lsrs	r7, r5, #31
-    f4ca:	0000      	lsls	r0, r0, #0
-    f4cc:	0840      	lsrs	r0, r0, #1
-    f4ce:	4000      	ands	r0, r0
-    f4d0:	0b0c      	lsrs	r4, r1, #12
-    f4d2:	4000      	ands	r0, r0
-
-0000f4d4 <_free_r>:
-    f4d4:	b5f0      	push	{r4, r5, r6, r7, lr}
-    f4d6:	b081      	sub	sp, #4
-    f4d8:	9000      	str	r0, [sp, #0]
-    f4da:	1c0c      	adds	r4, r1, #0
-    f4dc:	2900      	cmp	r1, #0
-    f4de:	d100      	bne.n	f4e2 <_free_r+0xe>
-    f4e0:	e0bd      	b.n	f65e <_free_r+0x18a>
-    f4e2:	1c26      	adds	r6, r4, #0
-    f4e4:	3e08      	subs	r6, #8
-    f4e6:	f000 fd7f 	bl	ffe8 <__malloc_lock>
-    f4ea:	6871      	ldr	r1, [r6, #4]
-    f4ec:	2201      	movs	r2, #1
-    f4ee:	1c0c      	adds	r4, r1, #0
-    f4f0:	4394      	bics	r4, r2
-    f4f2:	1930      	adds	r0, r6, r4
-    f4f4:	4694      	mov	ip, r2
-    f4f6:	6842      	ldr	r2, [r0, #4]
-    f4f8:	4f5b      	ldr	r7, [pc, #364]	(f668 <.text+0xf668>)
-    f4fa:	2303      	movs	r3, #3
-    f4fc:	1c15      	adds	r5, r2, #0
-    f4fe:	439d      	bics	r5, r3
-    f500:	68bb      	ldr	r3, [r7, #8]
-    f502:	4662      	mov	r2, ip
-    f504:	4011      	ands	r1, r2
-    f506:	4298      	cmp	r0, r3
-    f508:	d118      	bne.n	f53c <_free_r+0x68>
-    f50a:	1960      	adds	r0, r4, r5
-    f50c:	2900      	cmp	r1, #0
-    f50e:	d106      	bne.n	f51e <_free_r+0x4a>
-    f510:	6833      	ldr	r3, [r6, #0]
-    f512:	1af6      	subs	r6, r6, r3
-    f514:	68f2      	ldr	r2, [r6, #12]
-    f516:	18c0      	adds	r0, r0, r3
-    f518:	68b3      	ldr	r3, [r6, #8]
-    f51a:	60da      	str	r2, [r3, #12]
-    f51c:	6093      	str	r3, [r2, #8]
-    f51e:	4663      	mov	r3, ip
-    f520:	4303      	orrs	r3, r0
-    f522:	6073      	str	r3, [r6, #4]
-    f524:	4b51      	ldr	r3, [pc, #324]	(f66c <.text+0xf66c>)
-    f526:	681b      	ldr	r3, [r3, #0]
-    f528:	60be      	str	r6, [r7, #8]
-    f52a:	4298      	cmp	r0, r3
-    f52c:	d200      	bcs.n	f530 <_free_r+0x5c>
-    f52e:	e093      	b.n	f658 <_free_r+0x184>
-    f530:	4b4f      	ldr	r3, [pc, #316]	(f670 <.text+0xf670>)
-    f532:	9800      	ldr	r0, [sp, #0]
-    f534:	6819      	ldr	r1, [r3, #0]
-    f536:	f7ff ff7d 	bl	f434 <_malloc_trim_r>
-    f53a:	e08d      	b.n	f658 <_free_r+0x184>
-    f53c:	6045      	str	r5, [r0, #4]
-    f53e:	2900      	cmp	r1, #0
-    f540:	d10c      	bne.n	f55c <_free_r+0x88>
-    f542:	6833      	ldr	r3, [r6, #0]
-    f544:	1af6      	subs	r6, r6, r3
-    f546:	18e4      	adds	r4, r4, r3
-    f548:	68b2      	ldr	r2, [r6, #8]
-    f54a:	1c3b      	adds	r3, r7, #0
-    f54c:	3308      	adds	r3, #8
-    f54e:	429a      	cmp	r2, r3
-    f550:	d101      	bne.n	f556 <_free_r+0x82>
-    f552:	2101      	movs	r1, #1
-    f554:	e003      	b.n	f55e <_free_r+0x8a>
-    f556:	68f3      	ldr	r3, [r6, #12]
-    f558:	60d3      	str	r3, [r2, #12]
-    f55a:	609a      	str	r2, [r3, #8]
-    f55c:	2100      	movs	r1, #0
-    f55e:	1943      	adds	r3, r0, r5
-    f560:	685b      	ldr	r3, [r3, #4]
-    f562:	2201      	movs	r2, #1
-    f564:	4694      	mov	ip, r2
-    f566:	4213      	tst	r3, r2
-    f568:	d114      	bne.n	f594 <_free_r+0xc0>
-    f56a:	1964      	adds	r4, r4, r5
-    f56c:	2900      	cmp	r1, #0
-    f56e:	d10d      	bne.n	f58c <_free_r+0xb8>
-    f570:	4b3d      	ldr	r3, [pc, #244]	(f668 <.text+0xf668>)
-    f572:	6882      	ldr	r2, [r0, #8]
-    f574:	3308      	adds	r3, #8
-    f576:	429a      	cmp	r2, r3
-    f578:	d108      	bne.n	f58c <_free_r+0xb8>
-    f57a:	4663      	mov	r3, ip
-    f57c:	4323      	orrs	r3, r4
-    f57e:	60d6      	str	r6, [r2, #12]
-    f580:	6096      	str	r6, [r2, #8]
-    f582:	60f2      	str	r2, [r6, #12]
-    f584:	60b2      	str	r2, [r6, #8]
-    f586:	6073      	str	r3, [r6, #4]
-    f588:	5134      	str	r4, [r6, r4]
-    f58a:	e065      	b.n	f658 <_free_r+0x184>
-    f58c:	68c2      	ldr	r2, [r0, #12]
-    f58e:	6883      	ldr	r3, [r0, #8]
-    f590:	60da      	str	r2, [r3, #12]
-    f592:	6093      	str	r3, [r2, #8]
-    f594:	2001      	movs	r0, #1
-    f596:	1c23      	adds	r3, r4, #0
-    f598:	4303      	orrs	r3, r0
-    f59a:	6073      	str	r3, [r6, #4]
-    f59c:	5134      	str	r4, [r6, r4]
-    f59e:	2900      	cmp	r1, #0
-    f5a0:	d15a      	bne.n	f658 <_free_r+0x184>
-    f5a2:	4b34      	ldr	r3, [pc, #208]	(f674 <.text+0xf674>)
-    f5a4:	429c      	cmp	r4, r3
-    f5a6:	d812      	bhi.n	f5ce <_free_r+0xfa>
-    f5a8:	08e1      	lsrs	r1, r4, #3
-    f5aa:	1c0a      	adds	r2, r1, #0
-    f5ac:	2900      	cmp	r1, #0
-    f5ae:	da00      	bge.n	f5b2 <_free_r+0xde>
-    f5b0:	1cca      	adds	r2, r1, #3
-    f5b2:	1092      	asrs	r2, r2, #2
-    f5b4:	687b      	ldr	r3, [r7, #4]
-    f5b6:	4090      	lsls	r0, r2
-    f5b8:	4303      	orrs	r3, r0
-    f5ba:	4a2b      	ldr	r2, [pc, #172]	(f668 <.text+0xf668>)
-    f5bc:	607b      	str	r3, [r7, #4]
-    f5be:	00cb      	lsls	r3, r1, #3
-    f5c0:	189b      	adds	r3, r3, r2
-    f5c2:	689a      	ldr	r2, [r3, #8]
-    f5c4:	60f3      	str	r3, [r6, #12]
-    f5c6:	60b2      	str	r2, [r6, #8]
-    f5c8:	60d6      	str	r6, [r2, #12]
-    f5ca:	609e      	str	r6, [r3, #8]
-    f5cc:	e044      	b.n	f658 <_free_r+0x184>
-    f5ce:	0a62      	lsrs	r2, r4, #9
-    f5d0:	2a00      	cmp	r2, #0
-    f5d2:	d101      	bne.n	f5d8 <_free_r+0x104>
-    f5d4:	08e1      	lsrs	r1, r4, #3
-    f5d6:	e020      	b.n	f61a <_free_r+0x146>
-    f5d8:	2a04      	cmp	r2, #4
-    f5da:	d803      	bhi.n	f5e4 <_free_r+0x110>
-    f5dc:	09a3      	lsrs	r3, r4, #6
-    f5de:	1c19      	adds	r1, r3, #0
-    f5e0:	3138      	adds	r1, #56
-    f5e2:	e01a      	b.n	f61a <_free_r+0x146>
-    f5e4:	2a14      	cmp	r2, #20
-    f5e6:	d802      	bhi.n	f5ee <_free_r+0x11a>
-    f5e8:	1c11      	adds	r1, r2, #0
-    f5ea:	315b      	adds	r1, #91
-    f5ec:	e015      	b.n	f61a <_free_r+0x146>
-    f5ee:	2a54      	cmp	r2, #84
-    f5f0:	d803      	bhi.n	f5fa <_free_r+0x126>
-    f5f2:	0b23      	lsrs	r3, r4, #12
-    f5f4:	1c19      	adds	r1, r3, #0
-    f5f6:	316e      	adds	r1, #110
-    f5f8:	e00f      	b.n	f61a <_free_r+0x146>
-    f5fa:	23aa      	movs	r3, #170
-    f5fc:	005b      	lsls	r3, r3, #1
-    f5fe:	429a      	cmp	r2, r3
-    f600:	d803      	bhi.n	f60a <_free_r+0x136>
-    f602:	0be3      	lsrs	r3, r4, #15
-    f604:	1c19      	adds	r1, r3, #0
-    f606:	3177      	adds	r1, #119
-    f608:	e007      	b.n	f61a <_free_r+0x146>
-    f60a:	4b1b      	ldr	r3, [pc, #108]	(f678 <.text+0xf678>)
-    f60c:	429a      	cmp	r2, r3
-    f60e:	d901      	bls.n	f614 <_free_r+0x140>
-    f610:	217e      	movs	r1, #126
-    f612:	e002      	b.n	f61a <_free_r+0x146>
-    f614:	0ca3      	lsrs	r3, r4, #18
-    f616:	1c19      	adds	r1, r3, #0
-    f618:	317c      	adds	r1, #124
-    f61a:	4a13      	ldr	r2, [pc, #76]	(f668 <.text+0xf668>)
-    f61c:	00cb      	lsls	r3, r1, #3
-    f61e:	189d      	adds	r5, r3, r2
-    f620:	68a8      	ldr	r0, [r5, #8]
-    f622:	42a8      	cmp	r0, r5
-    f624:	d10e      	bne.n	f644 <_free_r+0x170>
-    f626:	1c0b      	adds	r3, r1, #0
-    f628:	2900      	cmp	r1, #0
-    f62a:	da00      	bge.n	f62e <_free_r+0x15a>
-    f62c:	3303      	adds	r3, #3
-    f62e:	109b      	asrs	r3, r3, #2
-    f630:	2201      	movs	r2, #1
-    f632:	409a      	lsls	r2, r3
-    f634:	687b      	ldr	r3, [r7, #4]
-    f636:	4313      	orrs	r3, r2
-    f638:	607b      	str	r3, [r7, #4]
-    f63a:	1c03      	adds	r3, r0, #0
-    f63c:	e008      	b.n	f650 <_free_r+0x17c>
-    f63e:	6880      	ldr	r0, [r0, #8]
-    f640:	42a8      	cmp	r0, r5
-    f642:	d004      	beq.n	f64e <_free_r+0x17a>
-    f644:	6843      	ldr	r3, [r0, #4]
-    f646:	2203      	movs	r2, #3
-    f648:	4393      	bics	r3, r2
-    f64a:	429c      	cmp	r4, r3
-    f64c:	d3f7      	bcc.n	f63e <_free_r+0x16a>
-    f64e:	68c3      	ldr	r3, [r0, #12]
-    f650:	60f3      	str	r3, [r6, #12]
-    f652:	60b0      	str	r0, [r6, #8]
-    f654:	60c6      	str	r6, [r0, #12]
-    f656:	609e      	str	r6, [r3, #8]
-    f658:	9800      	ldr	r0, [sp, #0]
-    f65a:	f000 fcc7 	bl	ffec <__malloc_unlock>
-    f65e:	b001      	add	sp, #4
-    f660:	bcf0      	pop	{r4, r5, r6, r7}
-    f662:	bc01      	pop	{r0}
-    f664:	4700      	bx	r0
-    f666:	0000      	lsls	r0, r0, #0
-    f668:	0434      	lsls	r4, r6, #16
-    f66a:	4000      	ands	r0, r0
-    f66c:	083c      	lsrs	r4, r7, #32
-    f66e:	4000      	ands	r0, r0
-    f670:	0b00      	lsrs	r0, r0, #12
-    f672:	4000      	ands	r0, r0
-    f674:	01ff      	lsls	r7, r7, #7
-    f676:	0000      	lsls	r0, r0, #0
-    f678:	0554      	lsls	r4, r2, #21
-	...
-
-0000f67c <__sfvwrite>:
-    f67c:	b5f0      	push	{r4, r5, r6, r7, lr}
-    f67e:	688b      	ldr	r3, [r1, #8]
-    f680:	b087      	sub	sp, #28
-    f682:	1c05      	adds	r5, r0, #0
-    f684:	9100      	str	r1, [sp, #0]
-    f686:	2b00      	cmp	r3, #0
-    f688:	d100      	bne.n	f68c <__sfvwrite+0x10>
-    f68a:	e11c      	b.n	f8c6 <__sfvwrite+0x24a>
-    f68c:	8983      	ldrh	r3, [r0, #12]
-    f68e:	071a      	lsls	r2, r3, #28
-    f690:	d502      	bpl.n	f698 <__sfvwrite+0x1c>
-    f692:	6903      	ldr	r3, [r0, #16]
-    f694:	2b00      	cmp	r3, #0
-    f696:	d105      	bne.n	f6a4 <__sfvwrite+0x28>
-    f698:	1c28      	adds	r0, r5, #0
-    f69a:	f7fe fecd 	bl	e438 <__swsetup>
-    f69e:	2800      	cmp	r0, #0
-    f6a0:	d000      	beq.n	f6a4 <__sfvwrite+0x28>
-    f6a2:	e10d      	b.n	f8c0 <__sfvwrite+0x244>
-    f6a4:	9b00      	ldr	r3, [sp, #0]
-    f6a6:	681b      	ldr	r3, [r3, #0]
-    f6a8:	9304      	str	r3, [sp, #16]
-    f6aa:	89ab      	ldrh	r3, [r5, #12]
-    f6ac:	079a      	lsls	r2, r3, #30
-    f6ae:	d521      	bpl.n	f6f4 <__sfvwrite+0x78>
-    f6b0:	2400      	movs	r4, #0
-    f6b2:	2600      	movs	r6, #0
-    f6b4:	e004      	b.n	f6c0 <__sfvwrite+0x44>
-    f6b6:	9b04      	ldr	r3, [sp, #16]
-    f6b8:	681e      	ldr	r6, [r3, #0]
-    f6ba:	685c      	ldr	r4, [r3, #4]
-    f6bc:	3308      	adds	r3, #8
-    f6be:	9304      	str	r3, [sp, #16]
-    f6c0:	2c00      	cmp	r4, #0
-    f6c2:	d0f8      	beq.n	f6b6 <__sfvwrite+0x3a>
-    f6c4:	2380      	movs	r3, #128
-    f6c6:	00db      	lsls	r3, r3, #3
-    f6c8:	69e8      	ldr	r0, [r5, #28]
-    f6ca:	1c22      	adds	r2, r4, #0
-    f6cc:	429c      	cmp	r4, r3
-    f6ce:	d900      	bls.n	f6d2 <__sfvwrite+0x56>
-    f6d0:	1c1a      	adds	r2, r3, #0
-    f6d2:	6a6b      	ldr	r3, [r5, #36]
-    f6d4:	1c31      	adds	r1, r6, #0
-    f6d6:	f000 f8fd 	bl	f8d4 <.text+0xf8d4>
-    f6da:	2800      	cmp	r0, #0
-    f6dc:	dc00      	bgt.n	f6e0 <__sfvwrite+0x64>
-    f6de:	e0eb      	b.n	f8b8 <__sfvwrite+0x23c>
-    f6e0:	9a00      	ldr	r2, [sp, #0]
-    f6e2:	6893      	ldr	r3, [r2, #8]
-    f6e4:	1a1b      	subs	r3, r3, r0
-    f6e6:	6093      	str	r3, [r2, #8]
-    f6e8:	2b00      	cmp	r3, #0
-    f6ea:	d100      	bne.n	f6ee <__sfvwrite+0x72>
-    f6ec:	e0eb      	b.n	f8c6 <__sfvwrite+0x24a>
-    f6ee:	1836      	adds	r6, r6, r0
-    f6f0:	1a24      	subs	r4, r4, r0
-    f6f2:	e7e5      	b.n	f6c0 <__sfvwrite+0x44>
-    f6f4:	07da      	lsls	r2, r3, #31
-    f6f6:	d50a      	bpl.n	f70e <__sfvwrite+0x92>
-    f6f8:	2300      	movs	r3, #0
-    f6fa:	2700      	movs	r7, #0
-    f6fc:	9302      	str	r3, [sp, #8]
-    f6fe:	9303      	str	r3, [sp, #12]
-    f700:	9305      	str	r3, [sp, #20]
-    f702:	e07b      	b.n	f7fc <__sfvwrite+0x180>
-    f704:	6820      	ldr	r0, [r4, #0]
-    f706:	6929      	ldr	r1, [r5, #16]
-    f708:	f7ff fee4 	bl	f4d4 <_free_r>
-    f70c:	e0d4      	b.n	f8b8 <__sfvwrite+0x23c>
-    f70e:	2600      	movs	r6, #0
-    f710:	9606      	str	r6, [sp, #24]
-    f712:	e006      	b.n	f722 <__sfvwrite+0xa6>
-    f714:	9a04      	ldr	r2, [sp, #16]
-    f716:	9b04      	ldr	r3, [sp, #16]
-    f718:	6812      	ldr	r2, [r2, #0]
-    f71a:	685e      	ldr	r6, [r3, #4]
-    f71c:	3308      	adds	r3, #8
-    f71e:	9206      	str	r2, [sp, #24]
-    f720:	9304      	str	r3, [sp, #16]
-    f722:	2e00      	cmp	r6, #0
-    f724:	d0f6      	beq.n	f714 <__sfvwrite+0x98>
-    f726:	89ab      	ldrh	r3, [r5, #12]
-    f728:	68ac      	ldr	r4, [r5, #8]
-    f72a:	059a      	lsls	r2, r3, #22
-    f72c:	d526      	bpl.n	f77c <__sfvwrite+0x100>
-    f72e:	42a6      	cmp	r6, r4
-    f730:	d914      	bls.n	f75c <__sfvwrite+0xe0>
-    f732:	061a      	lsls	r2, r3, #24
-    f734:	d512      	bpl.n	f75c <__sfvwrite+0xe0>
-    f736:	682b      	ldr	r3, [r5, #0]
-    f738:	6929      	ldr	r1, [r5, #16]
-    f73a:	4c65      	ldr	r4, [pc, #404]	(f8d0 <.text+0xf8d0>)
-    f73c:	1a5f      	subs	r7, r3, r1
-    f73e:	19bb      	adds	r3, r7, r6
-    f740:	6820      	ldr	r0, [r4, #0]
-    f742:	1c1a      	adds	r2, r3, #0
-    f744:	9301      	str	r3, [sp, #4]
-    f746:	f001 f86d 	bl	10824 <_realloc_r>
-    f74a:	2800      	cmp	r0, #0
-    f74c:	d0da      	beq.n	f704 <__sfvwrite+0x88>
-    f74e:	9a01      	ldr	r2, [sp, #4]
-    f750:	19c3      	adds	r3, r0, r7
-    f752:	6128      	str	r0, [r5, #16]
-    f754:	602b      	str	r3, [r5, #0]
-    f756:	616a      	str	r2, [r5, #20]
-    f758:	60ae      	str	r6, [r5, #8]
-    f75a:	1c34      	adds	r4, r6, #0
-    f75c:	42a6      	cmp	r6, r4
-    f75e:	d200      	bcs.n	f762 <__sfvwrite+0xe6>
-    f760:	1c34      	adds	r4, r6, #0
-    f762:	1c22      	adds	r2, r4, #0
-    f764:	6828      	ldr	r0, [r5, #0]
-    f766:	9906      	ldr	r1, [sp, #24]
-    f768:	f000 fc1a 	bl	ffa0 <memmove>
-    f76c:	68ab      	ldr	r3, [r5, #8]
-    f76e:	1b1b      	subs	r3, r3, r4
-    f770:	60ab      	str	r3, [r5, #8]
-    f772:	682b      	ldr	r3, [r5, #0]
-    f774:	191b      	adds	r3, r3, r4
-    f776:	1c34      	adds	r4, r6, #0
-    f778:	602b      	str	r3, [r5, #0]
-    f77a:	e029      	b.n	f7d0 <__sfvwrite+0x154>
-    f77c:	6828      	ldr	r0, [r5, #0]
-    f77e:	692b      	ldr	r3, [r5, #16]
-    f780:	4298      	cmp	r0, r3
-    f782:	d90e      	bls.n	f7a2 <__sfvwrite+0x126>
-    f784:	42a6      	cmp	r6, r4
-    f786:	d90c      	bls.n	f7a2 <__sfvwrite+0x126>
-    f788:	9906      	ldr	r1, [sp, #24]
-    f78a:	1c22      	adds	r2, r4, #0
-    f78c:	f000 fc08 	bl	ffa0 <memmove>
-    f790:	682b      	ldr	r3, [r5, #0]
-    f792:	191b      	adds	r3, r3, r4
-    f794:	602b      	str	r3, [r5, #0]
-    f796:	1c28      	adds	r0, r5, #0
-    f798:	f7ff fd30 	bl	f1fc <fflush>
-    f79c:	2800      	cmp	r0, #0
-    f79e:	d017      	beq.n	f7d0 <__sfvwrite+0x154>
-    f7a0:	e08a      	b.n	f8b8 <__sfvwrite+0x23c>
-    f7a2:	696a      	ldr	r2, [r5, #20]
-    f7a4:	4296      	cmp	r6, r2
-    f7a6:	d308      	bcc.n	f7ba <__sfvwrite+0x13e>
-    f7a8:	69e8      	ldr	r0, [r5, #28]
-    f7aa:	6a6b      	ldr	r3, [r5, #36]
-    f7ac:	9906      	ldr	r1, [sp, #24]
-    f7ae:	f000 f891 	bl	f8d4 <.text+0xf8d4>
-    f7b2:	1c04      	adds	r4, r0, #0
-    f7b4:	2800      	cmp	r0, #0
-    f7b6:	dc0b      	bgt.n	f7d0 <__sfvwrite+0x154>
-    f7b8:	e07e      	b.n	f8b8 <__sfvwrite+0x23c>
-    f7ba:	9906      	ldr	r1, [sp, #24]
-    f7bc:	1c32      	adds	r2, r6, #0
-    f7be:	f000 fbef 	bl	ffa0 <memmove>
-    f7c2:	68ab      	ldr	r3, [r5, #8]
-    f7c4:	1b9b      	subs	r3, r3, r6
-    f7c6:	60ab      	str	r3, [r5, #8]
-    f7c8:	682b      	ldr	r3, [r5, #0]
-    f7ca:	199b      	adds	r3, r3, r6
-    f7cc:	602b      	str	r3, [r5, #0]
-    f7ce:	1c34      	adds	r4, r6, #0
-    f7d0:	9a00      	ldr	r2, [sp, #0]
-    f7d2:	6893      	ldr	r3, [r2, #8]
-    f7d4:	1b1b      	subs	r3, r3, r4
-    f7d6:	6093      	str	r3, [r2, #8]
-    f7d8:	2b00      	cmp	r3, #0
-    f7da:	d074      	beq.n	f8c6 <__sfvwrite+0x24a>
-    f7dc:	9b06      	ldr	r3, [sp, #24]
-    f7de:	1b36      	subs	r6, r6, r4
-    f7e0:	191b      	adds	r3, r3, r4
-    f7e2:	9306      	str	r3, [sp, #24]
-    f7e4:	e79d      	b.n	f722 <__sfvwrite+0xa6>
-    f7e6:	9a04      	ldr	r2, [sp, #16]
-    f7e8:	9b04      	ldr	r3, [sp, #16]
-    f7ea:	6812      	ldr	r2, [r2, #0]
-    f7ec:	685b      	ldr	r3, [r3, #4]
-    f7ee:	9203      	str	r2, [sp, #12]
-    f7f0:	9a04      	ldr	r2, [sp, #16]
-    f7f2:	9302      	str	r3, [sp, #8]
-    f7f4:	3208      	adds	r2, #8
-    f7f6:	2300      	movs	r3, #0
-    f7f8:	9204      	str	r2, [sp, #16]
-    f7fa:	9305      	str	r3, [sp, #20]
-    f7fc:	9a02      	ldr	r2, [sp, #8]
-    f7fe:	2a00      	cmp	r2, #0
-    f800:	d0f1      	beq.n	f7e6 <__sfvwrite+0x16a>
-    f802:	9b05      	ldr	r3, [sp, #20]
-    f804:	2b00      	cmp	r3, #0
-    f806:	d10f      	bne.n	f828 <__sfvwrite+0x1ac>
-    f808:	9803      	ldr	r0, [sp, #12]
-    f80a:	210a      	movs	r1, #10
-    f80c:	f000 fbbc 	bl	ff88 <memchr>
-    f810:	2800      	cmp	r0, #0
-    f812:	d005      	beq.n	f820 <__sfvwrite+0x1a4>
-    f814:	9a03      	ldr	r2, [sp, #12]
-    f816:	1a83      	subs	r3, r0, r2
-    f818:	1c5f      	adds	r7, r3, #1
-    f81a:	2301      	movs	r3, #1
-    f81c:	9305      	str	r3, [sp, #20]
-    f81e:	e003      	b.n	f828 <__sfvwrite+0x1ac>
-    f820:	9f02      	ldr	r7, [sp, #8]
-    f822:	2201      	movs	r2, #1
-    f824:	9205      	str	r2, [sp, #20]
-    f826:	3701      	adds	r7, #1
-    f828:	9b02      	ldr	r3, [sp, #8]
-    f82a:	1c3e      	adds	r6, r7, #0
-    f82c:	429f      	cmp	r7, r3
-    f82e:	d900      	bls.n	f832 <__sfvwrite+0x1b6>
-    f830:	1c1e      	adds	r6, r3, #0
-    f832:	6828      	ldr	r0, [r5, #0]
-    f834:	692b      	ldr	r3, [r5, #16]
-    f836:	68a9      	ldr	r1, [r5, #8]
-    f838:	696a      	ldr	r2, [r5, #20]
-    f83a:	4298      	cmp	r0, r3
-    f83c:	d90f      	bls.n	f85e <__sfvwrite+0x1e2>
-    f83e:	188c      	adds	r4, r1, r2
-    f840:	42a6      	cmp	r6, r4
-    f842:	dd0c      	ble.n	f85e <__sfvwrite+0x1e2>
-    f844:	9903      	ldr	r1, [sp, #12]
-    f846:	1c22      	adds	r2, r4, #0
-    f848:	f000 fbaa 	bl	ffa0 <memmove>
-    f84c:	682b      	ldr	r3, [r5, #0]
-    f84e:	191b      	adds	r3, r3, r4
-    f850:	602b      	str	r3, [r5, #0]
-    f852:	1c28      	adds	r0, r5, #0
-    f854:	f7ff fcd2 	bl	f1fc <fflush>
-    f858:	2800      	cmp	r0, #0
-    f85a:	d016      	beq.n	f88a <__sfvwrite+0x20e>
-    f85c:	e02c      	b.n	f8b8 <__sfvwrite+0x23c>
-    f85e:	4296      	cmp	r6, r2
-    f860:	db08      	blt.n	f874 <__sfvwrite+0x1f8>
-    f862:	69e8      	ldr	r0, [r5, #28]
-    f864:	6a6b      	ldr	r3, [r5, #36]
-    f866:	9903      	ldr	r1, [sp, #12]
-    f868:	f000 f834 	bl	f8d4 <.text+0xf8d4>
-    f86c:	1c04      	adds	r4, r0, #0
-    f86e:	2800      	cmp	r0, #0
-    f870:	dc0b      	bgt.n	f88a <__sfvwrite+0x20e>
-    f872:	e021      	b.n	f8b8 <__sfvwrite+0x23c>
-    f874:	9903      	ldr	r1, [sp, #12]
-    f876:	1c32      	adds	r2, r6, #0
-    f878:	f000 fb92 	bl	ffa0 <memmove>
-    f87c:	68ab      	ldr	r3, [r5, #8]
-    f87e:	1b9b      	subs	r3, r3, r6
-    f880:	60ab      	str	r3, [r5, #8]
-    f882:	682b      	ldr	r3, [r5, #0]
-    f884:	199b      	adds	r3, r3, r6
-    f886:	602b      	str	r3, [r5, #0]
-    f888:	1c34      	adds	r4, r6, #0
-    f88a:	1b3f      	subs	r7, r7, r4
-    f88c:	2f00      	cmp	r7, #0
-    f88e:	d106      	bne.n	f89e <__sfvwrite+0x222>
-    f890:	1c28      	adds	r0, r5, #0
-    f892:	f7ff fcb3 	bl	f1fc <fflush>
-    f896:	2800      	cmp	r0, #0
-    f898:	d10e      	bne.n	f8b8 <__sfvwrite+0x23c>
-    f89a:	2200      	movs	r2, #0
-    f89c:	9205      	str	r2, [sp, #20]
-    f89e:	9a00      	ldr	r2, [sp, #0]
-    f8a0:	6893      	ldr	r3, [r2, #8]
-    f8a2:	1b1b      	subs	r3, r3, r4
-    f8a4:	6093      	str	r3, [r2, #8]
-    f8a6:	2b00      	cmp	r3, #0
-    f8a8:	d00d      	beq.n	f8c6 <__sfvwrite+0x24a>
-    f8aa:	9b03      	ldr	r3, [sp, #12]
-    f8ac:	9a02      	ldr	r2, [sp, #8]
-    f8ae:	191b      	adds	r3, r3, r4
-    f8b0:	1b12      	subs	r2, r2, r4
-    f8b2:	9303      	str	r3, [sp, #12]
-    f8b4:	9202      	str	r2, [sp, #8]
-    f8b6:	e7a1      	b.n	f7fc <__sfvwrite+0x180>
-    f8b8:	89ab      	ldrh	r3, [r5, #12]
-    f8ba:	2240      	movs	r2, #64
-    f8bc:	4313      	orrs	r3, r2
-    f8be:	81ab      	strh	r3, [r5, #12]
-    f8c0:	2001      	movs	r0, #1
-    f8c2:	4240      	negs	r0, r0
-    f8c4:	e000      	b.n	f8c8 <__sfvwrite+0x24c>
-    f8c6:	2000      	movs	r0, #0
-    f8c8:	b007      	add	sp, #28
-    f8ca:	bcf0      	pop	{r4, r5, r6, r7}
-    f8cc:	bc02      	pop	{r1}
-    f8ce:	4708      	bx	r1
-    f8d0:	0020      	lsls	r0, r4, #0
-    f8d2:	4000      	ands	r0, r0
-    f8d4:	4718      	bx	r3
-    f8d6:	46c0      	nop			(mov r8, r8)
-
-0000f8d8 <_fwalk_reent>:
-    f8d8:	b5f0      	push	{r4, r5, r6, r7, lr}
-    f8da:	b082      	sub	sp, #8
-    f8dc:	9001      	str	r0, [sp, #4]
-    f8de:	9100      	str	r1, [sp, #0]
-    f8e0:	f7ff fd1a 	bl	f318 <__sfp_lock_acquire>
-    f8e4:	9a01      	ldr	r2, [sp, #4]
-    f8e6:	23b8      	movs	r3, #184
-    f8e8:	009b      	lsls	r3, r3, #2
-    f8ea:	18d5      	adds	r5, r2, r3
-    f8ec:	2700      	movs	r7, #0
-    f8ee:	e017      	b.n	f920 <_fwalk_reent+0x48>
-    f8f0:	68ab      	ldr	r3, [r5, #8]
-    f8f2:	686e      	ldr	r6, [r5, #4]
-    f8f4:	1c1c      	adds	r4, r3, #0
-    f8f6:	340c      	adds	r4, #12
-    f8f8:	e00d      	b.n	f916 <_fwalk_reent+0x3e>
-    f8fa:	2200      	movs	r2, #0
-    f8fc:	5ea3      	ldrsh	r3, [r4, r2]
-    f8fe:	2b00      	cmp	r3, #0
-    f900:	d008      	beq.n	f914 <_fwalk_reent+0x3c>
-    f902:	2202      	movs	r2, #2
-    f904:	5ea3      	ldrsh	r3, [r4, r2]
-    f906:	3301      	adds	r3, #1
-    f908:	d004      	beq.n	f914 <_fwalk_reent+0x3c>
-    f90a:	9801      	ldr	r0, [sp, #4]
-    f90c:	9b00      	ldr	r3, [sp, #0]
-    f90e:	f000 f83c 	bl	f98a <_fwalk+0x56>
-    f912:	4307      	orrs	r7, r0
-    f914:	345c      	adds	r4, #92
-    f916:	1c21      	adds	r1, r4, #0
-    f918:	390c      	subs	r1, #12
-    f91a:	3e01      	subs	r6, #1
-    f91c:	d5ed      	bpl.n	f8fa <_fwalk_reent+0x22>
-    f91e:	682d      	ldr	r5, [r5, #0]
-    f920:	2d00      	cmp	r5, #0
-    f922:	d1e5      	bne.n	f8f0 <_fwalk_reent+0x18>
-    f924:	f7ff fcfa 	bl	f31c <__sfp_lock_release>
-    f928:	1c38      	adds	r0, r7, #0
-    f92a:	b002      	add	sp, #8
-    f92c:	bcf0      	pop	{r4, r5, r6, r7}
-    f92e:	bc02      	pop	{r1}
-    f930:	4708      	bx	r1
-	...
-
-0000f934 <_fwalk>:
-    f934:	b5f0      	push	{r4, r5, r6, r7, lr}
-    f936:	b081      	sub	sp, #4
-    f938:	1c04      	adds	r4, r0, #0
-    f93a:	9100      	str	r1, [sp, #0]
-    f93c:	f7ff fcec 	bl	f318 <__sfp_lock_acquire>
-    f940:	22b8      	movs	r2, #184
-    f942:	0092      	lsls	r2, r2, #2
-    f944:	18a5      	adds	r5, r4, r2
-    f946:	2700      	movs	r7, #0
-    f948:	e016      	b.n	f978 <_fwalk+0x44>
-    f94a:	68ab      	ldr	r3, [r5, #8]
-    f94c:	686e      	ldr	r6, [r5, #4]
-    f94e:	1c1c      	adds	r4, r3, #0
-    f950:	340c      	adds	r4, #12
-    f952:	e00c      	b.n	f96e <_fwalk+0x3a>
-    f954:	2200      	movs	r2, #0
-    f956:	5ea3      	ldrsh	r3, [r4, r2]
-    f958:	2b00      	cmp	r3, #0
-    f95a:	d007      	beq.n	f96c <_fwalk+0x38>
-    f95c:	2202      	movs	r2, #2
-    f95e:	5ea3      	ldrsh	r3, [r4, r2]
-    f960:	3301      	adds	r3, #1
-    f962:	d003      	beq.n	f96c <_fwalk+0x38>
-    f964:	9b00      	ldr	r3, [sp, #0]
-    f966:	f000 f810 	bl	f98a <_fwalk+0x56>
-    f96a:	4307      	orrs	r7, r0
-    f96c:	345c      	adds	r4, #92
-    f96e:	1c20      	adds	r0, r4, #0
-    f970:	380c      	subs	r0, #12
-    f972:	3e01      	subs	r6, #1
-    f974:	d5ee      	bpl.n	f954 <_fwalk+0x20>
-    f976:	682d      	ldr	r5, [r5, #0]
-    f978:	2d00      	cmp	r5, #0
-    f97a:	d1e6      	bne.n	f94a <_fwalk+0x16>
-    f97c:	f7ff fcce 	bl	f31c <__sfp_lock_release>
-    f980:	1c38      	adds	r0, r7, #0
-    f982:	b001      	add	sp, #4
-    f984:	bcf0      	pop	{r4, r5, r6, r7}
-    f986:	bc02      	pop	{r1}
-    f988:	4708      	bx	r1
-    f98a:	4718      	bx	r3
-
-0000f98c <__locale_charset>:
-    f98c:	4b01      	ldr	r3, [pc, #4]	(f994 <.text+0xf994>)
-    f98e:	6818      	ldr	r0, [r3, #0]
-    f990:	4770      	bx	lr
-    f992:	0000      	lsls	r0, r0, #0
-    f994:	5038      	str	r0, [r7, r0]
-    f996:	0001      	lsls	r1, r0, #0
-
-0000f998 <_localeconv_r>:
-    f998:	4800      	ldr	r0, [pc, #0]	(f99c <.text+0xf99c>)
-    f99a:	4770      	bx	lr
-    f99c:	5008      	str	r0, [r1, r0]
-    f99e:	0001      	lsls	r1, r0, #0
-
-0000f9a0 <_setlocale_r>:
-    f9a0:	b570      	push	{r4, r5, r6, lr}
-    f9a2:	1c0e      	adds	r6, r1, #0
-    f9a4:	1c05      	adds	r5, r0, #0
-    f9a6:	1c14      	adds	r4, r2, #0
-    f9a8:	490b      	ldr	r1, [pc, #44]	(f9d8 <.text+0xf9d8>)
-    f9aa:	2a00      	cmp	r2, #0
-    f9ac:	d101      	bne.n	f9b2 <_setlocale_r+0x12>
-    f9ae:	1c08      	adds	r0, r1, #0
-    f9b0:	e00f      	b.n	f9d2 <_setlocale_r+0x32>
-    f9b2:	1c10      	adds	r0, r2, #0
-    f9b4:	f001 f94a 	bl	10c4c <strcmp>
-    f9b8:	2800      	cmp	r0, #0
-    f9ba:	d007      	beq.n	f9cc <_setlocale_r+0x2c>
-    f9bc:	4907      	ldr	r1, [pc, #28]	(f9dc <.text+0xf9dc>)
-    f9be:	1c20      	adds	r0, r4, #0
-    f9c0:	f001 f944 	bl	10c4c <strcmp>
-    f9c4:	2800      	cmp	r0, #0
-    f9c6:	d001      	beq.n	f9cc <_setlocale_r+0x2c>
-    f9c8:	2000      	movs	r0, #0
-    f9ca:	e002      	b.n	f9d2 <_setlocale_r+0x32>
-    f9cc:	632e      	str	r6, [r5, #48]
-    f9ce:	636c      	str	r4, [r5, #52]
-    f9d0:	4801      	ldr	r0, [pc, #4]	(f9d8 <.text+0xf9d8>)
-    f9d2:	bc70      	pop	{r4, r5, r6}
-    f9d4:	bc02      	pop	{r1}
-    f9d6:	4708      	bx	r1
-    f9d8:	5514      	strb	r4, [r2, r4]
-    f9da:	0001      	lsls	r1, r0, #0
-    f9dc:	54b4      	strb	r4, [r6, r2]
-    f9de:	0001      	lsls	r1, r0, #0
-
-0000f9e0 <setlocale>:
-    f9e0:	b510      	push	{r4, lr}
-    f9e2:	4b05      	ldr	r3, [pc, #20]	(f9f8 <.text+0xf9f8>)
-    f9e4:	1c04      	adds	r4, r0, #0
-    f9e6:	1c0a      	adds	r2, r1, #0
-    f9e8:	6818      	ldr	r0, [r3, #0]
-    f9ea:	1c21      	adds	r1, r4, #0
-    f9ec:	f7ff ffd8 	bl	f9a0 <_setlocale_r>
-    f9f0:	bc10      	pop	{r4}
-    f9f2:	bc02      	pop	{r1}
-    f9f4:	4708      	bx	r1
-    f9f6:	0000      	lsls	r0, r0, #0
-    f9f8:	0020      	lsls	r0, r4, #0
-    f9fa:	4000      	ands	r0, r0
-
-0000f9fc <localeconv>:
-    f9fc:	4800      	ldr	r0, [pc, #0]	(fa00 <.text+0xfa00>)
-    f9fe:	4770      	bx	lr
-    fa00:	5008      	str	r0, [r1, r0]
-    fa02:	0001      	lsls	r1, r0, #0
-
-0000fa04 <__smakebuf>:
-    fa04:	b5f0      	push	{r4, r5, r6, r7, lr}
-    fa06:	8983      	ldrh	r3, [r0, #12]
-    fa08:	b08f      	sub	sp, #60
-    fa0a:	1c04      	adds	r4, r0, #0
-    fa0c:	079a      	lsls	r2, r3, #30
-    fa0e:	d43d      	bmi.n	fa8c <__smakebuf+0x88>
-    fa10:	89c3      	ldrh	r3, [r0, #14]
-    fa12:	041b      	lsls	r3, r3, #16
-    fa14:	1419      	asrs	r1, r3, #16
-    fa16:	2900      	cmp	r1, #0
-    fa18:	db06      	blt.n	fa28 <__smakebuf+0x24>
-    fa1a:	4b2d      	ldr	r3, [pc, #180]	(fad0 <.text+0xfad0>)
-    fa1c:	466a      	mov	r2, sp
-    fa1e:	6818      	ldr	r0, [r3, #0]
-    fa20:	f005 f950 	bl	14cc4 <___fstat_r_from_thumb>
-    fa24:	2800      	cmp	r0, #0
-    fa26:	da06      	bge.n	fa36 <__smakebuf+0x32>
-    fa28:	89a3      	ldrh	r3, [r4, #12]
-    fa2a:	2280      	movs	r2, #128
-    fa2c:	0112      	lsls	r2, r2, #4
-    fa2e:	4313      	orrs	r3, r2
-    fa30:	2700      	movs	r7, #0
-    fa32:	81a3      	strh	r3, [r4, #12]
-    fa34:	e01d      	b.n	fa72 <__smakebuf+0x6e>
-    fa36:	23f0      	movs	r3, #240
-    fa38:	9a01      	ldr	r2, [sp, #4]
-    fa3a:	021b      	lsls	r3, r3, #8
-    fa3c:	401a      	ands	r2, r3
-    fa3e:	2380      	movs	r3, #128
-    fa40:	019b      	lsls	r3, r3, #6
-    fa42:	2700      	movs	r7, #0
-    fa44:	429a      	cmp	r2, r3
-    fa46:	d100      	bne.n	fa4a <__smakebuf+0x46>
-    fa48:	2701      	movs	r7, #1
-    fa4a:	2380      	movs	r3, #128
-    fa4c:	021b      	lsls	r3, r3, #8
-    fa4e:	429a      	cmp	r2, r3
-    fa50:	d10a      	bne.n	fa68 <__smakebuf+0x64>
-    fa52:	4a20      	ldr	r2, [pc, #128]	(fad4 <.text+0xfad4>)
-    fa54:	6aa3      	ldr	r3, [r4, #40]
-    fa56:	4293      	cmp	r3, r2
-    fa58:	d106      	bne.n	fa68 <__smakebuf+0x64>
-    fa5a:	89a3      	ldrh	r3, [r4, #12]
-    fa5c:	2280      	movs	r2, #128
-    fa5e:	00d2      	lsls	r2, r2, #3
-    fa60:	4313      	orrs	r3, r2
-    fa62:	81a3      	strh	r3, [r4, #12]
-    fa64:	64e2      	str	r2, [r4, #76]
-    fa66:	e004      	b.n	fa72 <__smakebuf+0x6e>
-    fa68:	89a3      	ldrh	r3, [r4, #12]
-    fa6a:	2280      	movs	r2, #128
-    fa6c:	0112      	lsls	r2, r2, #4
-    fa6e:	4313      	orrs	r3, r2
-    fa70:	81a3      	strh	r3, [r4, #12]
-    fa72:	4d17      	ldr	r5, [pc, #92]	(fad0 <.text+0xfad0>)
-    fa74:	2680      	movs	r6, #128
-    fa76:	00f6      	lsls	r6, r6, #3
-    fa78:	6828      	ldr	r0, [r5, #0]
-    fa7a:	1c31      	adds	r1, r6, #0
-    fa7c:	f000 f82e 	bl	fadc <_malloc_r>
-    fa80:	2800      	cmp	r0, #0
-    fa82:	d10a      	bne.n	fa9a <__smakebuf+0x96>
-    fa84:	89a3      	ldrh	r3, [r4, #12]
-    fa86:	2202      	movs	r2, #2
-    fa88:	4313      	orrs	r3, r2
-    fa8a:	81a3      	strh	r3, [r4, #12]
-    fa8c:	1c23      	adds	r3, r4, #0
-    fa8e:	3343      	adds	r3, #67
-    fa90:	6023      	str	r3, [r4, #0]
-    fa92:	6123      	str	r3, [r4, #16]
-    fa94:	2301      	movs	r3, #1
-    fa96:	6163      	str	r3, [r4, #20]
-    fa98:	e015      	b.n	fac6 <__smakebuf+0xc2>
-    fa9a:	682a      	ldr	r2, [r5, #0]
-    fa9c:	4b0e      	ldr	r3, [pc, #56]	(fad8 <.text+0xfad8>)
-    fa9e:	63d3      	str	r3, [r2, #60]
-    faa0:	89a3      	ldrh	r3, [r4, #12]
-    faa2:	2280      	movs	r2, #128
-    faa4:	4313      	orrs	r3, r2
-    faa6:	81a3      	strh	r3, [r4, #12]
-    faa8:	6020      	str	r0, [r4, #0]
-    faaa:	6120      	str	r0, [r4, #16]
-    faac:	6166      	str	r6, [r4, #20]
-    faae:	2f00      	cmp	r7, #0
-    fab0:	d009      	beq.n	fac6 <__smakebuf+0xc2>
-    fab2:	230e      	movs	r3, #14
-    fab4:	5ee0      	ldrsh	r0, [r4, r3]
-    fab6:	f005 f909 	bl	14ccc <__isatty_from_thumb>
-    faba:	2800      	cmp	r0, #0
-    fabc:	d003      	beq.n	fac6 <__smakebuf+0xc2>
-    fabe:	89a3      	ldrh	r3, [r4, #12]
-    fac0:	2201      	movs	r2, #1
-    fac2:	4313      	orrs	r3, r2
-    fac4:	81a3      	strh	r3, [r4, #12]
-    fac6:	b00f      	add	sp, #60
-    fac8:	bcf0      	pop	{r4, r5, r6, r7}
-    faca:	bc01      	pop	{r0}
-    facc:	4700      	bx	r0
-    face:	0000      	lsls	r0, r0, #0
-    fad0:	0020      	lsls	r0, r4, #0
-    fad2:	4000      	ands	r0, r0
-    fad4:	0b95      	lsrs	r5, r2, #14
-    fad6:	0001      	lsls	r1, r0, #0
-    fad8:	f331 0000 	undefined
-
-0000fadc <_malloc_r>:
-    fadc:	b5f0      	push	{r4, r5, r6, r7, lr}
-    fade:	1c0a      	adds	r2, r1, #0
-    fae0:	b086      	sub	sp, #24
-    fae2:	320b      	adds	r2, #11
-    fae4:	9000      	str	r0, [sp, #0]
-    fae6:	2a16      	cmp	r2, #22
-    fae8:	d802      	bhi.n	faf0 <_malloc_r+0x14>
-    faea:	2010      	movs	r0, #16
-    faec:	9004      	str	r0, [sp, #16]
-    faee:	e004      	b.n	fafa <_malloc_r+0x1e>
-    faf0:	2307      	movs	r3, #7
-    faf2:	439a      	bics	r2, r3
-    faf4:	9204      	str	r2, [sp, #16]
-    faf6:	2a00      	cmp	r2, #0
-    faf8:	db02      	blt.n	fb00 <_malloc_r+0x24>
-    fafa:	9a04      	ldr	r2, [sp, #16]
-    fafc:	428a      	cmp	r2, r1
-    fafe:	d203      	bcs.n	fb08 <_malloc_r+0x2c>
-    fb00:	9800      	ldr	r0, [sp, #0]
-    fb02:	230c      	movs	r3, #12
-    fb04:	6003      	str	r3, [r0, #0]
-    fb06:	e1f2      	b.n	feee <.text+0xfeee>
-    fb08:	9800      	ldr	r0, [sp, #0]
-    fb0a:	f000 fa6d 	bl	ffe8 <__malloc_lock>
-    fb0e:	4bc0      	ldr	r3, [pc, #768]	(fe10 <.text+0xfe10>)
-    fb10:	9904      	ldr	r1, [sp, #16]
-    fb12:	4299      	cmp	r1, r3
-    fb14:	d816      	bhi.n	fb44 <_malloc_r+0x68>
-    fb16:	08c9      	lsrs	r1, r1, #3
-    fb18:	4abe      	ldr	r2, [pc, #760]	(fe14 <.text+0xfe14>)
-    fb1a:	00cb      	lsls	r3, r1, #3
-    fb1c:	189b      	adds	r3, r3, r2
-    fb1e:	68dc      	ldr	r4, [r3, #12]
-    fb20:	429c      	cmp	r4, r3
-    fb22:	d104      	bne.n	fb2e <_malloc_r+0x52>
-    fb24:	1c23      	adds	r3, r4, #0
-    fb26:	3308      	adds	r3, #8
-    fb28:	68dc      	ldr	r4, [r3, #12]
-    fb2a:	429c      	cmp	r4, r3
-    fb2c:	d008      	beq.n	fb40 <_malloc_r+0x64>
-    fb2e:	6861      	ldr	r1, [r4, #4]
-    fb30:	2303      	movs	r3, #3
-    fb32:	4399      	bics	r1, r3
-    fb34:	68e2      	ldr	r2, [r4, #12]
-    fb36:	68a3      	ldr	r3, [r4, #8]
-    fb38:	1861      	adds	r1, r4, r1
-    fb3a:	60da      	str	r2, [r3, #12]
-    fb3c:	6093      	str	r3, [r2, #8]
-    fb3e:	e20c      	b.n	ff5a <.text+0xff5a>
-    fb40:	1c8f      	adds	r7, r1, #2
-    fb42:	e041      	b.n	fbc8 <_malloc_r+0xec>
-    fb44:	9b04      	ldr	r3, [sp, #16]
-    fb46:	0a5a      	lsrs	r2, r3, #9
-    fb48:	2a00      	cmp	r2, #0
-    fb4a:	d101      	bne.n	fb50 <_malloc_r+0x74>
-    fb4c:	08d9      	lsrs	r1, r3, #3
-    fb4e:	e026      	b.n	fb9e <_malloc_r+0xc2>
-    fb50:	2a04      	cmp	r2, #4
-    fb52:	d804      	bhi.n	fb5e <_malloc_r+0x82>
-    fb54:	9804      	ldr	r0, [sp, #16]
-    fb56:	0983      	lsrs	r3, r0, #6
-    fb58:	1c19      	adds	r1, r3, #0
-    fb5a:	3138      	adds	r1, #56
-    fb5c:	e01f      	b.n	fb9e <_malloc_r+0xc2>
-    fb5e:	2a14      	cmp	r2, #20
-    fb60:	d802      	bhi.n	fb68 <_malloc_r+0x8c>
-    fb62:	1c11      	adds	r1, r2, #0
-    fb64:	315b      	adds	r1, #91
-    fb66:	e01a      	b.n	fb9e <_malloc_r+0xc2>
-    fb68:	2a54      	cmp	r2, #84
-    fb6a:	d804      	bhi.n	fb76 <_malloc_r+0x9a>
-    fb6c:	9904      	ldr	r1, [sp, #16]
-    fb6e:	0b0b      	lsrs	r3, r1, #12
-    fb70:	1c19      	adds	r1, r3, #0
-    fb72:	316e      	adds	r1, #110
-    fb74:	e013      	b.n	fb9e <_malloc_r+0xc2>
-    fb76:	23aa      	movs	r3, #170
-    fb78:	005b      	lsls	r3, r3, #1
-    fb7a:	429a      	cmp	r2, r3
-    fb7c:	d804      	bhi.n	fb88 <_malloc_r+0xac>
-    fb7e:	9a04      	ldr	r2, [sp, #16]
-    fb80:	0bd3      	lsrs	r3, r2, #15
-    fb82:	1c19      	adds	r1, r3, #0
-    fb84:	3177      	adds	r1, #119
-    fb86:	e00a      	b.n	fb9e <_malloc_r+0xc2>
-    fb88:	4ba3      	ldr	r3, [pc, #652]	(fe18 <.text+0xfe18>)
-    fb8a:	429a      	cmp	r2, r3
-    fb8c:	d903      	bls.n	fb96 <_malloc_r+0xba>
-    fb8e:	217e      	movs	r1, #126
-    fb90:	e005      	b.n	fb9e <_malloc_r+0xc2>
-    fb92:	3901      	subs	r1, #1
-    fb94:	e017      	b.n	fbc6 <_malloc_r+0xea>
-    fb96:	9804      	ldr	r0, [sp, #16]
-    fb98:	0c83      	lsrs	r3, r0, #18
-    fb9a:	1c19      	adds	r1, r3, #0
-    fb9c:	317c      	adds	r1, #124
-    fb9e:	4a9d      	ldr	r2, [pc, #628]	(fe14 <.text+0xfe14>)
-    fba0:	00cb      	lsls	r3, r1, #3
-    fba2:	189d      	adds	r5, r3, r2
-    fba4:	68ec      	ldr	r4, [r5, #12]
-    fba6:	e00c      	b.n	fbc2 <_malloc_r+0xe6>
-    fba8:	6862      	ldr	r2, [r4, #4]
-    fbaa:	2303      	movs	r3, #3
-    fbac:	1c10      	adds	r0, r2, #0
-    fbae:	9a04      	ldr	r2, [sp, #16]
-    fbb0:	4398      	bics	r0, r3
-    fbb2:	1a83      	subs	r3, r0, r2
-    fbb4:	2b0f      	cmp	r3, #15
-    fbb6:	dcec      	bgt.n	fb92 <_malloc_r+0xb6>
-    fbb8:	68e2      	ldr	r2, [r4, #12]
-    fbba:	2b00      	cmp	r3, #0
-    fbbc:	db00      	blt.n	fbc0 <_malloc_r+0xe4>
-    fbbe:	e1c8      	b.n	ff52 <.text+0xff52>
-    fbc0:	1c14      	adds	r4, r2, #0
-    fbc2:	42ac      	cmp	r4, r5
-    fbc4:	d1f0      	bne.n	fba8 <_malloc_r+0xcc>
-    fbc6:	1c4f      	adds	r7, r1, #1
-    fbc8:	4894      	ldr	r0, [pc, #592]	(fe1c <.text+0xfe1c>)
-    fbca:	4b92      	ldr	r3, [pc, #584]	(fe14 <.text+0xfe14>)
-    fbcc:	6885      	ldr	r5, [r0, #8]
-    fbce:	9301      	str	r3, [sp, #4]
-    fbd0:	4285      	cmp	r5, r0
-    fbd2:	d100      	bne.n	fbd6 <_malloc_r+0xfa>
-    fbd4:	e081      	b.n	fcda <_malloc_r+0x1fe>
-    fbd6:	686a      	ldr	r2, [r5, #4]
-    fbd8:	2303      	movs	r3, #3
-    fbda:	1c14      	adds	r4, r2, #0
-    fbdc:	9904      	ldr	r1, [sp, #16]
-    fbde:	439c      	bics	r4, r3
-    fbe0:	1a60      	subs	r0, r4, r1
-    fbe2:	280f      	cmp	r0, #15
-    fbe4:	dd0e      	ble.n	fc04 <_malloc_r+0x128>
-    fbe6:	9b04      	ldr	r3, [sp, #16]
-    fbe8:	186a      	adds	r2, r5, r1
-    fbea:	2101      	movs	r1, #1
-    fbec:	430b      	orrs	r3, r1
-    fbee:	606b      	str	r3, [r5, #4]
-    fbf0:	4b8a      	ldr	r3, [pc, #552]	(fe1c <.text+0xfe1c>)
-    fbf2:	60da      	str	r2, [r3, #12]
-    fbf4:	609a      	str	r2, [r3, #8]
-    fbf6:	60d3      	str	r3, [r2, #12]
-    fbf8:	6093      	str	r3, [r2, #8]
-    fbfa:	1c03      	adds	r3, r0, #0
-    fbfc:	430b      	orrs	r3, r1
-    fbfe:	6053      	str	r3, [r2, #4]
-    fc00:	5010      	str	r0, [r2, r0]
-    fc02:	e009      	b.n	fc18 <_malloc_r+0x13c>
-    fc04:	4985      	ldr	r1, [pc, #532]	(fe1c <.text+0xfe1c>)
-    fc06:	60c9      	str	r1, [r1, #12]
-    fc08:	6089      	str	r1, [r1, #8]
-    fc0a:	2800      	cmp	r0, #0
-    fc0c:	db09      	blt.n	fc22 <_malloc_r+0x146>
-    fc0e:	192b      	adds	r3, r5, r4
-    fc10:	685a      	ldr	r2, [r3, #4]
-    fc12:	2101      	movs	r1, #1
-    fc14:	430a      	orrs	r2, r1
-    fc16:	605a      	str	r2, [r3, #4]
-    fc18:	9800      	ldr	r0, [sp, #0]
-    fc1a:	f000 f9e7 	bl	ffec <__malloc_unlock>
-    fc1e:	1c28      	adds	r0, r5, #0
-    fc20:	e1a3      	b.n	ff6a <.text+0xff6a>
-    fc22:	4b7f      	ldr	r3, [pc, #508]	(fe20 <.text+0xfe20>)
-    fc24:	429c      	cmp	r4, r3
-    fc26:	d813      	bhi.n	fc50 <_malloc_r+0x174>
-    fc28:	08e1      	lsrs	r1, r4, #3
-    fc2a:	1c0b      	adds	r3, r1, #0
-    fc2c:	2900      	cmp	r1, #0
-    fc2e:	da00      	bge.n	fc32 <_malloc_r+0x156>
-    fc30:	1ccb      	adds	r3, r1, #3
-    fc32:	9801      	ldr	r0, [sp, #4]
-    fc34:	109b      	asrs	r3, r3, #2
-    fc36:	2201      	movs	r2, #1
-    fc38:	409a      	lsls	r2, r3
-    fc3a:	6843      	ldr	r3, [r0, #4]
-    fc3c:	4313      	orrs	r3, r2
-    fc3e:	6043      	str	r3, [r0, #4]
-    fc40:	00cb      	lsls	r3, r1, #3
-    fc42:	181b      	adds	r3, r3, r0
-    fc44:	689a      	ldr	r2, [r3, #8]
-    fc46:	60eb      	str	r3, [r5, #12]
-    fc48:	60aa      	str	r2, [r5, #8]
-    fc4a:	60d5      	str	r5, [r2, #12]
-    fc4c:	609d      	str	r5, [r3, #8]
-    fc4e:	e044      	b.n	fcda <_malloc_r+0x1fe>
-    fc50:	0a62      	lsrs	r2, r4, #9
-    fc52:	2a00      	cmp	r2, #0
-    fc54:	d101      	bne.n	fc5a <_malloc_r+0x17e>
-    fc56:	08e2      	lsrs	r2, r4, #3
-    fc58:	e01f      	b.n	fc9a <_malloc_r+0x1be>
-    fc5a:	2a04      	cmp	r2, #4
-    fc5c:	d803      	bhi.n	fc66 <_malloc_r+0x18a>
-    fc5e:	09a3      	lsrs	r3, r4, #6
-    fc60:	1c1a      	adds	r2, r3, #0
-    fc62:	3238      	adds	r2, #56
-    fc64:	e019      	b.n	fc9a <_malloc_r+0x1be>
-    fc66:	2a14      	cmp	r2, #20
-    fc68:	d801      	bhi.n	fc6e <_malloc_r+0x192>
-    fc6a:	325b      	adds	r2, #91
-    fc6c:	e015      	b.n	fc9a <_malloc_r+0x1be>
-    fc6e:	2a54      	cmp	r2, #84
-    fc70:	d803      	bhi.n	fc7a <_malloc_r+0x19e>
-    fc72:	0b23      	lsrs	r3, r4, #12
-    fc74:	1c1a      	adds	r2, r3, #0
-    fc76:	326e      	adds	r2, #110
-    fc78:	e00f      	b.n	fc9a <_malloc_r+0x1be>
-    fc7a:	23aa      	movs	r3, #170
-    fc7c:	005b      	lsls	r3, r3, #1
-    fc7e:	429a      	cmp	r2, r3
-    fc80:	d803      	bhi.n	fc8a <_malloc_r+0x1ae>
-    fc82:	0be3      	lsrs	r3, r4, #15
-    fc84:	1c1a      	adds	r2, r3, #0
-    fc86:	3277      	adds	r2, #119
-    fc88:	e007      	b.n	fc9a <_malloc_r+0x1be>
-    fc8a:	4b63      	ldr	r3, [pc, #396]	(fe18 <.text+0xfe18>)
-    fc8c:	429a      	cmp	r2, r3
-    fc8e:	d901      	bls.n	fc94 <_malloc_r+0x1b8>
-    fc90:	227e      	movs	r2, #126
-    fc92:	e002      	b.n	fc9a <_malloc_r+0x1be>
-    fc94:	0ca3      	lsrs	r3, r4, #18
-    fc96:	1c1a      	adds	r2, r3, #0
-    fc98:	327c      	adds	r2, #124
-    fc9a:	9901      	ldr	r1, [sp, #4]
-    fc9c:	00d3      	lsls	r3, r2, #3
-    fc9e:	1858      	adds	r0, r3, r1
-    fca0:	6881      	ldr	r1, [r0, #8]
-    fca2:	4281      	cmp	r1, r0
-    fca4:	d10f      	bne.n	fcc6 <_malloc_r+0x1ea>
-    fca6:	485b      	ldr	r0, [pc, #364]	(fe14 <.text+0xfe14>)
-    fca8:	1c13      	adds	r3, r2, #0
-    fcaa:	2a00      	cmp	r2, #0
-    fcac:	da00      	bge.n	fcb0 <_malloc_r+0x1d4>
-    fcae:	3303      	adds	r3, #3
-    fcb0:	109b      	asrs	r3, r3, #2
-    fcb2:	2201      	movs	r2, #1
-    fcb4:	409a      	lsls	r2, r3
-    fcb6:	6843      	ldr	r3, [r0, #4]
-    fcb8:	4313      	orrs	r3, r2
-    fcba:	6043      	str	r3, [r0, #4]
-    fcbc:	1c0b      	adds	r3, r1, #0
-    fcbe:	e008      	b.n	fcd2 <_malloc_r+0x1f6>
-    fcc0:	6889      	ldr	r1, [r1, #8]
-    fcc2:	4281      	cmp	r1, r0
-    fcc4:	d004      	beq.n	fcd0 <_malloc_r+0x1f4>
-    fcc6:	684b      	ldr	r3, [r1, #4]
-    fcc8:	2203      	movs	r2, #3
-    fcca:	4393      	bics	r3, r2
-    fccc:	429c      	cmp	r4, r3
-    fcce:	d3f7      	bcc.n	fcc0 <_malloc_r+0x1e4>
-    fcd0:	68cb      	ldr	r3, [r1, #12]
-    fcd2:	60eb      	str	r3, [r5, #12]
-    fcd4:	60a9      	str	r1, [r5, #8]
-    fcd6:	60cd      	str	r5, [r1, #12]
-    fcd8:	609d      	str	r5, [r3, #8]
-    fcda:	1c3a      	adds	r2, r7, #0
-    fcdc:	2f00      	cmp	r7, #0
-    fcde:	da00      	bge.n	fce2 <_malloc_r+0x206>
-    fce0:	1cfa      	adds	r2, r7, #3
-    fce2:	2301      	movs	r3, #1
-    fce4:	1092      	asrs	r2, r2, #2
-    fce6:	1c19      	adds	r1, r3, #0
-    fce8:	4091      	lsls	r1, r2
-    fcea:	4a4a      	ldr	r2, [pc, #296]	(fe14 <.text+0xfe14>)
-    fcec:	9202      	str	r2, [sp, #8]
-    fcee:	6852      	ldr	r2, [r2, #4]
-    fcf0:	4291      	cmp	r1, r2
-    fcf2:	d84a      	bhi.n	fd8a <_malloc_r+0x2ae>
-    fcf4:	4211      	tst	r1, r2
-    fcf6:	d107      	bne.n	fd08 <_malloc_r+0x22c>
-    fcf8:	2303      	movs	r3, #3
-    fcfa:	439f      	bics	r7, r3
-    fcfc:	3704      	adds	r7, #4
-    fcfe:	e000      	b.n	fd02 <_malloc_r+0x226>
-    fd00:	3704      	adds	r7, #4
-    fd02:	0049      	lsls	r1, r1, #1
-    fd04:	4211      	tst	r1, r2
-    fd06:	d0fb      	beq.n	fd00 <_malloc_r+0x224>
-    fd08:	9801      	ldr	r0, [sp, #4]
-    fd0a:	00fb      	lsls	r3, r7, #3
-    fd0c:	181b      	adds	r3, r3, r0
-    fd0e:	9305      	str	r3, [sp, #20]
-    fd10:	46bc      	mov	ip, r7
-    fd12:	1c1e      	adds	r6, r3, #0
-    fd14:	68f4      	ldr	r4, [r6, #12]
-    fd16:	e00d      	b.n	fd34 <_malloc_r+0x258>
-    fd18:	6862      	ldr	r2, [r4, #4]
-    fd1a:	2303      	movs	r3, #3
-    fd1c:	439a      	bics	r2, r3
-    fd1e:	1c13      	adds	r3, r2, #0
-    fd20:	9a04      	ldr	r2, [sp, #16]
-    fd22:	1a9d      	subs	r5, r3, r2
-    fd24:	2d0f      	cmp	r5, #15
-    fd26:	dd00      	ble.n	fd2a <_malloc_r+0x24e>
-    fd28:	e0f6      	b.n	ff18 <.text+0xff18>
-    fd2a:	68e0      	ldr	r0, [r4, #12]
-    fd2c:	2d00      	cmp	r5, #0
-    fd2e:	db00      	blt.n	fd32 <_malloc_r+0x256>
-    fd30:	e106      	b.n	ff40 <.text+0xff40>
-    fd32:	1c04      	adds	r4, r0, #0
-    fd34:	42b4      	cmp	r4, r6
-    fd36:	d1ef      	bne.n	fd18 <_malloc_r+0x23c>
-    fd38:	2301      	movs	r3, #1
-    fd3a:	449c      	add	ip, r3
-    fd3c:	4660      	mov	r0, ip
-    fd3e:	2303      	movs	r3, #3
-    fd40:	4218      	tst	r0, r3
-    fd42:	d002      	beq.n	fd4a <_malloc_r+0x26e>
-    fd44:	1c26      	adds	r6, r4, #0
-    fd46:	3608      	adds	r6, #8
-    fd48:	e7e4      	b.n	fd14 <_malloc_r+0x238>
-    fd4a:	9805      	ldr	r0, [sp, #20]
-    fd4c:	1c3c      	adds	r4, r7, #0
-    fd4e:	2303      	movs	r3, #3
-    fd50:	421c      	tst	r4, r3
-    fd52:	d015      	beq.n	fd80 <_malloc_r+0x2a4>
-    fd54:	1c03      	adds	r3, r0, #0
-    fd56:	6802      	ldr	r2, [r0, #0]
-    fd58:	3b08      	subs	r3, #8
-    fd5a:	1c18      	adds	r0, r3, #0
-    fd5c:	429a      	cmp	r2, r3
-    fd5e:	d101      	bne.n	fd64 <_malloc_r+0x288>
-    fd60:	3c01      	subs	r4, #1
-    fd62:	e7f4      	b.n	fd4e <_malloc_r+0x272>
-    fd64:	9a02      	ldr	r2, [sp, #8]
-    fd66:	6853      	ldr	r3, [r2, #4]
-    fd68:	0049      	lsls	r1, r1, #1
-    fd6a:	4299      	cmp	r1, r3
-    fd6c:	d80d      	bhi.n	fd8a <_malloc_r+0x2ae>
-    fd6e:	2900      	cmp	r1, #0
-    fd70:	d00b      	beq.n	fd8a <_malloc_r+0x2ae>
-    fd72:	4667      	mov	r7, ip
-    fd74:	e001      	b.n	fd7a <_malloc_r+0x29e>
-    fd76:	3704      	adds	r7, #4
-    fd78:	0049      	lsls	r1, r1, #1
-    fd7a:	4219      	tst	r1, r3
-    fd7c:	d0fb      	beq.n	fd76 <_malloc_r+0x29a>
-    fd7e:	e7c3      	b.n	fd08 <_malloc_r+0x22c>
-    fd80:	9802      	ldr	r0, [sp, #8]
-    fd82:	6843      	ldr	r3, [r0, #4]
-    fd84:	438b      	bics	r3, r1
-    fd86:	6043      	str	r3, [r0, #4]
-    fd88:	e7ec      	b.n	fd64 <_malloc_r+0x288>
-    fd8a:	9902      	ldr	r1, [sp, #8]
-    fd8c:	688f      	ldr	r7, [r1, #8]
-    fd8e:	687a      	ldr	r2, [r7, #4]
-    fd90:	2303      	movs	r3, #3
-    fd92:	439a      	bics	r2, r3
-    fd94:	9b04      	ldr	r3, [sp, #16]
-    fd96:	9203      	str	r2, [sp, #12]
-    fd98:	429a      	cmp	r2, r3
-    fd9a:	d303      	bcc.n	fda4 <_malloc_r+0x2c8>
-    fd9c:	1ad0      	subs	r0, r2, r3
-    fd9e:	280f      	cmp	r0, #15
-    fda0:	dd00      	ble.n	fda4 <_malloc_r+0x2c8>
-    fda2:	e0a6      	b.n	fef2 <.text+0xfef2>
-    fda4:	4b1f      	ldr	r3, [pc, #124]	(fe24 <.text+0xfe24>)
-    fda6:	681b      	ldr	r3, [r3, #0]
-    fda8:	9804      	ldr	r0, [sp, #16]
-    fdaa:	3310      	adds	r3, #16
-    fdac:	18c4      	adds	r4, r0, r3
-    fdae:	4b1e      	ldr	r3, [pc, #120]	(fe28 <.text+0xfe28>)
-    fdb0:	681b      	ldr	r3, [r3, #0]
-    fdb2:	3301      	adds	r3, #1
-    fdb4:	d004      	beq.n	fdc0 <_malloc_r+0x2e4>
-    fdb6:	491d      	ldr	r1, [pc, #116]	(fe2c <.text+0xfe2c>)
-    fdb8:	4b1d      	ldr	r3, [pc, #116]	(fe30 <.text+0xfe30>)
-    fdba:	1862      	adds	r2, r4, r1
-    fdbc:	1c14      	adds	r4, r2, #0
-    fdbe:	401c      	ands	r4, r3
-    fdc0:	9800      	ldr	r0, [sp, #0]
-    fdc2:	1c21      	adds	r1, r4, #0
-    fdc4:	f004 ff7a 	bl	14cbc <___sbrk_r_from_thumb>
-    fdc8:	1c42      	adds	r2, r0, #1
-    fdca:	d100      	bne.n	fdce <_malloc_r+0x2f2>
-    fdcc:	e081      	b.n	fed2 <.text+0xfed2>
-    fdce:	9b03      	ldr	r3, [sp, #12]
-    fdd0:	18fe      	adds	r6, r7, r3
-    fdd2:	1c05      	adds	r5, r0, #0
-    fdd4:	42b0      	cmp	r0, r6
-    fdd6:	d203      	bcs.n	fde0 <_malloc_r+0x304>
-    fdd8:	9902      	ldr	r1, [sp, #8]
-    fdda:	428f      	cmp	r7, r1
-    fddc:	d179      	bne.n	fed2 <.text+0xfed2>
-    fdde:	e096      	b.n	ff0e <.text+0xff0e>
-    fde0:	4a14      	ldr	r2, [pc, #80]	(fe34 <.text+0xfe34>)
-    fde2:	6813      	ldr	r3, [r2, #0]
-    fde4:	18e1      	adds	r1, r4, r3
-    fde6:	6011      	str	r1, [r2, #0]
-    fde8:	42b0      	cmp	r0, r6
-    fdea:	d10a      	bne.n	fe02 <_malloc_r+0x326>
-    fdec:	4b0f      	ldr	r3, [pc, #60]	(fe2c <.text+0xfe2c>)
-    fdee:	4218      	tst	r0, r3
-    fdf0:	d107      	bne.n	fe02 <_malloc_r+0x326>
-    fdf2:	9a02      	ldr	r2, [sp, #8]
-    fdf4:	9803      	ldr	r0, [sp, #12]
-    fdf6:	6893      	ldr	r3, [r2, #8]
-    fdf8:	2101      	movs	r1, #1
-    fdfa:	1822      	adds	r2, r4, r0
-    fdfc:	430a      	orrs	r2, r1
-    fdfe:	605a      	str	r2, [r3, #4]
-    fe00:	e05b      	b.n	feba <.text+0xfeba>
-    fe02:	4a09      	ldr	r2, [pc, #36]	(fe28 <.text+0xfe28>)
-    fe04:	6813      	ldr	r3, [r2, #0]
-    fe06:	3301      	adds	r3, #1
-    fe08:	d116      	bne.n	fe38 <.text+0xfe38>
-    fe0a:	6010      	str	r0, [r2, #0]
-    fe0c:	e018      	b.n	fe40 <.text+0xfe40>
-    fe0e:	0000      	lsls	r0, r0, #0
-    fe10:	01f7      	lsls	r7, r6, #7
-    fe12:	0000      	lsls	r0, r0, #0
-    fe14:	0434      	lsls	r4, r6, #16
-    fe16:	4000      	ands	r0, r0
-    fe18:	0554      	lsls	r4, r2, #21
-    fe1a:	0000      	lsls	r0, r0, #0
-    fe1c:	043c      	lsls	r4, r7, #16
-    fe1e:	4000      	ands	r0, r0
-    fe20:	01ff      	lsls	r7, r7, #7
-    fe22:	0000      	lsls	r0, r0, #0
-    fe24:	0b00      	lsrs	r0, r0, #12
-    fe26:	4000      	ands	r0, r0
-    fe28:	0840      	lsrs	r0, r0, #1
-    fe2a:	4000      	ands	r0, r0
-    fe2c:	0fff      	lsrs	r7, r7, #31
-    fe2e:	0000      	lsls	r0, r0, #0
-    fe30:	f000 ffff 	bl	10e32 <sin+0x12>
-    fe34:	0b0c      	lsrs	r4, r1, #12
-    fe36:	4000      	ands	r0, r0
-    fe38:	4a4e      	ldr	r2, [pc, #312]	(ff74 <.text+0xff74>)
-    fe3a:	1b83      	subs	r3, r0, r6
-    fe3c:	18cb      	adds	r3, r1, r3
-    fe3e:	6013      	str	r3, [r2, #0]
-    fe40:	2307      	movs	r3, #7
-    fe42:	1c02      	adds	r2, r0, #0
-    fe44:	401a      	ands	r2, r3
-    fe46:	d101      	bne.n	fe4c <.text+0xfe4c>
-    fe48:	2100      	movs	r1, #0
-    fe4a:	e002      	b.n	fe52 <.text+0xfe52>
-    fe4c:	2308      	movs	r3, #8
-    fe4e:	1a99      	subs	r1, r3, r2
-    fe50:	1845      	adds	r5, r0, r1
-    fe52:	4b49      	ldr	r3, [pc, #292]	(ff78 <.text+0xff78>)
-    fe54:	192a      	adds	r2, r5, r4
-    fe56:	401a      	ands	r2, r3
-    fe58:	2380      	movs	r3, #128
-    fe5a:	015b      	lsls	r3, r3, #5
-    fe5c:	1a9b      	subs	r3, r3, r2
-    fe5e:	18cc      	adds	r4, r1, r3
-    fe60:	1c21      	adds	r1, r4, #0
-    fe62:	9800      	ldr	r0, [sp, #0]
-    fe64:	f004 ff2a 	bl	14cbc <___sbrk_r_from_thumb>
-    fe68:	1c41      	adds	r1, r0, #1
-    fe6a:	d101      	bne.n	fe70 <.text+0xfe70>
-    fe6c:	1c28      	adds	r0, r5, #0
-    fe6e:	2400      	movs	r4, #0
-    fe70:	4b40      	ldr	r3, [pc, #256]	(ff74 <.text+0xff74>)
-    fe72:	681a      	ldr	r2, [r3, #0]
-    fe74:	1912      	adds	r2, r2, r4
-    fe76:	601a      	str	r2, [r3, #0]
-    fe78:	1b43      	subs	r3, r0, r5
-    fe7a:	9a02      	ldr	r2, [sp, #8]
-    fe7c:	191b      	adds	r3, r3, r4
-    fe7e:	2101      	movs	r1, #1
-    fe80:	430b      	orrs	r3, r1
-    fe82:	6095      	str	r5, [r2, #8]
-    fe84:	606b      	str	r3, [r5, #4]
-    fe86:	4297      	cmp	r7, r2
-    fe88:	d017      	beq.n	feba <.text+0xfeba>
-    fe8a:	9b03      	ldr	r3, [sp, #12]
-    fe8c:	2b0f      	cmp	r3, #15
-    fe8e:	d801      	bhi.n	fe94 <.text+0xfe94>
-    fe90:	6069      	str	r1, [r5, #4]
-    fe92:	e01e      	b.n	fed2 <.text+0xfed2>
-    fe94:	9a03      	ldr	r2, [sp, #12]
-    fe96:	2307      	movs	r3, #7
-    fe98:	3a0c      	subs	r2, #12
-    fe9a:	439a      	bics	r2, r3
-    fe9c:	687b      	ldr	r3, [r7, #4]
-    fe9e:	400b      	ands	r3, r1
-    fea0:	4313      	orrs	r3, r2
-    fea2:	607b      	str	r3, [r7, #4]
-    fea4:	18b9      	adds	r1, r7, r2
-    fea6:	2305      	movs	r3, #5
-    fea8:	604b      	str	r3, [r1, #4]
-    feaa:	608b      	str	r3, [r1, #8]
-    feac:	2a0f      	cmp	r2, #15
-    feae:	d904      	bls.n	feba <.text+0xfeba>
-    feb0:	1c39      	adds	r1, r7, #0
-    feb2:	3108      	adds	r1, #8
-    feb4:	9800      	ldr	r0, [sp, #0]
-    feb6:	f7ff fb0d 	bl	f4d4 <_free_r>
-    feba:	4b2e      	ldr	r3, [pc, #184]	(ff74 <.text+0xff74>)
-    febc:	492f      	ldr	r1, [pc, #188]	(ff7c <.text+0xff7c>)
-    febe:	681a      	ldr	r2, [r3, #0]
-    fec0:	680b      	ldr	r3, [r1, #0]
-    fec2:	429a      	cmp	r2, r3
-    fec4:	d900      	bls.n	fec8 <.text+0xfec8>
-    fec6:	600a      	str	r2, [r1, #0]
-    fec8:	492d      	ldr	r1, [pc, #180]	(ff80 <.text+0xff80>)
-    feca:	680b      	ldr	r3, [r1, #0]
-    fecc:	429a      	cmp	r2, r3
-    fece:	d900      	bls.n	fed2 <.text+0xfed2>
-    fed0:	600a      	str	r2, [r1, #0]
-    fed2:	9802      	ldr	r0, [sp, #8]
-    fed4:	6883      	ldr	r3, [r0, #8]
-    fed6:	685a      	ldr	r2, [r3, #4]
-    fed8:	9904      	ldr	r1, [sp, #16]
-    feda:	2303      	movs	r3, #3
-    fedc:	439a      	bics	r2, r3
-    fede:	428a      	cmp	r2, r1
-    fee0:	d302      	bcc.n	fee8 <.text+0xfee8>
-    fee2:	1a50      	subs	r0, r2, r1
-    fee4:	280f      	cmp	r0, #15
-    fee6:	dc04      	bgt.n	fef2 <.text+0xfef2>
-    fee8:	9800      	ldr	r0, [sp, #0]
-    feea:	f000 f87f 	bl	ffec <__malloc_unlock>
-    feee:	2000      	movs	r0, #0
-    fef0:	e03c      	b.n	ff6c <.text+0xff6c>
-    fef2:	9a02      	ldr	r2, [sp, #8]
-    fef4:	9b04      	ldr	r3, [sp, #16]
-    fef6:	6894      	ldr	r4, [r2, #8]
-    fef8:	2101      	movs	r1, #1
-    fefa:	430b      	orrs	r3, r1
-    fefc:	6063      	str	r3, [r4, #4]
-    fefe:	9b04      	ldr	r3, [sp, #16]
-    ff00:	18e2      	adds	r2, r4, r3
-    ff02:	9b02      	ldr	r3, [sp, #8]
-    ff04:	609a      	str	r2, [r3, #8]
-    ff06:	1c03      	adds	r3, r0, #0
-    ff08:	430b      	orrs	r3, r1
-    ff0a:	6053      	str	r3, [r2, #4]
-    ff0c:	e029      	b.n	ff62 <.text+0xff62>
-    ff0e:	4a19      	ldr	r2, [pc, #100]	(ff74 <.text+0xff74>)
-    ff10:	6813      	ldr	r3, [r2, #0]
-    ff12:	18e1      	adds	r1, r4, r3
-    ff14:	6011      	str	r1, [r2, #0]
-    ff16:	e774      	b.n	fe02 <_malloc_r+0x326>
-    ff18:	9804      	ldr	r0, [sp, #16]
-    ff1a:	9b04      	ldr	r3, [sp, #16]
-    ff1c:	1822      	adds	r2, r4, r0
-    ff1e:	2001      	movs	r0, #1
-    ff20:	4303      	orrs	r3, r0
-    ff22:	68e1      	ldr	r1, [r4, #12]
-    ff24:	6063      	str	r3, [r4, #4]
-    ff26:	68a3      	ldr	r3, [r4, #8]
-    ff28:	60d9      	str	r1, [r3, #12]
-    ff2a:	608b      	str	r3, [r1, #8]
-    ff2c:	4915      	ldr	r1, [pc, #84]	(ff84 <.text+0xff84>)
-    ff2e:	1c2b      	adds	r3, r5, #0
-    ff30:	4303      	orrs	r3, r0
-    ff32:	60ca      	str	r2, [r1, #12]
-    ff34:	608a      	str	r2, [r1, #8]
-    ff36:	60d1      	str	r1, [r2, #12]
-    ff38:	6091      	str	r1, [r2, #8]
-    ff3a:	6053      	str	r3, [r2, #4]
-    ff3c:	5155      	str	r5, [r2, r5]
-    ff3e:	e010      	b.n	ff62 <.text+0xff62>
-    ff40:	18e1      	adds	r1, r4, r3
-    ff42:	684b      	ldr	r3, [r1, #4]
-    ff44:	2201      	movs	r2, #1
-    ff46:	4313      	orrs	r3, r2
-    ff48:	604b      	str	r3, [r1, #4]
-    ff4a:	68a3      	ldr	r3, [r4, #8]
-    ff4c:	60d8      	str	r0, [r3, #12]
-    ff4e:	6083      	str	r3, [r0, #8]
-    ff50:	e007      	b.n	ff62 <.text+0xff62>
-    ff52:	68a3      	ldr	r3, [r4, #8]
-    ff54:	60da      	str	r2, [r3, #12]
-    ff56:	6093      	str	r3, [r2, #8]
-    ff58:	1821      	adds	r1, r4, r0
-    ff5a:	684b      	ldr	r3, [r1, #4]
-    ff5c:	2201      	movs	r2, #1
-    ff5e:	4313      	orrs	r3, r2
-    ff60:	604b      	str	r3, [r1, #4]
-    ff62:	9800      	ldr	r0, [sp, #0]
-    ff64:	f000 f842 	bl	ffec <__malloc_unlock>
-    ff68:	1c20      	adds	r0, r4, #0
-    ff6a:	3008      	adds	r0, #8
-    ff6c:	b006      	add	sp, #24
-    ff6e:	bcf0      	pop	{r4, r5, r6, r7}
-    ff70:	bc02      	pop	{r1}
-    ff72:	4708      	bx	r1
-    ff74:	0b0c      	lsrs	r4, r1, #12
-    ff76:	4000      	ands	r0, r0
-    ff78:	0fff      	lsrs	r7, r7, #31
-    ff7a:	0000      	lsls	r0, r0, #0
-    ff7c:	0b04      	lsrs	r4, r0, #12
-    ff7e:	4000      	ands	r0, r0
-    ff80:	0b08      	lsrs	r0, r1, #12
-    ff82:	4000      	ands	r0, r0
-    ff84:	043c      	lsls	r4, r7, #16
-    ff86:	4000      	ands	r0, r0
-
-0000ff88 <memchr>:
-    ff88:	23ff      	movs	r3, #255
-    ff8a:	4019      	ands	r1, r3
-    ff8c:	e003      	b.n	ff96 <memchr+0xe>
-    ff8e:	7803      	ldrb	r3, [r0, #0]
-    ff90:	428b      	cmp	r3, r1
-    ff92:	d003      	beq.n	ff9c <memchr+0x14>
-    ff94:	3001      	adds	r0, #1
-    ff96:	3a01      	subs	r2, #1
-    ff98:	d2f9      	bcs.n	ff8e <memchr+0x6>
-    ff9a:	2000      	movs	r0, #0
-    ff9c:	4770      	bx	lr
-    ff9e:	46c0      	nop			(mov r8, r8)
-
-0000ffa0 <memmove>:
-    ffa0:	b530      	push	{r4, r5, lr}
-    ffa2:	1c05      	adds	r5, r0, #0
-    ffa4:	1c04      	adds	r4, r0, #0
-    ffa6:	42a9      	cmp	r1, r5
-    ffa8:	d20f      	bcs.n	ffca <memmove+0x2a>
-    ffaa:	1888      	adds	r0, r1, r2
-    ffac:	4285      	cmp	r5, r0
-    ffae:	d20c      	bcs.n	ffca <memmove+0x2a>
-    ffb0:	18a9      	adds	r1, r5, r2
-    ffb2:	e003      	b.n	ffbc <memmove+0x1c>
-    ffb4:	3801      	subs	r0, #1
-    ffb6:	7803      	ldrb	r3, [r0, #0]
-    ffb8:	3901      	subs	r1, #1
-    ffba:	700b      	strb	r3, [r1, #0]
-    ffbc:	3a01      	subs	r2, #1
-    ffbe:	d2f9      	bcs.n	ffb4 <memmove+0x14>
-    ffc0:	e005      	b.n	ffce <memmove+0x2e>
-    ffc2:	780b      	ldrb	r3, [r1, #0]
-    ffc4:	3101      	adds	r1, #1
-    ffc6:	7023      	strb	r3, [r4, #0]
-    ffc8:	3401      	adds	r4, #1
-    ffca:	3a01      	subs	r2, #1
-    ffcc:	d2f9      	bcs.n	ffc2 <memmove+0x22>
-    ffce:	1c28      	adds	r0, r5, #0
-    ffd0:	bc30      	pop	{r4, r5}
-    ffd2:	bc02      	pop	{r1}
-    ffd4:	4708      	bx	r1
-    ffd6:	46c0      	nop			(mov r8, r8)
-
-0000ffd8 <memset>:
-    ffd8:	1c03      	adds	r3, r0, #0
-    ffda:	e001      	b.n	ffe0 <memset+0x8>
-    ffdc:	7019      	strb	r1, [r3, #0]
-    ffde:	3301      	adds	r3, #1
-    ffe0:	3a01      	subs	r2, #1
-    ffe2:	d2fb      	bcs.n	ffdc <memset+0x4>
-    ffe4:	4770      	bx	lr
-    ffe6:	46c0      	nop			(mov r8, r8)
-
-0000ffe8 <__malloc_lock>:
-    ffe8:	4770      	bx	lr
-	...
-
-0000ffec <__malloc_unlock>:
-    ffec:	4770      	bx	lr
-    ffee:	46c0      	nop			(mov r8, r8)
-
-0000fff0 <_Bfree>:
-    fff0:	1c02      	adds	r2, r0, #0
-    fff2:	1c08      	adds	r0, r1, #0
-    fff4:	2900      	cmp	r1, #0
-    fff6:	d005      	beq.n	10004 <_Bfree+0x14>
-    fff8:	684b      	ldr	r3, [r1, #4]
-    fffa:	6cd1      	ldr	r1, [r2, #76]
-    fffc:	009b      	lsls	r3, r3, #2
-    fffe:	585a      	ldr	r2, [r3, r1]
-   10000:	6002      	str	r2, [r0, #0]
-   10002:	5058      	str	r0, [r3, r1]
-   10004:	4770      	bx	lr
-	...
-
-00010008 <_hi0bits>:
-   10008:	4b10      	ldr	r3, [pc, #64]	(1004c <.text+0x1004c>)
-   1000a:	4218      	tst	r0, r3
-   1000c:	d001      	beq.n	10012 <_hi0bits+0xa>
-   1000e:	2200      	movs	r2, #0
-   10010:	e001      	b.n	10016 <_hi0bits+0xe>
-   10012:	0400      	lsls	r0, r0, #16
-   10014:	2210      	movs	r2, #16
-   10016:	23ff      	movs	r3, #255
-   10018:	061b      	lsls	r3, r3, #24
-   1001a:	4218      	tst	r0, r3
-   1001c:	d101      	bne.n	10022 <_hi0bits+0x1a>
-   1001e:	3208      	adds	r2, #8
-   10020:	0200      	lsls	r0, r0, #8
-   10022:	23f0      	movs	r3, #240
-   10024:	061b      	lsls	r3, r3, #24
-   10026:	4218      	tst	r0, r3
-   10028:	d101      	bne.n	1002e <_hi0bits+0x26>
-   1002a:	3204      	adds	r2, #4
-   1002c:	0100      	lsls	r0, r0, #4
-   1002e:	23c0      	movs	r3, #192
-   10030:	061b      	lsls	r3, r3, #24
-   10032:	4218      	tst	r0, r3
-   10034:	d101      	bne.n	1003a <_hi0bits+0x32>
-   10036:	3202      	adds	r2, #2
-   10038:	0080      	lsls	r0, r0, #2
-   1003a:	2800      	cmp	r0, #0
-   1003c:	db04      	blt.n	10048 <_hi0bits+0x40>
-   1003e:	0043      	lsls	r3, r0, #1
-   10040:	d401      	bmi.n	10046 <_hi0bits+0x3e>
-   10042:	2220      	movs	r2, #32
-   10044:	e000      	b.n	10048 <_hi0bits+0x40>
-   10046:	3201      	adds	r2, #1
-   10048:	1c10      	adds	r0, r2, #0
-   1004a:	4770      	bx	lr
-   1004c:	0000      	lsls	r0, r0, #0
-   1004e:	ffff 6802 	vtbl.8	d22, {d15}, d2
-
-00010050 <_lo0bits>:
-   10050:	6802      	ldr	r2, [r0, #0]
-   10052:	2307      	movs	r3, #7
-   10054:	1c01      	adds	r1, r0, #0
-   10056:	421a      	tst	r2, r3
-   10058:	d00d      	beq.n	10076 <_lo0bits+0x26>
-   1005a:	07d3      	lsls	r3, r2, #31
-   1005c:	d501      	bpl.n	10062 <_lo0bits+0x12>
-   1005e:	2000      	movs	r0, #0
-   10060:	e028      	b.n	100b4 <_lo0bits+0x64>
-   10062:	0793      	lsls	r3, r2, #30
-   10064:	d503      	bpl.n	1006e <_lo0bits+0x1e>
-   10066:	0853      	lsrs	r3, r2, #1
-   10068:	6003      	str	r3, [r0, #0]
-   1006a:	2001      	movs	r0, #1
-   1006c:	e022      	b.n	100b4 <_lo0bits+0x64>
-   1006e:	0893      	lsrs	r3, r2, #2
-   10070:	6003      	str	r3, [r0, #0]
-   10072:	2002      	movs	r0, #2
-   10074:	e01e      	b.n	100b4 <_lo0bits+0x64>
-   10076:	4b10      	ldr	r3, [pc, #64]	(100b8 <.text+0x100b8>)
-   10078:	421a      	tst	r2, r3
-   1007a:	d001      	beq.n	10080 <_lo0bits+0x30>
-   1007c:	2000      	movs	r0, #0
-   1007e:	e001      	b.n	10084 <_lo0bits+0x34>
-   10080:	0c12      	lsrs	r2, r2, #16
-   10082:	2010      	movs	r0, #16
-   10084:	23ff      	movs	r3, #255
-   10086:	421a      	tst	r2, r3
-   10088:	d101      	bne.n	1008e <_lo0bits+0x3e>
-   1008a:	3008      	adds	r0, #8
-   1008c:	0a12      	lsrs	r2, r2, #8
-   1008e:	230f      	movs	r3, #15
-   10090:	421a      	tst	r2, r3
-   10092:	d101      	bne.n	10098 <_lo0bits+0x48>
-   10094:	3004      	adds	r0, #4
-   10096:	0912      	lsrs	r2, r2, #4
-   10098:	2303      	movs	r3, #3
-   1009a:	421a      	tst	r2, r3
-   1009c:	d101      	bne.n	100a2 <_lo0bits+0x52>
-   1009e:	3002      	adds	r0, #2
-   100a0:	0892      	lsrs	r2, r2, #2
-   100a2:	07d3      	lsls	r3, r2, #31
-   100a4:	d405      	bmi.n	100b2 <_lo0bits+0x62>
-   100a6:	0852      	lsrs	r2, r2, #1
-   100a8:	2a00      	cmp	r2, #0
-   100aa:	d101      	bne.n	100b0 <_lo0bits+0x60>
-   100ac:	2020      	movs	r0, #32
-   100ae:	e001      	b.n	100b4 <_lo0bits+0x64>
-   100b0:	3001      	adds	r0, #1
-   100b2:	600a      	str	r2, [r1, #0]
-   100b4:	4770      	bx	lr
-   100b6:	0000      	lsls	r0, r0, #0
-   100b8:	ffff 0000 	vaddl.u<illegal width 64>	q8, d15, d0
-
-000100bc <__mcmp>:
-   100bc:	b530      	push	{r4, r5, lr}
-   100be:	6903      	ldr	r3, [r0, #16]
-   100c0:	690a      	ldr	r2, [r1, #16]
-   100c2:	1c04      	adds	r4, r0, #0
-   100c4:	1a98      	subs	r0, r3, r2
-   100c6:	2800      	cmp	r0, #0
-   100c8:	d114      	bne.n	100f4 <__mcmp+0x38>
-   100ca:	1c25      	adds	r5, r4, #0
-   100cc:	0093      	lsls	r3, r2, #2
-   100ce:	3514      	adds	r5, #20
-   100d0:	18ea      	adds	r2, r5, r3
-   100d2:	3314      	adds	r3, #20
-   100d4:	18c9      	adds	r1, r1, r3
-   100d6:	3a04      	subs	r2, #4
-   100d8:	3904      	subs	r1, #4
-   100da:	6814      	ldr	r4, [r2, #0]
-   100dc:	680b      	ldr	r3, [r1, #0]
-   100de:	429c      	cmp	r4, r3
-   100e0:	d006      	beq.n	100f0 <__mcmp+0x34>
-   100e2:	429c      	cmp	r4, r3
-   100e4:	d202      	bcs.n	100ec <__mcmp+0x30>
-   100e6:	2001      	movs	r0, #1
-   100e8:	4240      	negs	r0, r0
-   100ea:	e003      	b.n	100f4 <__mcmp+0x38>
-   100ec:	2001      	movs	r0, #1
-   100ee:	e001      	b.n	100f4 <__mcmp+0x38>
-   100f0:	42aa      	cmp	r2, r5
-   100f2:	d8f0      	bhi.n	100d6 <__mcmp+0x1a>
-   100f4:	bc30      	pop	{r4, r5}
-   100f6:	bc02      	pop	{r1}
-   100f8:	4708      	bx	r1
-	...
-
-000100fc <_ulp>:
-   100fc:	b530      	push	{r4, r5, lr}
-   100fe:	4b11      	ldr	r3, [pc, #68]	(10144 <.text+0x10144>)
-   10100:	4a11      	ldr	r2, [pc, #68]	(10148 <.text+0x10148>)
-   10102:	4003      	ands	r3, r0
-   10104:	189b      	adds	r3, r3, r2
-   10106:	2b00      	cmp	r3, #0
-   10108:	dd01      	ble.n	1010e <_ulp+0x12>
-   1010a:	1c1c      	adds	r4, r3, #0
-   1010c:	e007      	b.n	1011e <_ulp+0x22>
-   1010e:	425b      	negs	r3, r3
-   10110:	151a      	asrs	r2, r3, #20
-   10112:	2a13      	cmp	r2, #19
-   10114:	dc05      	bgt.n	10122 <_ulp+0x26>
-   10116:	2380      	movs	r3, #128
-   10118:	031b      	lsls	r3, r3, #12
-   1011a:	1c1c      	adds	r4, r3, #0
-   1011c:	4114      	asrs	r4, r2
-   1011e:	2500      	movs	r5, #0
-   10120:	e00a      	b.n	10138 <_ulp+0x3c>
-   10122:	3a14      	subs	r2, #20
-   10124:	2a1e      	cmp	r2, #30
-   10126:	dd01      	ble.n	1012c <_ulp+0x30>
-   10128:	2201      	movs	r2, #1
-   1012a:	e003      	b.n	10134 <_ulp+0x38>
-   1012c:	231f      	movs	r3, #31
-   1012e:	1a9b      	subs	r3, r3, r2
-   10130:	2201      	movs	r2, #1
-   10132:	409a      	lsls	r2, r3
-   10134:	2400      	movs	r4, #0
-   10136:	1c15      	adds	r5, r2, #0
-   10138:	1c29      	adds	r1, r5, #0
-   1013a:	1c20      	adds	r0, r4, #0
-   1013c:	bc30      	pop	{r4, r5}
-   1013e:	bc04      	pop	{r2}
-   10140:	4710      	bx	r2
-   10142:	0000      	lsls	r0, r0, #0
-   10144:	0000      	lsls	r0, r0, #0
-   10146:	7ff0      	ldrb	r0, [r6, #31]
-   10148:	0000      	lsls	r0, r0, #0
-   1014a:	fcc0 b5f0 	stc2l	5, cr11, [r0], {240}
-
-0001014c <_b2d>:
-   1014c:	b5f0      	push	{r4, r5, r6, r7, lr}
-   1014e:	b083      	sub	sp, #12
-   10150:	6903      	ldr	r3, [r0, #16]
-   10152:	9100      	str	r1, [sp, #0]
-   10154:	1c01      	adds	r1, r0, #0
-   10156:	3114      	adds	r1, #20
-   10158:	009b      	lsls	r3, r3, #2
-   1015a:	18cc      	adds	r4, r1, r3
-   1015c:	1f25      	subs	r5, r4, #4
-   1015e:	682a      	ldr	r2, [r5, #0]
-   10160:	1c10      	adds	r0, r2, #0
-   10162:	9101      	str	r1, [sp, #4]
-   10164:	9202      	str	r2, [sp, #8]
-   10166:	f7ff ff4f 	bl	10008 <_hi0bits>
-   1016a:	2320      	movs	r3, #32
-   1016c:	9900      	ldr	r1, [sp, #0]
-   1016e:	1a1b      	subs	r3, r3, r0
-   10170:	600b      	str	r3, [r1, #0]
-   10172:	280a      	cmp	r0, #10
-   10174:	dc18      	bgt.n	101a8 <_b2d+0x5c>
-   10176:	9a01      	ldr	r2, [sp, #4]
-   10178:	230b      	movs	r3, #11
-   1017a:	1a19      	subs	r1, r3, r0
-   1017c:	4295      	cmp	r5, r2
-   1017e:	d801      	bhi.n	10184 <_b2d+0x38>
-   10180:	2400      	movs	r4, #0
-   10182:	e002      	b.n	1018a <_b2d+0x3e>
-   10184:	1c23      	adds	r3, r4, #0
-   10186:	3b08      	subs	r3, #8
-   10188:	681c      	ldr	r4, [r3, #0]
-   1018a:	9a02      	ldr	r2, [sp, #8]
-   1018c:	4b1e      	ldr	r3, [pc, #120]	(10208 <.text+0x10208>)
-   1018e:	40ca      	lsrs	r2, r1
-   10190:	1c16      	adds	r6, r2, #0
-   10192:	431e      	orrs	r6, r3
-   10194:	9a02      	ldr	r2, [sp, #8]
-   10196:	1c03      	adds	r3, r0, #0
-   10198:	3315      	adds	r3, #21
-   1019a:	409a      	lsls	r2, r3
-   1019c:	1c13      	adds	r3, r2, #0
-   1019e:	1c22      	adds	r2, r4, #0
-   101a0:	40ca      	lsrs	r2, r1
-   101a2:	1c1f      	adds	r7, r3, #0
-   101a4:	4317      	orrs	r7, r2
-   101a6:	e029      	b.n	101fc <_b2d+0xb0>
-   101a8:	9b01      	ldr	r3, [sp, #4]
-   101aa:	429d      	cmp	r5, r3
-   101ac:	d801      	bhi.n	101b2 <_b2d+0x66>
-   101ae:	2400      	movs	r4, #0
-   101b0:	e002      	b.n	101b8 <_b2d+0x6c>
-   101b2:	1c25      	adds	r5, r4, #0
-   101b4:	3d08      	subs	r5, #8
-   101b6:	682c      	ldr	r4, [r5, #0]
-   101b8:	380b      	subs	r0, #11
-   101ba:	2800      	cmp	r0, #0
-   101bc:	d01a      	beq.n	101f4 <_b2d+0xa8>
-   101be:	2320      	movs	r3, #32
-   101c0:	9901      	ldr	r1, [sp, #4]
-   101c2:	1a1b      	subs	r3, r3, r0
-   101c4:	469c      	mov	ip, r3
-   101c6:	428d      	cmp	r5, r1
-   101c8:	d801      	bhi.n	101ce <_b2d+0x82>
-   101ca:	2500      	movs	r5, #0
-   101cc:	e001      	b.n	101d2 <_b2d+0x86>
-   101ce:	1f2b      	subs	r3, r5, #4
-   101d0:	681d      	ldr	r5, [r3, #0]
-   101d2:	4662      	mov	r2, ip
-   101d4:	1c21      	adds	r1, r4, #0
-   101d6:	9b02      	ldr	r3, [sp, #8]
-   101d8:	40d1      	lsrs	r1, r2
-   101da:	4a0b      	ldr	r2, [pc, #44]	(10208 <.text+0x10208>)
-   101dc:	4083      	lsls	r3, r0
-   101de:	4313      	orrs	r3, r2
-   101e0:	1c0e      	adds	r6, r1, #0
-   101e2:	1c22      	adds	r2, r4, #0
-   101e4:	431e      	orrs	r6, r3
-   101e6:	4082      	lsls	r2, r0
-   101e8:	1c2b      	adds	r3, r5, #0
-   101ea:	4661      	mov	r1, ip
-   101ec:	40cb      	lsrs	r3, r1
-   101ee:	1c17      	adds	r7, r2, #0
-   101f0:	431f      	orrs	r7, r3
-   101f2:	e003      	b.n	101fc <_b2d+0xb0>
-   101f4:	4b04      	ldr	r3, [pc, #16]	(10208 <.text+0x10208>)
-   101f6:	9e02      	ldr	r6, [sp, #8]
-   101f8:	1c27      	adds	r7, r4, #0
-   101fa:	431e      	orrs	r6, r3
-   101fc:	1c30      	adds	r0, r6, #0
-   101fe:	1c39      	adds	r1, r7, #0
-   10200:	b003      	add	sp, #12
-   10202:	bcf0      	pop	{r4, r5, r6, r7}
-   10204:	bc04      	pop	{r2}
-   10206:	4710      	bx	r2
-   10208:	0000      	lsls	r0, r0, #0
-   1020a:	3ff0      	subs	r7, #240
-
-0001020c <_ratio>:
-   1020c:	b5f0      	push	{r4, r5, r6, r7, lr}
-   1020e:	b084      	sub	sp, #16
-   10210:	1c0d      	adds	r5, r1, #0
-   10212:	a902      	add	r1, sp, #8
-   10214:	1c04      	adds	r4, r0, #0
-   10216:	f7ff ff99 	bl	1014c <_b2d>
-   1021a:	9000      	str	r0, [sp, #0]
-   1021c:	9101      	str	r1, [sp, #4]
-   1021e:	1c28      	adds	r0, r5, #0
-   10220:	a903      	add	r1, sp, #12
-   10222:	f7ff ff93 	bl	1014c <_b2d>
-   10226:	9b03      	ldr	r3, [sp, #12]
-   10228:	1c0f      	adds	r7, r1, #0
-   1022a:	9902      	ldr	r1, [sp, #8]
-   1022c:	692a      	ldr	r2, [r5, #16]
-   1022e:	1ac9      	subs	r1, r1, r3
-   10230:	6923      	ldr	r3, [r4, #16]
-   10232:	1a9b      	subs	r3, r3, r2
-   10234:	015b      	lsls	r3, r3, #5
-   10236:	18c9      	adds	r1, r1, r3
-   10238:	1c06      	adds	r6, r0, #0
-   1023a:	2900      	cmp	r1, #0
-   1023c:	dd04      	ble.n	10248 <_ratio+0x3c>
-   1023e:	9a00      	ldr	r2, [sp, #0]
-   10240:	050b      	lsls	r3, r1, #20
-   10242:	189b      	adds	r3, r3, r2
-   10244:	9300      	str	r3, [sp, #0]
-   10246:	e001      	b.n	1024c <_ratio+0x40>
-   10248:	050b      	lsls	r3, r1, #20
-   1024a:	1af6      	subs	r6, r6, r3
-   1024c:	9800      	ldr	r0, [sp, #0]
-   1024e:	9901      	ldr	r1, [sp, #4]
-   10250:	1c32      	adds	r2, r6, #0
-   10252:	1c3b      	adds	r3, r7, #0
-   10254:	f004 fd26 	bl	14ca4 <____divdf3_from_thumb>
-   10258:	b004      	add	sp, #16
-   1025a:	bcf0      	pop	{r4, r5, r6, r7}
-   1025c:	bc04      	pop	{r2}
-   1025e:	4710      	bx	r2
-
-00010260 <_mprec_log10>:
-   10260:	b510      	push	{r4, lr}
-   10262:	1c04      	adds	r4, r0, #0
-   10264:	2817      	cmp	r0, #23
-   10266:	dd02      	ble.n	1026e <_mprec_log10+0xe>
-   10268:	490a      	ldr	r1, [pc, #40]	(10294 <.text+0x10294>)
-   1026a:	4809      	ldr	r0, [pc, #36]	(10290 <.text+0x10290>)
-   1026c:	e00a      	b.n	10284 <_mprec_log10+0x24>
-   1026e:	4a0a      	ldr	r2, [pc, #40]	(10298 <.text+0x10298>)
-   10270:	00c3      	lsls	r3, r0, #3
-   10272:	189b      	adds	r3, r3, r2
-   10274:	6818      	ldr	r0, [r3, #0]
-   10276:	6859      	ldr	r1, [r3, #4]
-   10278:	e006      	b.n	10288 <_mprec_log10+0x28>
-   1027a:	4a08      	ldr	r2, [pc, #32]	(1029c <.text+0x1029c>)
-   1027c:	4b08      	ldr	r3, [pc, #32]	(102a0 <.text+0x102a0>)
-   1027e:	f004 fd09 	bl	14c94 <____muldf3_from_thumb>
-   10282:	3c01      	subs	r4, #1
-   10284:	2c00      	cmp	r4, #0
-   10286:	d1f8      	bne.n	1027a <_mprec_log10+0x1a>
-   10288:	bc10      	pop	{r4}
-   1028a:	bc04      	pop	{r2}
-   1028c:	4710      	bx	r2
-   1028e:	0000      	lsls	r0, r0, #0
-   10290:	0000      	lsls	r0, r0, #0
-   10292:	3ff0      	subs	r7, #240
-   10294:	0000      	lsls	r0, r0, #0
-   10296:	0000      	lsls	r0, r0, #0
-   10298:	503c      	str	r4, [r7, r0]
-   1029a:	0001      	lsls	r1, r0, #0
-   1029c:	0000      	lsls	r0, r0, #0
-   1029e:	4024      	ands	r4, r4
-   102a0:	0000      	lsls	r0, r0, #0
-	...
-
-000102a4 <_Balloc>:
-   102a4:	b5f0      	push	{r4, r5, r6, r7, lr}
-   102a6:	6cc3      	ldr	r3, [r0, #76]
-   102a8:	1c05      	adds	r5, r0, #0
-   102aa:	1c0e      	adds	r6, r1, #0
-   102ac:	2b00      	cmp	r3, #0
-   102ae:	d108      	bne.n	102c2 <_Balloc+0x1e>
-   102b0:	2104      	movs	r1, #4
-   102b2:	2210      	movs	r2, #16
-   102b4:	f000 fcd6 	bl	10c64 <_calloc_r>
-   102b8:	64e8      	str	r0, [r5, #76]
-   102ba:	2800      	cmp	r0, #0
-   102bc:	d101      	bne.n	102c2 <_Balloc+0x1e>
-   102be:	2400      	movs	r4, #0
-   102c0:	e019      	b.n	102f6 <_Balloc+0x52>
-   102c2:	6ceb      	ldr	r3, [r5, #76]
-   102c4:	00b2      	lsls	r2, r6, #2
-   102c6:	18d2      	adds	r2, r2, r3
-   102c8:	6814      	ldr	r4, [r2, #0]
-   102ca:	2c00      	cmp	r4, #0
-   102cc:	d002      	beq.n	102d4 <_Balloc+0x30>
-   102ce:	6823      	ldr	r3, [r4, #0]
-   102d0:	6013      	str	r3, [r2, #0]
-   102d2:	e00d      	b.n	102f0 <_Balloc+0x4c>
-   102d4:	2301      	movs	r3, #1
-   102d6:	1c1f      	adds	r7, r3, #0
-   102d8:	40b7      	lsls	r7, r6
-   102da:	00ba      	lsls	r2, r7, #2
-   102dc:	3214      	adds	r2, #20
-   102de:	1c28      	adds	r0, r5, #0
-   102e0:	2101      	movs	r1, #1
-   102e2:	f000 fcbf 	bl	10c64 <_calloc_r>
-   102e6:	2800      	cmp	r0, #0
-   102e8:	d005      	beq.n	102f6 <_Balloc+0x52>
-   102ea:	6046      	str	r6, [r0, #4]
-   102ec:	6087      	str	r7, [r0, #8]
-   102ee:	1c04      	adds	r4, r0, #0
-   102f0:	2300      	movs	r3, #0
-   102f2:	6123      	str	r3, [r4, #16]
-   102f4:	60e3      	str	r3, [r4, #12]
-   102f6:	1c20      	adds	r0, r4, #0
-   102f8:	bcf0      	pop	{r4, r5, r6, r7}
-   102fa:	bc02      	pop	{r1}
-   102fc:	4708      	bx	r1
-	...
-
-00010300 <_d2b>:
-   10300:	b5f0      	push	{r4, r5, r6, r7, lr}
-   10302:	b084      	sub	sp, #16
-   10304:	1c0c      	adds	r4, r1, #0
-   10306:	2101      	movs	r1, #1
-   10308:	9300      	str	r3, [sp, #0]
-   1030a:	1c15      	adds	r5, r2, #0
-   1030c:	f7ff ffca 	bl	102a4 <_Balloc>
-   10310:	1c01      	adds	r1, r0, #0
-   10312:	3114      	adds	r1, #20
-   10314:	4b2b      	ldr	r3, [pc, #172]	(103c4 <.text+0x103c4>)
-   10316:	9101      	str	r1, [sp, #4]
-   10318:	1c21      	adds	r1, r4, #0
-   1031a:	4019      	ands	r1, r3
-   1031c:	4b2a      	ldr	r3, [pc, #168]	(103c8 <.text+0x103c8>)
-   1031e:	1c22      	adds	r2, r4, #0
-   10320:	401a      	ands	r2, r3
-   10322:	0d17      	lsrs	r7, r2, #20
-   10324:	1c06      	adds	r6, r0, #0
-   10326:	9103      	str	r1, [sp, #12]
-   10328:	2f00      	cmp	r7, #0
-   1032a:	d003      	beq.n	10334 <_d2b+0x34>
-   1032c:	2380      	movs	r3, #128
-   1032e:	035b      	lsls	r3, r3, #13
-   10330:	430b      	orrs	r3, r1
-   10332:	9303      	str	r3, [sp, #12]
-   10334:	2d00      	cmp	r5, #0
-   10336:	d01b      	beq.n	10370 <_d2b+0x70>
-   10338:	a802      	add	r0, sp, #8
-   1033a:	9502      	str	r5, [sp, #8]
-   1033c:	f7ff fe88 	bl	10050 <_lo0bits>
-   10340:	9902      	ldr	r1, [sp, #8]
-   10342:	2800      	cmp	r0, #0
-   10344:	d009      	beq.n	1035a <_d2b+0x5a>
-   10346:	9b03      	ldr	r3, [sp, #12]
-   10348:	2220      	movs	r2, #32
-   1034a:	1a12      	subs	r2, r2, r0
-   1034c:	4093      	lsls	r3, r2
-   1034e:	430b      	orrs	r3, r1
-   10350:	6173      	str	r3, [r6, #20]
-   10352:	9b03      	ldr	r3, [sp, #12]
-   10354:	40c3      	lsrs	r3, r0
-   10356:	9303      	str	r3, [sp, #12]
-   10358:	e000      	b.n	1035c <_d2b+0x5c>
-   1035a:	6171      	str	r1, [r6, #20]
-   1035c:	9b03      	ldr	r3, [sp, #12]
-   1035e:	9a01      	ldr	r2, [sp, #4]
-   10360:	6053      	str	r3, [r2, #4]
-   10362:	2b00      	cmp	r3, #0
-   10364:	d001      	beq.n	1036a <_d2b+0x6a>
-   10366:	2202      	movs	r2, #2
-   10368:	e000      	b.n	1036c <_d2b+0x6c>
-   1036a:	2201      	movs	r2, #1
-   1036c:	6132      	str	r2, [r6, #16]
-   1036e:	e008      	b.n	10382 <_d2b+0x82>
-   10370:	a803      	add	r0, sp, #12
-   10372:	f7ff fe6d 	bl	10050 <_lo0bits>
-   10376:	9b03      	ldr	r3, [sp, #12]
-   10378:	6173      	str	r3, [r6, #20]
-   1037a:	2301      	movs	r3, #1
-   1037c:	6133      	str	r3, [r6, #16]
-   1037e:	3020      	adds	r0, #32
-   10380:	2201      	movs	r2, #1
-   10382:	2f00      	cmp	r7, #0
-   10384:	d009      	beq.n	1039a <_d2b+0x9a>
-   10386:	4911      	ldr	r1, [pc, #68]	(103cc <.text+0x103cc>)
-   10388:	183b      	adds	r3, r7, r0
-   1038a:	9a00      	ldr	r2, [sp, #0]
-   1038c:	185b      	adds	r3, r3, r1
-   1038e:	6013      	str	r3, [r2, #0]
-   10390:	9909      	ldr	r1, [sp, #36]
-   10392:	2335      	movs	r3, #53
-   10394:	1a1b      	subs	r3, r3, r0
-   10396:	600b      	str	r3, [r1, #0]
-   10398:	e00e      	b.n	103b8 <_d2b+0xb8>
-   1039a:	490d      	ldr	r1, [pc, #52]	(103d0 <.text+0x103d0>)
-   1039c:	1843      	adds	r3, r0, r1
-   1039e:	9900      	ldr	r1, [sp, #0]
-   103a0:	0154      	lsls	r4, r2, #5
-   103a2:	600b      	str	r3, [r1, #0]
-   103a4:	0093      	lsls	r3, r2, #2
-   103a6:	9a01      	ldr	r2, [sp, #4]
-   103a8:	189b      	adds	r3, r3, r2
-   103aa:	3b04      	subs	r3, #4
-   103ac:	6818      	ldr	r0, [r3, #0]
-   103ae:	f7ff fe2b 	bl	10008 <_hi0bits>
-   103b2:	9b09      	ldr	r3, [sp, #36]
-   103b4:	1a24      	subs	r4, r4, r0
-   103b6:	601c      	str	r4, [r3, #0]
-   103b8:	1c30      	adds	r0, r6, #0
-   103ba:	b004      	add	sp, #16
-   103bc:	bcf0      	pop	{r4, r5, r6, r7}
-   103be:	bc02      	pop	{r1}
-   103c0:	4708      	bx	r1
-   103c2:	0000      	lsls	r0, r0, #0
-   103c4:	ffff 000f 	vaddl.u<illegal width 64>	q8, d15, d15
-   103c8:	ffff 7fff 	undefined
-   103cc:	fbcd ffff 	undefined
-   103d0:	fbce ffff 	undefined
-
-000103d4 <__mdiff>:
-   103d4:	b5f0      	push	{r4, r5, r6, r7, lr}
-   103d6:	b083      	sub	sp, #12
-   103d8:	1c07      	adds	r7, r0, #0
-   103da:	1c0d      	adds	r5, r1, #0
-   103dc:	1c08      	adds	r0, r1, #0
-   103de:	1c11      	adds	r1, r2, #0
-   103e0:	1c16      	adds	r6, r2, #0
-   103e2:	f7ff fe6b 	bl	100bc <__mcmp>
-   103e6:	1c04      	adds	r4, r0, #0
-   103e8:	2800      	cmp	r0, #0
-   103ea:	d108      	bne.n	103fe <__mdiff+0x2a>
-   103ec:	1c38      	adds	r0, r7, #0
-   103ee:	2100      	movs	r1, #0
-   103f0:	f7ff ff58 	bl	102a4 <_Balloc>
-   103f4:	2301      	movs	r3, #1
-   103f6:	1c07      	adds	r7, r0, #0
-   103f8:	6103      	str	r3, [r0, #16]
-   103fa:	6144      	str	r4, [r0, #20]
-   103fc:	e053      	b.n	104a6 <__mdiff+0xd2>
-   103fe:	2800      	cmp	r0, #0
-   10400:	da04      	bge.n	1040c <__mdiff+0x38>
-   10402:	46b4      	mov	ip, r6
-   10404:	2401      	movs	r4, #1
-   10406:	1c2e      	adds	r6, r5, #0
-   10408:	4665      	mov	r5, ip
-   1040a:	e000      	b.n	1040e <__mdiff+0x3a>
-   1040c:	2400      	movs	r4, #0
-   1040e:	6869      	ldr	r1, [r5, #4]
-   10410:	1c38      	adds	r0, r7, #0
-   10412:	f7ff ff47 	bl	102a4 <_Balloc>
-   10416:	692a      	ldr	r2, [r5, #16]
-   10418:	3514      	adds	r5, #20
-   1041a:	46ac      	mov	ip, r5
-   1041c:	0093      	lsls	r3, r2, #2
-   1041e:	4463      	add	r3, ip
-   10420:	9301      	str	r3, [sp, #4]
-   10422:	6933      	ldr	r3, [r6, #16]
-   10424:	1c35      	adds	r5, r6, #0
-   10426:	3514      	adds	r5, #20
-   10428:	009b      	lsls	r3, r3, #2
-   1042a:	18eb      	adds	r3, r5, r3
-   1042c:	60c4      	str	r4, [r0, #12]
-   1042e:	9200      	str	r2, [sp, #0]
-   10430:	1c04      	adds	r4, r0, #0
-   10432:	9302      	str	r3, [sp, #8]
-   10434:	1c07      	adds	r7, r0, #0
-   10436:	3414      	adds	r4, #20
-   10438:	2600      	movs	r6, #0
-   1043a:	4662      	mov	r2, ip
-   1043c:	3204      	adds	r2, #4
-   1043e:	4694      	mov	ip, r2
-   10440:	3a04      	subs	r2, #4
-   10442:	ca08      	ldmia	r2!, {r3}
-   10444:	cd01      	ldmia	r5!, {r0}
-   10446:	4a1a      	ldr	r2, [pc, #104]	(104b0 <.text+0x104b0>)
-   10448:	1c19      	adds	r1, r3, #0
-   1044a:	4011      	ands	r1, r2
-   1044c:	4002      	ands	r2, r0
-   1044e:	1a89      	subs	r1, r1, r2
-   10450:	1989      	adds	r1, r1, r6
-   10452:	0c1b      	lsrs	r3, r3, #16
-   10454:	0c00      	lsrs	r0, r0, #16
-   10456:	1a1b      	subs	r3, r3, r0
-   10458:	140a      	asrs	r2, r1, #16
-   1045a:	189b      	adds	r3, r3, r2
-   1045c:	8063      	strh	r3, [r4, #2]
-   1045e:	141e      	asrs	r6, r3, #16
-   10460:	9b02      	ldr	r3, [sp, #8]
-   10462:	8021      	strh	r1, [r4, #0]
-   10464:	3404      	adds	r4, #4
-   10466:	429d      	cmp	r5, r3
-   10468:	d210      	bcs.n	1048c <__mdiff+0xb8>
-   1046a:	e7e6      	b.n	1043a <__mdiff+0x66>
-   1046c:	4662      	mov	r2, ip
-   1046e:	3204      	adds	r2, #4
-   10470:	4694      	mov	ip, r2
-   10472:	3a04      	subs	r2, #4
-   10474:	ca08      	ldmia	r2!, {r3}
-   10476:	4a0e      	ldr	r2, [pc, #56]	(104b0 <.text+0x104b0>)
-   10478:	1c19      	adds	r1, r3, #0
-   1047a:	4011      	ands	r1, r2
-   1047c:	1989      	adds	r1, r1, r6
-   1047e:	0c1b      	lsrs	r3, r3, #16
-   10480:	140a      	asrs	r2, r1, #16
-   10482:	189b      	adds	r3, r3, r2
-   10484:	8063      	strh	r3, [r4, #2]
-   10486:	8021      	strh	r1, [r4, #0]
-   10488:	141e      	asrs	r6, r3, #16
-   1048a:	3404      	adds	r4, #4
-   1048c:	9b01      	ldr	r3, [sp, #4]
-   1048e:	459c      	cmp	ip, r3
-   10490:	d3ec      	bcc.n	1046c <__mdiff+0x98>
-   10492:	e002      	b.n	1049a <__mdiff+0xc6>
-   10494:	9a00      	ldr	r2, [sp, #0]
-   10496:	3a01      	subs	r2, #1
-   10498:	9200      	str	r2, [sp, #0]
-   1049a:	3c04      	subs	r4, #4
-   1049c:	6823      	ldr	r3, [r4, #0]
-   1049e:	2b00      	cmp	r3, #0
-   104a0:	d0f8      	beq.n	10494 <__mdiff+0xc0>
-   104a2:	9b00      	ldr	r3, [sp, #0]
-   104a4:	613b      	str	r3, [r7, #16]
-   104a6:	1c38      	adds	r0, r7, #0
-   104a8:	b003      	add	sp, #12
-   104aa:	bcf0      	pop	{r4, r5, r6, r7}
-   104ac:	bc02      	pop	{r1}
-   104ae:	4708      	bx	r1
-   104b0:	ffff 0000 	vaddl.u<illegal width 64>	q8, d15, d0
-
-000104b4 <_lshift>:
-   104b4:	b5f0      	push	{r4, r5, r6, r7, lr}
-   104b6:	1c0d      	adds	r5, r1, #0
-   104b8:	692b      	ldr	r3, [r5, #16]
-   104ba:	1157      	asrs	r7, r2, #5
-   104bc:	3301      	adds	r3, #1
-   104be:	18fe      	adds	r6, r7, r3
-   104c0:	6849      	ldr	r1, [r1, #4]
-   104c2:	68ab      	ldr	r3, [r5, #8]
-   104c4:	b082      	sub	sp, #8
-   104c6:	1c14      	adds	r4, r2, #0
-   104c8:	9000      	str	r0, [sp, #0]
-   104ca:	e001      	b.n	104d0 <_lshift+0x1c>
-   104cc:	3101      	adds	r1, #1
-   104ce:	005b      	lsls	r3, r3, #1
-   104d0:	429e      	cmp	r6, r3
-   104d2:	dcfb      	bgt.n	104cc <_lshift+0x18>
-   104d4:	9800      	ldr	r0, [sp, #0]
-   104d6:	f7ff fee5 	bl	102a4 <_Balloc>
-   104da:	1c01      	adds	r1, r0, #0
-   104dc:	3114      	adds	r1, #20
-   104de:	2200      	movs	r2, #0
-   104e0:	9001      	str	r0, [sp, #4]
-   104e2:	e002      	b.n	104ea <_lshift+0x36>
-   104e4:	2300      	movs	r3, #0
-   104e6:	c108      	stmia	r1!, {r3}
-   104e8:	3201      	adds	r2, #1
-   104ea:	42ba      	cmp	r2, r7
-   104ec:	dbfa      	blt.n	104e4 <_lshift+0x30>
-   104ee:	692b      	ldr	r3, [r5, #16]
-   104f0:	1c2a      	adds	r2, r5, #0
-   104f2:	3214      	adds	r2, #20
-   104f4:	009b      	lsls	r3, r3, #2
-   104f6:	189b      	adds	r3, r3, r2
-   104f8:	469c      	mov	ip, r3
-   104fa:	231f      	movs	r3, #31
-   104fc:	401c      	ands	r4, r3
-   104fe:	d010      	beq.n	10522 <_lshift+0x6e>
-   10500:	2320      	movs	r3, #32
-   10502:	1b1f      	subs	r7, r3, r4
-   10504:	2000      	movs	r0, #0
-   10506:	6813      	ldr	r3, [r2, #0]
-   10508:	40a3      	lsls	r3, r4
-   1050a:	4303      	orrs	r3, r0
-   1050c:	c108      	stmia	r1!, {r3}
-   1050e:	ca08      	ldmia	r2!, {r3}
-   10510:	1c18      	adds	r0, r3, #0
-   10512:	40f8      	lsrs	r0, r7
-   10514:	4562      	cmp	r2, ip
-   10516:	d3f6      	bcc.n	10506 <_lshift+0x52>
-   10518:	6008      	str	r0, [r1, #0]
-   1051a:	2800      	cmp	r0, #0
-   1051c:	d005      	beq.n	1052a <_lshift+0x76>
-   1051e:	3601      	adds	r6, #1
-   10520:	e003      	b.n	1052a <_lshift+0x76>
-   10522:	ca08      	ldmia	r2!, {r3}
-   10524:	c108      	stmia	r1!, {r3}
-   10526:	4562      	cmp	r2, ip
-   10528:	d3fb      	bcc.n	10522 <_lshift+0x6e>
-   1052a:	9a01      	ldr	r2, [sp, #4]
-   1052c:	1e73      	subs	r3, r6, #1
-   1052e:	9800      	ldr	r0, [sp, #0]
-   10530:	1c29      	adds	r1, r5, #0
-   10532:	6113      	str	r3, [r2, #16]
-   10534:	f7ff fd5c 	bl	fff0 <_Bfree>
-   10538:	9801      	ldr	r0, [sp, #4]
-   1053a:	b002      	add	sp, #8
-   1053c:	bcf0      	pop	{r4, r5, r6, r7}
-   1053e:	bc02      	pop	{r1}
-   10540:	4708      	bx	r1
-	...
-
-00010544 <_multiply>:
-   10544:	b5f0      	push	{r4, r5, r6, r7, lr}
-   10546:	1c15      	adds	r5, r2, #0
-   10548:	692b      	ldr	r3, [r5, #16]
-   1054a:	690a      	ldr	r2, [r1, #16]
-   1054c:	b088      	sub	sp, #32
-   1054e:	1c0c      	adds	r4, r1, #0
-   10550:	429a      	cmp	r2, r3
-   10552:	da02      	bge.n	1055a <_multiply+0x16>
-   10554:	46ac      	mov	ip, r5
-   10556:	4664      	mov	r4, ip
-   10558:	1c0d      	adds	r5, r1, #0
-   1055a:	6926      	ldr	r6, [r4, #16]
-   1055c:	692f      	ldr	r7, [r5, #16]
-   1055e:	68a3      	ldr	r3, [r4, #8]
-   10560:	19f2      	adds	r2, r6, r7
-   10562:	6861      	ldr	r1, [r4, #4]
-   10564:	9201      	str	r2, [sp, #4]
-   10566:	429a      	cmp	r2, r3
-   10568:	dd00      	ble.n	1056c <_multiply+0x28>
-   1056a:	3101      	adds	r1, #1
-   1056c:	f7ff fe9a 	bl	102a4 <_Balloc>
-   10570:	9a01      	ldr	r2, [sp, #4]
-   10572:	1c01      	adds	r1, r0, #0
-   10574:	3114      	adds	r1, #20
-   10576:	0093      	lsls	r3, r2, #2
-   10578:	18cb      	adds	r3, r1, r3
-   1057a:	1c0a      	adds	r2, r1, #0
-   1057c:	9000      	str	r0, [sp, #0]
-   1057e:	9302      	str	r3, [sp, #8]
-   10580:	e001      	b.n	10586 <_multiply+0x42>
-   10582:	2300      	movs	r3, #0
-   10584:	c208      	stmia	r2!, {r3}
-   10586:	9b02      	ldr	r3, [sp, #8]
-   10588:	429a      	cmp	r2, r3
-   1058a:	d3fa      	bcc.n	10582 <_multiply+0x3e>
-   1058c:	3414      	adds	r4, #20
-   1058e:	00b3      	lsls	r3, r6, #2
-   10590:	18e3      	adds	r3, r4, r3
-   10592:	3514      	adds	r5, #20
-   10594:	9303      	str	r3, [sp, #12]
-   10596:	00bb      	lsls	r3, r7, #2
-   10598:	18eb      	adds	r3, r5, r3
-   1059a:	9407      	str	r4, [sp, #28]
-   1059c:	9504      	str	r5, [sp, #16]
-   1059e:	9305      	str	r3, [sp, #20]
-   105a0:	9106      	str	r1, [sp, #24]
-   105a2:	e04b      	b.n	1063c <_multiply+0xf8>
-   105a4:	9a04      	ldr	r2, [sp, #16]
-   105a6:	8817      	ldrh	r7, [r2, #0]
-   105a8:	2f00      	cmp	r7, #0
-   105aa:	d01e      	beq.n	105ea <_multiply+0xa6>
-   105ac:	2300      	movs	r3, #0
-   105ae:	9e07      	ldr	r6, [sp, #28]
-   105b0:	9d06      	ldr	r5, [sp, #24]
-   105b2:	469c      	mov	ip, r3
-   105b4:	ce04      	ldmia	r6!, {r2}
-   105b6:	482d      	ldr	r0, [pc, #180]	(1066c <.text+0x1066c>)
-   105b8:	1c13      	adds	r3, r2, #0
-   105ba:	4003      	ands	r3, r0
-   105bc:	1c3c      	adds	r4, r7, #0
-   105be:	435c      	muls	r4, r3
-   105c0:	6829      	ldr	r1, [r5, #0]
-   105c2:	1c0b      	adds	r3, r1, #0
-   105c4:	4003      	ands	r3, r0
-   105c6:	4463      	add	r3, ip
-   105c8:	0c12      	lsrs	r2, r2, #16
-   105ca:	18e4      	adds	r4, r4, r3
-   105cc:	1c3b      	adds	r3, r7, #0
-   105ce:	4353      	muls	r3, r2
-   105d0:	0c09      	lsrs	r1, r1, #16
-   105d2:	0c22      	lsrs	r2, r4, #16
-   105d4:	185b      	adds	r3, r3, r1
-   105d6:	189b      	adds	r3, r3, r2
-   105d8:	0c1a      	lsrs	r2, r3, #16
-   105da:	806b      	strh	r3, [r5, #2]
-   105dc:	9b03      	ldr	r3, [sp, #12]
-   105de:	802c      	strh	r4, [r5, #0]
-   105e0:	4694      	mov	ip, r2
-   105e2:	3504      	adds	r5, #4
-   105e4:	429e      	cmp	r6, r3
-   105e6:	d3e5      	bcc.n	105b4 <_multiply+0x70>
-   105e8:	602a      	str	r2, [r5, #0]
-   105ea:	9a04      	ldr	r2, [sp, #16]
-   105ec:	8857      	ldrh	r7, [r2, #2]
-   105ee:	2f00      	cmp	r7, #0
-   105f0:	d01e      	beq.n	10630 <_multiply+0xec>
-   105f2:	9b06      	ldr	r3, [sp, #24]
-   105f4:	2200      	movs	r2, #0
-   105f6:	681d      	ldr	r5, [r3, #0]
-   105f8:	9e07      	ldr	r6, [sp, #28]
-   105fa:	1c1c      	adds	r4, r3, #0
-   105fc:	4694      	mov	ip, r2
-   105fe:	ce04      	ldmia	r6!, {r2}
-   10600:	481a      	ldr	r0, [pc, #104]	(1066c <.text+0x1066c>)
-   10602:	1c13      	adds	r3, r2, #0
-   10604:	4003      	ands	r3, r0
-   10606:	1c39      	adds	r1, r7, #0
-   10608:	4359      	muls	r1, r3
-   1060a:	0c12      	lsrs	r2, r2, #16
-   1060c:	437a      	muls	r2, r7
-   1060e:	8863      	ldrh	r3, [r4, #2]
-   10610:	4463      	add	r3, ip
-   10612:	18c9      	adds	r1, r1, r3
-   10614:	8061      	strh	r1, [r4, #2]
-   10616:	8025      	strh	r5, [r4, #0]
-   10618:	3404      	adds	r4, #4
-   1061a:	6823      	ldr	r3, [r4, #0]
-   1061c:	4003      	ands	r3, r0
-   1061e:	18d2      	adds	r2, r2, r3
-   10620:	0c09      	lsrs	r1, r1, #16
-   10622:	1855      	adds	r5, r2, r1
-   10624:	9a03      	ldr	r2, [sp, #12]
-   10626:	0c2b      	lsrs	r3, r5, #16
-   10628:	469c      	mov	ip, r3
-   1062a:	4296      	cmp	r6, r2
-   1062c:	d3e7      	bcc.n	105fe <_multiply+0xba>
-   1062e:	6025      	str	r5, [r4, #0]
-   10630:	9b04      	ldr	r3, [sp, #16]
-   10632:	9a06      	ldr	r2, [sp, #24]
-   10634:	3304      	adds	r3, #4
-   10636:	3204      	adds	r2, #4
-   10638:	9304      	str	r3, [sp, #16]
-   1063a:	9206      	str	r2, [sp, #24]
-   1063c:	9b04      	ldr	r3, [sp, #16]
-   1063e:	9a05      	ldr	r2, [sp, #20]
-   10640:	4293      	cmp	r3, r2
-   10642:	d3af      	bcc.n	105a4 <_multiply+0x60>
-   10644:	9a02      	ldr	r2, [sp, #8]
-   10646:	e002      	b.n	1064e <_multiply+0x10a>
-   10648:	9b01      	ldr	r3, [sp, #4]
-   1064a:	3b01      	subs	r3, #1
-   1064c:	9301      	str	r3, [sp, #4]
-   1064e:	9b01      	ldr	r3, [sp, #4]
-   10650:	2b00      	cmp	r3, #0
-   10652:	dd03      	ble.n	1065c <_multiply+0x118>
-   10654:	3a04      	subs	r2, #4
-   10656:	6813      	ldr	r3, [r2, #0]
-   10658:	2b00      	cmp	r3, #0
-   1065a:	d0f5      	beq.n	10648 <_multiply+0x104>
-   1065c:	9b00      	ldr	r3, [sp, #0]
-   1065e:	9a01      	ldr	r2, [sp, #4]
-   10660:	1c18      	adds	r0, r3, #0
-   10662:	b008      	add	sp, #32
-   10664:	611a      	str	r2, [r3, #16]
-   10666:	bcf0      	pop	{r4, r5, r6, r7}
-   10668:	bc02      	pop	{r1}
-   1066a:	4708      	bx	r1
-   1066c:	ffff 0000 	vaddl.u<illegal width 64>	q8, d15, d0
-
-00010670 <_i2b>:
-   10670:	b510      	push	{r4, lr}
-   10672:	1c0c      	adds	r4, r1, #0
-   10674:	2101      	movs	r1, #1
-   10676:	f7ff fe15 	bl	102a4 <_Balloc>
-   1067a:	2301      	movs	r3, #1
-   1067c:	6144      	str	r4, [r0, #20]
-   1067e:	6103      	str	r3, [r0, #16]
-   10680:	bc10      	pop	{r4}
-   10682:	bc02      	pop	{r1}
-   10684:	4708      	bx	r1
-	...
-
-00010688 <_multadd>:
-   10688:	b5f0      	push	{r4, r5, r6, r7, lr}
-   1068a:	b082      	sub	sp, #8
-   1068c:	1c1e      	adds	r6, r3, #0
-   1068e:	1c0c      	adds	r4, r1, #0
-   10690:	2300      	movs	r3, #0
-   10692:	9001      	str	r0, [sp, #4]
-   10694:	9200      	str	r2, [sp, #0]
-   10696:	690f      	ldr	r7, [r1, #16]
-   10698:	1c0d      	adds	r5, r1, #0
-   1069a:	3414      	adds	r4, #20
-   1069c:	469c      	mov	ip, r3
-   1069e:	6822      	ldr	r2, [r4, #0]
-   106a0:	481b      	ldr	r0, [pc, #108]	(10710 <.text+0x10710>)
-   106a2:	9b00      	ldr	r3, [sp, #0]
-   106a4:	1c11      	adds	r1, r2, #0
-   106a6:	4001      	ands	r1, r0
-   106a8:	4359      	muls	r1, r3
-   106aa:	0c12      	lsrs	r2, r2, #16
-   106ac:	1989      	adds	r1, r1, r6
-   106ae:	1c1e      	adds	r6, r3, #0
-   106b0:	1c33      	adds	r3, r6, #0
-   106b2:	4353      	muls	r3, r2
-   106b4:	0c0a      	lsrs	r2, r1, #16
-   106b6:	189b      	adds	r3, r3, r2
-   106b8:	0c1e      	lsrs	r6, r3, #16
-   106ba:	4001      	ands	r1, r0
-   106bc:	041b      	lsls	r3, r3, #16
-   106be:	185b      	adds	r3, r3, r1
-   106c0:	c408      	stmia	r4!, {r3}
-   106c2:	2301      	movs	r3, #1
-   106c4:	449c      	add	ip, r3
-   106c6:	45bc      	cmp	ip, r7
-   106c8:	dbe9      	blt.n	1069e <_multadd+0x16>
-   106ca:	2e00      	cmp	r6, #0
-   106cc:	d01a      	beq.n	10704 <_multadd+0x7c>
-   106ce:	68ab      	ldr	r3, [r5, #8]
-   106d0:	429f      	cmp	r7, r3
-   106d2:	db12      	blt.n	106fa <_multadd+0x72>
-   106d4:	6869      	ldr	r1, [r5, #4]
-   106d6:	9801      	ldr	r0, [sp, #4]
-   106d8:	3101      	adds	r1, #1
-   106da:	f7ff fde3 	bl	102a4 <_Balloc>
-   106de:	692a      	ldr	r2, [r5, #16]
-   106e0:	1c29      	adds	r1, r5, #0
-   106e2:	0092      	lsls	r2, r2, #2
-   106e4:	1c04      	adds	r4, r0, #0
-   106e6:	310c      	adds	r1, #12
-   106e8:	3208      	adds	r2, #8
-   106ea:	300c      	adds	r0, #12
-   106ec:	f7fc fa22 	bl	cb34 <memcpy>
-   106f0:	1c29      	adds	r1, r5, #0
-   106f2:	9801      	ldr	r0, [sp, #4]
-   106f4:	f7ff fc7c 	bl	fff0 <_Bfree>
-   106f8:	1c25      	adds	r5, r4, #0
-   106fa:	00bb      	lsls	r3, r7, #2
-   106fc:	195b      	adds	r3, r3, r5
-   106fe:	615e      	str	r6, [r3, #20]
-   10700:	1c7b      	adds	r3, r7, #1
-   10702:	612b      	str	r3, [r5, #16]
-   10704:	1c28      	adds	r0, r5, #0
-   10706:	b002      	add	sp, #8
-   10708:	bcf0      	pop	{r4, r5, r6, r7}
-   1070a:	bc02      	pop	{r1}
-   1070c:	4708      	bx	r1
-   1070e:	0000      	lsls	r0, r0, #0
-   10710:	ffff 0000 	vaddl.u<illegal width 64>	q8, d15, d0
-
-00010714 <_pow5mult>:
-   10714:	b5f0      	push	{r4, r5, r6, r7, lr}
-   10716:	b081      	sub	sp, #4
-   10718:	2303      	movs	r3, #3
-   1071a:	1c06      	adds	r6, r0, #0
-   1071c:	9100      	str	r1, [sp, #0]
-   1071e:	1c14      	adds	r4, r2, #0
-   10720:	401a      	ands	r2, r3
-   10722:	d008      	beq.n	10736 <_pow5mult+0x22>
-   10724:	4b1c      	ldr	r3, [pc, #112]	(10798 <.text+0x10798>)
-   10726:	0092      	lsls	r2, r2, #2
-   10728:	18d2      	adds	r2, r2, r3
-   1072a:	3a04      	subs	r2, #4
-   1072c:	6812      	ldr	r2, [r2, #0]
-   1072e:	2300      	movs	r3, #0
-   10730:	f7ff ffaa 	bl	10688 <_multadd>
-   10734:	9000      	str	r0, [sp, #0]
-   10736:	10a7      	asrs	r7, r4, #2
-   10738:	2f00      	cmp	r7, #0
-   1073a:	d028      	beq.n	1078e <_pow5mult+0x7a>
-   1073c:	6cb5      	ldr	r5, [r6, #72]
-   1073e:	2d00      	cmp	r5, #0
-   10740:	d109      	bne.n	10756 <_pow5mult+0x42>
-   10742:	1c30      	adds	r0, r6, #0
-   10744:	4915      	ldr	r1, [pc, #84]	(1079c <.text+0x1079c>)
-   10746:	f7ff ff93 	bl	10670 <_i2b>
-   1074a:	2300      	movs	r3, #0
-   1074c:	1c05      	adds	r5, r0, #0
-   1074e:	64b0      	str	r0, [r6, #72]
-   10750:	6003      	str	r3, [r0, #0]
-   10752:	e000      	b.n	10756 <_pow5mult+0x42>
-   10754:	1c25      	adds	r5, r4, #0
-   10756:	07fb      	lsls	r3, r7, #31
-   10758:	d50a      	bpl.n	10770 <_pow5mult+0x5c>
-   1075a:	9900      	ldr	r1, [sp, #0]
-   1075c:	1c2a      	adds	r2, r5, #0
-   1075e:	1c30      	adds	r0, r6, #0
-   10760:	f7ff fef0 	bl	10544 <_multiply>
-   10764:	9900      	ldr	r1, [sp, #0]
-   10766:	1c04      	adds	r4, r0, #0
-   10768:	1c30      	adds	r0, r6, #0
-   1076a:	f7ff fc41 	bl	fff0 <_Bfree>
-   1076e:	9400      	str	r4, [sp, #0]
-   10770:	107f      	asrs	r7, r7, #1
-   10772:	2f00      	cmp	r7, #0
-   10774:	d00b      	beq.n	1078e <_pow5mult+0x7a>
-   10776:	682c      	ldr	r4, [r5, #0]
-   10778:	2c00      	cmp	r4, #0
-   1077a:	d1eb      	bne.n	10754 <_pow5mult+0x40>
-   1077c:	1c29      	adds	r1, r5, #0
-   1077e:	1c2a      	adds	r2, r5, #0
-   10780:	1c30      	adds	r0, r6, #0
-   10782:	f7ff fedf 	bl	10544 <_multiply>
-   10786:	6028      	str	r0, [r5, #0]
-   10788:	1c05      	adds	r5, r0, #0
-   1078a:	6004      	str	r4, [r0, #0]
-   1078c:	e7e3      	b.n	10756 <_pow5mult+0x42>
-   1078e:	9800      	ldr	r0, [sp, #0]
-   10790:	b001      	add	sp, #4
-   10792:	bcf0      	pop	{r4, r5, r6, r7}
-   10794:	bc02      	pop	{r1}
-   10796:	4708      	bx	r1
-   10798:	5154      	str	r4, [r2, r5]
-   1079a:	0001      	lsls	r1, r0, #0
-   1079c:	0271      	lsls	r1, r6, #9
-	...
-
-000107a0 <_s2b>:
-   107a0:	b5f0      	push	{r4, r5, r6, r7, lr}
-   107a2:	b082      	sub	sp, #8
-   107a4:	9001      	str	r0, [sp, #4]
-   107a6:	1c18      	adds	r0, r3, #0
-   107a8:	1c0d      	adds	r5, r1, #0
-   107aa:	3008      	adds	r0, #8
-   107ac:	2109      	movs	r1, #9
-   107ae:	9300      	str	r3, [sp, #0]
-   107b0:	1c16      	adds	r6, r2, #0
-   107b2:	f002 fdb9 	bl	13328 <__aeabi_idiv>
-   107b6:	2301      	movs	r3, #1
-   107b8:	2100      	movs	r1, #0
-   107ba:	e001      	b.n	107c0 <_s2b+0x20>
-   107bc:	005b      	lsls	r3, r3, #1
-   107be:	3101      	adds	r1, #1
-   107c0:	4298      	cmp	r0, r3
-   107c2:	dcfb      	bgt.n	107bc <_s2b+0x1c>
-   107c4:	9801      	ldr	r0, [sp, #4]
-   107c6:	f7ff fd6d 	bl	102a4 <_Balloc>
-   107ca:	9b07      	ldr	r3, [sp, #28]
-   107cc:	6143      	str	r3, [r0, #20]
-   107ce:	2301      	movs	r3, #1
-   107d0:	1c01      	adds	r1, r0, #0
-   107d2:	6103      	str	r3, [r0, #16]
-   107d4:	2e09      	cmp	r6, #9
-   107d6:	dd11      	ble.n	107fc <_s2b+0x5c>
-   107d8:	1c2f      	adds	r7, r5, #0
-   107da:	3709      	adds	r7, #9
-   107dc:	2409      	movs	r4, #9
-   107de:	5d63      	ldrb	r3, [r4, r5]
-   107e0:	9801      	ldr	r0, [sp, #4]
-   107e2:	3b30      	subs	r3, #48
-   107e4:	220a      	movs	r2, #10
-   107e6:	f7ff ff4f 	bl	10688 <_multadd>
-   107ea:	3401      	adds	r4, #1
-   107ec:	1c01      	adds	r1, r0, #0
-   107ee:	42b4      	cmp	r4, r6
-   107f0:	d1f5      	bne.n	107de <_s2b+0x3e>
-   107f2:	19bb      	adds	r3, r7, r6
-   107f4:	1c1d      	adds	r5, r3, #0
-   107f6:	3d08      	subs	r5, #8
-   107f8:	1c34      	adds	r4, r6, #0
-   107fa:	e00b      	b.n	10814 <_s2b+0x74>
-   107fc:	350a      	adds	r5, #10
-   107fe:	2409      	movs	r4, #9
-   10800:	e008      	b.n	10814 <_s2b+0x74>
-   10802:	782b      	ldrb	r3, [r5, #0]
-   10804:	9801      	ldr	r0, [sp, #4]
-   10806:	3b30      	subs	r3, #48
-   10808:	220a      	movs	r2, #10
-   1080a:	f7ff ff3d 	bl	10688 <_multadd>
-   1080e:	3501      	adds	r5, #1
-   10810:	1c01      	adds	r1, r0, #0
-   10812:	3401      	adds	r4, #1
-   10814:	9b00      	ldr	r3, [sp, #0]
-   10816:	429c      	cmp	r4, r3
-   10818:	dbf3      	blt.n	10802 <_s2b+0x62>
-   1081a:	1c08      	adds	r0, r1, #0
-   1081c:	b002      	add	sp, #8
-   1081e:	bcf0      	pop	{r4, r5, r6, r7}
-   10820:	bc02      	pop	{r1}
-   10822:	4708      	bx	r1
-
-00010824 <_realloc_r>:
-   10824:	b5f0      	push	{r4, r5, r6, r7, lr}
-   10826:	b08b      	sub	sp, #44
-   10828:	9003      	str	r0, [sp, #12]
-   1082a:	1c0f      	adds	r7, r1, #0
-   1082c:	9202      	str	r2, [sp, #8]
-   1082e:	2900      	cmp	r1, #0
-   10830:	d103      	bne.n	1083a <_realloc_r+0x16>
-   10832:	1c11      	adds	r1, r2, #0
-   10834:	f7ff f952 	bl	fadc <_malloc_r>
-   10838:	e01c      	b.n	10874 <_realloc_r+0x50>
-   1083a:	9803      	ldr	r0, [sp, #12]
-   1083c:	1c3e      	adds	r6, r7, #0
-   1083e:	f7ff fbd3 	bl	ffe8 <__malloc_lock>
-   10842:	3e08      	subs	r6, #8
-   10844:	9a02      	ldr	r2, [sp, #8]
-   10846:	6870      	ldr	r0, [r6, #4]
-   10848:	320b      	adds	r2, #11
-   1084a:	9004      	str	r0, [sp, #16]
-   1084c:	2a16      	cmp	r2, #22
-   1084e:	d803      	bhi.n	10858 <_realloc_r+0x34>
-   10850:	2110      	movs	r1, #16
-   10852:	9108      	str	r1, [sp, #32]
-   10854:	9101      	str	r1, [sp, #4]
-   10856:	e005      	b.n	10864 <_realloc_r+0x40>
-   10858:	2307      	movs	r3, #7
-   1085a:	439a      	bics	r2, r3
-   1085c:	9201      	str	r2, [sp, #4]
-   1085e:	9208      	str	r2, [sp, #32]
-   10860:	2a00      	cmp	r2, #0
-   10862:	db03      	blt.n	1086c <_realloc_r+0x48>
-   10864:	9a08      	ldr	r2, [sp, #32]
-   10866:	9b02      	ldr	r3, [sp, #8]
-   10868:	429a      	cmp	r2, r3
-   1086a:	d205      	bcs.n	10878 <_realloc_r+0x54>
-   1086c:	9d03      	ldr	r5, [sp, #12]
-   1086e:	230c      	movs	r3, #12
-   10870:	602b      	str	r3, [r5, #0]
-   10872:	2000      	movs	r0, #0
-   10874:	900a      	str	r0, [sp, #40]
-   10876:	e152      	b.n	10b1e <_realloc_r+0x2fa>
-   10878:	9d04      	ldr	r5, [sp, #16]
-   1087a:	2403      	movs	r4, #3
-   1087c:	9901      	ldr	r1, [sp, #4]
-   1087e:	43a5      	bics	r5, r4
-   10880:	428d      	cmp	r5, r1
-   10882:	db00      	blt.n	10886 <_realloc_r+0x62>
-   10884:	e11a      	b.n	10abc <_realloc_r+0x298>
-   10886:	4aa8      	ldr	r2, [pc, #672]	(10b28 <.text+0x10b28>)
-   10888:	6893      	ldr	r3, [r2, #8]
-   1088a:	1971      	adds	r1, r6, r5
-   1088c:	9205      	str	r2, [sp, #20]
-   1088e:	9306      	str	r3, [sp, #24]
-   10890:	6848      	ldr	r0, [r1, #4]
-   10892:	4299      	cmp	r1, r3
-   10894:	d008      	beq.n	108a8 <_realloc_r+0x84>
-   10896:	2301      	movs	r3, #1
-   10898:	1c02      	adds	r2, r0, #0
-   1089a:	439a      	bics	r2, r3
-   1089c:	188a      	adds	r2, r1, r2
-   1089e:	6852      	ldr	r2, [r2, #4]
-   108a0:	421a      	tst	r2, r3
-   108a2:	d100      	bne.n	108a6 <_realloc_r+0x82>
-   108a4:	e133      	b.n	10b0e <_realloc_r+0x2ea>
-   108a6:	e01c      	b.n	108e2 <_realloc_r+0xbe>
-   108a8:	9b08      	ldr	r3, [sp, #32]
-   108aa:	43a0      	bics	r0, r4
-   108ac:	1942      	adds	r2, r0, r5
-   108ae:	3310      	adds	r3, #16
-   108b0:	429a      	cmp	r2, r3
-   108b2:	db18      	blt.n	108e6 <_realloc_r+0xc2>
-   108b4:	9d08      	ldr	r5, [sp, #32]
-   108b6:	1b53      	subs	r3, r2, r5
-   108b8:	2201      	movs	r2, #1
-   108ba:	1971      	adds	r1, r6, r5
-   108bc:	4313      	orrs	r3, r2
-   108be:	604b      	str	r3, [r1, #4]
-   108c0:	6873      	ldr	r3, [r6, #4]
-   108c2:	9805      	ldr	r0, [sp, #20]
-   108c4:	4013      	ands	r3, r2
-   108c6:	432b      	orrs	r3, r5
-   108c8:	6081      	str	r1, [r0, #8]
-   108ca:	6073      	str	r3, [r6, #4]
-   108cc:	9803      	ldr	r0, [sp, #12]
-   108ce:	f7ff fb8d 	bl	ffec <__malloc_unlock>
-   108d2:	3608      	adds	r6, #8
-   108d4:	960a      	str	r6, [sp, #40]
-   108d6:	e122      	b.n	10b1e <_realloc_r+0x2fa>
-   108d8:	68ca      	ldr	r2, [r1, #12]
-   108da:	688b      	ldr	r3, [r1, #8]
-   108dc:	60da      	str	r2, [r3, #12]
-   108de:	6093      	str	r3, [r2, #8]
-   108e0:	e0b3      	b.n	10a4a <_realloc_r+0x226>
-   108e2:	2100      	movs	r1, #0
-   108e4:	2000      	movs	r0, #0
-   108e6:	9a04      	ldr	r2, [sp, #16]
-   108e8:	07d2      	lsls	r2, r2, #31
-   108ea:	d500      	bpl.n	108ee <_realloc_r+0xca>
-   108ec:	e099      	b.n	10a22 <_realloc_r+0x1fe>
-   108ee:	6833      	ldr	r3, [r6, #0]
-   108f0:	1af4      	subs	r4, r6, r3
-   108f2:	6862      	ldr	r2, [r4, #4]
-   108f4:	2303      	movs	r3, #3
-   108f6:	439a      	bics	r2, r3
-   108f8:	2900      	cmp	r1, #0
-   108fa:	d059      	beq.n	109b0 <_realloc_r+0x18c>
-   108fc:	18ab      	adds	r3, r5, r2
-   108fe:	9300      	str	r3, [sp, #0]
-   10900:	9b06      	ldr	r3, [sp, #24]
-   10902:	4299      	cmp	r1, r3
-   10904:	d149      	bne.n	1099a <_realloc_r+0x176>
-   10906:	9900      	ldr	r1, [sp, #0]
-   10908:	9b08      	ldr	r3, [sp, #32]
-   1090a:	1840      	adds	r0, r0, r1
-   1090c:	3310      	adds	r3, #16
-   1090e:	9007      	str	r0, [sp, #28]
-   10910:	4298      	cmp	r0, r3
-   10912:	db4d      	blt.n	109b0 <_realloc_r+0x18c>
-   10914:	68e2      	ldr	r2, [r4, #12]
-   10916:	68a3      	ldr	r3, [r4, #8]
-   10918:	60da      	str	r2, [r3, #12]
-   1091a:	6093      	str	r3, [r2, #8]
-   1091c:	1c22      	adds	r2, r4, #0
-   1091e:	3208      	adds	r2, #8
-   10920:	1f2e      	subs	r6, r5, #4
-   10922:	920a      	str	r2, [sp, #40]
-   10924:	2e24      	cmp	r6, #36
-   10926:	d824      	bhi.n	10972 <_realloc_r+0x14e>
-   10928:	1c38      	adds	r0, r7, #0
-   1092a:	1c15      	adds	r5, r2, #0
-   1092c:	2e13      	cmp	r6, #19
-   1092e:	d917      	bls.n	10960 <_realloc_r+0x13c>
-   10930:	1c3a      	adds	r2, r7, #0
-   10932:	ca08      	ldmia	r2!, {r3}
-   10934:	60a3      	str	r3, [r4, #8]
-   10936:	687b      	ldr	r3, [r7, #4]
-   10938:	3508      	adds	r5, #8
-   1093a:	60e3      	str	r3, [r4, #12]
-   1093c:	1d10      	adds	r0, r2, #4
-   1093e:	2e1b      	cmp	r6, #27
-   10940:	d90e      	bls.n	10960 <_realloc_r+0x13c>
-   10942:	6853      	ldr	r3, [r2, #4]
-   10944:	6123      	str	r3, [r4, #16]
-   10946:	6843      	ldr	r3, [r0, #4]
-   10948:	1d02      	adds	r2, r0, #4
-   1094a:	6163      	str	r3, [r4, #20]
-   1094c:	3508      	adds	r5, #8
-   1094e:	1d10      	adds	r0, r2, #4
-   10950:	2e24      	cmp	r6, #36
-   10952:	d105      	bne.n	10960 <_realloc_r+0x13c>
-   10954:	6853      	ldr	r3, [r2, #4]
-   10956:	61a3      	str	r3, [r4, #24]
-   10958:	6843      	ldr	r3, [r0, #4]
-   1095a:	61e3      	str	r3, [r4, #28]
-   1095c:	3508      	adds	r5, #8
-   1095e:	3008      	adds	r0, #8
-   10960:	1c01      	adds	r1, r0, #0
-   10962:	c908      	ldmia	r1!, {r3}
-   10964:	1c2a      	adds	r2, r5, #0
-   10966:	c208      	stmia	r2!, {r3}
-   10968:	6843      	ldr	r3, [r0, #4]
-   1096a:	606b      	str	r3, [r5, #4]
-   1096c:	684b      	ldr	r3, [r1, #4]
-   1096e:	6053      	str	r3, [r2, #4]
-   10970:	e004      	b.n	1097c <_realloc_r+0x158>
-   10972:	980a      	ldr	r0, [sp, #40]
-   10974:	1c39      	adds	r1, r7, #0
-   10976:	1c32      	adds	r2, r6, #0
-   10978:	f7ff fb12 	bl	ffa0 <memmove>
-   1097c:	9b08      	ldr	r3, [sp, #32]
-   1097e:	9807      	ldr	r0, [sp, #28]
-   10980:	18e1      	adds	r1, r4, r3
-   10982:	2201      	movs	r2, #1
-   10984:	1ac3      	subs	r3, r0, r3
-   10986:	4313      	orrs	r3, r2
-   10988:	604b      	str	r3, [r1, #4]
-   1098a:	9d05      	ldr	r5, [sp, #20]
-   1098c:	6863      	ldr	r3, [r4, #4]
-   1098e:	60a9      	str	r1, [r5, #8]
-   10990:	9d08      	ldr	r5, [sp, #32]
-   10992:	4013      	ands	r3, r2
-   10994:	432b      	orrs	r3, r5
-   10996:	6063      	str	r3, [r4, #4]
-   10998:	e08c      	b.n	10ab4 <_realloc_r+0x290>
-   1099a:	9b00      	ldr	r3, [sp, #0]
-   1099c:	18c0      	adds	r0, r0, r3
-   1099e:	9b01      	ldr	r3, [sp, #4]
-   109a0:	9009      	str	r0, [sp, #36]
-   109a2:	4298      	cmp	r0, r3
-   109a4:	db04      	blt.n	109b0 <_realloc_r+0x18c>
-   109a6:	68ca      	ldr	r2, [r1, #12]
-   109a8:	688b      	ldr	r3, [r1, #8]
-   109aa:	60da      	str	r2, [r3, #12]
-   109ac:	6093      	str	r3, [r2, #8]
-   109ae:	e004      	b.n	109ba <_realloc_r+0x196>
-   109b0:	9801      	ldr	r0, [sp, #4]
-   109b2:	1952      	adds	r2, r2, r5
-   109b4:	9209      	str	r2, [sp, #36]
-   109b6:	4282      	cmp	r2, r0
-   109b8:	db33      	blt.n	10a22 <_realloc_r+0x1fe>
-   109ba:	68e2      	ldr	r2, [r4, #12]
-   109bc:	68a3      	ldr	r3, [r4, #8]
-   109be:	1f2e      	subs	r6, r5, #4
-   109c0:	60da      	str	r2, [r3, #12]
-   109c2:	6093      	str	r3, [r2, #8]
-   109c4:	1c22      	adds	r2, r4, #0
-   109c6:	3208      	adds	r2, #8
-   109c8:	2e24      	cmp	r6, #36
-   109ca:	d824      	bhi.n	10a16 <_realloc_r+0x1f2>
-   109cc:	1c38      	adds	r0, r7, #0
-   109ce:	1c15      	adds	r5, r2, #0
-   109d0:	2e13      	cmp	r6, #19
-   109d2:	d917      	bls.n	10a04 <_realloc_r+0x1e0>
-   109d4:	1c3a      	adds	r2, r7, #0
-   109d6:	ca08      	ldmia	r2!, {r3}
-   109d8:	60a3      	str	r3, [r4, #8]
-   109da:	687b      	ldr	r3, [r7, #4]
-   109dc:	3508      	adds	r5, #8
-   109de:	60e3      	str	r3, [r4, #12]
-   109e0:	1d10      	adds	r0, r2, #4
-   109e2:	2e1b      	cmp	r6, #27
-   109e4:	d90e      	bls.n	10a04 <_realloc_r+0x1e0>
-   109e6:	6853      	ldr	r3, [r2, #4]
-   109e8:	6123      	str	r3, [r4, #16]
-   109ea:	6843      	ldr	r3, [r0, #4]
-   109ec:	1d02      	adds	r2, r0, #4
-   109ee:	6163      	str	r3, [r4, #20]
-   109f0:	3508      	adds	r5, #8
-   109f2:	1d10      	adds	r0, r2, #4
-   109f4:	2e24      	cmp	r6, #36
-   109f6:	d105      	bne.n	10a04 <_realloc_r+0x1e0>
-   109f8:	6853      	ldr	r3, [r2, #4]
-   109fa:	61a3      	str	r3, [r4, #24]
-   109fc:	6843      	ldr	r3, [r0, #4]
-   109fe:	61e3      	str	r3, [r4, #28]
-   10a00:	3508      	adds	r5, #8
-   10a02:	3008      	adds	r0, #8
-   10a04:	1c01      	adds	r1, r0, #0
-   10a06:	c908      	ldmia	r1!, {r3}
-   10a08:	1c2a      	adds	r2, r5, #0
-   10a0a:	c208      	stmia	r2!, {r3}
-   10a0c:	6843      	ldr	r3, [r0, #4]
-   10a0e:	606b      	str	r3, [r5, #4]
-   10a10:	684b      	ldr	r3, [r1, #4]
-   10a12:	6053      	str	r3, [r2, #4]
-   10a14:	e054      	b.n	10ac0 <_realloc_r+0x29c>
-   10a16:	1c10      	adds	r0, r2, #0
-   10a18:	1c39      	adds	r1, r7, #0
-   10a1a:	1c32      	adds	r2, r6, #0
-   10a1c:	f7ff fac0 	bl	ffa0 <memmove>
-   10a20:	e04e      	b.n	10ac0 <_realloc_r+0x29c>
-   10a22:	9803      	ldr	r0, [sp, #12]
-   10a24:	9902      	ldr	r1, [sp, #8]
-   10a26:	f7ff f859 	bl	fadc <_malloc_r>
-   10a2a:	900a      	str	r0, [sp, #40]
-   10a2c:	2800      	cmp	r0, #0
-   10a2e:	d041      	beq.n	10ab4 <_realloc_r+0x290>
-   10a30:	6873      	ldr	r3, [r6, #4]
-   10a32:	990a      	ldr	r1, [sp, #40]
-   10a34:	2201      	movs	r2, #1
-   10a36:	4393      	bics	r3, r2
-   10a38:	3908      	subs	r1, #8
-   10a3a:	18f3      	adds	r3, r6, r3
-   10a3c:	4299      	cmp	r1, r3
-   10a3e:	d106      	bne.n	10a4e <_realloc_r+0x22a>
-   10a40:	684b      	ldr	r3, [r1, #4]
-   10a42:	2203      	movs	r2, #3
-   10a44:	4393      	bics	r3, r2
-   10a46:	18ed      	adds	r5, r5, r3
-   10a48:	9509      	str	r5, [sp, #36]
-   10a4a:	1c34      	adds	r4, r6, #0
-   10a4c:	e038      	b.n	10ac0 <_realloc_r+0x29c>
-   10a4e:	3d04      	subs	r5, #4
-   10a50:	2d24      	cmp	r5, #36
-   10a52:	d826      	bhi.n	10aa2 <_realloc_r+0x27e>
-   10a54:	1c38      	adds	r0, r7, #0
-   10a56:	9c0a      	ldr	r4, [sp, #40]
-   10a58:	2d13      	cmp	r5, #19
-   10a5a:	d919      	bls.n	10a90 <_realloc_r+0x26c>
-   10a5c:	1c3a      	adds	r2, r7, #0
-   10a5e:	ca08      	ldmia	r2!, {r3}
-   10a60:	1c21      	adds	r1, r4, #0
-   10a62:	c108      	stmia	r1!, {r3}
-   10a64:	687b      	ldr	r3, [r7, #4]
-   10a66:	1d10      	adds	r0, r2, #4
-   10a68:	6063      	str	r3, [r4, #4]
-   10a6a:	1d0c      	adds	r4, r1, #4
-   10a6c:	2d1b      	cmp	r5, #27
-   10a6e:	d90f      	bls.n	10a90 <_realloc_r+0x26c>
-   10a70:	6853      	ldr	r3, [r2, #4]
-   10a72:	604b      	str	r3, [r1, #4]
-   10a74:	6843      	ldr	r3, [r0, #4]
-   10a76:	1d21      	adds	r1, r4, #4
-   10a78:	1d02      	adds	r2, r0, #4
-   10a7a:	6063      	str	r3, [r4, #4]
-   10a7c:	1d10      	adds	r0, r2, #4
-   10a7e:	1d0c      	adds	r4, r1, #4
-   10a80:	2d24      	cmp	r5, #36
-   10a82:	d105      	bne.n	10a90 <_realloc_r+0x26c>
-   10a84:	6853      	ldr	r3, [r2, #4]
-   10a86:	604b      	str	r3, [r1, #4]
-   10a88:	6843      	ldr	r3, [r0, #4]
-   10a8a:	3008      	adds	r0, #8
-   10a8c:	6063      	str	r3, [r4, #4]
-   10a8e:	3408      	adds	r4, #8
-   10a90:	1c01      	adds	r1, r0, #0
-   10a92:	c908      	ldmia	r1!, {r3}
-   10a94:	1c22      	adds	r2, r4, #0
-   10a96:	c208      	stmia	r2!, {r3}
-   10a98:	6843      	ldr	r3, [r0, #4]
-   10a9a:	6063      	str	r3, [r4, #4]
-   10a9c:	684b      	ldr	r3, [r1, #4]
-   10a9e:	6053      	str	r3, [r2, #4]
-   10aa0:	e004      	b.n	10aac <_realloc_r+0x288>
-   10aa2:	980a      	ldr	r0, [sp, #40]
-   10aa4:	1c39      	adds	r1, r7, #0
-   10aa6:	1c2a      	adds	r2, r5, #0
-   10aa8:	f7ff fa7a 	bl	ffa0 <memmove>
-   10aac:	9803      	ldr	r0, [sp, #12]
-   10aae:	1c39      	adds	r1, r7, #0
-   10ab0:	f7fe fd10 	bl	f4d4 <_free_r>
-   10ab4:	9803      	ldr	r0, [sp, #12]
-   10ab6:	f7ff fa99 	bl	ffec <__malloc_unlock>
-   10aba:	e030      	b.n	10b1e <_realloc_r+0x2fa>
-   10abc:	9509      	str	r5, [sp, #36]
-   10abe:	1c34      	adds	r4, r6, #0
-   10ac0:	9909      	ldr	r1, [sp, #36]
-   10ac2:	9a08      	ldr	r2, [sp, #32]
-   10ac4:	1a88      	subs	r0, r1, r2
-   10ac6:	6863      	ldr	r3, [r4, #4]
-   10ac8:	280f      	cmp	r0, #15
-   10aca:	d911      	bls.n	10af0 <_realloc_r+0x2cc>
-   10acc:	18a1      	adds	r1, r4, r2
-   10ace:	9d08      	ldr	r5, [sp, #32]
-   10ad0:	2201      	movs	r2, #1
-   10ad2:	4013      	ands	r3, r2
-   10ad4:	432b      	orrs	r3, r5
-   10ad6:	6063      	str	r3, [r4, #4]
-   10ad8:	1c03      	adds	r3, r0, #0
-   10ada:	4313      	orrs	r3, r2
-   10adc:	604b      	str	r3, [r1, #4]
-   10ade:	1808      	adds	r0, r1, r0
-   10ae0:	6843      	ldr	r3, [r0, #4]
-   10ae2:	4313      	orrs	r3, r2
-   10ae4:	6043      	str	r3, [r0, #4]
-   10ae6:	3108      	adds	r1, #8
-   10ae8:	9803      	ldr	r0, [sp, #12]
-   10aea:	f7fe fcf3 	bl	f4d4 <_free_r>
-   10aee:	e008      	b.n	10b02 <_realloc_r+0x2de>
-   10af0:	2101      	movs	r1, #1
-   10af2:	9809      	ldr	r0, [sp, #36]
-   10af4:	400b      	ands	r3, r1
-   10af6:	4303      	orrs	r3, r0
-   10af8:	6063      	str	r3, [r4, #4]
-   10afa:	1822      	adds	r2, r4, r0
-   10afc:	6853      	ldr	r3, [r2, #4]
-   10afe:	430b      	orrs	r3, r1
-   10b00:	6053      	str	r3, [r2, #4]
-   10b02:	9803      	ldr	r0, [sp, #12]
-   10b04:	f7ff fa72 	bl	ffec <__malloc_unlock>
-   10b08:	3408      	adds	r4, #8
-   10b0a:	940a      	str	r4, [sp, #40]
-   10b0c:	e007      	b.n	10b1e <_realloc_r+0x2fa>
-   10b0e:	43a0      	bics	r0, r4
-   10b10:	9b01      	ldr	r3, [sp, #4]
-   10b12:	1942      	adds	r2, r0, r5
-   10b14:	9209      	str	r2, [sp, #36]
-   10b16:	429a      	cmp	r2, r3
-   10b18:	db00      	blt.n	10b1c <_realloc_r+0x2f8>
-   10b1a:	e6dd      	b.n	108d8 <_realloc_r+0xb4>
-   10b1c:	e6e3      	b.n	108e6 <_realloc_r+0xc2>
-   10b1e:	980a      	ldr	r0, [sp, #40]
-   10b20:	b00b      	add	sp, #44
-   10b22:	bcf0      	pop	{r4, r5, r6, r7}
-   10b24:	bc02      	pop	{r1}
-   10b26:	4708      	bx	r1
-   10b28:	0434      	lsls	r4, r6, #16
-   10b2a:	4000      	ands	r0, r0
-
-00010b2c <isinf>:
-   10b2c:	b510      	push	{r4, lr}
-   10b2e:	1c0c      	adds	r4, r1, #0
-   10b30:	4262      	negs	r2, r4
-   10b32:	4907      	ldr	r1, [pc, #28]	(10b50 <.text+0x10b50>)
-   10b34:	4322      	orrs	r2, r4
-   10b36:	4001      	ands	r1, r0
-   10b38:	0fd2      	lsrs	r2, r2, #31
-   10b3a:	4b06      	ldr	r3, [pc, #24]	(10b54 <.text+0x10b54>)
-   10b3c:	4311      	orrs	r1, r2
-   10b3e:	1a5b      	subs	r3, r3, r1
-   10b40:	425a      	negs	r2, r3
-   10b42:	4313      	orrs	r3, r2
-   10b44:	0fdb      	lsrs	r3, r3, #31
-   10b46:	2001      	movs	r0, #1
-   10b48:	1ac0      	subs	r0, r0, r3
-   10b4a:	bc10      	pop	{r4}
-   10b4c:	bc02      	pop	{r1}
-   10b4e:	4708      	bx	r1
-   10b50:	ffff 7fff 	undefined
-   10b54:	0000      	lsls	r0, r0, #0
-   10b56:	7ff0      	ldrb	r0, [r6, #31]
-
-00010b58 <isnan>:
-   10b58:	b510      	push	{r4, lr}
-   10b5a:	1c0c      	adds	r4, r1, #0
-   10b5c:	4262      	negs	r2, r4
-   10b5e:	4905      	ldr	r1, [pc, #20]	(10b74 <.text+0x10b74>)
-   10b60:	4322      	orrs	r2, r4
-   10b62:	4001      	ands	r1, r0
-   10b64:	0fd2      	lsrs	r2, r2, #31
-   10b66:	4804      	ldr	r0, [pc, #16]	(10b78 <.text+0x10b78>)
-   10b68:	4311      	orrs	r1, r2
-   10b6a:	1a40      	subs	r0, r0, r1
-   10b6c:	0fc0      	lsrs	r0, r0, #31
-   10b6e:	bc10      	pop	{r4}
-   10b70:	bc02      	pop	{r1}
-   10b72:	4708      	bx	r1
-   10b74:	ffff 7fff 	undefined
-   10b78:	0000      	lsls	r0, r0, #0
-   10b7a:	7ff0      	ldrb	r0, [r6, #31]
-
-00010b7c <__sclose>:
-   10b7c:	b500      	push	{lr}
-   10b7e:	4b04      	ldr	r3, [pc, #16]	(10b90 <.text+0x10b90>)
-   10b80:	1c02      	adds	r2, r0, #0
-   10b82:	6818      	ldr	r0, [r3, #0]
-   10b84:	230e      	movs	r3, #14
-   10b86:	5ed1      	ldrsh	r1, [r2, r3]
-   10b88:	f004 f8a4 	bl	14cd4 <___close_r_from_thumb>
-   10b8c:	bc02      	pop	{r1}
-   10b8e:	4708      	bx	r1
-   10b90:	0020      	lsls	r0, r4, #0
-   10b92:	4000      	ands	r0, r0
-
-00010b94 <__sseek>:
-   10b94:	b530      	push	{r4, r5, lr}
-   10b96:	1c13      	adds	r3, r2, #0
-   10b98:	4a0b      	ldr	r2, [pc, #44]	(10bc8 <.text+0x10bc8>)
-   10b9a:	1c05      	adds	r5, r0, #0
-   10b9c:	1c0c      	adds	r4, r1, #0
-   10b9e:	6810      	ldr	r0, [r2, #0]
-   10ba0:	220e      	movs	r2, #14
-   10ba2:	5ea9      	ldrsh	r1, [r5, r2]
-   10ba4:	1c22      	adds	r2, r4, #0
-   10ba6:	f004 f899 	bl	14cdc <___lseek_r_from_thumb>
-   10baa:	89aa      	ldrh	r2, [r5, #12]
-   10bac:	1c43      	adds	r3, r0, #1
-   10bae:	d103      	bne.n	10bb8 <__sseek+0x24>
-   10bb0:	4b06      	ldr	r3, [pc, #24]	(10bcc <.text+0x10bcc>)
-   10bb2:	4013      	ands	r3, r2
-   10bb4:	81ab      	strh	r3, [r5, #12]
-   10bb6:	e004      	b.n	10bc2 <__sseek+0x2e>
-   10bb8:	2380      	movs	r3, #128
-   10bba:	015b      	lsls	r3, r3, #5
-   10bbc:	4313      	orrs	r3, r2
-   10bbe:	81ab      	strh	r3, [r5, #12]
-   10bc0:	6528      	str	r0, [r5, #80]
-   10bc2:	bc30      	pop	{r4, r5}
-   10bc4:	bc02      	pop	{r1}
-   10bc6:	4708      	bx	r1
-   10bc8:	0020      	lsls	r0, r4, #0
-   10bca:	4000      	ands	r0, r0
-   10bcc:	efff ffff 	undefined
-
-00010bd0 <__swrite>:
-   10bd0:	b570      	push	{r4, r5, r6, lr}
-   10bd2:	8983      	ldrh	r3, [r0, #12]
-   10bd4:	1c04      	adds	r4, r0, #0
-   10bd6:	1c0d      	adds	r5, r1, #0
-   10bd8:	1c16      	adds	r6, r2, #0
-   10bda:	05da      	lsls	r2, r3, #23
-   10bdc:	d507      	bpl.n	10bee <__swrite+0x1e>
-   10bde:	4b0b      	ldr	r3, [pc, #44]	(10c0c <.text+0x10c0c>)
-   10be0:	2200      	movs	r2, #0
-   10be2:	6818      	ldr	r0, [r3, #0]
-   10be4:	230e      	movs	r3, #14
-   10be6:	5ee1      	ldrsh	r1, [r4, r3]
-   10be8:	2302      	movs	r3, #2
-   10bea:	f004 f877 	bl	14cdc <___lseek_r_from_thumb>
-   10bee:	89a3      	ldrh	r3, [r4, #12]
-   10bf0:	4a07      	ldr	r2, [pc, #28]	(10c10 <.text+0x10c10>)
-   10bf2:	4013      	ands	r3, r2
-   10bf4:	81a3      	strh	r3, [r4, #12]
-   10bf6:	4b05      	ldr	r3, [pc, #20]	(10c0c <.text+0x10c0c>)
-   10bf8:	220e      	movs	r2, #14
-   10bfa:	5ea1      	ldrsh	r1, [r4, r2]
-   10bfc:	6818      	ldr	r0, [r3, #0]
-   10bfe:	1c2a      	adds	r2, r5, #0
-   10c00:	1c33      	adds	r3, r6, #0
-   10c02:	f004 f86f 	bl	14ce4 <___write_r_from_thumb>
-   10c06:	bc70      	pop	{r4, r5, r6}
-   10c08:	bc02      	pop	{r1}
-   10c0a:	4708      	bx	r1
-   10c0c:	0020      	lsls	r0, r4, #0
-   10c0e:	4000      	ands	r0, r0
-   10c10:	efff ffff 	undefined
-
-00010c14 <__sread>:
-   10c14:	b530      	push	{r4, r5, lr}
-   10c16:	1c13      	adds	r3, r2, #0
-   10c18:	4a0a      	ldr	r2, [pc, #40]	(10c44 <.text+0x10c44>)
-   10c1a:	1c05      	adds	r5, r0, #0
-   10c1c:	1c0c      	adds	r4, r1, #0
-   10c1e:	6810      	ldr	r0, [r2, #0]
-   10c20:	220e      	movs	r2, #14
-   10c22:	5ea9      	ldrsh	r1, [r5, r2]
-   10c24:	1c22      	adds	r2, r4, #0
-   10c26:	f004 f861 	bl	14cec <___read_r_from_thumb>
-   10c2a:	2800      	cmp	r0, #0
-   10c2c:	db03      	blt.n	10c36 <__sread+0x22>
-   10c2e:	6d2b      	ldr	r3, [r5, #80]
-   10c30:	181b      	adds	r3, r3, r0
-   10c32:	652b      	str	r3, [r5, #80]
-   10c34:	e003      	b.n	10c3e <__sread+0x2a>
-   10c36:	89ab      	ldrh	r3, [r5, #12]
-   10c38:	4a03      	ldr	r2, [pc, #12]	(10c48 <.text+0x10c48>)
-   10c3a:	4013      	ands	r3, r2
-   10c3c:	81ab      	strh	r3, [r5, #12]
-   10c3e:	bc30      	pop	{r4, r5}
-   10c40:	bc02      	pop	{r1}
-   10c42:	4708      	bx	r1
-   10c44:	0020      	lsls	r0, r4, #0
-   10c46:	4000      	ands	r0, r0
-   10c48:	efff ffff 	undefined
-
-00010c4c <strcmp>:
-   10c4c:	e001      	b.n	10c52 <strcmp+0x6>
-   10c4e:	3001      	adds	r0, #1
-   10c50:	3101      	adds	r1, #1
-   10c52:	7802      	ldrb	r2, [r0, #0]
-   10c54:	2a00      	cmp	r2, #0
-   10c56:	d002      	beq.n	10c5e <strcmp+0x12>
-   10c58:	780b      	ldrb	r3, [r1, #0]
-   10c5a:	4293      	cmp	r3, r2
-   10c5c:	d0f7      	beq.n	10c4e <strcmp+0x2>
-   10c5e:	7808      	ldrb	r0, [r1, #0]
-   10c60:	1a10      	subs	r0, r2, r0
-   10c62:	4770      	bx	lr
-
-00010c64 <_calloc_r>:
-   10c64:	b530      	push	{r4, r5, lr}
-   10c66:	4351      	muls	r1, r2
-   10c68:	f7fe ff38 	bl	fadc <_malloc_r>
-   10c6c:	1c04      	adds	r4, r0, #0
-   10c6e:	2800      	cmp	r0, #0
-   10c70:	d022      	beq.n	10cb8 <_calloc_r+0x54>
-   10c72:	1c03      	adds	r3, r0, #0
-   10c74:	3b08      	subs	r3, #8
-   10c76:	685b      	ldr	r3, [r3, #4]
-   10c78:	2203      	movs	r2, #3
-   10c7a:	4393      	bics	r3, r2
-   10c7c:	1f1a      	subs	r2, r3, #4
-   10c7e:	2a24      	cmp	r2, #36
-   10c80:	d817      	bhi.n	10cb2 <_calloc_r+0x4e>
-   10c82:	1c01      	adds	r1, r0, #0
-   10c84:	2a13      	cmp	r2, #19
-   10c86:	d90e      	bls.n	10ca6 <_calloc_r+0x42>
-   10c88:	2500      	movs	r5, #0
-   10c8a:	c020      	stmia	r0!, {r5}
-   10c8c:	6065      	str	r5, [r4, #4]
-   10c8e:	1d01      	adds	r1, r0, #4
-   10c90:	2a1b      	cmp	r2, #27
-   10c92:	d908      	bls.n	10ca6 <_calloc_r+0x42>
-   10c94:	1d0b      	adds	r3, r1, #4
-   10c96:	6045      	str	r5, [r0, #4]
-   10c98:	604d      	str	r5, [r1, #4]
-   10c9a:	1d19      	adds	r1, r3, #4
-   10c9c:	2a24      	cmp	r2, #36
-   10c9e:	d102      	bne.n	10ca6 <_calloc_r+0x42>
-   10ca0:	605d      	str	r5, [r3, #4]
-   10ca2:	604d      	str	r5, [r1, #4]
-   10ca4:	3108      	adds	r1, #8
-   10ca6:	2200      	movs	r2, #0
-   10ca8:	1c0b      	adds	r3, r1, #0
-   10caa:	c304      	stmia	r3!, {r2}
-   10cac:	604a      	str	r2, [r1, #4]
-   10cae:	605a      	str	r2, [r3, #4]
-   10cb0:	e002      	b.n	10cb8 <_calloc_r+0x54>
-   10cb2:	2100      	movs	r1, #0
-   10cb4:	f7ff f990 	bl	ffd8 <memset>
-   10cb8:	1c20      	adds	r0, r4, #0
-   10cba:	bc30      	pop	{r4, r5}
-   10cbc:	bc02      	pop	{r1}
-   10cbe:	4708      	bx	r1
-
-00010cc0 <_fclose_r>:
-   10cc0:	b570      	push	{r4, r5, r6, lr}
-   10cc2:	1c05      	adds	r5, r0, #0
-   10cc4:	1c0c      	adds	r4, r1, #0
-   10cc6:	2900      	cmp	r1, #0
-   10cc8:	d00e      	beq.n	10ce8 <_fclose_r+0x28>
-   10cca:	f7fe fb25 	bl	f318 <__sfp_lock_acquire>
-   10cce:	2d00      	cmp	r5, #0
-   10cd0:	d005      	beq.n	10cde <_fclose_r+0x1e>
-   10cd2:	6bab      	ldr	r3, [r5, #56]
-   10cd4:	2b00      	cmp	r3, #0
-   10cd6:	d102      	bne.n	10cde <_fclose_r+0x1e>
-   10cd8:	1c28      	adds	r0, r5, #0
-   10cda:	f7fe faef 	bl	f2bc <__sinit>
-   10cde:	89a3      	ldrh	r3, [r4, #12]
-   10ce0:	2b00      	cmp	r3, #0
-   10ce2:	d103      	bne.n	10cec <_fclose_r+0x2c>
-   10ce4:	f7fe fb1a 	bl	f31c <__sfp_lock_release>
-   10ce8:	2600      	movs	r6, #0
-   10cea:	e032      	b.n	10d52 <_fclose_r+0x92>
-   10cec:	071a      	lsls	r2, r3, #28
-   10cee:	d401      	bmi.n	10cf4 <_fclose_r+0x34>
-   10cf0:	2600      	movs	r6, #0
-   10cf2:	e003      	b.n	10cfc <_fclose_r+0x3c>
-   10cf4:	1c20      	adds	r0, r4, #0
-   10cf6:	f7fe fa81 	bl	f1fc <fflush>
-   10cfa:	1c06      	adds	r6, r0, #0
-   10cfc:	6ae3      	ldr	r3, [r4, #44]
-   10cfe:	2b00      	cmp	r3, #0
-   10d00:	d006      	beq.n	10d10 <_fclose_r+0x50>
-   10d02:	69e0      	ldr	r0, [r4, #28]
-   10d04:	f000 f836 	bl	10d74 <.text+0x10d74>
-   10d08:	2800      	cmp	r0, #0
-   10d0a:	da01      	bge.n	10d10 <_fclose_r+0x50>
-   10d0c:	2601      	movs	r6, #1
-   10d0e:	4276      	negs	r6, r6
-   10d10:	89a3      	ldrh	r3, [r4, #12]
-   10d12:	061a      	lsls	r2, r3, #24
-   10d14:	d503      	bpl.n	10d1e <_fclose_r+0x5e>
-   10d16:	6921      	ldr	r1, [r4, #16]
-   10d18:	1c28      	adds	r0, r5, #0
-   10d1a:	f7fe fbdb 	bl	f4d4 <_free_r>
-   10d1e:	6b21      	ldr	r1, [r4, #48]
-   10d20:	2900      	cmp	r1, #0
-   10d22:	d009      	beq.n	10d38 <_fclose_r+0x78>
-   10d24:	1c23      	adds	r3, r4, #0
-   10d26:	3340      	adds	r3, #64
-   10d28:	4299      	cmp	r1, r3
-   10d2a:	d003      	beq.n	10d34 <_fclose_r+0x74>
-   10d2c:	4b0b      	ldr	r3, [pc, #44]	(10d5c <.text+0x10d5c>)
-   10d2e:	6818      	ldr	r0, [r3, #0]
-   10d30:	f7fe fbd0 	bl	f4d4 <_free_r>
-   10d34:	2300      	movs	r3, #0
-   10d36:	6323      	str	r3, [r4, #48]
-   10d38:	6c61      	ldr	r1, [r4, #68]
-   10d3a:	2900      	cmp	r1, #0
-   10d3c:	d005      	beq.n	10d4a <_fclose_r+0x8a>
-   10d3e:	4b07      	ldr	r3, [pc, #28]	(10d5c <.text+0x10d5c>)
-   10d40:	6818      	ldr	r0, [r3, #0]
-   10d42:	f7fe fbc7 	bl	f4d4 <_free_r>
-   10d46:	2300      	movs	r3, #0
-   10d48:	6463      	str	r3, [r4, #68]
-   10d4a:	2300      	movs	r3, #0
-   10d4c:	81a3      	strh	r3, [r4, #12]
-   10d4e:	f7fe fae5 	bl	f31c <__sfp_lock_release>
-   10d52:	1c30      	adds	r0, r6, #0
-   10d54:	bc70      	pop	{r4, r5, r6}
-   10d56:	bc02      	pop	{r1}
-   10d58:	4708      	bx	r1
-   10d5a:	0000      	lsls	r0, r0, #0
-   10d5c:	0020      	lsls	r0, r4, #0
-   10d5e:	4000      	ands	r0, r0
-
-00010d60 <fclose>:
-   10d60:	b500      	push	{lr}
-   10d62:	4b03      	ldr	r3, [pc, #12]	(10d70 <.text+0x10d70>)
-   10d64:	1c01      	adds	r1, r0, #0
-   10d66:	6818      	ldr	r0, [r3, #0]
-   10d68:	f7ff ffaa 	bl	10cc0 <_fclose_r>
-   10d6c:	bc02      	pop	{r1}
-   10d6e:	4708      	bx	r1
-   10d70:	0020      	lsls	r0, r4, #0
-   10d72:	4000      	ands	r0, r0
-   10d74:	4718      	bx	r3
-   10d76:	46c0      	nop			(mov r8, r8)
-
-00010d78 <cos>:
-   10d78:	b5f0      	push	{r4, r5, r6, r7, lr}
-   10d7a:	4a24      	ldr	r2, [pc, #144]	(10e0c <.text+0x10e0c>)
-   10d7c:	4b24      	ldr	r3, [pc, #144]	(10e10 <.text+0x10e10>)
-   10d7e:	4002      	ands	r2, r0
-   10d80:	b085      	sub	sp, #20
-   10d82:	1c05      	adds	r5, r0, #0
-   10d84:	1c0e      	adds	r6, r1, #0
-   10d86:	429a      	cmp	r2, r3
-   10d88:	dc02      	bgt.n	10d90 <cos+0x18>
-   10d8a:	4a22      	ldr	r2, [pc, #136]	(10e14 <.text+0x10e14>)
-   10d8c:	4b22      	ldr	r3, [pc, #136]	(10e18 <.text+0x10e18>)
-   10d8e:	e019      	b.n	10dc4 <cos+0x4c>
-   10d90:	4b22      	ldr	r3, [pc, #136]	(10e1c <.text+0x10e1c>)
-   10d92:	429a      	cmp	r2, r3
-   10d94:	dd04      	ble.n	10da0 <cos+0x28>
-   10d96:	1c2a      	adds	r2, r5, #0
-   10d98:	1c33      	adds	r3, r6, #0
-   10d9a:	f003 ff77 	bl	14c8c <____subdf3_from_thumb>
-   10d9e:	e02d      	b.n	10dfc <cos+0x84>
-   10da0:	aa01      	add	r2, sp, #4
-   10da2:	f001 f813 	bl	11dcc <__ieee754_rem_pio2>
-   10da6:	2303      	movs	r3, #3
-   10da8:	1c05      	adds	r5, r0, #0
-   10daa:	401d      	ands	r5, r3
-   10dac:	2d01      	cmp	r5, #1
-   10dae:	d00c      	beq.n	10dca <cos+0x52>
-   10db0:	2d02      	cmp	r5, #2
-   10db2:	d012      	beq.n	10dda <cos+0x62>
-   10db4:	9801      	ldr	r0, [sp, #4]
-   10db6:	9902      	ldr	r1, [sp, #8]
-   10db8:	9e03      	ldr	r6, [sp, #12]
-   10dba:	9f04      	ldr	r7, [sp, #16]
-   10dbc:	2d00      	cmp	r5, #0
-   10dbe:	d117      	bne.n	10df0 <cos+0x78>
-   10dc0:	1c32      	adds	r2, r6, #0
-   10dc2:	1c3b      	adds	r3, r7, #0
-   10dc4:	f001 fae2 	bl	1238c <__kernel_cos>
-   10dc8:	e018      	b.n	10dfc <cos+0x84>
-   10dca:	9801      	ldr	r0, [sp, #4]
-   10dcc:	9902      	ldr	r1, [sp, #8]
-   10dce:	9a03      	ldr	r2, [sp, #12]
-   10dd0:	9b04      	ldr	r3, [sp, #16]
-   10dd2:	9500      	str	r5, [sp, #0]
-   10dd4:	f001 ffae 	bl	12d34 <__kernel_sin>
-   10dd8:	e005      	b.n	10de6 <cos+0x6e>
-   10dda:	9801      	ldr	r0, [sp, #4]
-   10ddc:	9902      	ldr	r1, [sp, #8]
-   10dde:	9a03      	ldr	r2, [sp, #12]
-   10de0:	9b04      	ldr	r3, [sp, #16]
-   10de2:	f001 fad3 	bl	1238c <__kernel_cos>
-   10de6:	2480      	movs	r4, #128
-   10de8:	0624      	lsls	r4, r4, #24
-   10dea:	1902      	adds	r2, r0, r4
-   10dec:	1c0b      	adds	r3, r1, #0
-   10dee:	e007      	b.n	10e00 <cos+0x88>
-   10df0:	2301      	movs	r3, #1
-   10df2:	9300      	str	r3, [sp, #0]
-   10df4:	1c32      	adds	r2, r6, #0
-   10df6:	1c3b      	adds	r3, r7, #0
-   10df8:	f001 ff9c 	bl	12d34 <__kernel_sin>
-   10dfc:	1c02      	adds	r2, r0, #0
-   10dfe:	1c0b      	adds	r3, r1, #0
-   10e00:	1c10      	adds	r0, r2, #0
-   10e02:	1c19      	adds	r1, r3, #0
-   10e04:	b005      	add	sp, #20
-   10e06:	bcf0      	pop	{r4, r5, r6, r7}
-   10e08:	bc04      	pop	{r2}
-   10e0a:	4710      	bx	r2
-   10e0c:	ffff 7fff 	undefined
-   10e10:	21fb      	movs	r1, #251
-   10e12:	3fe9      	subs	r7, #233
-	...
-   10e1c:	ffff 7fef 	undefined
-
-00010e20 <sin>:
-   10e20:	b570      	push	{r4, r5, r6, lr}
-   10e22:	4a25      	ldr	r2, [pc, #148]	(10eb8 <.text+0x10eb8>)
-   10e24:	4b25      	ldr	r3, [pc, #148]	(10ebc <.text+0x10ebc>)
-   10e26:	4002      	ands	r2, r0
-   10e28:	b085      	sub	sp, #20
-   10e2a:	1c05      	adds	r5, r0, #0
-   10e2c:	1c0e      	adds	r6, r1, #0
-   10e2e:	429a      	cmp	r2, r3
-   10e30:	dc04      	bgt.n	10e3c <sin+0x1c>
-   10e32:	2300      	movs	r3, #0
-   10e34:	9300      	str	r3, [sp, #0]
-   10e36:	4a22      	ldr	r2, [pc, #136]	(10ec0 <.text+0x10ec0>)
-   10e38:	4b22      	ldr	r3, [pc, #136]	(10ec4 <.text+0x10ec4>)
-   10e3a:	e01c      	b.n	10e76 <sin+0x56>
-   10e3c:	4b22      	ldr	r3, [pc, #136]	(10ec8 <.text+0x10ec8>)
-   10e3e:	429a      	cmp	r2, r3
-   10e40:	dd06      	ble.n	10e50 <sin+0x30>
-   10e42:	1c2a      	adds	r2, r5, #0
-   10e44:	1c33      	adds	r3, r6, #0
-   10e46:	f003 ff21 	bl	14c8c <____subdf3_from_thumb>
-   10e4a:	1c03      	adds	r3, r0, #0
-   10e4c:	1c0c      	adds	r4, r1, #0
-   10e4e:	e02d      	b.n	10eac <sin+0x8c>
-   10e50:	aa01      	add	r2, sp, #4
-   10e52:	f000 ffbb 	bl	11dcc <__ieee754_rem_pio2>
-   10e56:	2303      	movs	r3, #3
-   10e58:	4003      	ands	r3, r0
-   10e5a:	2b01      	cmp	r3, #1
-   10e5c:	d00e      	beq.n	10e7c <sin+0x5c>
-   10e5e:	2b02      	cmp	r3, #2
-   10e60:	d013      	beq.n	10e8a <sin+0x6a>
-   10e62:	9801      	ldr	r0, [sp, #4]
-   10e64:	9902      	ldr	r1, [sp, #8]
-   10e66:	9c03      	ldr	r4, [sp, #12]
-   10e68:	9d04      	ldr	r5, [sp, #16]
-   10e6a:	2b00      	cmp	r3, #0
-   10e6c:	d116      	bne.n	10e9c <sin+0x7c>
-   10e6e:	2301      	movs	r3, #1
-   10e70:	9300      	str	r3, [sp, #0]
-   10e72:	1c22      	adds	r2, r4, #0
-   10e74:	1c2b      	adds	r3, r5, #0
-   10e76:	f001 ff5d 	bl	12d34 <__kernel_sin>
-   10e7a:	e7e6      	b.n	10e4a <sin+0x2a>
-   10e7c:	9801      	ldr	r0, [sp, #4]
-   10e7e:	9902      	ldr	r1, [sp, #8]
-   10e80:	9a03      	ldr	r2, [sp, #12]
-   10e82:	9b04      	ldr	r3, [sp, #16]
-   10e84:	f001 fa82 	bl	1238c <__kernel_cos>
-   10e88:	e7df      	b.n	10e4a <sin+0x2a>
-   10e8a:	2401      	movs	r4, #1
-   10e8c:	9801      	ldr	r0, [sp, #4]
-   10e8e:	9902      	ldr	r1, [sp, #8]
-   10e90:	9a03      	ldr	r2, [sp, #12]
-   10e92:	9b04      	ldr	r3, [sp, #16]
-   10e94:	9400      	str	r4, [sp, #0]
-   10e96:	f001 ff4d 	bl	12d34 <__kernel_sin>
-   10e9a:	e003      	b.n	10ea4 <sin+0x84>
-   10e9c:	1c22      	adds	r2, r4, #0
-   10e9e:	1c2b      	adds	r3, r5, #0
-   10ea0:	f001 fa74 	bl	1238c <__kernel_cos>
-   10ea4:	2280      	movs	r2, #128
-   10ea6:	0612      	lsls	r2, r2, #24
-   10ea8:	1883      	adds	r3, r0, r2
-   10eaa:	1c0c      	adds	r4, r1, #0
-   10eac:	1c18      	adds	r0, r3, #0
-   10eae:	1c21      	adds	r1, r4, #0
-   10eb0:	b005      	add	sp, #20
-   10eb2:	bc70      	pop	{r4, r5, r6}
-   10eb4:	bc04      	pop	{r2}
-   10eb6:	4710      	bx	r2
-   10eb8:	ffff 7fff 	undefined
-   10ebc:	21fb      	movs	r1, #251
-   10ebe:	3fe9      	subs	r7, #233
-	...
-   10ec8:	ffff 7fef 	undefined
-
-00010ecc <pow>:
-   10ecc:	b5f0      	push	{r4, r5, r6, r7, lr}
-   10ece:	b08e      	sub	sp, #56
-   10ed0:	1c1e      	adds	r6, r3, #0
-   10ed2:	9000      	str	r0, [sp, #0]
-   10ed4:	9101      	str	r1, [sp, #4]
-   10ed6:	1c15      	adds	r5, r2, #0
-   10ed8:	f000 f9f2 	bl	112c0 <__ieee754_pow>
-   10edc:	4bba      	ldr	r3, [pc, #744]	(111c8 <.text+0x111c8>)
-   10ede:	681f      	ldr	r7, [r3, #0]
-   10ee0:	9003      	str	r0, [sp, #12]
-   10ee2:	9104      	str	r1, [sp, #16]
-   10ee4:	1c7a      	adds	r2, r7, #1
-   10ee6:	d100      	bne.n	10eea <pow+0x1e>
-   10ee8:	e167      	b.n	111ba <pow+0x2ee>
-   10eea:	1c28      	adds	r0, r5, #0
-   10eec:	1c31      	adds	r1, r6, #0
-   10eee:	f7ff fe33 	bl	10b58 <isnan>
-   10ef2:	1c04      	adds	r4, r0, #0
-   10ef4:	2800      	cmp	r0, #0
-   10ef6:	d000      	beq.n	10efa <pow+0x2e>
-   10ef8:	e15f      	b.n	111ba <pow+0x2ee>
-   10efa:	9800      	ldr	r0, [sp, #0]
-   10efc:	9901      	ldr	r1, [sp, #4]
-   10efe:	f7ff fe2b 	bl	10b58 <isnan>
-   10f02:	9002      	str	r0, [sp, #8]
-   10f04:	2800      	cmp	r0, #0
-   10f06:	d01f      	beq.n	10f48 <pow+0x7c>
-   10f08:	1c28      	adds	r0, r5, #0
-   10f0a:	1c31      	adds	r1, r6, #0
-   10f0c:	4aaf      	ldr	r2, [pc, #700]	(111cc <.text+0x111cc>)
-   10f0e:	4bb0      	ldr	r3, [pc, #704]	(111d0 <.text+0x111d0>)
-   10f10:	f003 feb0 	bl	14c74 <____eqdf2_from_thumb>
-   10f14:	2800      	cmp	r0, #0
-   10f16:	d000      	beq.n	10f1a <pow+0x4e>
-   10f18:	e14f      	b.n	111ba <pow+0x2ee>
-   10f1a:	9a00      	ldr	r2, [sp, #0]
-   10f1c:	9b01      	ldr	r3, [sp, #4]
-   10f1e:	920b      	str	r2, [sp, #44]
-   10f20:	930c      	str	r3, [sp, #48]
-   10f22:	2f02      	cmp	r7, #2
-   10f24:	d104      	bne.n	10f30 <pow+0x64>
-   10f26:	4bab      	ldr	r3, [pc, #684]	(111d4 <.text+0x111d4>)
-   10f28:	4cab      	ldr	r4, [pc, #684]	(111d8 <.text+0x111d8>)
-   10f2a:	930b      	str	r3, [sp, #44]
-   10f2c:	940c      	str	r4, [sp, #48]
-   10f2e:	e105      	b.n	1113c <pow+0x270>
-   10f30:	9a00      	ldr	r2, [sp, #0]
-   10f32:	9b01      	ldr	r3, [sp, #4]
-   10f34:	9207      	str	r2, [sp, #28]
-   10f36:	9308      	str	r3, [sp, #32]
-   10f38:	4ba8      	ldr	r3, [pc, #672]	(111dc <.text+0x111dc>)
-   10f3a:	9306      	str	r3, [sp, #24]
-   10f3c:	2301      	movs	r3, #1
-   10f3e:	9509      	str	r5, [sp, #36]
-   10f40:	960a      	str	r6, [sp, #40]
-   10f42:	940d      	str	r4, [sp, #52]
-   10f44:	9305      	str	r3, [sp, #20]
-   10f46:	e091      	b.n	1106c <pow+0x1a0>
-   10f48:	9800      	ldr	r0, [sp, #0]
-   10f4a:	9901      	ldr	r1, [sp, #4]
-   10f4c:	4a9f      	ldr	r2, [pc, #636]	(111cc <.text+0x111cc>)
-   10f4e:	4ba0      	ldr	r3, [pc, #640]	(111d0 <.text+0x111d0>)
-   10f50:	f003 fe90 	bl	14c74 <____eqdf2_from_thumb>
-   10f54:	2800      	cmp	r0, #0
-   10f56:	d151      	bne.n	10ffc <pow+0x130>
-   10f58:	1c28      	adds	r0, r5, #0
-   10f5a:	1c31      	adds	r1, r6, #0
-   10f5c:	4a9b      	ldr	r2, [pc, #620]	(111cc <.text+0x111cc>)
-   10f5e:	4b9c      	ldr	r3, [pc, #624]	(111d0 <.text+0x111d0>)
-   10f60:	f003 fe88 	bl	14c74 <____eqdf2_from_thumb>
-   10f64:	2800      	cmp	r0, #0
-   10f66:	d116      	bne.n	10f96 <pow+0xca>
-   10f68:	4a98      	ldr	r2, [pc, #608]	(111cc <.text+0x111cc>)
-   10f6a:	4b99      	ldr	r3, [pc, #612]	(111d0 <.text+0x111d0>)
-   10f6c:	920b      	str	r2, [sp, #44]
-   10f6e:	930c      	str	r3, [sp, #48]
-   10f70:	2f00      	cmp	r7, #0
-   10f72:	d004      	beq.n	10f7e <pow+0xb2>
-   10f74:	4b97      	ldr	r3, [pc, #604]	(111d4 <.text+0x111d4>)
-   10f76:	4c98      	ldr	r4, [pc, #608]	(111d8 <.text+0x111d8>)
-   10f78:	930b      	str	r3, [sp, #44]
-   10f7a:	940c      	str	r4, [sp, #48]
-   10f7c:	e119      	b.n	111b2 <pow+0x2e6>
-   10f7e:	9b00      	ldr	r3, [sp, #0]
-   10f80:	9c01      	ldr	r4, [sp, #4]
-   10f82:	9307      	str	r3, [sp, #28]
-   10f84:	9408      	str	r4, [sp, #32]
-   10f86:	4b95      	ldr	r3, [pc, #596]	(111dc <.text+0x111dc>)
-   10f88:	9306      	str	r3, [sp, #24]
-   10f8a:	2301      	movs	r3, #1
-   10f8c:	9509      	str	r5, [sp, #36]
-   10f8e:	960a      	str	r6, [sp, #40]
-   10f90:	970d      	str	r7, [sp, #52]
-   10f92:	9305      	str	r3, [sp, #20]
-   10f94:	e028      	b.n	10fe8 <pow+0x11c>
-   10f96:	1c28      	adds	r0, r5, #0
-   10f98:	1c31      	adds	r1, r6, #0
-   10f9a:	f001 ff93 	bl	12ec4 <finite>
-   10f9e:	2800      	cmp	r0, #0
-   10fa0:	d100      	bne.n	10fa4 <pow+0xd8>
-   10fa2:	e10a      	b.n	111ba <pow+0x2ee>
-   10fa4:	1c28      	adds	r0, r5, #0
-   10fa6:	1c31      	adds	r1, r6, #0
-   10fa8:	4a88      	ldr	r2, [pc, #544]	(111cc <.text+0x111cc>)
-   10faa:	4b89      	ldr	r3, [pc, #548]	(111d0 <.text+0x111d0>)
-   10fac:	f003 fe5a 	bl	14c64 <____ltdf2_from_thumb>
-   10fb0:	2800      	cmp	r0, #0
-   10fb2:	db00      	blt.n	10fb6 <pow+0xea>
-   10fb4:	e101      	b.n	111ba <pow+0x2ee>
-   10fb6:	2301      	movs	r3, #1
-   10fb8:	9305      	str	r3, [sp, #20]
-   10fba:	4b88      	ldr	r3, [pc, #544]	(111dc <.text+0x111dc>)
-   10fbc:	9306      	str	r3, [sp, #24]
-   10fbe:	9b02      	ldr	r3, [sp, #8]
-   10fc0:	930d      	str	r3, [sp, #52]
-   10fc2:	9a00      	ldr	r2, [sp, #0]
-   10fc4:	9b01      	ldr	r3, [sp, #4]
-   10fc6:	9509      	str	r5, [sp, #36]
-   10fc8:	960a      	str	r6, [sp, #40]
-   10fca:	9207      	str	r2, [sp, #28]
-   10fcc:	9308      	str	r3, [sp, #32]
-   10fce:	2f00      	cmp	r7, #0
-   10fd0:	d104      	bne.n	10fdc <pow+0x110>
-   10fd2:	4b7e      	ldr	r3, [pc, #504]	(111cc <.text+0x111cc>)
-   10fd4:	4c7e      	ldr	r4, [pc, #504]	(111d0 <.text+0x111d0>)
-   10fd6:	930b      	str	r3, [sp, #44]
-   10fd8:	940c      	str	r4, [sp, #48]
-   10fda:	e005      	b.n	10fe8 <pow+0x11c>
-   10fdc:	4b80      	ldr	r3, [pc, #512]	(111e0 <.text+0x111e0>)
-   10fde:	4c81      	ldr	r4, [pc, #516]	(111e4 <.text+0x111e4>)
-   10fe0:	930b      	str	r3, [sp, #44]
-   10fe2:	940c      	str	r4, [sp, #48]
-   10fe4:	2f02      	cmp	r7, #2
-   10fe6:	d005      	beq.n	10ff4 <pow+0x128>
-   10fe8:	a805      	add	r0, sp, #20
-   10fea:	f002 f80f 	bl	1300c <matherr>
-   10fee:	2800      	cmp	r0, #0
-   10ff0:	d000      	beq.n	10ff4 <pow+0x128>
-   10ff2:	e0d7      	b.n	111a4 <pow+0x2d8>
-   10ff4:	f002 f94c 	bl	13290 <__errno>
-   10ff8:	2321      	movs	r3, #33
-   10ffa:	e0d2      	b.n	111a2 <pow+0x2d6>
-   10ffc:	9803      	ldr	r0, [sp, #12]
-   10ffe:	9904      	ldr	r1, [sp, #16]
-   11000:	f001 ff60 	bl	12ec4 <finite>
-   11004:	1c04      	adds	r4, r0, #0
-   11006:	2800      	cmp	r0, #0
-   11008:	d000      	beq.n	1100c <pow+0x140>
-   1100a:	e09c      	b.n	11146 <pow+0x27a>
-   1100c:	9800      	ldr	r0, [sp, #0]
-   1100e:	9901      	ldr	r1, [sp, #4]
-   11010:	f001 ff58 	bl	12ec4 <finite>
-   11014:	2800      	cmp	r0, #0
-   11016:	d100      	bne.n	1101a <pow+0x14e>
-   11018:	e095      	b.n	11146 <pow+0x27a>
-   1101a:	1c28      	adds	r0, r5, #0
-   1101c:	1c31      	adds	r1, r6, #0
-   1101e:	f001 ff51 	bl	12ec4 <finite>
-   11022:	2800      	cmp	r0, #0
-   11024:	d100      	bne.n	11028 <pow+0x15c>
-   11026:	e08e      	b.n	11146 <pow+0x27a>
-   11028:	9803      	ldr	r0, [sp, #12]
-   1102a:	9904      	ldr	r1, [sp, #16]
-   1102c:	f7ff fd94 	bl	10b58 <isnan>
-   11030:	4a6a      	ldr	r2, [pc, #424]	(111dc <.text+0x111dc>)
-   11032:	2800      	cmp	r0, #0
-   11034:	d023      	beq.n	1107e <pow+0x1b2>
-   11036:	2301      	movs	r3, #1
-   11038:	9305      	str	r3, [sp, #20]
-   1103a:	940d      	str	r4, [sp, #52]
-   1103c:	9b00      	ldr	r3, [sp, #0]
-   1103e:	9c01      	ldr	r4, [sp, #4]
-   11040:	9206      	str	r2, [sp, #24]
-   11042:	9307      	str	r3, [sp, #28]
-   11044:	9408      	str	r4, [sp, #32]
-   11046:	9509      	str	r5, [sp, #36]
-   11048:	960a      	str	r6, [sp, #40]
-   1104a:	2f00      	cmp	r7, #0
-   1104c:	d104      	bne.n	11058 <pow+0x18c>
-   1104e:	4a5f      	ldr	r2, [pc, #380]	(111cc <.text+0x111cc>)
-   11050:	4b5f      	ldr	r3, [pc, #380]	(111d0 <.text+0x111d0>)
-   11052:	920b      	str	r2, [sp, #44]
-   11054:	930c      	str	r3, [sp, #48]
-   11056:	e009      	b.n	1106c <pow+0x1a0>
-   11058:	485c      	ldr	r0, [pc, #368]	(111cc <.text+0x111cc>)
-   1105a:	495d      	ldr	r1, [pc, #372]	(111d0 <.text+0x111d0>)
-   1105c:	1c02      	adds	r2, r0, #0
-   1105e:	1c0b      	adds	r3, r1, #0
-   11060:	f003 fe20 	bl	14ca4 <____divdf3_from_thumb>
-   11064:	900b      	str	r0, [sp, #44]
-   11066:	910c      	str	r1, [sp, #48]
-   11068:	2f02      	cmp	r7, #2
-   1106a:	d004      	beq.n	11076 <pow+0x1aa>
-   1106c:	a805      	add	r0, sp, #20
-   1106e:	f001 ffcd 	bl	1300c <matherr>
-   11072:	2800      	cmp	r0, #0
-   11074:	d15b      	bne.n	1112e <pow+0x262>
-   11076:	f002 f90b 	bl	13290 <__errno>
-   1107a:	2321      	movs	r3, #33
-   1107c:	e056      	b.n	1112c <pow+0x260>
-   1107e:	2303      	movs	r3, #3
-   11080:	9305      	str	r3, [sp, #20]
-   11082:	9206      	str	r2, [sp, #24]
-   11084:	9a00      	ldr	r2, [sp, #0]
-   11086:	9b01      	ldr	r3, [sp, #4]
-   11088:	900d      	str	r0, [sp, #52]
-   1108a:	9207      	str	r2, [sp, #28]
-   1108c:	9308      	str	r3, [sp, #32]
-   1108e:	9509      	str	r5, [sp, #36]
-   11090:	960a      	str	r6, [sp, #40]
-   11092:	2f00      	cmp	r7, #0
-   11094:	d120      	bne.n	110d8 <pow+0x20c>
-   11096:	4b54      	ldr	r3, [pc, #336]	(111e8 <.text+0x111e8>)
-   11098:	4c54      	ldr	r4, [pc, #336]	(111ec <.text+0x111ec>)
-   1109a:	9800      	ldr	r0, [sp, #0]
-   1109c:	9901      	ldr	r1, [sp, #4]
-   1109e:	930b      	str	r3, [sp, #44]
-   110a0:	940c      	str	r4, [sp, #48]
-   110a2:	4a4a      	ldr	r2, [pc, #296]	(111cc <.text+0x111cc>)
-   110a4:	4b4a      	ldr	r3, [pc, #296]	(111d0 <.text+0x111d0>)
-   110a6:	f003 fddd 	bl	14c64 <____ltdf2_from_thumb>
-   110aa:	2800      	cmp	r0, #0
-   110ac:	da36      	bge.n	1111c <pow+0x250>
-   110ae:	4a50      	ldr	r2, [pc, #320]	(111f0 <.text+0x111f0>)
-   110b0:	4b50      	ldr	r3, [pc, #320]	(111f4 <.text+0x111f4>)
-   110b2:	1c28      	adds	r0, r5, #0
-   110b4:	1c31      	adds	r1, r6, #0
-   110b6:	f003 fded 	bl	14c94 <____muldf3_from_thumb>
-   110ba:	1c04      	adds	r4, r0, #0
-   110bc:	1c0d      	adds	r5, r1, #0
-   110be:	f001 ffa7 	bl	13010 <rint>
-   110c2:	1c22      	adds	r2, r4, #0
-   110c4:	1c2b      	adds	r3, r5, #0
-   110c6:	f003 fdd1 	bl	14c6c <____nedf2_from_thumb>
-   110ca:	2800      	cmp	r0, #0
-   110cc:	d026      	beq.n	1111c <pow+0x250>
-   110ce:	4b4a      	ldr	r3, [pc, #296]	(111f8 <.text+0x111f8>)
-   110d0:	4c4a      	ldr	r4, [pc, #296]	(111fc <.text+0x111fc>)
-   110d2:	930b      	str	r3, [sp, #44]
-   110d4:	940c      	str	r4, [sp, #48]
-   110d6:	e021      	b.n	1111c <pow+0x250>
-   110d8:	4b49      	ldr	r3, [pc, #292]	(11200 <.text+0x11200>)
-   110da:	4c4a      	ldr	r4, [pc, #296]	(11204 <.text+0x11204>)
-   110dc:	9800      	ldr	r0, [sp, #0]
-   110de:	9901      	ldr	r1, [sp, #4]
-   110e0:	930b      	str	r3, [sp, #44]
-   110e2:	940c      	str	r4, [sp, #48]
-   110e4:	4a39      	ldr	r2, [pc, #228]	(111cc <.text+0x111cc>)
-   110e6:	4b3a      	ldr	r3, [pc, #232]	(111d0 <.text+0x111d0>)
-   110e8:	f003 fdbc 	bl	14c64 <____ltdf2_from_thumb>
-   110ec:	2800      	cmp	r0, #0
-   110ee:	da13      	bge.n	11118 <pow+0x24c>
-   110f0:	4a3f      	ldr	r2, [pc, #252]	(111f0 <.text+0x111f0>)
-   110f2:	4b40      	ldr	r3, [pc, #256]	(111f4 <.text+0x111f4>)
-   110f4:	1c28      	adds	r0, r5, #0
-   110f6:	1c31      	adds	r1, r6, #0
-   110f8:	f003 fdcc 	bl	14c94 <____muldf3_from_thumb>
-   110fc:	1c04      	adds	r4, r0, #0
-   110fe:	1c0d      	adds	r5, r1, #0
-   11100:	f001 ff86 	bl	13010 <rint>
-   11104:	1c22      	adds	r2, r4, #0
-   11106:	1c2b      	adds	r3, r5, #0
-   11108:	f003 fdb0 	bl	14c6c <____nedf2_from_thumb>
-   1110c:	2800      	cmp	r0, #0
-   1110e:	d003      	beq.n	11118 <pow+0x24c>
-   11110:	4b33      	ldr	r3, [pc, #204]	(111e0 <.text+0x111e0>)
-   11112:	4c34      	ldr	r4, [pc, #208]	(111e4 <.text+0x111e4>)
-   11114:	930b      	str	r3, [sp, #44]
-   11116:	940c      	str	r4, [sp, #48]
-   11118:	2f02      	cmp	r7, #2
-   1111a:	d004      	beq.n	11126 <pow+0x25a>
-   1111c:	a805      	add	r0, sp, #20
-   1111e:	f001 ff75 	bl	1300c <matherr>
-   11122:	2800      	cmp	r0, #0
-   11124:	d103      	bne.n	1112e <pow+0x262>
-   11126:	f002 f8b3 	bl	13290 <__errno>
-   1112a:	2322      	movs	r3, #34
-   1112c:	6003      	str	r3, [r0, #0]
-   1112e:	9b0d      	ldr	r3, [sp, #52]
-   11130:	2b00      	cmp	r3, #0
-   11132:	d003      	beq.n	1113c <pow+0x270>
-   11134:	f002 f8ac 	bl	13290 <__errno>
-   11138:	9b0d      	ldr	r3, [sp, #52]
-   1113a:	6003      	str	r3, [r0, #0]
-   1113c:	9b0b      	ldr	r3, [sp, #44]
-   1113e:	9c0c      	ldr	r4, [sp, #48]
-   11140:	9303      	str	r3, [sp, #12]
-   11142:	9404      	str	r4, [sp, #16]
-   11144:	e039      	b.n	111ba <pow+0x2ee>
-   11146:	9803      	ldr	r0, [sp, #12]
-   11148:	9904      	ldr	r1, [sp, #16]
-   1114a:	4a20      	ldr	r2, [pc, #128]	(111cc <.text+0x111cc>)
-   1114c:	4b20      	ldr	r3, [pc, #128]	(111d0 <.text+0x111d0>)
-   1114e:	f003 fd91 	bl	14c74 <____eqdf2_from_thumb>
-   11152:	2800      	cmp	r0, #0
-   11154:	d131      	bne.n	111ba <pow+0x2ee>
-   11156:	9800      	ldr	r0, [sp, #0]
-   11158:	9901      	ldr	r1, [sp, #4]
-   1115a:	f001 feb3 	bl	12ec4 <finite>
-   1115e:	2800      	cmp	r0, #0
-   11160:	d02b      	beq.n	111ba <pow+0x2ee>
-   11162:	1c28      	adds	r0, r5, #0
-   11164:	1c31      	adds	r1, r6, #0
-   11166:	f001 fead 	bl	12ec4 <finite>
-   1116a:	2800      	cmp	r0, #0
-   1116c:	d025      	beq.n	111ba <pow+0x2ee>
-   1116e:	2304      	movs	r3, #4
-   11170:	9305      	str	r3, [sp, #20]
-   11172:	4b1a      	ldr	r3, [pc, #104]	(111dc <.text+0x111dc>)
-   11174:	9306      	str	r3, [sp, #24]
-   11176:	2300      	movs	r3, #0
-   11178:	930d      	str	r3, [sp, #52]
-   1117a:	9a00      	ldr	r2, [sp, #0]
-   1117c:	9b01      	ldr	r3, [sp, #4]
-   1117e:	9207      	str	r2, [sp, #28]
-   11180:	9308      	str	r3, [sp, #32]
-   11182:	4b12      	ldr	r3, [pc, #72]	(111cc <.text+0x111cc>)
-   11184:	4c12      	ldr	r4, [pc, #72]	(111d0 <.text+0x111d0>)
-   11186:	9509      	str	r5, [sp, #36]
-   11188:	960a      	str	r6, [sp, #40]
-   1118a:	930b      	str	r3, [sp, #44]
-   1118c:	940c      	str	r4, [sp, #48]
-   1118e:	2f02      	cmp	r7, #2
-   11190:	d004      	beq.n	1119c <pow+0x2d0>
-   11192:	a805      	add	r0, sp, #20
-   11194:	f001 ff3a 	bl	1300c <matherr>
-   11198:	2800      	cmp	r0, #0
-   1119a:	d103      	bne.n	111a4 <pow+0x2d8>
-   1119c:	f002 f878 	bl	13290 <__errno>
-   111a0:	2322      	movs	r3, #34
-   111a2:	6003      	str	r3, [r0, #0]
-   111a4:	9b0d      	ldr	r3, [sp, #52]
-   111a6:	2b00      	cmp	r3, #0
-   111a8:	d003      	beq.n	111b2 <pow+0x2e6>
-   111aa:	f002 f871 	bl	13290 <__errno>
-   111ae:	9b0d      	ldr	r3, [sp, #52]
-   111b0:	6003      	str	r3, [r0, #0]
-   111b2:	9a0b      	ldr	r2, [sp, #44]
-   111b4:	9b0c      	ldr	r3, [sp, #48]
-   111b6:	9203      	str	r2, [sp, #12]
-   111b8:	9304      	str	r3, [sp, #16]
-   111ba:	9803      	ldr	r0, [sp, #12]
-   111bc:	9904      	ldr	r1, [sp, #16]
-   111be:	b00e      	add	sp, #56
-   111c0:	bcf0      	pop	{r4, r5, r6, r7}
-   111c2:	bc04      	pop	{r2}
-   111c4:	4710      	bx	r2
-   111c6:	0000      	lsls	r0, r0, #0
-   111c8:	5368      	strh	r0, [r5, r5]
-   111ca:	0001      	lsls	r1, r0, #0
-	...
-   111d4:	0000      	lsls	r0, r0, #0
-   111d6:	3ff0      	subs	r7, #240
-   111d8:	0000      	lsls	r0, r0, #0
-   111da:	0000      	lsls	r0, r0, #0
-   111dc:	5524      	strb	r4, [r4, r4]
-   111de:	0001      	lsls	r1, r0, #0
-   111e0:	0000      	lsls	r0, r0, #0
-   111e2:	fff0 0000 	vrev64.8	d16, d0
-   111e6:	0000      	lsls	r0, r0, #0
-   111e8:	ffff 47ef 	vcvt.u<illegal width 64>.f<illegal width 64>	q10, <illegal reg q15.5>
-   111ec:	0000      	lsls	r0, r0, #0
-   111ee:	e000      	b.n	111f2 <.text+0x111f2>
-   111f0:	0000      	lsls	r0, r0, #0
-   111f2:	3fe0      	subs	r7, #224
-   111f4:	0000      	lsls	r0, r0, #0
-   111f6:	0000      	lsls	r0, r0, #0
-   111f8:	ffff c7ef 	vcvt.u<illegal width 64>.f<illegal width 64>	q14, <illegal reg q15.5>
-   111fc:	0000      	lsls	r0, r0, #0
-   111fe:	e000      	b.n	11202 <.text+0x11202>
-   11200:	0000      	lsls	r0, r0, #0
-   11202:	7ff0      	ldrb	r0, [r6, #31]
-   11204:	0000      	lsls	r0, r0, #0
-	...
-
-00011208 <sqrt>:
-   11208:	b5f0      	push	{r4, r5, r6, r7, lr}
-   1120a:	b08d      	sub	sp, #52
-   1120c:	1c04      	adds	r4, r0, #0
-   1120e:	1c0d      	adds	r5, r1, #0
-   11210:	f000 ffec 	bl	121ec <__ieee754_sqrt>
-   11214:	4b26      	ldr	r3, [pc, #152]	(112b0 <.text+0x112b0>)
-   11216:	681b      	ldr	r3, [r3, #0]
-   11218:	9002      	str	r0, [sp, #8]
-   1121a:	9103      	str	r1, [sp, #12]
-   1121c:	9300      	str	r3, [sp, #0]
-   1121e:	3301      	adds	r3, #1
-   11220:	d03f      	beq.n	112a2 <sqrt+0x9a>
-   11222:	1c20      	adds	r0, r4, #0
-   11224:	1c29      	adds	r1, r5, #0
-   11226:	f7ff fc97 	bl	10b58 <isnan>
-   1122a:	9001      	str	r0, [sp, #4]
-   1122c:	2800      	cmp	r0, #0
-   1122e:	d138      	bne.n	112a2 <sqrt+0x9a>
-   11230:	4e20      	ldr	r6, [pc, #128]	(112b4 <.text+0x112b4>)
-   11232:	4f21      	ldr	r7, [pc, #132]	(112b8 <.text+0x112b8>)
-   11234:	1c20      	adds	r0, r4, #0
-   11236:	1c29      	adds	r1, r5, #0
-   11238:	1c32      	adds	r2, r6, #0
-   1123a:	1c3b      	adds	r3, r7, #0
-   1123c:	f003 fd12 	bl	14c64 <____ltdf2_from_thumb>
-   11240:	2800      	cmp	r0, #0
-   11242:	da2e      	bge.n	112a2 <sqrt+0x9a>
-   11244:	2301      	movs	r3, #1
-   11246:	9304      	str	r3, [sp, #16]
-   11248:	4b1c      	ldr	r3, [pc, #112]	(112bc <.text+0x112bc>)
-   1124a:	9408      	str	r4, [sp, #32]
-   1124c:	9509      	str	r5, [sp, #36]
-   1124e:	9305      	str	r3, [sp, #20]
-   11250:	9406      	str	r4, [sp, #24]
-   11252:	9507      	str	r5, [sp, #28]
-   11254:	9b01      	ldr	r3, [sp, #4]
-   11256:	9c00      	ldr	r4, [sp, #0]
-   11258:	930c      	str	r3, [sp, #48]
-   1125a:	2c00      	cmp	r4, #0
-   1125c:	d102      	bne.n	11264 <sqrt+0x5c>
-   1125e:	960a      	str	r6, [sp, #40]
-   11260:	970b      	str	r7, [sp, #44]
-   11262:	e00a      	b.n	1127a <sqrt+0x72>
-   11264:	1c3b      	adds	r3, r7, #0
-   11266:	1c30      	adds	r0, r6, #0
-   11268:	1c39      	adds	r1, r7, #0
-   1126a:	1c32      	adds	r2, r6, #0
-   1126c:	f003 fd1a 	bl	14ca4 <____divdf3_from_thumb>
-   11270:	9b00      	ldr	r3, [sp, #0]
-   11272:	900a      	str	r0, [sp, #40]
-   11274:	910b      	str	r1, [sp, #44]
-   11276:	2b02      	cmp	r3, #2
-   11278:	d004      	beq.n	11284 <sqrt+0x7c>
-   1127a:	a804      	add	r0, sp, #16
-   1127c:	f001 fec6 	bl	1300c <matherr>
-   11280:	2800      	cmp	r0, #0
-   11282:	d103      	bne.n	1128c <sqrt+0x84>
-   11284:	f002 f804 	bl	13290 <__errno>
-   11288:	2321      	movs	r3, #33
-   1128a:	6003      	str	r3, [r0, #0]
-   1128c:	9b0c      	ldr	r3, [sp, #48]
-   1128e:	2b00      	cmp	r3, #0
-   11290:	d003      	beq.n	1129a <sqrt+0x92>
-   11292:	f001 fffd 	bl	13290 <__errno>
-   11296:	9b0c      	ldr	r3, [sp, #48]
-   11298:	6003      	str	r3, [r0, #0]
-   1129a:	9b0a      	ldr	r3, [sp, #40]
-   1129c:	9c0b      	ldr	r4, [sp, #44]
-   1129e:	9302      	str	r3, [sp, #8]
-   112a0:	9403      	str	r4, [sp, #12]
-   112a2:	9802      	ldr	r0, [sp, #8]
-   112a4:	9903      	ldr	r1, [sp, #12]
-   112a6:	b00d      	add	sp, #52
-   112a8:	bcf0      	pop	{r4, r5, r6, r7}
-   112aa:	bc04      	pop	{r2}
-   112ac:	4710      	bx	r2
-   112ae:	0000      	lsls	r0, r0, #0
-   112b0:	5368      	strh	r0, [r5, r5]
-   112b2:	0001      	lsls	r1, r0, #0
-	...
-   112bc:	5528      	strb	r0, [r5, r4]
-   112be:	0001      	lsls	r1, r0, #0
-
-000112c0 <__ieee754_pow>:
-   112c0:	b5f0      	push	{r4, r5, r6, r7, lr}
-   112c2:	b0c1      	sub	sp, #260
-   112c4:	9221      	str	r2, [sp, #132]
-   112c6:	9322      	str	r3, [sp, #136]
-   112c8:	9b21      	ldr	r3, [sp, #132]
-   112ca:	9c22      	ldr	r4, [sp, #136]
-   112cc:	1c1d      	adds	r5, r3, #0
-   112ce:	9336      	str	r3, [sp, #216]
-   112d0:	4bbf      	ldr	r3, [pc, #764]	(115d0 <.text+0x115d0>)
-   112d2:	1c2f      	adds	r7, r5, #0
-   112d4:	401f      	ands	r7, r3
-   112d6:	9023      	str	r0, [sp, #140]
-   112d8:	9124      	str	r1, [sp, #144]
-   112da:	1c0a      	adds	r2, r1, #0
-   112dc:	1c01      	adds	r1, r0, #0
-   112de:	1c20      	adds	r0, r4, #0
-   112e0:	1c3c      	adds	r4, r7, #0
-   112e2:	9237      	str	r2, [sp, #220]
-   112e4:	4304      	orrs	r4, r0
-   112e6:	d103      	bne.n	112f0 <__ieee754_pow+0x30>
-   112e8:	48ba      	ldr	r0, [pc, #744]	(115d4 <.text+0x115d4>)
-   112ea:	49bb      	ldr	r1, [pc, #748]	(115d8 <.text+0x115d8>)
-   112ec:	f000 fd11 	bl	11d12 <.text+0x11d12>
-   112f0:	1c0c      	adds	r4, r1, #0
-   112f2:	401c      	ands	r4, r3
-   112f4:	4bb9      	ldr	r3, [pc, #740]	(115dc <.text+0x115dc>)
-   112f6:	9135      	str	r1, [sp, #212]
-   112f8:	429c      	cmp	r4, r3
-   112fa:	dc0a      	bgt.n	11312 <__ieee754_pow+0x52>
-   112fc:	429c      	cmp	r4, r3
-   112fe:	d102      	bne.n	11306 <__ieee754_pow+0x46>
-   11300:	9937      	ldr	r1, [sp, #220]
-   11302:	2900      	cmp	r1, #0
-   11304:	d105      	bne.n	11312 <__ieee754_pow+0x52>
-   11306:	429f      	cmp	r7, r3
-   11308:	dc03      	bgt.n	11312 <__ieee754_pow+0x52>
-   1130a:	429f      	cmp	r7, r3
-   1130c:	d109      	bne.n	11322 <__ieee754_pow+0x62>
-   1130e:	2800      	cmp	r0, #0
-   11310:	d007      	beq.n	11322 <__ieee754_pow+0x62>
-   11312:	9821      	ldr	r0, [sp, #132]
-   11314:	9922      	ldr	r1, [sp, #136]
-   11316:	9a23      	ldr	r2, [sp, #140]
-   11318:	9b24      	ldr	r3, [sp, #144]
-   1131a:	f003 fcb3 	bl	14c84 <____adddf3_from_thumb>
-   1131e:	f000 fcf8 	bl	11d12 <.text+0x11d12>
-   11322:	9a35      	ldr	r2, [sp, #212]
-   11324:	2a00      	cmp	r2, #0
-   11326:	da2c      	bge.n	11382 <__ieee754_pow+0xc2>
-   11328:	4bad      	ldr	r3, [pc, #692]	(115e0 <.text+0x115e0>)
-   1132a:	429f      	cmp	r7, r3
-   1132c:	dd01      	ble.n	11332 <__ieee754_pow+0x72>
-   1132e:	2302      	movs	r3, #2
-   11330:	e013      	b.n	1135a <__ieee754_pow+0x9a>
-   11332:	4bac      	ldr	r3, [pc, #688]	(115e4 <.text+0x115e4>)
-   11334:	429f      	cmp	r7, r3
-   11336:	dd24      	ble.n	11382 <__ieee754_pow+0xc2>
-   11338:	49ab      	ldr	r1, [pc, #684]	(115e8 <.text+0x115e8>)
-   1133a:	153b      	asrs	r3, r7, #20
-   1133c:	185a      	adds	r2, r3, r1
-   1133e:	2a14      	cmp	r2, #20
-   11340:	dd0d      	ble.n	1135e <__ieee754_pow+0x9e>
-   11342:	2334      	movs	r3, #52
-   11344:	1a9b      	subs	r3, r3, r2
-   11346:	1c02      	adds	r2, r0, #0
-   11348:	40da      	lsrs	r2, r3
-   1134a:	1c11      	adds	r1, r2, #0
-   1134c:	4099      	lsls	r1, r3
-   1134e:	4281      	cmp	r1, r0
-   11350:	d117      	bne.n	11382 <__ieee754_pow+0xc2>
-   11352:	2301      	movs	r3, #1
-   11354:	401a      	ands	r2, r3
-   11356:	2302      	movs	r3, #2
-   11358:	1a9b      	subs	r3, r3, r2
-   1135a:	9334      	str	r3, [sp, #208]
-   1135c:	e013      	b.n	11386 <__ieee754_pow+0xc6>
-   1135e:	2800      	cmp	r0, #0
-   11360:	d157      	bne.n	11412 <__ieee754_pow+0x152>
-   11362:	2314      	movs	r3, #20
-   11364:	1a9b      	subs	r3, r3, r2
-   11366:	1c3a      	adds	r2, r7, #0
-   11368:	411a      	asrs	r2, r3
-   1136a:	1c10      	adds	r0, r2, #0
-   1136c:	4098      	lsls	r0, r3
-   1136e:	42b8      	cmp	r0, r7
-   11370:	d001      	beq.n	11376 <__ieee754_pow+0xb6>
-   11372:	f000 fcd4 	bl	11d1e <.text+0x11d1e>
-   11376:	2301      	movs	r3, #1
-   11378:	401a      	ands	r2, r3
-   1137a:	2302      	movs	r3, #2
-   1137c:	1a9b      	subs	r3, r3, r2
-   1137e:	9334      	str	r3, [sp, #208]
-   11380:	e026      	b.n	113d0 <__ieee754_pow+0x110>
-   11382:	2100      	movs	r1, #0
-   11384:	9134      	str	r1, [sp, #208]
-   11386:	2800      	cmp	r0, #0
-   11388:	d145      	bne.n	11416 <__ieee754_pow+0x156>
-   1138a:	4b94      	ldr	r3, [pc, #592]	(115dc <.text+0x115dc>)
-   1138c:	429f      	cmp	r7, r3
-   1138e:	d11f      	bne.n	113d0 <__ieee754_pow+0x110>
-   11390:	4a96      	ldr	r2, [pc, #600]	(115ec <.text+0x115ec>)
-   11392:	9d37      	ldr	r5, [sp, #220]
-   11394:	18a3      	adds	r3, r4, r2
-   11396:	431d      	orrs	r5, r3
-   11398:	d107      	bne.n	113aa <__ieee754_pow+0xea>
-   1139a:	9821      	ldr	r0, [sp, #132]
-   1139c:	9922      	ldr	r1, [sp, #136]
-   1139e:	1c02      	adds	r2, r0, #0
-   113a0:	1c0b      	adds	r3, r1, #0
-   113a2:	f003 fc73 	bl	14c8c <____subdf3_from_thumb>
-   113a6:	f000 fcb4 	bl	11d12 <.text+0x11d12>
-   113aa:	4b8e      	ldr	r3, [pc, #568]	(115e4 <.text+0x115e4>)
-   113ac:	429c      	cmp	r4, r3
-   113ae:	dd06      	ble.n	113be <__ieee754_pow+0xfe>
-   113b0:	9836      	ldr	r0, [sp, #216]
-   113b2:	2800      	cmp	r0, #0
-   113b4:	db01      	blt.n	113ba <__ieee754_pow+0xfa>
-   113b6:	f000 fcb8 	bl	11d2a <.text+0x11d2a>
-   113ba:	f000 fca8 	bl	11d0e <.text+0x11d0e>
-   113be:	9936      	ldr	r1, [sp, #216]
-   113c0:	2900      	cmp	r1, #0
-   113c2:	db01      	blt.n	113c8 <__ieee754_pow+0x108>
-   113c4:	f000 fca3 	bl	11d0e <.text+0x11d0e>
-   113c8:	9a22      	ldr	r2, [sp, #136]
-   113ca:	9d21      	ldr	r5, [sp, #132]
-   113cc:	4694      	mov	ip, r2
-   113ce:	e053      	b.n	11478 <__ieee754_pow+0x1b8>
-   113d0:	4b87      	ldr	r3, [pc, #540]	(115f0 <.text+0x115f0>)
-   113d2:	429f      	cmp	r7, r3
-   113d4:	d10a      	bne.n	113ec <__ieee754_pow+0x12c>
-   113d6:	9936      	ldr	r1, [sp, #216]
-   113d8:	2900      	cmp	r1, #0
-   113da:	db02      	blt.n	113e2 <__ieee754_pow+0x122>
-   113dc:	9a23      	ldr	r2, [sp, #140]
-   113de:	9b24      	ldr	r3, [sp, #144]
-   113e0:	e086      	b.n	114f0 <__ieee754_pow+0x230>
-   113e2:	487c      	ldr	r0, [pc, #496]	(115d4 <.text+0x115d4>)
-   113e4:	497c      	ldr	r1, [pc, #496]	(115d8 <.text+0x115d8>)
-   113e6:	9a23      	ldr	r2, [sp, #140]
-   113e8:	9b24      	ldr	r3, [sp, #144]
-   113ea:	e05c      	b.n	114a6 <__ieee754_pow+0x1e6>
-   113ec:	2380      	movs	r3, #128
-   113ee:	05db      	lsls	r3, r3, #23
-   113f0:	429d      	cmp	r5, r3
-   113f2:	d102      	bne.n	113fa <__ieee754_pow+0x13a>
-   113f4:	9823      	ldr	r0, [sp, #140]
-   113f6:	9924      	ldr	r1, [sp, #144]
-   113f8:	e068      	b.n	114cc <__ieee754_pow+0x20c>
-   113fa:	4b7e      	ldr	r3, [pc, #504]	(115f4 <.text+0x115f4>)
-   113fc:	429d      	cmp	r5, r3
-   113fe:	d10a      	bne.n	11416 <__ieee754_pow+0x156>
-   11400:	9b35      	ldr	r3, [sp, #212]
-   11402:	2b00      	cmp	r3, #0
-   11404:	db07      	blt.n	11416 <__ieee754_pow+0x156>
-   11406:	9823      	ldr	r0, [sp, #140]
-   11408:	9924      	ldr	r1, [sp, #144]
-   1140a:	f000 feef 	bl	121ec <__ieee754_sqrt>
-   1140e:	f000 fc80 	bl	11d12 <.text+0x11d12>
-   11412:	2500      	movs	r5, #0
-   11414:	9534      	str	r5, [sp, #208]
-   11416:	9823      	ldr	r0, [sp, #140]
-   11418:	9924      	ldr	r1, [sp, #144]
-   1141a:	f001 fd47 	bl	12eac <fabs>
-   1141e:	1c05      	adds	r5, r0, #0
-   11420:	9837      	ldr	r0, [sp, #220]
-   11422:	1c0e      	adds	r6, r1, #0
-   11424:	2800      	cmp	r0, #0
-   11426:	d12f      	bne.n	11488 <__ieee754_pow+0x1c8>
-   11428:	4b6c      	ldr	r3, [pc, #432]	(115dc <.text+0x115dc>)
-   1142a:	429c      	cmp	r4, r3
-   1142c:	d004      	beq.n	11438 <__ieee754_pow+0x178>
-   1142e:	2c00      	cmp	r4, #0
-   11430:	d002      	beq.n	11438 <__ieee754_pow+0x178>
-   11432:	4b6f      	ldr	r3, [pc, #444]	(115f0 <.text+0x115f0>)
-   11434:	429c      	cmp	r4, r3
-   11436:	d127      	bne.n	11488 <__ieee754_pow+0x1c8>
-   11438:	9936      	ldr	r1, [sp, #216]
-   1143a:	2900      	cmp	r1, #0
-   1143c:	da07      	bge.n	1144e <__ieee754_pow+0x18e>
-   1143e:	1c2a      	adds	r2, r5, #0
-   11440:	1c33      	adds	r3, r6, #0
-   11442:	4864      	ldr	r0, [pc, #400]	(115d4 <.text+0x115d4>)
-   11444:	4964      	ldr	r1, [pc, #400]	(115d8 <.text+0x115d8>)
-   11446:	f003 fc2d 	bl	14ca4 <____divdf3_from_thumb>
-   1144a:	1c05      	adds	r5, r0, #0
-   1144c:	1c0e      	adds	r6, r1, #0
-   1144e:	9a35      	ldr	r2, [sp, #212]
-   11450:	2a00      	cmp	r2, #0
-   11452:	db01      	blt.n	11458 <__ieee754_pow+0x198>
-   11454:	f000 fc60 	bl	11d18 <.text+0x11d18>
-   11458:	4864      	ldr	r0, [pc, #400]	(115ec <.text+0x115ec>)
-   1145a:	9934      	ldr	r1, [sp, #208]
-   1145c:	1823      	adds	r3, r4, r0
-   1145e:	4319      	orrs	r1, r3
-   11460:	d104      	bne.n	1146c <__ieee754_pow+0x1ac>
-   11462:	1c28      	adds	r0, r5, #0
-   11464:	1c31      	adds	r1, r6, #0
-   11466:	1c2a      	adds	r2, r5, #0
-   11468:	1c33      	adds	r3, r6, #0
-   1146a:	e018      	b.n	1149e <__ieee754_pow+0x1de>
-   1146c:	9a34      	ldr	r2, [sp, #208]
-   1146e:	2a01      	cmp	r2, #1
-   11470:	d001      	beq.n	11476 <__ieee754_pow+0x1b6>
-   11472:	f000 fc51 	bl	11d18 <.text+0x11d18>
-   11476:	46b4      	mov	ip, r6
-   11478:	2080      	movs	r0, #128
-   1147a:	0600      	lsls	r0, r0, #24
-   1147c:	182b      	adds	r3, r5, r0
-   1147e:	4664      	mov	r4, ip
-   11480:	9321      	str	r3, [sp, #132]
-   11482:	9422      	str	r4, [sp, #136]
-   11484:	f000 fc51 	bl	11d2a <.text+0x11d2a>
-   11488:	9935      	ldr	r1, [sp, #212]
-   1148a:	9a34      	ldr	r2, [sp, #208]
-   1148c:	0fcb      	lsrs	r3, r1, #31
-   1148e:	3b01      	subs	r3, #1
-   11490:	9325      	str	r3, [sp, #148]
-   11492:	4313      	orrs	r3, r2
-   11494:	d10b      	bne.n	114ae <__ieee754_pow+0x1ee>
-   11496:	9823      	ldr	r0, [sp, #140]
-   11498:	9924      	ldr	r1, [sp, #144]
-   1149a:	1c02      	adds	r2, r0, #0
-   1149c:	1c0b      	adds	r3, r1, #0
-   1149e:	f003 fbf5 	bl	14c8c <____subdf3_from_thumb>
-   114a2:	1c02      	adds	r2, r0, #0
-   114a4:	1c0b      	adds	r3, r1, #0
-   114a6:	f003 fbfd 	bl	14ca4 <____divdf3_from_thumb>
-   114aa:	f000 fc32 	bl	11d12 <.text+0x11d12>
-   114ae:	4b52      	ldr	r3, [pc, #328]	(115f8 <.text+0x115f8>)
-   114b0:	429f      	cmp	r7, r3
-   114b2:	dc00      	bgt.n	114b6 <__ieee754_pow+0x1f6>
-   114b4:	e086      	b.n	115c4 <__ieee754_pow+0x304>
-   114b6:	4b51      	ldr	r3, [pc, #324]	(115fc <.text+0x115fc>)
-   114b8:	429f      	cmp	r7, r3
-   114ba:	dd11      	ble.n	114e0 <__ieee754_pow+0x220>
-   114bc:	4b49      	ldr	r3, [pc, #292]	(115e4 <.text+0x115e4>)
-   114be:	429c      	cmp	r4, r3
-   114c0:	dc08      	bgt.n	114d4 <__ieee754_pow+0x214>
-   114c2:	9b36      	ldr	r3, [sp, #216]
-   114c4:	2b00      	cmp	r3, #0
-   114c6:	da1d      	bge.n	11504 <__ieee754_pow+0x244>
-   114c8:	484d      	ldr	r0, [pc, #308]	(11600 <.text+0x11600>)
-   114ca:	494e      	ldr	r1, [pc, #312]	(11604 <.text+0x11604>)
-   114cc:	1c02      	adds	r2, r0, #0
-   114ce:	1c0b      	adds	r3, r1, #0
-   114d0:	f000 fc1a 	bl	11d08 <.text+0x11d08>
-   114d4:	9d36      	ldr	r5, [sp, #216]
-   114d6:	2d00      	cmp	r5, #0
-   114d8:	dc01      	bgt.n	114de <__ieee754_pow+0x21e>
-   114da:	f000 fc18 	bl	11d0e <.text+0x11d0e>
-   114de:	e7f3      	b.n	114c8 <__ieee754_pow+0x208>
-   114e0:	4b49      	ldr	r3, [pc, #292]	(11608 <.text+0x11608>)
-   114e2:	429c      	cmp	r4, r3
-   114e4:	dc08      	bgt.n	114f8 <__ieee754_pow+0x238>
-   114e6:	9936      	ldr	r1, [sp, #216]
-   114e8:	2900      	cmp	r1, #0
-   114ea:	dbed      	blt.n	114c8 <__ieee754_pow+0x208>
-   114ec:	4a47      	ldr	r2, [pc, #284]	(1160c <.text+0x1160c>)
-   114ee:	4b48      	ldr	r3, [pc, #288]	(11610 <.text+0x11610>)
-   114f0:	9221      	str	r2, [sp, #132]
-   114f2:	9322      	str	r3, [sp, #136]
-   114f4:	f000 fc19 	bl	11d2a <.text+0x11d2a>
-   114f8:	4b3d      	ldr	r3, [pc, #244]	(115f0 <.text+0x115f0>)
-   114fa:	429c      	cmp	r4, r3
-   114fc:	dd08      	ble.n	11510 <__ieee754_pow+0x250>
-   114fe:	9b36      	ldr	r3, [sp, #216]
-   11500:	2b00      	cmp	r3, #0
-   11502:	dce1      	bgt.n	114c8 <__ieee754_pow+0x208>
-   11504:	4c41      	ldr	r4, [pc, #260]	(1160c <.text+0x1160c>)
-   11506:	4d42      	ldr	r5, [pc, #264]	(11610 <.text+0x11610>)
-   11508:	9421      	str	r4, [sp, #132]
-   1150a:	9522      	str	r5, [sp, #136]
-   1150c:	f000 fc0d 	bl	11d2a <.text+0x11d2a>
-   11510:	1c28      	adds	r0, r5, #0
-   11512:	1c31      	adds	r1, r6, #0
-   11514:	4a2f      	ldr	r2, [pc, #188]	(115d4 <.text+0x115d4>)
-   11516:	4b30      	ldr	r3, [pc, #192]	(115d8 <.text+0x115d8>)
-   11518:	f003 fbb8 	bl	14c8c <____subdf3_from_thumb>
-   1151c:	4a3d      	ldr	r2, [pc, #244]	(11614 <.text+0x11614>)
-   1151e:	4b3e      	ldr	r3, [pc, #248]	(11618 <.text+0x11618>)
-   11520:	1c04      	adds	r4, r0, #0
-   11522:	1c0d      	adds	r5, r1, #0
-   11524:	f003 fbb6 	bl	14c94 <____muldf3_from_thumb>
-   11528:	4a3c      	ldr	r2, [pc, #240]	(1161c <.text+0x1161c>)
-   1152a:	4b3d      	ldr	r3, [pc, #244]	(11620 <.text+0x11620>)
-   1152c:	901f      	str	r0, [sp, #124]
-   1152e:	9120      	str	r1, [sp, #128]
-   11530:	1c20      	adds	r0, r4, #0
-   11532:	1c29      	adds	r1, r5, #0
-   11534:	f003 fbae 	bl	14c94 <____muldf3_from_thumb>
-   11538:	1c22      	adds	r2, r4, #0
-   1153a:	901d      	str	r0, [sp, #116]
-   1153c:	911e      	str	r1, [sp, #120]
-   1153e:	1c2b      	adds	r3, r5, #0
-   11540:	1c20      	adds	r0, r4, #0
-   11542:	1c29      	adds	r1, r5, #0
-   11544:	f003 fba6 	bl	14c94 <____muldf3_from_thumb>
-   11548:	4a36      	ldr	r2, [pc, #216]	(11624 <.text+0x11624>)
-   1154a:	4b37      	ldr	r3, [pc, #220]	(11628 <.text+0x11628>)
-   1154c:	1c06      	adds	r6, r0, #0
-   1154e:	1c0f      	adds	r7, r1, #0
-   11550:	1c20      	adds	r0, r4, #0
-   11552:	1c29      	adds	r1, r5, #0
-   11554:	f003 fb9e 	bl	14c94 <____muldf3_from_thumb>
-   11558:	4a34      	ldr	r2, [pc, #208]	(1162c <.text+0x1162c>)
-   1155a:	4b35      	ldr	r3, [pc, #212]	(11630 <.text+0x11630>)
-   1155c:	f003 fb92 	bl	14c84 <____adddf3_from_thumb>
-   11560:	1c02      	adds	r2, r0, #0
-   11562:	1c0b      	adds	r3, r1, #0
-   11564:	1c20      	adds	r0, r4, #0
-   11566:	1c29      	adds	r1, r5, #0
-   11568:	f003 fb94 	bl	14c94 <____muldf3_from_thumb>
-   1156c:	1c02      	adds	r2, r0, #0
-   1156e:	1c0b      	adds	r3, r1, #0
-   11570:	4830      	ldr	r0, [pc, #192]	(11634 <.text+0x11634>)
-   11572:	4931      	ldr	r1, [pc, #196]	(11638 <.text+0x11638>)
-   11574:	f003 fb8a 	bl	14c8c <____subdf3_from_thumb>
-   11578:	1c02      	adds	r2, r0, #0
-   1157a:	1c0b      	adds	r3, r1, #0
-   1157c:	1c30      	adds	r0, r6, #0
-   1157e:	1c39      	adds	r1, r7, #0
-   11580:	f003 fb88 	bl	14c94 <____muldf3_from_thumb>
-   11584:	4a2d      	ldr	r2, [pc, #180]	(1163c <.text+0x1163c>)
-   11586:	4b2e      	ldr	r3, [pc, #184]	(11640 <.text+0x11640>)
-   11588:	f003 fb84 	bl	14c94 <____muldf3_from_thumb>
-   1158c:	1c02      	adds	r2, r0, #0
-   1158e:	1c0b      	adds	r3, r1, #0
-   11590:	981d      	ldr	r0, [sp, #116]
-   11592:	991e      	ldr	r1, [sp, #120]
-   11594:	f003 fb76 	bl	14c84 <____adddf3_from_thumb>
-   11598:	1c05      	adds	r5, r0, #0
-   1159a:	1c0e      	adds	r6, r1, #0
-   1159c:	1c2a      	adds	r2, r5, #0
-   1159e:	1c33      	adds	r3, r6, #0
-   115a0:	981f      	ldr	r0, [sp, #124]
-   115a2:	9920      	ldr	r1, [sp, #128]
-   115a4:	f003 fb6e 	bl	14c84 <____adddf3_from_thumb>
-   115a8:	2400      	movs	r4, #0
-   115aa:	1c03      	adds	r3, r0, #0
-   115ac:	932c      	str	r3, [sp, #176]
-   115ae:	942d      	str	r4, [sp, #180]
-   115b0:	1c21      	adds	r1, r4, #0
-   115b2:	9a1f      	ldr	r2, [sp, #124]
-   115b4:	9b20      	ldr	r3, [sp, #128]
-   115b6:	f003 fb69 	bl	14c8c <____subdf3_from_thumb>
-   115ba:	1c02      	adds	r2, r0, #0
-   115bc:	1c0b      	adds	r3, r1, #0
-   115be:	1c28      	adds	r0, r5, #0
-   115c0:	1c31      	adds	r1, r6, #0
-   115c2:	e1d4      	b.n	1196e <.text+0x1196e>
-   115c4:	4b1f      	ldr	r3, [pc, #124]	(11644 <.text+0x11644>)
-   115c6:	429c      	cmp	r4, r3
-   115c8:	dd3e      	ble.n	11648 <.text+0x11648>
-   115ca:	2200      	movs	r2, #0
-   115cc:	e046      	b.n	1165c <.text+0x1165c>
-   115ce:	0000      	lsls	r0, r0, #0
-   115d0:	ffff 7fff 	undefined
-   115d4:	0000      	lsls	r0, r0, #0
-   115d6:	3ff0      	subs	r7, #240
-   115d8:	0000      	lsls	r0, r0, #0
-   115da:	0000      	lsls	r0, r0, #0
-   115dc:	0000      	lsls	r0, r0, #0
-   115de:	7ff0      	ldrb	r0, [r6, #31]
-   115e0:	ffff 433f 	vrsra.u32	d20, d31, #1
-   115e4:	ffff 3fef 	undefined
-   115e8:	fc01 ffff 	stc2	15, cr15, [r1], {255}
-   115ec:	0000      	lsls	r0, r0, #0
-   115ee:	c010      	stmia	r0!, {r4}
-   115f0:	0000      	lsls	r0, r0, #0
-   115f2:	3ff0      	subs	r7, #240
-   115f4:	0000      	lsls	r0, r0, #0
-   115f6:	3fe0      	subs	r7, #224
-   115f8:	0000      	lsls	r0, r0, #0
-   115fa:	41e0      	rors	r0, r4
-   115fc:	0000      	lsls	r0, r0, #0
-   115fe:	43f0      	mvns	r0, r6
-   11600:	e43c      	b.n	10e7c <sin+0x5c>
-   11602:	7e37      	ldrb	r7, [r6, #24]
-   11604:	759c      	strb	r4, [r3, #22]
-   11606:	8800      	ldrh	r0, [r0, #0]
-   11608:	fffe 3fef 	undefined
-	...
-   11614:	1547      	asrs	r7, r0, #21
-   11616:	3ff7      	subs	r7, #247
-   11618:	0000      	lsls	r0, r0, #0
-   1161a:	6000      	str	r0, [r0, #0]
-   1161c:	ae0b      	add	r6, sp, #44
-   1161e:	3e54      	subs	r6, #84
-   11620:	df44      	svc	68
-   11622:	f85d 0000 	ldr.w	r0, [sp, r0]
-   11626:	bfd0      	nop	{13}
-   11628:	0000      	lsls	r0, r0, #0
-   1162a:	0000      	lsls	r0, r0, #0
-   1162c:	5555      	strb	r5, [r2, r5]
-   1162e:	3fd5      	subs	r7, #213
-   11630:	5555      	strb	r5, [r2, r5]
-   11632:	5555      	strb	r5, [r2, r5]
-   11634:	0000      	lsls	r0, r0, #0
-   11636:	3fe0      	subs	r7, #224
-   11638:	0000      	lsls	r0, r0, #0
-   1163a:	0000      	lsls	r0, r0, #0
-   1163c:	1547      	asrs	r7, r0, #21
-   1163e:	bff7      	itett	<und>
-   11640:	82fe      	strh	r6, [r7, #22]
-   11642:	652b      	str	r3, [r5, #80]
-   11644:	ffff 000f 	vaddl.u<illegal width 64>	q8, d15, d15
-   11648:	1c31      	adds	r1, r6, #0
-   1164a:	4bd1      	ldr	r3, [pc, #836]	(11990 <.text+0x11990>)
-   1164c:	4acf      	ldr	r2, [pc, #828]	(1198c <.text+0x1198c>)
-   1164e:	1c28      	adds	r0, r5, #0
-   11650:	f003 fb20 	bl	14c94 <____muldf3_from_thumb>
-   11654:	2235      	movs	r2, #53
-   11656:	1c0e      	adds	r6, r1, #0
-   11658:	1c04      	adds	r4, r0, #0
-   1165a:	4252      	negs	r2, r2
-   1165c:	1523      	asrs	r3, r4, #20
-   1165e:	18d2      	adds	r2, r2, r3
-   11660:	4bcc      	ldr	r3, [pc, #816]	(11994 <.text+0x11994>)
-   11662:	1c21      	adds	r1, r4, #0
-   11664:	4019      	ands	r1, r3
-   11666:	4bcc      	ldr	r3, [pc, #816]	(11998 <.text+0x11998>)
-   11668:	48cc      	ldr	r0, [pc, #816]	(1199c <.text+0x1199c>)
-   1166a:	430b      	orrs	r3, r1
-   1166c:	9340      	str	r3, [sp, #256]
-   1166e:	4bcc      	ldr	r3, [pc, #816]	(119a0 <.text+0x119a0>)
-   11670:	1810      	adds	r0, r2, r0
-   11672:	903e      	str	r0, [sp, #248]
-   11674:	4299      	cmp	r1, r3
-   11676:	dd0c      	ble.n	11692 <.text+0x11692>
-   11678:	4bca      	ldr	r3, [pc, #808]	(119a4 <.text+0x119a4>)
-   1167a:	4299      	cmp	r1, r3
-   1167c:	dc02      	bgt.n	11684 <.text+0x11684>
-   1167e:	2201      	movs	r2, #1
-   11680:	9233      	str	r2, [sp, #204]
-   11682:	e008      	b.n	11696 <.text+0x11696>
-   11684:	9c40      	ldr	r4, [sp, #256]
-   11686:	4bc8      	ldr	r3, [pc, #800]	(119a8 <.text+0x119a8>)
-   11688:	48c8      	ldr	r0, [pc, #800]	(119ac <.text+0x119ac>)
-   1168a:	18d3      	adds	r3, r2, r3
-   1168c:	1824      	adds	r4, r4, r0
-   1168e:	933e      	str	r3, [sp, #248]
-   11690:	9440      	str	r4, [sp, #256]
-   11692:	2100      	movs	r1, #0
-   11694:	9133      	str	r1, [sp, #204]
-   11696:	9b40      	ldr	r3, [sp, #256]
-   11698:	1c34      	adds	r4, r6, #0
-   1169a:	9a33      	ldr	r2, [sp, #204]
-   1169c:	933c      	str	r3, [sp, #240]
-   1169e:	943d      	str	r4, [sp, #244]
-   116a0:	4bc3      	ldr	r3, [pc, #780]	(119b0 <.text+0x119b0>)
-   116a2:	00d2      	lsls	r2, r2, #3
-   116a4:	18d3      	adds	r3, r2, r3
-   116a6:	681e      	ldr	r6, [r3, #0]
-   116a8:	685f      	ldr	r7, [r3, #4]
-   116aa:	921c      	str	r2, [sp, #112]
-   116ac:	1c3b      	adds	r3, r7, #0
-   116ae:	1c32      	adds	r2, r6, #0
-   116b0:	983c      	ldr	r0, [sp, #240]
-   116b2:	993d      	ldr	r1, [sp, #244]
-   116b4:	f003 faea 	bl	14c8c <____subdf3_from_thumb>
-   116b8:	1c32      	adds	r2, r6, #0
-   116ba:	1c3b      	adds	r3, r7, #0
-   116bc:	901a      	str	r0, [sp, #104]
-   116be:	911b      	str	r1, [sp, #108]
-   116c0:	983c      	ldr	r0, [sp, #240]
-   116c2:	993d      	ldr	r1, [sp, #244]
-   116c4:	f003 fade 	bl	14c84 <____adddf3_from_thumb>
-   116c8:	1c02      	adds	r2, r0, #0
-   116ca:	1c0b      	adds	r3, r1, #0
-   116cc:	48b9      	ldr	r0, [pc, #740]	(119b4 <.text+0x119b4>)
-   116ce:	49ba      	ldr	r1, [pc, #744]	(119b8 <.text+0x119b8>)
-   116d0:	f003 fae8 	bl	14ca4 <____divdf3_from_thumb>
-   116d4:	9018      	str	r0, [sp, #96]
-   116d6:	9119      	str	r1, [sp, #100]
-   116d8:	9a18      	ldr	r2, [sp, #96]
-   116da:	9b19      	ldr	r3, [sp, #100]
-   116dc:	981a      	ldr	r0, [sp, #104]
-   116de:	991b      	ldr	r1, [sp, #108]
-   116e0:	f003 fad8 	bl	14c94 <____muldf3_from_thumb>
-   116e4:	2400      	movs	r4, #0
-   116e6:	1c03      	adds	r3, r0, #0
-   116e8:	9338      	str	r3, [sp, #224]
-   116ea:	9439      	str	r4, [sp, #228]
-   116ec:	9b40      	ldr	r3, [sp, #256]
-   116ee:	9016      	str	r0, [sp, #88]
-   116f0:	9117      	str	r1, [sp, #92]
-   116f2:	9c33      	ldr	r4, [sp, #204]
-   116f4:	1058      	asrs	r0, r3, #1
-   116f6:	2380      	movs	r3, #128
-   116f8:	059b      	lsls	r3, r3, #22
-   116fa:	2580      	movs	r5, #128
-   116fc:	4318      	orrs	r0, r3
-   116fe:	032d      	lsls	r5, r5, #12
-   11700:	04a3      	lsls	r3, r4, #18
-   11702:	49ae      	ldr	r1, [pc, #696]	(119bc <.text+0x119bc>)
-   11704:	4aae      	ldr	r2, [pc, #696]	(119c0 <.text+0x119c0>)
-   11706:	195b      	adds	r3, r3, r5
-   11708:	18c1      	adds	r1, r0, r3
-   1170a:	1c0c      	adds	r4, r1, #0
-   1170c:	1c15      	adds	r5, r2, #0
-   1170e:	1c2b      	adds	r3, r5, #0
-   11710:	1c22      	adds	r2, r4, #0
-   11712:	9838      	ldr	r0, [sp, #224]
-   11714:	9939      	ldr	r1, [sp, #228]
-   11716:	f003 fabd 	bl	14c94 <____muldf3_from_thumb>
-   1171a:	1c02      	adds	r2, r0, #0
-   1171c:	1c0b      	adds	r3, r1, #0
-   1171e:	981a      	ldr	r0, [sp, #104]
-   11720:	991b      	ldr	r1, [sp, #108]
-   11722:	f003 fab3 	bl	14c8c <____subdf3_from_thumb>
-   11726:	1c32      	adds	r2, r6, #0
-   11728:	9014      	str	r0, [sp, #80]
-   1172a:	9115      	str	r1, [sp, #84]
-   1172c:	1c3b      	adds	r3, r7, #0
-   1172e:	1c20      	adds	r0, r4, #0
-   11730:	1c29      	adds	r1, r5, #0
-   11732:	f003 faab 	bl	14c8c <____subdf3_from_thumb>
-   11736:	1c02      	adds	r2, r0, #0
-   11738:	1c0b      	adds	r3, r1, #0
-   1173a:	983c      	ldr	r0, [sp, #240]
-   1173c:	993d      	ldr	r1, [sp, #244]
-   1173e:	f003 faa5 	bl	14c8c <____subdf3_from_thumb>
-   11742:	1c02      	adds	r2, r0, #0
-   11744:	1c0b      	adds	r3, r1, #0
-   11746:	9838      	ldr	r0, [sp, #224]
-   11748:	9939      	ldr	r1, [sp, #228]
-   1174a:	f003 faa3 	bl	14c94 <____muldf3_from_thumb>
-   1174e:	1c02      	adds	r2, r0, #0
-   11750:	1c0b      	adds	r3, r1, #0
-   11752:	9814      	ldr	r0, [sp, #80]
-   11754:	9915      	ldr	r1, [sp, #84]
-   11756:	f003 fa99 	bl	14c8c <____subdf3_from_thumb>
-   1175a:	1c02      	adds	r2, r0, #0
-   1175c:	1c0b      	adds	r3, r1, #0
-   1175e:	9818      	ldr	r0, [sp, #96]
-   11760:	9919      	ldr	r1, [sp, #100]
-   11762:	f003 fa97 	bl	14c94 <____muldf3_from_thumb>
-   11766:	9012      	str	r0, [sp, #72]
-   11768:	9113      	str	r1, [sp, #76]
-   1176a:	9816      	ldr	r0, [sp, #88]
-   1176c:	9917      	ldr	r1, [sp, #92]
-   1176e:	1c02      	adds	r2, r0, #0
-   11770:	1c0b      	adds	r3, r1, #0
-   11772:	f003 fa8f 	bl	14c94 <____muldf3_from_thumb>
-   11776:	1c04      	adds	r4, r0, #0
-   11778:	1c0d      	adds	r5, r1, #0
-   1177a:	1c22      	adds	r2, r4, #0
-   1177c:	1c2b      	adds	r3, r5, #0
-   1177e:	f003 fa89 	bl	14c94 <____muldf3_from_thumb>
-   11782:	4a90      	ldr	r2, [pc, #576]	(119c4 <.text+0x119c4>)
-   11784:	4b90      	ldr	r3, [pc, #576]	(119c8 <.text+0x119c8>)
-   11786:	1c06      	adds	r6, r0, #0
-   11788:	1c0f      	adds	r7, r1, #0
-   1178a:	1c20      	adds	r0, r4, #0
-   1178c:	1c29      	adds	r1, r5, #0
-   1178e:	f003 fa81 	bl	14c94 <____muldf3_from_thumb>
-   11792:	4a8e      	ldr	r2, [pc, #568]	(119cc <.text+0x119cc>)
-   11794:	4b8e      	ldr	r3, [pc, #568]	(119d0 <.text+0x119d0>)
-   11796:	f003 fa75 	bl	14c84 <____adddf3_from_thumb>
-   1179a:	1c02      	adds	r2, r0, #0
-   1179c:	1c0b      	adds	r3, r1, #0
-   1179e:	1c20      	adds	r0, r4, #0
-   117a0:	1c29      	adds	r1, r5, #0
-   117a2:	f003 fa77 	bl	14c94 <____muldf3_from_thumb>
-   117a6:	4a8b      	ldr	r2, [pc, #556]	(119d4 <.text+0x119d4>)
-   117a8:	4b8b      	ldr	r3, [pc, #556]	(119d8 <.text+0x119d8>)
-   117aa:	f003 fa6b 	bl	14c84 <____adddf3_from_thumb>
-   117ae:	1c02      	adds	r2, r0, #0
-   117b0:	1c0b      	adds	r3, r1, #0
-   117b2:	1c20      	adds	r0, r4, #0
-   117b4:	1c29      	adds	r1, r5, #0
-   117b6:	f003 fa6d 	bl	14c94 <____muldf3_from_thumb>
-   117ba:	4a88      	ldr	r2, [pc, #544]	(119dc <.text+0x119dc>)
-   117bc:	4b88      	ldr	r3, [pc, #544]	(119e0 <.text+0x119e0>)
-   117be:	f003 fa61 	bl	14c84 <____adddf3_from_thumb>
-   117c2:	1c02      	adds	r2, r0, #0
-   117c4:	1c0b      	adds	r3, r1, #0
-   117c6:	1c20      	adds	r0, r4, #0
-   117c8:	1c29      	adds	r1, r5, #0
-   117ca:	f003 fa63 	bl	14c94 <____muldf3_from_thumb>
-   117ce:	4a85      	ldr	r2, [pc, #532]	(119e4 <.text+0x119e4>)
-   117d0:	4b85      	ldr	r3, [pc, #532]	(119e8 <.text+0x119e8>)
-   117d2:	f003 fa57 	bl	14c84 <____adddf3_from_thumb>
-   117d6:	1c02      	adds	r2, r0, #0
-   117d8:	1c0b      	adds	r3, r1, #0
-   117da:	1c20      	adds	r0, r4, #0
-   117dc:	1c29      	adds	r1, r5, #0
-   117de:	f003 fa59 	bl	14c94 <____muldf3_from_thumb>
-   117e2:	4a82      	ldr	r2, [pc, #520]	(119ec <.text+0x119ec>)
-   117e4:	4b82      	ldr	r3, [pc, #520]	(119f0 <.text+0x119f0>)
-   117e6:	f003 fa4d 	bl	14c84 <____adddf3_from_thumb>
-   117ea:	1c02      	adds	r2, r0, #0
-   117ec:	1c0b      	adds	r3, r1, #0
-   117ee:	1c30      	adds	r0, r6, #0
-   117f0:	1c39      	adds	r1, r7, #0
-   117f2:	f003 fa4f 	bl	14c94 <____muldf3_from_thumb>
-   117f6:	9a16      	ldr	r2, [sp, #88]
-   117f8:	9b17      	ldr	r3, [sp, #92]
-   117fa:	1c04      	adds	r4, r0, #0
-   117fc:	1c0d      	adds	r5, r1, #0
-   117fe:	9838      	ldr	r0, [sp, #224]
-   11800:	9939      	ldr	r1, [sp, #228]
-   11802:	f003 fa3f 	bl	14c84 <____adddf3_from_thumb>
-   11806:	1c02      	adds	r2, r0, #0
-   11808:	1c0b      	adds	r3, r1, #0
-   1180a:	9812      	ldr	r0, [sp, #72]
-   1180c:	9913      	ldr	r1, [sp, #76]
-   1180e:	f003 fa41 	bl	14c94 <____muldf3_from_thumb>
-   11812:	1c02      	adds	r2, r0, #0
-   11814:	1c0b      	adds	r3, r1, #0
-   11816:	1c20      	adds	r0, r4, #0
-   11818:	1c29      	adds	r1, r5, #0
-   1181a:	f003 fa33 	bl	14c84 <____adddf3_from_thumb>
-   1181e:	9010      	str	r0, [sp, #64]
-   11820:	9111      	str	r1, [sp, #68]
-   11822:	9838      	ldr	r0, [sp, #224]
-   11824:	9939      	ldr	r1, [sp, #228]
-   11826:	1c02      	adds	r2, r0, #0
-   11828:	1c0b      	adds	r3, r1, #0
-   1182a:	f003 fa33 	bl	14c94 <____muldf3_from_thumb>
-   1182e:	4a71      	ldr	r2, [pc, #452]	(119f4 <.text+0x119f4>)
-   11830:	4b71      	ldr	r3, [pc, #452]	(119f8 <.text+0x119f8>)
-   11832:	1c06      	adds	r6, r0, #0
-   11834:	1c0f      	adds	r7, r1, #0
-   11836:	f003 fa25 	bl	14c84 <____adddf3_from_thumb>
-   1183a:	9a10      	ldr	r2, [sp, #64]
-   1183c:	9b11      	ldr	r3, [sp, #68]
-   1183e:	f003 fa21 	bl	14c84 <____adddf3_from_thumb>
-   11842:	2400      	movs	r4, #0
-   11844:	1c25      	adds	r5, r4, #0
-   11846:	1c03      	adds	r3, r0, #0
-   11848:	1c04      	adds	r4, r0, #0
-   1184a:	1c1a      	adds	r2, r3, #0
-   1184c:	9838      	ldr	r0, [sp, #224]
-   1184e:	9939      	ldr	r1, [sp, #228]
-   11850:	1c2b      	adds	r3, r5, #0
-   11852:	f003 fa1f 	bl	14c94 <____muldf3_from_thumb>
-   11856:	1c22      	adds	r2, r4, #0
-   11858:	1c2b      	adds	r3, r5, #0
-   1185a:	900e      	str	r0, [sp, #56]
-   1185c:	910f      	str	r1, [sp, #60]
-   1185e:	9812      	ldr	r0, [sp, #72]
-   11860:	9913      	ldr	r1, [sp, #76]
-   11862:	f003 fa17 	bl	14c94 <____muldf3_from_thumb>
-   11866:	4a63      	ldr	r2, [pc, #396]	(119f4 <.text+0x119f4>)
-   11868:	4b63      	ldr	r3, [pc, #396]	(119f8 <.text+0x119f8>)
-   1186a:	900c      	str	r0, [sp, #48]
-   1186c:	910d      	str	r1, [sp, #52]
-   1186e:	1c20      	adds	r0, r4, #0
-   11870:	1c29      	adds	r1, r5, #0
-   11872:	f003 fa0b 	bl	14c8c <____subdf3_from_thumb>
-   11876:	1c32      	adds	r2, r6, #0
-   11878:	1c3b      	adds	r3, r7, #0
-   1187a:	f003 fa07 	bl	14c8c <____subdf3_from_thumb>
-   1187e:	1c02      	adds	r2, r0, #0
-   11880:	1c0b      	adds	r3, r1, #0
-   11882:	9810      	ldr	r0, [sp, #64]
-   11884:	9911      	ldr	r1, [sp, #68]
-   11886:	f003 fa01 	bl	14c8c <____subdf3_from_thumb>
-   1188a:	9a16      	ldr	r2, [sp, #88]
-   1188c:	9b17      	ldr	r3, [sp, #92]
-   1188e:	f003 fa01 	bl	14c94 <____muldf3_from_thumb>
-   11892:	1c02      	adds	r2, r0, #0
-   11894:	1c0b      	adds	r3, r1, #0
-   11896:	980c      	ldr	r0, [sp, #48]
-   11898:	990d      	ldr	r1, [sp, #52]
-   1189a:	f003 f9f3 	bl	14c84 <____adddf3_from_thumb>
-   1189e:	1c06      	adds	r6, r0, #0
-   118a0:	1c0f      	adds	r7, r1, #0
-   118a2:	1c32      	adds	r2, r6, #0
-   118a4:	1c3b      	adds	r3, r7, #0
-   118a6:	980e      	ldr	r0, [sp, #56]
-   118a8:	990f      	ldr	r1, [sp, #60]
-   118aa:	f003 f9eb 	bl	14c84 <____adddf3_from_thumb>
-   118ae:	2400      	movs	r4, #0
-   118b0:	1c25      	adds	r5, r4, #0
-   118b2:	1c29      	adds	r1, r5, #0
-   118b4:	4a51      	ldr	r2, [pc, #324]	(119fc <.text+0x119fc>)
-   118b6:	4b52      	ldr	r3, [pc, #328]	(11a00 <.text+0x11a00>)
-   118b8:	1c04      	adds	r4, r0, #0
-   118ba:	f003 f9eb 	bl	14c94 <____muldf3_from_thumb>
-   118be:	4a51      	ldr	r2, [pc, #324]	(11a04 <.text+0x11a04>)
-   118c0:	4b51      	ldr	r3, [pc, #324]	(11a08 <.text+0x11a08>)
-   118c2:	900a      	str	r0, [sp, #40]
-   118c4:	910b      	str	r1, [sp, #44]
-   118c6:	1c20      	adds	r0, r4, #0
-   118c8:	1c29      	adds	r1, r5, #0
-   118ca:	f003 f9e3 	bl	14c94 <____muldf3_from_thumb>
-   118ce:	9a0e      	ldr	r2, [sp, #56]
-   118d0:	9b0f      	ldr	r3, [sp, #60]
-   118d2:	9008      	str	r0, [sp, #32]
-   118d4:	9109      	str	r1, [sp, #36]
-   118d6:	1c20      	adds	r0, r4, #0
-   118d8:	1c29      	adds	r1, r5, #0
-   118da:	f003 f9d7 	bl	14c8c <____subdf3_from_thumb>
-   118de:	1c02      	adds	r2, r0, #0
-   118e0:	1c0b      	adds	r3, r1, #0
-   118e2:	1c30      	adds	r0, r6, #0
-   118e4:	1c39      	adds	r1, r7, #0
-   118e6:	f003 f9d1 	bl	14c8c <____subdf3_from_thumb>
-   118ea:	4a48      	ldr	r2, [pc, #288]	(11a0c <.text+0x11a0c>)
-   118ec:	4b48      	ldr	r3, [pc, #288]	(11a10 <.text+0x11a10>)
-   118ee:	f003 f9d1 	bl	14c94 <____muldf3_from_thumb>
-   118f2:	1c02      	adds	r2, r0, #0
-   118f4:	1c0b      	adds	r3, r1, #0
-   118f6:	9808      	ldr	r0, [sp, #32]
-   118f8:	9909      	ldr	r1, [sp, #36]
-   118fa:	f003 f9c3 	bl	14c84 <____adddf3_from_thumb>
-   118fe:	9a1c      	ldr	r2, [sp, #112]
-   11900:	4b44      	ldr	r3, [pc, #272]	(11a14 <.text+0x11a14>)
-   11902:	18d3      	adds	r3, r2, r3
-   11904:	681a      	ldr	r2, [r3, #0]
-   11906:	685b      	ldr	r3, [r3, #4]
-   11908:	f003 f9bc 	bl	14c84 <____adddf3_from_thumb>
-   1190c:	9006      	str	r0, [sp, #24]
-   1190e:	9107      	str	r1, [sp, #28]
-   11910:	983e      	ldr	r0, [sp, #248]
-   11912:	f003 f9b3 	bl	14c7c <____floatsidf_from_thumb>
-   11916:	4b40      	ldr	r3, [pc, #256]	(11a18 <.text+0x11a18>)
-   11918:	9c1c      	ldr	r4, [sp, #112]
-   1191a:	18e2      	adds	r2, r4, r3
-   1191c:	1c05      	adds	r5, r0, #0
-   1191e:	1c0e      	adds	r6, r1, #0
-   11920:	6810      	ldr	r0, [r2, #0]
-   11922:	6851      	ldr	r1, [r2, #4]
-   11924:	9a06      	ldr	r2, [sp, #24]
-   11926:	9b07      	ldr	r3, [sp, #28]
-   11928:	9026      	str	r0, [sp, #152]
-   1192a:	9127      	str	r1, [sp, #156]
-   1192c:	980a      	ldr	r0, [sp, #40]
-   1192e:	990b      	ldr	r1, [sp, #44]
-   11930:	f003 f9a8 	bl	14c84 <____adddf3_from_thumb>
-   11934:	9a26      	ldr	r2, [sp, #152]
-   11936:	9b27      	ldr	r3, [sp, #156]
-   11938:	f003 f9a4 	bl	14c84 <____adddf3_from_thumb>
-   1193c:	1c2a      	adds	r2, r5, #0
-   1193e:	1c33      	adds	r3, r6, #0
-   11940:	f003 f9a0 	bl	14c84 <____adddf3_from_thumb>
-   11944:	2400      	movs	r4, #0
-   11946:	1c03      	adds	r3, r0, #0
-   11948:	932c      	str	r3, [sp, #176]
-   1194a:	942d      	str	r4, [sp, #180]
-   1194c:	1c2a      	adds	r2, r5, #0
-   1194e:	1c33      	adds	r3, r6, #0
-   11950:	1c21      	adds	r1, r4, #0
-   11952:	f003 f99b 	bl	14c8c <____subdf3_from_thumb>
-   11956:	9a26      	ldr	r2, [sp, #152]
-   11958:	9b27      	ldr	r3, [sp, #156]
-   1195a:	f003 f997 	bl	14c8c <____subdf3_from_thumb>
-   1195e:	9a0a      	ldr	r2, [sp, #40]
-   11960:	9b0b      	ldr	r3, [sp, #44]
-   11962:	f003 f993 	bl	14c8c <____subdf3_from_thumb>
-   11966:	1c02      	adds	r2, r0, #0
-   11968:	1c0b      	adds	r3, r1, #0
-   1196a:	9806      	ldr	r0, [sp, #24]
-   1196c:	9907      	ldr	r1, [sp, #28]
-   1196e:	f003 f98d 	bl	14c8c <____subdf3_from_thumb>
-   11972:	9b34      	ldr	r3, [sp, #208]
-   11974:	902e      	str	r0, [sp, #184]
-   11976:	912f      	str	r1, [sp, #188]
-   11978:	9925      	ldr	r1, [sp, #148]
-   1197a:	3b01      	subs	r3, #1
-   1197c:	4319      	orrs	r1, r3
-   1197e:	d151      	bne.n	11a24 <.text+0x11a24>
-   11980:	4a26      	ldr	r2, [pc, #152]	(11a1c <.text+0x11a1c>)
-   11982:	4b27      	ldr	r3, [pc, #156]	(11a20 <.text+0x11a20>)
-   11984:	9230      	str	r2, [sp, #192]
-   11986:	9331      	str	r3, [sp, #196]
-   11988:	e050      	b.n	11a2c <.text+0x11a2c>
-   1198a:	0000      	lsls	r0, r0, #0
-   1198c:	0000      	lsls	r0, r0, #0
-   1198e:	4340      	muls	r0, r0
-   11990:	0000      	lsls	r0, r0, #0
-   11992:	0000      	lsls	r0, r0, #0
-   11994:	ffff 000f 	vaddl.u<illegal width 64>	q8, d15, d15
-   11998:	0000      	lsls	r0, r0, #0
-   1199a:	3ff0      	subs	r7, #240
-   1199c:	fc01 ffff 	stc2	15, cr15, [r1], {255}
-   119a0:	988e      	ldr	r0, [sp, #568]
-   119a2:	0003      	lsls	r3, r0, #0
-   119a4:	b679      	undefined
-   119a6:	000b      	lsls	r3, r1, #0
-   119a8:	fc02 ffff 	stc2	15, cr15, [r2], {255}
-   119ac:	0000      	lsls	r0, r0, #0
-   119ae:	fff0 5160 	vrev16.8	<illegal reg q10.5>, q8
-   119b2:	0001      	lsls	r1, r0, #0
-   119b4:	0000      	lsls	r0, r0, #0
-   119b6:	3ff0      	subs	r7, #240
-	...
-   119c4:	7e28      	ldrb	r0, [r5, #24]
-   119c6:	3fca      	subs	r7, #202
-   119c8:	4eef      	ldr	r6, [pc, #956]	(11d88 <.text+0x11d88>)
-   119ca:	4a45      	ldr	r2, [pc, #276]	(11ae0 <.text+0x11ae0>)
-   119cc:	864a      	strh	r2, [r1, #50]
-   119ce:	3fcd      	subs	r7, #205
-   119d0:	db65      	blt.n	11a9e <.text+0x11a9e>
-   119d2:	93c9      	str	r3, [sp, #804]
-   119d4:	7460      	strb	r0, [r4, #17]
-   119d6:	3fd1      	subs	r7, #209
-   119d8:	4101      	asrs	r1, r0
-   119da:	a91d      	add	r1, sp, #116
-   119dc:	5555      	strb	r5, [r2, r5]
-   119de:	3fd5      	subs	r7, #213
-   119e0:	264d      	movs	r6, #77
-   119e2:	518f      	str	r7, [r1, r6]
-   119e4:	6db6      	ldr	r6, [r6, #88]
-   119e6:	3fdb      	subs	r7, #219
-   119e8:	abff      	add	r3, sp, #1020
-   119ea:	db6f      	blt.n	11acc <.text+0x11acc>
-   119ec:	3333      	adds	r3, #51
-   119ee:	3fe3      	subs	r7, #227
-   119f0:	3303      	adds	r3, #3
-   119f2:	3333      	adds	r3, #51
-   119f4:	0000      	lsls	r0, r0, #0
-   119f6:	4008      	ands	r0, r1
-   119f8:	0000      	lsls	r0, r0, #0
-   119fa:	0000      	lsls	r0, r0, #0
-   119fc:	c709      	stmia	r7!, {r0, r3}
-   119fe:	3fee      	subs	r7, #238
-   11a00:	0000      	lsls	r0, r0, #0
-   11a02:	e000      	b.n	11a06 <.text+0x11a06>
-   11a04:	2fe0      	cmp	r7, #224
-   11a06:	be3e      	bkpt	0x003e
-   11a08:	01f5      	lsls	r5, r6, #7
-   11a0a:	145b      	asrs	r3, r3, #17
-   11a0c:	c709      	stmia	r7!, {r0, r3}
-   11a0e:	3fee      	subs	r7, #238
-   11a10:	03fd      	lsls	r5, r7, #15
-   11a12:	dc3a      	bgt.n	11a8a <.text+0x11a8a>
-   11a14:	5170      	str	r0, [r6, r5]
-   11a16:	0001      	lsls	r1, r0, #0
-   11a18:	5180      	str	r0, [r0, r6]
-   11a1a:	0001      	lsls	r1, r0, #0
-   11a1c:	0000      	lsls	r0, r0, #0
-   11a1e:	bff0      	nop	{15}
-   11a20:	0000      	lsls	r0, r0, #0
-   11a22:	0000      	lsls	r0, r0, #0
-   11a24:	4cc5      	ldr	r4, [pc, #788]	(11d3c <.text+0x11d3c>)
-   11a26:	4bc4      	ldr	r3, [pc, #784]	(11d38 <.text+0x11d38>)
-   11a28:	9330      	str	r3, [sp, #192]
-   11a2a:	9431      	str	r4, [sp, #196]
-   11a2c:	9b21      	ldr	r3, [sp, #132]
-   11a2e:	9c22      	ldr	r4, [sp, #136]
-   11a30:	2400      	movs	r4, #0
-   11a32:	1c1e      	adds	r6, r3, #0
-   11a34:	1c1a      	adds	r2, r3, #0
-   11a36:	9821      	ldr	r0, [sp, #132]
-   11a38:	9922      	ldr	r1, [sp, #136]
-   11a3a:	1c23      	adds	r3, r4, #0
-   11a3c:	f003 f926 	bl	14c8c <____subdf3_from_thumb>
-   11a40:	9a2c      	ldr	r2, [sp, #176]
-   11a42:	9b2d      	ldr	r3, [sp, #180]
-   11a44:	f003 f926 	bl	14c94 <____muldf3_from_thumb>
-   11a48:	1c27      	adds	r7, r4, #0
-   11a4a:	9a2e      	ldr	r2, [sp, #184]
-   11a4c:	9b2f      	ldr	r3, [sp, #188]
-   11a4e:	1c04      	adds	r4, r0, #0
-   11a50:	1c0d      	adds	r5, r1, #0
-   11a52:	9821      	ldr	r0, [sp, #132]
-   11a54:	9922      	ldr	r1, [sp, #136]
-   11a56:	f003 f91d 	bl	14c94 <____muldf3_from_thumb>
-   11a5a:	1c02      	adds	r2, r0, #0
-   11a5c:	1c0b      	adds	r3, r1, #0
-   11a5e:	1c20      	adds	r0, r4, #0
-   11a60:	1c29      	adds	r1, r5, #0
-   11a62:	f003 f90f 	bl	14c84 <____adddf3_from_thumb>
-   11a66:	9a2c      	ldr	r2, [sp, #176]
-   11a68:	9b2d      	ldr	r3, [sp, #180]
-   11a6a:	902a      	str	r0, [sp, #168]
-   11a6c:	912b      	str	r1, [sp, #172]
-   11a6e:	1c30      	adds	r0, r6, #0
-   11a70:	1c39      	adds	r1, r7, #0
-   11a72:	f003 f90f 	bl	14c94 <____muldf3_from_thumb>
-   11a76:	9028      	str	r0, [sp, #160]
-   11a78:	9129      	str	r1, [sp, #164]
-   11a7a:	9a28      	ldr	r2, [sp, #160]
-   11a7c:	9b29      	ldr	r3, [sp, #164]
-   11a7e:	982a      	ldr	r0, [sp, #168]
-   11a80:	992b      	ldr	r1, [sp, #172]
-   11a82:	f003 f8ff 	bl	14c84 <____adddf3_from_thumb>
-   11a86:	9032      	str	r0, [sp, #200]
-   11a88:	4bad      	ldr	r3, [pc, #692]	(11d40 <.text+0x11d40>)
-   11a8a:	9c32      	ldr	r4, [sp, #200]
-   11a8c:	1c06      	adds	r6, r0, #0
-   11a8e:	1c0f      	adds	r7, r1, #0
-   11a90:	429c      	cmp	r4, r3
-   11a92:	dd22      	ble.n	11ada <.text+0x11ada>
-   11a94:	4dab      	ldr	r5, [pc, #684]	(11d44 <.text+0x11d44>)
-   11a96:	1963      	adds	r3, r4, r5
-   11a98:	430b      	orrs	r3, r1
-   11a9a:	d115      	bne.n	11ac8 <.text+0x11ac8>
-   11a9c:	4aaa      	ldr	r2, [pc, #680]	(11d48 <.text+0x11d48>)
-   11a9e:	4bab      	ldr	r3, [pc, #684]	(11d4c <.text+0x11d4c>)
-   11aa0:	982a      	ldr	r0, [sp, #168]
-   11aa2:	992b      	ldr	r1, [sp, #172]
-   11aa4:	f003 f8ee 	bl	14c84 <____adddf3_from_thumb>
-   11aa8:	9a28      	ldr	r2, [sp, #160]
-   11aaa:	9b29      	ldr	r3, [sp, #164]
-   11aac:	1c04      	adds	r4, r0, #0
-   11aae:	1c0d      	adds	r5, r1, #0
-   11ab0:	1c30      	adds	r0, r6, #0
-   11ab2:	1c39      	adds	r1, r7, #0
-   11ab4:	f003 f8ea 	bl	14c8c <____subdf3_from_thumb>
-   11ab8:	1c02      	adds	r2, r0, #0
-   11aba:	1c0b      	adds	r3, r1, #0
-   11abc:	1c20      	adds	r0, r4, #0
-   11abe:	1c29      	adds	r1, r5, #0
-   11ac0:	f003 f8f4 	bl	14cac <____gtdf2_from_thumb>
-   11ac4:	2800      	cmp	r0, #0
-   11ac6:	dd2b      	ble.n	11b20 <.text+0x11b20>
-   11ac8:	4aa1      	ldr	r2, [pc, #644]	(11d50 <.text+0x11d50>)
-   11aca:	4ba2      	ldr	r3, [pc, #648]	(11d54 <.text+0x11d54>)
-   11acc:	9830      	ldr	r0, [sp, #192]
-   11ace:	9931      	ldr	r1, [sp, #196]
-   11ad0:	f003 f8e0 	bl	14c94 <____muldf3_from_thumb>
-   11ad4:	4a9e      	ldr	r2, [pc, #632]	(11d50 <.text+0x11d50>)
-   11ad6:	4b9f      	ldr	r3, [pc, #636]	(11d54 <.text+0x11d54>)
-   11ad8:	e116      	b.n	11d08 <.text+0x11d08>
-   11ada:	4b9f      	ldr	r3, [pc, #636]	(11d58 <.text+0x11d58>)
-   11adc:	9c32      	ldr	r4, [sp, #200]
-   11ade:	401c      	ands	r4, r3
-   11ae0:	4b9e      	ldr	r3, [pc, #632]	(11d5c <.text+0x11d5c>)
-   11ae2:	429c      	cmp	r4, r3
-   11ae4:	dd1c      	ble.n	11b20 <.text+0x11b20>
-   11ae6:	9832      	ldr	r0, [sp, #200]
-   11ae8:	499d      	ldr	r1, [pc, #628]	(11d60 <.text+0x11d60>)
-   11aea:	1843      	adds	r3, r0, r1
-   11aec:	433b      	orrs	r3, r7
-   11aee:	d10e      	bne.n	11b0e <.text+0x11b0e>
-   11af0:	9a28      	ldr	r2, [sp, #160]
-   11af2:	9b29      	ldr	r3, [sp, #164]
-   11af4:	1c30      	adds	r0, r6, #0
-   11af6:	1c39      	adds	r1, r7, #0
-   11af8:	f003 f8c8 	bl	14c8c <____subdf3_from_thumb>
-   11afc:	1c02      	adds	r2, r0, #0
-   11afe:	1c0b      	adds	r3, r1, #0
-   11b00:	982a      	ldr	r0, [sp, #168]
-   11b02:	992b      	ldr	r1, [sp, #172]
-   11b04:	f003 f8f6 	bl	14cf4 <____ledf2_from_thumb>
-   11b08:	2800      	cmp	r0, #0
-   11b0a:	dd00      	ble.n	11b0e <.text+0x11b0e>
-   11b0c:	e10b      	b.n	11d26 <.text+0x11d26>
-   11b0e:	4a95      	ldr	r2, [pc, #596]	(11d64 <.text+0x11d64>)
-   11b10:	4b95      	ldr	r3, [pc, #596]	(11d68 <.text+0x11d68>)
-   11b12:	9830      	ldr	r0, [sp, #192]
-   11b14:	9931      	ldr	r1, [sp, #196]
-   11b16:	f003 f8bd 	bl	14c94 <____muldf3_from_thumb>
-   11b1a:	4a92      	ldr	r2, [pc, #584]	(11d64 <.text+0x11d64>)
-   11b1c:	4b92      	ldr	r3, [pc, #584]	(11d68 <.text+0x11d68>)
-   11b1e:	e0f3      	b.n	11d08 <.text+0x11d08>
-   11b20:	4b8d      	ldr	r3, [pc, #564]	(11d58 <.text+0x11d58>)
-   11b22:	9a32      	ldr	r2, [sp, #200]
-   11b24:	401a      	ands	r2, r3
-   11b26:	4b91      	ldr	r3, [pc, #580]	(11d6c <.text+0x11d6c>)
-   11b28:	429a      	cmp	r2, r3
-   11b2a:	dc02      	bgt.n	11b32 <.text+0x11b32>
-   11b2c:	2200      	movs	r2, #0
-   11b2e:	923f      	str	r2, [sp, #252]
-   11b30:	e029      	b.n	11b86 <.text+0x11b86>
-   11b32:	1512      	asrs	r2, r2, #20
-   11b34:	4b8e      	ldr	r3, [pc, #568]	(11d70 <.text+0x11d70>)
-   11b36:	2580      	movs	r5, #128
-   11b38:	036d      	lsls	r5, r5, #13
-   11b3a:	18d2      	adds	r2, r2, r3
-   11b3c:	9832      	ldr	r0, [sp, #200]
-   11b3e:	1c2c      	adds	r4, r5, #0
-   11b40:	4114      	asrs	r4, r2
-   11b42:	1902      	adds	r2, r0, r4
-   11b44:	0050      	lsls	r0, r2, #1
-   11b46:	498b      	ldr	r1, [pc, #556]	(11d74 <.text+0x11d74>)
-   11b48:	4e8b      	ldr	r6, [pc, #556]	(11d78 <.text+0x11d78>)
-   11b4a:	0d40      	lsrs	r0, r0, #21
-   11b4c:	1840      	adds	r0, r0, r1
-   11b4e:	1c31      	adds	r1, r6, #0
-   11b50:	4b8a      	ldr	r3, [pc, #552]	(11d7c <.text+0x11d7c>)
-   11b52:	4c8b      	ldr	r4, [pc, #556]	(11d80 <.text+0x11d80>)
-   11b54:	4101      	asrs	r1, r0
-   11b56:	1c13      	adds	r3, r2, #0
-   11b58:	438b      	bics	r3, r1
-   11b5a:	933a      	str	r3, [sp, #232]
-   11b5c:	943b      	str	r4, [sp, #236]
-   11b5e:	4032      	ands	r2, r6
-   11b60:	2314      	movs	r3, #20
-   11b62:	432a      	orrs	r2, r5
-   11b64:	1a1b      	subs	r3, r3, r0
-   11b66:	411a      	asrs	r2, r3
-   11b68:	923f      	str	r2, [sp, #252]
-   11b6a:	9a32      	ldr	r2, [sp, #200]
-   11b6c:	2a00      	cmp	r2, #0
-   11b6e:	da02      	bge.n	11b76 <.text+0x11b76>
-   11b70:	9b3f      	ldr	r3, [sp, #252]
-   11b72:	425b      	negs	r3, r3
-   11b74:	933f      	str	r3, [sp, #252]
-   11b76:	9828      	ldr	r0, [sp, #160]
-   11b78:	9929      	ldr	r1, [sp, #164]
-   11b7a:	9a3a      	ldr	r2, [sp, #232]
-   11b7c:	9b3b      	ldr	r3, [sp, #236]
-   11b7e:	f003 f885 	bl	14c8c <____subdf3_from_thumb>
-   11b82:	9028      	str	r0, [sp, #160]
-   11b84:	9129      	str	r1, [sp, #164]
-   11b86:	9a28      	ldr	r2, [sp, #160]
-   11b88:	9b29      	ldr	r3, [sp, #164]
-   11b8a:	982a      	ldr	r0, [sp, #168]
-   11b8c:	992b      	ldr	r1, [sp, #172]
-   11b8e:	f003 f879 	bl	14c84 <____adddf3_from_thumb>
-   11b92:	2400      	movs	r4, #0
-   11b94:	1c25      	adds	r5, r4, #0
-   11b96:	1c29      	adds	r1, r5, #0
-   11b98:	4a7a      	ldr	r2, [pc, #488]	(11d84 <.text+0x11d84>)
-   11b9a:	4b7b      	ldr	r3, [pc, #492]	(11d88 <.text+0x11d88>)
-   11b9c:	1c04      	adds	r4, r0, #0
-   11b9e:	f003 f879 	bl	14c94 <____muldf3_from_thumb>
-   11ba2:	9a28      	ldr	r2, [sp, #160]
-   11ba4:	9b29      	ldr	r3, [sp, #164]
-   11ba6:	9004      	str	r0, [sp, #16]
-   11ba8:	9105      	str	r1, [sp, #20]
-   11baa:	1c20      	adds	r0, r4, #0
-   11bac:	1c29      	adds	r1, r5, #0
-   11bae:	f003 f86d 	bl	14c8c <____subdf3_from_thumb>
-   11bb2:	1c02      	adds	r2, r0, #0
-   11bb4:	1c0b      	adds	r3, r1, #0
-   11bb6:	982a      	ldr	r0, [sp, #168]
-   11bb8:	992b      	ldr	r1, [sp, #172]
-   11bba:	f003 f867 	bl	14c8c <____subdf3_from_thumb>
-   11bbe:	4a73      	ldr	r2, [pc, #460]	(11d8c <.text+0x11d8c>)
-   11bc0:	4b73      	ldr	r3, [pc, #460]	(11d90 <.text+0x11d90>)
-   11bc2:	f003 f867 	bl	14c94 <____muldf3_from_thumb>
-   11bc6:	4a73      	ldr	r2, [pc, #460]	(11d94 <.text+0x11d94>)
-   11bc8:	4b73      	ldr	r3, [pc, #460]	(11d98 <.text+0x11d98>)
-   11bca:	1c06      	adds	r6, r0, #0
-   11bcc:	1c0f      	adds	r7, r1, #0
-   11bce:	1c20      	adds	r0, r4, #0
-   11bd0:	1c29      	adds	r1, r5, #0
-   11bd2:	f003 f85f 	bl	14c94 <____muldf3_from_thumb>
-   11bd6:	1c02      	adds	r2, r0, #0
-   11bd8:	1c0b      	adds	r3, r1, #0
-   11bda:	1c30      	adds	r0, r6, #0
-   11bdc:	1c39      	adds	r1, r7, #0
-   11bde:	f003 f851 	bl	14c84 <____adddf3_from_thumb>
-   11be2:	1c04      	adds	r4, r0, #0
-   11be4:	1c0d      	adds	r5, r1, #0
-   11be6:	1c22      	adds	r2, r4, #0
-   11be8:	1c2b      	adds	r3, r5, #0
-   11bea:	9804      	ldr	r0, [sp, #16]
-   11bec:	9905      	ldr	r1, [sp, #20]
-   11bee:	f003 f849 	bl	14c84 <____adddf3_from_thumb>
-   11bf2:	9a04      	ldr	r2, [sp, #16]
-   11bf4:	9b05      	ldr	r3, [sp, #20]
-   11bf6:	9002      	str	r0, [sp, #8]
-   11bf8:	9103      	str	r1, [sp, #12]
-   11bfa:	f003 f847 	bl	14c8c <____subdf3_from_thumb>
-   11bfe:	1c02      	adds	r2, r0, #0
-   11c00:	1c0b      	adds	r3, r1, #0
-   11c02:	1c20      	adds	r0, r4, #0
-   11c04:	1c29      	adds	r1, r5, #0
-   11c06:	f003 f841 	bl	14c8c <____subdf3_from_thumb>
-   11c0a:	9000      	str	r0, [sp, #0]
-   11c0c:	9101      	str	r1, [sp, #4]
-   11c0e:	9802      	ldr	r0, [sp, #8]
-   11c10:	9903      	ldr	r1, [sp, #12]
-   11c12:	1c02      	adds	r2, r0, #0
-   11c14:	1c0b      	adds	r3, r1, #0
-   11c16:	f003 f83d 	bl	14c94 <____muldf3_from_thumb>
-   11c1a:	4a60      	ldr	r2, [pc, #384]	(11d9c <.text+0x11d9c>)
-   11c1c:	4b60      	ldr	r3, [pc, #384]	(11da0 <.text+0x11da0>)
-   11c1e:	1c04      	adds	r4, r0, #0
-   11c20:	1c0d      	adds	r5, r1, #0
-   11c22:	f003 f837 	bl	14c94 <____muldf3_from_thumb>
-   11c26:	4a5f      	ldr	r2, [pc, #380]	(11da4 <.text+0x11da4>)
-   11c28:	4b5f      	ldr	r3, [pc, #380]	(11da8 <.text+0x11da8>)
-   11c2a:	f003 f82f 	bl	14c8c <____subdf3_from_thumb>
-   11c2e:	1c02      	adds	r2, r0, #0
-   11c30:	1c0b      	adds	r3, r1, #0
-   11c32:	1c20      	adds	r0, r4, #0
-   11c34:	1c29      	adds	r1, r5, #0
-   11c36:	f003 f82d 	bl	14c94 <____muldf3_from_thumb>
-   11c3a:	4a5c      	ldr	r2, [pc, #368]	(11dac <.text+0x11dac>)
-   11c3c:	4b5c      	ldr	r3, [pc, #368]	(11db0 <.text+0x11db0>)
-   11c3e:	f003 f821 	bl	14c84 <____adddf3_from_thumb>
-   11c42:	1c02      	adds	r2, r0, #0
-   11c44:	1c0b      	adds	r3, r1, #0
-   11c46:	1c20      	adds	r0, r4, #0
-   11c48:	1c29      	adds	r1, r5, #0
-   11c4a:	f003 f823 	bl	14c94 <____muldf3_from_thumb>
-   11c4e:	4a59      	ldr	r2, [pc, #356]	(11db4 <.text+0x11db4>)
-   11c50:	4b59      	ldr	r3, [pc, #356]	(11db8 <.text+0x11db8>)
-   11c52:	f003 f81b 	bl	14c8c <____subdf3_from_thumb>
-   11c56:	1c02      	adds	r2, r0, #0
-   11c58:	1c0b      	adds	r3, r1, #0
-   11c5a:	1c20      	adds	r0, r4, #0
-   11c5c:	1c29      	adds	r1, r5, #0
-   11c5e:	f003 f819 	bl	14c94 <____muldf3_from_thumb>
-   11c62:	4a56      	ldr	r2, [pc, #344]	(11dbc <.text+0x11dbc>)
-   11c64:	4b56      	ldr	r3, [pc, #344]	(11dc0 <.text+0x11dc0>)
-   11c66:	f003 f80d 	bl	14c84 <____adddf3_from_thumb>
-   11c6a:	1c02      	adds	r2, r0, #0
-   11c6c:	1c0b      	adds	r3, r1, #0
-   11c6e:	1c20      	adds	r0, r4, #0
-   11c70:	1c29      	adds	r1, r5, #0
-   11c72:	f003 f80f 	bl	14c94 <____muldf3_from_thumb>
-   11c76:	1c02      	adds	r2, r0, #0
-   11c78:	1c0b      	adds	r3, r1, #0
-   11c7a:	9802      	ldr	r0, [sp, #8]
-   11c7c:	9903      	ldr	r1, [sp, #12]
-   11c7e:	f003 f805 	bl	14c8c <____subdf3_from_thumb>
-   11c82:	1c04      	adds	r4, r0, #0
-   11c84:	1c0d      	adds	r5, r1, #0
-   11c86:	1c22      	adds	r2, r4, #0
-   11c88:	1c2b      	adds	r3, r5, #0
-   11c8a:	9802      	ldr	r0, [sp, #8]
-   11c8c:	9903      	ldr	r1, [sp, #12]
-   11c8e:	f003 f801 	bl	14c94 <____muldf3_from_thumb>
-   11c92:	4a4c      	ldr	r2, [pc, #304]	(11dc4 <.text+0x11dc4>)
-   11c94:	4b4c      	ldr	r3, [pc, #304]	(11dc8 <.text+0x11dc8>)
-   11c96:	1c06      	adds	r6, r0, #0
-   11c98:	1c0f      	adds	r7, r1, #0
-   11c9a:	1c20      	adds	r0, r4, #0
-   11c9c:	1c29      	adds	r1, r5, #0
-   11c9e:	f002 fff5 	bl	14c8c <____subdf3_from_thumb>
-   11ca2:	1c02      	adds	r2, r0, #0
-   11ca4:	1c0b      	adds	r3, r1, #0
-   11ca6:	1c30      	adds	r0, r6, #0
-   11ca8:	1c39      	adds	r1, r7, #0
-   11caa:	f002 fffb 	bl	14ca4 <____divdf3_from_thumb>
-   11cae:	9a00      	ldr	r2, [sp, #0]
-   11cb0:	9b01      	ldr	r3, [sp, #4]
-   11cb2:	1c0d      	adds	r5, r1, #0
-   11cb4:	1c04      	adds	r4, r0, #0
-   11cb6:	9802      	ldr	r0, [sp, #8]
-   11cb8:	9903      	ldr	r1, [sp, #12]
-   11cba:	f002 ffeb 	bl	14c94 <____muldf3_from_thumb>
-   11cbe:	1c02      	adds	r2, r0, #0
-   11cc0:	1c0b      	adds	r3, r1, #0
-   11cc2:	9800      	ldr	r0, [sp, #0]
-   11cc4:	9901      	ldr	r1, [sp, #4]
-   11cc6:	f002 ffdd 	bl	14c84 <____adddf3_from_thumb>
-   11cca:	1c02      	adds	r2, r0, #0
-   11ccc:	1c0b      	adds	r3, r1, #0
-   11cce:	1c20      	adds	r0, r4, #0
-   11cd0:	1c29      	adds	r1, r5, #0
-   11cd2:	f002 ffdb 	bl	14c8c <____subdf3_from_thumb>
-   11cd6:	9a02      	ldr	r2, [sp, #8]
-   11cd8:	9b03      	ldr	r3, [sp, #12]
-   11cda:	f002 ffd7 	bl	14c8c <____subdf3_from_thumb>
-   11cde:	1c02      	adds	r2, r0, #0
-   11ce0:	1c0b      	adds	r3, r1, #0
-   11ce2:	4916      	ldr	r1, [pc, #88]	(11d3c <.text+0x11d3c>)
-   11ce4:	4814      	ldr	r0, [pc, #80]	(11d38 <.text+0x11d38>)
-   11ce6:	f002 ffd1 	bl	14c8c <____subdf3_from_thumb>
-   11cea:	9d3f      	ldr	r5, [sp, #252]
-   11cec:	052a      	lsls	r2, r5, #20
-   11cee:	1812      	adds	r2, r2, r0
-   11cf0:	1513      	asrs	r3, r2, #20
-   11cf2:	2b00      	cmp	r3, #0
-   11cf4:	dc05      	bgt.n	11d02 <.text+0x11d02>
-   11cf6:	1c2a      	adds	r2, r5, #0
-   11cf8:	f001 fa30 	bl	1315c <scalbn>
-   11cfc:	1c02      	adds	r2, r0, #0
-   11cfe:	1c0b      	adds	r3, r1, #0
-   11d00:	e000      	b.n	11d04 <.text+0x11d04>
-   11d02:	1c0b      	adds	r3, r1, #0
-   11d04:	9830      	ldr	r0, [sp, #192]
-   11d06:	9931      	ldr	r1, [sp, #196]
-   11d08:	f002 ffc4 	bl	14c94 <____muldf3_from_thumb>
-   11d0c:	e001      	b.n	11d12 <.text+0x11d12>
-   11d0e:	481b      	ldr	r0, [pc, #108]	(11d7c <.text+0x11d7c>)
-   11d10:	491b      	ldr	r1, [pc, #108]	(11d80 <.text+0x11d80>)
-   11d12:	9021      	str	r0, [sp, #132]
-   11d14:	9122      	str	r1, [sp, #136]
-   11d16:	e008      	b.n	11d2a <.text+0x11d2a>
-   11d18:	9521      	str	r5, [sp, #132]
-   11d1a:	9622      	str	r6, [sp, #136]
-   11d1c:	e005      	b.n	11d2a <.text+0x11d2a>
-   11d1e:	2100      	movs	r1, #0
-   11d20:	9134      	str	r1, [sp, #208]
-   11d22:	f7ff fb55 	bl	113d0 <__ieee754_pow+0x110>
-   11d26:	1522      	asrs	r2, r4, #20
-   11d28:	e704      	b.n	11b34 <.text+0x11b34>
-   11d2a:	9821      	ldr	r0, [sp, #132]
-   11d2c:	9922      	ldr	r1, [sp, #136]
-   11d2e:	b041      	add	sp, #260
-   11d30:	bcf0      	pop	{r4, r5, r6, r7}
-   11d32:	bc04      	pop	{r2}
-   11d34:	4710      	bx	r2
-   11d36:	0000      	lsls	r0, r0, #0
-   11d38:	0000      	lsls	r0, r0, #0
-   11d3a:	3ff0      	subs	r7, #240
-   11d3c:	0000      	lsls	r0, r0, #0
-   11d3e:	0000      	lsls	r0, r0, #0
-   11d40:	ffff 408f 	vaddl.u<illegal width 64>	q10, d31, d15
-   11d44:	0000      	lsls	r0, r0, #0
-   11d46:	bf70      	nop	{7}
-   11d48:	1547      	asrs	r7, r0, #21
-   11d4a:	3c97      	subs	r4, #151
-   11d4c:	82fe      	strh	r6, [r7, #22]
-   11d4e:	652b      	str	r3, [r5, #80]
-   11d50:	e43c      	b.n	115cc <__ieee754_pow+0x30c>
-   11d52:	7e37      	ldrb	r7, [r6, #24]
-   11d54:	759c      	strb	r4, [r3, #22]
-   11d56:	8800      	ldrh	r0, [r0, #0]
-   11d58:	ffff 7fff 	undefined
-   11d5c:	cbff      	ldmia	r3!, {r0, r1, r2, r3, r4, r5, r6, r7}
-   11d5e:	4090      	lsls	r0, r2
-   11d60:	3400      	adds	r4, #0
-   11d62:	3f6f      	subs	r7, #111
-   11d64:	6e1f      	ldr	r7, [r3, #96]
-   11d66:	01a5      	lsls	r5, r4, #6
-   11d68:	f359 c2f8 	blx	f6b35c <__ctors_end__+0xf55e2c>
-   11d6c:	0000      	lsls	r0, r0, #0
-   11d6e:	3fe0      	subs	r7, #224
-   11d70:	fc02 ffff 	stc2	15, cr15, [r2], {255}
-   11d74:	fc01 ffff 	stc2	15, cr15, [r1], {255}
-   11d78:	ffff 000f 	vaddl.u<illegal width 64>	q8, d15, d15
-	...
-   11d84:	2e43      	cmp	r6, #67
-   11d86:	3fe6      	subs	r7, #230
-   11d88:	0000      	lsls	r0, r0, #0
-   11d8a:	0000      	lsls	r0, r0, #0
-   11d8c:	2e42      	cmp	r6, #66
-   11d8e:	3fe6      	subs	r7, #230
-   11d90:	39ef      	subs	r1, #239
-   11d92:	fefa 5c61 	cdp2	12, 15, cr5, cr10, cr1, {3}
-   11d96:	be20      	bkpt	0x0020
-   11d98:	6c39      	ldr	r1, [r7, #64]
-   11d9a:	0ca8      	lsrs	r0, r5, #18
-   11d9c:	3769      	adds	r7, #105
-   11d9e:	3e66      	subs	r6, #102
-   11da0:	a4d0      	add	r4, pc, #832	(adr r4,120e4 <__ieee754_rem_pio2+0x318>)
-   11da2:	72be      	strb	r6, [r7, #10]
-   11da4:	bd41      	pop	{r0, r6, pc}
-   11da6:	3ebb      	subs	r6, #187
-   11da8:	6bf1      	ldr	r1, [r6, #60]
-   11daa:	c5d2      	stmia	r5!, {r1, r4, r6, r7}
-   11dac:	566a      	ldrsb	r2, [r5, r1]
-   11dae:	3f11      	subs	r7, #17
-   11db0:	de2c      	bal.n	11e0c <__ieee754_rem_pio2+0x40>
-   11db2:	af25      	add	r7, sp, #148
-   11db4:	c16c      	stmia	r1!, {r2, r3, r5, r6}
-   11db6:	3f66      	subs	r7, #102
-   11db8:	bd93      	pop	{r0, r1, r4, r7, pc}
-   11dba:	16be      	asrs	r6, r7, #26
-   11dbc:	5555      	strb	r5, [r2, r5]
-   11dbe:	3fc5      	subs	r7, #197
-   11dc0:	553e      	strb	r6, [r7, r4]
-   11dc2:	5555      	strb	r5, [r2, r5]
-   11dc4:	0000      	lsls	r0, r0, #0
-   11dc6:	4000      	ands	r0, r0
-   11dc8:	0000      	lsls	r0, r0, #0
-	...
-
-00011dcc <__ieee754_rem_pio2>:
-   11dcc:	b5f0      	push	{r4, r5, r6, r7, lr}
-   11dce:	b093      	sub	sp, #76
-   11dd0:	9009      	str	r0, [sp, #36]
-   11dd2:	4bd7      	ldr	r3, [pc, #860]	(12130 <.text+0x12130>)
-   11dd4:	9f09      	ldr	r7, [sp, #36]
-   11dd6:	401f      	ands	r7, r3
-   11dd8:	4bd6      	ldr	r3, [pc, #856]	(12134 <.text+0x12134>)
-   11dda:	1c05      	adds	r5, r0, #0
-   11ddc:	1c0e      	adds	r6, r1, #0
-   11dde:	9202      	str	r2, [sp, #8]
-   11de0:	429f      	cmp	r7, r3
-   11de2:	dc07      	bgt.n	11df4 <__ieee754_rem_pio2+0x28>
-   11de4:	4bd4      	ldr	r3, [pc, #848]	(12138 <.text+0x12138>)
-   11de6:	4cd5      	ldr	r4, [pc, #852]	(1213c <.text+0x1213c>)
-   11de8:	6093      	str	r3, [r2, #8]
-   11dea:	60d4      	str	r4, [r2, #12]
-   11dec:	2300      	movs	r3, #0
-   11dee:	6015      	str	r5, [r2, #0]
-   11df0:	6056      	str	r6, [r2, #4]
-   11df2:	e023      	b.n	11e3c <__ieee754_rem_pio2+0x70>
-   11df4:	4bd2      	ldr	r3, [pc, #840]	(12140 <.text+0x12140>)
-   11df6:	429f      	cmp	r7, r3
-   11df8:	dc6e      	bgt.n	11ed8 <__ieee754_rem_pio2+0x10c>
-   11dfa:	9b09      	ldr	r3, [sp, #36]
-   11dfc:	2b00      	cmp	r3, #0
-   11dfe:	dd35      	ble.n	11e6c <__ieee754_rem_pio2+0xa0>
-   11e00:	4ad0      	ldr	r2, [pc, #832]	(12144 <.text+0x12144>)
-   11e02:	4bd1      	ldr	r3, [pc, #836]	(12148 <.text+0x12148>)
-   11e04:	f002 ff42 	bl	14c8c <____subdf3_from_thumb>
-   11e08:	4bd0      	ldr	r3, [pc, #832]	(1214c <.text+0x1214c>)
-   11e0a:	1c04      	adds	r4, r0, #0
-   11e0c:	1c0d      	adds	r5, r1, #0
-   11e0e:	429f      	cmp	r7, r3
-   11e10:	d016      	beq.n	11e40 <__ieee754_rem_pio2+0x74>
-   11e12:	4acf      	ldr	r2, [pc, #828]	(12150 <.text+0x12150>)
-   11e14:	4bcf      	ldr	r3, [pc, #828]	(12154 <.text+0x12154>)
-   11e16:	f002 ff39 	bl	14c8c <____subdf3_from_thumb>
-   11e1a:	1c0b      	adds	r3, r1, #0
-   11e1c:	9902      	ldr	r1, [sp, #8]
-   11e1e:	1c02      	adds	r2, r0, #0
-   11e20:	600a      	str	r2, [r1, #0]
-   11e22:	604b      	str	r3, [r1, #4]
-   11e24:	1c20      	adds	r0, r4, #0
-   11e26:	1c29      	adds	r1, r5, #0
-   11e28:	f002 ff30 	bl	14c8c <____subdf3_from_thumb>
-   11e2c:	4ac8      	ldr	r2, [pc, #800]	(12150 <.text+0x12150>)
-   11e2e:	4bc9      	ldr	r3, [pc, #804]	(12154 <.text+0x12154>)
-   11e30:	f002 ff2c 	bl	14c8c <____subdf3_from_thumb>
-   11e34:	9a02      	ldr	r2, [sp, #8]
-   11e36:	6090      	str	r0, [r2, #8]
-   11e38:	60d1      	str	r1, [r2, #12]
-   11e3a:	2301      	movs	r3, #1
-   11e3c:	9308      	str	r3, [sp, #32]
-   11e3e:	e1ce      	b.n	121de <.text+0x121de>
-   11e40:	4ac5      	ldr	r2, [pc, #788]	(12158 <.text+0x12158>)
-   11e42:	4bc6      	ldr	r3, [pc, #792]	(1215c <.text+0x1215c>)
-   11e44:	f002 ff22 	bl	14c8c <____subdf3_from_thumb>
-   11e48:	4ac5      	ldr	r2, [pc, #788]	(12160 <.text+0x12160>)
-   11e4a:	4bc6      	ldr	r3, [pc, #792]	(12164 <.text+0x12164>)
-   11e4c:	1c04      	adds	r4, r0, #0
-   11e4e:	1c0d      	adds	r5, r1, #0
-   11e50:	f002 ff1c 	bl	14c8c <____subdf3_from_thumb>
-   11e54:	1c0b      	adds	r3, r1, #0
-   11e56:	9902      	ldr	r1, [sp, #8]
-   11e58:	1c02      	adds	r2, r0, #0
-   11e5a:	600a      	str	r2, [r1, #0]
-   11e5c:	604b      	str	r3, [r1, #4]
-   11e5e:	1c20      	adds	r0, r4, #0
-   11e60:	1c29      	adds	r1, r5, #0
-   11e62:	f002 ff13 	bl	14c8c <____subdf3_from_thumb>
-   11e66:	4abe      	ldr	r2, [pc, #760]	(12160 <.text+0x12160>)
-   11e68:	4bbe      	ldr	r3, [pc, #760]	(12164 <.text+0x12164>)
-   11e6a:	e7e1      	b.n	11e30 <__ieee754_rem_pio2+0x64>
-   11e6c:	4ab5      	ldr	r2, [pc, #724]	(12144 <.text+0x12144>)
-   11e6e:	4bb6      	ldr	r3, [pc, #728]	(12148 <.text+0x12148>)
-   11e70:	f002 ff08 	bl	14c84 <____adddf3_from_thumb>
-   11e74:	4bb5      	ldr	r3, [pc, #724]	(1214c <.text+0x1214c>)
-   11e76:	1c04      	adds	r4, r0, #0
-   11e78:	1c0d      	adds	r5, r1, #0
-   11e7a:	429f      	cmp	r7, r3
-   11e7c:	d00f      	beq.n	11e9e <__ieee754_rem_pio2+0xd2>
-   11e7e:	4ab4      	ldr	r2, [pc, #720]	(12150 <.text+0x12150>)
-   11e80:	4bb4      	ldr	r3, [pc, #720]	(12154 <.text+0x12154>)
-   11e82:	f002 feff 	bl	14c84 <____adddf3_from_thumb>
-   11e86:	1c0b      	adds	r3, r1, #0
-   11e88:	9902      	ldr	r1, [sp, #8]
-   11e8a:	1c02      	adds	r2, r0, #0
-   11e8c:	600a      	str	r2, [r1, #0]
-   11e8e:	604b      	str	r3, [r1, #4]
-   11e90:	1c20      	adds	r0, r4, #0
-   11e92:	1c29      	adds	r1, r5, #0
-   11e94:	f002 fefa 	bl	14c8c <____subdf3_from_thumb>
-   11e98:	4aad      	ldr	r2, [pc, #692]	(12150 <.text+0x12150>)
-   11e9a:	4bae      	ldr	r3, [pc, #696]	(12154 <.text+0x12154>)
-   11e9c:	e014      	b.n	11ec8 <__ieee754_rem_pio2+0xfc>
-   11e9e:	4aae      	ldr	r2, [pc, #696]	(12158 <.text+0x12158>)
-   11ea0:	4bae      	ldr	r3, [pc, #696]	(1215c <.text+0x1215c>)
-   11ea2:	f002 feef 	bl	14c84 <____adddf3_from_thumb>
-   11ea6:	4aae      	ldr	r2, [pc, #696]	(12160 <.text+0x12160>)
-   11ea8:	4bae      	ldr	r3, [pc, #696]	(12164 <.text+0x12164>)
-   11eaa:	1c04      	adds	r4, r0, #0
-   11eac:	1c0d      	adds	r5, r1, #0
-   11eae:	f002 fee9 	bl	14c84 <____adddf3_from_thumb>
-   11eb2:	1c0b      	adds	r3, r1, #0
-   11eb4:	9902      	ldr	r1, [sp, #8]
-   11eb6:	1c02      	adds	r2, r0, #0
-   11eb8:	600a      	str	r2, [r1, #0]
-   11eba:	604b      	str	r3, [r1, #4]
-   11ebc:	1c20      	adds	r0, r4, #0
-   11ebe:	1c29      	adds	r1, r5, #0
-   11ec0:	f002 fee4 	bl	14c8c <____subdf3_from_thumb>
-   11ec4:	4aa6      	ldr	r2, [pc, #664]	(12160 <.text+0x12160>)
-   11ec6:	4ba7      	ldr	r3, [pc, #668]	(12164 <.text+0x12164>)
-   11ec8:	f002 fedc 	bl	14c84 <____adddf3_from_thumb>
-   11ecc:	9a02      	ldr	r2, [sp, #8]
-   11ece:	2301      	movs	r3, #1
-   11ed0:	425b      	negs	r3, r3
-   11ed2:	6090      	str	r0, [r2, #8]
-   11ed4:	60d1      	str	r1, [r2, #12]
-   11ed6:	e7b1      	b.n	11e3c <__ieee754_rem_pio2+0x70>
-   11ed8:	4ba3      	ldr	r3, [pc, #652]	(12168 <.text+0x12168>)
-   11eda:	429f      	cmp	r7, r3
-   11edc:	dd00      	ble.n	11ee0 <__ieee754_rem_pio2+0x114>
-   11ede:	e0dc      	b.n	1209a <__ieee754_rem_pio2+0x2ce>
-   11ee0:	f000 ffe4 	bl	12eac <fabs>
-   11ee4:	4aa1      	ldr	r2, [pc, #644]	(1216c <.text+0x1216c>)
-   11ee6:	4ba2      	ldr	r3, [pc, #648]	(12170 <.text+0x12170>)
-   11ee8:	1c04      	adds	r4, r0, #0
-   11eea:	1c0d      	adds	r5, r1, #0
-   11eec:	f002 fed2 	bl	14c94 <____muldf3_from_thumb>
-   11ef0:	4aa0      	ldr	r2, [pc, #640]	(12174 <.text+0x12174>)
-   11ef2:	4ba1      	ldr	r3, [pc, #644]	(12178 <.text+0x12178>)
-   11ef4:	f002 fec6 	bl	14c84 <____adddf3_from_thumb>
-   11ef8:	f002 fed0 	bl	14c9c <____fixdfsi_from_thumb>
-   11efc:	9008      	str	r0, [sp, #32]
-   11efe:	f002 febd 	bl	14c7c <____floatsidf_from_thumb>
-   11f02:	4a9e      	ldr	r2, [pc, #632]	(1217c <.text+0x1217c>)
-   11f04:	4b9e      	ldr	r3, [pc, #632]	(12180 <.text+0x12180>)
-   11f06:	9006      	str	r0, [sp, #24]
-   11f08:	9107      	str	r1, [sp, #28]
-   11f0a:	f002 fec3 	bl	14c94 <____muldf3_from_thumb>
-   11f0e:	1c02      	adds	r2, r0, #0
-   11f10:	1c0b      	adds	r3, r1, #0
-   11f12:	1c20      	adds	r0, r4, #0
-   11f14:	1c29      	adds	r1, r5, #0
-   11f16:	f002 feb5 	bl	14c84 <____adddf3_from_thumb>
-   11f1a:	4a8d      	ldr	r2, [pc, #564]	(12150 <.text+0x12150>)
-   11f1c:	4b8d      	ldr	r3, [pc, #564]	(12154 <.text+0x12154>)
-   11f1e:	9004      	str	r0, [sp, #16]
-   11f20:	9105      	str	r1, [sp, #20]
-   11f22:	9806      	ldr	r0, [sp, #24]
-   11f24:	9907      	ldr	r1, [sp, #28]
-   11f26:	f002 feb5 	bl	14c94 <____muldf3_from_thumb>
-   11f2a:	9c08      	ldr	r4, [sp, #32]
-   11f2c:	1c05      	adds	r5, r0, #0
-   11f2e:	1c0e      	adds	r6, r1, #0
-   11f30:	2c1f      	cmp	r4, #31
-   11f32:	dc10      	bgt.n	11f56 <__ieee754_rem_pio2+0x18a>
-   11f34:	4b93      	ldr	r3, [pc, #588]	(12184 <.text+0x12184>)
-   11f36:	00a2      	lsls	r2, r4, #2
-   11f38:	18d2      	adds	r2, r2, r3
-   11f3a:	3a04      	subs	r2, #4
-   11f3c:	6813      	ldr	r3, [r2, #0]
-   11f3e:	429f      	cmp	r7, r3
-   11f40:	d009      	beq.n	11f56 <__ieee754_rem_pio2+0x18a>
-   11f42:	1c2a      	adds	r2, r5, #0
-   11f44:	9804      	ldr	r0, [sp, #16]
-   11f46:	9905      	ldr	r1, [sp, #20]
-   11f48:	1c33      	adds	r3, r6, #0
-   11f4a:	f002 fe9f 	bl	14c8c <____subdf3_from_thumb>
-   11f4e:	9a02      	ldr	r2, [sp, #8]
-   11f50:	6010      	str	r0, [r2, #0]
-   11f52:	6051      	str	r1, [r2, #4]
-   11f54:	e083      	b.n	1205e <__ieee754_rem_pio2+0x292>
-   11f56:	1c33      	adds	r3, r6, #0
-   11f58:	9804      	ldr	r0, [sp, #16]
-   11f5a:	9905      	ldr	r1, [sp, #20]
-   11f5c:	1c2a      	adds	r2, r5, #0
-   11f5e:	f002 fe95 	bl	14c8c <____subdf3_from_thumb>
-   11f62:	9b02      	ldr	r3, [sp, #8]
-   11f64:	4c88      	ldr	r4, [pc, #544]	(12188 <.text+0x12188>)
-   11f66:	6018      	str	r0, [r3, #0]
-   11f68:	6059      	str	r1, [r3, #4]
-   11f6a:	0d03      	lsrs	r3, r0, #20
-   11f6c:	153f      	asrs	r7, r7, #20
-   11f6e:	4023      	ands	r3, r4
-   11f70:	1afb      	subs	r3, r7, r3
-   11f72:	9703      	str	r7, [sp, #12]
-   11f74:	2b10      	cmp	r3, #16
-   11f76:	dc00      	bgt.n	11f7a <__ieee754_rem_pio2+0x1ae>
-   11f78:	e071      	b.n	1205e <__ieee754_rem_pio2+0x292>
-   11f7a:	4a77      	ldr	r2, [pc, #476]	(12158 <.text+0x12158>)
-   11f7c:	4b77      	ldr	r3, [pc, #476]	(1215c <.text+0x1215c>)
-   11f7e:	9806      	ldr	r0, [sp, #24]
-   11f80:	9907      	ldr	r1, [sp, #28]
-   11f82:	f002 fe87 	bl	14c94 <____muldf3_from_thumb>
-   11f86:	1c06      	adds	r6, r0, #0
-   11f88:	1c0f      	adds	r7, r1, #0
-   11f8a:	1c32      	adds	r2, r6, #0
-   11f8c:	1c3b      	adds	r3, r7, #0
-   11f8e:	9804      	ldr	r0, [sp, #16]
-   11f90:	9905      	ldr	r1, [sp, #20]
-   11f92:	f002 fe7b 	bl	14c8c <____subdf3_from_thumb>
-   11f96:	4a72      	ldr	r2, [pc, #456]	(12160 <.text+0x12160>)
-   11f98:	4b72      	ldr	r3, [pc, #456]	(12164 <.text+0x12164>)
-   11f9a:	900b      	str	r0, [sp, #44]
-   11f9c:	910c      	str	r1, [sp, #48]
-   11f9e:	9806      	ldr	r0, [sp, #24]
-   11fa0:	9907      	ldr	r1, [sp, #28]
-   11fa2:	f002 fe77 	bl	14c94 <____muldf3_from_thumb>
-   11fa6:	9a0b      	ldr	r2, [sp, #44]
-   11fa8:	9b0c      	ldr	r3, [sp, #48]
-   11faa:	1c04      	adds	r4, r0, #0
-   11fac:	1c0d      	adds	r5, r1, #0
-   11fae:	9804      	ldr	r0, [sp, #16]
-   11fb0:	9905      	ldr	r1, [sp, #20]
-   11fb2:	f002 fe6b 	bl	14c8c <____subdf3_from_thumb>
-   11fb6:	1c32      	adds	r2, r6, #0
-   11fb8:	1c3b      	adds	r3, r7, #0
-   11fba:	f002 fe67 	bl	14c8c <____subdf3_from_thumb>
-   11fbe:	1c02      	adds	r2, r0, #0
-   11fc0:	1c0b      	adds	r3, r1, #0
-   11fc2:	1c20      	adds	r0, r4, #0
-   11fc4:	1c29      	adds	r1, r5, #0
-   11fc6:	f002 fe61 	bl	14c8c <____subdf3_from_thumb>
-   11fca:	1c05      	adds	r5, r0, #0
-   11fcc:	1c0e      	adds	r6, r1, #0
-   11fce:	1c2a      	adds	r2, r5, #0
-   11fd0:	1c33      	adds	r3, r6, #0
-   11fd2:	980b      	ldr	r0, [sp, #44]
-   11fd4:	990c      	ldr	r1, [sp, #48]
-   11fd6:	f002 fe59 	bl	14c8c <____subdf3_from_thumb>
-   11fda:	9a02      	ldr	r2, [sp, #8]
-   11fdc:	4c6a      	ldr	r4, [pc, #424]	(12188 <.text+0x12188>)
-   11fde:	6010      	str	r0, [r2, #0]
-   11fe0:	6051      	str	r1, [r2, #4]
-   11fe2:	0d03      	lsrs	r3, r0, #20
-   11fe4:	9903      	ldr	r1, [sp, #12]
-   11fe6:	4023      	ands	r3, r4
-   11fe8:	1acb      	subs	r3, r1, r3
-   11fea:	2b31      	cmp	r3, #49
-   11fec:	dc04      	bgt.n	11ff8 <__ieee754_rem_pio2+0x22c>
-   11fee:	9a0b      	ldr	r2, [sp, #44]
-   11ff0:	9b0c      	ldr	r3, [sp, #48]
-   11ff2:	9204      	str	r2, [sp, #16]
-   11ff4:	9305      	str	r3, [sp, #20]
-   11ff6:	e032      	b.n	1205e <__ieee754_rem_pio2+0x292>
-   11ff8:	4a64      	ldr	r2, [pc, #400]	(1218c <.text+0x1218c>)
-   11ffa:	4b65      	ldr	r3, [pc, #404]	(12190 <.text+0x12190>)
-   11ffc:	9806      	ldr	r0, [sp, #24]
-   11ffe:	9907      	ldr	r1, [sp, #28]
-   12000:	f002 fe48 	bl	14c94 <____muldf3_from_thumb>
-   12004:	1c06      	adds	r6, r0, #0
-   12006:	1c0f      	adds	r7, r1, #0
-   12008:	1c32      	adds	r2, r6, #0
-   1200a:	1c3b      	adds	r3, r7, #0
-   1200c:	980b      	ldr	r0, [sp, #44]
-   1200e:	990c      	ldr	r1, [sp, #48]
-   12010:	f002 fe3c 	bl	14c8c <____subdf3_from_thumb>
-   12014:	4a5f      	ldr	r2, [pc, #380]	(12194 <.text+0x12194>)
-   12016:	4b60      	ldr	r3, [pc, #384]	(12198 <.text+0x12198>)
-   12018:	9004      	str	r0, [sp, #16]
-   1201a:	9105      	str	r1, [sp, #20]
-   1201c:	9806      	ldr	r0, [sp, #24]
-   1201e:	9907      	ldr	r1, [sp, #28]
-   12020:	f002 fe38 	bl	14c94 <____muldf3_from_thumb>
-   12024:	9a04      	ldr	r2, [sp, #16]
-   12026:	9b05      	ldr	r3, [sp, #20]
-   12028:	1c0d      	adds	r5, r1, #0
-   1202a:	1c04      	adds	r4, r0, #0
-   1202c:	980b      	ldr	r0, [sp, #44]
-   1202e:	990c      	ldr	r1, [sp, #48]
-   12030:	f002 fe2c 	bl	14c8c <____subdf3_from_thumb>
-   12034:	1c32      	adds	r2, r6, #0
-   12036:	1c3b      	adds	r3, r7, #0
-   12038:	f002 fe28 	bl	14c8c <____subdf3_from_thumb>
-   1203c:	1c02      	adds	r2, r0, #0
-   1203e:	1c0b      	adds	r3, r1, #0
-   12040:	1c20      	adds	r0, r4, #0
-   12042:	1c29      	adds	r1, r5, #0
-   12044:	f002 fe22 	bl	14c8c <____subdf3_from_thumb>
-   12048:	1c05      	adds	r5, r0, #0
-   1204a:	1c0e      	adds	r6, r1, #0
-   1204c:	1c33      	adds	r3, r6, #0
-   1204e:	9804      	ldr	r0, [sp, #16]
-   12050:	9905      	ldr	r1, [sp, #20]
-   12052:	1c2a      	adds	r2, r5, #0
-   12054:	f002 fe1a 	bl	14c8c <____subdf3_from_thumb>
-   12058:	9b02      	ldr	r3, [sp, #8]
-   1205a:	6018      	str	r0, [r3, #0]
-   1205c:	6059      	str	r1, [r3, #4]
-   1205e:	9c02      	ldr	r4, [sp, #8]
-   12060:	9804      	ldr	r0, [sp, #16]
-   12062:	9905      	ldr	r1, [sp, #20]
-   12064:	6822      	ldr	r2, [r4, #0]
-   12066:	6863      	ldr	r3, [r4, #4]
-   12068:	f002 fe10 	bl	14c8c <____subdf3_from_thumb>
-   1206c:	1c2a      	adds	r2, r5, #0
-   1206e:	1c33      	adds	r3, r6, #0
-   12070:	f002 fe0c 	bl	14c8c <____subdf3_from_thumb>
-   12074:	9b09      	ldr	r3, [sp, #36]
-   12076:	1c22      	adds	r2, r4, #0
-   12078:	60a0      	str	r0, [r4, #8]
-   1207a:	60e1      	str	r1, [r4, #12]
-   1207c:	2b00      	cmp	r3, #0
-   1207e:	db00      	blt.n	12082 <__ieee754_rem_pio2+0x2b6>
-   12080:	e0ad      	b.n	121de <.text+0x121de>
-   12082:	6823      	ldr	r3, [r4, #0]
-   12084:	2480      	movs	r4, #128
-   12086:	0624      	lsls	r4, r4, #24
-   12088:	191b      	adds	r3, r3, r4
-   1208a:	9908      	ldr	r1, [sp, #32]
-   1208c:	6013      	str	r3, [r2, #0]
-   1208e:	6893      	ldr	r3, [r2, #8]
-   12090:	4249      	negs	r1, r1
-   12092:	191b      	adds	r3, r3, r4
-   12094:	6093      	str	r3, [r2, #8]
-   12096:	9108      	str	r1, [sp, #32]
-   12098:	e0a1      	b.n	121de <.text+0x121de>
-   1209a:	4b40      	ldr	r3, [pc, #256]	(1219c <.text+0x1219c>)
-   1209c:	429f      	cmp	r7, r3
-   1209e:	dd0b      	ble.n	120b8 <__ieee754_rem_pio2+0x2ec>
-   120a0:	1c2a      	adds	r2, r5, #0
-   120a2:	1c33      	adds	r3, r6, #0
-   120a4:	f002 fdf2 	bl	14c8c <____subdf3_from_thumb>
-   120a8:	9a02      	ldr	r2, [sp, #8]
-   120aa:	2400      	movs	r4, #0
-   120ac:	6090      	str	r0, [r2, #8]
-   120ae:	60d1      	str	r1, [r2, #12]
-   120b0:	6010      	str	r0, [r2, #0]
-   120b2:	6051      	str	r1, [r2, #4]
-   120b4:	9408      	str	r4, [sp, #32]
-   120b6:	e092      	b.n	121de <.text+0x121de>
-   120b8:	4939      	ldr	r1, [pc, #228]	(121a0 <.text+0x121a0>)
-   120ba:	153a      	asrs	r2, r7, #20
-   120bc:	1851      	adds	r1, r2, r1
-   120be:	050a      	lsls	r2, r1, #20
-   120c0:	1abb      	subs	r3, r7, r2
-   120c2:	1c18      	adds	r0, r3, #0
-   120c4:	910a      	str	r1, [sp, #40]
-   120c6:	1c31      	adds	r1, r6, #0
-   120c8:	1c1c      	adds	r4, r3, #0
-   120ca:	f002 fde7 	bl	14c9c <____fixdfsi_from_thumb>
-   120ce:	f002 fdd5 	bl	14c7c <____floatsidf_from_thumb>
-   120d2:	1c02      	adds	r2, r0, #0
-   120d4:	1c0b      	adds	r3, r1, #0
-   120d6:	1c20      	adds	r0, r4, #0
-   120d8:	1c31      	adds	r1, r6, #0
-   120da:	920d      	str	r2, [sp, #52]
-   120dc:	930e      	str	r3, [sp, #56]
-   120de:	f002 fdd5 	bl	14c8c <____subdf3_from_thumb>
-   120e2:	4a30      	ldr	r2, [pc, #192]	(121a4 <.text+0x121a4>)
-   120e4:	4b30      	ldr	r3, [pc, #192]	(121a8 <.text+0x121a8>)
-   120e6:	f002 fdd5 	bl	14c94 <____muldf3_from_thumb>
-   120ea:	1c0d      	adds	r5, r1, #0
-   120ec:	1c04      	adds	r4, r0, #0
-   120ee:	f002 fdd5 	bl	14c9c <____fixdfsi_from_thumb>
-   120f2:	f002 fdc3 	bl	14c7c <____floatsidf_from_thumb>
-   120f6:	1c02      	adds	r2, r0, #0
-   120f8:	1c0b      	adds	r3, r1, #0
-   120fa:	1c20      	adds	r0, r4, #0
-   120fc:	1c29      	adds	r1, r5, #0
-   120fe:	920f      	str	r2, [sp, #60]
-   12100:	9310      	str	r3, [sp, #64]
-   12102:	f002 fdc3 	bl	14c8c <____subdf3_from_thumb>
-   12106:	4a27      	ldr	r2, [pc, #156]	(121a4 <.text+0x121a4>)
-   12108:	4b27      	ldr	r3, [pc, #156]	(121a8 <.text+0x121a8>)
-   1210a:	f002 fdc3 	bl	14c94 <____muldf3_from_thumb>
-   1210e:	9011      	str	r0, [sp, #68]
-   12110:	9112      	str	r1, [sp, #72]
-   12112:	2503      	movs	r5, #3
-   12114:	1e6c      	subs	r4, r5, #1
-   12116:	ae0d      	add	r6, sp, #52
-   12118:	00e3      	lsls	r3, r4, #3
-   1211a:	18f3      	adds	r3, r6, r3
-   1211c:	6818      	ldr	r0, [r3, #0]
-   1211e:	6859      	ldr	r1, [r3, #4]
-   12120:	4a05      	ldr	r2, [pc, #20]	(12138 <.text+0x12138>)
-   12122:	4b06      	ldr	r3, [pc, #24]	(1213c <.text+0x1213c>)
-   12124:	f002 fda6 	bl	14c74 <____eqdf2_from_thumb>
-   12128:	2800      	cmp	r0, #0
-   1212a:	d13f      	bne.n	121ac <.text+0x121ac>
-   1212c:	1c25      	adds	r5, r4, #0
-   1212e:	e7f1      	b.n	12114 <__ieee754_rem_pio2+0x348>
-   12130:	ffff 7fff 	undefined
-   12134:	21fb      	movs	r1, #251
-   12136:	3fe9      	subs	r7, #233
-	...
-   12140:	d97b      	bls.n	1223a <__ieee754_sqrt+0x4e>
-   12142:	4002      	ands	r2, r0
-   12144:	21fb      	movs	r1, #251
-   12146:	3ff9      	subs	r7, #249
-   12148:	0000      	lsls	r0, r0, #0
-   1214a:	5440      	strb	r0, [r0, r1]
-   1214c:	21fb      	movs	r1, #251
-   1214e:	3ff9      	subs	r7, #249
-   12150:	b461      	push	{r0, r5, r6}
-   12152:	3dd0      	subs	r5, #208
-   12154:	6331      	str	r1, [r6, #48]
-   12156:	1a62      	subs	r2, r4, r1
-   12158:	b461      	push	{r0, r5, r6}
-   1215a:	3dd0      	subs	r5, #208
-   1215c:	0000      	lsls	r0, r0, #0
-   1215e:	1a60      	subs	r0, r4, r1
-   12160:	198a      	adds	r2, r1, r6
-   12162:	3ba3      	subs	r3, #163
-   12164:	7073      	strb	r3, [r6, #1]
-   12166:	2e03      	cmp	r6, #3
-   12168:	21fb      	movs	r1, #251
-   1216a:	4139      	asrs	r1, r7
-   1216c:	5f30      	ldrsh	r0, [r6, r4]
-   1216e:	3fe4      	subs	r7, #228
-   12170:	c883      	ldmia	r0!, {r0, r1, r7}
-   12172:	6dc9      	ldr	r1, [r1, #92]
-   12174:	0000      	lsls	r0, r0, #0
-   12176:	3fe0      	subs	r7, #224
-   12178:	0000      	lsls	r0, r0, #0
-   1217a:	0000      	lsls	r0, r0, #0
-   1217c:	21fb      	movs	r1, #251
-   1217e:	bff9      	ittee	<und>
-   12180:	0000      	lsls	r0, r0, #0
-   12182:	5440      	strb	r0, [r0, r1]
-   12184:	5190      	str	r0, [r2, r6]
-   12186:	0001      	lsls	r1, r0, #0
-   12188:	07ff      	lsls	r7, r7, #31
-   1218a:	0000      	lsls	r0, r0, #0
-   1218c:	198a      	adds	r2, r1, r6
-   1218e:	3ba3      	subs	r3, #163
-   12190:	0000      	lsls	r0, r0, #0
-   12192:	2e00      	cmp	r6, #0
-   12194:	839a      	strh	r2, [r3, #28]
-   12196:	397b      	subs	r1, #123
-   12198:	49c1      	ldr	r1, [pc, #772]	(124a0 <__kernel_cos+0x114>)
-   1219a:	2520      	movs	r5, #32
-   1219c:	ffff 7fef 	undefined
-   121a0:	fbea ffff 	undefined
-   121a4:	0000      	lsls	r0, r0, #0
-   121a6:	4170      	adcs	r0, r6
-   121a8:	0000      	lsls	r0, r0, #0
-   121aa:	0000      	lsls	r0, r0, #0
-   121ac:	2302      	movs	r3, #2
-   121ae:	9300      	str	r3, [sp, #0]
-   121b0:	4b0d      	ldr	r3, [pc, #52]	(121e8 <.text+0x121e8>)
-   121b2:	9a0a      	ldr	r2, [sp, #40]
-   121b4:	9301      	str	r3, [sp, #4]
-   121b6:	1c30      	adds	r0, r6, #0
-   121b8:	9902      	ldr	r1, [sp, #8]
-   121ba:	1c2b      	adds	r3, r5, #0
-   121bc:	f000 fa18 	bl	125f0 <__kernel_rem_pio2>
-   121c0:	9a09      	ldr	r2, [sp, #36]
-   121c2:	9008      	str	r0, [sp, #32]
-   121c4:	2a00      	cmp	r2, #0
-   121c6:	da0a      	bge.n	121de <.text+0x121de>
-   121c8:	9c02      	ldr	r4, [sp, #8]
-   121ca:	2180      	movs	r1, #128
-   121cc:	6823      	ldr	r3, [r4, #0]
-   121ce:	0609      	lsls	r1, r1, #24
-   121d0:	185b      	adds	r3, r3, r1
-   121d2:	6023      	str	r3, [r4, #0]
-   121d4:	68a3      	ldr	r3, [r4, #8]
-   121d6:	4242      	negs	r2, r0
-   121d8:	185b      	adds	r3, r3, r1
-   121da:	60a3      	str	r3, [r4, #8]
-   121dc:	9208      	str	r2, [sp, #32]
-   121de:	9808      	ldr	r0, [sp, #32]
-   121e0:	b013      	add	sp, #76
-   121e2:	bcf0      	pop	{r4, r5, r6, r7}
-   121e4:	bc02      	pop	{r1}
-   121e6:	4708      	bx	r1
-   121e8:	5210      	strh	r0, [r2, r0]
-   121ea:	0001      	lsls	r1, r0, #0
-
-000121ec <__ieee754_sqrt>:
-   121ec:	b5f0      	push	{r4, r5, r6, r7, lr}
-   121ee:	2300      	movs	r3, #0
-   121f0:	2400      	movs	r4, #0
-   121f2:	1c05      	adds	r5, r0, #0
-   121f4:	b085      	sub	sp, #20
-   121f6:	4a60      	ldr	r2, [pc, #384]	(12378 <.text+0x12378>)
-   121f8:	9300      	str	r3, [sp, #0]
-   121fa:	9401      	str	r4, [sp, #4]
-   121fc:	1c2b      	adds	r3, r5, #0
-   121fe:	1c0e      	adds	r6, r1, #0
-   12200:	4013      	ands	r3, r2
-   12202:	1c01      	adds	r1, r0, #0
-   12204:	1c30      	adds	r0, r6, #0
-   12206:	4293      	cmp	r3, r2
-   12208:	d10c      	bne.n	12224 <__ieee754_sqrt+0x38>
-   1220a:	1c2a      	adds	r2, r5, #0
-   1220c:	1c33      	adds	r3, r6, #0
-   1220e:	1c28      	adds	r0, r5, #0
-   12210:	1c31      	adds	r1, r6, #0
-   12212:	f002 fd3f 	bl	14c94 <____muldf3_from_thumb>
-   12216:	1c02      	adds	r2, r0, #0
-   12218:	1c0b      	adds	r3, r1, #0
-   1221a:	1c28      	adds	r0, r5, #0
-   1221c:	1c31      	adds	r1, r6, #0
-   1221e:	f002 fd31 	bl	14c84 <____adddf3_from_thumb>
-   12222:	e012      	b.n	1224a <__ieee754_sqrt+0x5e>
-   12224:	2d00      	cmp	r5, #0
-   12226:	dc13      	bgt.n	12250 <__ieee754_sqrt+0x64>
-   12228:	4b54      	ldr	r3, [pc, #336]	(1237c <.text+0x1237c>)
-   1222a:	402b      	ands	r3, r5
-   1222c:	4333      	orrs	r3, r6
-   1222e:	d100      	bne.n	12232 <__ieee754_sqrt+0x46>
-   12230:	e09b      	b.n	1236a <__ieee754_sqrt+0x17e>
-   12232:	2d00      	cmp	r5, #0
-   12234:	d00c      	beq.n	12250 <__ieee754_sqrt+0x64>
-   12236:	1c2a      	adds	r2, r5, #0
-   12238:	1c33      	adds	r3, r6, #0
-   1223a:	1c28      	adds	r0, r5, #0
-   1223c:	1c31      	adds	r1, r6, #0
-   1223e:	f002 fd25 	bl	14c8c <____subdf3_from_thumb>
-   12242:	1c02      	adds	r2, r0, #0
-   12244:	1c0b      	adds	r3, r1, #0
-   12246:	f002 fd2d 	bl	14ca4 <____divdf3_from_thumb>
-   1224a:	1c05      	adds	r5, r0, #0
-   1224c:	1c0e      	adds	r6, r1, #0
-   1224e:	e08c      	b.n	1236a <__ieee754_sqrt+0x17e>
-   12250:	150a      	asrs	r2, r1, #20
-   12252:	2a00      	cmp	r2, #0
-   12254:	d003      	beq.n	1225e <__ieee754_sqrt+0x72>
-   12256:	e012      	b.n	1227e <__ieee754_sqrt+0x92>
-   12258:	0ac1      	lsrs	r1, r0, #11
-   1225a:	3a15      	subs	r2, #21
-   1225c:	0540      	lsls	r0, r0, #21
-   1225e:	2900      	cmp	r1, #0
-   12260:	d0fa      	beq.n	12258 <__ieee754_sqrt+0x6c>
-   12262:	2500      	movs	r5, #0
-   12264:	e001      	b.n	1226a <__ieee754_sqrt+0x7e>
-   12266:	0049      	lsls	r1, r1, #1
-   12268:	3501      	adds	r5, #1
-   1226a:	02cc      	lsls	r4, r1, #11
-   1226c:	d5fb      	bpl.n	12266 <__ieee754_sqrt+0x7a>
-   1226e:	1b53      	subs	r3, r2, r5
-   12270:	1c5a      	adds	r2, r3, #1
-   12272:	2320      	movs	r3, #32
-   12274:	1c04      	adds	r4, r0, #0
-   12276:	1b5b      	subs	r3, r3, r5
-   12278:	40dc      	lsrs	r4, r3
-   1227a:	4321      	orrs	r1, r4
-   1227c:	40a8      	lsls	r0, r5
-   1227e:	4b40      	ldr	r3, [pc, #256]	(12380 <.text+0x12380>)
-   12280:	18d3      	adds	r3, r2, r3
-   12282:	9303      	str	r3, [sp, #12]
-   12284:	4b3f      	ldr	r3, [pc, #252]	(12384 <.text+0x12384>)
-   12286:	1c0a      	adds	r2, r1, #0
-   12288:	401a      	ands	r2, r3
-   1228a:	9c03      	ldr	r4, [sp, #12]
-   1228c:	2380      	movs	r3, #128
-   1228e:	035b      	lsls	r3, r3, #13
-   12290:	431a      	orrs	r2, r3
-   12292:	07e4      	lsls	r4, r4, #31
-   12294:	d503      	bpl.n	1229e <__ieee754_sqrt+0xb2>
-   12296:	0fc3      	lsrs	r3, r0, #31
-   12298:	18d3      	adds	r3, r2, r3
-   1229a:	18d2      	adds	r2, r2, r3
-   1229c:	0040      	lsls	r0, r0, #1
-   1229e:	0fc3      	lsrs	r3, r0, #31
-   122a0:	2400      	movs	r4, #0
-   122a2:	18d3      	adds	r3, r2, r3
-   122a4:	2180      	movs	r1, #128
-   122a6:	9404      	str	r4, [sp, #16]
-   122a8:	18d2      	adds	r2, r2, r3
-   122aa:	0045      	lsls	r5, r0, #1
-   122ac:	0389      	lsls	r1, r1, #14
-   122ae:	2600      	movs	r6, #0
-   122b0:	1863      	adds	r3, r4, r1
-   122b2:	4293      	cmp	r3, r2
-   122b4:	dc04      	bgt.n	122c0 <__ieee754_sqrt+0xd4>
-   122b6:	9804      	ldr	r0, [sp, #16]
-   122b8:	1840      	adds	r0, r0, r1
-   122ba:	9004      	str	r0, [sp, #16]
-   122bc:	185c      	adds	r4, r3, r1
-   122be:	1ad2      	subs	r2, r2, r3
-   122c0:	0feb      	lsrs	r3, r5, #31
-   122c2:	2080      	movs	r0, #128
-   122c4:	18d3      	adds	r3, r2, r3
-   122c6:	3601      	adds	r6, #1
-   122c8:	0600      	lsls	r0, r0, #24
-   122ca:	18d2      	adds	r2, r2, r3
-   122cc:	006d      	lsls	r5, r5, #1
-   122ce:	0849      	lsrs	r1, r1, #1
-   122d0:	2e16      	cmp	r6, #22
-   122d2:	d1ed      	bne.n	122b0 <__ieee754_sqrt+0xc4>
-   122d4:	2300      	movs	r3, #0
-   122d6:	2600      	movs	r6, #0
-   122d8:	9302      	str	r3, [sp, #8]
-   122da:	1c07      	adds	r7, r0, #0
-   122dc:	46b4      	mov	ip, r6
-   122de:	9b02      	ldr	r3, [sp, #8]
-   122e0:	19d8      	adds	r0, r3, r7
-   122e2:	4294      	cmp	r4, r2
-   122e4:	db03      	blt.n	122ee <__ieee754_sqrt+0x102>
-   122e6:	4294      	cmp	r4, r2
-   122e8:	d116      	bne.n	12318 <__ieee754_sqrt+0x12c>
-   122ea:	42a8      	cmp	r0, r5
-   122ec:	d814      	bhi.n	12318 <__ieee754_sqrt+0x12c>
-   122ee:	19c3      	adds	r3, r0, r7
-   122f0:	9302      	str	r3, [sp, #8]
-   122f2:	2380      	movs	r3, #128
-   122f4:	061b      	lsls	r3, r3, #24
-   122f6:	1c01      	adds	r1, r0, #0
-   122f8:	4019      	ands	r1, r3
-   122fa:	4299      	cmp	r1, r3
-   122fc:	d104      	bne.n	12308 <__ieee754_sqrt+0x11c>
-   122fe:	9b02      	ldr	r3, [sp, #8]
-   12300:	420b      	tst	r3, r1
-   12302:	d101      	bne.n	12308 <__ieee754_sqrt+0x11c>
-   12304:	1c63      	adds	r3, r4, #1
-   12306:	e000      	b.n	1230a <__ieee754_sqrt+0x11e>
-   12308:	1c23      	adds	r3, r4, #0
-   1230a:	1b12      	subs	r2, r2, r4
-   1230c:	4285      	cmp	r5, r0
-   1230e:	d200      	bcs.n	12312 <__ieee754_sqrt+0x126>
-   12310:	3a01      	subs	r2, #1
-   12312:	1a2d      	subs	r5, r5, r0
-   12314:	19f6      	adds	r6, r6, r7
-   12316:	1c1c      	adds	r4, r3, #0
-   12318:	0feb      	lsrs	r3, r5, #31
-   1231a:	2001      	movs	r0, #1
-   1231c:	18d3      	adds	r3, r2, r3
-   1231e:	4484      	add	ip, r0
-   12320:	18d2      	adds	r2, r2, r3
-   12322:	4663      	mov	r3, ip
-   12324:	006d      	lsls	r5, r5, #1
-   12326:	087f      	lsrs	r7, r7, #1
-   12328:	2b20      	cmp	r3, #32
-   1232a:	d1d8      	bne.n	122de <__ieee754_sqrt+0xf2>
-   1232c:	432a      	orrs	r2, r5
-   1232e:	d009      	beq.n	12344 <__ieee754_sqrt+0x158>
-   12330:	1c74      	adds	r4, r6, #1
-   12332:	d104      	bne.n	1233e <__ieee754_sqrt+0x152>
-   12334:	9804      	ldr	r0, [sp, #16]
-   12336:	2600      	movs	r6, #0
-   12338:	3001      	adds	r0, #1
-   1233a:	9004      	str	r0, [sp, #16]
-   1233c:	e002      	b.n	12344 <__ieee754_sqrt+0x158>
-   1233e:	2301      	movs	r3, #1
-   12340:	4033      	ands	r3, r6
-   12342:	18f6      	adds	r6, r6, r3
-   12344:	9b04      	ldr	r3, [sp, #16]
-   12346:	0871      	lsrs	r1, r6, #1
-   12348:	07db      	lsls	r3, r3, #31
-   1234a:	d502      	bpl.n	12352 <__ieee754_sqrt+0x166>
-   1234c:	2380      	movs	r3, #128
-   1234e:	061b      	lsls	r3, r3, #24
-   12350:	4319      	orrs	r1, r3
-   12352:	9c04      	ldr	r4, [sp, #16]
-   12354:	1062      	asrs	r2, r4, #1
-   12356:	9c03      	ldr	r4, [sp, #12]
-   12358:	480b      	ldr	r0, [pc, #44]	(12388 <.text+0x12388>)
-   1235a:	1063      	asrs	r3, r4, #1
-   1235c:	1812      	adds	r2, r2, r0
-   1235e:	051b      	lsls	r3, r3, #20
-   12360:	18d3      	adds	r3, r2, r3
-   12362:	9300      	str	r3, [sp, #0]
-   12364:	9101      	str	r1, [sp, #4]
-   12366:	9d00      	ldr	r5, [sp, #0]
-   12368:	9e01      	ldr	r6, [sp, #4]
-   1236a:	1c28      	adds	r0, r5, #0
-   1236c:	1c31      	adds	r1, r6, #0
-   1236e:	b005      	add	sp, #20
-   12370:	bcf0      	pop	{r4, r5, r6, r7}
-   12372:	bc04      	pop	{r2}
-   12374:	4710      	bx	r2
-   12376:	0000      	lsls	r0, r0, #0
-   12378:	0000      	lsls	r0, r0, #0
-   1237a:	7ff0      	ldrb	r0, [r6, #31]
-   1237c:	ffff 7fff 	undefined
-   12380:	fc01 ffff 	stc2	15, cr15, [r1], {255}
-   12384:	ffff 000f 	vaddl.u<illegal width 64>	q8, d15, d15
-   12388:	0000      	lsls	r0, r0, #0
-   1238a:	3fe0      	subs	r7, #224
-
-0001238c <__kernel_cos>:
-   1238c:	b5f0      	push	{r4, r5, r6, r7, lr}
-   1238e:	b089      	sub	sp, #36
-   12390:	9202      	str	r2, [sp, #8]
-   12392:	9303      	str	r3, [sp, #12]
-   12394:	4a7f      	ldr	r2, [pc, #508]	(12594 <.text+0x12594>)
-   12396:	4b80      	ldr	r3, [pc, #512]	(12598 <.text+0x12598>)
-   12398:	4002      	ands	r2, r0
-   1239a:	9004      	str	r0, [sp, #16]
-   1239c:	9105      	str	r1, [sp, #20]
-   1239e:	9208      	str	r2, [sp, #32]
-   123a0:	429a      	cmp	r2, r3
-   123a2:	dc07      	bgt.n	123b4 <__kernel_cos+0x28>
-   123a4:	f002 fc7a 	bl	14c9c <____fixdfsi_from_thumb>
-   123a8:	2800      	cmp	r0, #0
-   123aa:	d000      	beq.n	123ae <__kernel_cos+0x22>
-   123ac:	e0ad      	b.n	1250a <__kernel_cos+0x17e>
-   123ae:	487b      	ldr	r0, [pc, #492]	(1259c <.text+0x1259c>)
-   123b0:	497b      	ldr	r1, [pc, #492]	(125a0 <.text+0x125a0>)
-   123b2:	e0eb      	b.n	1258c <__kernel_cos+0x200>
-   123b4:	9804      	ldr	r0, [sp, #16]
-   123b6:	9905      	ldr	r1, [sp, #20]
-   123b8:	1c02      	adds	r2, r0, #0
-   123ba:	1c0b      	adds	r3, r1, #0
-   123bc:	f002 fc6a 	bl	14c94 <____muldf3_from_thumb>
-   123c0:	4a78      	ldr	r2, [pc, #480]	(125a4 <.text+0x125a4>)
-   123c2:	4b79      	ldr	r3, [pc, #484]	(125a8 <.text+0x125a8>)
-   123c4:	1c04      	adds	r4, r0, #0
-   123c6:	1c0d      	adds	r5, r1, #0
-   123c8:	f002 fc64 	bl	14c94 <____muldf3_from_thumb>
-   123cc:	4a77      	ldr	r2, [pc, #476]	(125ac <.text+0x125ac>)
-   123ce:	4b78      	ldr	r3, [pc, #480]	(125b0 <.text+0x125b0>)
-   123d0:	f002 fc58 	bl	14c84 <____adddf3_from_thumb>
-   123d4:	1c02      	adds	r2, r0, #0
-   123d6:	1c0b      	adds	r3, r1, #0
-   123d8:	1c20      	adds	r0, r4, #0
-   123da:	1c29      	adds	r1, r5, #0
-   123dc:	f002 fc5a 	bl	14c94 <____muldf3_from_thumb>
-   123e0:	4a74      	ldr	r2, [pc, #464]	(125b4 <.text+0x125b4>)
-   123e2:	4b75      	ldr	r3, [pc, #468]	(125b8 <.text+0x125b8>)
-   123e4:	f002 fc52 	bl	14c8c <____subdf3_from_thumb>
-   123e8:	1c02      	adds	r2, r0, #0
-   123ea:	1c0b      	adds	r3, r1, #0
-   123ec:	1c20      	adds	r0, r4, #0
-   123ee:	1c29      	adds	r1, r5, #0
-   123f0:	f002 fc50 	bl	14c94 <____muldf3_from_thumb>
-   123f4:	4a71      	ldr	r2, [pc, #452]	(125bc <.text+0x125bc>)
-   123f6:	4b72      	ldr	r3, [pc, #456]	(125c0 <.text+0x125c0>)
-   123f8:	f002 fc44 	bl	14c84 <____adddf3_from_thumb>
-   123fc:	1c02      	adds	r2, r0, #0
-   123fe:	1c0b      	adds	r3, r1, #0
-   12400:	1c20      	adds	r0, r4, #0
-   12402:	1c29      	adds	r1, r5, #0
-   12404:	f002 fc46 	bl	14c94 <____muldf3_from_thumb>
-   12408:	4a6e      	ldr	r2, [pc, #440]	(125c4 <.text+0x125c4>)
-   1240a:	4b6f      	ldr	r3, [pc, #444]	(125c8 <.text+0x125c8>)
-   1240c:	f002 fc3e 	bl	14c8c <____subdf3_from_thumb>
-   12410:	1c02      	adds	r2, r0, #0
-   12412:	1c0b      	adds	r3, r1, #0
-   12414:	1c20      	adds	r0, r4, #0
-   12416:	1c29      	adds	r1, r5, #0
-   12418:	f002 fc3c 	bl	14c94 <____muldf3_from_thumb>
-   1241c:	4a6b      	ldr	r2, [pc, #428]	(125cc <.text+0x125cc>)
-   1241e:	4b6c      	ldr	r3, [pc, #432]	(125d0 <.text+0x125d0>)
-   12420:	f002 fc30 	bl	14c84 <____adddf3_from_thumb>
-   12424:	1c02      	adds	r2, r0, #0
-   12426:	1c0b      	adds	r3, r1, #0
-   12428:	1c20      	adds	r0, r4, #0
-   1242a:	1c29      	adds	r1, r5, #0
-   1242c:	f002 fc32 	bl	14c94 <____muldf3_from_thumb>
-   12430:	4b68      	ldr	r3, [pc, #416]	(125d4 <.text+0x125d4>)
-   12432:	9a08      	ldr	r2, [sp, #32]
-   12434:	9006      	str	r0, [sp, #24]
-   12436:	9107      	str	r1, [sp, #28]
-   12438:	429a      	cmp	r2, r3
-   1243a:	dc26      	bgt.n	1248a <__kernel_cos+0xfe>
-   1243c:	1c20      	adds	r0, r4, #0
-   1243e:	1c29      	adds	r1, r5, #0
-   12440:	4a65      	ldr	r2, [pc, #404]	(125d8 <.text+0x125d8>)
-   12442:	4b66      	ldr	r3, [pc, #408]	(125dc <.text+0x125dc>)
-   12444:	f002 fc26 	bl	14c94 <____muldf3_from_thumb>
-   12448:	9a06      	ldr	r2, [sp, #24]
-   1244a:	9b07      	ldr	r3, [sp, #28]
-   1244c:	1c06      	adds	r6, r0, #0
-   1244e:	1c0f      	adds	r7, r1, #0
-   12450:	1c20      	adds	r0, r4, #0
-   12452:	1c29      	adds	r1, r5, #0
-   12454:	f002 fc1e 	bl	14c94 <____muldf3_from_thumb>
-   12458:	9a02      	ldr	r2, [sp, #8]
-   1245a:	9b03      	ldr	r3, [sp, #12]
-   1245c:	1c04      	adds	r4, r0, #0
-   1245e:	1c0d      	adds	r5, r1, #0
-   12460:	9804      	ldr	r0, [sp, #16]
-   12462:	9905      	ldr	r1, [sp, #20]
-   12464:	f002 fc16 	bl	14c94 <____muldf3_from_thumb>
-   12468:	1c02      	adds	r2, r0, #0
-   1246a:	1c0b      	adds	r3, r1, #0
-   1246c:	1c20      	adds	r0, r4, #0
-   1246e:	1c29      	adds	r1, r5, #0
-   12470:	f002 fc0c 	bl	14c8c <____subdf3_from_thumb>
-   12474:	1c02      	adds	r2, r0, #0
-   12476:	1c0b      	adds	r3, r1, #0
-   12478:	1c30      	adds	r0, r6, #0
-   1247a:	1c39      	adds	r1, r7, #0
-   1247c:	f002 fc06 	bl	14c8c <____subdf3_from_thumb>
-   12480:	1c02      	adds	r2, r0, #0
-   12482:	1c0b      	adds	r3, r1, #0
-   12484:	4845      	ldr	r0, [pc, #276]	(1259c <.text+0x1259c>)
-   12486:	4946      	ldr	r1, [pc, #280]	(125a0 <.text+0x125a0>)
-   12488:	e03c      	b.n	12504 <__kernel_cos+0x178>
-   1248a:	4b55      	ldr	r3, [pc, #340]	(125e0 <.text+0x125e0>)
-   1248c:	9a08      	ldr	r2, [sp, #32]
-   1248e:	429a      	cmp	r2, r3
-   12490:	dd02      	ble.n	12498 <__kernel_cos+0x10c>
-   12492:	4e54      	ldr	r6, [pc, #336]	(125e4 <.text+0x125e4>)
-   12494:	4f54      	ldr	r7, [pc, #336]	(125e8 <.text+0x125e8>)
-   12496:	e003      	b.n	124a0 <__kernel_cos+0x114>
-   12498:	9b08      	ldr	r3, [sp, #32]
-   1249a:	4a54      	ldr	r2, [pc, #336]	(125ec <.text+0x125ec>)
-   1249c:	2700      	movs	r7, #0
-   1249e:	189e      	adds	r6, r3, r2
-   124a0:	1c32      	adds	r2, r6, #0
-   124a2:	1c3b      	adds	r3, r7, #0
-   124a4:	483d      	ldr	r0, [pc, #244]	(1259c <.text+0x1259c>)
-   124a6:	493e      	ldr	r1, [pc, #248]	(125a0 <.text+0x125a0>)
-   124a8:	f002 fbf0 	bl	14c8c <____subdf3_from_thumb>
-   124ac:	4a4a      	ldr	r2, [pc, #296]	(125d8 <.text+0x125d8>)
-   124ae:	4b4b      	ldr	r3, [pc, #300]	(125dc <.text+0x125dc>)
-   124b0:	9000      	str	r0, [sp, #0]
-   124b2:	9101      	str	r1, [sp, #4]
-   124b4:	1c20      	adds	r0, r4, #0
-   124b6:	1c29      	adds	r1, r5, #0
-   124b8:	f002 fbec 	bl	14c94 <____muldf3_from_thumb>
-   124bc:	1c32      	adds	r2, r6, #0
-   124be:	1c3b      	adds	r3, r7, #0
-   124c0:	f002 fbe4 	bl	14c8c <____subdf3_from_thumb>
-   124c4:	9a06      	ldr	r2, [sp, #24]
-   124c6:	9b07      	ldr	r3, [sp, #28]
-   124c8:	1c06      	adds	r6, r0, #0
-   124ca:	1c0f      	adds	r7, r1, #0
-   124cc:	1c20      	adds	r0, r4, #0
-   124ce:	1c29      	adds	r1, r5, #0
-   124d0:	f002 fbe0 	bl	14c94 <____muldf3_from_thumb>
-   124d4:	9a02      	ldr	r2, [sp, #8]
-   124d6:	9b03      	ldr	r3, [sp, #12]
-   124d8:	1c04      	adds	r4, r0, #0
-   124da:	1c0d      	adds	r5, r1, #0
-   124dc:	9804      	ldr	r0, [sp, #16]
-   124de:	9905      	ldr	r1, [sp, #20]
-   124e0:	f002 fbd8 	bl	14c94 <____muldf3_from_thumb>
-   124e4:	1c02      	adds	r2, r0, #0
-   124e6:	1c0b      	adds	r3, r1, #0
-   124e8:	1c20      	adds	r0, r4, #0
-   124ea:	1c29      	adds	r1, r5, #0
-   124ec:	f002 fbce 	bl	14c8c <____subdf3_from_thumb>
-   124f0:	1c02      	adds	r2, r0, #0
-   124f2:	1c0b      	adds	r3, r1, #0
-   124f4:	1c30      	adds	r0, r6, #0
-   124f6:	1c39      	adds	r1, r7, #0
-   124f8:	f002 fbc8 	bl	14c8c <____subdf3_from_thumb>
-   124fc:	1c02      	adds	r2, r0, #0
-   124fe:	1c0b      	adds	r3, r1, #0
-   12500:	9800      	ldr	r0, [sp, #0]
-   12502:	9901      	ldr	r1, [sp, #4]
-   12504:	f002 fbc2 	bl	14c8c <____subdf3_from_thumb>
-   12508:	e040      	b.n	1258c <__kernel_cos+0x200>
-   1250a:	9804      	ldr	r0, [sp, #16]
-   1250c:	9905      	ldr	r1, [sp, #20]
-   1250e:	1c02      	adds	r2, r0, #0
-   12510:	1c0b      	adds	r3, r1, #0
-   12512:	f002 fbbf 	bl	14c94 <____muldf3_from_thumb>
-   12516:	4a23      	ldr	r2, [pc, #140]	(125a4 <.text+0x125a4>)
-   12518:	4b23      	ldr	r3, [pc, #140]	(125a8 <.text+0x125a8>)
-   1251a:	1c04      	adds	r4, r0, #0
-   1251c:	1c0d      	adds	r5, r1, #0
-   1251e:	f002 fbb9 	bl	14c94 <____muldf3_from_thumb>
-   12522:	4a22      	ldr	r2, [pc, #136]	(125ac <.text+0x125ac>)
-   12524:	4b22      	ldr	r3, [pc, #136]	(125b0 <.text+0x125b0>)
-   12526:	f002 fbad 	bl	14c84 <____adddf3_from_thumb>
-   1252a:	1c02      	adds	r2, r0, #0
-   1252c:	1c0b      	adds	r3, r1, #0
-   1252e:	1c20      	adds	r0, r4, #0
-   12530:	1c29      	adds	r1, r5, #0
-   12532:	f002 fbaf 	bl	14c94 <____muldf3_from_thumb>
-   12536:	4a1f      	ldr	r2, [pc, #124]	(125b4 <.text+0x125b4>)
-   12538:	4b1f      	ldr	r3, [pc, #124]	(125b8 <.text+0x125b8>)
-   1253a:	f002 fba7 	bl	14c8c <____subdf3_from_thumb>
-   1253e:	1c02      	adds	r2, r0, #0
-   12540:	1c0b      	adds	r3, r1, #0
-   12542:	1c20      	adds	r0, r4, #0
-   12544:	1c29      	adds	r1, r5, #0
-   12546:	f002 fba5 	bl	14c94 <____muldf3_from_thumb>
-   1254a:	4a1c      	ldr	r2, [pc, #112]	(125bc <.text+0x125bc>)
-   1254c:	4b1c      	ldr	r3, [pc, #112]	(125c0 <.text+0x125c0>)
-   1254e:	f002 fb99 	bl	14c84 <____adddf3_from_thumb>
-   12552:	1c02      	adds	r2, r0, #0
-   12554:	1c0b      	adds	r3, r1, #0
-   12556:	1c20      	adds	r0, r4, #0
-   12558:	1c29      	adds	r1, r5, #0
-   1255a:	f002 fb9b 	bl	14c94 <____muldf3_from_thumb>
-   1255e:	4a19      	ldr	r2, [pc, #100]	(125c4 <.text+0x125c4>)
-   12560:	4b19      	ldr	r3, [pc, #100]	(125c8 <.text+0x125c8>)
-   12562:	f002 fb93 	bl	14c8c <____subdf3_from_thumb>
-   12566:	1c02      	adds	r2, r0, #0
-   12568:	1c0b      	adds	r3, r1, #0
-   1256a:	1c20      	adds	r0, r4, #0
-   1256c:	1c29      	adds	r1, r5, #0
-   1256e:	f002 fb91 	bl	14c94 <____muldf3_from_thumb>
-   12572:	4a16      	ldr	r2, [pc, #88]	(125cc <.text+0x125cc>)
-   12574:	4b16      	ldr	r3, [pc, #88]	(125d0 <.text+0x125d0>)
-   12576:	f002 fb85 	bl	14c84 <____adddf3_from_thumb>
-   1257a:	1c02      	adds	r2, r0, #0
-   1257c:	1c0b      	adds	r3, r1, #0
-   1257e:	1c20      	adds	r0, r4, #0
-   12580:	1c29      	adds	r1, r5, #0
-   12582:	f002 fb87 	bl	14c94 <____muldf3_from_thumb>
-   12586:	9006      	str	r0, [sp, #24]
-   12588:	9107      	str	r1, [sp, #28]
-   1258a:	e757      	b.n	1243c <__kernel_cos+0xb0>
-   1258c:	b009      	add	sp, #36
-   1258e:	bcf0      	pop	{r4, r5, r6, r7}
-   12590:	bc04      	pop	{r2}
-   12592:	4710      	bx	r2
-   12594:	ffff 7fff 	undefined
-   12598:	ffff 3e3f 	vcvt.f32.u32	d19, d31, #1
-   1259c:	0000      	lsls	r0, r0, #0
-   1259e:	3ff0      	subs	r7, #240
-   125a0:	0000      	lsls	r0, r0, #0
-   125a2:	0000      	lsls	r0, r0, #0
-   125a4:	fae9 bda8 	undefined
-   125a8:	38d4      	subs	r0, #212
-   125aa:	be88      	bkpt	0x0088
-   125ac:	ee9e 3e21 	cdp	14, 9, cr3, cr14, cr1, {1}
-   125b0:	b1c4      	cbz	r4, 125e4 <.text+0x125e4>
-   125b2:	bdb4      	pop	{r2, r4, r5, r7, pc}
-   125b4:	7e4f      	ldrb	r7, [r1, #25]
-   125b6:	3e92      	subs	r6, #146
-   125b8:	52ad      	strh	r5, [r5, r2]
-   125ba:	809c      	strh	r4, [r3, #4]
-   125bc:	01a0      	lsls	r0, r4, #6
-   125be:	3efa      	subs	r6, #250
-   125c0:	1590      	asrs	r0, r2, #22
-   125c2:	19cb      	adds	r3, r1, r7
-   125c4:	c16c      	stmia	r1!, {r2, r3, r5, r6}
-   125c6:	3f56      	subs	r7, #86
-   125c8:	5177      	str	r7, [r6, r5]
-   125ca:	16c1      	asrs	r1, r0, #27
-   125cc:	5555      	strb	r5, [r2, r5]
-   125ce:	3fa5      	subs	r7, #165
-   125d0:	554c      	strb	r4, [r1, r5]
-   125d2:	5555      	strb	r5, [r2, r5]
-   125d4:	3332      	adds	r3, #50
-   125d6:	3fd3      	subs	r7, #211
-   125d8:	0000      	lsls	r0, r0, #0
-   125da:	3fe0      	subs	r7, #224
-   125dc:	0000      	lsls	r0, r0, #0
-   125de:	0000      	lsls	r0, r0, #0
-   125e0:	0000      	lsls	r0, r0, #0
-   125e2:	3fe9      	subs	r7, #233
-   125e4:	0000      	lsls	r0, r0, #0
-   125e6:	3fd2      	subs	r7, #210
-   125e8:	0000      	lsls	r0, r0, #0
-   125ea:	0000      	lsls	r0, r0, #0
-   125ec:	0000      	lsls	r0, r0, #0
-   125ee:	ffe0 b5f0 	vsli.64	<illegal reg q13.5>, q8, #32
-
-000125f0 <__kernel_rem_pio2>:
-   125f0:	b5f0      	push	{r4, r5, r6, r7, lr}
-   125f2:	4ccf      	ldr	r4, [pc, #828]	(12930 <.text+0x12930>)
-   125f4:	44a5      	add	sp, r4
-   125f6:	9302      	str	r3, [sp, #8]
-   125f8:	9004      	str	r0, [sp, #16]
-   125fa:	98b3      	ldr	r0, [sp, #716]
-   125fc:	9103      	str	r1, [sp, #12]
-   125fe:	4bcd      	ldr	r3, [pc, #820]	(12934 <.text+0x12934>)
-   12600:	9902      	ldr	r1, [sp, #8]
-   12602:	1c14      	adds	r4, r2, #0
-   12604:	0082      	lsls	r2, r0, #2
-   12606:	58d2      	ldr	r2, [r2, r3]
-   12608:	3901      	subs	r1, #1
-   1260a:	9107      	str	r1, [sp, #28]
-   1260c:	1ee0      	subs	r0, r4, #3
-   1260e:	2118      	movs	r1, #24
-   12610:	9208      	str	r2, [sp, #32]
-   12612:	f000 fe89 	bl	13328 <__aeabi_idiv>
-   12616:	9021      	str	r0, [sp, #132]
-   12618:	2800      	cmp	r0, #0
-   1261a:	da01      	bge.n	12620 <__kernel_rem_pio2+0x30>
-   1261c:	2200      	movs	r2, #0
-   1261e:	9221      	str	r2, [sp, #132]
-   12620:	9f21      	ldr	r7, [sp, #132]
-   12622:	06fb      	lsls	r3, r7, #27
-   12624:	1bdb      	subs	r3, r3, r7
-   12626:	009b      	lsls	r3, r3, #2
-   12628:	19db      	adds	r3, r3, r7
-   1262a:	00db      	lsls	r3, r3, #3
-   1262c:	18e4      	adds	r4, r4, r3
-   1262e:	9807      	ldr	r0, [sp, #28]
-   12630:	9405      	str	r4, [sp, #20]
-   12632:	3c18      	subs	r4, #24
-   12634:	940b      	str	r4, [sp, #44]
-   12636:	9908      	ldr	r1, [sp, #32]
-   12638:	1a3c      	subs	r4, r7, r0
-   1263a:	9ab4      	ldr	r2, [sp, #720]
-   1263c:	00a3      	lsls	r3, r4, #2
-   1263e:	1847      	adds	r7, r0, r1
-   12640:	18d5      	adds	r5, r2, r3
-   12642:	2600      	movs	r6, #0
-   12644:	e00f      	b.n	12666 <__kernel_rem_pio2+0x76>
-   12646:	2c00      	cmp	r4, #0
-   12648:	da02      	bge.n	12650 <__kernel_rem_pio2+0x60>
-   1264a:	48bb      	ldr	r0, [pc, #748]	(12938 <.text+0x12938>)
-   1264c:	49bb      	ldr	r1, [pc, #748]	(1293c <.text+0x1293c>)
-   1264e:	e002      	b.n	12656 <__kernel_rem_pio2+0x66>
-   12650:	6828      	ldr	r0, [r5, #0]
-   12652:	f002 fb13 	bl	14c7c <____floatsidf_from_thumb>
-   12656:	00f2      	lsls	r2, r6, #3
-   12658:	ab22      	add	r3, sp, #136
-   1265a:	189b      	adds	r3, r3, r2
-   1265c:	6018      	str	r0, [r3, #0]
-   1265e:	6059      	str	r1, [r3, #4]
-   12660:	3601      	adds	r6, #1
-   12662:	3401      	adds	r4, #1
-   12664:	3504      	adds	r5, #4
-   12666:	42be      	cmp	r6, r7
-   12668:	dded      	ble.n	12646 <__kernel_rem_pio2+0x56>
-   1266a:	9b07      	ldr	r3, [sp, #28]
-   1266c:	2400      	movs	r4, #0
-   1266e:	9317      	str	r3, [sp, #92]
-   12670:	9418      	str	r4, [sp, #96]
-   12672:	e01e      	b.n	126b2 <__kernel_rem_pio2+0xc2>
-   12674:	9a16      	ldr	r2, [sp, #88]
-   12676:	ca03      	ldmia	r2!, {r0, r1}
-   12678:	9216      	str	r2, [sp, #88]
-   1267a:	683a      	ldr	r2, [r7, #0]
-   1267c:	687b      	ldr	r3, [r7, #4]
-   1267e:	f002 fb09 	bl	14c94 <____muldf3_from_thumb>
-   12682:	1c02      	adds	r2, r0, #0
-   12684:	1c0b      	adds	r3, r1, #0
-   12686:	1c20      	adds	r0, r4, #0
-   12688:	1c29      	adds	r1, r5, #0
-   1268a:	f002 fafb 	bl	14c84 <____adddf3_from_thumb>
-   1268e:	3601      	adds	r6, #1
-   12690:	1c04      	adds	r4, r0, #0
-   12692:	1c0d      	adds	r5, r1, #0
-   12694:	3f08      	subs	r7, #8
-   12696:	9b07      	ldr	r3, [sp, #28]
-   12698:	429e      	cmp	r6, r3
-   1269a:	ddeb      	ble.n	12674 <__kernel_rem_pio2+0x84>
-   1269c:	9f18      	ldr	r7, [sp, #96]
-   1269e:	9817      	ldr	r0, [sp, #92]
-   126a0:	00fa      	lsls	r2, r7, #3
-   126a2:	ab4a      	add	r3, sp, #296
-   126a4:	189b      	adds	r3, r3, r2
-   126a6:	3701      	adds	r7, #1
-   126a8:	3001      	adds	r0, #1
-   126aa:	601c      	str	r4, [r3, #0]
-   126ac:	605d      	str	r5, [r3, #4]
-   126ae:	9718      	str	r7, [sp, #96]
-   126b0:	9017      	str	r0, [sp, #92]
-   126b2:	9918      	ldr	r1, [sp, #96]
-   126b4:	9a08      	ldr	r2, [sp, #32]
-   126b6:	4291      	cmp	r1, r2
-   126b8:	dc09      	bgt.n	126ce <__kernel_rem_pio2+0xde>
-   126ba:	9b04      	ldr	r3, [sp, #16]
-   126bc:	9c17      	ldr	r4, [sp, #92]
-   126be:	9316      	str	r3, [sp, #88]
-   126c0:	00e2      	lsls	r2, r4, #3
-   126c2:	ab22      	add	r3, sp, #136
-   126c4:	4c9c      	ldr	r4, [pc, #624]	(12938 <.text+0x12938>)
-   126c6:	4d9d      	ldr	r5, [pc, #628]	(1293c <.text+0x1293c>)
-   126c8:	189f      	adds	r7, r3, r2
-   126ca:	2600      	movs	r6, #0
-   126cc:	e7e3      	b.n	12696 <__kernel_rem_pio2+0xa6>
-   126ce:	9f08      	ldr	r7, [sp, #32]
-   126d0:	9706      	str	r7, [sp, #24]
-   126d2:	9806      	ldr	r0, [sp, #24]
-   126d4:	ab4a      	add	r3, sp, #296
-   126d6:	00c2      	lsls	r2, r0, #3
-   126d8:	18d2      	adds	r2, r2, r3
-   126da:	3801      	subs	r0, #1
-   126dc:	6816      	ldr	r6, [r2, #0]
-   126de:	6857      	ldr	r7, [r2, #4]
-   126e0:	00c2      	lsls	r2, r0, #3
-   126e2:	189b      	adds	r3, r3, r2
-   126e4:	229a      	movs	r2, #154
-   126e6:	9906      	ldr	r1, [sp, #24]
-   126e8:	0092      	lsls	r2, r2, #2
-   126ea:	446a      	add	r2, sp
-   126ec:	9019      	str	r0, [sp, #100]
-   126ee:	9315      	str	r3, [sp, #84]
-   126f0:	911a      	str	r1, [sp, #104]
-   126f2:	9214      	str	r2, [sp, #80]
-   126f4:	e028      	b.n	12748 <__kernel_rem_pio2+0x158>
-   126f6:	4a92      	ldr	r2, [pc, #584]	(12940 <.text+0x12940>)
-   126f8:	4b92      	ldr	r3, [pc, #584]	(12944 <.text+0x12944>)
-   126fa:	1c30      	adds	r0, r6, #0
-   126fc:	1c39      	adds	r1, r7, #0
-   126fe:	f002 fac9 	bl	14c94 <____muldf3_from_thumb>
-   12702:	f002 facb 	bl	14c9c <____fixdfsi_from_thumb>
-   12706:	f002 fab9 	bl	14c7c <____floatsidf_from_thumb>
-   1270a:	4a8f      	ldr	r2, [pc, #572]	(12948 <.text+0x12948>)
-   1270c:	4b8f      	ldr	r3, [pc, #572]	(1294c <.text+0x1294c>)
-   1270e:	1c04      	adds	r4, r0, #0
-   12710:	1c0d      	adds	r5, r1, #0
-   12712:	f002 fabf 	bl	14c94 <____muldf3_from_thumb>
-   12716:	1c02      	adds	r2, r0, #0
-   12718:	1c0b      	adds	r3, r1, #0
-   1271a:	1c30      	adds	r0, r6, #0
-   1271c:	1c39      	adds	r1, r7, #0
-   1271e:	f002 fab1 	bl	14c84 <____adddf3_from_thumb>
-   12722:	f002 fabb 	bl	14c9c <____fixdfsi_from_thumb>
-   12726:	9b14      	ldr	r3, [sp, #80]
-   12728:	9f1a      	ldr	r7, [sp, #104]
-   1272a:	c301      	stmia	r3!, {r0}
-   1272c:	1c20      	adds	r0, r4, #0
-   1272e:	9c15      	ldr	r4, [sp, #84]
-   12730:	9314      	str	r3, [sp, #80]
-   12732:	3f01      	subs	r7, #1
-   12734:	6822      	ldr	r2, [r4, #0]
-   12736:	6863      	ldr	r3, [r4, #4]
-   12738:	1c29      	adds	r1, r5, #0
-   1273a:	971a      	str	r7, [sp, #104]
-   1273c:	f002 faa2 	bl	14c84 <____adddf3_from_thumb>
-   12740:	3c08      	subs	r4, #8
-   12742:	9415      	str	r4, [sp, #84]
-   12744:	1c06      	adds	r6, r0, #0
-   12746:	1c0f      	adds	r7, r1, #0
-   12748:	981a      	ldr	r0, [sp, #104]
-   1274a:	2800      	cmp	r0, #0
-   1274c:	dcd3      	bgt.n	126f6 <__kernel_rem_pio2+0x106>
-   1274e:	1c30      	adds	r0, r6, #0
-   12750:	9a0b      	ldr	r2, [sp, #44]
-   12752:	1c39      	adds	r1, r7, #0
-   12754:	f000 fd02 	bl	1315c <scalbn>
-   12758:	4a7d      	ldr	r2, [pc, #500]	(12950 <.text+0x12950>)
-   1275a:	4b7e      	ldr	r3, [pc, #504]	(12954 <.text+0x12954>)
-   1275c:	1c04      	adds	r4, r0, #0
-   1275e:	1c0d      	adds	r5, r1, #0
-   12760:	f002 fa98 	bl	14c94 <____muldf3_from_thumb>
-   12764:	f000 fbbc 	bl	12ee0 <floor>
-   12768:	4a7b      	ldr	r2, [pc, #492]	(12958 <.text+0x12958>)
-   1276a:	4b7c      	ldr	r3, [pc, #496]	(1295c <.text+0x1295c>)
-   1276c:	f002 fa92 	bl	14c94 <____muldf3_from_thumb>
-   12770:	1c02      	adds	r2, r0, #0
-   12772:	1c0b      	adds	r3, r1, #0
-   12774:	1c20      	adds	r0, r4, #0
-   12776:	1c29      	adds	r1, r5, #0
-   12778:	f002 fa84 	bl	14c84 <____adddf3_from_thumb>
-   1277c:	1c0d      	adds	r5, r1, #0
-   1277e:	1c04      	adds	r4, r0, #0
-   12780:	f002 fa8c 	bl	14c9c <____fixdfsi_from_thumb>
-   12784:	9009      	str	r0, [sp, #36]
-   12786:	f002 fa79 	bl	14c7c <____floatsidf_from_thumb>
-   1278a:	1c02      	adds	r2, r0, #0
-   1278c:	1c0b      	adds	r3, r1, #0
-   1278e:	1c20      	adds	r0, r4, #0
-   12790:	1c29      	adds	r1, r5, #0
-   12792:	f002 fa7b 	bl	14c8c <____subdf3_from_thumb>
-   12796:	1c0e      	adds	r6, r1, #0
-   12798:	990b      	ldr	r1, [sp, #44]
-   1279a:	1c05      	adds	r5, r0, #0
-   1279c:	2900      	cmp	r1, #0
-   1279e:	dd14      	ble.n	127ca <__kernel_rem_pio2+0x1da>
-   127a0:	9a19      	ldr	r2, [sp, #100]
-   127a2:	ac9a      	add	r4, sp, #616
-   127a4:	0090      	lsls	r0, r2, #2
-   127a6:	5901      	ldr	r1, [r0, r4]
-   127a8:	9b0b      	ldr	r3, [sp, #44]
-   127aa:	2218      	movs	r2, #24
-   127ac:	1ad2      	subs	r2, r2, r3
-   127ae:	9f09      	ldr	r7, [sp, #36]
-   127b0:	1c0b      	adds	r3, r1, #0
-   127b2:	4113      	asrs	r3, r2
-   127b4:	18ff      	adds	r7, r7, r3
-   127b6:	4093      	lsls	r3, r2
-   127b8:	1ac9      	subs	r1, r1, r3
-   127ba:	5101      	str	r1, [r0, r4]
-   127bc:	980b      	ldr	r0, [sp, #44]
-   127be:	2317      	movs	r3, #23
-   127c0:	1a1b      	subs	r3, r3, r0
-   127c2:	4119      	asrs	r1, r3
-   127c4:	9709      	str	r7, [sp, #36]
-   127c6:	910c      	str	r1, [sp, #48]
-   127c8:	e017      	b.n	127fa <__kernel_rem_pio2+0x20a>
-   127ca:	990b      	ldr	r1, [sp, #44]
-   127cc:	2900      	cmp	r1, #0
-   127ce:	d106      	bne.n	127de <__kernel_rem_pio2+0x1ee>
-   127d0:	9a19      	ldr	r2, [sp, #100]
-   127d2:	0093      	lsls	r3, r2, #2
-   127d4:	aa9a      	add	r2, sp, #616
-   127d6:	589b      	ldr	r3, [r3, r2]
-   127d8:	15db      	asrs	r3, r3, #23
-   127da:	930c      	str	r3, [sp, #48]
-   127dc:	e00d      	b.n	127fa <__kernel_rem_pio2+0x20a>
-   127de:	1c28      	adds	r0, r5, #0
-   127e0:	1c31      	adds	r1, r6, #0
-   127e2:	4a5f      	ldr	r2, [pc, #380]	(12960 <.text+0x12960>)
-   127e4:	4b5f      	ldr	r3, [pc, #380]	(12964 <.text+0x12964>)
-   127e6:	f002 fa65 	bl	14cb4 <____gedf2_from_thumb>
-   127ea:	2800      	cmp	r0, #0
-   127ec:	da02      	bge.n	127f4 <__kernel_rem_pio2+0x204>
-   127ee:	2300      	movs	r3, #0
-   127f0:	930c      	str	r3, [sp, #48]
-   127f2:	e04e      	b.n	12892 <__kernel_rem_pio2+0x2a2>
-   127f4:	2402      	movs	r4, #2
-   127f6:	940c      	str	r4, [sp, #48]
-   127f8:	e002      	b.n	12800 <__kernel_rem_pio2+0x210>
-   127fa:	9f0c      	ldr	r7, [sp, #48]
-   127fc:	2f00      	cmp	r7, #0
-   127fe:	dd48      	ble.n	12892 <__kernel_rem_pio2+0x2a2>
-   12800:	9809      	ldr	r0, [sp, #36]
-   12802:	3001      	adds	r0, #1
-   12804:	9009      	str	r0, [sp, #36]
-   12806:	2400      	movs	r4, #0
-   12808:	2000      	movs	r0, #0
-   1280a:	a99a      	add	r1, sp, #616
-   1280c:	e00f      	b.n	1282e <__kernel_rem_pio2+0x23e>
-   1280e:	680a      	ldr	r2, [r1, #0]
-   12810:	2c00      	cmp	r4, #0
-   12812:	d107      	bne.n	12824 <__kernel_rem_pio2+0x234>
-   12814:	2a00      	cmp	r2, #0
-   12816:	d008      	beq.n	1282a <__kernel_rem_pio2+0x23a>
-   12818:	2380      	movs	r3, #128
-   1281a:	045b      	lsls	r3, r3, #17
-   1281c:	1a9b      	subs	r3, r3, r2
-   1281e:	2401      	movs	r4, #1
-   12820:	600b      	str	r3, [r1, #0]
-   12822:	e002      	b.n	1282a <__kernel_rem_pio2+0x23a>
-   12824:	4b50      	ldr	r3, [pc, #320]	(12968 <.text+0x12968>)
-   12826:	1a9b      	subs	r3, r3, r2
-   12828:	600b      	str	r3, [r1, #0]
-   1282a:	3001      	adds	r0, #1
-   1282c:	3104      	adds	r1, #4
-   1282e:	9a06      	ldr	r2, [sp, #24]
-   12830:	4290      	cmp	r0, r2
-   12832:	dbec      	blt.n	1280e <__kernel_rem_pio2+0x21e>
-   12834:	9b0b      	ldr	r3, [sp, #44]
-   12836:	2b00      	cmp	r3, #0
-   12838:	dd11      	ble.n	1285e <__kernel_rem_pio2+0x26e>
-   1283a:	2b01      	cmp	r3, #1
-   1283c:	d002      	beq.n	12844 <__kernel_rem_pio2+0x254>
-   1283e:	2b02      	cmp	r3, #2
-   12840:	d10d      	bne.n	1285e <__kernel_rem_pio2+0x26e>
-   12842:	e005      	b.n	12850 <__kernel_rem_pio2+0x260>
-   12844:	9f19      	ldr	r7, [sp, #100]
-   12846:	a89a      	add	r0, sp, #616
-   12848:	00b9      	lsls	r1, r7, #2
-   1284a:	580b      	ldr	r3, [r1, r0]
-   1284c:	4a47      	ldr	r2, [pc, #284]	(1296c <.text+0x1296c>)
-   1284e:	e004      	b.n	1285a <__kernel_rem_pio2+0x26a>
-   12850:	9a19      	ldr	r2, [sp, #100]
-   12852:	a89a      	add	r0, sp, #616
-   12854:	0091      	lsls	r1, r2, #2
-   12856:	580b      	ldr	r3, [r1, r0]
-   12858:	4a45      	ldr	r2, [pc, #276]	(12970 <.text+0x12970>)
-   1285a:	4013      	ands	r3, r2
-   1285c:	500b      	str	r3, [r1, r0]
-   1285e:	9b0c      	ldr	r3, [sp, #48]
-   12860:	2b02      	cmp	r3, #2
-   12862:	d116      	bne.n	12892 <__kernel_rem_pio2+0x2a2>
-   12864:	1c2a      	adds	r2, r5, #0
-   12866:	1c33      	adds	r3, r6, #0
-   12868:	4842      	ldr	r0, [pc, #264]	(12974 <.text+0x12974>)
-   1286a:	4943      	ldr	r1, [pc, #268]	(12978 <.text+0x12978>)
-   1286c:	f002 fa0e 	bl	14c8c <____subdf3_from_thumb>
-   12870:	1c05      	adds	r5, r0, #0
-   12872:	1c0e      	adds	r6, r1, #0
-   12874:	2c00      	cmp	r4, #0
-   12876:	d00c      	beq.n	12892 <__kernel_rem_pio2+0x2a2>
-   12878:	9a0b      	ldr	r2, [sp, #44]
-   1287a:	483e      	ldr	r0, [pc, #248]	(12974 <.text+0x12974>)
-   1287c:	493e      	ldr	r1, [pc, #248]	(12978 <.text+0x12978>)
-   1287e:	f000 fc6d 	bl	1315c <scalbn>
-   12882:	1c02      	adds	r2, r0, #0
-   12884:	1c0b      	adds	r3, r1, #0
-   12886:	1c28      	adds	r0, r5, #0
-   12888:	1c31      	adds	r1, r6, #0
-   1288a:	f002 f9ff 	bl	14c8c <____subdf3_from_thumb>
-   1288e:	1c05      	adds	r5, r0, #0
-   12890:	1c0e      	adds	r6, r1, #0
-   12892:	1c28      	adds	r0, r5, #0
-   12894:	1c31      	adds	r1, r6, #0
-   12896:	4a28      	ldr	r2, [pc, #160]	(12938 <.text+0x12938>)
-   12898:	4b28      	ldr	r3, [pc, #160]	(1293c <.text+0x1293c>)
-   1289a:	f002 f9eb 	bl	14c74 <____eqdf2_from_thumb>
-   1289e:	2800      	cmp	r0, #0
-   128a0:	d000      	beq.n	128a4 <__kernel_rem_pio2+0x2b4>
-   128a2:	e097      	b.n	129d4 <.text+0x129d4>
-   128a4:	9c19      	ldr	r4, [sp, #100]
-   128a6:	ab9a      	add	r3, sp, #616
-   128a8:	00a2      	lsls	r2, r4, #2
-   128aa:	189a      	adds	r2, r3, r2
-   128ac:	2100      	movs	r1, #0
-   128ae:	e005      	b.n	128bc <__kernel_rem_pio2+0x2cc>
-   128b0:	9f19      	ldr	r7, [sp, #100]
-   128b2:	6813      	ldr	r3, [r2, #0]
-   128b4:	3f01      	subs	r7, #1
-   128b6:	9719      	str	r7, [sp, #100]
-   128b8:	4319      	orrs	r1, r3
-   128ba:	3a04      	subs	r2, #4
-   128bc:	9819      	ldr	r0, [sp, #100]
-   128be:	9b08      	ldr	r3, [sp, #32]
-   128c0:	4298      	cmp	r0, r3
-   128c2:	daf5      	bge.n	128b0 <__kernel_rem_pio2+0x2c0>
-   128c4:	2900      	cmp	r1, #0
-   128c6:	d000      	beq.n	128ca <__kernel_rem_pio2+0x2da>
-   128c8:	e08c      	b.n	129e4 <.text+0x129e4>
-   128ca:	009b      	lsls	r3, r3, #2
-   128cc:	acae      	add	r4, sp, #696
-   128ce:	191b      	adds	r3, r3, r4
-   128d0:	1c1a      	adds	r2, r3, #0
-   128d2:	2701      	movs	r7, #1
-   128d4:	3a54      	subs	r2, #84
-   128d6:	970a      	str	r7, [sp, #40]
-   128d8:	e002      	b.n	128e0 <__kernel_rem_pio2+0x2f0>
-   128da:	980a      	ldr	r0, [sp, #40]
-   128dc:	3001      	adds	r0, #1
-   128de:	900a      	str	r0, [sp, #40]
-   128e0:	6813      	ldr	r3, [r2, #0]
-   128e2:	3a04      	subs	r2, #4
-   128e4:	2b00      	cmp	r3, #0
-   128e6:	d0f8      	beq.n	128da <__kernel_rem_pio2+0x2ea>
-   128e8:	9921      	ldr	r1, [sp, #132]
-   128ea:	9a06      	ldr	r2, [sp, #24]
-   128ec:	9cb4      	ldr	r4, [sp, #720]
-   128ee:	188b      	adds	r3, r1, r2
-   128f0:	009b      	lsls	r3, r3, #2
-   128f2:	18e3      	adds	r3, r4, r3
-   128f4:	3304      	adds	r3, #4
-   128f6:	2700      	movs	r7, #0
-   128f8:	9313      	str	r3, [sp, #76]
-   128fa:	9712      	str	r7, [sp, #72]
-   128fc:	e060      	b.n	129c0 <.text+0x129c0>
-   128fe:	9802      	ldr	r0, [sp, #8]
-   12900:	9913      	ldr	r1, [sp, #76]
-   12902:	ad22      	add	r5, sp, #136
-   12904:	00e4      	lsls	r4, r4, #3
-   12906:	00c3      	lsls	r3, r0, #3
-   12908:	192c      	adds	r4, r5, r4
-   1290a:	6808      	ldr	r0, [r1, #0]
-   1290c:	18e4      	adds	r4, r4, r3
-   1290e:	f002 f9b5 	bl	14c7c <____floatsidf_from_thumb>
-   12912:	9f06      	ldr	r7, [sp, #24]
-   12914:	6020      	str	r0, [r4, #0]
-   12916:	6061      	str	r1, [r4, #4]
-   12918:	9c02      	ldr	r4, [sp, #8]
-   1291a:	9812      	ldr	r0, [sp, #72]
-   1291c:	19e3      	adds	r3, r4, r7
-   1291e:	181b      	adds	r3, r3, r0
-   12920:	9a04      	ldr	r2, [sp, #16]
-   12922:	00db      	lsls	r3, r3, #3
-   12924:	4e04      	ldr	r6, [pc, #16]	(12938 <.text+0x12938>)
-   12926:	4f05      	ldr	r7, [pc, #20]	(1293c <.text+0x1293c>)
-   12928:	18ed      	adds	r5, r5, r3
-   1292a:	2400      	movs	r4, #0
-   1292c:	9211      	str	r2, [sp, #68]
-   1292e:	e036      	b.n	1299e <.text+0x1299e>
-   12930:	fd48 ffff 	stc2l	15, cr15, [r8, #-1020]
-   12934:	5318      	strh	r0, [r3, r4]
-   12936:	0001      	lsls	r1, r0, #0
-	...
-   12940:	0000      	lsls	r0, r0, #0
-   12942:	3e70      	subs	r6, #112
-   12944:	0000      	lsls	r0, r0, #0
-   12946:	0000      	lsls	r0, r0, #0
-   12948:	0000      	lsls	r0, r0, #0
-   1294a:	c170      	stmia	r1!, {r4, r5, r6}
-   1294c:	0000      	lsls	r0, r0, #0
-   1294e:	0000      	lsls	r0, r0, #0
-   12950:	0000      	lsls	r0, r0, #0
-   12952:	3fc0      	subs	r7, #192
-   12954:	0000      	lsls	r0, r0, #0
-   12956:	0000      	lsls	r0, r0, #0
-   12958:	0000      	lsls	r0, r0, #0
-   1295a:	c020      	stmia	r0!, {r5}
-   1295c:	0000      	lsls	r0, r0, #0
-   1295e:	0000      	lsls	r0, r0, #0
-   12960:	0000      	lsls	r0, r0, #0
-   12962:	3fe0      	subs	r7, #224
-   12964:	0000      	lsls	r0, r0, #0
-   12966:	0000      	lsls	r0, r0, #0
-   12968:	ffff 00ff 	vshr.u64	q8, <illegal reg q15.5>, #1
-   1296c:	ffff 007f 	vshr.u32	q8, <illegal reg q15.5>, #1
-   12970:	ffff 003f 	vshr.u32	d16, d31, #1
-   12974:	0000      	lsls	r0, r0, #0
-   12976:	3ff0      	subs	r7, #240
-   12978:	0000      	lsls	r0, r0, #0
-   1297a:	0000      	lsls	r0, r0, #0
-   1297c:	9a11      	ldr	r2, [sp, #68]
-   1297e:	ca03      	ldmia	r2!, {r0, r1}
-   12980:	9211      	str	r2, [sp, #68]
-   12982:	682a      	ldr	r2, [r5, #0]
-   12984:	686b      	ldr	r3, [r5, #4]
-   12986:	f002 f985 	bl	14c94 <____muldf3_from_thumb>
-   1298a:	1c02      	adds	r2, r0, #0
-   1298c:	1c0b      	adds	r3, r1, #0
-   1298e:	1c30      	adds	r0, r6, #0
-   12990:	1c39      	adds	r1, r7, #0
-   12992:	f002 f977 	bl	14c84 <____adddf3_from_thumb>
-   12996:	3401      	adds	r4, #1
-   12998:	1c06      	adds	r6, r0, #0
-   1299a:	1c0f      	adds	r7, r1, #0
-   1299c:	3d08      	subs	r5, #8
-   1299e:	9b07      	ldr	r3, [sp, #28]
-   129a0:	429c      	cmp	r4, r3
-   129a2:	ddeb      	ble.n	1297c <.text+0x1297c>
-   129a4:	9c12      	ldr	r4, [sp, #72]
-   129a6:	9806      	ldr	r0, [sp, #24]
-   129a8:	00e3      	lsls	r3, r4, #3
-   129aa:	aa4a      	add	r2, sp, #296
-   129ac:	18d2      	adds	r2, r2, r3
-   129ae:	9913      	ldr	r1, [sp, #76]
-   129b0:	00c3      	lsls	r3, r0, #3
-   129b2:	18d2      	adds	r2, r2, r3
-   129b4:	3401      	adds	r4, #1
-   129b6:	3104      	adds	r1, #4
-   129b8:	6096      	str	r6, [r2, #8]
-   129ba:	60d7      	str	r7, [r2, #12]
-   129bc:	9412      	str	r4, [sp, #72]
-   129be:	9113      	str	r1, [sp, #76]
-   129c0:	9b06      	ldr	r3, [sp, #24]
-   129c2:	9c0a      	ldr	r4, [sp, #40]
-   129c4:	9f12      	ldr	r7, [sp, #72]
-   129c6:	191a      	adds	r2, r3, r4
-   129c8:	19dc      	adds	r4, r3, r7
-   129ca:	1c63      	adds	r3, r4, #1
-   129cc:	4293      	cmp	r3, r2
-   129ce:	dd96      	ble.n	128fe <__kernel_rem_pio2+0x30e>
-   129d0:	9206      	str	r2, [sp, #24]
-   129d2:	e67e      	b.n	126d2 <__kernel_rem_pio2+0xe2>
-   129d4:	1c28      	adds	r0, r5, #0
-   129d6:	1c31      	adds	r1, r6, #0
-   129d8:	4bbf      	ldr	r3, [pc, #764]	(12cd8 <.text+0x12cd8>)
-   129da:	4abe      	ldr	r2, [pc, #760]	(12cd4 <.text+0x12cd4>)
-   129dc:	f002 f94a 	bl	14c74 <____eqdf2_from_thumb>
-   129e0:	2800      	cmp	r0, #0
-   129e2:	d116      	bne.n	12a12 <.text+0x12a12>
-   129e4:	9806      	ldr	r0, [sp, #24]
-   129e6:	a9ae      	add	r1, sp, #696
-   129e8:	0083      	lsls	r3, r0, #2
-   129ea:	185b      	adds	r3, r3, r1
-   129ec:	1c1a      	adds	r2, r3, #0
-   129ee:	3a54      	subs	r2, #84
-   129f0:	2100      	movs	r1, #0
-   129f2:	6813      	ldr	r3, [r2, #0]
-   129f4:	3101      	adds	r1, #1
-   129f6:	3a04      	subs	r2, #4
-   129f8:	2b00      	cmp	r3, #0
-   129fa:	d0fa      	beq.n	129f2 <.text+0x129f2>
-   129fc:	004b      	lsls	r3, r1, #1
-   129fe:	185b      	adds	r3, r3, r1
-   12a00:	9c05      	ldr	r4, [sp, #20]
-   12a02:	9a06      	ldr	r2, [sp, #24]
-   12a04:	00db      	lsls	r3, r3, #3
-   12a06:	1ae3      	subs	r3, r4, r3
-   12a08:	1a52      	subs	r2, r2, r1
-   12a0a:	3b18      	subs	r3, #24
-   12a0c:	9206      	str	r2, [sp, #24]
-   12a0e:	930b      	str	r3, [sp, #44]
-   12a10:	e038      	b.n	12a84 <.text+0x12a84>
-   12a12:	9f0b      	ldr	r7, [sp, #44]
-   12a14:	1c28      	adds	r0, r5, #0
-   12a16:	427a      	negs	r2, r7
-   12a18:	1c31      	adds	r1, r6, #0
-   12a1a:	f000 fb9f 	bl	1315c <scalbn>
-   12a1e:	4aaf      	ldr	r2, [pc, #700]	(12cdc <.text+0x12cdc>)
-   12a20:	4baf      	ldr	r3, [pc, #700]	(12ce0 <.text+0x12ce0>)
-   12a22:	901b      	str	r0, [sp, #108]
-   12a24:	911c      	str	r1, [sp, #112]
-   12a26:	f002 f945 	bl	14cb4 <____gedf2_from_thumb>
-   12a2a:	9906      	ldr	r1, [sp, #24]
-   12a2c:	af9a      	add	r7, sp, #616
-   12a2e:	008c      	lsls	r4, r1, #2
-   12a30:	2800      	cmp	r0, #0
-   12a32:	db22      	blt.n	12a7a <.text+0x12a7a>
-   12a34:	4aab      	ldr	r2, [pc, #684]	(12ce4 <.text+0x12ce4>)
-   12a36:	4bac      	ldr	r3, [pc, #688]	(12ce8 <.text+0x12ce8>)
-   12a38:	981b      	ldr	r0, [sp, #108]
-   12a3a:	991c      	ldr	r1, [sp, #112]
-   12a3c:	f002 f92a 	bl	14c94 <____muldf3_from_thumb>
-   12a40:	f002 f92c 	bl	14c9c <____fixdfsi_from_thumb>
-   12a44:	f002 f91a 	bl	14c7c <____floatsidf_from_thumb>
-   12a48:	4aa8      	ldr	r2, [pc, #672]	(12cec <.text+0x12cec>)
-   12a4a:	4ba9      	ldr	r3, [pc, #676]	(12cf0 <.text+0x12cf0>)
-   12a4c:	1c05      	adds	r5, r0, #0
-   12a4e:	1c0e      	adds	r6, r1, #0
-   12a50:	f002 f920 	bl	14c94 <____muldf3_from_thumb>
-   12a54:	1c02      	adds	r2, r0, #0
-   12a56:	1c0b      	adds	r3, r1, #0
-   12a58:	981b      	ldr	r0, [sp, #108]
-   12a5a:	991c      	ldr	r1, [sp, #112]
-   12a5c:	f002 f912 	bl	14c84 <____adddf3_from_thumb>
-   12a60:	f002 f91c 	bl	14c9c <____fixdfsi_from_thumb>
-   12a64:	9a06      	ldr	r2, [sp, #24]
-   12a66:	9b0b      	ldr	r3, [sp, #44]
-   12a68:	3201      	adds	r2, #1
-   12a6a:	51e0      	str	r0, [r4, r7]
-   12a6c:	3318      	adds	r3, #24
-   12a6e:	0094      	lsls	r4, r2, #2
-   12a70:	1c28      	adds	r0, r5, #0
-   12a72:	1c31      	adds	r1, r6, #0
-   12a74:	9206      	str	r2, [sp, #24]
-   12a76:	930b      	str	r3, [sp, #44]
-   12a78:	e001      	b.n	12a7e <.text+0x12a7e>
-   12a7a:	981b      	ldr	r0, [sp, #108]
-   12a7c:	991c      	ldr	r1, [sp, #112]
-   12a7e:	f002 f90d 	bl	14c9c <____fixdfsi_from_thumb>
-   12a82:	51e0      	str	r0, [r4, r7]
-   12a84:	9a0b      	ldr	r2, [sp, #44]
-   12a86:	489b      	ldr	r0, [pc, #620]	(12cf4 <.text+0x12cf4>)
-   12a88:	499b      	ldr	r1, [pc, #620]	(12cf8 <.text+0x12cf8>)
-   12a8a:	f000 fb67 	bl	1315c <scalbn>
-   12a8e:	9f06      	ldr	r7, [sp, #24]
-   12a90:	ab9a      	add	r3, sp, #616
-   12a92:	00ba      	lsls	r2, r7, #2
-   12a94:	189b      	adds	r3, r3, r2
-   12a96:	9310      	str	r3, [sp, #64]
-   12a98:	00fa      	lsls	r2, r7, #3
-   12a9a:	ab4a      	add	r3, sp, #296
-   12a9c:	9e06      	ldr	r6, [sp, #24]
-   12a9e:	1c04      	adds	r4, r0, #0
-   12aa0:	1c0d      	adds	r5, r1, #0
-   12aa2:	189f      	adds	r7, r3, r2
-   12aa4:	e018      	b.n	12ad8 <.text+0x12ad8>
-   12aa6:	9910      	ldr	r1, [sp, #64]
-   12aa8:	6808      	ldr	r0, [r1, #0]
-   12aaa:	f002 f8e7 	bl	14c7c <____floatsidf_from_thumb>
-   12aae:	1c02      	adds	r2, r0, #0
-   12ab0:	1c0b      	adds	r3, r1, #0
-   12ab2:	1c20      	adds	r0, r4, #0
-   12ab4:	1c29      	adds	r1, r5, #0
-   12ab6:	f002 f8ed 	bl	14c94 <____muldf3_from_thumb>
-   12aba:	4a8a      	ldr	r2, [pc, #552]	(12ce4 <.text+0x12ce4>)
-   12abc:	4b8a      	ldr	r3, [pc, #552]	(12ce8 <.text+0x12ce8>)
-   12abe:	6038      	str	r0, [r7, #0]
-   12ac0:	6079      	str	r1, [r7, #4]
-   12ac2:	1c20      	adds	r0, r4, #0
-   12ac4:	1c29      	adds	r1, r5, #0
-   12ac6:	f002 f8e5 	bl	14c94 <____muldf3_from_thumb>
-   12aca:	9a10      	ldr	r2, [sp, #64]
-   12acc:	3a04      	subs	r2, #4
-   12ace:	9210      	str	r2, [sp, #64]
-   12ad0:	1c04      	adds	r4, r0, #0
-   12ad2:	1c0d      	adds	r5, r1, #0
-   12ad4:	3e01      	subs	r6, #1
-   12ad6:	3f08      	subs	r7, #8
-   12ad8:	2e00      	cmp	r6, #0
-   12ada:	dae4      	bge.n	12aa6 <.text+0x12aa6>
-   12adc:	9f06      	ldr	r7, [sp, #24]
-   12ade:	2300      	movs	r3, #0
-   12ae0:	930f      	str	r3, [sp, #60]
-   12ae2:	e024      	b.n	12b2e <.text+0x12b2e>
-   12ae4:	4a85      	ldr	r2, [pc, #532]	(12cfc <.text+0x12cfc>)
-   12ae6:	00f3      	lsls	r3, r6, #3
-   12ae8:	9c0e      	ldr	r4, [sp, #56]
-   12aea:	189b      	adds	r3, r3, r2
-   12aec:	6818      	ldr	r0, [r3, #0]
-   12aee:	6859      	ldr	r1, [r3, #4]
-   12af0:	cc0c      	ldmia	r4!, {r2, r3}
-   12af2:	940e      	str	r4, [sp, #56]
-   12af4:	f002 f8ce 	bl	14c94 <____muldf3_from_thumb>
-   12af8:	1c02      	adds	r2, r0, #0
-   12afa:	1c0b      	adds	r3, r1, #0
-   12afc:	9800      	ldr	r0, [sp, #0]
-   12afe:	9901      	ldr	r1, [sp, #4]
-   12b00:	f002 f8c0 	bl	14c84 <____adddf3_from_thumb>
-   12b04:	9000      	str	r0, [sp, #0]
-   12b06:	9101      	str	r1, [sp, #4]
-   12b08:	3601      	adds	r6, #1
-   12b0a:	9808      	ldr	r0, [sp, #32]
-   12b0c:	4286      	cmp	r6, r0
-   12b0e:	dc02      	bgt.n	12b16 <.text+0x12b16>
-   12b10:	990f      	ldr	r1, [sp, #60]
-   12b12:	428e      	cmp	r6, r1
-   12b14:	dde6      	ble.n	12ae4 <.text+0x12ae4>
-   12b16:	9b0f      	ldr	r3, [sp, #60]
-   12b18:	9800      	ldr	r0, [sp, #0]
-   12b1a:	9901      	ldr	r1, [sp, #4]
-   12b1c:	00da      	lsls	r2, r3, #3
-   12b1e:	ab72      	add	r3, sp, #456
-   12b20:	189b      	adds	r3, r3, r2
-   12b22:	6018      	str	r0, [r3, #0]
-   12b24:	6059      	str	r1, [r3, #4]
-   12b26:	990f      	ldr	r1, [sp, #60]
-   12b28:	3101      	adds	r1, #1
-   12b2a:	910f      	str	r1, [sp, #60]
-   12b2c:	3f01      	subs	r7, #1
-   12b2e:	2f00      	cmp	r7, #0
-   12b30:	db09      	blt.n	12b46 <.text+0x12b46>
-   12b32:	00fa      	lsls	r2, r7, #3
-   12b34:	ab4a      	add	r3, sp, #296
-   12b36:	189b      	adds	r3, r3, r2
-   12b38:	930e      	str	r3, [sp, #56]
-   12b3a:	4b67      	ldr	r3, [pc, #412]	(12cd8 <.text+0x12cd8>)
-   12b3c:	4a65      	ldr	r2, [pc, #404]	(12cd4 <.text+0x12cd4>)
-   12b3e:	2600      	movs	r6, #0
-   12b40:	9200      	str	r2, [sp, #0]
-   12b42:	9301      	str	r3, [sp, #4]
-   12b44:	e7e1      	b.n	12b0a <.text+0x12b0a>
-   12b46:	9bb3      	ldr	r3, [sp, #716]
-   12b48:	2b02      	cmp	r3, #2
-   12b4a:	dc04      	bgt.n	12b56 <.text+0x12b56>
-   12b4c:	2b01      	cmp	r3, #1
-   12b4e:	da0e      	bge.n	12b6e <.text+0x12b6e>
-   12b50:	2b00      	cmp	r3, #0
-   12b52:	d014      	beq.n	12b7e <.text+0x12b7e>
-   12b54:	e0e4      	b.n	12d20 <.text+0x12d20>
-   12b56:	9cb3      	ldr	r4, [sp, #716]
-   12b58:	2c03      	cmp	r4, #3
-   12b5a:	d000      	beq.n	12b5e <.text+0x12b5e>
-   12b5c:	e0e0      	b.n	12d20 <.text+0x12d20>
-   12b5e:	9f06      	ldr	r7, [sp, #24]
-   12b60:	3f01      	subs	r7, #1
-   12b62:	00fa      	lsls	r2, r7, #3
-   12b64:	970d      	str	r7, [sp, #52]
-   12b66:	ab72      	add	r3, sp, #456
-   12b68:	9f06      	ldr	r7, [sp, #24]
-   12b6a:	189e      	adds	r6, r3, r2
-   12b6c:	e06d      	b.n	12c4a <.text+0x12c4a>
-   12b6e:	9806      	ldr	r0, [sp, #24]
-   12b70:	ab72      	add	r3, sp, #456
-   12b72:	00c2      	lsls	r2, r0, #3
-   12b74:	1c04      	adds	r4, r0, #0
-   12b76:	4958      	ldr	r1, [pc, #352]	(12cd8 <.text+0x12cd8>)
-   12b78:	4856      	ldr	r0, [pc, #344]	(12cd4 <.text+0x12cd4>)
-   12b7a:	189d      	adds	r5, r3, r2
-   12b7c:	e01f      	b.n	12bbe <.text+0x12bbe>
-   12b7e:	9906      	ldr	r1, [sp, #24]
-   12b80:	ab72      	add	r3, sp, #456
-   12b82:	00ca      	lsls	r2, r1, #3
-   12b84:	1c0c      	adds	r4, r1, #0
-   12b86:	4954      	ldr	r1, [pc, #336]	(12cd8 <.text+0x12cd8>)
-   12b88:	4852      	ldr	r0, [pc, #328]	(12cd4 <.text+0x12cd4>)
-   12b8a:	189d      	adds	r5, r3, r2
-   12b8c:	e005      	b.n	12b9a <.text+0x12b9a>
-   12b8e:	682a      	ldr	r2, [r5, #0]
-   12b90:	686b      	ldr	r3, [r5, #4]
-   12b92:	f002 f877 	bl	14c84 <____adddf3_from_thumb>
-   12b96:	3c01      	subs	r4, #1
-   12b98:	3d08      	subs	r5, #8
-   12b9a:	2c00      	cmp	r4, #0
-   12b9c:	daf7      	bge.n	12b8e <.text+0x12b8e>
-   12b9e:	9a0c      	ldr	r2, [sp, #48]
-   12ba0:	2a00      	cmp	r2, #0
-   12ba2:	d002      	beq.n	12baa <.text+0x12baa>
-   12ba4:	2780      	movs	r7, #128
-   12ba6:	063f      	lsls	r7, r7, #24
-   12ba8:	19c0      	adds	r0, r0, r7
-   12baa:	9a03      	ldr	r2, [sp, #12]
-   12bac:	6010      	str	r0, [r2, #0]
-   12bae:	6051      	str	r1, [r2, #4]
-   12bb0:	e0b6      	b.n	12d20 <.text+0x12d20>
-   12bb2:	682a      	ldr	r2, [r5, #0]
-   12bb4:	686b      	ldr	r3, [r5, #4]
-   12bb6:	f002 f865 	bl	14c84 <____adddf3_from_thumb>
-   12bba:	3c01      	subs	r4, #1
-   12bbc:	3d08      	subs	r5, #8
-   12bbe:	2c00      	cmp	r4, #0
-   12bc0:	daf7      	bge.n	12bb2 <.text+0x12bb2>
-   12bc2:	9c0c      	ldr	r4, [sp, #48]
-   12bc4:	1c02      	adds	r2, r0, #0
-   12bc6:	1c0b      	adds	r3, r1, #0
-   12bc8:	2c00      	cmp	r4, #0
-   12bca:	d002      	beq.n	12bd2 <.text+0x12bd2>
-   12bcc:	2780      	movs	r7, #128
-   12bce:	063f      	lsls	r7, r7, #24
-   12bd0:	19c0      	adds	r0, r0, r7
-   12bd2:	9c03      	ldr	r4, [sp, #12]
-   12bd4:	6020      	str	r0, [r4, #0]
-   12bd6:	6061      	str	r1, [r4, #4]
-   12bd8:	9872      	ldr	r0, [sp, #456]
-   12bda:	9973      	ldr	r1, [sp, #460]
-   12bdc:	f002 f856 	bl	14c8c <____subdf3_from_thumb>
-   12be0:	2401      	movs	r4, #1
-   12be2:	e007      	b.n	12bf4 <.text+0x12bf4>
-   12be4:	00e2      	lsls	r2, r4, #3
-   12be6:	ab72      	add	r3, sp, #456
-   12be8:	189b      	adds	r3, r3, r2
-   12bea:	681a      	ldr	r2, [r3, #0]
-   12bec:	685b      	ldr	r3, [r3, #4]
-   12bee:	f002 f849 	bl	14c84 <____adddf3_from_thumb>
-   12bf2:	3401      	adds	r4, #1
-   12bf4:	9f06      	ldr	r7, [sp, #24]
-   12bf6:	42bc      	cmp	r4, r7
-   12bf8:	ddf4      	ble.n	12be4 <.text+0x12be4>
-   12bfa:	9a0c      	ldr	r2, [sp, #48]
-   12bfc:	2a00      	cmp	r2, #0
-   12bfe:	d002      	beq.n	12c06 <.text+0x12c06>
-   12c00:	2780      	movs	r7, #128
-   12c02:	063f      	lsls	r7, r7, #24
-   12c04:	19c0      	adds	r0, r0, r7
-   12c06:	9a03      	ldr	r2, [sp, #12]
-   12c08:	6090      	str	r0, [r2, #8]
-   12c0a:	60d1      	str	r1, [r2, #12]
-   12c0c:	e088      	b.n	12d20 <.text+0x12d20>
-   12c0e:	68b0      	ldr	r0, [r6, #8]
-   12c10:	68f1      	ldr	r1, [r6, #12]
-   12c12:	6834      	ldr	r4, [r6, #0]
-   12c14:	6875      	ldr	r5, [r6, #4]
-   12c16:	901f      	str	r0, [sp, #124]
-   12c18:	9120      	str	r1, [sp, #128]
-   12c1a:	9a1f      	ldr	r2, [sp, #124]
-   12c1c:	9b20      	ldr	r3, [sp, #128]
-   12c1e:	1c20      	adds	r0, r4, #0
-   12c20:	1c29      	adds	r1, r5, #0
-   12c22:	f002 f82f 	bl	14c84 <____adddf3_from_thumb>
-   12c26:	6030      	str	r0, [r6, #0]
-   12c28:	6071      	str	r1, [r6, #4]
-   12c2a:	1c20      	adds	r0, r4, #0
-   12c2c:	6832      	ldr	r2, [r6, #0]
-   12c2e:	6873      	ldr	r3, [r6, #4]
-   12c30:	1c29      	adds	r1, r5, #0
-   12c32:	f002 f82b 	bl	14c8c <____subdf3_from_thumb>
-   12c36:	1c02      	adds	r2, r0, #0
-   12c38:	1c0b      	adds	r3, r1, #0
-   12c3a:	981f      	ldr	r0, [sp, #124]
-   12c3c:	9920      	ldr	r1, [sp, #128]
-   12c3e:	f002 f821 	bl	14c84 <____adddf3_from_thumb>
-   12c42:	3f01      	subs	r7, #1
-   12c44:	60b0      	str	r0, [r6, #8]
-   12c46:	60f1      	str	r1, [r6, #12]
-   12c48:	3e08      	subs	r6, #8
-   12c4a:	2f00      	cmp	r7, #0
-   12c4c:	dcdf      	bgt.n	12c0e <.text+0x12c0e>
-   12c4e:	990d      	ldr	r1, [sp, #52]
-   12c50:	ab72      	add	r3, sp, #456
-   12c52:	00ca      	lsls	r2, r1, #3
-   12c54:	9f06      	ldr	r7, [sp, #24]
-   12c56:	189e      	adds	r6, r3, r2
-   12c58:	e01b      	b.n	12c92 <.text+0x12c92>
-   12c5a:	6834      	ldr	r4, [r6, #0]
-   12c5c:	6875      	ldr	r5, [r6, #4]
-   12c5e:	68b2      	ldr	r2, [r6, #8]
-   12c60:	68f3      	ldr	r3, [r6, #12]
-   12c62:	1c20      	adds	r0, r4, #0
-   12c64:	1c29      	adds	r1, r5, #0
-   12c66:	921d      	str	r2, [sp, #116]
-   12c68:	931e      	str	r3, [sp, #120]
-   12c6a:	f002 f80b 	bl	14c84 <____adddf3_from_thumb>
-   12c6e:	6030      	str	r0, [r6, #0]
-   12c70:	6071      	str	r1, [r6, #4]
-   12c72:	1c20      	adds	r0, r4, #0
-   12c74:	6832      	ldr	r2, [r6, #0]
-   12c76:	6873      	ldr	r3, [r6, #4]
-   12c78:	1c29      	adds	r1, r5, #0
-   12c7a:	f002 f807 	bl	14c8c <____subdf3_from_thumb>
-   12c7e:	1c02      	adds	r2, r0, #0
-   12c80:	1c0b      	adds	r3, r1, #0
-   12c82:	981d      	ldr	r0, [sp, #116]
-   12c84:	991e      	ldr	r1, [sp, #120]
-   12c86:	f001 fffd 	bl	14c84 <____adddf3_from_thumb>
-   12c8a:	3f01      	subs	r7, #1
-   12c8c:	60b0      	str	r0, [r6, #8]
-   12c8e:	60f1      	str	r1, [r6, #12]
-   12c90:	3e08      	subs	r6, #8
-   12c92:	2f01      	cmp	r7, #1
-   12c94:	dce1      	bgt.n	12c5a <.text+0x12c5a>
-   12c96:	9b06      	ldr	r3, [sp, #24]
-   12c98:	9c06      	ldr	r4, [sp, #24]
-   12c9a:	00da      	lsls	r2, r3, #3
-   12c9c:	490e      	ldr	r1, [pc, #56]	(12cd8 <.text+0x12cd8>)
-   12c9e:	480d      	ldr	r0, [pc, #52]	(12cd4 <.text+0x12cd4>)
-   12ca0:	ab72      	add	r3, sp, #456
-   12ca2:	189d      	adds	r5, r3, r2
-   12ca4:	e005      	b.n	12cb2 <.text+0x12cb2>
-   12ca6:	682a      	ldr	r2, [r5, #0]
-   12ca8:	686b      	ldr	r3, [r5, #4]
-   12caa:	f001 ffeb 	bl	14c84 <____adddf3_from_thumb>
-   12cae:	3c01      	subs	r4, #1
-   12cb0:	3d08      	subs	r5, #8
-   12cb2:	2c01      	cmp	r4, #1
-   12cb4:	dcf7      	bgt.n	12ca6 <.text+0x12ca6>
-   12cb6:	9c0c      	ldr	r4, [sp, #48]
-   12cb8:	2c00      	cmp	r4, #0
-   12cba:	d121      	bne.n	12d00 <.text+0x12d00>
-   12cbc:	9b72      	ldr	r3, [sp, #456]
-   12cbe:	9c73      	ldr	r4, [sp, #460]
-   12cc0:	9f03      	ldr	r7, [sp, #12]
-   12cc2:	603b      	str	r3, [r7, #0]
-   12cc4:	607c      	str	r4, [r7, #4]
-   12cc6:	9b74      	ldr	r3, [sp, #464]
-   12cc8:	9c75      	ldr	r4, [sp, #468]
-   12cca:	6138      	str	r0, [r7, #16]
-   12ccc:	6179      	str	r1, [r7, #20]
-   12cce:	60bb      	str	r3, [r7, #8]
-   12cd0:	60fc      	str	r4, [r7, #12]
-   12cd2:	e025      	b.n	12d20 <.text+0x12d20>
-	...
-   12cdc:	0000      	lsls	r0, r0, #0
-   12cde:	4170      	adcs	r0, r6
-   12ce0:	0000      	lsls	r0, r0, #0
-   12ce2:	0000      	lsls	r0, r0, #0
-   12ce4:	0000      	lsls	r0, r0, #0
-   12ce6:	3e70      	subs	r6, #112
-   12ce8:	0000      	lsls	r0, r0, #0
-   12cea:	0000      	lsls	r0, r0, #0
-   12cec:	0000      	lsls	r0, r0, #0
-   12cee:	c170      	stmia	r1!, {r4, r5, r6}
-   12cf0:	0000      	lsls	r0, r0, #0
-   12cf2:	0000      	lsls	r0, r0, #0
-   12cf4:	0000      	lsls	r0, r0, #0
-   12cf6:	3ff0      	subs	r7, #240
-   12cf8:	0000      	lsls	r0, r0, #0
-   12cfa:	0000      	lsls	r0, r0, #0
-   12cfc:	5328      	strh	r0, [r5, r4]
-   12cfe:	0001      	lsls	r1, r0, #0
-   12d00:	9b72      	ldr	r3, [sp, #456]
-   12d02:	2480      	movs	r4, #128
-   12d04:	9f03      	ldr	r7, [sp, #12]
-   12d06:	0624      	lsls	r4, r4, #24
-   12d08:	191b      	adds	r3, r3, r4
-   12d0a:	603b      	str	r3, [r7, #0]
-   12d0c:	9b73      	ldr	r3, [sp, #460]
-   12d0e:	607b      	str	r3, [r7, #4]
-   12d10:	9b74      	ldr	r3, [sp, #464]
-   12d12:	191b      	adds	r3, r3, r4
-   12d14:	60bb      	str	r3, [r7, #8]
-   12d16:	9b75      	ldr	r3, [sp, #468]
-   12d18:	60fb      	str	r3, [r7, #12]
-   12d1a:	1903      	adds	r3, r0, r4
-   12d1c:	613b      	str	r3, [r7, #16]
-   12d1e:	6179      	str	r1, [r7, #20]
-   12d20:	9809      	ldr	r0, [sp, #36]
-   12d22:	2307      	movs	r3, #7
-   12d24:	4018      	ands	r0, r3
-   12d26:	23ae      	movs	r3, #174
-   12d28:	009b      	lsls	r3, r3, #2
-   12d2a:	449d      	add	sp, r3
-   12d2c:	bcf0      	pop	{r4, r5, r6, r7}
-   12d2e:	bc02      	pop	{r1}
-   12d30:	4708      	bx	r1
-   12d32:	46c0      	nop			(mov r8, r8)
-
-00012d34 <__kernel_sin>:
-   12d34:	b5f0      	push	{r4, r5, r6, r7, lr}
-   12d36:	b088      	sub	sp, #32
-   12d38:	9200      	str	r2, [sp, #0]
-   12d3a:	9301      	str	r3, [sp, #4]
-   12d3c:	4a4b      	ldr	r2, [pc, #300]	(12e6c <.text+0x12e6c>)
-   12d3e:	4b4c      	ldr	r3, [pc, #304]	(12e70 <.text+0x12e70>)
-   12d40:	4002      	ands	r2, r0
-   12d42:	9002      	str	r0, [sp, #8]
-   12d44:	9103      	str	r1, [sp, #12]
-   12d46:	429a      	cmp	r2, r3
-   12d48:	dc04      	bgt.n	12d54 <__kernel_sin+0x20>
-   12d4a:	f001 ffa7 	bl	14c9c <____fixdfsi_from_thumb>
-   12d4e:	2800      	cmp	r0, #0
-   12d50:	d100      	bne.n	12d54 <__kernel_sin+0x20>
-   12d52:	e085      	b.n	12e60 <__kernel_sin+0x12c>
-   12d54:	9802      	ldr	r0, [sp, #8]
-   12d56:	9903      	ldr	r1, [sp, #12]
-   12d58:	1c02      	adds	r2, r0, #0
-   12d5a:	1c0b      	adds	r3, r1, #0
-   12d5c:	f001 ff9a 	bl	14c94 <____muldf3_from_thumb>
-   12d60:	9a02      	ldr	r2, [sp, #8]
-   12d62:	9b03      	ldr	r3, [sp, #12]
-   12d64:	1c06      	adds	r6, r0, #0
-   12d66:	1c0f      	adds	r7, r1, #0
-   12d68:	f001 ff94 	bl	14c94 <____muldf3_from_thumb>
-   12d6c:	4a41      	ldr	r2, [pc, #260]	(12e74 <.text+0x12e74>)
-   12d6e:	4b42      	ldr	r3, [pc, #264]	(12e78 <.text+0x12e78>)
-   12d70:	9006      	str	r0, [sp, #24]
-   12d72:	9107      	str	r1, [sp, #28]
-   12d74:	1c30      	adds	r0, r6, #0
-   12d76:	1c39      	adds	r1, r7, #0
-   12d78:	f001 ff8c 	bl	14c94 <____muldf3_from_thumb>
-   12d7c:	4a3f      	ldr	r2, [pc, #252]	(12e7c <.text+0x12e7c>)
-   12d7e:	4b40      	ldr	r3, [pc, #256]	(12e80 <.text+0x12e80>)
-   12d80:	f001 ff84 	bl	14c8c <____subdf3_from_thumb>
-   12d84:	1c02      	adds	r2, r0, #0
-   12d86:	1c0b      	adds	r3, r1, #0
-   12d88:	1c30      	adds	r0, r6, #0
-   12d8a:	1c39      	adds	r1, r7, #0
-   12d8c:	f001 ff82 	bl	14c94 <____muldf3_from_thumb>
-   12d90:	4a3c      	ldr	r2, [pc, #240]	(12e84 <.text+0x12e84>)
-   12d92:	4b3d      	ldr	r3, [pc, #244]	(12e88 <.text+0x12e88>)
-   12d94:	f001 ff76 	bl	14c84 <____adddf3_from_thumb>
-   12d98:	1c02      	adds	r2, r0, #0
-   12d9a:	1c0b      	adds	r3, r1, #0
-   12d9c:	1c30      	adds	r0, r6, #0
-   12d9e:	1c39      	adds	r1, r7, #0
-   12da0:	f001 ff78 	bl	14c94 <____muldf3_from_thumb>
-   12da4:	4a39      	ldr	r2, [pc, #228]	(12e8c <.text+0x12e8c>)
-   12da6:	4b3a      	ldr	r3, [pc, #232]	(12e90 <.text+0x12e90>)
-   12da8:	f001 ff70 	bl	14c8c <____subdf3_from_thumb>
-   12dac:	1c02      	adds	r2, r0, #0
-   12dae:	1c0b      	adds	r3, r1, #0
-   12db0:	1c30      	adds	r0, r6, #0
-   12db2:	1c39      	adds	r1, r7, #0
-   12db4:	f001 ff6e 	bl	14c94 <____muldf3_from_thumb>
-   12db8:	4a36      	ldr	r2, [pc, #216]	(12e94 <.text+0x12e94>)
-   12dba:	4b37      	ldr	r3, [pc, #220]	(12e98 <.text+0x12e98>)
-   12dbc:	f001 ff62 	bl	14c84 <____adddf3_from_thumb>
-   12dc0:	9b0d      	ldr	r3, [sp, #52]
-   12dc2:	9004      	str	r0, [sp, #16]
-   12dc4:	9105      	str	r1, [sp, #20]
-   12dc6:	2b00      	cmp	r3, #0
-   12dc8:	d116      	bne.n	12df8 <__kernel_sin+0xc4>
-   12dca:	9a04      	ldr	r2, [sp, #16]
-   12dcc:	9b05      	ldr	r3, [sp, #20]
-   12dce:	1c30      	adds	r0, r6, #0
-   12dd0:	1c39      	adds	r1, r7, #0
-   12dd2:	f001 ff5f 	bl	14c94 <____muldf3_from_thumb>
-   12dd6:	4a31      	ldr	r2, [pc, #196]	(12e9c <.text+0x12e9c>)
-   12dd8:	4b31      	ldr	r3, [pc, #196]	(12ea0 <.text+0x12ea0>)
-   12dda:	f001 ff57 	bl	14c8c <____subdf3_from_thumb>
-   12dde:	1c02      	adds	r2, r0, #0
-   12de0:	1c0b      	adds	r3, r1, #0
-   12de2:	9806      	ldr	r0, [sp, #24]
-   12de4:	9907      	ldr	r1, [sp, #28]
-   12de6:	f001 ff55 	bl	14c94 <____muldf3_from_thumb>
-   12dea:	1c02      	adds	r2, r0, #0
-   12dec:	1c0b      	adds	r3, r1, #0
-   12dee:	9802      	ldr	r0, [sp, #8]
-   12df0:	9903      	ldr	r1, [sp, #12]
-   12df2:	f001 ff47 	bl	14c84 <____adddf3_from_thumb>
-   12df6:	e031      	b.n	12e5c <__kernel_sin+0x128>
-   12df8:	4a2a      	ldr	r2, [pc, #168]	(12ea4 <.text+0x12ea4>)
-   12dfa:	4b2b      	ldr	r3, [pc, #172]	(12ea8 <.text+0x12ea8>)
-   12dfc:	9800      	ldr	r0, [sp, #0]
-   12dfe:	9901      	ldr	r1, [sp, #4]
-   12e00:	f001 ff48 	bl	14c94 <____muldf3_from_thumb>
-   12e04:	9a04      	ldr	r2, [sp, #16]
-   12e06:	9b05      	ldr	r3, [sp, #20]
-   12e08:	1c04      	adds	r4, r0, #0
-   12e0a:	1c0d      	adds	r5, r1, #0
-   12e0c:	9806      	ldr	r0, [sp, #24]
-   12e0e:	9907      	ldr	r1, [sp, #28]
-   12e10:	f001 ff40 	bl	14c94 <____muldf3_from_thumb>
-   12e14:	1c02      	adds	r2, r0, #0
-   12e16:	1c0b      	adds	r3, r1, #0
-   12e18:	1c20      	adds	r0, r4, #0
-   12e1a:	1c29      	adds	r1, r5, #0
-   12e1c:	f001 ff36 	bl	14c8c <____subdf3_from_thumb>
-   12e20:	1c02      	adds	r2, r0, #0
-   12e22:	1c0b      	adds	r3, r1, #0
-   12e24:	1c30      	adds	r0, r6, #0
-   12e26:	1c39      	adds	r1, r7, #0
-   12e28:	f001 ff34 	bl	14c94 <____muldf3_from_thumb>
-   12e2c:	9a00      	ldr	r2, [sp, #0]
-   12e2e:	9b01      	ldr	r3, [sp, #4]
-   12e30:	f001 ff2c 	bl	14c8c <____subdf3_from_thumb>
-   12e34:	4a19      	ldr	r2, [pc, #100]	(12e9c <.text+0x12e9c>)
-   12e36:	4b1a      	ldr	r3, [pc, #104]	(12ea0 <.text+0x12ea0>)
-   12e38:	1c04      	adds	r4, r0, #0
-   12e3a:	1c0d      	adds	r5, r1, #0
-   12e3c:	9806      	ldr	r0, [sp, #24]
-   12e3e:	9907      	ldr	r1, [sp, #28]
-   12e40:	f001 ff28 	bl	14c94 <____muldf3_from_thumb>
-   12e44:	1c02      	adds	r2, r0, #0
-   12e46:	1c0b      	adds	r3, r1, #0
-   12e48:	1c20      	adds	r0, r4, #0
-   12e4a:	1c29      	adds	r1, r5, #0
-   12e4c:	f001 ff1a 	bl	14c84 <____adddf3_from_thumb>
-   12e50:	1c02      	adds	r2, r0, #0
-   12e52:	1c0b      	adds	r3, r1, #0
-   12e54:	9802      	ldr	r0, [sp, #8]
-   12e56:	9903      	ldr	r1, [sp, #12]
-   12e58:	f001 ff18 	bl	14c8c <____subdf3_from_thumb>
-   12e5c:	9002      	str	r0, [sp, #8]
-   12e5e:	9103      	str	r1, [sp, #12]
-   12e60:	9802      	ldr	r0, [sp, #8]
-   12e62:	9903      	ldr	r1, [sp, #12]
-   12e64:	b008      	add	sp, #32
-   12e66:	bcf0      	pop	{r4, r5, r6, r7}
-   12e68:	bc04      	pop	{r2}
-   12e6a:	4710      	bx	r2
-   12e6c:	ffff 7fff 	undefined
-   12e70:	ffff 3e3f 	vcvt.f32.u32	d19, d31, #1
-   12e74:	d93a      	bls.n	12eec <floor+0xc>
-   12e76:	3de5      	subs	r5, #229
-   12e78:	d57c      	bpl.n	12f74 <floor+0x94>
-   12e7a:	5acf      	ldrh	r7, [r1, r3]
-   12e7c:	e5e6      	b.n	12a4c <.text+0x12a4c>
-   12e7e:	3e5a      	subs	r6, #90
-   12e80:	9ceb      	ldr	r4, [sp, #940]
-   12e82:	8a2b      	ldrh	r3, [r5, #16]
-   12e84:	1de3      	adds	r3, r4, #7
-   12e86:	3ec7      	subs	r6, #199
-   12e88:	fe7d 57b1 	mrc2	7, 3, r5, cr13, cr1, {5}
-   12e8c:	01a0      	lsls	r0, r4, #6
-   12e8e:	3f2a      	subs	r7, #42
-   12e90:	61d5      	str	r5, [r2, #28]
-   12e92:	19c1      	adds	r1, r0, r7
-   12e94:	1111      	asrs	r1, r2, #4
-   12e96:	3f81      	subs	r7, #129
-   12e98:	f8a6 1110 	strh.w	r1, [r6, #272]
-   12e9c:	5555      	strb	r5, [r2, r5]
-   12e9e:	3fc5      	subs	r7, #197
-   12ea0:	5549      	strb	r1, [r1, r5]
-   12ea2:	5555      	strb	r5, [r2, r5]
-   12ea4:	0000      	lsls	r0, r0, #0
-   12ea6:	3fe0      	subs	r7, #224
-   12ea8:	0000      	lsls	r0, r0, #0
-	...
-
-00012eac <fabs>:
-   12eac:	b510      	push	{r4, lr}
-   12eae:	1c03      	adds	r3, r0, #0
-   12eb0:	4803      	ldr	r0, [pc, #12]	(12ec0 <.text+0x12ec0>)
-   12eb2:	1c0a      	adds	r2, r1, #0
-   12eb4:	4003      	ands	r3, r0
-   12eb6:	1c18      	adds	r0, r3, #0
-   12eb8:	1c11      	adds	r1, r2, #0
-   12eba:	bc10      	pop	{r4}
-   12ebc:	bc04      	pop	{r2}
-   12ebe:	4710      	bx	r2
-   12ec0:	ffff 7fff 	undefined
-
-00012ec4 <finite>:
-   12ec4:	b510      	push	{r4, lr}
-   12ec6:	1c03      	adds	r3, r0, #0
-   12ec8:	4803      	ldr	r0, [pc, #12]	(12ed8 <.text+0x12ed8>)
-   12eca:	4018      	ands	r0, r3
-   12ecc:	4b03      	ldr	r3, [pc, #12]	(12edc <.text+0x12edc>)
-   12ece:	18c0      	adds	r0, r0, r3
-   12ed0:	0fc0      	lsrs	r0, r0, #31
-   12ed2:	bc10      	pop	{r4}
-   12ed4:	bc02      	pop	{r1}
-   12ed6:	4708      	bx	r1
-   12ed8:	ffff 7fff 	undefined
-   12edc:	0000      	lsls	r0, r0, #0
-   12ede:	8010      	strh	r0, [r2, #0]
-
-00012ee0 <floor>:
-   12ee0:	b5f0      	push	{r4, r5, r6, r7, lr}
-   12ee2:	2200      	movs	r2, #0
-   12ee4:	2300      	movs	r3, #0
-   12ee6:	b085      	sub	sp, #20
-   12ee8:	9200      	str	r2, [sp, #0]
-   12eea:	9301      	str	r3, [sp, #4]
-   12eec:	0043      	lsls	r3, r0, #1
-   12eee:	0d5a      	lsrs	r2, r3, #21
-   12ef0:	4b3d      	ldr	r3, [pc, #244]	(12fe8 <.text+0x12fe8>)
-   12ef2:	18d4      	adds	r4, r2, r3
-   12ef4:	1c05      	adds	r5, r0, #0
-   12ef6:	1c0e      	adds	r6, r1, #0
-   12ef8:	1c07      	adds	r7, r0, #0
-   12efa:	9102      	str	r1, [sp, #8]
-   12efc:	2c13      	cmp	r4, #19
-   12efe:	dc34      	bgt.n	12f6a <floor+0x8a>
-   12f00:	2c00      	cmp	r4, #0
-   12f02:	da16      	bge.n	12f32 <floor+0x52>
-   12f04:	4a39      	ldr	r2, [pc, #228]	(12fec <.text+0x12fec>)
-   12f06:	4b3a      	ldr	r3, [pc, #232]	(12ff0 <.text+0x12ff0>)
-   12f08:	f001 febc 	bl	14c84 <____adddf3_from_thumb>
-   12f0c:	4a39      	ldr	r2, [pc, #228]	(12ff4 <.text+0x12ff4>)
-   12f0e:	4b3a      	ldr	r3, [pc, #232]	(12ff8 <.text+0x12ff8>)
-   12f10:	f001 fecc 	bl	14cac <____gtdf2_from_thumb>
-   12f14:	2800      	cmp	r0, #0
-   12f16:	dd5c      	ble.n	12fd2 <floor+0xf2>
-   12f18:	2d00      	cmp	r5, #0
-   12f1a:	db02      	blt.n	12f22 <floor+0x42>
-   12f1c:	2700      	movs	r7, #0
-   12f1e:	9702      	str	r7, [sp, #8]
-   12f20:	e057      	b.n	12fd2 <floor+0xf2>
-   12f22:	4b36      	ldr	r3, [pc, #216]	(12ffc <.text+0x12ffc>)
-   12f24:	9c02      	ldr	r4, [sp, #8]
-   12f26:	402b      	ands	r3, r5
-   12f28:	431c      	orrs	r4, r3
-   12f2a:	d052      	beq.n	12fd2 <floor+0xf2>
-   12f2c:	4f34      	ldr	r7, [pc, #208]	(13000 <.text+0x13000>)
-   12f2e:	2200      	movs	r2, #0
-   12f30:	e04e      	b.n	12fd0 <floor+0xf0>
-   12f32:	4b34      	ldr	r3, [pc, #208]	(13004 <.text+0x13004>)
-   12f34:	9a02      	ldr	r2, [sp, #8]
-   12f36:	4123      	asrs	r3, r4
-   12f38:	9304      	str	r3, [sp, #16]
-   12f3a:	4003      	ands	r3, r0
-   12f3c:	431a      	orrs	r2, r3
-   12f3e:	d04d      	beq.n	12fdc <floor+0xfc>
-   12f40:	4a2a      	ldr	r2, [pc, #168]	(12fec <.text+0x12fec>)
-   12f42:	4b2b      	ldr	r3, [pc, #172]	(12ff0 <.text+0x12ff0>)
-   12f44:	f001 fe9e 	bl	14c84 <____adddf3_from_thumb>
-   12f48:	4a2a      	ldr	r2, [pc, #168]	(12ff4 <.text+0x12ff4>)
-   12f4a:	4b2b      	ldr	r3, [pc, #172]	(12ff8 <.text+0x12ff8>)
-   12f4c:	f001 feae 	bl	14cac <____gtdf2_from_thumb>
-   12f50:	2800      	cmp	r0, #0
-   12f52:	dd3e      	ble.n	12fd2 <floor+0xf2>
-   12f54:	2d00      	cmp	r5, #0
-   12f56:	da03      	bge.n	12f60 <floor+0x80>
-   12f58:	2380      	movs	r3, #128
-   12f5a:	035b      	lsls	r3, r3, #13
-   12f5c:	4123      	asrs	r3, r4
-   12f5e:	18ef      	adds	r7, r5, r3
-   12f60:	9b04      	ldr	r3, [sp, #16]
-   12f62:	2400      	movs	r4, #0
-   12f64:	439f      	bics	r7, r3
-   12f66:	9402      	str	r4, [sp, #8]
-   12f68:	e033      	b.n	12fd2 <floor+0xf2>
-   12f6a:	2c33      	cmp	r4, #51
-   12f6c:	dd0a      	ble.n	12f84 <floor+0xa4>
-   12f6e:	2380      	movs	r3, #128
-   12f70:	00db      	lsls	r3, r3, #3
-   12f72:	429c      	cmp	r4, r3
-   12f74:	d132      	bne.n	12fdc <floor+0xfc>
-   12f76:	1c2a      	adds	r2, r5, #0
-   12f78:	1c33      	adds	r3, r6, #0
-   12f7a:	f001 fe83 	bl	14c84 <____adddf3_from_thumb>
-   12f7e:	1c05      	adds	r5, r0, #0
-   12f80:	1c0e      	adds	r6, r1, #0
-   12f82:	e02b      	b.n	12fdc <floor+0xfc>
-   12f84:	4b20      	ldr	r3, [pc, #128]	(13008 <.text+0x13008>)
-   12f86:	18d2      	adds	r2, r2, r3
-   12f88:	2301      	movs	r3, #1
-   12f8a:	425b      	negs	r3, r3
-   12f8c:	40d3      	lsrs	r3, r2
-   12f8e:	9a02      	ldr	r2, [sp, #8]
-   12f90:	9303      	str	r3, [sp, #12]
-   12f92:	421a      	tst	r2, r3
-   12f94:	d022      	beq.n	12fdc <floor+0xfc>
-   12f96:	4a15      	ldr	r2, [pc, #84]	(12fec <.text+0x12fec>)
-   12f98:	4b15      	ldr	r3, [pc, #84]	(12ff0 <.text+0x12ff0>)
-   12f9a:	f001 fe73 	bl	14c84 <____adddf3_from_thumb>
-   12f9e:	4a15      	ldr	r2, [pc, #84]	(12ff4 <.text+0x12ff4>)
-   12fa0:	4b15      	ldr	r3, [pc, #84]	(12ff8 <.text+0x12ff8>)
-   12fa2:	f001 fe83 	bl	14cac <____gtdf2_from_thumb>
-   12fa6:	2800      	cmp	r0, #0
-   12fa8:	dd13      	ble.n	12fd2 <floor+0xf2>
-   12faa:	2d00      	cmp	r5, #0
-   12fac:	da0d      	bge.n	12fca <floor+0xea>
-   12fae:	2c14      	cmp	r4, #20
-   12fb0:	d101      	bne.n	12fb6 <floor+0xd6>
-   12fb2:	3701      	adds	r7, #1
-   12fb4:	e009      	b.n	12fca <floor+0xea>
-   12fb6:	2234      	movs	r2, #52
-   12fb8:	1b12      	subs	r2, r2, r4
-   12fba:	2301      	movs	r3, #1
-   12fbc:	9c02      	ldr	r4, [sp, #8]
-   12fbe:	4093      	lsls	r3, r2
-   12fc0:	18e3      	adds	r3, r4, r3
-   12fc2:	42a3      	cmp	r3, r4
-   12fc4:	d200      	bcs.n	12fc8 <floor+0xe8>
-   12fc6:	3701      	adds	r7, #1
-   12fc8:	9302      	str	r3, [sp, #8]
-   12fca:	9a02      	ldr	r2, [sp, #8]
-   12fcc:	9b03      	ldr	r3, [sp, #12]
-   12fce:	439a      	bics	r2, r3
-   12fd0:	9202      	str	r2, [sp, #8]
-   12fd2:	9c02      	ldr	r4, [sp, #8]
-   12fd4:	9700      	str	r7, [sp, #0]
-   12fd6:	9401      	str	r4, [sp, #4]
-   12fd8:	9d00      	ldr	r5, [sp, #0]
-   12fda:	9e01      	ldr	r6, [sp, #4]
-   12fdc:	1c28      	adds	r0, r5, #0
-   12fde:	1c31      	adds	r1, r6, #0
-   12fe0:	b005      	add	sp, #20
-   12fe2:	bcf0      	pop	{r4, r5, r6, r7}
-   12fe4:	bc04      	pop	{r2}
-   12fe6:	4710      	bx	r2
-   12fe8:	fc01 ffff 	stc2	15, cr15, [r1], {255}
-   12fec:	e43c      	b.n	12868 <__kernel_rem_pio2+0x278>
-   12fee:	7e37      	ldrb	r7, [r6, #24]
-   12ff0:	759c      	strb	r4, [r3, #22]
-   12ff2:	8800      	ldrh	r0, [r0, #0]
-	...
-   12ffc:	ffff 7fff 	undefined
-   13000:	0000      	lsls	r0, r0, #0
-   13002:	bff0      	nop	{15}
-   13004:	ffff 000f 	vaddl.u<illegal width 64>	q8, d15, d15
-   13008:	fbed ffff 	undefined
-
-0001300c <matherr>:
-   1300c:	2000      	movs	r0, #0
-   1300e:	4770      	bx	lr
-
-00013010 <rint>:
-   13010:	b5f0      	push	{r4, r5, r6, r7, lr}
-   13012:	2200      	movs	r2, #0
-   13014:	2300      	movs	r3, #0
-   13016:	b085      	sub	sp, #20
-   13018:	9200      	str	r2, [sp, #0]
-   1301a:	9301      	str	r3, [sp, #4]
-   1301c:	0fc3      	lsrs	r3, r0, #31
-   1301e:	9302      	str	r3, [sp, #8]
-   13020:	4a48      	ldr	r2, [pc, #288]	(13144 <.text+0x13144>)
-   13022:	0043      	lsls	r3, r0, #1
-   13024:	0d5b      	lsrs	r3, r3, #21
-   13026:	1c05      	adds	r5, r0, #0
-   13028:	1c0e      	adds	r6, r1, #0
-   1302a:	1c0c      	adds	r4, r1, #0
-   1302c:	1c01      	adds	r1, r0, #0
-   1302e:	1898      	adds	r0, r3, r2
-   13030:	2813      	cmp	r0, #19
-   13032:	dc4a      	bgt.n	130ca <rint+0xba>
-   13034:	2800      	cmp	r0, #0
-   13036:	da31      	bge.n	1309c <rint+0x8c>
-   13038:	4b43      	ldr	r3, [pc, #268]	(13148 <.text+0x13148>)
-   1303a:	402b      	ands	r3, r5
-   1303c:	4333      	orrs	r3, r6
-   1303e:	d07a      	beq.n	13136 <rint+0x126>
-   13040:	4b42      	ldr	r3, [pc, #264]	(1314c <.text+0x1314c>)
-   13042:	1c32      	adds	r2, r6, #0
-   13044:	402b      	ands	r3, r5
-   13046:	431a      	orrs	r2, r3
-   13048:	4b41      	ldr	r3, [pc, #260]	(13150 <.text+0x13150>)
-   1304a:	4019      	ands	r1, r3
-   1304c:	4253      	negs	r3, r2
-   1304e:	431a      	orrs	r2, r3
-   13050:	2380      	movs	r3, #128
-   13052:	031b      	lsls	r3, r3, #12
-   13054:	0b12      	lsrs	r2, r2, #12
-   13056:	401a      	ands	r2, r3
-   13058:	1c0c      	adds	r4, r1, #0
-   1305a:	9802      	ldr	r0, [sp, #8]
-   1305c:	4314      	orrs	r4, r2
-   1305e:	4a3d      	ldr	r2, [pc, #244]	(13154 <.text+0x13154>)
-   13060:	00c3      	lsls	r3, r0, #3
-   13062:	189b      	adds	r3, r3, r2
-   13064:	1c35      	adds	r5, r6, #0
-   13066:	681e      	ldr	r6, [r3, #0]
-   13068:	685f      	ldr	r7, [r3, #4]
-   1306a:	1c22      	adds	r2, r4, #0
-   1306c:	1c2b      	adds	r3, r5, #0
-   1306e:	1c30      	adds	r0, r6, #0
-   13070:	1c39      	adds	r1, r7, #0
-   13072:	f001 fe07 	bl	14c84 <____adddf3_from_thumb>
-   13076:	9003      	str	r0, [sp, #12]
-   13078:	9104      	str	r1, [sp, #16]
-   1307a:	1c32      	adds	r2, r6, #0
-   1307c:	1c3b      	adds	r3, r7, #0
-   1307e:	9803      	ldr	r0, [sp, #12]
-   13080:	9904      	ldr	r1, [sp, #16]
-   13082:	f001 fe03 	bl	14c8c <____subdf3_from_thumb>
-   13086:	1c0c      	adds	r4, r1, #0
-   13088:	492f      	ldr	r1, [pc, #188]	(13148 <.text+0x13148>)
-   1308a:	1c05      	adds	r5, r0, #0
-   1308c:	9802      	ldr	r0, [sp, #8]
-   1308e:	4029      	ands	r1, r5
-   13090:	07c2      	lsls	r2, r0, #31
-   13092:	1c0b      	adds	r3, r1, #0
-   13094:	4313      	orrs	r3, r2
-   13096:	1c1d      	adds	r5, r3, #0
-   13098:	1c26      	adds	r6, r4, #0
-   1309a:	e04c      	b.n	13136 <rint+0x126>
-   1309c:	4b2b      	ldr	r3, [pc, #172]	(1314c <.text+0x1314c>)
-   1309e:	1c1a      	adds	r2, r3, #0
-   130a0:	4102      	asrs	r2, r0
-   130a2:	1c2b      	adds	r3, r5, #0
-   130a4:	4013      	ands	r3, r2
-   130a6:	4333      	orrs	r3, r6
-   130a8:	d045      	beq.n	13136 <rint+0x126>
-   130aa:	0852      	lsrs	r2, r2, #1
-   130ac:	1c2b      	adds	r3, r5, #0
-   130ae:	4013      	ands	r3, r2
-   130b0:	4333      	orrs	r3, r6
-   130b2:	d028      	beq.n	13106 <rint+0xf6>
-   130b4:	2813      	cmp	r0, #19
-   130b6:	d102      	bne.n	130be <rint+0xae>
-   130b8:	2480      	movs	r4, #128
-   130ba:	05e4      	lsls	r4, r4, #23
-   130bc:	e023      	b.n	13106 <rint+0xf6>
-   130be:	2380      	movs	r3, #128
-   130c0:	029b      	lsls	r3, r3, #10
-   130c2:	4391      	bics	r1, r2
-   130c4:	4103      	asrs	r3, r0
-   130c6:	4319      	orrs	r1, r3
-   130c8:	e01d      	b.n	13106 <rint+0xf6>
-   130ca:	2833      	cmp	r0, #51
-   130cc:	dd0a      	ble.n	130e4 <rint+0xd4>
-   130ce:	2380      	movs	r3, #128
-   130d0:	00db      	lsls	r3, r3, #3
-   130d2:	4298      	cmp	r0, r3
-   130d4:	d12f      	bne.n	13136 <rint+0x126>
-   130d6:	1c28      	adds	r0, r5, #0
-   130d8:	1c31      	adds	r1, r6, #0
-   130da:	1c2a      	adds	r2, r5, #0
-   130dc:	1c33      	adds	r3, r6, #0
-   130de:	f001 fdd1 	bl	14c84 <____adddf3_from_thumb>
-   130e2:	e026      	b.n	13132 <rint+0x122>
-   130e4:	4a1c      	ldr	r2, [pc, #112]	(13158 <.text+0x13158>)
-   130e6:	1898      	adds	r0, r3, r2
-   130e8:	2301      	movs	r3, #1
-   130ea:	425b      	negs	r3, r3
-   130ec:	40c3      	lsrs	r3, r0
-   130ee:	421e      	tst	r6, r3
-   130f0:	d021      	beq.n	13136 <rint+0x126>
-   130f2:	085b      	lsrs	r3, r3, #1
-   130f4:	421e      	tst	r6, r3
-   130f6:	d006      	beq.n	13106 <rint+0xf6>
-   130f8:	1c32      	adds	r2, r6, #0
-   130fa:	439a      	bics	r2, r3
-   130fc:	2380      	movs	r3, #128
-   130fe:	05db      	lsls	r3, r3, #23
-   13100:	4103      	asrs	r3, r0
-   13102:	1c14      	adds	r4, r2, #0
-   13104:	431c      	orrs	r4, r3
-   13106:	9401      	str	r4, [sp, #4]
-   13108:	9c02      	ldr	r4, [sp, #8]
-   1310a:	4a12      	ldr	r2, [pc, #72]	(13154 <.text+0x13154>)
-   1310c:	00e3      	lsls	r3, r4, #3
-   1310e:	189b      	adds	r3, r3, r2
-   13110:	681c      	ldr	r4, [r3, #0]
-   13112:	685d      	ldr	r5, [r3, #4]
-   13114:	9100      	str	r1, [sp, #0]
-   13116:	9a00      	ldr	r2, [sp, #0]
-   13118:	9b01      	ldr	r3, [sp, #4]
-   1311a:	1c20      	adds	r0, r4, #0
-   1311c:	1c29      	adds	r1, r5, #0
-   1311e:	f001 fdb1 	bl	14c84 <____adddf3_from_thumb>
-   13122:	9003      	str	r0, [sp, #12]
-   13124:	9104      	str	r1, [sp, #16]
-   13126:	9803      	ldr	r0, [sp, #12]
-   13128:	9904      	ldr	r1, [sp, #16]
-   1312a:	1c22      	adds	r2, r4, #0
-   1312c:	1c2b      	adds	r3, r5, #0
-   1312e:	f001 fdad 	bl	14c8c <____subdf3_from_thumb>
-   13132:	1c05      	adds	r5, r0, #0
-   13134:	1c0e      	adds	r6, r1, #0
-   13136:	1c28      	adds	r0, r5, #0
-   13138:	1c31      	adds	r1, r6, #0
-   1313a:	b005      	add	sp, #20
-   1313c:	bcf0      	pop	{r4, r5, r6, r7}
-   1313e:	bc04      	pop	{r2}
-   13140:	4710      	bx	r2
-   13142:	0000      	lsls	r0, r0, #0
-   13144:	fc01 ffff 	stc2	15, cr15, [r1], {255}
-   13148:	ffff 7fff 	undefined
-   1314c:	ffff 000f 	vaddl.u<illegal width 64>	q8, d15, d15
-   13150:	0000      	lsls	r0, r0, #0
-   13152:	fffe 536c 	undefined
-   13156:	0001      	lsls	r1, r0, #0
-   13158:	fbed ffff 	undefined
-
-0001315c <scalbn>:
-   1315c:	b5f0      	push	{r4, r5, r6, r7, lr}
-   1315e:	4f34      	ldr	r7, [pc, #208]	(13230 <.text+0x13230>)
-   13160:	1c03      	adds	r3, r0, #0
-   13162:	b081      	sub	sp, #4
-   13164:	403b      	ands	r3, r7
-   13166:	9200      	str	r2, [sp, #0]
-   13168:	151a      	asrs	r2, r3, #20
-   1316a:	1c05      	adds	r5, r0, #0
-   1316c:	1c0e      	adds	r6, r1, #0
-   1316e:	2a00      	cmp	r2, #0
-   13170:	d117      	bne.n	131a2 <scalbn+0x46>
-   13172:	4b30      	ldr	r3, [pc, #192]	(13234 <.text+0x13234>)
-   13174:	4003      	ands	r3, r0
-   13176:	4319      	orrs	r1, r3
-   13178:	d054      	beq.n	13224 <scalbn+0xc8>
-   1317a:	4a2f      	ldr	r2, [pc, #188]	(13238 <.text+0x13238>)
-   1317c:	4b2f      	ldr	r3, [pc, #188]	(1323c <.text+0x1323c>)
-   1317e:	1c28      	adds	r0, r5, #0
-   13180:	1c31      	adds	r1, r6, #0
-   13182:	f001 fd87 	bl	14c94 <____muldf3_from_thumb>
-   13186:	4b2e      	ldr	r3, [pc, #184]	(13240 <.text+0x13240>)
-   13188:	9a00      	ldr	r2, [sp, #0]
-   1318a:	1c05      	adds	r5, r0, #0
-   1318c:	1c0e      	adds	r6, r1, #0
-   1318e:	429a      	cmp	r2, r3
-   13190:	db05      	blt.n	1319e <scalbn+0x42>
-   13192:	1c03      	adds	r3, r0, #0
-   13194:	403b      	ands	r3, r7
-   13196:	151b      	asrs	r3, r3, #20
-   13198:	1c1a      	adds	r2, r3, #0
-   1319a:	3a36      	subs	r2, #54
-   1319c:	e001      	b.n	131a2 <scalbn+0x46>
-   1319e:	1c28      	adds	r0, r5, #0
-   131a0:	e02e      	b.n	13200 <scalbn+0xa4>
-   131a2:	4b28      	ldr	r3, [pc, #160]	(13244 <.text+0x13244>)
-   131a4:	429a      	cmp	r2, r3
-   131a6:	d106      	bne.n	131b6 <scalbn+0x5a>
-   131a8:	1c28      	adds	r0, r5, #0
-   131aa:	1c31      	adds	r1, r6, #0
-   131ac:	1c2a      	adds	r2, r5, #0
-   131ae:	1c33      	adds	r3, r6, #0
-   131b0:	f001 fd68 	bl	14c84 <____adddf3_from_thumb>
-   131b4:	e034      	b.n	13220 <scalbn+0xc4>
-   131b6:	9b00      	ldr	r3, [sp, #0]
-   131b8:	18d7      	adds	r7, r2, r3
-   131ba:	4b23      	ldr	r3, [pc, #140]	(13248 <.text+0x13248>)
-   131bc:	429f      	cmp	r7, r3
-   131be:	dc10      	bgt.n	131e2 <scalbn+0x86>
-   131c0:	2f00      	cmp	r7, #0
-   131c2:	dd07      	ble.n	131d4 <scalbn+0x78>
-   131c4:	4a21      	ldr	r2, [pc, #132]	(1324c <.text+0x1324c>)
-   131c6:	1c01      	adds	r1, r0, #0
-   131c8:	4011      	ands	r1, r2
-   131ca:	1c0b      	adds	r3, r1, #0
-   131cc:	053a      	lsls	r2, r7, #20
-   131ce:	4313      	orrs	r3, r2
-   131d0:	1c1d      	adds	r5, r3, #0
-   131d2:	e027      	b.n	13224 <scalbn+0xc8>
-   131d4:	1c3a      	adds	r2, r7, #0
-   131d6:	3236      	adds	r2, #54
-   131d8:	dc15      	bgt.n	13206 <scalbn+0xaa>
-   131da:	4b1d      	ldr	r3, [pc, #116]	(13250 <.text+0x13250>)
-   131dc:	9a00      	ldr	r2, [sp, #0]
-   131de:	429a      	cmp	r2, r3
-   131e0:	dd08      	ble.n	131f4 <scalbn+0x98>
-   131e2:	1c2a      	adds	r2, r5, #0
-   131e4:	1c33      	adds	r3, r6, #0
-   131e6:	481b      	ldr	r0, [pc, #108]	(13254 <.text+0x13254>)
-   131e8:	491b      	ldr	r1, [pc, #108]	(13258 <.text+0x13258>)
-   131ea:	f000 f83f 	bl	1326c <copysign>
-   131ee:	4a19      	ldr	r2, [pc, #100]	(13254 <.text+0x13254>)
-   131f0:	4b19      	ldr	r3, [pc, #100]	(13258 <.text+0x13258>)
-   131f2:	e013      	b.n	1321c <scalbn+0xc0>
-   131f4:	4819      	ldr	r0, [pc, #100]	(1325c <.text+0x1325c>)
-   131f6:	491a      	ldr	r1, [pc, #104]	(13260 <.text+0x13260>)
-   131f8:	1c2a      	adds	r2, r5, #0
-   131fa:	1c33      	adds	r3, r6, #0
-   131fc:	f000 f836 	bl	1326c <copysign>
-   13200:	4a16      	ldr	r2, [pc, #88]	(1325c <.text+0x1325c>)
-   13202:	4b17      	ldr	r3, [pc, #92]	(13260 <.text+0x13260>)
-   13204:	e00a      	b.n	1321c <scalbn+0xc0>
-   13206:	4b11      	ldr	r3, [pc, #68]	(1324c <.text+0x1324c>)
-   13208:	4018      	ands	r0, r3
-   1320a:	1c3b      	adds	r3, r7, #0
-   1320c:	3336      	adds	r3, #54
-   1320e:	051b      	lsls	r3, r3, #20
-   13210:	1c01      	adds	r1, r0, #0
-   13212:	4319      	orrs	r1, r3
-   13214:	4a13      	ldr	r2, [pc, #76]	(13264 <.text+0x13264>)
-   13216:	4b14      	ldr	r3, [pc, #80]	(13268 <.text+0x13268>)
-   13218:	1c08      	adds	r0, r1, #0
-   1321a:	1c31      	adds	r1, r6, #0
-   1321c:	f001 fd3a 	bl	14c94 <____muldf3_from_thumb>
-   13220:	1c05      	adds	r5, r0, #0
-   13222:	1c0e      	adds	r6, r1, #0
-   13224:	1c28      	adds	r0, r5, #0
-   13226:	1c31      	adds	r1, r6, #0
-   13228:	b001      	add	sp, #4
-   1322a:	bcf0      	pop	{r4, r5, r6, r7}
-   1322c:	bc04      	pop	{r2}
-   1322e:	4710      	bx	r2
-   13230:	0000      	lsls	r0, r0, #0
-   13232:	7ff0      	ldrb	r0, [r6, #31]
-   13234:	ffff 7fff 	undefined
-   13238:	0000      	lsls	r0, r0, #0
-   1323a:	4350      	muls	r0, r2
-   1323c:	0000      	lsls	r0, r0, #0
-   1323e:	0000      	lsls	r0, r0, #0
-   13240:	3cb0      	subs	r4, #176
-   13242:	ffff 07ff 	vqshl.u64	q8, <illegal reg q15.5>, #63
-   13246:	0000      	lsls	r0, r0, #0
-   13248:	07fe      	lsls	r6, r7, #31
-   1324a:	0000      	lsls	r0, r0, #0
-   1324c:	ffff 800f 	vaddl.u<illegal width 64>	q12, d15, d15
-   13250:	c350      	stmia	r3!, {r4, r6}
-   13252:	0000      	lsls	r0, r0, #0
-   13254:	e43c      	b.n	12ad0 <.text+0x12ad0>
-   13256:	7e37      	ldrb	r7, [r6, #24]
-   13258:	759c      	strb	r4, [r3, #22]
-   1325a:	8800      	ldrh	r0, [r0, #0]
-   1325c:	6e1f      	ldr	r7, [r3, #96]
-   1325e:	01a5      	lsls	r5, r4, #6
-   13260:	f359 c2f8 	blx	f6c854 <__ctors_end__+0xf57324>
-   13264:	0000      	lsls	r0, r0, #0
-   13266:	3c90      	subs	r4, #144
-   13268:	0000      	lsls	r0, r0, #0
-	...
-
-0001326c <copysign>:
-   1326c:	b530      	push	{r4, r5, lr}
-   1326e:	4b07      	ldr	r3, [pc, #28]	(1328c <.text+0x1328c>)
-   13270:	1c04      	adds	r4, r0, #0
-   13272:	401c      	ands	r4, r3
-   13274:	2380      	movs	r3, #128
-   13276:	1c15      	adds	r5, r2, #0
-   13278:	061b      	lsls	r3, r3, #24
-   1327a:	402b      	ands	r3, r5
-   1327c:	1c0a      	adds	r2, r1, #0
-   1327e:	431c      	orrs	r4, r3
-   13280:	1c20      	adds	r0, r4, #0
-   13282:	1c11      	adds	r1, r2, #0
-   13284:	bc30      	pop	{r4, r5}
-   13286:	bc04      	pop	{r2}
-   13288:	4710      	bx	r2
-   1328a:	0000      	lsls	r0, r0, #0
-   1328c:	ffff 7fff 	undefined
-
-00013290 <__errno>:
-   13290:	4b01      	ldr	r3, [pc, #4]	(13298 <.text+0x13298>)
-   13292:	6818      	ldr	r0, [r3, #0]
-   13294:	4770      	bx	lr
-   13296:	0000      	lsls	r0, r0, #0
-   13298:	0020      	lsls	r0, r4, #0
-   1329a:	4000      	ands	r0, r0
-
-0001329c <__aeabi_uidiv>:
-   1329c:	2900      	cmp	r1, #0
-   1329e:	d034      	beq.n	1330a <__aeabi_uidiv+0x6e>
-   132a0:	2301      	movs	r3, #1
-   132a2:	2200      	movs	r2, #0
-   132a4:	b410      	push	{r4}
-   132a6:	4288      	cmp	r0, r1
-   132a8:	d32c      	bcc.n	13304 <__aeabi_uidiv+0x68>
-   132aa:	2401      	movs	r4, #1
-   132ac:	0724      	lsls	r4, r4, #28
-   132ae:	42a1      	cmp	r1, r4
-   132b0:	d204      	bcs.n	132bc <__aeabi_uidiv+0x20>
-   132b2:	4281      	cmp	r1, r0
-   132b4:	d202      	bcs.n	132bc <__aeabi_uidiv+0x20>
-   132b6:	0109      	lsls	r1, r1, #4
-   132b8:	011b      	lsls	r3, r3, #4
-   132ba:	e7f8      	b.n	132ae <__aeabi_uidiv+0x12>
-   132bc:	00e4      	lsls	r4, r4, #3
-   132be:	42a1      	cmp	r1, r4
-   132c0:	d204      	bcs.n	132cc <__aeabi_uidiv+0x30>
-   132c2:	4281      	cmp	r1, r0
-   132c4:	d202      	bcs.n	132cc <__aeabi_uidiv+0x30>
-   132c6:	0049      	lsls	r1, r1, #1
-   132c8:	005b      	lsls	r3, r3, #1
-   132ca:	e7f8      	b.n	132be <__aeabi_uidiv+0x22>
-   132cc:	4288      	cmp	r0, r1
-   132ce:	d301      	bcc.n	132d4 <__aeabi_uidiv+0x38>
-   132d0:	1a40      	subs	r0, r0, r1
-   132d2:	431a      	orrs	r2, r3
-   132d4:	084c      	lsrs	r4, r1, #1
-   132d6:	42a0      	cmp	r0, r4
-   132d8:	d302      	bcc.n	132e0 <__aeabi_uidiv+0x44>
-   132da:	1b00      	subs	r0, r0, r4
-   132dc:	085c      	lsrs	r4, r3, #1
-   132de:	4322      	orrs	r2, r4
-   132e0:	088c      	lsrs	r4, r1, #2
-   132e2:	42a0      	cmp	r0, r4
-   132e4:	d302      	bcc.n	132ec <__aeabi_uidiv+0x50>
-   132e6:	1b00      	subs	r0, r0, r4
-   132e8:	089c      	lsrs	r4, r3, #2
-   132ea:	4322      	orrs	r2, r4
-   132ec:	08cc      	lsrs	r4, r1, #3
-   132ee:	42a0      	cmp	r0, r4
-   132f0:	d302      	bcc.n	132f8 <__aeabi_uidiv+0x5c>
-   132f2:	1b00      	subs	r0, r0, r4
-   132f4:	08dc      	lsrs	r4, r3, #3
-   132f6:	4322      	orrs	r2, r4
-   132f8:	2800      	cmp	r0, #0
-   132fa:	d003      	beq.n	13304 <__aeabi_uidiv+0x68>
-   132fc:	091b      	lsrs	r3, r3, #4
-   132fe:	d001      	beq.n	13304 <__aeabi_uidiv+0x68>
-   13300:	0909      	lsrs	r1, r1, #4
-   13302:	e7e3      	b.n	132cc <__aeabi_uidiv+0x30>
-   13304:	1c10      	adds	r0, r2, #0
-   13306:	bc10      	pop	{r4}
-   13308:	4770      	bx	lr
-   1330a:	b502      	push	{r1, lr}
-   1330c:	f000 f92e 	bl	1356c <__aeabi_idiv0>
-   13310:	2000      	movs	r0, #0
-   13312:	bc06      	pop	{r1, r2}
-   13314:	4710      	bx	r2
-	...
-
-00013318 <__aeabi_uidivmod>:
-   13318:	b503      	push	{r0, r1, lr}
-   1331a:	f7ff ffbf 	bl	1329c <__aeabi_uidiv>
-   1331e:	bc0e      	pop	{r1, r2, r3}
-   13320:	4342      	muls	r2, r0
-   13322:	1a89      	subs	r1, r1, r2
-   13324:	4718      	bx	r3
-   13326:	46c0      	nop			(mov r8, r8)
-
-00013328 <__aeabi_idiv>:
-   13328:	2900      	cmp	r1, #0
-   1332a:	d041      	beq.n	133b0 <__aeabi_idiv+0x88>
-   1332c:	b410      	push	{r4}
-   1332e:	1c04      	adds	r4, r0, #0
-   13330:	404c      	eors	r4, r1
-   13332:	46a4      	mov	ip, r4
-   13334:	2301      	movs	r3, #1
-   13336:	2200      	movs	r2, #0
-   13338:	2900      	cmp	r1, #0
-   1333a:	d500      	bpl.n	1333e <__aeabi_idiv+0x16>
-   1333c:	4249      	negs	r1, r1
-   1333e:	2800      	cmp	r0, #0
-   13340:	d500      	bpl.n	13344 <__aeabi_idiv+0x1c>
-   13342:	4240      	negs	r0, r0
-   13344:	4288      	cmp	r0, r1
-   13346:	d32c      	bcc.n	133a2 <__aeabi_idiv+0x7a>
-   13348:	2401      	movs	r4, #1
-   1334a:	0724      	lsls	r4, r4, #28
-   1334c:	42a1      	cmp	r1, r4
-   1334e:	d204      	bcs.n	1335a <__aeabi_idiv+0x32>
-   13350:	4281      	cmp	r1, r0
-   13352:	d202      	bcs.n	1335a <__aeabi_idiv+0x32>
-   13354:	0109      	lsls	r1, r1, #4
-   13356:	011b      	lsls	r3, r3, #4
-   13358:	e7f8      	b.n	1334c <__aeabi_idiv+0x24>
-   1335a:	00e4      	lsls	r4, r4, #3
-   1335c:	42a1      	cmp	r1, r4
-   1335e:	d204      	bcs.n	1336a <__aeabi_idiv+0x42>
-   13360:	4281      	cmp	r1, r0
-   13362:	d202      	bcs.n	1336a <__aeabi_idiv+0x42>
-   13364:	0049      	lsls	r1, r1, #1
-   13366:	005b      	lsls	r3, r3, #1
-   13368:	e7f8      	b.n	1335c <__aeabi_idiv+0x34>
-   1336a:	4288      	cmp	r0, r1
-   1336c:	d301      	bcc.n	13372 <__aeabi_idiv+0x4a>
-   1336e:	1a40      	subs	r0, r0, r1
-   13370:	431a      	orrs	r2, r3
-   13372:	084c      	lsrs	r4, r1, #1
-   13374:	42a0      	cmp	r0, r4
-   13376:	d302      	bcc.n	1337e <__aeabi_idiv+0x56>
-   13378:	1b00      	subs	r0, r0, r4
-   1337a:	085c      	lsrs	r4, r3, #1
-   1337c:	4322      	orrs	r2, r4
-   1337e:	088c      	lsrs	r4, r1, #2
-   13380:	42a0      	cmp	r0, r4
-   13382:	d302      	bcc.n	1338a <__aeabi_idiv+0x62>
-   13384:	1b00      	subs	r0, r0, r4
-   13386:	089c      	lsrs	r4, r3, #2
-   13388:	4322      	orrs	r2, r4
-   1338a:	08cc      	lsrs	r4, r1, #3
-   1338c:	42a0      	cmp	r0, r4
-   1338e:	d302      	bcc.n	13396 <__aeabi_idiv+0x6e>
-   13390:	1b00      	subs	r0, r0, r4
-   13392:	08dc      	lsrs	r4, r3, #3
-   13394:	4322      	orrs	r2, r4
-   13396:	2800      	cmp	r0, #0
-   13398:	d003      	beq.n	133a2 <__aeabi_idiv+0x7a>
-   1339a:	091b      	lsrs	r3, r3, #4
-   1339c:	d001      	beq.n	133a2 <__aeabi_idiv+0x7a>
-   1339e:	0909      	lsrs	r1, r1, #4
-   133a0:	e7e3      	b.n	1336a <__aeabi_idiv+0x42>
-   133a2:	1c10      	adds	r0, r2, #0
-   133a4:	4664      	mov	r4, ip
-   133a6:	2c00      	cmp	r4, #0
-   133a8:	d500      	bpl.n	133ac <__aeabi_idiv+0x84>
-   133aa:	4240      	negs	r0, r0
-   133ac:	bc10      	pop	{r4}
-   133ae:	4770      	bx	lr
-   133b0:	b502      	push	{r1, lr}
-   133b2:	f000 f8db 	bl	1356c <__aeabi_idiv0>
-   133b6:	2000      	movs	r0, #0
-   133b8:	bc06      	pop	{r1, r2}
-   133ba:	4710      	bx	r2
-
-000133bc <__aeabi_idivmod>:
-   133bc:	b503      	push	{r0, r1, lr}
-   133be:	f7ff ffb3 	bl	13328 <__aeabi_idiv>
-   133c2:	bc0e      	pop	{r1, r2, r3}
-   133c4:	4342      	muls	r2, r0
-   133c6:	1a89      	subs	r1, r1, r2
-   133c8:	4718      	bx	r3
-   133ca:	46c0      	nop			(mov r8, r8)
-
-000133cc <__umodsi3>:
-   133cc:	2900      	cmp	r1, #0
-   133ce:	d05a      	beq.n	13486 <__umodsi3+0xba>
-   133d0:	2301      	movs	r3, #1
-   133d2:	4288      	cmp	r0, r1
-   133d4:	d200      	bcs.n	133d8 <__umodsi3+0xc>
-   133d6:	4770      	bx	lr
-   133d8:	b410      	push	{r4}
-   133da:	2401      	movs	r4, #1
-   133dc:	0724      	lsls	r4, r4, #28
-   133de:	42a1      	cmp	r1, r4
-   133e0:	d204      	bcs.n	133ec <__umodsi3+0x20>
-   133e2:	4281      	cmp	r1, r0
-   133e4:	d202      	bcs.n	133ec <__umodsi3+0x20>
-   133e6:	0109      	lsls	r1, r1, #4
-   133e8:	011b      	lsls	r3, r3, #4
-   133ea:	e7f8      	b.n	133de <__umodsi3+0x12>
-   133ec:	00e4      	lsls	r4, r4, #3
-   133ee:	42a1      	cmp	r1, r4
-   133f0:	d204      	bcs.n	133fc <__umodsi3+0x30>
-   133f2:	4281      	cmp	r1, r0
-   133f4:	d202      	bcs.n	133fc <__umodsi3+0x30>
-   133f6:	0049      	lsls	r1, r1, #1
-   133f8:	005b      	lsls	r3, r3, #1
-   133fa:	e7f8      	b.n	133ee <__umodsi3+0x22>
-   133fc:	2200      	movs	r2, #0
-   133fe:	4288      	cmp	r0, r1
-   13400:	d300      	bcc.n	13404 <__umodsi3+0x38>
-   13402:	1a40      	subs	r0, r0, r1
-   13404:	084c      	lsrs	r4, r1, #1
-   13406:	42a0      	cmp	r0, r4
-   13408:	d305      	bcc.n	13416 <__umodsi3+0x4a>
-   1340a:	1b00      	subs	r0, r0, r4
-   1340c:	469c      	mov	ip, r3
-   1340e:	2401      	movs	r4, #1
-   13410:	41e3      	rors	r3, r4
-   13412:	431a      	orrs	r2, r3
-   13414:	4663      	mov	r3, ip
-   13416:	088c      	lsrs	r4, r1, #2
-   13418:	42a0      	cmp	r0, r4
-   1341a:	d305      	bcc.n	13428 <__umodsi3+0x5c>
-   1341c:	1b00      	subs	r0, r0, r4
-   1341e:	469c      	mov	ip, r3
-   13420:	2402      	movs	r4, #2
-   13422:	41e3      	rors	r3, r4
-   13424:	431a      	orrs	r2, r3
-   13426:	4663      	mov	r3, ip
-   13428:	08cc      	lsrs	r4, r1, #3
-   1342a:	42a0      	cmp	r0, r4
-   1342c:	d305      	bcc.n	1343a <__umodsi3+0x6e>
-   1342e:	1b00      	subs	r0, r0, r4
-   13430:	469c      	mov	ip, r3
-   13432:	2403      	movs	r4, #3
-   13434:	41e3      	rors	r3, r4
-   13436:	431a      	orrs	r2, r3
-   13438:	4663      	mov	r3, ip
-   1343a:	469c      	mov	ip, r3
-   1343c:	2800      	cmp	r0, #0
-   1343e:	d003      	beq.n	13448 <__umodsi3+0x7c>
-   13440:	091b      	lsrs	r3, r3, #4
-   13442:	d001      	beq.n	13448 <__umodsi3+0x7c>
-   13444:	0909      	lsrs	r1, r1, #4
-   13446:	e7d9      	b.n	133fc <__umodsi3+0x30>
-   13448:	240e      	movs	r4, #14
-   1344a:	0724      	lsls	r4, r4, #28
-   1344c:	4022      	ands	r2, r4
-   1344e:	d018      	beq.n	13482 <__umodsi3+0xb6>
-   13450:	4663      	mov	r3, ip
-   13452:	2407      	movs	r4, #7
-   13454:	4223      	tst	r3, r4
-   13456:	d014      	beq.n	13482 <__umodsi3+0xb6>
-   13458:	4663      	mov	r3, ip
-   1345a:	2403      	movs	r4, #3
-   1345c:	41e3      	rors	r3, r4
-   1345e:	421a      	tst	r2, r3
-   13460:	d001      	beq.n	13466 <__umodsi3+0x9a>
-   13462:	08cc      	lsrs	r4, r1, #3
-   13464:	1900      	adds	r0, r0, r4
-   13466:	4663      	mov	r3, ip
-   13468:	2402      	movs	r4, #2
-   1346a:	41e3      	rors	r3, r4
-   1346c:	421a      	tst	r2, r3
-   1346e:	d001      	beq.n	13474 <__umodsi3+0xa8>
-   13470:	088c      	lsrs	r4, r1, #2
-   13472:	1900      	adds	r0, r0, r4
-   13474:	4663      	mov	r3, ip
-   13476:	2401      	movs	r4, #1
-   13478:	41e3      	rors	r3, r4
-   1347a:	421a      	tst	r2, r3
-   1347c:	d001      	beq.n	13482 <__umodsi3+0xb6>
-   1347e:	084c      	lsrs	r4, r1, #1
-   13480:	1900      	adds	r0, r0, r4
-   13482:	bc10      	pop	{r4}
-   13484:	4770      	bx	lr
-   13486:	b502      	push	{r1, lr}
-   13488:	f000 f870 	bl	1356c <__aeabi_idiv0>
-   1348c:	2000      	movs	r0, #0
-   1348e:	bc06      	pop	{r1, r2}
-   13490:	4710      	bx	r2
-   13492:	46c0      	nop			(mov r8, r8)
-
-00013494 <__modsi3>:
-   13494:	2301      	movs	r3, #1
-   13496:	2900      	cmp	r1, #0
-   13498:	d062      	beq.n	13560 <__modsi3+0xcc>
-   1349a:	d500      	bpl.n	1349e <__modsi3+0xa>
-   1349c:	4249      	negs	r1, r1
-   1349e:	b410      	push	{r4}
-   134a0:	b401      	push	{r0}
-   134a2:	2800      	cmp	r0, #0
-   134a4:	d500      	bpl.n	134a8 <__modsi3+0x14>
-   134a6:	4240      	negs	r0, r0
-   134a8:	4288      	cmp	r0, r1
-   134aa:	d353      	bcc.n	13554 <__modsi3+0xc0>
-   134ac:	2401      	movs	r4, #1
-   134ae:	0724      	lsls	r4, r4, #28
-   134b0:	42a1      	cmp	r1, r4
-   134b2:	d204      	bcs.n	134be <__modsi3+0x2a>
-   134b4:	4281      	cmp	r1, r0
-   134b6:	d202      	bcs.n	134be <__modsi3+0x2a>
-   134b8:	0109      	lsls	r1, r1, #4
-   134ba:	011b      	lsls	r3, r3, #4
-   134bc:	e7f8      	b.n	134b0 <__modsi3+0x1c>
-   134be:	00e4      	lsls	r4, r4, #3
-   134c0:	42a1      	cmp	r1, r4
-   134c2:	d204      	bcs.n	134ce <__modsi3+0x3a>
-   134c4:	4281      	cmp	r1, r0
-   134c6:	d202      	bcs.n	134ce <__modsi3+0x3a>
-   134c8:	0049      	lsls	r1, r1, #1
-   134ca:	005b      	lsls	r3, r3, #1
-   134cc:	e7f8      	b.n	134c0 <__modsi3+0x2c>
-   134ce:	2200      	movs	r2, #0
-   134d0:	4288      	cmp	r0, r1
-   134d2:	d300      	bcc.n	134d6 <__modsi3+0x42>
-   134d4:	1a40      	subs	r0, r0, r1
-   134d6:	084c      	lsrs	r4, r1, #1
-   134d8:	42a0      	cmp	r0, r4
-   134da:	d305      	bcc.n	134e8 <__modsi3+0x54>
-   134dc:	1b00      	subs	r0, r0, r4
-   134de:	469c      	mov	ip, r3
-   134e0:	2401      	movs	r4, #1
-   134e2:	41e3      	rors	r3, r4
-   134e4:	431a      	orrs	r2, r3
-   134e6:	4663      	mov	r3, ip
-   134e8:	088c      	lsrs	r4, r1, #2
-   134ea:	42a0      	cmp	r0, r4
-   134ec:	d305      	bcc.n	134fa <__modsi3+0x66>
-   134ee:	1b00      	subs	r0, r0, r4
-   134f0:	469c      	mov	ip, r3
-   134f2:	2402      	movs	r4, #2
-   134f4:	41e3      	rors	r3, r4
-   134f6:	431a      	orrs	r2, r3
-   134f8:	4663      	mov	r3, ip
-   134fa:	08cc      	lsrs	r4, r1, #3
-   134fc:	42a0      	cmp	r0, r4
-   134fe:	d305      	bcc.n	1350c <__modsi3+0x78>
-   13500:	1b00      	subs	r0, r0, r4
-   13502:	469c      	mov	ip, r3
-   13504:	2403      	movs	r4, #3
-   13506:	41e3      	rors	r3, r4
-   13508:	431a      	orrs	r2, r3
-   1350a:	4663      	mov	r3, ip
-   1350c:	469c      	mov	ip, r3
-   1350e:	2800      	cmp	r0, #0
-   13510:	d003      	beq.n	1351a <__modsi3+0x86>
-   13512:	091b      	lsrs	r3, r3, #4
-   13514:	d001      	beq.n	1351a <__modsi3+0x86>
-   13516:	0909      	lsrs	r1, r1, #4
-   13518:	e7d9      	b.n	134ce <__modsi3+0x3a>
-   1351a:	240e      	movs	r4, #14
-   1351c:	0724      	lsls	r4, r4, #28
-   1351e:	4022      	ands	r2, r4
-   13520:	d018      	beq.n	13554 <__modsi3+0xc0>
-   13522:	4663      	mov	r3, ip
-   13524:	2407      	movs	r4, #7
-   13526:	4223      	tst	r3, r4
-   13528:	d014      	beq.n	13554 <__modsi3+0xc0>
-   1352a:	4663      	mov	r3, ip
-   1352c:	2403      	movs	r4, #3
-   1352e:	41e3      	rors	r3, r4
-   13530:	421a      	tst	r2, r3
-   13532:	d001      	beq.n	13538 <__modsi3+0xa4>
-   13534:	08cc      	lsrs	r4, r1, #3
-   13536:	1900      	adds	r0, r0, r4
-   13538:	4663      	mov	r3, ip
-   1353a:	2402      	movs	r4, #2
-   1353c:	41e3      	rors	r3, r4
-   1353e:	421a      	tst	r2, r3
-   13540:	d001      	beq.n	13546 <__modsi3+0xb2>
-   13542:	088c      	lsrs	r4, r1, #2
-   13544:	1900      	adds	r0, r0, r4
-   13546:	4663      	mov	r3, ip
-   13548:	2401      	movs	r4, #1
-   1354a:	41e3      	rors	r3, r4
-   1354c:	421a      	tst	r2, r3
-   1354e:	d001      	beq.n	13554 <__modsi3+0xc0>
-   13550:	084c      	lsrs	r4, r1, #1
-   13552:	1900      	adds	r0, r0, r4
-   13554:	bc10      	pop	{r4}
-   13556:	2c00      	cmp	r4, #0
-   13558:	d500      	bpl.n	1355c <__modsi3+0xc8>
-   1355a:	4240      	negs	r0, r0
-   1355c:	bc10      	pop	{r4}
-   1355e:	4770      	bx	lr
-   13560:	b502      	push	{r1, lr}
-   13562:	f000 f803 	bl	1356c <__aeabi_idiv0>
-   13566:	2000      	movs	r0, #0
-   13568:	bc06      	pop	{r1, r2}
-   1356a:	4710      	bx	r2
-
-0001356c <__aeabi_idiv0>:
-   1356c:	4770      	bx	lr
-   1356e:	46c0      	nop			(mov r8, r8)
-
-00013570 <__aeabi_drsub>:
-   13570:	e2200102 	eor	r0, r0, #-2147483648	; 0x80000000
-   13574:	ea000000 	b	1357c <__adddf3>
-
-00013578 <__aeabi_dsub>:
-   13578:	e2222102 	eor	r2, r2, #-2147483648	; 0x80000000
-
-0001357c <__adddf3>:
-   1357c:	e92d4030 	stmdb	sp!, {r4, r5, lr}
-   13580:	e1a04080 	mov	r4, r0, lsl #1
-   13584:	e1a05082 	mov	r5, r2, lsl #1
-   13588:	e1340005 	teq	r4, r5
-   1358c:	01310003 	teqeq	r1, r3
-   13590:	1194c001 	orrnes	ip, r4, r1
-   13594:	1195c003 	orrnes	ip, r5, r3
-   13598:	11f0cac4 	mvnnes	ip, r4, asr #21
-   1359c:	11f0cac5 	mvnnes	ip, r5, asr #21
-   135a0:	0a00008c 	beq	137d8 <__adddf3+0x25c>
-   135a4:	e1a04aa4 	mov	r4, r4, lsr #21
-   135a8:	e0745aa5 	rsbs	r5, r4, r5, lsr #21
-   135ac:	b2655000 	rsblt	r5, r5, #0	; 0x0
-   135b0:	da000006 	ble	135d0 <__adddf3+0x54>
-   135b4:	e0844005 	add	r4, r4, r5
-   135b8:	e0213003 	eor	r3, r1, r3
-   135bc:	e0202002 	eor	r2, r0, r2
-   135c0:	e0231001 	eor	r1, r3, r1
-   135c4:	e0220000 	eor	r0, r2, r0
-   135c8:	e0213003 	eor	r3, r1, r3
-   135cc:	e0202002 	eor	r2, r0, r2
-   135d0:	e3550036 	cmp	r5, #54	; 0x36
-   135d4:	88bd4030 	ldmhiia	sp!, {r4, r5, lr}
-   135d8:	812fff1e 	bxhi	lr
-   135dc:	e3100102 	tst	r0, #-2147483648	; 0x80000000
-   135e0:	e1a00600 	mov	r0, r0, lsl #12
-   135e4:	e3a0c601 	mov	ip, #1048576	; 0x100000
-   135e8:	e18c0620 	orr	r0, ip, r0, lsr #12
-   135ec:	0a000001 	beq	135f8 <__adddf3+0x7c>
-   135f0:	e2711000 	rsbs	r1, r1, #0	; 0x0
-   135f4:	e2e00000 	rsc	r0, r0, #0	; 0x0
-   135f8:	e3120102 	tst	r2, #-2147483648	; 0x80000000
-   135fc:	e1a02602 	mov	r2, r2, lsl #12
-   13600:	e18c2622 	orr	r2, ip, r2, lsr #12
-   13604:	0a000001 	beq	13610 <__adddf3+0x94>
-   13608:	e2733000 	rsbs	r3, r3, #0	; 0x0
-   1360c:	e2e22000 	rsc	r2, r2, #0	; 0x0
-   13610:	e1340005 	teq	r4, r5
-   13614:	0a000069 	beq	137c0 <__adddf3+0x244>
-   13618:	e2444001 	sub	r4, r4, #1	; 0x1
-   1361c:	e275e020 	rsbs	lr, r5, #32	; 0x20
-   13620:	ba000005 	blt	1363c <__adddf3+0xc0>
-   13624:	e1a0ce13 	mov	ip, r3, lsl lr
-   13628:	e0911533 	adds	r1, r1, r3, lsr r5
-   1362c:	e2a00000 	adc	r0, r0, #0	; 0x0
-   13630:	e0911e12 	adds	r1, r1, r2, lsl lr
-   13634:	e0b00552 	adcs	r0, r0, r2, asr r5
-   13638:	ea000006 	b	13658 <__adddf3+0xdc>
-   1363c:	e2455020 	sub	r5, r5, #32	; 0x20
-   13640:	e28ee020 	add	lr, lr, #32	; 0x20
-   13644:	e3530001 	cmp	r3, #1	; 0x1
-   13648:	e1a0ce12 	mov	ip, r2, lsl lr
-   1364c:	238cc002 	orrcs	ip, ip, #2	; 0x2
-   13650:	e0911552 	adds	r1, r1, r2, asr r5
-   13654:	e0b00fc2 	adcs	r0, r0, r2, asr #31
-   13658:	e2005102 	and	r5, r0, #-2147483648	; 0x80000000
-   1365c:	5a000002 	bpl	1366c <__adddf3+0xf0>
-   13660:	e27cc000 	rsbs	ip, ip, #0	; 0x0
-   13664:	e2f11000 	rscs	r1, r1, #0	; 0x0
-   13668:	e2e00000 	rsc	r0, r0, #0	; 0x0
-   1366c:	e3500601 	cmp	r0, #1048576	; 0x100000
-   13670:	3a00000f 	bcc	136b4 <__adddf3+0x138>
-   13674:	e3500602 	cmp	r0, #2097152	; 0x200000
-   13678:	3a000006 	bcc	13698 <__adddf3+0x11c>
-   1367c:	e1b000a0 	movs	r0, r0, lsr #1
-   13680:	e1b01061 	movs	r1, r1, rrx
-   13684:	e1a0c06c 	mov	ip, ip, rrx
-   13688:	e2844001 	add	r4, r4, #1	; 0x1
-   1368c:	e1a02a84 	mov	r2, r4, lsl #21
-   13690:	e3720501 	cmn	r2, #4194304	; 0x400000
-   13694:	2a00006b 	bcs	13848 <__adddf3+0x2cc>
-   13698:	e35c0102 	cmp	ip, #-2147483648	; 0x80000000
-   1369c:	01b0c0a1 	moveqs	ip, r1, lsr #1
-   136a0:	e2b11000 	adcs	r1, r1, #0	; 0x0
-   136a4:	e0a00a04 	adc	r0, r0, r4, lsl #20
-   136a8:	e1800005 	orr	r0, r0, r5
-   136ac:	e8bd4030 	ldmia	sp!, {r4, r5, lr}
-   136b0:	e12fff1e 	bx	lr
-   136b4:	e1b0c08c 	movs	ip, ip, lsl #1
-   136b8:	e0b11001 	adcs	r1, r1, r1
-   136bc:	e0a00000 	adc	r0, r0, r0
-   136c0:	e3100601 	tst	r0, #1048576	; 0x100000
-   136c4:	e2444001 	sub	r4, r4, #1	; 0x1
-   136c8:	1afffff2 	bne	13698 <__adddf3+0x11c>
-   136cc:	e3300000 	teq	r0, #0	; 0x0
-   136d0:	13a03014 	movne	r3, #20	; 0x14
-   136d4:	03a03034 	moveq	r3, #52	; 0x34
-   136d8:	01a00001 	moveq	r0, r1
-   136dc:	03a01000 	moveq	r1, #0	; 0x0
-   136e0:	e1a02000 	mov	r2, r0
-   136e4:	e3520801 	cmp	r2, #65536	; 0x10000
-   136e8:	21a02822 	movcs	r2, r2, lsr #16
-   136ec:	22433010 	subcs	r3, r3, #16	; 0x10
-   136f0:	e3520c01 	cmp	r2, #256	; 0x100
-   136f4:	21a02422 	movcs	r2, r2, lsr #8
-   136f8:	22433008 	subcs	r3, r3, #8	; 0x8
-   136fc:	e3520010 	cmp	r2, #16	; 0x10
-   13700:	21a02222 	movcs	r2, r2, lsr #4
-   13704:	22433004 	subcs	r3, r3, #4	; 0x4
-   13708:	e3520004 	cmp	r2, #4	; 0x4
-   1370c:	22433002 	subcs	r3, r3, #2	; 0x2
-   13710:	304330a2 	subcc	r3, r3, r2, lsr #1
-   13714:	e04331a2 	sub	r3, r3, r2, lsr #3
-   13718:	e2532020 	subs	r2, r3, #32	; 0x20
-   1371c:	aa000007 	bge	13740 <__adddf3+0x1c4>
-   13720:	e292200c 	adds	r2, r2, #12	; 0xc
-   13724:	da000004 	ble	1373c <__adddf3+0x1c0>
-   13728:	e282c014 	add	ip, r2, #20	; 0x14
-   1372c:	e262200c 	rsb	r2, r2, #12	; 0xc
-   13730:	e1a01c10 	mov	r1, r0, lsl ip
-   13734:	e1a00230 	mov	r0, r0, lsr r2
-   13738:	ea000004 	b	13750 <__adddf3+0x1d4>
-   1373c:	e2822014 	add	r2, r2, #20	; 0x14
-   13740:	d262c020 	rsble	ip, r2, #32	; 0x20
-   13744:	e1a00210 	mov	r0, r0, lsl r2
-   13748:	d1800c31 	orrle	r0, r0, r1, lsr ip
-   1374c:	d1a01211 	movle	r1, r1, lsl r2
-   13750:	e0544003 	subs	r4, r4, r3
-   13754:	a0800a04 	addge	r0, r0, r4, lsl #20
-   13758:	a1800005 	orrge	r0, r0, r5
-   1375c:	a8bd4030 	ldmgeia	sp!, {r4, r5, lr}
-   13760:	a12fff1e 	bxge	lr
-   13764:	e1e04004 	mvn	r4, r4
-   13768:	e254401f 	subs	r4, r4, #31	; 0x1f
-   1376c:	aa00000f 	bge	137b0 <__adddf3+0x234>
-   13770:	e294400c 	adds	r4, r4, #12	; 0xc
-   13774:	ca000006 	bgt	13794 <__adddf3+0x218>
-   13778:	e2844014 	add	r4, r4, #20	; 0x14
-   1377c:	e2642020 	rsb	r2, r4, #32	; 0x20
-   13780:	e1a01431 	mov	r1, r1, lsr r4
-   13784:	e1811210 	orr	r1, r1, r0, lsl r2
-   13788:	e1850430 	orr	r0, r5, r0, lsr r4
-   1378c:	e8bd4030 	ldmia	sp!, {r4, r5, lr}
-   13790:	e12fff1e 	bx	lr
-   13794:	e264400c 	rsb	r4, r4, #12	; 0xc
-   13798:	e2642020 	rsb	r2, r4, #32	; 0x20
-   1379c:	e1a01231 	mov	r1, r1, lsr r2
-   137a0:	e1811410 	orr	r1, r1, r0, lsl r4
-   137a4:	e1a00005 	mov	r0, r5
-   137a8:	e8bd4030 	ldmia	sp!, {r4, r5, lr}
-   137ac:	e12fff1e 	bx	lr
-   137b0:	e1a01430 	mov	r1, r0, lsr r4
-   137b4:	e1a00005 	mov	r0, r5
-   137b8:	e8bd4030 	ldmia	sp!, {r4, r5, lr}
-   137bc:	e12fff1e 	bx	lr
-   137c0:	e3340000 	teq	r4, #0	; 0x0
-   137c4:	e2222601 	eor	r2, r2, #1048576	; 0x100000
-   137c8:	02200601 	eoreq	r0, r0, #1048576	; 0x100000
-   137cc:	02844001 	addeq	r4, r4, #1	; 0x1
-   137d0:	12455001 	subne	r5, r5, #1	; 0x1
-   137d4:	eaffff8f 	b	13618 <__adddf3+0x9c>
-   137d8:	e1f0cac4 	mvns	ip, r4, asr #21
-   137dc:	11f0cac5 	mvnnes	ip, r5, asr #21
-   137e0:	0a00001d 	beq	1385c <__adddf3+0x2e0>
-   137e4:	e1340005 	teq	r4, r5
-   137e8:	01310003 	teqeq	r1, r3
-   137ec:	0a000004 	beq	13804 <__adddf3+0x288>
-   137f0:	e3340000 	teq	r4, #0	; 0x0
-   137f4:	01a00002 	moveq	r0, r2
-   137f8:	01a01003 	moveq	r1, r3
-   137fc:	e8bd4030 	ldmia	sp!, {r4, r5, lr}
-   13800:	e12fff1e 	bx	lr
-   13804:	e1300002 	teq	r0, r2
-   13808:	13a00000 	movne	r0, #0	; 0x0
-   1380c:	13a01000 	movne	r1, #0	; 0x0
-   13810:	18bd4030 	ldmneia	sp!, {r4, r5, lr}
-   13814:	112fff1e 	bxne	lr
-   13818:	e1b0caa4 	movs	ip, r4, lsr #21
-   1381c:	1a000004 	bne	13834 <__adddf3+0x2b8>
-   13820:	e1b01081 	movs	r1, r1, lsl #1
-   13824:	e0b00000 	adcs	r0, r0, r0
-   13828:	23800102 	orrcs	r0, r0, #-2147483648	; 0x80000000
-   1382c:	e8bd4030 	ldmia	sp!, {r4, r5, lr}
-   13830:	e12fff1e 	bx	lr
-   13834:	e2944501 	adds	r4, r4, #4194304	; 0x400000
-   13838:	32800601 	addcc	r0, r0, #1048576	; 0x100000
-   1383c:	38bd4030 	ldmccia	sp!, {r4, r5, lr}
-   13840:	312fff1e 	bxcc	lr
-   13844:	e2005102 	and	r5, r0, #-2147483648	; 0x80000000
-   13848:	e385047f 	orr	r0, r5, #2130706432	; 0x7f000000
-   1384c:	e380060f 	orr	r0, r0, #15728640	; 0xf00000
-   13850:	e3a01000 	mov	r1, #0	; 0x0
-   13854:	e8bd4030 	ldmia	sp!, {r4, r5, lr}
-   13858:	e12fff1e 	bx	lr
-   1385c:	e1f0cac4 	mvns	ip, r4, asr #21
-   13860:	11a00002 	movne	r0, r2
-   13864:	11a01003 	movne	r1, r3
-   13868:	01f0cac5 	mvneqs	ip, r5, asr #21
-   1386c:	11a02000 	movne	r2, r0
-   13870:	11a03001 	movne	r3, r1
-   13874:	e1914600 	orrs	r4, r1, r0, lsl #12
-   13878:	01935602 	orreqs	r5, r3, r2, lsl #12
-   1387c:	01300002 	teqeq	r0, r2
-   13880:	13800702 	orrne	r0, r0, #524288	; 0x80000
-   13884:	e8bd4030 	ldmia	sp!, {r4, r5, lr}
-   13888:	e12fff1e 	bx	lr
-
-0001388c <__aeabi_ui2d>:
-   1388c:	e3300000 	teq	r0, #0	; 0x0
-   13890:	03a01000 	moveq	r1, #0	; 0x0
-   13894:	012fff1e 	bxeq	lr
-   13898:	e92d4030 	stmdb	sp!, {r4, r5, lr}
-   1389c:	e3a04b01 	mov	r4, #1024	; 0x400
-   138a0:	e2844032 	add	r4, r4, #50	; 0x32
-   138a4:	e3a05000 	mov	r5, #0	; 0x0
-   138a8:	e1a01000 	mov	r1, r0
-   138ac:	e3a00000 	mov	r0, #0	; 0x0
-   138b0:	eaffff85 	b	136cc <__adddf3+0x150>
-
-000138b4 <__aeabi_i2d>:
-   138b4:	e3300000 	teq	r0, #0	; 0x0
-   138b8:	03a01000 	moveq	r1, #0	; 0x0
-   138bc:	012fff1e 	bxeq	lr
-   138c0:	e92d4030 	stmdb	sp!, {r4, r5, lr}
-   138c4:	e3a04b01 	mov	r4, #1024	; 0x400
-   138c8:	e2844032 	add	r4, r4, #50	; 0x32
-   138cc:	e2105102 	ands	r5, r0, #-2147483648	; 0x80000000
-   138d0:	42600000 	rsbmi	r0, r0, #0	; 0x0
-   138d4:	e1a01000 	mov	r1, r0
-   138d8:	e3a00000 	mov	r0, #0	; 0x0
-   138dc:	eaffff7a 	b	136cc <__adddf3+0x150>
-
-000138e0 <__aeabi_f2d>:
-   138e0:	e1b02080 	movs	r2, r0, lsl #1
-   138e4:	e1a001c2 	mov	r0, r2, asr #3
-   138e8:	e1a00060 	mov	r0, r0, rrx
-   138ec:	e1a01e02 	mov	r1, r2, lsl #28
-   138f0:	121234ff 	andnes	r3, r2, #-16777216	; 0xff000000
-   138f4:	133304ff 	teqne	r3, #-16777216	; 0xff000000
-   138f8:	1220030e 	eorne	r0, r0, #939524096	; 0x38000000
-   138fc:	112fff1e 	bxne	lr
-   13900:	e3320000 	teq	r2, #0	; 0x0
-   13904:	133304ff 	teqne	r3, #-16777216	; 0xff000000
-   13908:	012fff1e 	bxeq	lr
-   1390c:	e92d4030 	stmdb	sp!, {r4, r5, lr}
-   13910:	e3a04d0e 	mov	r4, #896	; 0x380
-   13914:	e2005102 	and	r5, r0, #-2147483648	; 0x80000000
-   13918:	e3c00102 	bic	r0, r0, #-2147483648	; 0x80000000
-   1391c:	eaffff6a 	b	136cc <__adddf3+0x150>
-
-00013920 <__aeabi_ul2d>:
-   13920:	e1902001 	orrs	r2, r0, r1
-   13924:	012fff1e 	bxeq	lr
-   13928:	e92d4030 	stmdb	sp!, {r4, r5, lr}
-   1392c:	e3a05000 	mov	r5, #0	; 0x0
-   13930:	ea000006 	b	13950 <__aeabi_l2d+0x1c>
-
-00013934 <__aeabi_l2d>:
-   13934:	e1902001 	orrs	r2, r0, r1
-   13938:	012fff1e 	bxeq	lr
-   1393c:	e92d4030 	stmdb	sp!, {r4, r5, lr}
-   13940:	e2115102 	ands	r5, r1, #-2147483648	; 0x80000000
-   13944:	5a000001 	bpl	13950 <__aeabi_l2d+0x1c>
-   13948:	e2700000 	rsbs	r0, r0, #0	; 0x0
-   1394c:	e2e11000 	rsc	r1, r1, #0	; 0x0
-   13950:	e3a04b01 	mov	r4, #1024	; 0x400
-   13954:	e2844032 	add	r4, r4, #50	; 0x32
-   13958:	e1a0c000 	mov	ip, r0
-   1395c:	e1a00001 	mov	r0, r1
-   13960:	e1a0100c 	mov	r1, ip
-   13964:	e1b0cb20 	movs	ip, r0, lsr #22
-   13968:	0affff3f 	beq	1366c <__adddf3+0xf0>
-   1396c:	e3a02003 	mov	r2, #3	; 0x3
-   13970:	e1b0c1ac 	movs	ip, ip, lsr #3
-   13974:	12822003 	addne	r2, r2, #3	; 0x3
-   13978:	e1b0c1ac 	movs	ip, ip, lsr #3
-   1397c:	12822003 	addne	r2, r2, #3	; 0x3
-   13980:	e08221ac 	add	r2, r2, ip, lsr #3
-   13984:	e2623020 	rsb	r3, r2, #32	; 0x20
-   13988:	e1a0c311 	mov	ip, r1, lsl r3
-   1398c:	e1a01231 	mov	r1, r1, lsr r2
-   13990:	e1811310 	orr	r1, r1, r0, lsl r3
-   13994:	e1a00230 	mov	r0, r0, lsr r2
-   13998:	e0844002 	add	r4, r4, r2
-   1399c:	eaffff32 	b	1366c <__adddf3+0xf0>
-
-000139a0 <__aeabi_dmul>:
-   139a0:	e92d4070 	stmdb	sp!, {r4, r5, r6, lr}
-   139a4:	e3a0c0ff 	mov	ip, #255	; 0xff
-   139a8:	e38ccc07 	orr	ip, ip, #1792	; 0x700
-   139ac:	e01c4a20 	ands	r4, ip, r0, lsr #20
-   139b0:	101c5a22 	andnes	r5, ip, r2, lsr #20
-   139b4:	1134000c 	teqne	r4, ip
-   139b8:	1135000c 	teqne	r5, ip
-   139bc:	0b000075 	bleq	13b98 <__aeabi_dmul+0x1f8>
-   139c0:	e0844005 	add	r4, r4, r5
-   139c4:	e0206002 	eor	r6, r0, r2
-   139c8:	e1c00a8c 	bic	r0, r0, ip, lsl #21
-   139cc:	e1c22a8c 	bic	r2, r2, ip, lsl #21
-   139d0:	e1915600 	orrs	r5, r1, r0, lsl #12
-   139d4:	11935602 	orrnes	r5, r3, r2, lsl #12
-   139d8:	e3800601 	orr	r0, r0, #1048576	; 0x100000
-   139dc:	e3822601 	orr	r2, r2, #1048576	; 0x100000
-   139e0:	0a00001d 	beq	13a5c <__aeabi_dmul+0xbc>
-   139e4:	e08ec391 	umull	ip, lr, r1, r3
-   139e8:	e3a05000 	mov	r5, #0	; 0x0
-   139ec:	e0a5e390 	umlal	lr, r5, r0, r3
-   139f0:	e2063102 	and	r3, r6, #-2147483648	; 0x80000000
-   139f4:	e0a5e291 	umlal	lr, r5, r1, r2
-   139f8:	e3a06000 	mov	r6, #0	; 0x0
-   139fc:	e0a65290 	umlal	r5, r6, r0, r2
-   13a00:	e33c0000 	teq	ip, #0	; 0x0
-   13a04:	138ee001 	orrne	lr, lr, #1	; 0x1
-   13a08:	e24440ff 	sub	r4, r4, #255	; 0xff
-   13a0c:	e3560c02 	cmp	r6, #512	; 0x200
-   13a10:	e2c44c03 	sbc	r4, r4, #768	; 0x300
-   13a14:	2a000002 	bcs	13a24 <__aeabi_dmul+0x84>
-   13a18:	e1b0e08e 	movs	lr, lr, lsl #1
-   13a1c:	e0b55005 	adcs	r5, r5, r5
-   13a20:	e0a66006 	adc	r6, r6, r6
-   13a24:	e1830586 	orr	r0, r3, r6, lsl #11
-   13a28:	e1800aa5 	orr	r0, r0, r5, lsr #21
-   13a2c:	e1a01585 	mov	r1, r5, lsl #11
-   13a30:	e1811aae 	orr	r1, r1, lr, lsr #21
-   13a34:	e1a0e58e 	mov	lr, lr, lsl #11
-   13a38:	e254c0fd 	subs	ip, r4, #253	; 0xfd
-   13a3c:	835c0c07 	cmphi	ip, #1792	; 0x700
-   13a40:	8a000011 	bhi	13a8c <__aeabi_dmul+0xec>
-   13a44:	e35e0102 	cmp	lr, #-2147483648	; 0x80000000
-   13a48:	01b0e0a1 	moveqs	lr, r1, lsr #1
-   13a4c:	e2b11000 	adcs	r1, r1, #0	; 0x0
-   13a50:	e0a00a04 	adc	r0, r0, r4, lsl #20
-   13a54:	e8bd4070 	ldmia	sp!, {r4, r5, r6, lr}
-   13a58:	e12fff1e 	bx	lr
-   13a5c:	e2066102 	and	r6, r6, #-2147483648	; 0x80000000
-   13a60:	e1860000 	orr	r0, r6, r0
-   13a64:	e1811003 	orr	r1, r1, r3
-   13a68:	e0200002 	eor	r0, r0, r2
-   13a6c:	e05440ac 	subs	r4, r4, ip, lsr #1
-   13a70:	c074500c 	rsbgts	r5, r4, ip
-   13a74:	c1800a04 	orrgt	r0, r0, r4, lsl #20
-   13a78:	c8bd4070 	ldmgtia	sp!, {r4, r5, r6, lr}
-   13a7c:	c12fff1e 	bxgt	lr
-   13a80:	e3800601 	orr	r0, r0, #1048576	; 0x100000
-   13a84:	e3a0e000 	mov	lr, #0	; 0x0
-   13a88:	e2544001 	subs	r4, r4, #1	; 0x1
-   13a8c:	ca00005d 	bgt	13c08 <__aeabi_dmul+0x268>
-   13a90:	e3740036 	cmn	r4, #54	; 0x36
-   13a94:	d3a01000 	movle	r1, #0	; 0x0
-   13a98:	d2000102 	andle	r0, r0, #-2147483648	; 0x80000000
-   13a9c:	d8bd4070 	ldmleia	sp!, {r4, r5, r6, lr}
-   13aa0:	d12fff1e 	bxle	lr
-   13aa4:	e2644000 	rsb	r4, r4, #0	; 0x0
-   13aa8:	e2544020 	subs	r4, r4, #32	; 0x20
-   13aac:	aa00001a 	bge	13b1c <__aeabi_dmul+0x17c>
-   13ab0:	e294400c 	adds	r4, r4, #12	; 0xc
-   13ab4:	ca00000c 	bgt	13aec <__aeabi_dmul+0x14c>
-   13ab8:	e2844014 	add	r4, r4, #20	; 0x14
-   13abc:	e2645020 	rsb	r5, r4, #32	; 0x20
-   13ac0:	e1a03511 	mov	r3, r1, lsl r5
-   13ac4:	e1a01431 	mov	r1, r1, lsr r4
-   13ac8:	e1811510 	orr	r1, r1, r0, lsl r5
-   13acc:	e2002102 	and	r2, r0, #-2147483648	; 0x80000000
-   13ad0:	e3c00102 	bic	r0, r0, #-2147483648	; 0x80000000
-   13ad4:	e0911fa3 	adds	r1, r1, r3, lsr #31
-   13ad8:	e0a20430 	adc	r0, r2, r0, lsr r4
-   13adc:	e19ee083 	orrs	lr, lr, r3, lsl #1
-   13ae0:	01c11fa3 	biceq	r1, r1, r3, lsr #31
-   13ae4:	e8bd4070 	ldmia	sp!, {r4, r5, r6, lr}
-   13ae8:	e12fff1e 	bx	lr
-   13aec:	e264400c 	rsb	r4, r4, #12	; 0xc
-   13af0:	e2645020 	rsb	r5, r4, #32	; 0x20
-   13af4:	e1a03411 	mov	r3, r1, lsl r4
-   13af8:	e1a01531 	mov	r1, r1, lsr r5
-   13afc:	e1811410 	orr	r1, r1, r0, lsl r4
-   13b00:	e2000102 	and	r0, r0, #-2147483648	; 0x80000000
-   13b04:	e0911fa3 	adds	r1, r1, r3, lsr #31
-   13b08:	e2a00000 	adc	r0, r0, #0	; 0x0
-   13b0c:	e19ee083 	orrs	lr, lr, r3, lsl #1
-   13b10:	01c11fa3 	biceq	r1, r1, r3, lsr #31
-   13b14:	e8bd4070 	ldmia	sp!, {r4, r5, r6, lr}
-   13b18:	e12fff1e 	bx	lr
-   13b1c:	e2645020 	rsb	r5, r4, #32	; 0x20
-   13b20:	e18ee511 	orr	lr, lr, r1, lsl r5
-   13b24:	e1a03431 	mov	r3, r1, lsr r4
-   13b28:	e1833510 	orr	r3, r3, r0, lsl r5
-   13b2c:	e1a01430 	mov	r1, r0, lsr r4
-   13b30:	e2000102 	and	r0, r0, #-2147483648	; 0x80000000
-   13b34:	e1c11430 	bic	r1, r1, r0, lsr r4
-   13b38:	e0811fa3 	add	r1, r1, r3, lsr #31
-   13b3c:	e19ee083 	orrs	lr, lr, r3, lsl #1
-   13b40:	01c11fa3 	biceq	r1, r1, r3, lsr #31
-   13b44:	e8bd4070 	ldmia	sp!, {r4, r5, r6, lr}
-   13b48:	e12fff1e 	bx	lr
-   13b4c:	e3340000 	teq	r4, #0	; 0x0
-   13b50:	1a000008 	bne	13b78 <__aeabi_dmul+0x1d8>
-   13b54:	e2006102 	and	r6, r0, #-2147483648	; 0x80000000
-   13b58:	e1b01081 	movs	r1, r1, lsl #1
-   13b5c:	e0a00000 	adc	r0, r0, r0
-   13b60:	e3100601 	tst	r0, #1048576	; 0x100000
-   13b64:	02444001 	subeq	r4, r4, #1	; 0x1
-   13b68:	0afffffa 	beq	13b58 <__aeabi_dmul+0x1b8>
-   13b6c:	e1800006 	orr	r0, r0, r6
-   13b70:	e3350000 	teq	r5, #0	; 0x0
-   13b74:	11a0f00e 	movne	pc, lr
-   13b78:	e2026102 	and	r6, r2, #-2147483648	; 0x80000000
-   13b7c:	e1b03083 	movs	r3, r3, lsl #1
-   13b80:	e0a22002 	adc	r2, r2, r2
-   13b84:	e3120601 	tst	r2, #1048576	; 0x100000
-   13b88:	02455001 	subeq	r5, r5, #1	; 0x1
-   13b8c:	0afffffa 	beq	13b7c <__aeabi_dmul+0x1dc>
-   13b90:	e1822006 	orr	r2, r2, r6
-   13b94:	e1a0f00e 	mov	pc, lr
-   13b98:	e134000c 	teq	r4, ip
-   13b9c:	e00c5a22 	and	r5, ip, r2, lsr #20
-   13ba0:	1135000c 	teqne	r5, ip
-   13ba4:	0a000007 	beq	13bc8 <__aeabi_dmul+0x228>
-   13ba8:	e1916080 	orrs	r6, r1, r0, lsl #1
-   13bac:	11936082 	orrnes	r6, r3, r2, lsl #1
-   13bb0:	1affffe5 	bne	13b4c <__aeabi_dmul+0x1ac>
-   13bb4:	e0200002 	eor	r0, r0, r2
-   13bb8:	e2000102 	and	r0, r0, #-2147483648	; 0x80000000
-   13bbc:	e3a01000 	mov	r1, #0	; 0x0
-   13bc0:	e8bd4070 	ldmia	sp!, {r4, r5, r6, lr}
-   13bc4:	e12fff1e 	bx	lr
-   13bc8:	e1916080 	orrs	r6, r1, r0, lsl #1
-   13bcc:	01a01003 	moveq	r1, r3
-   13bd0:	01a00002 	moveq	r0, r2
-   13bd4:	11936082 	orrnes	r6, r3, r2, lsl #1
-   13bd8:	0a000010 	beq	13c20 <__aeabi_dmul+0x280>
-   13bdc:	e134000c 	teq	r4, ip
-   13be0:	1a000001 	bne	13bec <__aeabi_dmul+0x24c>
-   13be4:	e1916600 	orrs	r6, r1, r0, lsl #12
-   13be8:	1a00000c 	bne	13c20 <__aeabi_dmul+0x280>
-   13bec:	e135000c 	teq	r5, ip
-   13bf0:	1a000003 	bne	13c04 <__aeabi_dmul+0x264>
-   13bf4:	e1936602 	orrs	r6, r3, r2, lsl #12
-   13bf8:	11a01003 	movne	r1, r3
-   13bfc:	11a00002 	movne	r0, r2
-   13c00:	1a000006 	bne	13c20 <__aeabi_dmul+0x280>
-   13c04:	e0200002 	eor	r0, r0, r2
-   13c08:	e2000102 	and	r0, r0, #-2147483648	; 0x80000000
-   13c0c:	e380047f 	orr	r0, r0, #2130706432	; 0x7f000000
-   13c10:	e380060f 	orr	r0, r0, #15728640	; 0xf00000
-   13c14:	e3a01000 	mov	r1, #0	; 0x0
-   13c18:	e8bd4070 	ldmia	sp!, {r4, r5, r6, lr}
-   13c1c:	e12fff1e 	bx	lr
-   13c20:	e380047f 	orr	r0, r0, #2130706432	; 0x7f000000
-   13c24:	e380073e 	orr	r0, r0, #16252928	; 0xf80000
-   13c28:	e8bd4070 	ldmia	sp!, {r4, r5, r6, lr}
-   13c2c:	e12fff1e 	bx	lr
-
-00013c30 <__aeabi_ddiv>:
-   13c30:	e92d4070 	stmdb	sp!, {r4, r5, r6, lr}
-   13c34:	e3a0c0ff 	mov	ip, #255	; 0xff
-   13c38:	e38ccc07 	orr	ip, ip, #1792	; 0x700
-   13c3c:	e01c4a20 	ands	r4, ip, r0, lsr #20
-   13c40:	101c5a22 	andnes	r5, ip, r2, lsr #20
-   13c44:	1134000c 	teqne	r4, ip
-   13c48:	1135000c 	teqne	r5, ip
-   13c4c:	0b00005e 	bleq	13dcc <__aeabi_ddiv+0x19c>
-   13c50:	e0444005 	sub	r4, r4, r5
-   13c54:	e020e002 	eor	lr, r0, r2
-   13c58:	e1935602 	orrs	r5, r3, r2, lsl #12
-   13c5c:	e1a00600 	mov	r0, r0, lsl #12
-   13c60:	0a00004c 	beq	13d98 <__aeabi_ddiv+0x168>
-   13c64:	e1a02602 	mov	r2, r2, lsl #12
-   13c68:	e3a05201 	mov	r5, #268435456	; 0x10000000
-   13c6c:	e1852222 	orr	r2, r5, r2, lsr #4
-   13c70:	e1822c23 	orr	r2, r2, r3, lsr #24
-   13c74:	e1a03403 	mov	r3, r3, lsl #8
-   13c78:	e1855220 	orr	r5, r5, r0, lsr #4
-   13c7c:	e1855c21 	orr	r5, r5, r1, lsr #24
-   13c80:	e1a06401 	mov	r6, r1, lsl #8
-   13c84:	e20e0102 	and	r0, lr, #-2147483648	; 0x80000000
-   13c88:	e1550002 	cmp	r5, r2
-   13c8c:	01560003 	cmpeq	r6, r3
-   13c90:	e2a440fd 	adc	r4, r4, #253	; 0xfd
-   13c94:	e2844c03 	add	r4, r4, #768	; 0x300
-   13c98:	2a000001 	bcs	13ca4 <__aeabi_ddiv+0x74>
-   13c9c:	e1b020a2 	movs	r2, r2, lsr #1
-   13ca0:	e1a03063 	mov	r3, r3, rrx
-   13ca4:	e0566003 	subs	r6, r6, r3
-   13ca8:	e0c55002 	sbc	r5, r5, r2
-   13cac:	e1b020a2 	movs	r2, r2, lsr #1
-   13cb0:	e1a03063 	mov	r3, r3, rrx
-   13cb4:	e3a01601 	mov	r1, #1048576	; 0x100000
-   13cb8:	e3a0c702 	mov	ip, #524288	; 0x80000
-   13cbc:	e056e003 	subs	lr, r6, r3
-   13cc0:	e0d5e002 	sbcs	lr, r5, r2
-   13cc4:	20466003 	subcs	r6, r6, r3
-   13cc8:	21a0500e 	movcs	r5, lr
-   13ccc:	2181100c 	orrcs	r1, r1, ip
-   13cd0:	e1b020a2 	movs	r2, r2, lsr #1
-   13cd4:	e1a03063 	mov	r3, r3, rrx
-   13cd8:	e056e003 	subs	lr, r6, r3
-   13cdc:	e0d5e002 	sbcs	lr, r5, r2
-   13ce0:	20466003 	subcs	r6, r6, r3
-   13ce4:	21a0500e 	movcs	r5, lr
-   13ce8:	218110ac 	orrcs	r1, r1, ip, lsr #1
-   13cec:	e1b020a2 	movs	r2, r2, lsr #1
-   13cf0:	e1a03063 	mov	r3, r3, rrx
-   13cf4:	e056e003 	subs	lr, r6, r3
-   13cf8:	e0d5e002 	sbcs	lr, r5, r2
-   13cfc:	20466003 	subcs	r6, r6, r3
-   13d00:	21a0500e 	movcs	r5, lr
-   13d04:	2181112c 	orrcs	r1, r1, ip, lsr #2
-   13d08:	e1b020a2 	movs	r2, r2, lsr #1
-   13d0c:	e1a03063 	mov	r3, r3, rrx
-   13d10:	e056e003 	subs	lr, r6, r3
-   13d14:	e0d5e002 	sbcs	lr, r5, r2
-   13d18:	20466003 	subcs	r6, r6, r3
-   13d1c:	21a0500e 	movcs	r5, lr
-   13d20:	218111ac 	orrcs	r1, r1, ip, lsr #3
-   13d24:	e195e006 	orrs	lr, r5, r6
-   13d28:	0a00000d 	beq	13d64 <__aeabi_ddiv+0x134>
-   13d2c:	e1a05205 	mov	r5, r5, lsl #4
-   13d30:	e1855e26 	orr	r5, r5, r6, lsr #28
-   13d34:	e1a06206 	mov	r6, r6, lsl #4
-   13d38:	e1a02182 	mov	r2, r2, lsl #3
-   13d3c:	e1822ea3 	orr	r2, r2, r3, lsr #29
-   13d40:	e1a03183 	mov	r3, r3, lsl #3
-   13d44:	e1b0c22c 	movs	ip, ip, lsr #4
-   13d48:	1affffdb 	bne	13cbc <__aeabi_ddiv+0x8c>
-   13d4c:	e3100601 	tst	r0, #1048576	; 0x100000
-   13d50:	1a000006 	bne	13d70 <__aeabi_ddiv+0x140>
-   13d54:	e1800001 	orr	r0, r0, r1
-   13d58:	e3a01000 	mov	r1, #0	; 0x0
-   13d5c:	e3a0c102 	mov	ip, #-2147483648	; 0x80000000
-   13d60:	eaffffd5 	b	13cbc <__aeabi_ddiv+0x8c>
-   13d64:	e3100601 	tst	r0, #1048576	; 0x100000
-   13d68:	01800001 	orreq	r0, r0, r1
-   13d6c:	03a01000 	moveq	r1, #0	; 0x0
-   13d70:	e254c0fd 	subs	ip, r4, #253	; 0xfd
-   13d74:	835c0c07 	cmphi	ip, #1792	; 0x700
-   13d78:	8affff43 	bhi	13a8c <__aeabi_dmul+0xec>
-   13d7c:	e055c002 	subs	ip, r5, r2
-   13d80:	0056c003 	subeqs	ip, r6, r3
-   13d84:	01b0c0a1 	moveqs	ip, r1, lsr #1
-   13d88:	e2b11000 	adcs	r1, r1, #0	; 0x0
-   13d8c:	e0a00a04 	adc	r0, r0, r4, lsl #20
-   13d90:	e8bd4070 	ldmia	sp!, {r4, r5, r6, lr}
-   13d94:	e12fff1e 	bx	lr
-   13d98:	e20ee102 	and	lr, lr, #-2147483648	; 0x80000000
-   13d9c:	e18e0620 	orr	r0, lr, r0, lsr #12
-   13da0:	e09440ac 	adds	r4, r4, ip, lsr #1
-   13da4:	c074500c 	rsbgts	r5, r4, ip
-   13da8:	c1800a04 	orrgt	r0, r0, r4, lsl #20
-   13dac:	c8bd4070 	ldmgtia	sp!, {r4, r5, r6, lr}
-   13db0:	c12fff1e 	bxgt	lr
-   13db4:	e3800601 	orr	r0, r0, #1048576	; 0x100000
-   13db8:	e3a0e000 	mov	lr, #0	; 0x0
-   13dbc:	e2544001 	subs	r4, r4, #1	; 0x1
-   13dc0:	eaffff31 	b	13a8c <__aeabi_dmul+0xec>
-   13dc4:	e185e006 	orr	lr, r5, r6
-   13dc8:	eaffff2f 	b	13a8c <__aeabi_dmul+0xec>
-   13dcc:	e00c5a22 	and	r5, ip, r2, lsr #20
-   13dd0:	e134000c 	teq	r4, ip
-   13dd4:	0135000c 	teqeq	r5, ip
-   13dd8:	0affff90 	beq	13c20 <__aeabi_dmul+0x280>
-   13ddc:	e134000c 	teq	r4, ip
-   13de0:	1a000006 	bne	13e00 <__aeabi_ddiv+0x1d0>
-   13de4:	e1914600 	orrs	r4, r1, r0, lsl #12
-   13de8:	1affff8c 	bne	13c20 <__aeabi_dmul+0x280>
-   13dec:	e135000c 	teq	r5, ip
-   13df0:	1affff83 	bne	13c04 <__aeabi_dmul+0x264>
-   13df4:	e1a01003 	mov	r1, r3
-   13df8:	e1a00002 	mov	r0, r2
-   13dfc:	eaffff87 	b	13c20 <__aeabi_dmul+0x280>
-   13e00:	e135000c 	teq	r5, ip
-   13e04:	1a000004 	bne	13e1c <__aeabi_ddiv+0x1ec>
-   13e08:	e1935602 	orrs	r5, r3, r2, lsl #12
-   13e0c:	0affff68 	beq	13bb4 <__aeabi_dmul+0x214>
-   13e10:	e1a01003 	mov	r1, r3
-   13e14:	e1a00002 	mov	r0, r2
-   13e18:	eaffff80 	b	13c20 <__aeabi_dmul+0x280>
-   13e1c:	e1916080 	orrs	r6, r1, r0, lsl #1
-   13e20:	11936082 	orrnes	r6, r3, r2, lsl #1
-   13e24:	1affff48 	bne	13b4c <__aeabi_dmul+0x1ac>
-   13e28:	e1914080 	orrs	r4, r1, r0, lsl #1
-   13e2c:	1affff74 	bne	13c04 <__aeabi_dmul+0x264>
-   13e30:	e1935082 	orrs	r5, r3, r2, lsl #1
-   13e34:	1affff5e 	bne	13bb4 <__aeabi_dmul+0x214>
-   13e38:	eaffff78 	b	13c20 <__aeabi_dmul+0x280>
-
-00013e3c <__gedf2>:
-   13e3c:	e3e0c000 	mvn	ip, #0	; 0x0
-   13e40:	ea000002 	b	13e50 <__cmpdf2+0x4>
-
-00013e44 <__ledf2>:
-   13e44:	e3a0c001 	mov	ip, #1	; 0x1
-   13e48:	ea000000 	b	13e50 <__cmpdf2+0x4>
-
-00013e4c <__cmpdf2>:
-   13e4c:	e3a0c001 	mov	ip, #1	; 0x1
-   13e50:	e50dc004 	str	ip, [sp, #-4]
-   13e54:	e1a0c080 	mov	ip, r0, lsl #1
-   13e58:	e1f0cacc 	mvns	ip, ip, asr #21
-   13e5c:	e1a0c082 	mov	ip, r2, lsl #1
-   13e60:	11f0cacc 	mvnnes	ip, ip, asr #21
-   13e64:	0a00000d 	beq	13ea0 <__cmpdf2+0x54>
-   13e68:	e191c080 	orrs	ip, r1, r0, lsl #1
-   13e6c:	0193c082 	orreqs	ip, r3, r2, lsl #1
-   13e70:	11300002 	teqne	r0, r2
-   13e74:	01310003 	teqeq	r1, r3
-   13e78:	03a00000 	moveq	r0, #0	; 0x0
-   13e7c:	012fff1e 	bxeq	lr
-   13e80:	e3700000 	cmn	r0, #0	; 0x0
-   13e84:	e1300002 	teq	r0, r2
-   13e88:	51500002 	cmppl	r0, r2
-   13e8c:	01510003 	cmpeq	r1, r3
-   13e90:	21a00fc2 	movcs	r0, r2, asr #31
-   13e94:	31e00fc2 	mvncc	r0, r2, asr #31
-   13e98:	e3800001 	orr	r0, r0, #1	; 0x1
-   13e9c:	e12fff1e 	bx	lr
-   13ea0:	e1a0c080 	mov	ip, r0, lsl #1
-   13ea4:	e1f0cacc 	mvns	ip, ip, asr #21
-   13ea8:	1a000001 	bne	13eb4 <__cmpdf2+0x68>
-   13eac:	e191c600 	orrs	ip, r1, r0, lsl #12
-   13eb0:	1a000004 	bne	13ec8 <__cmpdf2+0x7c>
-   13eb4:	e1a0c082 	mov	ip, r2, lsl #1
-   13eb8:	e1f0cacc 	mvns	ip, ip, asr #21
-   13ebc:	1affffe9 	bne	13e68 <__cmpdf2+0x1c>
-   13ec0:	e193c602 	orrs	ip, r3, r2, lsl #12
-   13ec4:	0affffe7 	beq	13e68 <__cmpdf2+0x1c>
-   13ec8:	e51d0004 	ldr	r0, [sp, #-4]
-   13ecc:	e12fff1e 	bx	lr
-
-00013ed0 <__aeabi_cdrcmple>:
-   13ed0:	e1a0c000 	mov	ip, r0
-   13ed4:	e1a00002 	mov	r0, r2
-   13ed8:	e1a0200c 	mov	r2, ip
-   13edc:	e1a0c001 	mov	ip, r1
-   13ee0:	e1a01003 	mov	r1, r3
-   13ee4:	e1a0300c 	mov	r3, ip
-   13ee8:	eaffffff 	b	13eec <__aeabi_cdcmpeq>
-
-00013eec <__aeabi_cdcmpeq>:
-   13eec:	e92d4001 	stmdb	sp!, {r0, lr}
-   13ef0:	ebffffd5 	bl	13e4c <__cmpdf2>
-   13ef4:	e3500000 	cmp	r0, #0	; 0x0
-   13ef8:	43700000 	cmnmi	r0, #0	; 0x0
-   13efc:	e8bd4001 	ldmia	sp!, {r0, lr}
-   13f00:	e12fff1e 	bx	lr
-
-00013f04 <__aeabi_dcmpeq>:
-   13f04:	e52de008 	str	lr, [sp, #-8]!
-   13f08:	ebfffff7 	bl	13eec <__aeabi_cdcmpeq>
-   13f0c:	03a00001 	moveq	r0, #1	; 0x1
-   13f10:	13a00000 	movne	r0, #0	; 0x0
-   13f14:	e49de008 	ldr	lr, [sp], #8
-   13f18:	e12fff1e 	bx	lr
-
-00013f1c <__aeabi_dcmplt>:
-   13f1c:	e52de008 	str	lr, [sp, #-8]!
-   13f20:	ebfffff1 	bl	13eec <__aeabi_cdcmpeq>
-   13f24:	33a00001 	movcc	r0, #1	; 0x1
-   13f28:	23a00000 	movcs	r0, #0	; 0x0
-   13f2c:	e49de008 	ldr	lr, [sp], #8
-   13f30:	e12fff1e 	bx	lr
-
-00013f34 <__aeabi_dcmple>:
-   13f34:	e52de008 	str	lr, [sp, #-8]!
-   13f38:	ebffffeb 	bl	13eec <__aeabi_cdcmpeq>
-   13f3c:	93a00001 	movls	r0, #1	; 0x1
-   13f40:	83a00000 	movhi	r0, #0	; 0x0
-   13f44:	e49de008 	ldr	lr, [sp], #8
-   13f48:	e12fff1e 	bx	lr
-
-00013f4c <__aeabi_dcmpge>:
-   13f4c:	e52de008 	str	lr, [sp, #-8]!
-   13f50:	ebffffde 	bl	13ed0 <__aeabi_cdrcmple>
-   13f54:	93a00001 	movls	r0, #1	; 0x1
-   13f58:	83a00000 	movhi	r0, #0	; 0x0
-   13f5c:	e49de008 	ldr	lr, [sp], #8
-   13f60:	e12fff1e 	bx	lr
-
-00013f64 <__aeabi_dcmpgt>:
-   13f64:	e52de008 	str	lr, [sp, #-8]!
-   13f68:	ebffffd8 	bl	13ed0 <__aeabi_cdrcmple>
-   13f6c:	33a00001 	movcc	r0, #1	; 0x1
-   13f70:	23a00000 	movcs	r0, #0	; 0x0
-   13f74:	e49de008 	ldr	lr, [sp], #8
-   13f78:	e12fff1e 	bx	lr
-
-00013f7c <__aeabi_d2iz>:
-   13f7c:	e1a02080 	mov	r2, r0, lsl #1
-   13f80:	e2922602 	adds	r2, r2, #2097152	; 0x200000
-   13f84:	2a00000c 	bcs	13fbc <__aeabi_d2iz+0x40>
-   13f88:	5a000009 	bpl	13fb4 <__aeabi_d2iz+0x38>
-   13f8c:	e3e03e3e 	mvn	r3, #992	; 0x3e0
-   13f90:	e0532ac2 	subs	r2, r3, r2, asr #21
-   13f94:	9a00000a 	bls	13fc4 <__aeabi_d2iz+0x48>
-   13f98:	e1a03580 	mov	r3, r0, lsl #11
-   13f9c:	e3833102 	orr	r3, r3, #-2147483648	; 0x80000000
-   13fa0:	e1833aa1 	orr	r3, r3, r1, lsr #21
-   13fa4:	e3100102 	tst	r0, #-2147483648	; 0x80000000
-   13fa8:	e1a00233 	mov	r0, r3, lsr r2
-   13fac:	12600000 	rsbne	r0, r0, #0	; 0x0
-   13fb0:	e12fff1e 	bx	lr
-   13fb4:	e3a00000 	mov	r0, #0	; 0x0
-   13fb8:	e12fff1e 	bx	lr
-   13fbc:	e1911600 	orrs	r1, r1, r0, lsl #12
-   13fc0:	1a000002 	bne	13fd0 <__aeabi_d2iz+0x54>
-   13fc4:	e2100102 	ands	r0, r0, #-2147483648	; 0x80000000
-   13fc8:	03e00102 	mvneq	r0, #-2147483648	; 0x80000000
-   13fcc:	e12fff1e 	bx	lr
-   13fd0:	e3a00000 	mov	r0, #0	; 0x0
-   13fd4:	e12fff1e 	bx	lr
-
-00013fd8 <__aeabi_d2f>:
-   13fd8:	e1a02080 	mov	r2, r0, lsl #1
-   13fdc:	e2523207 	subs	r3, r2, #1879048192	; 0x70000000
-   13fe0:	2253c602 	subcss	ip, r3, #2097152	; 0x200000
-   13fe4:	227cc57f 	rsbcss	ip, ip, #532676608	; 0x1fc00000
-   13fe8:	9a000006 	bls	14008 <__aeabi_d2f+0x30>
-   13fec:	e200c102 	and	ip, r0, #-2147483648	; 0x80000000
-   13ff0:	e1a02181 	mov	r2, r1, lsl #3
-   13ff4:	e18c1ea1 	orr	r1, ip, r1, lsr #29
-   13ff8:	e3520102 	cmp	r2, #-2147483648	; 0x80000000
-   13ffc:	e0a10103 	adc	r0, r1, r3, lsl #2
-   14000:	03c00001 	biceq	r0, r0, #1	; 0x1
-   14004:	e12fff1e 	bx	lr
-   14008:	e3100101 	tst	r0, #1073741824	; 0x40000000
-   1400c:	1a00000f 	bne	14050 <__aeabi_d2f+0x78>
-   14010:	e293262e 	adds	r2, r3, #48234496	; 0x2e00000
-   14014:	b2000102 	andlt	r0, r0, #-2147483648	; 0x80000000
-   14018:	b12fff1e 	bxlt	lr
-   1401c:	e3800601 	orr	r0, r0, #1048576	; 0x100000
-   14020:	e1a02aa2 	mov	r2, r2, lsr #21
-   14024:	e2622018 	rsb	r2, r2, #24	; 0x18
-   14028:	e262c020 	rsb	ip, r2, #32	; 0x20
-   1402c:	e1b03c11 	movs	r3, r1, lsl ip
-   14030:	e1a01231 	mov	r1, r1, lsr r2
-   14034:	13811001 	orrne	r1, r1, #1	; 0x1
-   14038:	e1a03580 	mov	r3, r0, lsl #11
-   1403c:	e1a035a3 	mov	r3, r3, lsr #11
-   14040:	e1811c13 	orr	r1, r1, r3, lsl ip
-   14044:	e1a03233 	mov	r3, r3, lsr r2
-   14048:	e1a03083 	mov	r3, r3, lsl #1
-   1404c:	eaffffe6 	b	13fec <__aeabi_d2f+0x14>
-   14050:	e1f03ac2 	mvns	r3, r2, asr #21
-   14054:	1a000003 	bne	14068 <__aeabi_d2f+0x90>
-   14058:	e1913600 	orrs	r3, r1, r0, lsl #12
-   1405c:	13a0047f 	movne	r0, #2130706432	; 0x7f000000
-   14060:	13800503 	orrne	r0, r0, #12582912	; 0xc00000
-   14064:	112fff1e 	bxne	lr
-   14068:	e2000102 	and	r0, r0, #-2147483648	; 0x80000000
-   1406c:	e380047f 	orr	r0, r0, #2130706432	; 0x7f000000
-   14070:	e3800502 	orr	r0, r0, #8388608	; 0x800000
-   14074:	e12fff1e 	bx	lr
-
-00014078 <__aeabi_frsub>:
-   14078:	e2200102 	eor	r0, r0, #-2147483648	; 0x80000000
-   1407c:	ea000000 	b	14084 <__addsf3>
-
-00014080 <__aeabi_fsub>:
-   14080:	e2211102 	eor	r1, r1, #-2147483648	; 0x80000000
-
-00014084 <__addsf3>:
-   14084:	e1b02080 	movs	r2, r0, lsl #1
-   14088:	11b03081 	movnes	r3, r1, lsl #1
-   1408c:	11320003 	teqne	r2, r3
-   14090:	11f0cc42 	mvnnes	ip, r2, asr #24
-   14094:	11f0cc43 	mvnnes	ip, r3, asr #24
-   14098:	0a000047 	beq	141bc <__addsf3+0x138>
-   1409c:	e1a02c22 	mov	r2, r2, lsr #24
-   140a0:	e0723c23 	rsbs	r3, r2, r3, lsr #24
-   140a4:	c0822003 	addgt	r2, r2, r3
-   140a8:	c0201001 	eorgt	r1, r0, r1
-   140ac:	c0210000 	eorgt	r0, r1, r0
-   140b0:	c0201001 	eorgt	r1, r0, r1
-   140b4:	b2633000 	rsblt	r3, r3, #0	; 0x0
-   140b8:	e3530019 	cmp	r3, #25	; 0x19
-   140bc:	812fff1e 	bxhi	lr
-   140c0:	e3100102 	tst	r0, #-2147483648	; 0x80000000
-   140c4:	e3800502 	orr	r0, r0, #8388608	; 0x800000
-   140c8:	e3c004ff 	bic	r0, r0, #-16777216	; 0xff000000
-   140cc:	12600000 	rsbne	r0, r0, #0	; 0x0
-   140d0:	e3110102 	tst	r1, #-2147483648	; 0x80000000
-   140d4:	e3811502 	orr	r1, r1, #8388608	; 0x800000
-   140d8:	e3c114ff 	bic	r1, r1, #-16777216	; 0xff000000
-   140dc:	12611000 	rsbne	r1, r1, #0	; 0x0
-   140e0:	e1320003 	teq	r2, r3
-   140e4:	0a00002e 	beq	141a4 <__addsf3+0x120>
-   140e8:	e2422001 	sub	r2, r2, #1	; 0x1
-   140ec:	e0900351 	adds	r0, r0, r1, asr r3
-   140f0:	e2633020 	rsb	r3, r3, #32	; 0x20
-   140f4:	e1a01311 	mov	r1, r1, lsl r3
-   140f8:	e2003102 	and	r3, r0, #-2147483648	; 0x80000000
-   140fc:	5a000001 	bpl	14108 <__addsf3+0x84>
-   14100:	e2711000 	rsbs	r1, r1, #0	; 0x0
-   14104:	e2e00000 	rsc	r0, r0, #0	; 0x0
-   14108:	e3500502 	cmp	r0, #8388608	; 0x800000
-   1410c:	3a00000b 	bcc	14140 <__addsf3+0xbc>
-   14110:	e3500401 	cmp	r0, #16777216	; 0x1000000
-   14114:	3a000004 	bcc	1412c <__addsf3+0xa8>
-   14118:	e1b000a0 	movs	r0, r0, lsr #1
-   1411c:	e1a01061 	mov	r1, r1, rrx
-   14120:	e2822001 	add	r2, r2, #1	; 0x1
-   14124:	e35200fe 	cmp	r2, #254	; 0xfe
-   14128:	2a000038 	bcs	14210 <__addsf3+0x18c>
-   1412c:	e3510102 	cmp	r1, #-2147483648	; 0x80000000
-   14130:	e0a00b82 	adc	r0, r0, r2, lsl #23
-   14134:	03c00001 	biceq	r0, r0, #1	; 0x1
-   14138:	e1800003 	orr	r0, r0, r3
-   1413c:	e12fff1e 	bx	lr
-   14140:	e1b01081 	movs	r1, r1, lsl #1
-   14144:	e0a00000 	adc	r0, r0, r0
-   14148:	e3100502 	tst	r0, #8388608	; 0x800000
-   1414c:	e2422001 	sub	r2, r2, #1	; 0x1
-   14150:	1afffff5 	bne	1412c <__addsf3+0xa8>
-   14154:	e1b0c620 	movs	ip, r0, lsr #12
-   14158:	01a00600 	moveq	r0, r0, lsl #12
-   1415c:	0242200c 	subeq	r2, r2, #12	; 0xc
-   14160:	e31008ff 	tst	r0, #16711680	; 0xff0000
-   14164:	01a00400 	moveq	r0, r0, lsl #8
-   14168:	02422008 	subeq	r2, r2, #8	; 0x8
-   1416c:	e310060f 	tst	r0, #15728640	; 0xf00000
-   14170:	01a00200 	moveq	r0, r0, lsl #4
-   14174:	02422004 	subeq	r2, r2, #4	; 0x4
-   14178:	e3100503 	tst	r0, #12582912	; 0xc00000
-   1417c:	01a00100 	moveq	r0, r0, lsl #2
-   14180:	02422002 	subeq	r2, r2, #2	; 0x2
-   14184:	e3500502 	cmp	r0, #8388608	; 0x800000
-   14188:	31a00080 	movcc	r0, r0, lsl #1
-   1418c:	e2d22000 	sbcs	r2, r2, #0	; 0x0
-   14190:	a0800b82 	addge	r0, r0, r2, lsl #23
-   14194:	b2622000 	rsblt	r2, r2, #0	; 0x0
-   14198:	a1800003 	orrge	r0, r0, r3
-   1419c:	b1830230 	orrlt	r0, r3, r0, lsr r2
-   141a0:	e12fff1e 	bx	lr
-   141a4:	e3320000 	teq	r2, #0	; 0x0
-   141a8:	e2211502 	eor	r1, r1, #8388608	; 0x800000
-   141ac:	02200502 	eoreq	r0, r0, #8388608	; 0x800000
-   141b0:	02822001 	addeq	r2, r2, #1	; 0x1
-   141b4:	12433001 	subne	r3, r3, #1	; 0x1
-   141b8:	eaffffca 	b	140e8 <__addsf3+0x64>
-   141bc:	e1a03081 	mov	r3, r1, lsl #1
-   141c0:	e1f0cc42 	mvns	ip, r2, asr #24
-   141c4:	11f0cc43 	mvnnes	ip, r3, asr #24
-   141c8:	0a000013 	beq	1421c <__addsf3+0x198>
-   141cc:	e1320003 	teq	r2, r3
-   141d0:	0a000002 	beq	141e0 <__addsf3+0x15c>
-   141d4:	e3320000 	teq	r2, #0	; 0x0
-   141d8:	01a00001 	moveq	r0, r1
-   141dc:	e12fff1e 	bx	lr
-   141e0:	e1300001 	teq	r0, r1
-   141e4:	13a00000 	movne	r0, #0	; 0x0
-   141e8:	112fff1e 	bxne	lr
-   141ec:	e31204ff 	tst	r2, #-16777216	; 0xff000000
-   141f0:	1a000002 	bne	14200 <__addsf3+0x17c>
-   141f4:	e1b00080 	movs	r0, r0, lsl #1
-   141f8:	23800102 	orrcs	r0, r0, #-2147483648	; 0x80000000
-   141fc:	e12fff1e 	bx	lr
-   14200:	e2922402 	adds	r2, r2, #33554432	; 0x2000000
-   14204:	32800502 	addcc	r0, r0, #8388608	; 0x800000
-   14208:	312fff1e 	bxcc	lr
-   1420c:	e2003102 	and	r3, r0, #-2147483648	; 0x80000000
-   14210:	e383047f 	orr	r0, r3, #2130706432	; 0x7f000000
-   14214:	e3800502 	orr	r0, r0, #8388608	; 0x800000
-   14218:	e12fff1e 	bx	lr
-   1421c:	e1f02c42 	mvns	r2, r2, asr #24
-   14220:	11a00001 	movne	r0, r1
-   14224:	01f03c43 	mvneqs	r3, r3, asr #24
-   14228:	11a01000 	movne	r1, r0
-   1422c:	e1b02480 	movs	r2, r0, lsl #9
-   14230:	01b03481 	moveqs	r3, r1, lsl #9
-   14234:	01300001 	teqeq	r0, r1
-   14238:	13800501 	orrne	r0, r0, #4194304	; 0x400000
-   1423c:	e12fff1e 	bx	lr
-
-00014240 <__aeabi_ui2f>:
-   14240:	e3a03000 	mov	r3, #0	; 0x0
-   14244:	ea000001 	b	14250 <__aeabi_i2f+0x8>
-
-00014248 <__aeabi_i2f>:
-   14248:	e2103102 	ands	r3, r0, #-2147483648	; 0x80000000
-   1424c:	42600000 	rsbmi	r0, r0, #0	; 0x0
-   14250:	e1b0c000 	movs	ip, r0
-   14254:	012fff1e 	bxeq	lr
-   14258:	e383344b 	orr	r3, r3, #1258291200	; 0x4b000000
-   1425c:	e1a01000 	mov	r1, r0
-   14260:	e3a00000 	mov	r0, #0	; 0x0
-   14264:	ea00000f 	b	142a8 <__aeabi_l2f+0x30>
-
-00014268 <__aeabi_ul2f>:
-   14268:	e1902001 	orrs	r2, r0, r1
-   1426c:	012fff1e 	bxeq	lr
-   14270:	e3a03000 	mov	r3, #0	; 0x0
-   14274:	ea000005 	b	14290 <__aeabi_l2f+0x18>
-
-00014278 <__aeabi_l2f>:
-   14278:	e1902001 	orrs	r2, r0, r1
-   1427c:	012fff1e 	bxeq	lr
-   14280:	e2113102 	ands	r3, r1, #-2147483648	; 0x80000000
-   14284:	5a000001 	bpl	14290 <__aeabi_l2f+0x18>
-   14288:	e2700000 	rsbs	r0, r0, #0	; 0x0
-   1428c:	e2e11000 	rsc	r1, r1, #0	; 0x0
-   14290:	e1b0c001 	movs	ip, r1
-   14294:	01a0c000 	moveq	ip, r0
-   14298:	01a01000 	moveq	r1, r0
-   1429c:	03a00000 	moveq	r0, #0	; 0x0
-   142a0:	e383345b 	orr	r3, r3, #1526726656	; 0x5b000000
-   142a4:	02433201 	subeq	r3, r3, #268435456	; 0x10000000
-   142a8:	e2433502 	sub	r3, r3, #8388608	; 0x800000
-   142ac:	e3a02017 	mov	r2, #23	; 0x17
-   142b0:	e35c0801 	cmp	ip, #65536	; 0x10000
-   142b4:	21a0c82c 	movcs	ip, ip, lsr #16
-   142b8:	22422010 	subcs	r2, r2, #16	; 0x10
-   142bc:	e35c0c01 	cmp	ip, #256	; 0x100
-   142c0:	21a0c42c 	movcs	ip, ip, lsr #8
-   142c4:	22422008 	subcs	r2, r2, #8	; 0x8
-   142c8:	e35c0010 	cmp	ip, #16	; 0x10
-   142cc:	21a0c22c 	movcs	ip, ip, lsr #4
-   142d0:	22422004 	subcs	r2, r2, #4	; 0x4
-   142d4:	e35c0004 	cmp	ip, #4	; 0x4
-   142d8:	22422002 	subcs	r2, r2, #2	; 0x2
-   142dc:	304220ac 	subcc	r2, r2, ip, lsr #1
-   142e0:	e05221ac 	subs	r2, r2, ip, lsr #3
-   142e4:	e0433b82 	sub	r3, r3, r2, lsl #23
-   142e8:	ba000006 	blt	14308 <__aeabi_l2f+0x90>
-   142ec:	e0833211 	add	r3, r3, r1, lsl r2
-   142f0:	e1a0c210 	mov	ip, r0, lsl r2
-   142f4:	e2622020 	rsb	r2, r2, #32	; 0x20
-   142f8:	e35c0102 	cmp	ip, #-2147483648	; 0x80000000
-   142fc:	e0a30230 	adc	r0, r3, r0, lsr r2
-   14300:	03c00001 	biceq	r0, r0, #1	; 0x1
-   14304:	e12fff1e 	bx	lr
-   14308:	e2822020 	add	r2, r2, #32	; 0x20
-   1430c:	e1a0c211 	mov	ip, r1, lsl r2
-   14310:	e2622020 	rsb	r2, r2, #32	; 0x20
-   14314:	e190008c 	orrs	r0, r0, ip, lsl #1
-   14318:	e0a30231 	adc	r0, r3, r1, lsr r2
-   1431c:	01c00fac 	biceq	r0, r0, ip, lsr #31
-   14320:	e12fff1e 	bx	lr
-
-00014324 <__aeabi_fmul>:
-   14324:	e3a0c0ff 	mov	ip, #255	; 0xff
-   14328:	e01c2ba0 	ands	r2, ip, r0, lsr #23
-   1432c:	101c3ba1 	andnes	r3, ip, r1, lsr #23
-   14330:	1132000c 	teqne	r2, ip
-   14334:	1133000c 	teqne	r3, ip
-   14338:	0a00003e 	beq	14438 <__aeabi_fmul+0x114>
-   1433c:	e0822003 	add	r2, r2, r3
-   14340:	e020c001 	eor	ip, r0, r1
-   14344:	e1b00480 	movs	r0, r0, lsl #9
-   14348:	11b01481 	movnes	r1, r1, lsl #9
-   1434c:	0a000010 	beq	14394 <__aeabi_fmul+0x70>
-   14350:	e3a03302 	mov	r3, #134217728	; 0x8000000
-   14354:	e18302a0 	orr	r0, r3, r0, lsr #5
-   14358:	e18312a1 	orr	r1, r3, r1, lsr #5
-   1435c:	e0813190 	umull	r3, r1, r0, r1
-   14360:	e20c0102 	and	r0, ip, #-2147483648	; 0x80000000
-   14364:	e3510502 	cmp	r1, #8388608	; 0x800000
-   14368:	31a01081 	movcc	r1, r1, lsl #1
-   1436c:	31811fa3 	orrcc	r1, r1, r3, lsr #31
-   14370:	31a03083 	movcc	r3, r3, lsl #1
-   14374:	e1800001 	orr	r0, r0, r1
-   14378:	e2c2207f 	sbc	r2, r2, #127	; 0x7f
-   1437c:	e35200fd 	cmp	r2, #253	; 0xfd
-   14380:	8a00000f 	bhi	143c4 <__aeabi_fmul+0xa0>
-   14384:	e3530102 	cmp	r3, #-2147483648	; 0x80000000
-   14388:	e0a00b82 	adc	r0, r0, r2, lsl #23
-   1438c:	03c00001 	biceq	r0, r0, #1	; 0x1
-   14390:	e12fff1e 	bx	lr
-   14394:	e3300000 	teq	r0, #0	; 0x0
-   14398:	e20cc102 	and	ip, ip, #-2147483648	; 0x80000000
-   1439c:	01a01481 	moveq	r1, r1, lsl #9
-   143a0:	e18c04a0 	orr	r0, ip, r0, lsr #9
-   143a4:	e18004a1 	orr	r0, r0, r1, lsr #9
-   143a8:	e252207f 	subs	r2, r2, #127	; 0x7f
-   143ac:	c27230ff 	rsbgts	r3, r2, #255	; 0xff
-   143b0:	c1800b82 	orrgt	r0, r0, r2, lsl #23
-   143b4:	c12fff1e 	bxgt	lr
-   143b8:	e3800502 	orr	r0, r0, #8388608	; 0x800000
-   143bc:	e3a03000 	mov	r3, #0	; 0x0
-   143c0:	e2522001 	subs	r2, r2, #1	; 0x1
-   143c4:	ca000035 	bgt	144a0 <__aeabi_fmul+0x17c>
-   143c8:	e3720019 	cmn	r2, #25	; 0x19
-   143cc:	d2000102 	andle	r0, r0, #-2147483648	; 0x80000000
-   143d0:	d12fff1e 	bxle	lr
-   143d4:	e2622000 	rsb	r2, r2, #0	; 0x0
-   143d8:	e1b01080 	movs	r1, r0, lsl #1
-   143dc:	e1a01231 	mov	r1, r1, lsr r2
-   143e0:	e2622020 	rsb	r2, r2, #32	; 0x20
-   143e4:	e1a0c210 	mov	ip, r0, lsl r2
-   143e8:	e1b00061 	movs	r0, r1, rrx
-   143ec:	e2a00000 	adc	r0, r0, #0	; 0x0
-   143f0:	e193308c 	orrs	r3, r3, ip, lsl #1
-   143f4:	01c00fac 	biceq	r0, r0, ip, lsr #31
-   143f8:	e12fff1e 	bx	lr
-   143fc:	e3320000 	teq	r2, #0	; 0x0
-   14400:	e200c102 	and	ip, r0, #-2147483648	; 0x80000000
-   14404:	01a00080 	moveq	r0, r0, lsl #1
-   14408:	03100502 	tsteq	r0, #8388608	; 0x800000
-   1440c:	02422001 	subeq	r2, r2, #1	; 0x1
-   14410:	0afffffb 	beq	14404 <__aeabi_fmul+0xe0>
-   14414:	e180000c 	orr	r0, r0, ip
-   14418:	e3330000 	teq	r3, #0	; 0x0
-   1441c:	e201c102 	and	ip, r1, #-2147483648	; 0x80000000
-   14420:	01a01081 	moveq	r1, r1, lsl #1
-   14424:	03110502 	tsteq	r1, #8388608	; 0x800000
-   14428:	02433001 	subeq	r3, r3, #1	; 0x1
-   1442c:	0afffffb 	beq	14420 <__aeabi_fmul+0xfc>
-   14430:	e181100c 	orr	r1, r1, ip
-   14434:	eaffffc0 	b	1433c <__aeabi_fmul+0x18>
-   14438:	e00c3ba1 	and	r3, ip, r1, lsr #23
-   1443c:	e132000c 	teq	r2, ip
-   14440:	1133000c 	teqne	r3, ip
-   14444:	0a000005 	beq	14460 <__aeabi_fmul+0x13c>
-   14448:	e3d0c102 	bics	ip, r0, #-2147483648	; 0x80000000
-   1444c:	13d1c102 	bicnes	ip, r1, #-2147483648	; 0x80000000
-   14450:	1affffe9 	bne	143fc <__aeabi_fmul+0xd8>
-   14454:	e0200001 	eor	r0, r0, r1
-   14458:	e2000102 	and	r0, r0, #-2147483648	; 0x80000000
-   1445c:	e12fff1e 	bx	lr
-   14460:	e3300000 	teq	r0, #0	; 0x0
-   14464:	13300102 	teqne	r0, #-2147483648	; 0x80000000
-   14468:	01a00001 	moveq	r0, r1
-   1446c:	13310000 	teqne	r1, #0	; 0x0
-   14470:	13310102 	teqne	r1, #-2147483648	; 0x80000000
-   14474:	0a00000d 	beq	144b0 <__aeabi_fmul+0x18c>
-   14478:	e132000c 	teq	r2, ip
-   1447c:	1a000001 	bne	14488 <__aeabi_fmul+0x164>
-   14480:	e1b02480 	movs	r2, r0, lsl #9
-   14484:	1a000009 	bne	144b0 <__aeabi_fmul+0x18c>
-   14488:	e133000c 	teq	r3, ip
-   1448c:	1a000002 	bne	1449c <__aeabi_fmul+0x178>
-   14490:	e1b03481 	movs	r3, r1, lsl #9
-   14494:	11a00001 	movne	r0, r1
-   14498:	1a000004 	bne	144b0 <__aeabi_fmul+0x18c>
-   1449c:	e0200001 	eor	r0, r0, r1
-   144a0:	e2000102 	and	r0, r0, #-2147483648	; 0x80000000
-   144a4:	e380047f 	orr	r0, r0, #2130706432	; 0x7f000000
-   144a8:	e3800502 	orr	r0, r0, #8388608	; 0x800000
-   144ac:	e12fff1e 	bx	lr
-   144b0:	e380047f 	orr	r0, r0, #2130706432	; 0x7f000000
-   144b4:	e3800503 	orr	r0, r0, #12582912	; 0xc00000
-   144b8:	e12fff1e 	bx	lr
-
-000144bc <__aeabi_fdiv>:
-   144bc:	e3a0c0ff 	mov	ip, #255	; 0xff
-   144c0:	e01c2ba0 	ands	r2, ip, r0, lsr #23
-   144c4:	101c3ba1 	andnes	r3, ip, r1, lsr #23
-   144c8:	1132000c 	teqne	r2, ip
-   144cc:	1133000c 	teqne	r3, ip
-   144d0:	0a00003a 	beq	145c0 <__aeabi_fdiv+0x104>
-   144d4:	e0422003 	sub	r2, r2, r3
-   144d8:	e020c001 	eor	ip, r0, r1
-   144dc:	e1b01481 	movs	r1, r1, lsl #9
-   144e0:	e1a00480 	mov	r0, r0, lsl #9
-   144e4:	0a00001c 	beq	1455c <__aeabi_fdiv+0xa0>
-   144e8:	e3a03201 	mov	r3, #268435456	; 0x10000000
-   144ec:	e1831221 	orr	r1, r3, r1, lsr #4
-   144f0:	e1833220 	orr	r3, r3, r0, lsr #4
-   144f4:	e20c0102 	and	r0, ip, #-2147483648	; 0x80000000
-   144f8:	e1530001 	cmp	r3, r1
-   144fc:	31a03083 	movcc	r3, r3, lsl #1
-   14500:	e2a2207d 	adc	r2, r2, #125	; 0x7d
-   14504:	e3a0c502 	mov	ip, #8388608	; 0x800000
-   14508:	e1530001 	cmp	r3, r1
-   1450c:	20433001 	subcs	r3, r3, r1
-   14510:	2180000c 	orrcs	r0, r0, ip
-   14514:	e15300a1 	cmp	r3, r1, lsr #1
-   14518:	204330a1 	subcs	r3, r3, r1, lsr #1
-   1451c:	218000ac 	orrcs	r0, r0, ip, lsr #1
-   14520:	e1530121 	cmp	r3, r1, lsr #2
-   14524:	20433121 	subcs	r3, r3, r1, lsr #2
-   14528:	2180012c 	orrcs	r0, r0, ip, lsr #2
-   1452c:	e15301a1 	cmp	r3, r1, lsr #3
-   14530:	204331a1 	subcs	r3, r3, r1, lsr #3
-   14534:	218001ac 	orrcs	r0, r0, ip, lsr #3
-   14538:	e1b03203 	movs	r3, r3, lsl #4
-   1453c:	11b0c22c 	movnes	ip, ip, lsr #4
-   14540:	1afffff0 	bne	14508 <__aeabi_fdiv+0x4c>
-   14544:	e35200fd 	cmp	r2, #253	; 0xfd
-   14548:	8affff9d 	bhi	143c4 <__aeabi_fmul+0xa0>
-   1454c:	e1530001 	cmp	r3, r1
-   14550:	e0a00b82 	adc	r0, r0, r2, lsl #23
-   14554:	03c00001 	biceq	r0, r0, #1	; 0x1
-   14558:	e12fff1e 	bx	lr
-   1455c:	e20cc102 	and	ip, ip, #-2147483648	; 0x80000000
-   14560:	e18c04a0 	orr	r0, ip, r0, lsr #9
-   14564:	e292207f 	adds	r2, r2, #127	; 0x7f
-   14568:	c27230ff 	rsbgts	r3, r2, #255	; 0xff
-   1456c:	c1800b82 	orrgt	r0, r0, r2, lsl #23
-   14570:	c12fff1e 	bxgt	lr
-   14574:	e3800502 	orr	r0, r0, #8388608	; 0x800000
-   14578:	e3a03000 	mov	r3, #0	; 0x0
-   1457c:	e2522001 	subs	r2, r2, #1	; 0x1
-   14580:	eaffff8f 	b	143c4 <__aeabi_fmul+0xa0>
-   14584:	e3320000 	teq	r2, #0	; 0x0
-   14588:	e200c102 	and	ip, r0, #-2147483648	; 0x80000000
-   1458c:	01a00080 	moveq	r0, r0, lsl #1
-   14590:	03100502 	tsteq	r0, #8388608	; 0x800000
-   14594:	02422001 	subeq	r2, r2, #1	; 0x1
-   14598:	0afffffb 	beq	1458c <__aeabi_fdiv+0xd0>
-   1459c:	e180000c 	orr	r0, r0, ip
-   145a0:	e3330000 	teq	r3, #0	; 0x0
-   145a4:	e201c102 	and	ip, r1, #-2147483648	; 0x80000000
-   145a8:	01a01081 	moveq	r1, r1, lsl #1
-   145ac:	03110502 	tsteq	r1, #8388608	; 0x800000
-   145b0:	02433001 	subeq	r3, r3, #1	; 0x1
-   145b4:	0afffffb 	beq	145a8 <__aeabi_fdiv+0xec>
-   145b8:	e181100c 	orr	r1, r1, ip
-   145bc:	eaffffc4 	b	144d4 <__aeabi_fdiv+0x18>
-   145c0:	e00c3ba1 	and	r3, ip, r1, lsr #23
-   145c4:	e132000c 	teq	r2, ip
-   145c8:	1a000005 	bne	145e4 <__aeabi_fdiv+0x128>
-   145cc:	e1b02480 	movs	r2, r0, lsl #9
-   145d0:	1affffb6 	bne	144b0 <__aeabi_fmul+0x18c>
-   145d4:	e133000c 	teq	r3, ip
-   145d8:	1affffaf 	bne	1449c <__aeabi_fmul+0x178>
-   145dc:	e1a00001 	mov	r0, r1
-   145e0:	eaffffb2 	b	144b0 <__aeabi_fmul+0x18c>
-   145e4:	e133000c 	teq	r3, ip
-   145e8:	1a000003 	bne	145fc <__aeabi_fdiv+0x140>
-   145ec:	e1b03481 	movs	r3, r1, lsl #9
-   145f0:	0affff97 	beq	14454 <__aeabi_fmul+0x130>
-   145f4:	e1a00001 	mov	r0, r1
-   145f8:	eaffffac 	b	144b0 <__aeabi_fmul+0x18c>
-   145fc:	e3d0c102 	bics	ip, r0, #-2147483648	; 0x80000000
-   14600:	13d1c102 	bicnes	ip, r1, #-2147483648	; 0x80000000
-   14604:	1affffde 	bne	14584 <__aeabi_fdiv+0xc8>
-   14608:	e3d02102 	bics	r2, r0, #-2147483648	; 0x80000000
-   1460c:	1affffa2 	bne	1449c <__aeabi_fmul+0x178>
-   14610:	e3d13102 	bics	r3, r1, #-2147483648	; 0x80000000
-   14614:	1affff8e 	bne	14454 <__aeabi_fmul+0x130>
-   14618:	eaffffa4 	b	144b0 <__aeabi_fmul+0x18c>
-
-0001461c <__gesf2>:
-   1461c:	e3e0c000 	mvn	ip, #0	; 0x0
-   14620:	ea000002 	b	14630 <__cmpsf2+0x4>
-
-00014624 <__lesf2>:
-   14624:	e3a0c001 	mov	ip, #1	; 0x1
-   14628:	ea000000 	b	14630 <__cmpsf2+0x4>
-
-0001462c <__cmpsf2>:
-   1462c:	e3a0c001 	mov	ip, #1	; 0x1
-   14630:	e50dc004 	str	ip, [sp, #-4]
-   14634:	e1a02080 	mov	r2, r0, lsl #1
-   14638:	e1a03081 	mov	r3, r1, lsl #1
-   1463c:	e1f0cc42 	mvns	ip, r2, asr #24
-   14640:	11f0cc43 	mvnnes	ip, r3, asr #24
-   14644:	0a000006 	beq	14664 <__cmpsf2+0x38>
-   14648:	e192c0a3 	orrs	ip, r2, r3, lsr #1
-   1464c:	11300001 	teqne	r0, r1
-   14650:	50520003 	subpls	r0, r2, r3
-   14654:	81a00fc1 	movhi	r0, r1, asr #31
-   14658:	31e00fc1 	mvncc	r0, r1, asr #31
-   1465c:	13800001 	orrne	r0, r0, #1	; 0x1
-   14660:	e12fff1e 	bx	lr
-   14664:	e1f0cc42 	mvns	ip, r2, asr #24
-   14668:	1a000001 	bne	14674 <__cmpsf2+0x48>
-   1466c:	e1b0c480 	movs	ip, r0, lsl #9
-   14670:	1a000003 	bne	14684 <__cmpsf2+0x58>
-   14674:	e1f0cc43 	mvns	ip, r3, asr #24
-   14678:	1afffff2 	bne	14648 <__cmpsf2+0x1c>
-   1467c:	e1b0c481 	movs	ip, r1, lsl #9
-   14680:	0afffff0 	beq	14648 <__cmpsf2+0x1c>
-   14684:	e51d0004 	ldr	r0, [sp, #-4]
-   14688:	e12fff1e 	bx	lr
-
-0001468c <__aeabi_cfrcmple>:
-   1468c:	e1a0c000 	mov	ip, r0
-   14690:	e1a00001 	mov	r0, r1
-   14694:	e1a0100c 	mov	r1, ip
-   14698:	eaffffff 	b	1469c <__aeabi_cfcmpeq>
-
-0001469c <__aeabi_cfcmpeq>:
-   1469c:	e92d400f 	stmdb	sp!, {r0, r1, r2, r3, lr}
-   146a0:	ebffffe1 	bl	1462c <__cmpsf2>
-   146a4:	e3500000 	cmp	r0, #0	; 0x0
-   146a8:	43700000 	cmnmi	r0, #0	; 0x0
-   146ac:	e8bd400f 	ldmia	sp!, {r0, r1, r2, r3, lr}
-   146b0:	e12fff1e 	bx	lr
-
-000146b4 <__aeabi_fcmpeq>:
-   146b4:	e52de008 	str	lr, [sp, #-8]!
-   146b8:	ebfffff7 	bl	1469c <__aeabi_cfcmpeq>
-   146bc:	03a00001 	moveq	r0, #1	; 0x1
-   146c0:	13a00000 	movne	r0, #0	; 0x0
-   146c4:	e49de008 	ldr	lr, [sp], #8
-   146c8:	e12fff1e 	bx	lr
-
-000146cc <__aeabi_fcmplt>:
-   146cc:	e52de008 	str	lr, [sp, #-8]!
-   146d0:	ebfffff1 	bl	1469c <__aeabi_cfcmpeq>
-   146d4:	33a00001 	movcc	r0, #1	; 0x1
-   146d8:	23a00000 	movcs	r0, #0	; 0x0
-   146dc:	e49de008 	ldr	lr, [sp], #8
-   146e0:	e12fff1e 	bx	lr
-
-000146e4 <__aeabi_fcmple>:
-   146e4:	e52de008 	str	lr, [sp, #-8]!
-   146e8:	ebffffeb 	bl	1469c <__aeabi_cfcmpeq>
-   146ec:	93a00001 	movls	r0, #1	; 0x1
-   146f0:	83a00000 	movhi	r0, #0	; 0x0
-   146f4:	e49de008 	ldr	lr, [sp], #8
-   146f8:	e12fff1e 	bx	lr
-
-000146fc <__aeabi_fcmpge>:
-   146fc:	e52de008 	str	lr, [sp, #-8]!
-   14700:	ebffffe1 	bl	1468c <__aeabi_cfrcmple>
-   14704:	93a00001 	movls	r0, #1	; 0x1
-   14708:	83a00000 	movhi	r0, #0	; 0x0
-   1470c:	e49de008 	ldr	lr, [sp], #8
-   14710:	e12fff1e 	bx	lr
-
-00014714 <__aeabi_fcmpgt>:
-   14714:	e52de008 	str	lr, [sp, #-8]!
-   14718:	ebffffdb 	bl	1468c <__aeabi_cfrcmple>
-   1471c:	33a00001 	movcc	r0, #1	; 0x1
-   14720:	23a00000 	movcs	r0, #0	; 0x0
-   14724:	e49de008 	ldr	lr, [sp], #8
-   14728:	e12fff1e 	bx	lr
-
-0001472c <__aeabi_f2iz>:
-   1472c:	e1a02080 	mov	r2, r0, lsl #1
-   14730:	e352047f 	cmp	r2, #2130706432	; 0x7f000000
-   14734:	3a000008 	bcc	1475c <__aeabi_f2iz+0x30>
-   14738:	e3a0309e 	mov	r3, #158	; 0x9e
-   1473c:	e0532c22 	subs	r2, r3, r2, lsr #24
-   14740:	9a000007 	bls	14764 <__aeabi_f2iz+0x38>
-   14744:	e1a03400 	mov	r3, r0, lsl #8
-   14748:	e3833102 	orr	r3, r3, #-2147483648	; 0x80000000
-   1474c:	e3100102 	tst	r0, #-2147483648	; 0x80000000
-   14750:	e1a00233 	mov	r0, r3, lsr r2
-   14754:	12600000 	rsbne	r0, r0, #0	; 0x0
-   14758:	e12fff1e 	bx	lr
-   1475c:	e3a00000 	mov	r0, #0	; 0x0
-   14760:	e12fff1e 	bx	lr
-   14764:	e3720061 	cmn	r2, #97	; 0x61
-   14768:	1a000001 	bne	14774 <__aeabi_f2iz+0x48>
-   1476c:	e1b02480 	movs	r2, r0, lsl #9
-   14770:	1a000002 	bne	14780 <__aeabi_f2iz+0x54>
-   14774:	e2100102 	ands	r0, r0, #-2147483648	; 0x80000000
-   14778:	03e00102 	mvneq	r0, #-2147483648	; 0x80000000
-   1477c:	e12fff1e 	bx	lr
-   14780:	e3a00000 	mov	r0, #0	; 0x0
-   14784:	e12fff1e 	bx	lr
-
-00014788 <__divdi3>:
-   14788:	b5f0      	push	{r4, r5, r6, r7, lr}
-   1478a:	465f      	mov	r7, fp
-   1478c:	4656      	mov	r6, sl
-   1478e:	464d      	mov	r5, r9
-   14790:	4644      	mov	r4, r8
-   14792:	b4f0      	push	{r4, r5, r6, r7}
-   14794:	2400      	movs	r4, #0
-   14796:	2500      	movs	r5, #0
-   14798:	b088      	sub	sp, #32
-   1479a:	9400      	str	r4, [sp, #0]
-   1479c:	9501      	str	r5, [sp, #4]
-   1479e:	1c14      	adds	r4, r2, #0
-   147a0:	1c1d      	adds	r5, r3, #0
-   147a2:	2900      	cmp	r1, #0
-   147a4:	da00      	bge.n	147a8 <__divdi3+0x20>
-   147a6:	e0ff      	b.n	149a8 <__divdi3+0x220>
-   147a8:	2600      	movs	r6, #0
-   147aa:	9602      	str	r6, [sp, #8]
-   147ac:	2b00      	cmp	r3, #0
-   147ae:	da00      	bge.n	147b2 <__divdi3+0x2a>
-   147b0:	e0f3      	b.n	1499a <__divdi3+0x212>
-   147b2:	1c26      	adds	r6, r4, #0
-   147b4:	4681      	mov	r9, r0
-   147b6:	1c0f      	adds	r7, r1, #0
-   147b8:	2d00      	cmp	r5, #0
-   147ba:	d15c      	bne.n	14876 <__divdi3+0xee>
-   147bc:	42bc      	cmp	r4, r7
-   147be:	d900      	bls.n	147c2 <__divdi3+0x3a>
-   147c0:	e074      	b.n	148ac <__divdi3+0x124>
-   147c2:	2c00      	cmp	r4, #0
-   147c4:	d100      	bne.n	147c8 <__divdi3+0x40>
-   147c6:	e10d      	b.n	149e4 <__divdi3+0x25c>
-   147c8:	4bbf      	ldr	r3, [pc, #764]	(14ac8 <.text+0x14ac8>)
-   147ca:	429e      	cmp	r6, r3
-   147cc:	d900      	bls.n	147d0 <__divdi3+0x48>
-   147ce:	e0f4      	b.n	149ba <__divdi3+0x232>
-   147d0:	2eff      	cmp	r6, #255
-   147d2:	d900      	bls.n	147d6 <__divdi3+0x4e>
-   147d4:	e1df      	b.n	14b96 <.text+0x14b96>
-   147d6:	2100      	movs	r1, #0
-   147d8:	2300      	movs	r3, #0
-   147da:	4abc      	ldr	r2, [pc, #752]	(14acc <.text+0x14acc>)
-   147dc:	1c34      	adds	r4, r6, #0
-   147de:	40dc      	lsrs	r4, r3
-   147e0:	5d13      	ldrb	r3, [r2, r4]
-   147e2:	2220      	movs	r2, #32
-   147e4:	18cb      	adds	r3, r1, r3
-   147e6:	1ad3      	subs	r3, r2, r3
-   147e8:	469a      	mov	sl, r3
-   147ea:	2b00      	cmp	r3, #0
-   147ec:	d000      	beq.n	147f0 <__divdi3+0x68>
-   147ee:	e171      	b.n	14ad4 <.text+0x14ad4>
-   147f0:	4bb5      	ldr	r3, [pc, #724]	(14ac8 <.text+0x14ac8>)
-   147f2:	2001      	movs	r0, #1
-   147f4:	4033      	ands	r3, r6
-   147f6:	9004      	str	r0, [sp, #16]
-   147f8:	1bbd      	subs	r5, r7, r6
-   147fa:	469b      	mov	fp, r3
-   147fc:	0c37      	lsrs	r7, r6, #16
-   147fe:	1c39      	adds	r1, r7, #0
-   14800:	1c28      	adds	r0, r5, #0
-   14802:	f7fe fd4b 	bl	1329c <__aeabi_uidiv>
-   14806:	4659      	mov	r1, fp
-   14808:	4680      	mov	r8, r0
-   1480a:	4644      	mov	r4, r8
-   1480c:	434c      	muls	r4, r1
-   1480e:	1c28      	adds	r0, r5, #0
-   14810:	1c39      	adds	r1, r7, #0
-   14812:	f7fe fddb 	bl	133cc <__umodsi3>
-   14816:	464a      	mov	r2, r9
-   14818:	0400      	lsls	r0, r0, #16
-   1481a:	0c13      	lsrs	r3, r2, #16
-   1481c:	4318      	orrs	r0, r3
-   1481e:	4284      	cmp	r4, r0
-   14820:	d908      	bls.n	14834 <__divdi3+0xac>
-   14822:	2301      	movs	r3, #1
-   14824:	425b      	negs	r3, r3
-   14826:	1980      	adds	r0, r0, r6
-   14828:	4498      	add	r8, r3
-   1482a:	4286      	cmp	r6, r0
-   1482c:	d802      	bhi.n	14834 <__divdi3+0xac>
-   1482e:	4284      	cmp	r4, r0
-   14830:	d900      	bls.n	14834 <__divdi3+0xac>
-   14832:	e1d5      	b.n	14be0 <.text+0x14be0>
-   14834:	1b04      	subs	r4, r0, r4
-   14836:	1c39      	adds	r1, r7, #0
-   14838:	1c20      	adds	r0, r4, #0
-   1483a:	f7fe fd2f 	bl	1329c <__aeabi_uidiv>
-   1483e:	1c05      	adds	r5, r0, #0
-   14840:	4658      	mov	r0, fp
-   14842:	4368      	muls	r0, r5
-   14844:	1c39      	adds	r1, r7, #0
-   14846:	4682      	mov	sl, r0
-   14848:	1c20      	adds	r0, r4, #0
-   1484a:	f7fe fdbf 	bl	133cc <__umodsi3>
-   1484e:	4b9e      	ldr	r3, [pc, #632]	(14ac8 <.text+0x14ac8>)
-   14850:	4649      	mov	r1, r9
-   14852:	0400      	lsls	r0, r0, #16
-   14854:	400b      	ands	r3, r1
-   14856:	4318      	orrs	r0, r3
-   14858:	4582      	cmp	sl, r0
-   1485a:	d906      	bls.n	1486a <__divdi3+0xe2>
-   1485c:	1830      	adds	r0, r6, r0
-   1485e:	3d01      	subs	r5, #1
-   14860:	4286      	cmp	r6, r0
-   14862:	d802      	bhi.n	1486a <__divdi3+0xe2>
-   14864:	4582      	cmp	sl, r0
-   14866:	d900      	bls.n	1486a <__divdi3+0xe2>
-   14868:	e1b3      	b.n	14bd2 <.text+0x14bd2>
-   1486a:	4642      	mov	r2, r8
-   1486c:	0413      	lsls	r3, r2, #16
-   1486e:	1c28      	adds	r0, r5, #0
-   14870:	4318      	orrs	r0, r3
-   14872:	9b04      	ldr	r3, [sp, #16]
-   14874:	e005      	b.n	14882 <__divdi3+0xfa>
-   14876:	1c29      	adds	r1, r5, #0
-   14878:	42bd      	cmp	r5, r7
-   1487a:	d800      	bhi.n	1487e <__divdi3+0xf6>
-   1487c:	e073      	b.n	14966 <__divdi3+0x1de>
-   1487e:	2000      	movs	r0, #0
-   14880:	2300      	movs	r3, #0
-   14882:	9a02      	ldr	r2, [sp, #8]
-   14884:	9000      	str	r0, [sp, #0]
-   14886:	9301      	str	r3, [sp, #4]
-   14888:	9800      	ldr	r0, [sp, #0]
-   1488a:	9901      	ldr	r1, [sp, #4]
-   1488c:	2a00      	cmp	r2, #0
-   1488e:	d004      	beq.n	1489a <__divdi3+0x112>
-   14890:	1c03      	adds	r3, r0, #0
-   14892:	1c0c      	adds	r4, r1, #0
-   14894:	2100      	movs	r1, #0
-   14896:	4258      	negs	r0, r3
-   14898:	41a1      	sbcs	r1, r4
-   1489a:	b008      	add	sp, #32
-   1489c:	bc3c      	pop	{r2, r3, r4, r5}
-   1489e:	4690      	mov	r8, r2
-   148a0:	4699      	mov	r9, r3
-   148a2:	46a2      	mov	sl, r4
-   148a4:	46ab      	mov	fp, r5
-   148a6:	bcf0      	pop	{r4, r5, r6, r7}
-   148a8:	bc04      	pop	{r2}
-   148aa:	4710      	bx	r2
-   148ac:	4b86      	ldr	r3, [pc, #536]	(14ac8 <.text+0x14ac8>)
-   148ae:	429c      	cmp	r4, r3
-   148b0:	d900      	bls.n	148b4 <__divdi3+0x12c>
-   148b2:	e090      	b.n	149d6 <__divdi3+0x24e>
-   148b4:	2cff      	cmp	r4, #255
-   148b6:	d900      	bls.n	148ba <__divdi3+0x132>
-   148b8:	e167      	b.n	14b8a <.text+0x14b8a>
-   148ba:	2100      	movs	r1, #0
-   148bc:	2300      	movs	r3, #0
-   148be:	4a83      	ldr	r2, [pc, #524]	(14acc <.text+0x14acc>)
-   148c0:	1c35      	adds	r5, r6, #0
-   148c2:	40dd      	lsrs	r5, r3
-   148c4:	5d53      	ldrb	r3, [r2, r5]
-   148c6:	18cb      	adds	r3, r1, r3
-   148c8:	2120      	movs	r1, #32
-   148ca:	1acd      	subs	r5, r1, r3
-   148cc:	2d00      	cmp	r5, #0
-   148ce:	d00b      	beq.n	148e8 <__divdi3+0x160>
-   148d0:	1c3a      	adds	r2, r7, #0
-   148d2:	1b4b      	subs	r3, r1, r5
-   148d4:	464f      	mov	r7, r9
-   148d6:	40df      	lsrs	r7, r3
-   148d8:	4648      	mov	r0, r9
-   148da:	40aa      	lsls	r2, r5
-   148dc:	1c3b      	adds	r3, r7, #0
-   148de:	40a8      	lsls	r0, r5
-   148e0:	1c17      	adds	r7, r2, #0
-   148e2:	40ae      	lsls	r6, r5
-   148e4:	431f      	orrs	r7, r3
-   148e6:	4681      	mov	r9, r0
-   148e8:	4b77      	ldr	r3, [pc, #476]	(14ac8 <.text+0x14ac8>)
-   148ea:	0c31      	lsrs	r1, r6, #16
-   148ec:	4033      	ands	r3, r6
-   148ee:	1c38      	adds	r0, r7, #0
-   148f0:	469b      	mov	fp, r3
-   148f2:	4688      	mov	r8, r1
-   148f4:	f7fe fcd2 	bl	1329c <__aeabi_uidiv>
-   148f8:	465a      	mov	r2, fp
-   148fa:	4682      	mov	sl, r0
-   148fc:	4641      	mov	r1, r8
-   148fe:	1c38      	adds	r0, r7, #0
-   14900:	4654      	mov	r4, sl
-   14902:	4354      	muls	r4, r2
-   14904:	f7fe fd62 	bl	133cc <__umodsi3>
-   14908:	464d      	mov	r5, r9
-   1490a:	0400      	lsls	r0, r0, #16
-   1490c:	0c2b      	lsrs	r3, r5, #16
-   1490e:	4318      	orrs	r0, r3
-   14910:	4284      	cmp	r4, r0
-   14912:	d908      	bls.n	14926 <__divdi3+0x19e>
-   14914:	2701      	movs	r7, #1
-   14916:	427f      	negs	r7, r7
-   14918:	1980      	adds	r0, r0, r6
-   1491a:	44ba      	add	sl, r7
-   1491c:	4286      	cmp	r6, r0
-   1491e:	d802      	bhi.n	14926 <__divdi3+0x19e>
-   14920:	4284      	cmp	r4, r0
-   14922:	d900      	bls.n	14926 <__divdi3+0x19e>
-   14924:	e159      	b.n	14bda <.text+0x14bda>
-   14926:	1b04      	subs	r4, r0, r4
-   14928:	4641      	mov	r1, r8
-   1492a:	1c20      	adds	r0, r4, #0
-   1492c:	f7fe fcb6 	bl	1329c <__aeabi_uidiv>
-   14930:	4641      	mov	r1, r8
-   14932:	1c05      	adds	r5, r0, #0
-   14934:	465f      	mov	r7, fp
-   14936:	4347      	muls	r7, r0
-   14938:	1c20      	adds	r0, r4, #0
-   1493a:	f7fe fd47 	bl	133cc <__umodsi3>
-   1493e:	4b62      	ldr	r3, [pc, #392]	(14ac8 <.text+0x14ac8>)
-   14940:	4649      	mov	r1, r9
-   14942:	0400      	lsls	r0, r0, #16
-   14944:	400b      	ands	r3, r1
-   14946:	4318      	orrs	r0, r3
-   14948:	4287      	cmp	r7, r0
-   1494a:	d906      	bls.n	1495a <__divdi3+0x1d2>
-   1494c:	1830      	adds	r0, r6, r0
-   1494e:	3d01      	subs	r5, #1
-   14950:	4286      	cmp	r6, r0
-   14952:	d802      	bhi.n	1495a <__divdi3+0x1d2>
-   14954:	4287      	cmp	r7, r0
-   14956:	d900      	bls.n	1495a <__divdi3+0x1d2>
-   14958:	e13d      	b.n	14bd6 <.text+0x14bd6>
-   1495a:	4652      	mov	r2, sl
-   1495c:	0413      	lsls	r3, r2, #16
-   1495e:	1c28      	adds	r0, r5, #0
-   14960:	4318      	orrs	r0, r3
-   14962:	2300      	movs	r3, #0
-   14964:	e78d      	b.n	14882 <__divdi3+0xfa>
-   14966:	4b58      	ldr	r3, [pc, #352]	(14ac8 <.text+0x14ac8>)
-   14968:	429d      	cmp	r5, r3
-   1496a:	d82d      	bhi.n	149c8 <__divdi3+0x240>
-   1496c:	2dff      	cmp	r5, #255
-   1496e:	d900      	bls.n	14972 <__divdi3+0x1ea>
-   14970:	e114      	b.n	14b9c <.text+0x14b9c>
-   14972:	2000      	movs	r0, #0
-   14974:	2300      	movs	r3, #0
-   14976:	4a55      	ldr	r2, [pc, #340]	(14acc <.text+0x14acc>)
-   14978:	1c0c      	adds	r4, r1, #0
-   1497a:	40dc      	lsrs	r4, r3
-   1497c:	5d13      	ldrb	r3, [r2, r4]
-   1497e:	2220      	movs	r2, #32
-   14980:	18c3      	adds	r3, r0, r3
-   14982:	1ad3      	subs	r3, r2, r3
-   14984:	469a      	mov	sl, r3
-   14986:	2b00      	cmp	r3, #0
-   14988:	d135      	bne.n	149f6 <__divdi3+0x26e>
-   1498a:	42b9      	cmp	r1, r7
-   1498c:	d302      	bcc.n	14994 <__divdi3+0x20c>
-   1498e:	454e      	cmp	r6, r9
-   14990:	d900      	bls.n	14994 <__divdi3+0x20c>
-   14992:	e774      	b.n	1487e <__divdi3+0xf6>
-   14994:	2001      	movs	r0, #1
-   14996:	2300      	movs	r3, #0
-   14998:	e773      	b.n	14882 <__divdi3+0xfa>
-   1499a:	9c02      	ldr	r4, [sp, #8]
-   1499c:	43e4      	mvns	r4, r4
-   1499e:	9402      	str	r4, [sp, #8]
-   149a0:	2500      	movs	r5, #0
-   149a2:	4254      	negs	r4, r2
-   149a4:	419d      	sbcs	r5, r3
-   149a6:	e704      	b.n	147b2 <__divdi3+0x2a>
-   149a8:	1c0f      	adds	r7, r1, #0
-   149aa:	1c06      	adds	r6, r0, #0
-   149ac:	2100      	movs	r1, #0
-   149ae:	4270      	negs	r0, r6
-   149b0:	41b9      	sbcs	r1, r7
-   149b2:	2701      	movs	r7, #1
-   149b4:	427f      	negs	r7, r7
-   149b6:	9702      	str	r7, [sp, #8]
-   149b8:	e6f8      	b.n	147ac <__divdi3+0x24>
-   149ba:	4b45      	ldr	r3, [pc, #276]	(14ad0 <.text+0x14ad0>)
-   149bc:	429e      	cmp	r6, r3
-   149be:	d900      	bls.n	149c2 <__divdi3+0x23a>
-   149c0:	e0ef      	b.n	14ba2 <.text+0x14ba2>
-   149c2:	2110      	movs	r1, #16
-   149c4:	2310      	movs	r3, #16
-   149c6:	e708      	b.n	147da <__divdi3+0x52>
-   149c8:	4b41      	ldr	r3, [pc, #260]	(14ad0 <.text+0x14ad0>)
-   149ca:	429d      	cmp	r5, r3
-   149cc:	d900      	bls.n	149d0 <__divdi3+0x248>
-   149ce:	e0df      	b.n	14b90 <.text+0x14b90>
-   149d0:	2010      	movs	r0, #16
-   149d2:	2310      	movs	r3, #16
-   149d4:	e7cf      	b.n	14976 <__divdi3+0x1ee>
-   149d6:	4b3e      	ldr	r3, [pc, #248]	(14ad0 <.text+0x14ad0>)
-   149d8:	429c      	cmp	r4, r3
-   149da:	d900      	bls.n	149de <__divdi3+0x256>
-   149dc:	e0e4      	b.n	14ba8 <.text+0x14ba8>
-   149de:	2110      	movs	r1, #16
-   149e0:	2310      	movs	r3, #16
-   149e2:	e76c      	b.n	148be <__divdi3+0x136>
-   149e4:	2001      	movs	r0, #1
-   149e6:	2100      	movs	r1, #0
-   149e8:	f7fe fc58 	bl	1329c <__aeabi_uidiv>
-   149ec:	4b36      	ldr	r3, [pc, #216]	(14ac8 <.text+0x14ac8>)
-   149ee:	1c06      	adds	r6, r0, #0
-   149f0:	429e      	cmp	r6, r3
-   149f2:	d8e2      	bhi.n	149ba <__divdi3+0x232>
-   149f4:	e6ec      	b.n	147d0 <__divdi3+0x48>
-   149f6:	1ad2      	subs	r2, r2, r3
-   149f8:	1c1d      	adds	r5, r3, #0
-   149fa:	4099      	lsls	r1, r3
-   149fc:	1c33      	adds	r3, r6, #0
-   149fe:	40d3      	lsrs	r3, r2
-   14a00:	40ae      	lsls	r6, r5
-   14a02:	4319      	orrs	r1, r3
-   14a04:	9607      	str	r6, [sp, #28]
-   14a06:	1c3b      	adds	r3, r7, #0
-   14a08:	464e      	mov	r6, r9
-   14a0a:	40d6      	lsrs	r6, r2
-   14a0c:	40ab      	lsls	r3, r5
-   14a0e:	4333      	orrs	r3, r6
-   14a10:	1c3c      	adds	r4, r7, #0
-   14a12:	40d4      	lsrs	r4, r2
-   14a14:	9305      	str	r3, [sp, #20]
-   14a16:	0c0f      	lsrs	r7, r1, #16
-   14a18:	4b2b      	ldr	r3, [pc, #172]	(14ac8 <.text+0x14ac8>)
-   14a1a:	1c0e      	adds	r6, r1, #0
-   14a1c:	4688      	mov	r8, r1
-   14a1e:	1c20      	adds	r0, r4, #0
-   14a20:	1c39      	adds	r1, r7, #0
-   14a22:	401e      	ands	r6, r3
-   14a24:	f7fe fc3a 	bl	1329c <__aeabi_uidiv>
-   14a28:	1c39      	adds	r1, r7, #0
-   14a2a:	4683      	mov	fp, r0
-   14a2c:	1c20      	adds	r0, r4, #0
-   14a2e:	f7fe fccd 	bl	133cc <__umodsi3>
-   14a32:	465d      	mov	r5, fp
-   14a34:	4375      	muls	r5, r6
-   14a36:	9905      	ldr	r1, [sp, #20]
-   14a38:	0400      	lsls	r0, r0, #16
-   14a3a:	0c0b      	lsrs	r3, r1, #16
-   14a3c:	4318      	orrs	r0, r3
-   14a3e:	4285      	cmp	r5, r0
-   14a40:	d906      	bls.n	14a50 <__divdi3+0x2c8>
-   14a42:	2201      	movs	r2, #1
-   14a44:	4252      	negs	r2, r2
-   14a46:	4440      	add	r0, r8
-   14a48:	4493      	add	fp, r2
-   14a4a:	4580      	cmp	r8, r0
-   14a4c:	d800      	bhi.n	14a50 <__divdi3+0x2c8>
-   14a4e:	e0ba      	b.n	14bc6 <.text+0x14bc6>
-   14a50:	1b44      	subs	r4, r0, r5
-   14a52:	1c20      	adds	r0, r4, #0
-   14a54:	1c39      	adds	r1, r7, #0
-   14a56:	f7fe fc21 	bl	1329c <__aeabi_uidiv>
-   14a5a:	1c39      	adds	r1, r7, #0
-   14a5c:	1c05      	adds	r5, r0, #0
-   14a5e:	4346      	muls	r6, r0
-   14a60:	1c20      	adds	r0, r4, #0
-   14a62:	f7fe fcb3 	bl	133cc <__umodsi3>
-   14a66:	4b18      	ldr	r3, [pc, #96]	(14ac8 <.text+0x14ac8>)
-   14a68:	9c05      	ldr	r4, [sp, #20]
-   14a6a:	0400      	lsls	r0, r0, #16
-   14a6c:	4023      	ands	r3, r4
-   14a6e:	4318      	orrs	r0, r3
-   14a70:	4286      	cmp	r6, r0
-   14a72:	d904      	bls.n	14a7e <__divdi3+0x2f6>
-   14a74:	4440      	add	r0, r8
-   14a76:	3d01      	subs	r5, #1
-   14a78:	4580      	cmp	r8, r0
-   14a7a:	d800      	bhi.n	14a7e <__divdi3+0x2f6>
-   14a7c:	e09d      	b.n	14bba <.text+0x14bba>
-   14a7e:	1b80      	subs	r0, r0, r6
-   14a80:	465e      	mov	r6, fp
-   14a82:	0433      	lsls	r3, r6, #16
-   14a84:	431d      	orrs	r5, r3
-   14a86:	4e10      	ldr	r6, [pc, #64]	(14ac8 <.text+0x14ac8>)
-   14a88:	9f07      	ldr	r7, [sp, #28]
-   14a8a:	9b07      	ldr	r3, [sp, #28]
-   14a8c:	1c2a      	adds	r2, r5, #0
-   14a8e:	4033      	ands	r3, r6
-   14a90:	0c39      	lsrs	r1, r7, #16
-   14a92:	4032      	ands	r2, r6
-   14a94:	0c2c      	lsrs	r4, r5, #16
-   14a96:	1c1f      	adds	r7, r3, #0
-   14a98:	4357      	muls	r7, r2
-   14a9a:	4684      	mov	ip, r0
-   14a9c:	434a      	muls	r2, r1
-   14a9e:	1c18      	adds	r0, r3, #0
-   14aa0:	4360      	muls	r0, r4
-   14aa2:	0c3b      	lsrs	r3, r7, #16
-   14aa4:	1812      	adds	r2, r2, r0
-   14aa6:	189a      	adds	r2, r3, r2
-   14aa8:	4361      	muls	r1, r4
-   14aaa:	4290      	cmp	r0, r2
-   14aac:	d902      	bls.n	14ab4 <__divdi3+0x32c>
-   14aae:	2080      	movs	r0, #128
-   14ab0:	0240      	lsls	r0, r0, #9
-   14ab2:	1809      	adds	r1, r1, r0
-   14ab4:	0c13      	lsrs	r3, r2, #16
-   14ab6:	18c8      	adds	r0, r1, r3
-   14ab8:	4584      	cmp	ip, r0
-   14aba:	d363      	bcc.n	14b84 <.text+0x14b84>
-   14abc:	4584      	cmp	ip, r0
-   14abe:	d058      	beq.n	14b72 <.text+0x14b72>
-   14ac0:	1c28      	adds	r0, r5, #0
-   14ac2:	2300      	movs	r3, #0
-   14ac4:	e6dd      	b.n	14882 <__divdi3+0xfa>
-   14ac6:	0000      	lsls	r0, r0, #0
-   14ac8:	ffff 0000 	vaddl.u<illegal width 64>	q8, d15, d0
-   14acc:	537c      	strh	r4, [r7, r5]
-   14ace:	0001      	lsls	r1, r0, #0
-   14ad0:	ffff 00ff 	vshr.u64	q8, <illegal reg q15.5>, #1
-   14ad4:	1c19      	adds	r1, r3, #0
-   14ad6:	409e      	lsls	r6, r3
-   14ad8:	1c3c      	adds	r4, r7, #0
-   14ada:	1ad3      	subs	r3, r2, r3
-   14adc:	464d      	mov	r5, r9
-   14ade:	40dc      	lsrs	r4, r3
-   14ae0:	40dd      	lsrs	r5, r3
-   14ae2:	1c3a      	adds	r2, r7, #0
-   14ae4:	4b40      	ldr	r3, [pc, #256]	(14be8 <.text+0x14be8>)
-   14ae6:	408a      	lsls	r2, r1
-   14ae8:	0c37      	lsrs	r7, r6, #16
-   14aea:	432a      	orrs	r2, r5
-   14aec:	4033      	ands	r3, r6
-   14aee:	1c39      	adds	r1, r7, #0
-   14af0:	1c20      	adds	r0, r4, #0
-   14af2:	469b      	mov	fp, r3
-   14af4:	9206      	str	r2, [sp, #24]
-   14af6:	f7fe fbd1 	bl	1329c <__aeabi_uidiv>
-   14afa:	1c39      	adds	r1, r7, #0
-   14afc:	9003      	str	r0, [sp, #12]
-   14afe:	465d      	mov	r5, fp
-   14b00:	4345      	muls	r5, r0
-   14b02:	1c20      	adds	r0, r4, #0
-   14b04:	f7fe fc62 	bl	133cc <__umodsi3>
-   14b08:	9906      	ldr	r1, [sp, #24]
-   14b0a:	0400      	lsls	r0, r0, #16
-   14b0c:	0c0b      	lsrs	r3, r1, #16
-   14b0e:	4318      	orrs	r0, r3
-   14b10:	4285      	cmp	r5, r0
-   14b12:	d905      	bls.n	14b20 <.text+0x14b20>
-   14b14:	9a03      	ldr	r2, [sp, #12]
-   14b16:	1980      	adds	r0, r0, r6
-   14b18:	3a01      	subs	r2, #1
-   14b1a:	9203      	str	r2, [sp, #12]
-   14b1c:	4286      	cmp	r6, r0
-   14b1e:	d946      	bls.n	14bae <.text+0x14bae>
-   14b20:	1b44      	subs	r4, r0, r5
-   14b22:	1c20      	adds	r0, r4, #0
-   14b24:	1c39      	adds	r1, r7, #0
-   14b26:	f7fe fbb9 	bl	1329c <__aeabi_uidiv>
-   14b2a:	465b      	mov	r3, fp
-   14b2c:	4680      	mov	r8, r0
-   14b2e:	1c39      	adds	r1, r7, #0
-   14b30:	1c20      	adds	r0, r4, #0
-   14b32:	4645      	mov	r5, r8
-   14b34:	435d      	muls	r5, r3
-   14b36:	f7fe fc49 	bl	133cc <__umodsi3>
-   14b3a:	4b2b      	ldr	r3, [pc, #172]	(14be8 <.text+0x14be8>)
-   14b3c:	9c06      	ldr	r4, [sp, #24]
-   14b3e:	0400      	lsls	r0, r0, #16
-   14b40:	4023      	ands	r3, r4
-   14b42:	4318      	orrs	r0, r3
-   14b44:	4285      	cmp	r5, r0
-   14b46:	d909      	bls.n	14b5c <.text+0x14b5c>
-   14b48:	2101      	movs	r1, #1
-   14b4a:	4249      	negs	r1, r1
-   14b4c:	1980      	adds	r0, r0, r6
-   14b4e:	4488      	add	r8, r1
-   14b50:	4286      	cmp	r6, r0
-   14b52:	d803      	bhi.n	14b5c <.text+0x14b5c>
-   14b54:	4285      	cmp	r5, r0
-   14b56:	d901      	bls.n	14b5c <.text+0x14b5c>
-   14b58:	4488      	add	r8, r1
-   14b5a:	1980      	adds	r0, r0, r6
-   14b5c:	9c03      	ldr	r4, [sp, #12]
-   14b5e:	464a      	mov	r2, r9
-   14b60:	4653      	mov	r3, sl
-   14b62:	409a      	lsls	r2, r3
-   14b64:	1b45      	subs	r5, r0, r5
-   14b66:	0423      	lsls	r3, r4, #16
-   14b68:	4640      	mov	r0, r8
-   14b6a:	4318      	orrs	r0, r3
-   14b6c:	4691      	mov	r9, r2
-   14b6e:	9004      	str	r0, [sp, #16]
-   14b70:	e645      	b.n	147fe <__divdi3+0x76>
-   14b72:	4651      	mov	r1, sl
-   14b74:	464b      	mov	r3, r9
-   14b76:	408b      	lsls	r3, r1
-   14b78:	1c39      	adds	r1, r7, #0
-   14b7a:	0412      	lsls	r2, r2, #16
-   14b7c:	4031      	ands	r1, r6
-   14b7e:	1852      	adds	r2, r2, r1
-   14b80:	4293      	cmp	r3, r2
-   14b82:	d29d      	bcs.n	14ac0 <__divdi3+0x338>
-   14b84:	1e68      	subs	r0, r5, #1
-   14b86:	2300      	movs	r3, #0
-   14b88:	e67b      	b.n	14882 <__divdi3+0xfa>
-   14b8a:	2108      	movs	r1, #8
-   14b8c:	2308      	movs	r3, #8
-   14b8e:	e696      	b.n	148be <__divdi3+0x136>
-   14b90:	2018      	movs	r0, #24
-   14b92:	2318      	movs	r3, #24
-   14b94:	e6ef      	b.n	14976 <__divdi3+0x1ee>
-   14b96:	2108      	movs	r1, #8
-   14b98:	2308      	movs	r3, #8
-   14b9a:	e61e      	b.n	147da <__divdi3+0x52>
-   14b9c:	2008      	movs	r0, #8
-   14b9e:	2308      	movs	r3, #8
-   14ba0:	e6e9      	b.n	14976 <__divdi3+0x1ee>
-   14ba2:	2118      	movs	r1, #24
-   14ba4:	2318      	movs	r3, #24
-   14ba6:	e618      	b.n	147da <__divdi3+0x52>
-   14ba8:	2118      	movs	r1, #24
-   14baa:	2318      	movs	r3, #24
-   14bac:	e687      	b.n	148be <__divdi3+0x136>
-   14bae:	4285      	cmp	r5, r0
-   14bb0:	d9b6      	bls.n	14b20 <.text+0x14b20>
-   14bb2:	3a01      	subs	r2, #1
-   14bb4:	1980      	adds	r0, r0, r6
-   14bb6:	9203      	str	r2, [sp, #12]
-   14bb8:	e7b2      	b.n	14b20 <.text+0x14b20>
-   14bba:	4286      	cmp	r6, r0
-   14bbc:	d800      	bhi.n	14bc0 <.text+0x14bc0>
-   14bbe:	e75e      	b.n	14a7e <__divdi3+0x2f6>
-   14bc0:	3d01      	subs	r5, #1
-   14bc2:	4440      	add	r0, r8
-   14bc4:	e75b      	b.n	14a7e <__divdi3+0x2f6>
-   14bc6:	4285      	cmp	r5, r0
-   14bc8:	d800      	bhi.n	14bcc <.text+0x14bcc>
-   14bca:	e741      	b.n	14a50 <__divdi3+0x2c8>
-   14bcc:	4493      	add	fp, r2
-   14bce:	4440      	add	r0, r8
-   14bd0:	e73e      	b.n	14a50 <__divdi3+0x2c8>
-   14bd2:	3d01      	subs	r5, #1
-   14bd4:	e649      	b.n	1486a <__divdi3+0xe2>
-   14bd6:	3d01      	subs	r5, #1
-   14bd8:	e6bf      	b.n	1495a <__divdi3+0x1d2>
-   14bda:	44ba      	add	sl, r7
-   14bdc:	1980      	adds	r0, r0, r6
-   14bde:	e6a2      	b.n	14926 <__divdi3+0x19e>
-   14be0:	4498      	add	r8, r3
-   14be2:	1980      	adds	r0, r0, r6
-   14be4:	e626      	b.n	14834 <__divdi3+0xac>
-   14be6:	0000      	lsls	r0, r0, #0
-   14be8:	ffff 0000 	vaddl.u<illegal width 64>	q8, d15, d0
-
-00014bec <____umodsi3_from_arm>:
-   14bec:	e59fc000 	ldr	ip, [pc, #0]	; 14bf4 <____umodsi3_from_arm+0x8>
-   14bf0:	e12fff1c 	bx	ip
-   14bf4:	000133cd 	andeq	r3, r1, sp, asr #7
-
-00014bf8 <____divdi3_from_arm>:
-   14bf8:	e59fc000 	ldr	ip, [pc, #0]	; 14c00 <____divdi3_from_arm+0x8>
-   14bfc:	e12fff1c 	bx	ip
-   14c00:	00014789 	andeq	r4, r1, r9, lsl #15
-
-00014c04 <__pow_from_arm>:
-   14c04:	e59fc000 	ldr	ip, [pc, #0]	; 14c0c <__pow_from_arm+0x8>
-   14c08:	e12fff1c 	bx	ip
-   14c0c:	00010ecd 	andeq	r0, r1, sp, asr #29
-
-00014c10 <__sin_from_arm>:
-   14c10:	e59fc000 	ldr	ip, [pc, #0]	; 14c18 <__sin_from_arm+0x8>
-   14c14:	e12fff1c 	bx	ip
-   14c18:	00010e21 	andeq	r0, r1, r1, lsr #28
-
-00014c1c <__cos_from_arm>:
-   14c1c:	e59fc000 	ldr	ip, [pc, #0]	; 14c24 <__cos_from_arm+0x8>
-   14c20:	e12fff1c 	bx	ip
-   14c24:	00010d79 	andeq	r0, r1, r9, ror sp
-
-00014c28 <__puts_from_arm>:
-   14c28:	e59fc000 	ldr	ip, [pc, #0]	; 14c30 <__puts_from_arm+0x8>
-   14c2c:	e12fff1c 	bx	ip
-   14c30:	0000cbdd 	ldreqd	ip, [r0], -sp
-
-00014c34 <__printf_from_arm>:
-   14c34:	e59fc000 	ldr	ip, [pc, #0]	; 14c3c <__printf_from_arm+0x8>
-   14c38:	e12fff1c 	bx	ip
-   14c3c:	0000cb55 	andeq	ip, r0, r5, asr fp
-
-00014c40 <__sqrt_from_arm>:
-   14c40:	e59fc000 	ldr	ip, [pc, #0]	; 14c48 <__sqrt_from_arm+0x8>
-   14c44:	e12fff1c 	bx	ip
-   14c48:	00011209 	andeq	r1, r1, r9, lsl #4
-
-00014c4c <____udivsi3_from_arm>:
-   14c4c:	e59fc000 	ldr	ip, [pc, #0]	; 14c54 <____udivsi3_from_arm+0x8>
-   14c50:	e12fff1c 	bx	ip
-   14c54:	0001329d 	muleq	r1, sp, r2
-
-00014c58 <__memcpy_from_arm>:
-   14c58:	e59fc000 	ldr	ip, [pc, #0]	; 14c60 <__memcpy_from_arm+0x8>
-   14c5c:	e12fff1c 	bx	ip
-   14c60:	0000cb35 	andeq	ip, r0, r5, lsr fp
-
-00014c64 <____ltdf2_from_thumb>:
-   14c64:	4778      	bx	pc
-   14c66:	46c0      	nop			(mov r8, r8)
-
-00014c68 <____ltdf2_change_to_arm>:
-   14c68:	eafffc75 	b	13e44 <__ledf2>
-
-00014c6c <____nedf2_from_thumb>:
-   14c6c:	4778      	bx	pc
-   14c6e:	46c0      	nop			(mov r8, r8)
-
-00014c70 <____nedf2_change_to_arm>:
-   14c70:	eafffc75 	b	13e4c <__cmpdf2>
-
-00014c74 <____eqdf2_from_thumb>:
-   14c74:	4778      	bx	pc
-   14c76:	46c0      	nop			(mov r8, r8)
-
-00014c78 <____eqdf2_change_to_arm>:
-   14c78:	eafffc73 	b	13e4c <__cmpdf2>
-
-00014c7c <____floatsidf_from_thumb>:
-   14c7c:	4778      	bx	pc
-   14c7e:	46c0      	nop			(mov r8, r8)
-
-00014c80 <____floatsidf_change_to_arm>:
-   14c80:	eafffb0b 	b	138b4 <__aeabi_i2d>
-
-00014c84 <____adddf3_from_thumb>:
-   14c84:	4778      	bx	pc
-   14c86:	46c0      	nop			(mov r8, r8)
-
-00014c88 <____adddf3_change_to_arm>:
-   14c88:	eafffa3b 	b	1357c <__adddf3>
-
-00014c8c <____subdf3_from_thumb>:
-   14c8c:	4778      	bx	pc
-   14c8e:	46c0      	nop			(mov r8, r8)
-
-00014c90 <____subdf3_change_to_arm>:
-   14c90:	eafffa38 	b	13578 <__aeabi_dsub>
-
-00014c94 <____muldf3_from_thumb>:
-   14c94:	4778      	bx	pc
-   14c96:	46c0      	nop			(mov r8, r8)
-
-00014c98 <____muldf3_change_to_arm>:
-   14c98:	eafffb40 	b	139a0 <__aeabi_dmul>
-
-00014c9c <____fixdfsi_from_thumb>:
-   14c9c:	4778      	bx	pc
-   14c9e:	46c0      	nop			(mov r8, r8)
-
-00014ca0 <____fixdfsi_change_to_arm>:
-   14ca0:	eafffcb5 	b	13f7c <__aeabi_d2iz>
-
-00014ca4 <____divdf3_from_thumb>:
-   14ca4:	4778      	bx	pc
-   14ca6:	46c0      	nop			(mov r8, r8)
-
-00014ca8 <____divdf3_change_to_arm>:
-   14ca8:	eafffbe0 	b	13c30 <__aeabi_ddiv>
-
-00014cac <____gtdf2_from_thumb>:
-   14cac:	4778      	bx	pc
-   14cae:	46c0      	nop			(mov r8, r8)
-
-00014cb0 <____gtdf2_change_to_arm>:
-   14cb0:	eafffc61 	b	13e3c <__gedf2>
-
-00014cb4 <____gedf2_from_thumb>:
-   14cb4:	4778      	bx	pc
-   14cb6:	46c0      	nop			(mov r8, r8)
-
-00014cb8 <____gedf2_change_to_arm>:
-   14cb8:	eafffc5f 	b	13e3c <__gedf2>
-
-00014cbc <___sbrk_r_from_thumb>:
-   14cbc:	4778      	bx	pc
-   14cbe:	46c0      	nop			(mov r8, r8)
-
-00014cc0 <___sbrk_r_change_to_arm>:
-   14cc0:	eaffda0c 	b	b4f8 <_sbrk_r>
-
-00014cc4 <___fstat_r_from_thumb>:
-   14cc4:	4778      	bx	pc
-   14cc6:	46c0      	nop			(mov r8, r8)
-
-00014cc8 <___fstat_r_change_to_arm>:
-   14cc8:	eaffd9f1 	b	b494 <_fstat_r>
-
-00014ccc <__isatty_from_thumb>:
-   14ccc:	4778      	bx	pc
-   14cce:	46c0      	nop			(mov r8, r8)
-
-00014cd0 <__isatty_change_to_arm>:
-   14cd0:	eaffd9fe 	b	b4d0 <isatty>
-
-00014cd4 <___close_r_from_thumb>:
-   14cd4:	4778      	bx	pc
-   14cd6:	46c0      	nop			(mov r8, r8)
-
-00014cd8 <___close_r_change_to_arm>:
-   14cd8:	eaffd9d5 	b	b434 <_close_r>
-
-00014cdc <___lseek_r_from_thumb>:
-   14cdc:	4778      	bx	pc
-   14cde:	46c0      	nop			(mov r8, r8)
-
-00014ce0 <___lseek_r_change_to_arm>:
-   14ce0:	eaffd9de 	b	b460 <_lseek_r>
-
-00014ce4 <___write_r_from_thumb>:
-   14ce4:	4778      	bx	pc
-   14ce6:	46c0      	nop			(mov r8, r8)
-
-00014ce8 <___write_r_change_to_arm>:
-   14ce8:	eaffd9aa 	b	b398 <_write_r>
-
-00014cec <___read_r_from_thumb>:
-   14cec:	4778      	bx	pc
-   14cee:	46c0      	nop			(mov r8, r8)
-
-00014cf0 <___read_r_change_to_arm>:
-   14cf0:	eaffd970 	b	b2b8 <_read_r>
-
-00014cf4 <____ledf2_from_thumb>:
-   14cf4:	4778      	bx	pc
-   14cf6:	46c0      	nop			(mov r8, r8)
-
-00014cf8 <____ledf2_change_to_arm>:
-   14cf8:	eafffc51 	b	13e44 <__ledf2>
-   14cfc:	72500a0a 	subvcs	r0, r0, #40960	; 0xa000
-   14d00:	6172676f 	cmnvs	r2, pc, ror #14
-   14d04:	69206d6d 	stmvsdb	r0!, {r0, r2, r3, r5, r6, r8, sl, fp, sp, lr}
-   14d08:	75722073 	ldrvcb	r2, [r2, #-115]!
-   14d0c:	6e696e6e 	cdpvs	14, 6, cr6, cr9, cr14, {3}
-   14d10:	2e2e2067 	cdpcs	0, 2, cr2, cr14, cr7, {3}
-   14d14:	0000202e 	andeq	r2, r0, lr, lsr #32
-   14d18:	636f7250 	cmnvs	pc, #5	; 0x5
-   14d1c:	6f737365 	svcvs	0x00737365
-   14d20:	6c432072 	mcrrvs	0, 7, r2, r3, cr2
-   14d24:	206b636f 	rsbcs	r6, fp, pc, ror #6
-   14d28:	71657246 	cmnvc	r5, r6, asr #4
-   14d2c:	636e6575 	cmnvs	lr, #490733568	; 0x1d400000
-   14d30:	25203a79 	strcs	r3, [r0, #-2681]!
-   14d34:	7a482064 	bvc	121cecc <__ctors_end__+0x120799c>
-   14d38:	0000000a 	andeq	r0, r0, sl
-   14d3c:	69726550 	ldmvsdb	r2!, {r4, r6, r8, sl, sp, lr}^
-   14d40:	72656870 	rsbvc	r6, r5, #7340032	; 0x700000
-   14d44:	43206c61 	teqmi	r0, #24832	; 0x6100
-   14d48:	6b636f6c 	blvs	18f0b00 <__ctors_end__+0x18db5d0>
-   14d4c:	65724620 	ldrvsb	r4, [r2, #-1568]!
-   14d50:	6e657571 	mcrvs	5, 3, r7, cr5, cr1, {3}
-   14d54:	203a7963 	eorcss	r7, sl, r3, ror #18
-   14d58:	48206425 	stmmida	r0!, {r0, r2, r5, sl, sp, lr}
-   14d5c:	00000a7a 	andeq	r0, r0, sl, ror sl
-
-00014d60 <GPS_CFG_PRT>:
-   14d60:	00140006 00000001 000808d0 0000e100     ................
-   14d70:	00010007 00000000 13062de4                       .........-
-
-00014d7a <GPS_CFG_ANT>:
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-00014e08 <GPS_CFG_SBAS>:
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-	...
-   14e42:	08066458                                         Xd
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-00014e44 <GPS_CFG_RATE>:
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-
-00014e50 <GPS_CFG_CFG>:
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-   14e60:	b5af2107                                         .!.
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-00014fdc <blanks.3062>:
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-
-00015008 <lconv>:
-   15008:	000154d8 000154b4 000154b4 000154b4     .T...T...T...T..
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-
-00015038 <charset>:
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-0001503c <__mprec_tens>:
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-   150fc:	44ea7843 79d99db4                       Cx.D...y
-
-00015104 <__mprec_bigtens>:
-   15104:	4341c379 37e08000 4693b8b5 b5056e17     y.AC...7...F.n..
-   15114:	4d384f03 e93ff9f5 5a827748 f9301d32     .O8M..?.Hw.Z2.0.
-   15124:	75154fdd 7f73bf3c                       .O.u<.s.
-
-0001512c <__mprec_tinytens>:
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-   1514c:	0ac80628 64ac6f43                       (...Co.d
-
-00015154 <p05.2298>:
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-
-00015160 <bp>:
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-
-00015170 <dp_l>:
-	...
-   15178:	3e4cfdeb 43cfd006                       ..L>...C
-
-00015180 <dp_h>:
-	...
-   15188:	3fe2b803 40000000                       ...?...@
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-00015190 <npio2_hw>:
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-   151e0:	40407e4c 4041475c 4042106c 4042d97c     L~@@\GA@l.B@|.B@
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-
-00015210 <two_over_pi>:
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-   15220:	00f534dd 00c0db62 0095993c 00439041     .4..b...<...A.C.
-   15230:	00fe5163 00abdebb 00c561b7 00246e3a     cQ.......a..:n$.
-   15240:	00424dd2 00e00649 002eea09 00d1921c     .MB.I...........
-   15250:	00fe1deb 001cb129 00a73ee8 008235f5     ....)....>...5..
-   15260:	002ebb44 0084e99c 007026b4 005f7e41     D........&p.A~_.
-   15270:	003991d6 00398353 0039f49c 00845f8b     ..9.S.9...9.._..
-   15280:	00bdf928 003b1ff8 0097ffde 0005980f     (.....;.........
-   15290:	00ef2f11 008b5a0a 006d1f6d 00367ecf     ./...Z..m.m..~6.
-   152a0:	0027cb09 00b74f46 003f669e 005fea2d     ..'.FO...f?.-._.
-   152b0:	007527ba 00c7ebe5 00f17b3d 000739f7     .'u.....={...9..
-   152c0:	008a5292 00ea6bfb 005fb11f 008d5d08     .R...k...._..]..
-   152d0:	00560330 0046fc7b 006babf0 00cfbc20     0.V.{.F...k. ...
-   152e0:	009af436 001da9e3 0091615e 00e61b08     6.......^a......
-   152f0:	00659985 005f14a0 0068408d 00ffd880     ..e..._..@h.....
-   15300:	004d7327 00310606 001556ca 0073a8c9     'sM...1..V....s.
-   15310:	0060e27b 00c08c6b                       {.`.k...
-
-00015318 <init_jk>:
-   15318:	00000002 00000003 00000004 00000006     ................
-
-00015328 <PIo2>:
-   15328:	3ff921fb 40000000 3e74442d 00000000     .!.?...@-Dt>....
-   15338:	3cf84698 80000000 3b78cc51 60000000     .F.<....Q.x;...`
-   15348:	39f01b83 80000000 387a2520 40000000     ...9.... %z8...@
-   15358:	36e38222 80000000 3569f31d 00000000     "..6......i5....
-
-00015368 <__fdlib_version>:
-   15368:	00000001                                ....
-
-0001536c <TWO52>:
-   1536c:	43300000 00000000 c3300000 00000000     ..0C......0.....
-
-0001537c <__clz_tab>:
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-   1538c:	05050505 05050505 05050505 05050505     ................
-   1539c:	06060606 06060606 06060606 06060606     ................
-   153ac:	06060606 06060606 06060606 06060606     ................
-   153bc:	07070707 07070707 07070707 07070707     ................
-   153cc:	07070707 07070707 07070707 07070707     ................
-   153dc:	07070707 07070707 07070707 07070707     ................
-   153ec:	07070707 07070707 07070707 07070707     ................
-   153fc:	08080808 08080808 08080808 08080808     ................
-   1540c:	08080808 08080808 08080808 08080808     ................
-   1541c:	08080808 08080808 08080808 08080808     ................
-   1542c:	08080808 08080808 08080808 08080808     ................
-   1543c:	08080808 08080808 08080808 08080808     ................
-   1544c:	08080808 08080808 08080808 08080808     ................
-   1545c:	08080808 08080808 08080808 08080808     ................
-   1546c:	08080808 08080808 08080808 08080808     ................
-   1547c:	0000000a 33323130 37363534 62613938     ....0123456789ab
-   1548c:	66656463 00000000 00666e69 00464e49     cdef....inf.INF.
-   1549c:	004e414e 006e616e 33323130 37363534     NAN.nan.01234567
-   154ac:	42413938 46454443 00000000 20677562     89ABCDEF....bug 
-   154bc:	76206e69 69727066 3a66746e 64616220     in vfprintf: bad
-   154cc:	73616220 00000065 00000030 0000002e      base...0.......
-   154dc:	6c756e28 0000296c 54552d43 00382d46     (null)..C-UTF-8.
-   154ec:	4a532d43 00005349 55452d43 00504a43     C-SJIS..C-EUCJP.
-   154fc:	494a2d43 00000053 69666e49 7974696e     C-JIS...Infinity
-   1550c:	00000000 004e614e 00000043 2d4f5349     ....NaN.C...ISO-
-   1551c:	39353838 0000312d 00776f70 74727173     8859-1..pow.sqrt
-   1552c:	00000000                                ....
diff --git a/ccny_asctec_firmware/main.map b/ccny_asctec_firmware/main.map
deleted file mode 100644
index 3f3c7db..0000000
--- a/ccny_asctec_firmware/main.map
+++ /dev/null
@@ -1,2765 +0,0 @@
-Archive member included because of file (symbol)
-
-c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(memcpy.o)
-                              src/uart.o (memcpy)
-c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(printf.o)
-                              src/main.o (printf)
-c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(puts.o)
-                              src/main.o (puts)
-c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(strlen.o)
-                              c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(puts.o) (strlen)
-c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(vfprintf.o)
-                              c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(printf.o) (_vfprintf_r)
-c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(wcrtomb.o)
-                              c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(vfprintf.o) (_wcrtomb_r)
-c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(wcsrtombs.o)
-                              c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(vfprintf.o) (_wcsrtombs_r)
-c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(wctomb_r.o)
-                              c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(wcrtomb.o) (_wctomb_r)
-c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(wsetup.o)
-                              c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(vfprintf.o) (__swsetup)
-c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(dtoa.o)
-                              c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(vfprintf.o) (_dtoa_r)
-c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(fflush.o)
-                              c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(vfprintf.o) (fflush)
-c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(findfp.o)
-                              c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(vfprintf.o) (__sinit)
-c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(freer.o)
-                              c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(vfprintf.o) (_free_r)
-c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(fvwrite.o)
-                              c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(puts.o) (__sfvwrite)
-c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(fwalk.o)
-                              c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(fflush.o) (_fwalk)
-c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(impure.o)
-                              c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(printf.o) (_impure_ptr)
-c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(locale.o)
-                              c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(vfprintf.o) (localeconv)
-c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(makebuf.o)
-                              c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(wsetup.o) (__smakebuf)
-c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(mallocr.o)
-                              c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(vfprintf.o) (_malloc_r)
-c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(memchr.o)
-                              c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(vfprintf.o) (memchr)
-c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(memmove.o)
-                              c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(fvwrite.o) (memmove)
-c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(memset.o)
-                              c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(vfprintf.o) (memset)
-c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(mlock.o)
-                              c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(freer.o) (__malloc_lock)
-c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(mprec.o)
-                              c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(dtoa.o) (_Bfree)
-c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(reallocr.o)
-                              c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(fvwrite.o) (_realloc_r)
-c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(s_isinf.o)
-                              c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(vfprintf.o) (isinf)
-c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(s_isnan.o)
-                              c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(vfprintf.o) (isnan)
-c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(stdio.o)
-                              c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(findfp.o) (__sclose)
-c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(strcmp.o)
-                              c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(wctomb_r.o) (strcmp)
-c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(callocr.o)
-                              c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(mprec.o) (_calloc_r)
-c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(fclose.o)
-                              c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(findfp.o) (fclose)
-c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(s_cos.o)
-                              src/pid.o (cos)
-c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(s_sin.o)
-                              src/pid.o (sin)
-c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(w_pow.o)
-                              src/pid.o (pow)
-c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(w_sqrt.o)
-                              src/main.o (sqrt)
-c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(e_pow.o)
-                              c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(w_pow.o) (__ieee754_pow)
-c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(e_rem_pio2.o)
-                              c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(s_cos.o) (__ieee754_rem_pio2)
-c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(e_sqrt.o)
-                              c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(w_sqrt.o) (__ieee754_sqrt)
-c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(k_cos.o)
-                              c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(s_cos.o) (__kernel_cos)
-c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(k_rem_pio2.o)
-                              c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(e_rem_pio2.o) (__kernel_rem_pio2)
-c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(k_sin.o)
-                              c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(s_cos.o) (__kernel_sin)
-c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(s_fabs.o)
-                              c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(e_pow.o) (fabs)
-c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(s_finite.o)
-                              c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(w_pow.o) (finite)
-c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(s_floor.o)
-                              c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(k_rem_pio2.o) (floor)
-c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(s_lib_ver.o)
-                              c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(w_pow.o) (__fdlib_version)
-c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(s_matherr.o)
-                              c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(w_pow.o) (matherr)
-c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(s_rint.o)
-                              c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(w_pow.o) (rint)
-c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(s_scalbn.o)
-                              c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(e_pow.o) (scalbn)
-c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(s_copysign.o)
-                              c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(s_scalbn.o) (copysign)
-c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(errno.o)
-                              c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(w_pow.o) (__errno)
-c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_udivsi3.o)
-                              src/system.o (__udivsi3)
-c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_divsi3.o)
-                              c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(vfprintf.o) (__divsi3)
-c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_umodsi3.o)
-                              src/sdk.o (__umodsi3)
-c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_modsi3.o)
-                              c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(vfprintf.o) (__modsi3)
-c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_dvmd_tls.o)
-                              c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_udivsi3.o) (__div0)
-c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_addsubdf3.o)
-                              src/sdk.o (__subdf3)
-c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_muldivdf3.o)
-                              src/sdk.o (__muldf3)
-c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_cmpdf2.o)
-                              src/sdk.o (__gtdf2)
-c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_fixdfsi.o)
-                              src/comm_util_LL.o (__fixdfsi)
-c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_truncdfsf2.o)
-                              src/sdk.o (__truncdfsf2)
-c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_addsubsf3.o)
-                              src/pid.o (__subsf3)
-c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_muldivsf3.o)
-                              src/pid.o (__mulsf3)
-c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_cmpsf2.o)
-                              src/sdk.o (__gtsf2)
-c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_fixsfsi.o)
-                              src/pid.o (__fixsfsi)
-c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_divdi3.o)
-                              src/sdk.o (__divdi3)
-c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_clz.o)
-                              c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_divdi3.o) (__clz_tab)
-
-Allocating common symbols
-Common symbol       size              file
-
-LL_1khz_attitude_data
-                    0x5c              src/LL_HL_comm.o
-pid_vy              0x24              src/pid.o
-g_kf_z_enabled      0x1               src/sdk.o
-WO_CTRL_Input       0xc               src/sdk.o
-I2CReadLength       0x4               src/i2c.o
-g_ctrl_debug_pkt    0x72              src/sdk.o
-GPS_Time            0x8               src/main.o
-I2CSlaveBuffer      0x20              src/i2c.o
-g_dummy_pkt_info    0x4               src/sdk.o
-g_imu_pkt           0x24              src/sdk.o
-g_tx_freq_cfg_pkt_info
-                    0x4               src/sdk.o
-g_ctrl_cfg_pkt_info
-                    0x4               src/sdk.o
-g_accel_z           0x4               src/kalman.o
-CurrentRxIndex      0x4               src/ssp.o
-uart0_tx_cpsr       0x4               src/uart.o
-g_tx_freq_cfg_pkt   0x18              src/sdk.o
-covariance          0x38              src/LL_HL_comm.o
-WO_Direct_Motor_Control
-                    0x4               src/sdk.o
-g_motors_running    0x2               src/sdk.o
-SPIWR_num_bytes     0x4               src/ssp.o
-g_timesync_pkt_info
-                    0x4               src/sdk.o
-g_accel_x           0x4               src/kalman.o
-packetInfo          0x300             src/uart.o
-g_des_pose_pkt_info
-                    0x4               src/sdk.o
-kal_yaw             0x28              src/LL_HL_comm.o
-g_rcdata_pkt        0x18              src/sdk.o
-g_dummy_pkt         0x1               src/sdk.o
-g_mav_kf_cfg_pkt    0x41              src/sdk.o
-pid_yaw             0x24              src/pid.o
-g_des_vel_pkt       0x10              src/sdk.o
-CurrentTxIndex      0x4               src/ssp.o
-g_sin_psi           0x4               src/kalman.o
-IMU_CalcData        0x5c              src/main.o
-WO_SDK              0x4               src/sdk.o
-rxParseBuffer       0x200             src/uart.o
-g_flight_state_pkt  0x1               src/sdk.o
-uart0_rx_cpsr       0x4               src/uart.o
-g_kf_x_enabled      0x1               src/sdk.o
-UART_rxptr          0x4               src/uart.o
-g_imu_gravity       0x4               src/main.o
-g_ctrl_cfg_pkt      0x24              src/sdk.o
-GPS_init_status     0x1               src/LL_HL_comm.o
-txFifo              0x1c              src/uart.o
-g_ctrl_input_pkt_info
-                    0x4               src/sdk.o
-g_toggle_motors_start_time
-                    0x8               src/sdk.o
-g_accel_y           0x4               src/kalman.o
-I2CMode             0x4               src/i2c.o
-kal_y               0xc4              src/LL_HL_comm.o
-pid_x               0x24              src/pid.o
-IMU_RawData         0x1c              src/main.o
-LL_1khz_control_input
-                    0x38              src/LL_HL_comm.o
-I2CMasterBuffer     0x20              src/i2c.o
-I2CCmd              0x4               src/i2c.o
-g_sdk_loops         0x4               src/sdk.o
-g_des_pose_pkt      0x10              src/sdk.o
-send_buffer         0x10              src/uart1.o
-kal_out             0x1c              src/LL_HL_comm.o
-iap_entry           0x4               src/LPC2k_ee.o
-g_status_pkt        0x18              src/sdk.o
-current_chksum      0x2               src/uart1.o
-RO_RC_Data          0x10              src/sdk.o
-pid_z               0x24              src/pid.o
-g_mav_height_pkt_info
-                    0x4               src/sdk.o
-rxBuffer            0x200             src/uart.o
-g_flight_action_pkt_info
-                    0x4               src/sdk.o
-rxFifo              0x1c              src/uart.o
-g_mav_kf_cfg_pkt_info
-                    0x4               src/sdk.o
-txBuffer            0x200             src/uart.o
-pid_vx              0x24              src/pid.o
-g_pid_cfg_pkt       0xbc              src/sdk.o
-I2CWriteLength      0x4               src/i2c.o
-SPIWRData           0x80              src/ssp.o
-GPS_Data            0x2c              src/gpsmath.o
-tx_buff             0x4               src/uart1.o
-SYSTEM_Permanent_Data
-                    0x14              src/main.o
-g_ctrl_cmd          0x10              src/sdk.o
-g_timesync_pkt      0x10              src/sdk.o
-g_mav_pose2D_pkt_info
-                    0x4               src/sdk.o
-packetsTemp         0x1               src/main.o
-g_pose_pkt          0x24              src/sdk.o
-g_flight_action_pkt
-                    0x1               src/sdk.o
-HL_Status           0x18              src/main.o
-UART1_rxptr         0x4               src/uart1.o
-g_mav_pose2D_pkt    0x14              src/sdk.o
-g_pid_cfg_pkt_info  0x4               src/sdk.o
-gps_data_temp       0x2c              src/gpsmath.o
-SPIRDData           0x80              src/ssp.o
-g_cos_psi           0x4               src/kalman.o
-ADC0Value           0x20              src/adc.o
-uart_cnt            0x4               src/main.o
-IMU_CalcData_tmp    0x5c              src/main.o
-g_des_vel_pkt_info  0x4               src/sdk.o
-ADC1Value           0x20              src/adc.o
-kal_x               0xc4              src/LL_HL_comm.o
-pid_y               0x24              src/pid.o
-g_ctrl_input_pkt    0x10              src/sdk.o
-pid_vz              0x24              src/pid.o
-kal_z               0xc4              src/LL_HL_comm.o
-g_mav_height_pkt    0x8               src/sdk.o
-g_kf_y_enabled      0x1               src/sdk.o
-g_kf_yaw_enabled    0x1               src/sdk.o
-
-Memory Configuration
-
-Name             Origin             Length             Attributes
-ROM              0x00000000         0x00080000         xr
-RAM              0x40000000         0x00008000         rw
-*default*        0x00000000         0xffffffff
-
-Linker script and memory map
-
-LOAD external/Common_WinARM/src/Startup.o
-LOAD external/Common_WinARM/src/swi_handler.o
-LOAD src/LL_HL_comm.o
-LOAD src/gpsmath.o
-LOAD src/sdk.o
-LOAD src/comm_util_LL.o
-LOAD src/util.o
-LOAD src/pid.o
-LOAD src/kalman.o
-LOAD src/matrices.o
-LOAD ../mav_common/src/comm_util.o
-LOAD src/main.o
-LOAD src/hardware.o
-LOAD src/LPC2k_ee.o
-LOAD src/system.o
-LOAD src/uart.o
-LOAD src/uart1.o
-LOAD src/syscalls.o
-LOAD src/i2c.o
-LOAD src/adc.o
-LOAD src/ssp.o
-LOAD external/Common_WinARM/src/irq.o
-LOAD external/Common_WinARM/src/interrupt_utils.o
-LOAD c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a
-LOAD c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a
-LOAD c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a
-LOAD c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a
-LOAD c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a
-START GROUP
-LOAD c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a
-LOAD c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a
-END GROUP
-
-.text           0x00000000    0x15530
- *(.vectorg)
- .vectorg       0x00000000       0x98 external/Common_WinARM/src/Startup.o
-                0x00000050                __IRQ_Wrapper
- .vectorg       0x00000098       0xd0 external/Common_WinARM/src/swi_handler.o
-                0x00000098                SoftwareInterrupt
-                0x00000168                . = ALIGN (0x4)
- *(.init)
- .init          0x00000168      0x168 external/Common_WinARM/src/Startup.o
-                0x00000294                __exit_THUMB
-                0x00000168                __startup
-                0x00000290                __exit_ARM
- *(.text .text.*)
- .text          0x000002d0        0x0 external/Common_WinARM/src/Startup.o
- .text          0x000002d0       0x38 external/Common_WinARM/src/swi_handler.o
-                0x000002e0                IntGetCPSR
-                0x00000300                FiqDisable
-                0x000002d0                IntRestore
-                0x000002f0                IntDisable
-                0x000002d8                FiqRestore
-                0x000002e8                IntEnable
-                0x000002f8                FiqEnable
- .text          0x00000308      0x6ac src/LL_HL_comm.o
-                0x00000308                SSP_data_distribution_HL
-                0x00000430                LL_write_ctrl_data
-                0x0000054c                HL2LL_write_cycle
-                0x00000724                SSP_rx_handler_HL
- .text          0x000009b4        0x0 src/gpsmath.o
- .text          0x000009b4     0x2be0 src/sdk.o
-                0x000017f4                sendRcData
-                0x000009b4                writeCommand
-                0x000023a8                SDK_mainloop
-                0x00001d98                sdkInit
-                0x00001c7c                sendImuData
-                0x00000a40                processMotorStateChanges
-                0x00001078                processKF
-                0x00000abc                processEngageDisengageTimeouts
-                0x00001888                synchronizeTime
-                0x00001868                sendMavPoseData
-                0x00001684                sendCtrlDebugData
-                0x00000a00                checkTxPeriod
-                0x000009f0                isSerialEnabled
-                0x00000e28                processFlightActionRequests
-                0x00001848                sendFlightStateData
-                0x00001f80                processSendData
-                0x00000bb8                processMotorCommands
-                0x00000f20                feedbackBeep
-                0x000017d4                sendStatusData
-                0x00000b30                processLandingThrust
- .text          0x00003594      0x468 src/comm_util_LL.o
-                0x000039a8                LLToSIAnglePitch
-                0x00003818                LLToSIAngleRatePitch
-                0x00003630                LLToSIAccX
-                0x0000360c                LLToSIClimb
-                0x00003730                SIToLLCmdPitch
-                0x0000387c                LLToSIAngleRateRoll
-                0x000037c0                LLToSIAngleRoll
-                0x000036b8                LLToSIAccZ
-                0x000036fc                SIToLLCmdRoll
-                0x0000394c                LLToSIAngleYaw
-                0x000038e4                LLToSIAngleRateYaw
-                0x00003760                SIToLLCmdYawRate
-                0x00003790                SIToLLCmdThrust
-                0x00003674                LLToSIAccY
-                0x00003594                degreesToRadians
-                0x000035d0                radiansToDegrees
- .text          0x000039fc       0x54 src/util.o
-                0x000039fc                wait
- .text          0x00003a50     0x1864 src/pid.o
-                0x00003b54                pidParamUpdate
-                0x000044ec                pidCalc
-                0x00004640                processCtrl
-                0x00003a50                pidReset
- .text          0x000052b4      0xce0 src/kalman.o
-                0x000053f8                resetKalmanFilter
-                0x00005504                CorrectPos
-                0x0000566c                KFilter
-                0x00005430                CorrectYaw
-                0x000053c8                InitKalYaw
-                0x000052b4                InitKalPos
-                0x000055bc                PredictPos
-                0x000054c0                PredictYaw
- .text          0x00005f94      0xd0c src/matrices.o
-                0x0000624c                negMatrix
-                0x000068f4                determinant
-                0x00006494                multMatVec2
-                0x00006ab0                invt
-                0x000064f0                transpose
-                0x000061cc                subVector
-                0x00006c38                VectdivSc
-                0x00005fe8                addMatrix
-                0x000060f0                subMatrix2
-                0x00006ba8                BhQhBhT
-                0x000062a8                multMatrix
-                0x00005f94                addMatrix2
-                0x00006554                invert3
-                0x00006144                subMatrix
-                0x00006a20                getMinor
-                0x00006070                addVector
-                0x0000637c                multMatrix2
-                0x000060b8                addVector2
-                0x00006214                subVector2
-                0x000063f4                multMatVec
-                0x00006864                invert2
-                0x00006c6c                VectmultSc2
- .text          0x00006ca0      0x134 ../mav_common/src/comm_util.o
-                0x00006d30                normalizeSIAnglePi
-                0x00006ca0                normalizeSIAngle2Pi
- .text          0x00006dd4      0x668 src/main.o
-                0x00006dd4                timer0ISR
-                0x00007220                mainloop
-                0x00006f18                main
-                0x00006ee0                timer1ISR
-                0x00007240                calibrate
- .text          0x0000743c       0xe8 src/hardware.o
-                0x000074c8                beeper
-                0x0000743c                LED
- .text          0x00007524      0x614 src/LPC2k_ee.o
-                0x00007524                ee_erase
-                0x00007884                ee_read
-                0x00007660                ee_write
-                0x0000797c                ee_count
-                0x00007914                ee_readn
-                0x000079f0                ee_locate
- .text          0x00007b38      0x648 src/system.o
-                0x00007d38                init_timer0
-                0x00007f64                init_spi1
-                0x00007e78                PWM_Init
-                0x00007c90                init_ports
-                0x00007b38                init
-                0x00007f2c                init_spi
-                0x00007bd4                init_interrupts
-                0x00008138                delay
-                0x00008080                processorClockFrequency
-                0x00007de0                init_timer1
-                0x00008040                pll_feed
-                0x00008000                pll_init
-                0x000080a0                peripheralClockFrequency
- .text          0x00008180     0x1480 src/uart.o
-                0x0000927c                UARTWriteChar
-                0x00008df4                writePacket2Ringbuffer
-                0x00009414                UART_send_ringbuffer
-                0x00009314                __putchar
-                0x000092cc                UARTReadChar
-                0x00008700                Fifo_availableMemory
-                0x00008f04                UART0_writeFifo
-                0x000084f0                Fifo_writeByte
-                0x000087b0                registerPacket
-                0x00008668                Fifo_readByte
-                0x00008778                Fifo_reset
-                0x000088a8                parseRxFifo
-                0x00008598                Fifo_writeBlock
-                0x00009240                UART0_txEmpty
-                0x00009358                UART_send
-                0x0000920c                UART0_txFlush
-                0x00009570                crc16
-                0x00008470                Fifo_initialize
-                0x00009480                crc_update
-                0x00009164                startAutoBaud
-                0x00008180                uart0ISR
-                0x00008f90                UARTInitialize
-                0x000091cc                UART0_rxFlush
- .text          0x00009600     0x1cb8 src/uart1.o
-                0x0000a830                UART1Initialize
-                0x0000a92c                UART1ReadChar
-                0x000099e8                parse_POSLLH
-                0x0000a2e0                uart1ISR
-                0x0000a1d8                parse_STATUS
-                0x00009e3c                parse_POSUTM
-                0x0000aa70                ringbuffer1
-                0x00009600                parse_VELNED
-                0x0000ac5c                GPS_configure
-                0x0000a8dc                UART1WriteChar
-                0x0000a008                parse_NAVSOL
-                0x0000aa08                UART1_send_ringbuffer
-                0x0000a974                UART1_send
- .text          0x0000b2b8      0x2b4 src/syscalls.o
-                0x0000b460                _lseek_r
-                0x0000b494                _fstat_r
-                0x0000b4d0                isatty
-                0x0000b4f8                _sbrk_r
-                0x0000b2b8                _read_r
-                0x0000b434                _close_r
-                0x0000b398                _write_r
- .text          0x0000b56c      0x750 src/i2c.o
-                0x0000ba08                I2C0_send_motordata
-                0x0000bc2c                I2CEngine
-                0x0000b56c                I2C0MasterHandler
-                0x0000bab4                I2CStart
-                0x0000bb48                I2CStop
-                0x0000bba4                I2CInit
- .text          0x0000bcbc      0x2cc src/adc.o
-                0x0000bcbc                ADCInit
-                0x0000be80                ADC1Read
-                0x0000bd44                ADC0Read
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-Symbol                                            File
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-ADC0Read                                          src/adc.o
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-                                                  src/system.o
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-Fifo_writeBlock                                   src/uart.o
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-FiqRestore                                        external/Common_WinARM/src/swi_handler.o
-GPS_CFG_ANT                                       src/uart1.o
-GPS_CFG_CFG                                       src/uart1.o
-GPS_CFG_MSG                                       src/uart1.o
-GPS_CFG_NAV2                                      src/uart1.o
-GPS_CFG_PRT                                       src/uart1.o
-GPS_CFG_RATE                                      src/uart1.o
-GPS_CFG_SBAS                                      src/uart1.o
-GPS_Data                                          src/uart1.o
-                                                  src/gpsmath.o
-                                                  src/LL_HL_comm.o
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-                                                  src/main.o
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-                                                  src/uart.o
-                                                  src/system.o
-                                                  src/hardware.o
-                                                  src/main.o
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-                                                  src/LL_HL_comm.o
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-                                                  src/uart.o
-                                                  src/system.o
-                                                  src/hardware.o
-                                                  src/kalman.o
-                                                  src/pid.o
-                                                  src/sdk.o
-                                                  src/LL_HL_comm.o
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-                                                  src/main.o
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-                                                  src/sdk.o
-                                                  src/LL_HL_comm.o
-I2C0MasterHandler                                 src/i2c.o
-I2C0_send_motordata                               src/i2c.o
-I2CCmd                                            src/i2c.o
-I2CCount                                          src/i2c.o
-I2CEngine                                         src/i2c.o
-I2CInit                                           src/i2c.o
-I2CMasterBuffer                                   src/i2c.o
-I2CMasterState                                    src/i2c.o
-I2CMode                                           src/i2c.o
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-I2CSlaveState                                     src/i2c.o
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-I2CStop                                           src/i2c.o
-I2CWriteLength                                    src/i2c.o
-IMU_CalcData                                      src/main.o
-                                                  src/LL_HL_comm.o
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-                                                  src/uart1.o
-                                                  src/uart.o
-                                                  src/system.o
-                                                  src/main.o
-                                                  src/kalman.o
-                                                  src/pid.o
-                                                  src/sdk.o
-                                                  src/LL_HL_comm.o
-IMU_RawData                                       src/ssp.o
-                                                  src/main.o
-InitKalPos                                        src/kalman.o
-InitKalYaw                                        src/kalman.o
-IntDisable                                        external/Common_WinARM/src/swi_handler.o
-IntEnable                                         external/Common_WinARM/src/swi_handler.o
-IntGetCPSR                                        external/Common_WinARM/src/swi_handler.o
-IntRestore                                        external/Common_WinARM/src/swi_handler.o
-KFilter                                           src/kalman.o
-                                                  src/sdk.o
-LED                                               src/hardware.o
-                                                  src/main.o
-LLToSIAccX                                        src/comm_util_LL.o
-                                                  src/kalman.o
-LLToSIAccY                                        src/comm_util_LL.o
-                                                  src/kalman.o
-LLToSIAccZ                                        src/comm_util_LL.o
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-LLToSIAnglePitch                                  src/comm_util_LL.o
-                                                  src/kalman.o
-                                                  src/pid.o
-                                                  src/sdk.o
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-                                                  src/sdk.o
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-                                                  src/pid.o
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-                                                  src/kalman.o
-                                                  src/pid.o
-                                                  src/sdk.o
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-                                                  src/kalman.o
-                                                  src/sdk.o
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-                                                  src/kalman.o
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-                                                  src/kalman.o
-                                                  src/pid.o
-                                                  src/sdk.o
-                                                  src/LL_HL_comm.o
-LL_1khz_control_input                             src/LL_HL_comm.o
-LL_write                                          src/ssp.o
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-LL_write_init                                     src/ssp.o
-                                                  src/main.o
-PWM_Init                                          src/system.o
-PredictPos                                        src/kalman.o
-PredictYaw                                        src/kalman.o
-RO_RC_Data                                        src/sdk.o
-                                                  src/LL_HL_comm.o
-RdIndex                                           src/i2c.o
-SDK_mainloop                                      src/sdk.o
-                                                  src/main.o
-SIToLLCmdPitch                                    src/comm_util_LL.o
-                                                  src/sdk.o
-SIToLLCmdRoll                                     src/comm_util_LL.o
-                                                  src/sdk.o
-SIToLLCmdThrust                                   src/comm_util_LL.o
-                                                  src/sdk.o
-SIToLLCmdYawRate                                  src/comm_util_LL.o
-                                                  src/sdk.o
-SPIRDData                                         src/ssp.o
-SPIWRData                                         src/ssp.o
-                                                  src/LL_HL_comm.o
-SPIWR_num_bytes                                   src/ssp.o
-                                                  src/LL_HL_comm.o
-SSPHandler                                        src/ssp.o
-                                                  src/system.o
-SSPReceive                                        src/ssp.o
-SSP_ack                                           src/LL_HL_comm.o
-SSP_data_distribution_HL                          src/LL_HL_comm.o
-SSP_receiption_complete                           src/ssp.o
-SSP_rx_handler_HL                                 src/LL_HL_comm.o
-                                                  src/ssp.o
-SSP_trans_cnt                                     src/ssp.o
-                                                  src/uart1.o
-                                                  src/uart.o
-                                                  src/system.o
-                                                  src/main.o
-                                                  src/kalman.o
-                                                  src/pid.o
-                                                  src/sdk.o
-                                                  src/LL_HL_comm.o
-SYSTEM_Permanent_Data                             src/main.o
-SoftwareInterrupt                                 external/Common_WinARM/src/swi_handler.o
-                                                  external/Common_WinARM/src/Startup.o
-UART0_rxFlush                                     src/uart.o
-                                                  src/sdk.o
-UART0_txEmpty                                     src/uart.o
-UART0_txFlush                                     src/uart.o
-                                                  src/sdk.o
-UART0_writeFifo                                   src/uart.o
-UART1Initialize                                   src/uart1.o
-                                                  src/system.o
-UART1ReadChar                                     src/uart1.o
-UART1WriteChar                                    src/uart1.o
-UART1_rxcount                                     src/uart1.o
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-UART1_send                                        src/uart1.o
-UART1_send_ringbuffer                             src/uart1.o
-UART1_syncstate                                   src/uart1.o
-UARTInitialize                                    src/uart.o
-                                                  src/system.o
-UARTReadChar                                      src/uart.o
-                                                  src/syscalls.o
-UARTWriteChar                                     src/uart.o
-                                                  src/syscalls.o
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-UART_send_ringbuffer                              src/uart.o
-                                                  src/sdk.o
-UART_syncstate                                    src/uart.o
-VectdivSc                                         src/matrices.o
-VectmultSc2                                       src/matrices.o
-                                                  src/kalman.o
-WO_CTRL_Input                                     src/sdk.o
-                                                  src/LL_HL_comm.o
-WO_Direct_Motor_Control                           src/sdk.o
-                                                  src/LL_HL_comm.o
-WO_SDK                                            src/sdk.o
-                                                  src/LL_HL_comm.o
-WrIndex                                           src/i2c.o
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-__aeabi_ui2d                                      c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_addsubdf3.o)
-__aeabi_ui2f                                      c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_addsubsf3.o)
-__aeabi_uidiv                                     c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_udivsi3.o)
-__aeabi_uidivmod                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_udivsi3.o)
-__aeabi_ul2d                                      c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_addsubdf3.o)
-__aeabi_ul2f                                      c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_addsubsf3.o)
-__bss_end__                                       external/Common_WinARM/src/Startup.o
-__bss_start__                                     external/Common_WinARM/src/Startup.o
-__clz_tab                                         c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_clz.o)
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-__cmpdf2                                          c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_cmpdf2.o)
-__cmpsf2                                          c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_cmpsf2.o)
-__cos_from_arm                                    c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_clz.o)
-__ctors_end__                                     external/Common_WinARM/src/Startup.o
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-__divdf3                                          c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_muldivdf3.o)
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-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(e_pow.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(w_sqrt.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(w_pow.o)
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-__divsf3                                          c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_muldivsf3.o)
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-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(vfprintf.o)
-__eqdf2                                           c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_cmpdf2.o)
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-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(e_rem_pio2.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(w_pow.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(dtoa.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(vfprintf.o)
-__eqsf2                                           c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_cmpsf2.o)
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-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(w_sqrt.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(w_pow.o)
-__exit_ARM                                        external/Common_WinARM/src/Startup.o
-__exit_THUMB                                      external/Common_WinARM/src/Startup.o
-__extendsfdf2                                     c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_addsubdf3.o)
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-                                                  src/kalman.o
-                                                  src/pid.o
-                                                  src/comm_util_LL.o
-                                                  src/sdk.o
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-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(w_pow.o)
-__fixdfsi                                         c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_fixdfsi.o)
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-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(k_rem_pio2.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(k_cos.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(e_rem_pio2.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(dtoa.o)
-                                                  src/comm_util_LL.o
-__fixsfsi                                         c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_fixsfsi.o)
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-__floatdisf                                       c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_addsubsf3.o)
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-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(e_rem_pio2.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(e_pow.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(dtoa.o)
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-__floatundisf                                     c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_addsubsf3.o)
-__floatunsidf                                     c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_addsubdf3.o)
-__floatunsisf                                     c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_addsubsf3.o)
-__fp_lock_all                                     c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(findfp.o)
-__fp_unlock_all                                   c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(findfp.o)
-__gedf2                                           c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_cmpdf2.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(k_rem_pio2.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(dtoa.o)
-                                                  ../mav_common/src/comm_util.o
-__gesf2                                           c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_cmpsf2.o)
-__gtdf2                                           c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_cmpdf2.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(s_floor.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(e_pow.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(dtoa.o)
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-__gtsf2                                           c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_cmpsf2.o)
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-__ieee754_pow                                     c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(e_pow.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(w_pow.o)
-__ieee754_rem_pio2                                c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(e_rem_pio2.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(s_sin.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(s_cos.o)
-__ieee754_sqrt                                    c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(e_sqrt.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(e_pow.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(w_sqrt.o)
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-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(s_sin.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(s_cos.o)
-__kernel_rem_pio2                                 c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(k_rem_pio2.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(e_rem_pio2.o)
-__kernel_sin                                      c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(k_sin.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(s_sin.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(s_cos.o)
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-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(wctomb_r.o)
-__ledf2                                           c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_cmpdf2.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(e_pow.o)
-__lesf2                                           c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_cmpsf2.o)
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-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(w_sqrt.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(w_pow.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(dtoa.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(vfprintf.o)
-                                                  ../mav_common/src/comm_util.o
-                                                  src/pid.o
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-__ltsf2                                           c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_cmpsf2.o)
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-                                                  src/pid.o
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-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(reallocr.o)
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-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(vfprintf.o)
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-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(s_scalbn.o)
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-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(e_sqrt.o)
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-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(e_pow.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(w_pow.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(mprec.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(dtoa.o)
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-                                                  src/kalman.o
-                                                  src/pid.o
-                                                  src/comm_util_LL.o
-                                                  src/sdk.o
-__mulsf3                                          c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_muldivsf3.o)
-                                                  src/matrices.o
-                                                  src/kalman.o
-                                                  src/pid.o
-__nedf2                                           c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_cmpdf2.o)
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-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(dtoa.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(vfprintf.o)
-__nesf2                                           c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_cmpsf2.o)
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-__printf_from_arm                                 c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_clz.o)
-__putchar                                         src/uart.o
-__puts_from_arm                                   c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_clz.o)
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-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(fwalk.o)
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-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(fwalk.o)
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-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(vfprintf.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(puts.o)
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-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(fflush.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(wsetup.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(vfprintf.o)
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-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(wsetup.o)
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-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(findfp.o)
-__startup                                         external/Common_WinARM/src/Startup.o
-__subdf3                                          c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_addsubdf3.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(s_rint.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(k_sin.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(k_rem_pio2.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(k_cos.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(e_sqrt.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(e_rem_pio2.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(e_pow.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(s_sin.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(s_cos.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(dtoa.o)
-                                                  ../mav_common/src/comm_util.o
-                                                  src/kalman.o
-                                                  src/pid.o
-                                                  src/sdk.o
-__subsf3                                          c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_addsubsf3.o)
-                                                  src/matrices.o
-                                                  src/kalman.o
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-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(findfp.o)
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-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(fvwrite.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(vfprintf.o)
-__truncdfsf2                                      c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_truncdfsf2.o)
-                                                  src/main.o
-                                                  ../mav_common/src/comm_util.o
-                                                  src/kalman.o
-                                                  src/pid.o
-                                                  src/comm_util_LL.o
-                                                  src/sdk.o
-__udivsi3                                         c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_udivsi3.o)
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-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(dtoa.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(vfprintf.o)
-                                                  src/adc.o
-                                                  src/uart1.o
-                                                  src/uart.o
-                                                  src/system.o
-__umodsi3                                         c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_umodsi3.o)
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-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(vfprintf.o)
-                                                  src/sdk.o
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-_cleanup_r                                        c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(findfp.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(makebuf.o)
-_close_r                                          src/syscalls.o
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-_d2b                                              c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(mprec.o)
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-_data                                             external/Common_WinARM/src/Startup.o
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-_edata                                            external/Common_WinARM/src/Startup.o
-_end                                              src/syscalls.o
-_etext                                            external/Common_WinARM/src/Startup.o
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-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(reallocr.o)
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-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(vfprintf.o)
-_fstat_r                                          src/syscalls.o
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-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(fflush.o)
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-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(fflush.o)
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-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(findfp.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(fflush.o)
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-_localeconv_r                                     c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(locale.o)
-_lseek_r                                          src/syscalls.o
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-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(vfprintf.o)
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-_read_r                                           src/syscalls.o
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-_s2b                                              c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(mprec.o)
-_sbrk_r                                           src/syscalls.o
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-_setlocale_r                                      c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(locale.o)
-_ulp                                              c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(mprec.o)
-_vfprintf_r                                       c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(vfprintf.o)
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-_wcrtomb_r                                        c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(wcrtomb.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(wcsrtombs.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(vfprintf.o)
-_wcsrtombs_r                                      c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(wcsrtombs.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(vfprintf.o)
-_wctomb_r                                         c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(wctomb_r.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(wcrtomb.o)
-_write_r                                          src/syscalls.o
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(stdio.o)
-addMatrix                                         src/matrices.o
-addMatrix2                                        src/matrices.o
-                                                  src/kalman.o
-addVector                                         src/matrices.o
-addVector2                                        src/matrices.o
-                                                  src/kalman.o
-autobaud_in_progress                              src/uart.o
-baudrate1_change                                  src/uart1.o
-beeper                                            src/hardware.o
-                                                  src/main.o
-                                                  src/sdk.o
-calibrate                                         src/main.o
-checkTxPeriod                                     src/sdk.o
-chksum_to_check                                   src/uart1.o
-chksum_trigger                                    src/uart1.o
-cnt                                               src/main.o
-copysign                                          c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(s_copysign.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(s_scalbn.o)
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-                                                  src/kalman.o
-                                                  src/pid.o
-covariance                                        src/system.o
-                                                  src/main.o
-                                                  src/kalman.o
-                                                  src/pid.o
-                                                  src/sdk.o
-                                                  src/LL_HL_comm.o
-crc16                                             src/uart.o
-crc_update                                        src/uart.o
-current_chksum                                    src/uart1.o
-data_requested                                    src/uart1.o
-data_sent_to_HL                                   src/ssp.o
-data_sent_to_LL                                   src/ssp.o
-                                                  src/LL_HL_comm.o
-degreesToRadians                                  src/comm_util_LL.o
-delay                                             src/system.o
-determinant                                       src/matrices.o
-disableFIQ                                        external/Common_WinARM/src/interrupt_utils.o
-disableIRQ                                        external/Common_WinARM/src/interrupt_utils.o
-                                                  src/uart.o
-ee_count                                          src/LPC2k_ee.o
-ee_erase                                          src/LPC2k_ee.o
-ee_locate                                         src/LPC2k_ee.o
-ee_read                                           src/LPC2k_ee.o
-ee_readn                                          src/LPC2k_ee.o
-ee_write                                          src/LPC2k_ee.o
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-enableIRQ                                         external/Common_WinARM/src/interrupt_utils.o
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-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(e_rem_pio2.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(e_pow.o)
-fclose                                            c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(fclose.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(findfp.o)
-feedbackBeep                                      src/sdk.o
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-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(fclose.o)
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-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(vfprintf.o)
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-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(w_pow.o)
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-g_accel_x                                         src/kalman.o
-                                                  src/pid.o
-g_accel_y                                         src/kalman.o
-                                                  src/pid.o
-g_accel_z                                         src/kalman.o
-                                                  src/pid.o
-g_cos_psi                                         src/kalman.o
-                                                  src/pid.o
-g_cpu_load_sum                                    src/sdk.o
-g_ctrl_cfg_pkt                                    src/pid.o
-                                                  src/sdk.o
-g_ctrl_cfg_pkt_info                               src/sdk.o
-g_ctrl_cmd                                        src/pid.o
-                                                  src/sdk.o
-g_ctrl_debug_pkt                                  src/kalman.o
-                                                  src/pid.o
-                                                  src/sdk.o
-g_ctrl_input_pkt                                  src/pid.o
-                                                  src/sdk.o
-g_ctrl_input_pkt_info                             src/sdk.o
-g_des_pose_pkt                                    src/pid.o
-                                                  src/sdk.o
-g_des_pose_pkt_info                               src/pid.o
-                                                  src/sdk.o
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-                                                  src/sdk.o
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-g_dummy_pkt                                       src/sdk.o
-g_dummy_pkt_info                                  src/sdk.o
-g_flight_action_pkt                               src/sdk.o
-g_flight_action_pkt_info                          src/sdk.o
-g_flight_state_pkt                                src/pid.o
-                                                  src/sdk.o
-g_imu_gravity                                     src/main.o
-                                                  src/kalman.o
-g_imu_pkt                                         src/kalman.o
-                                                  src/sdk.o
-g_kf_x_enabled                                    src/kalman.o
-                                                  src/sdk.o
-g_kf_y_enabled                                    src/kalman.o
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-g_kf_yaw_enabled                                  src/kalman.o
-                                                  src/sdk.o
-g_kf_z_enabled                                    src/kalman.o
-                                                  src/sdk.o
-g_last_height_pkt_time                            src/kalman.o
-g_mav_height_pkt                                  src/kalman.o
-                                                  src/sdk.o
-g_mav_height_pkt_info                             src/kalman.o
-                                                  src/sdk.o
-g_mav_kf_cfg_pkt                                  src/kalman.o
-                                                  src/sdk.o
-g_mav_kf_cfg_pkt_info                             src/sdk.o
-g_mav_pose2D_pkt                                  src/kalman.o
-                                                  src/sdk.o
-g_mav_pose2D_pkt_info                             src/kalman.o
-                                                  src/sdk.o
-g_motors_running                                  src/sdk.o
-g_pid_cfg_pkt                                     src/pid.o
-                                                  src/sdk.o
-g_pid_cfg_pkt_info                                src/pid.o
-                                                  src/sdk.o
-g_pose_pkt                                        src/pid.o
-                                                  src/sdk.o
-g_rcdata_pkt                                      src/sdk.o
-g_sdk_loops                                       src/sdk.o
-g_sin_psi                                         src/kalman.o
-                                                  src/pid.o
-g_status_pkt                                      src/sdk.o
-g_timestamp                                       src/sdk.o
-                                                  src/main.o
-                                                  src/kalman.o
-                                                  src/util.o
-g_timesync_pkt                                    src/sdk.o
-g_timesync_pkt_info                               src/sdk.o
-g_toggle_motors_start_time                        src/sdk.o
-g_tx_freq_cfg_pkt                                 src/sdk.o
-g_tx_freq_cfg_pkt_info                            src/sdk.o
-g_vz_p_f                                          src/kalman.o
-getMinor                                          src/matrices.o
-gpsDataOkTrigger                                  src/gpsmath.o
-                                                  src/uart1.o
-                                                  src/LL_HL_comm.o
-gps_data_temp                                     src/gpsmath.o
-iap_entry                                         src/LPC2k_ee.o
-init                                              src/system.o
-                                                  src/main.o
-init_VIC                                          external/Common_WinARM/src/irq.o
-                                                  src/system.o
-init_interrupts                                   src/system.o
-init_ports                                        src/system.o
-init_spi                                          src/system.o
-init_spi1                                         src/system.o
-init_timer0                                       src/system.o
-init_timer1                                       src/system.o
-install_irq                                       external/Common_WinARM/src/irq.o
-                                                  src/system.o
-int_cnt                                           src/main.o
-invert2                                           src/matrices.o
-                                                  src/kalman.o
-invert3                                           src/matrices.o
-invt                                              src/matrices.o
-isSerialEnabled                                   src/sdk.o
-isatty                                            src/syscalls.o
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(makebuf.o)
-isinf                                             c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(s_isinf.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(vfprintf.o)
-isnan                                             c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(s_isnan.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(w_sqrt.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(w_pow.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(vfprintf.o)
-kal_out                                           src/system.o
-                                                  src/main.o
-                                                  src/kalman.o
-                                                  src/pid.o
-                                                  src/sdk.o
-                                                  src/LL_HL_comm.o
-kal_x                                             src/system.o
-                                                  src/main.o
-                                                  src/kalman.o
-                                                  src/pid.o
-                                                  src/sdk.o
-                                                  src/LL_HL_comm.o
-kal_y                                             src/system.o
-                                                  src/main.o
-                                                  src/kalman.o
-                                                  src/pid.o
-                                                  src/sdk.o
-                                                  src/LL_HL_comm.o
-kal_yaw                                           src/system.o
-                                                  src/main.o
-                                                  src/kalman.o
-                                                  src/pid.o
-                                                  src/sdk.o
-                                                  src/LL_HL_comm.o
-kal_z                                             src/system.o
-                                                  src/main.o
-                                                  src/kalman.o
-                                                  src/pid.o
-                                                  src/sdk.o
-                                                  src/LL_HL_comm.o
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-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(vfprintf.o)
-logs_per_second                                   src/main.o
-main                                              src/main.o
-                                                  external/Common_WinARM/src/Startup.o
-mainloop                                          src/main.o
-mainloop_cnt                                      src/main.o
-mainloop_trigger                                  src/main.o
-matherr                                           c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(s_matherr.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(w_sqrt.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(w_pow.o)
-memchr                                            c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(memchr.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(fvwrite.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(vfprintf.o)
-memcpy                                            c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(memcpy.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(mprec.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(dtoa.o)
-                                                  src/uart.o
-memmove                                           c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(memmove.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(reallocr.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(fvwrite.o)
-memset                                            c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(memset.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(callocr.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(findfp.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(vfprintf.o)
-multMatVec                                        src/matrices.o
-multMatVec2                                       src/matrices.o
-                                                  src/kalman.o
-multMatrix                                        src/matrices.o
-multMatrix2                                       src/matrices.o
-                                                  src/kalman.o
-negMatrix                                         src/matrices.o
-normalizeSIAngle2Pi                               ../mav_common/src/comm_util.o
-                                                  src/kalman.o
-normalizeSIAnglePi                                ../mav_common/src/comm_util.o
-                                                  src/kalman.o
-                                                  src/pid.o
-packetInfo                                        src/uart.o
-packets                                           src/main.o
-                                                  src/uart1.o
-packetsTemp                                       src/main.o
-parseRxFifo                                       src/uart.o
-                                                  src/sdk.o
-parse_NAVSOL                                      src/uart1.o
-parse_POSLLH                                      src/uart1.o
-parse_POSUTM                                      src/uart1.o
-parse_STATUS                                      src/uart1.o
-parse_VELNED                                      src/uart1.o
-peripheralClockFrequency                          src/system.o
-                                                  src/uart1.o
-                                                  src/uart.o
-                                                  src/main.o
-pidCalc                                           src/pid.o
-pidParamUpdate                                    src/pid.o
-pidReset                                          src/pid.o
-                                                  src/sdk.o
-pid_vx                                            src/pid.o
-pid_vy                                            src/pid.o
-pid_vz                                            src/pid.o
-pid_x                                             src/pid.o
-pid_y                                             src/pid.o
-pid_yaw                                           src/pid.o
-pid_z                                             src/pid.o
-pll_feed                                          src/system.o
-pll_init                                          src/system.o
-pow                                               c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(w_pow.o)
-                                                  src/pid.o
-printf                                            c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(printf.o)
-                                                  src/main.o
-processCtrl                                       src/pid.o
-                                                  src/sdk.o
-processEngageDisengageTimeouts                    src/sdk.o
-processFlightActionRequests                       src/sdk.o
-processKF                                         src/sdk.o
-processLandingThrust                              src/sdk.o
-processMotorCommands                              src/sdk.o
-processMotorStateChanges                          src/sdk.o
-processSendData                                   src/sdk.o
-processorClockFrequency                           src/system.o
-                                                  src/main.o
-                                                  src/sdk.o
-puts                                              c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(puts.o)
-                                                  src/main.o
-radiansToDegrees                                  src/comm_util_LL.o
-registerPacket                                    src/uart.o
-                                                  src/sdk.o
-registeredPacketCnt                               src/uart.o
-resetKalmanFilter                                 src/kalman.o
-                                                  src/sdk.o
-restoreFIQ                                        external/Common_WinARM/src/interrupt_utils.o
-restoreIRQ                                        external/Common_WinARM/src/interrupt_utils.o
-                                                  src/uart.o
-ringbuffer1                                       src/uart1.o
-rint                                              c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(s_rint.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(w_pow.o)
-rxBuffer                                          src/uart.o
-rxFifo                                            src/uart.o
-rxParseBuffer                                     src/uart.o
-scalbn                                            c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(s_scalbn.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(k_rem_pio2.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(e_pow.o)
-sdkInit                                           src/sdk.o
-                                                  src/main.o
-sendCtrlDebugData                                 src/sdk.o
-sendFlightStateData                               src/sdk.o
-sendImuData                                       src/sdk.o
-sendMavPoseData                                   src/sdk.o
-sendRcData                                        src/sdk.o
-sendStatusData                                    src/sdk.o
-send_buffer                                       src/uart1.o
-setlocale                                         c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(locale.o)
-sin                                               c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(s_sin.o)
-                                                  src/kalman.o
-                                                  src/pid.o
-sqrt                                              c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(w_sqrt.o)
-                                                  src/main.o
-startAutoBaud                                     src/uart.o
-                                                  src/sdk.o
-startstring                                       src/uart1.o
-stopstring                                        src/uart1.o
-strcmp                                            c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(strcmp.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(locale.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(wctomb_r.o)
-strlen                                            c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(strlen.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(wctomb_r.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(vfprintf.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(puts.o)
-subMatrix                                         src/matrices.o
-subMatrix2                                        src/matrices.o
-                                                  src/kalman.o
-subVector                                         src/matrices.o
-subVector2                                        src/matrices.o
-                                                  src/kalman.o
-synchronizeTime                                   src/sdk.o
-timeOffset                                        src/sdk.o
-time_correction                                   src/sdk.o
-time_step                                         src/sdk.o
-timer0ISR                                         src/main.o
-                                                  src/system.o
-timer1ISR                                         src/main.o
-                                                  src/system.o
-total_logs_per_second                             src/main.o
-transmission1_running                             src/uart1.o
-transmission_running                              src/uart.o
-transpose                                         src/matrices.o
-trigger_cnt                                       src/main.o
-trigger_transmission                              src/uart1.o
-txBuffer                                          src/uart.o
-txFifo                                            src/uart.o
-tx_buff                                           src/uart1.o
-uart0ISR                                          src/uart.o
-                                                  src/system.o
-uart0_min_rx_buffer                               src/uart.o
-uart0_min_tx_buffer                               src/uart.o
-uart0_rx_cpsr                                     src/uart.o
-uart0_tx_cpsr                                     src/uart.o
-uart1ISR                                          src/uart1.o
-                                                  src/system.o
-uart_cnt                                          src/uart1.o
-                                                  src/main.o
-uninstall_irq                                     external/Common_WinARM/src/irq.o
-vfprintf                                          c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(vfprintf.o)
-                                                  c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(printf.o)
-wait                                              src/util.o
-                                                  src/main.o
-wcrtomb                                           c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(wcrtomb.o)
-wcsrtombs                                         c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(wcsrtombs.o)
-writeCommand                                      src/sdk.o
-writePacket2Ringbuffer                            src/uart.o
-                                                  src/sdk.o
diff --git a/ccny_asctec_firmware/makefile b/ccny_asctec_firmware/makefile
deleted file mode 100644
index 2861020..0000000
--- a/ccny_asctec_firmware/makefile
+++ /dev/null
@@ -1,566 +0,0 @@
-# Hey Emacs, this is a -*- makefile -*-
-#
-# WinARM template makefile 
-# by Martin Thomas, Kaiserslautern, Germany 
-# <eversmith@heizung-thomas.de>
-#
-# based on the WinAVR makefile written by Eric B. Weddington, Jörg Wunsch, et al.
-# Released to the Public Domain
-# Please read the make user manual!
-#
-#
-# On command line:
-#
-# make all = Make software.
-#
-# make clean = Clean out built project files.
-#
-# make program = Download the hex file to the device
-#
-# (TODO: make filename.s = Just compile filename.c into the assembler code only)
-#
-# To rebuild project do "make clean" then "make all".
-#
-# Changelog:
-# - 17. Feb. 2005  - added thumb-interwork support (mth)
-# - 28. Apr. 2005  - added C++ support (mth)
-# - 29. Arp. 2005  - changed handling for lst-Filename (mth)
-# -  1. Nov. 2005  - exception-vector placement options (mth)
-# - 15. Nov. 2005  - added library-search-path (EXTRA_LIB...) (mth)
-# -  2. Dec. 2005  - fixed ihex and binary file extensions (mth)
-# - 22. Feb. 2006  - added AT91LIBNOWARN setting (mth)
-# - 19. Apr. 2006  - option FLASH_TOOL (default lpc21isp); variable IMGEXT (mth)
-#
-
-//FLASH_TOOL = UVISION
-FLASH_TOOL = OPENOCD
-
-# MCU name and submodel
-MCU      = arm7tdmi-s
-SUBMDL   = LPC2146
-THUMB    = -mthumb
-THUMB_IW = -mthumb-interwork
-
-## Create ROM-Image (final)
-RUN_MODE=ROM_RUN
-## Create RAM-Image (debugging) - not used in this example
-#RUN_MODE=RAM_RUN
-
-# not supported in this example:
-## Exception-Vector placement only supported for "ROM_RUN"
-## (placement settings ignored when using "RAM_RUN")
-## - Exception vectors in ROM:
-##VECTOR_LOCATION=VECTORS_IN_ROM
-## - Exception vectors in RAM:
-##VECTOR_LOCATION=VECTORS_IN_RAM
-
-
-# Target file name (without extension).
-##TARGET = uarttest
-TARGET = main
-
-# List C source files here. (C dependencies are automatically generated.)
-# use file-extension c for "c-only"-files
-##SRC = $(TARGET).c 
-
-# List C source files here which must be compiled in ARM-Mode.
-# use file-extension c for "c-only"-files
-#SRCARM = $(TARGET).c
-SRCARM = src/LL_HL_comm.c
-SRCARM += src/gpsmath.c
-SRCARM += src/sdk.c
-SRCARM += src/comm_util_LL.c
-SRCARM += src/util.c
-SRCARM += src/pid.c
-SRCARM += src/kalman.c
-SRCARM += src/matrices.c
-SRCARM += ../mav_common/src/comm_util.c
-
-#Sources with interrupt routines in them
-SRCARMINT = src/$(TARGET).c
-SRCARMINT += src/hardware.c
-SRCARMINT += src/LPC2k_ee.c
-SRCARMINT += src/system.c
-SRCARMINT += src/uart.c
-SRCARMINT += src/uart1.c
-SRCARMINT += src/syscalls.c
-SRCARMINT += src/i2c.c
-SRCARMINT += src/adc.c
-SRCARMINT += src/ssp.c
-
-SRCARMINT += external/Common_WinARM/src/irq.c
-SRCARMINT += external/Common_WinARM/src/interrupt_utils.c
-
-
-# List C++ source files here.
-# use file-extension cpp for C++-files (use extension .cpp)
-CPPSRC = 
-
-# List C++ source files here which must be compiled in ARM-Mode.
-# use file-extension cpp for C++-files (use extension .cpp)
-#CPPSRCARM = $(TARGET).cpp
-CPPSRCARM = 
-
-# List Assembler source files here.
-# Make them always end in a capital .S.  Files ending in a lowercase .s
-# will not be considered source files but generated files (assembler
-# output from the compiler), and will be deleted upon "make clean"!
-# Even though the DOS/Win* filesystem matches both .s and .S the same,
-# it will preserve the spelling of the filenames, and gcc itself does
-# care about how the name is spelled on its command-line.
-ASRC = 
-
-# List Assembler source files here which must be assembled in ARM-Mode..
-ASRCARM = external/Common_WinARM/src/Startup.S
-#ASRCARM = crt.S
-ASRCARM += external/Common_WinARM/src/swi_handler.S
-
-## Output format. (can be ihex or binary)
-## (binary i.e. for openocd and SAM-BA, hex i.e. for lpc21isp and uVision)
-FORMATHEX = ihex
-FORMAT = binary
-
-# Optimization level, can be [0, 1, 2, 3, s]. 
-# 0 = turn off optimization. s = optimize for size.
-# (Note: 3 is not always the best optimization level. See avr-libc FAQ.)
-OPT = 2
-OPTINT = 0
-#OPT = 0
-
-## Using the Atmel AT91_lib produces warning with
-## the default warning-levels. 
-## yes - disable these warnings; no - keep default settings
-#AT91LIBNOWARN = yes
-AT91LIBNOWARN = no
-
-# Debugging format.
-# Native formats for AVR-GCC's -g are stabs [default], or dwarf-2.
-# AVR (extended) COFF requires stabs, plus an avr-objcopy run.
-#DEBUG = stabs
-DEBUG = dwarf-2
-
-# List any extra directories to look for include files here.
-#     Each directory must be seperated by a space.
-
-#C:/OpenOCD/workspace/hlfirm1/asctec_hl_comm/include/asctec_hl_comm 
-#ssdk/include 
-
-EXTRAINCDIRS = external/Common_WinARM/inc C:\WinARM\arm-elf\include include/ccny_asctec_firmware ../mav_common/include
-
-# List any extra directories to look for library files here.
-#     Each directory must be seperated by a space.
-#EXTRA_LIBDIRS = ../arm7_efsl_0_2_4
-#EXTRA_LIBDIRS = C:/OpenOCD/workspace/hlfirm1/ssdk/lib
-#EXTRA_LIBDIRS = C:/OpenOCD/workspace/hlfirm1/asctec_hl_comm/include/asctec_hl_comm
-#EXTRA_LIBDIRS = C:\WinARM\arm-elf\include
-# Compiler flag to set the C Standard level.
-# c89   - "ANSI" C
-# gnu89 - c89 plus GCC extensions
-# c99   - ISO C99 standard (not yet fully implemented)
-# gnu99 - c99 plus GCC extensions
-CSTANDARD = -std=gnu99
-
-# Place -D or -U options for C here
-CDEFS =  -D$(RUN_MODE)
-
-# Place -I options here
-CINCS =
-
-# Place -D or -U options for ASM here
-ADEFS =  -D$(RUN_MODE)
-
-ifdef VECTOR_LOCATION
-CDEFS += -D$(VECTOR_LOCATION)
-ADEFS += -D$(VECTOR_LOCATION)
-endif
-
-CDEFS += -D__WinARM__
-ADEFS += -D__WinARM__
-
-# Compiler flags.
-#  -g*:          generate debugging information
-#  -O*:          optimization level
-#  -f...:        tuning, see GCC manual and avr-libc documentation
-#  -Wall...:     warning level
-#  -Wa,...:      tell GCC to pass this to the assembler.
-#    -adhlns...: create assembler listing
-#
-# Flags for C and C++ (arm-elf-gcc/arm-elf-g++)
-#CFLAGS = -g$(DEBUG)
-CFLAGS += $(CDEFS) $(CINCS)
-CFLAGS += -O$(OPT)
-CFLAGS += -Wall -Wcast-align -Wimplicit 
-CFLAGS += -Wpointer-arith -Wswitch
-CFLAGS += -Wredundant-decls -Wreturn-type -Wshadow -Wunused
-CFLAGS += -Wa,-adhlns=$(subst $(suffix $<),.lst,$<) 
-CFLAGS += $(patsubst %,-I%,$(EXTRAINCDIRS))
-
-# Flags for C and C++ (arm-elf-gcc/arm-elf-g++) files containing interrupt routines
-#INTCFLAGS = -g$(DEBUG)
-INTCFLAGS += $(CDEFS) $(CINCS)
-INTCFLAGS += -O$(OPTINT)
-INTCFLAGS += -Wall -Wcast-align -Wimplicit 
-INTCFLAGS += -Wpointer-arith -Wswitch
-INTCFLAGS += -Wredundant-decls -Wreturn-type -Wshadow -Wunused
-INTCFLAGS += -Wa,-adhlns=$(subst $(suffix $<),.lst,$<) 
-INTCFLAGS += $(patsubst %,-I%,$(EXTRAINCDIRS))
-
-# flags only for C
-CONLYFLAGS += -Wnested-externs 
-CONLYFLAGS += $(CSTANDARD)
-ifneq ($(AT91LIBNOWARN),yes)
-#AT91-lib warnings with:
-CFLAGS += -Wcast-qual
-CONLYFLAGS += -Wmissing-prototypes 
-CONLYFLAGS += -Wstrict-prototypes
-CONLYFLAGS += -Wmissing-declarations
-endif
-
-# flags only for C++ (arm-elf-g++)
-# CPPFLAGS = -fno-rtti -fno-exceptions
-CPPFLAGS = 
-
-# Assembler flags.
-#  -Wa,...:    tell GCC to pass this to the assembler.
-#  -ahlns:     create listing
-#  -g$(DEBUG): have the assembler create line number information
-#ASFLAGS = $(ADEFS) -Wa,-adhlns=$(<:.S=.lst),-g$(DEBUG)
-
-
-#Additional libraries.
-
-# Extra libraries
-#    Each library-name must be seperated by a space.
-#    To add libxyz.a, libabc.a and libefsl.a: 
-#    EXTRA_LIBS = xyz abc efsl
-#EXTRA_LIBS = efsl
-#EXTRA_LIBS = ssdk
-EXTRA_LIBS = c
-#Support for newlibc-lpc (file: libnewlibc-lpc.a)
-#NEWLIBLPC = -lnewlib-lpc
-
-MATH_LIB = -lm
-
-# CPLUSPLUS_LIB = -lstdc++
-
-
-# Linker flags.
-#  -Wl,...:     tell GCC to pass this to linker.
-#    -Map:      create map file
-#    --cref:    add cross reference to  map file
-LDFLAGS = -nostartfiles -Wl,-Map=$(TARGET).map,--cref
-LDFLAGS += -lc
-LDFLAGS += $(NEWLIBLPC) $(MATH_LIB)
-LDFLAGS += -lc -lgcc 
-LDFLAGS += $(CPLUSPLUS_LIB)
-LDFLAGS += $(patsubst %,-L%,$(EXTRA_LIBDIRS))
-LDFLAGS += $(patsubst %,-l%,$(EXTRA_LIBS))
-
-# Set Linker-Script Depending On Selected Memory and Controller
-ifeq ($(RUN_MODE),RAM_RUN)
-LDFLAGS +=-Texternal/Common_WinARM/$(SUBMDL)-RAM.ld
-else 
-LINKSCRIPT =-Texternal/Common_WinARM/$(SUBMDL)-ROM.ld
-LINKSCRIPTBL =-Texternal/Common_WinARM/$(SUBMDL)bl-ROM.ld
-endif
-
-
-# ---------------------------------------------------------------------------
-# Flash-Programming support using lpc21isp by Martin Maurer 
-# only for Philips LPC and Analog ADuC ARMs
-#
-# Settings and variables:
-#LPC21ISP = lpc21isp
-LPC21ISP = lpc21isp
-LPC21ISP_PORT = com1
-LPC21ISP_BAUD = 38400
-LPC21ISP_XTAL = 12000
-LPC21ISP_FLASHFILE = $(TARGET).hex
-# verbose output:
-#LPC21ISP_DEBUG = -debug
-# enter bootloader via RS232 DTR/RTS (only if hardware supports this
-# feature - see Philips AppNote):
-LPC21ISP_CONTROL = -control
-# ---------------------------------------------------------------------------
-
-
-# Define directories, if needed.
-## DIRARM = c:/WinARM/
-## DIRARMBIN = $(DIRAVR)/bin/
-## DIRAVRUTILS = $(DIRAVR)/utils/bin/
-
-# Define programs and commands.
-SHELL = sh
-CC = arm-elf-gcc
-CPP = arm-elf-g++
-OBJCOPY = arm-elf-objcopy
-OBJDUMP = arm-elf-objdump
-SIZE = arm-elf-size
-NM = arm-elf-nm
-REMOVE = rm -f
-COPY = cp
-
-# Define Messages
-# English
-MSG_ERRORS_NONE = Errors: none
-MSG_BEGIN = "-------- begin (mode: $(RUN_MODE)) --------"
-MSG_END = --------  end  --------
-MSG_SIZE_BEFORE = Size before: 
-MSG_SIZE_AFTER = Size after:
-MSG_FLASH = Creating load file for Flash:
-MSG_EXTENDED_LISTING = Creating Extended Listing:
-MSG_SYMBOL_TABLE = Creating Symbol Table:
-MSG_LINKING = Linking:
-MSG_COMPILING = Compiling C:
-MSG_COMPILING_ARM_INT = "Compiling C (ARM-only):"
-MSG_COMPILING_ARM_INT = "Compiling C (ARM-only) including Interrupts:"
-MSG_COMPILINGCPP = Compiling C++:
-MSG_COMPILINGCPP_ARM = "Compiling C++ (ARM-only):"
-MSG_ASSEMBLING = Assembling:
-MSG_ASSEMBLING_ARM = "Assembling (ARM-only):"
-MSG_CLEANING = Cleaning project:
-MSG_FORMATERROR = Can not handle output-format
-MSG_LPC21_RESETREMINDER = You may have to bring the target in bootloader-mode now.
-
-# Define all object files.
-COBJ      = $(SRC:.c=.o) 
-AOBJ      = $(ASRC:.S=.o)
-COBJARM   = $(SRCARM:.c=.o)
-COBJARMINT =$(SRCARMINT:.c=.o)
-AOBJARM   = $(ASRCARM:.S=.o)
-CPPOBJ    = $(CPPSRC:.cpp=.o) 
-CPPOBJARM = $(CPPSRCARM:.cpp=.o)
-
-# Define all listing files.
-LST = $(ASRC:.S=.lst) $(ASRCARM:.S=.lst) $(SRC:.c=.lst) $(SRCARM:.c=.lst) $(SRCARMINT:.c=.lst)
-LST += $(CPPSRC:.cpp=.lst) $(CPPSRCARM:.cpp=.lst)
-
-# Compiler flags to generate dependency files.
-### GENDEPFLAGS = -Wp,-M,-MP,-MT,$(*F).o,-MF,.dep/$(@F).d
-GENDEPFLAGS = -MD -MP -MF .dep/$(@F).d
-
-# Combine all necessary flags and optional flags.
-# Add target processor to flags.
-ALL_CFLAGS  = -mcpu=$(MCU) $(THUMB_IW) -I. $(CFLAGS) $(GENDEPFLAGS)
-INT_CFLAGS = -mcpu=$(MCU) $(THUMB_IW) -I. $(INTCFLAGS) $(GENDEPFLAGS)
-ALL_ASFLAGS = -mcpu=$(MCU) $(THUMB_IW) -I. -x assembler-with-cpp $(ASFLAGS)
-INT_ASFLAGS = -mcpu=$(MCU) $(THUMB_IW) -I. -x assembler-with-cpp $(ASFLAGS)
-
-
-# Default target.
-all: begin gccversion sizebefore bld sizeafter finished end
-
-ifeq ($(FORMAT),ihex)
-bld: elf hex lss
-hex: $(TARGET).hex
-IMGEXT=hex
-else 
-ifeq ($(FORMAT),binary)
-bld: elf bin hex lss 
-bin: $(TARGET).bin
-hex: $(TARGET).hex
-elb: $(TARGET).elb
-hbl: $(TARGET).hbl
-atp: $(TARGET).atp
-IMGEXT=bin
-else 
-$(error "$(MSG_FORMATERROR) $(FORMAT)")
-endif
-endif
-
-elf: $(TARGET).elf
-lss: $(TARGET).lss 
-sym: $(TARGET).sym
-
-# Eye candy.
-begin:
-	@echo
-	@echo $(MSG_BEGIN)
-	
-finished:
-	@echo $(MSG_ERRORS_NONE)
-
-end:
-	@echo $(MSG_END)
-	@echo
-
-
-# Display size of file.
-HEXSIZE = $(SIZE) --target=$(FORMAT) $(TARGET).hex
-ELFSIZE = $(SIZE) -A $(TARGET).elf
-sizebefore:
-	@if [ -f $(TARGET).elf ]; then echo; echo $(MSG_SIZE_BEFORE); $(ELFSIZE); echo; fi
-
-sizeafter:
-	@if [ -f $(TARGET).elf ]; then echo; echo $(MSG_SIZE_AFTER); $(ELFSIZE); echo; fi
-
-
-# Display compiler version information.
-gccversion : 
-	@$(CC) --version
-
-
-# Program the device.
-ifeq ($(FLASH_TOOL),UVISION)
-# Program the device with Keil's uVision (needs configured uVision-Workspace). 
-program: $(TARGET).$(IMGEXT)
-	@echo
-	@echo "Programming with uVision"
-#	C:\Keil\uv3\Uv3.exe -f uvisionflash.Uv2 -ouvisionflash.txt
-	$(REMOVE) external/Common_WinARM/$(TARGET).hex
-	$(COPY) $(TARGET).hex external/Common_WinARM/
-	C:\Keil\uv3\Uv3.exe -f external/Common_WinARM\uvisionflash.Uv2
-else
-ifeq ($(FLASH_TOOL),OPENOCD)
-# Program the device with Dominic Rath's OPENOCD in "batch-mode", needs cfg and "reset-script".
-program: $(TARGET).$(IMGEXT)
-	@echo
-	@echo "Programming with OPENOCD"
-	C:\WinARM\utils\OpenOCD\openocd.exe -f arm7_ft2232.cfg
-
-else
-# Program the device.  - lpc21isp will not work for SAM7
-program: $(TARGET).$(IMGEXT)
-	@echo
-	@echo $(MSG_LPC21_RESETREMINDER)
-	$(LPC21ISP) $(LPC21ISP_OPTIONS) $(LPC21ISP_DEBUG) $(LPC21ISP_FLASHFILE) $(LPC21ISP_PORT) $(LPC21ISP_BAUD) $(LPC21ISP_XTAL)
-endif
-endif
-
-# Create final output file (.hex) from ELF output file.
-%.hex: %.elf
-	@echo
-	@echo $(MSG_FLASH) $@
-	$(OBJCOPY) -O $(FORMATHEX) $< $@
-	
-# Create final output file (.bin) from ELF output file.
-%.bin: %.elf
-	@echo
-	@echo $(MSG_FLASH) $@
-	$(OBJCOPY) -O $(FORMAT) $< $@
-
-
-# Create extended listing file from ELF output file.
-# testing: option -C
-%.lss: %.elf
-	@echo
-	@echo $(MSG_EXTENDED_LISTING) $@
-	$(OBJDUMP) -h -S -C $< > $@
-
-
-# Create a symbol table from ELF output file.
-%.sym: %.elf
-	@echo
-	@echo $(MSG_SYMBOL_TABLE) $@
-	$(NM) -n $< > $@
-
-
-# Link: create ELF output file from object files.
-.SECONDARY : $(TARGET).elf
-.PRECIOUS : $(AOBJARM) $(AOBJ) $(COBJARM) $(COBJ) $(CPPOBJ) $(CPPOBJARM) $(COBJARMINT)
-%.elf:  $(AOBJARM) $(AOBJ) $(COBJARM) $(COBJ) $(CPPOBJ) $(CPPOBJARM) $(COBJARMINT)
-	@echo
-	@echo $(MSG_LINKING) $@
-	$(CC) $(THUMB) $(ALL_CFLAGS) $(AOBJARM) $(AOBJ) $(COBJARM) $(COBJARMINT) $(COBJ) $(CPPOBJ) $(CPPOBJARM) --output $@ $(LDFLAGS) $(LINKSCRIPT)
-#	$(CPP) $(THUMB) $(ALL_CFLAGS) $(AOBJARM) $(AOBJ) $(COBJARM) $(COBJARMINT) $(COBJ) $(CPPOBJ) $(CPPOBJARM) --output $@ $(LDFLAGS)
-
-# Compile: create object files from C source files. ARM/Thumb
-$(COBJ) : %.o : %.c
-	@echo
-	@echo $(MSG_COMPILING) $<
-	$(CC) -c $(THUMB) $(ALL_CFLAGS) $(CONLYFLAGS) $< -o $@ 
-
-# Compile: create object files from C source files. ARM-only
-$(COBJARM) : %.o : %.c
-	@echo
-	@echo $(MSG_COMPILING_ARM) $<
-	$(CC) -c $(ALL_CFLAGS) $(CONLYFLAGS) $< -o $@ 
-	
-# Compile: create object files from C source files with interrupts. ARM-only
-$(COBJARMINT) : %.o : %.c
-	@echo
-	@echo $(MSG_COMPILING_ARM_INT) $<
-	$(CC) -c $(INT_CFLAGS) $(CONLYFLAGS) $< -o $@ 
-
-# Compile: create object files from C++ source files. ARM/Thumb
-$(CPPOBJ) : %.o : %.cpp
-	@echo
-	@echo $(MSG_COMPILINGCPP) $<
-	$(CPP) -c $(THUMB) $(ALL_CFLAGS) $(CPPFLAGS) $< -o $@ 
-
-# Compile: create object files from C++ source files. ARM-only
-$(CPPOBJARM) : %.o : %.cpp
-	@echo
-	@echo $(MSG_COMPILINGCPP_ARM) $<
-	$(CPP) -c $(ALL_CFLAGS) $(CPPFLAGS) $< -o $@ 
-
-
-# Compile: create assembler files from C source files. ARM/Thumb
-## does not work - TODO - hints welcome
-##$(COBJ) : %.s : %.c
-##	$(CC) $(THUMB) -S $(ALL_CFLAGS) $< -o $@
-
-
-# Assemble: create object files from assembler source files. ARM/Thumb
-$(AOBJ) : %.o : %.S
-	@echo
-	@echo $(MSG_ASSEMBLING) $<
-	$(CC) -c $(THUMB) $(ALL_ASFLAGS) $< -o $@
-
-
-# Assemble: create object files from assembler source files. ARM-only
-$(AOBJARM) : %.o : %.S
-	@echo
-	@echo $(MSG_ASSEMBLING_ARM) $<
-	$(CC) -c $(ALL_ASFLAGS) $< -o $@
-
-
-# Target: clean project.
-clean: begin clean_list finished end
-
-
-
-clean_list :
-	@echo
-	@echo $(MSG_CLEANING)
-	$(REMOVE) external/Common_WinARM/$(TARGET).hex
-	$(REMOVE) $(TARGET).hex
-	$(REMOVE) $(TARGET).bin
-	$(REMOVE) $(TARGET).obj
-	$(REMOVE) $(TARGET).elf
-	$(REMOVE) $(TARGET).map
-	$(REMOVE) $(TARGET).obj
-	$(REMOVE) $(TARGET).a90
-	$(REMOVE) $(TARGET).sym
-	$(REMOVE) $(TARGET).lnk
-	$(REMOVE) $(TARGET).lss
-	$(REMOVE) $(COBJ)
-	$(REMOVE) $(CPPOBJ)
-	$(REMOVE) $(AOBJ)
-	$(REMOVE) $(COBJARM)
-	$(REMOVE) $(COBJARMINT)
-	$(REMOVE) $(CPPOBJARM)
-	$(REMOVE) $(AOBJARM)
-	$(REMOVE) $(LST)
-	$(REMOVE) $(SRC:.c=.s)
-	$(REMOVE) $(SRC:.c=.d)
-	$(REMOVE) $(SRCARM:.c=.s)
-	$(REMOVE) $(SRCARM:.c=.d)
-	$(REMOVE) $(SRCARMINT:.c=.s)
-	$(REMOVE) $(SRCARMINT:.c=.d)
-	$(REMOVE) $(CPPSRC:.cpp=.s) 
-	$(REMOVE) $(CPPSRC:.cpp=.d)
-	$(REMOVE) $(CPPSRCARM:.cpp=.s) 
-	$(REMOVE) $(CPPSRCARM:.cpp=.d)
-	$(REMOVE) .dep/*
-
-
-# Include the dependency files.
--include $(shell mkdir .dep 2>/dev/null) $(wildcard .dep/*)
-
-
-# Listing of phony targets.
-.PHONY : all begin finish end sizebefore sizeafter gccversion \
-bld elf hex bin lss sym clean clean_list program
-
-
diff --git a/ccny_asctec_firmware/manifest.xml b/ccny_asctec_firmware/manifest.xml
deleted file mode 100644
index 9385c9e..0000000
--- a/ccny_asctec_firmware/manifest.xml
+++ /dev/null
@@ -1,13 +0,0 @@
-<package>
-  <description brief="ccny_asctec_firmware">
-
-     Firmware for the Asctec Autopilot HighLevel Processor, in part based on asctec_hl_firmware by Achtelik et al. For the older (pre-2012) version of the asctec HL/LL SDK.
-
-  </description>
-  <author>Ivan Dryanovski, Roberto G. Valenti</author>
-  <license>sdk.c/sdk.h: BSD; HL SDK, SSDK lib by AscTec</license>
-  <review status="unreviewed" notes="Under active development"/>
-  <url>http://ros.org/wiki/ccny_asctec_firmware</url>
-</package>
-
-
diff --git a/ccny_asctec_firmware/src/LL_HL_comm.c b/ccny_asctec_firmware/src/LL_HL_comm.c
deleted file mode 100644
index e6dd032..0000000
--- a/ccny_asctec_firmware/src/LL_HL_comm.c
+++ /dev/null
@@ -1,227 +0,0 @@
-#include "main.h"
-#include "LL_HL_comm.h"
-#include "system.h"
-#include "gpsmath.h"
-#include "sdk.h"
-
-unsigned short SSP_ack=0;
-extern char SPIWRData[128];
-extern char data_sent_to_LL;
-extern unsigned int SPIWR_num_bytes;
-
-struct LL_ATTITUDE_DATA LL_1khz_attitude_data;
-struct LL_CONTROL_INPUT LL_1khz_control_input;
-
-void SSP_data_distribution_HL(void)
-{
-	unsigned char i;
-	unsigned char current_page=LL_1khz_attitude_data.system_flags&0x03;
-
-	if(LL_1khz_attitude_data.system_flags&SF_GPS_NEW) gpsDataOkTrigger=0;
-
-	IMU_CalcData.angle_nick=LL_1khz_attitude_data.angle_pitch*10;
-	IMU_CalcData.angle_roll=LL_1khz_attitude_data.angle_roll*10;
-	IMU_CalcData.angle_yaw=LL_1khz_attitude_data.angle_yaw*10;
-
-	IMU_CalcData.angvel_nick=LL_1khz_attitude_data.angvel_pitch;
-	IMU_CalcData.angvel_roll=LL_1khz_attitude_data.angvel_roll;
-	IMU_CalcData.angvel_yaw=LL_1khz_attitude_data.angvel_yaw;
-
-	if(!current_page)	//page 0
-	{
-		for(i=0;i<8;i++)
-		{
-			RO_RC_Data.channel[i]=LL_1khz_attitude_data.RC_data[i]*16;
-		}
-		IMU_CalcData.acc_x_calib=LL_1khz_attitude_data.acc_x*10;
-		IMU_CalcData.acc_y_calib=LL_1khz_attitude_data.acc_y*10;
-		IMU_CalcData.acc_z_calib=LL_1khz_attitude_data.acc_z*10;
-	}
-	else if(current_page==1)	//page 1
-	{
-		IMU_CalcData.height=LL_1khz_attitude_data.height;
-		IMU_CalcData.dheight=LL_1khz_attitude_data.dheight;
-	}
-	else if(current_page==2)
-	{
-		IMU_CalcData.Hx=LL_1khz_attitude_data.mag_x;
-		IMU_CalcData.Hy=LL_1khz_attitude_data.mag_y;
-		IMU_CalcData.Hz=LL_1khz_attitude_data.mag_z;
-	}
-}
-
-int HL2LL_write_cycle(void)	//write data to low-level processor
-{
-	static char pageselect=0;
-
-	if(!data_sent_to_LL) return(0);
-
-	//update 1kHz data
-	LL_1khz_control_input.system_flags=0|pageselect;
-	//SSP_ack=0;	//reset ack
-
-	if(gpsDataOkTrigger) LL_1khz_control_input.system_flags|=SF_GPS_NEW;
-
-#ifndef FALCON
-	if(WO_SDK.ctrl_enabled)  LL_1khz_control_input.system_flags|=SF_HL_CONTROL_ENABLED;
-	else LL_1khz_control_input.system_flags&=~SF_HL_CONTROL_ENABLED;
-
-	if(WO_SDK.ctrl_mode==0x01) LL_1khz_control_input.system_flags|=SF_DIRECT_MOTOR_CONTROL;
-	else LL_1khz_control_input.system_flags&=~SF_DIRECT_MOTOR_CONTROL;
-#else //Disable Control Input if system is a FALCON
-	LL_1khz_control_input.system_flags&=~SF_HL_CONTROL_ENABLED;
-	LL_1khz_control_input.system_flags&=~SF_DIRECT_MOTOR_CONTROL;
-#endif
-
-
-
-	LL_1khz_control_input.ctrl_flags=WO_CTRL_Input.ctrl;
-	LL_1khz_control_input.pitch=WO_CTRL_Input.pitch;
-	LL_1khz_control_input.roll=WO_CTRL_Input.roll;
-	LL_1khz_control_input.yaw=WO_CTRL_Input.yaw;
-	LL_1khz_control_input.thrust=WO_CTRL_Input.thrust;
-
-	if(WO_SDK.ctrl_mode==0x01)
-	{
-		LL_1khz_control_input.direct_motor_control[0]=WO_Direct_Motor_Control.pitch;
-		LL_1khz_control_input.direct_motor_control[1]=WO_Direct_Motor_Control.roll;
-		LL_1khz_control_input.direct_motor_control[2]=WO_Direct_Motor_Control.yaw;
-		LL_1khz_control_input.direct_motor_control[3]=WO_Direct_Motor_Control.thrust;
-	}
-
-/*	for(i=0;i<8;i++)
-	{
-		LL_1khz_control_input.direct_motor_control[i]=0;
-	}
-*/
-	if(pageselect==0)
-	{
-		//fill struct with 500Hz data
-		LL_1khz_control_input.latitude=GPS_Data.latitude;
-		LL_1khz_control_input.longitude=GPS_Data.longitude;
-		LL_1khz_control_input.height=GPS_Data.height;
-		LL_1khz_control_input.speed_x=GPS_Data.speed_x;
-		LL_1khz_control_input.speed_y=GPS_Data.speed_y;
-		LL_1khz_control_input.heading=GPS_Data.heading;
-		LL_1khz_control_input.status=GPS_Data.status;
-
-		//write data
-		LL_write_ctrl_data(pageselect);
-		//set pageselect to other page for next cycle
-		pageselect=1;
-	}
-	else //pageselect=1
-	{
-		//fill struct with 500Hz data
-		LL_1khz_control_input.hor_accuracy=GPS_Data.horizontal_accuracy;
-		LL_1khz_control_input.vert_accuracy=GPS_Data.vertical_accuracy;
-		LL_1khz_control_input.speed_accuracy=GPS_Data.speed_accuracy;
-		LL_1khz_control_input.numSV=GPS_Data.numSV;
-		LL_1khz_control_input.battery_voltage_1=HL_Status.battery_voltage_1;
-		LL_1khz_control_input.battery_voltage_2=HL_Status.battery_voltage_2;
-		LL_1khz_control_input.dummy_500Hz_2=0;
-		LL_1khz_control_input.dummy_500Hz_3=0;
-
-		//write data
-		LL_write_ctrl_data(pageselect);
-		//set pageselect to other page for next cycle
-		pageselect=0;
-	}
-	return(1);
-}
-
-void LL_write_ctrl_data(char page)
-{
-	unsigned int i;
-	unsigned char *dataptr;
-	static volatile short spi_chksum;
-
-	dataptr=(unsigned char *)&LL_1khz_control_input;
-
-	//initialize syncbytes
-	SPIWRData[0]='>';
-	SPIWRData[1]='*';
-
-	spi_chksum=0xAAAA;
-
-	if(!page)
-	{
-		for(i=2;i<40;i++)
-		{
-			SPIWRData[i]=*dataptr++;
-			spi_chksum+=SPIWRData[i];
-		}
-	}
-	else
-	{
-		for(i=2;i<22;i++)
-		{
-			SPIWRData[i]=*dataptr++;
-			spi_chksum+=SPIWRData[i];
-		}
-		dataptr+=18;
-		for(i=22;i<40;i++)
-		{
-			SPIWRData[i]=*dataptr++;
-			spi_chksum+=SPIWRData[i];
-		}
-	}
-
-	SPIWRData[40]=spi_chksum;		//chksum LSB
-	SPIWRData[41]=(spi_chksum>>8);	//chksum MSB
-
-	SPIWR_num_bytes=42;
-	data_sent_to_LL=0;
-}
-
-
-inline void SSP_rx_handler_HL(unsigned char SPI_rxdata)	//rx_handler @ high-level processor
-{
-	static volatile unsigned char SPI_syncstate=0;
-	static volatile unsigned char SPI_rxcount=0;
-	static volatile unsigned char *SPI_rxptr;
-	static volatile unsigned char incoming_page;
-
-        //receive handler
-        if (SPI_syncstate==0)
-		{
-			if (SPI_rxdata=='>') SPI_syncstate++; else SPI_syncstate=0;
-		}
-		else if (SPI_syncstate==1)
-		{
-			if (SPI_rxdata=='*')
-			{
-				SPI_syncstate++;
-				SPI_rxptr=(unsigned char *)&LL_1khz_attitude_data;
-				SPI_rxcount=40;
-			}
-			else SPI_syncstate=0;
-		}
-		else if (SPI_syncstate==2)
-		{
-			if(SPI_rxcount==26) //14 bytes transmitted => select 500Hz page
-			{
-				incoming_page=LL_1khz_attitude_data.system_flags&0x03;	//system flags were already received
-				if(incoming_page==1) SPI_rxptr+=26;
-				else if(incoming_page==2) SPI_rxptr+=52;
-			}
-			SPI_rxcount--;
-			*SPI_rxptr=SPI_rxdata;
-			SPI_rxptr++;
-			if (SPI_rxcount==0)
-        	{
-             	SPI_syncstate++;
-        	}
-		}
-		else if (SPI_syncstate==3)
-		{
-			if(SPI_rxdata=='<')	//last byte ok => data should be valid
-			{
-				SSP_data_distribution_HL();	//only distribute data to other structs, if it was received correctly
-											//ack data receiption
-			}
-			SPI_syncstate=0;
-		}
-		else SPI_syncstate=0;
-}
-
diff --git a/ccny_asctec_firmware/src/LPC2k_ee.c b/ccny_asctec_firmware/src/LPC2k_ee.c
deleted file mode 100644
index c281f01..0000000
--- a/ccny_asctec_firmware/src/LPC2k_ee.c
+++ /dev/null
@@ -1,374 +0,0 @@
-/****************************************************************************************/
-/*                                                                            			*/
-/*  LPC2k_ee.C:  basic LPC213x EEPROM routines (rev 1.1, Jan 27th, 2006.)				*/
-/*                                                                            			*/
-/* Functions provided here:																*/
-/*   	                                                    		                    */
-/* ee_erase(command_ee, result_ee[]):	erases all EEPROM								*/
-/* ee_write(command_ee, result_ee[]):	writes record of ee_data (defined in LPC2k_ee.h)*/
-/* ee_read(command_ee, result_ee[]) :	reads the last record added into EEPROM			*/
-/* ee_readn(command_ee, result_ee[]):	reads the n-th record in EEPROM					*/
-/* ee_count(command_ee, result_ee[]):	counts records of ee_data type in EEPROM		*/
-/*			   	                                                                        */
-/****************************************************************************************/
-
-#include "LPC214x.h"
-#define _EEPROM_
-#include "LPC2k_ee.h"					/* LPC2000 EEPROM definitions */
-#undef _EEPROM_
-#define IAP_LOCATION 			0x7ffffff1
-
-//const unsigned char eeprom[EE_SIZE] _at_ EE_ADDR_L;
-void ee_erase(unsigned int ,unsigned int[]);	//function erases EEPROM
-void ee_write(unsigned int ,unsigned int[]);	//function adds a record in EEPROM
-void ee_read (unsigned int ,unsigned int[]);	//function reads the latest valid record in EEPROM
-void ee_count(unsigned int ,unsigned int[]);	//function counts records in EEPROM
-void ee_readn(unsigned int ,unsigned int[]);	//function reads n-th record in EEPROM
-int ee_locate(void);							   	//function locates the next available location
-
-typedef void (*IAP)(unsigned int [],unsigned int[]);
-IAP iap_entry;
-
-/************************************************************************/
-/*                                                                    	*/
-/* function: 															*/
-/*  void ee_erase(unsigned int command_ee,unsigned int result_ee[])		*/
-/*                                                                     	*/
-/* type: void                                                          	*/
-/*                                                                     	*/
-/* parameters: 															*/
-/* 	command_ee   - Not used.  	                              			*/
-/*  result_ee[0] - Returns a response to the last IAP command used.		*/
-/*                 0 - EEPROM successfully erased.						*/
-/*                 For all other response values, see microcontroller 	*/
-/*				   User Manual, IAP Commands and Status Codes Summary.	*/
-/*  result_ee[1] - Not used.  	                              			*/
-/*                                                                     	*/
-/* version: 1.1 (01/27/2006)                                           	*/
-/*                                                                     	*/
-/* constants defined in LPC2k_ee.h used in this function:              	*/
-/*  EE_SEC_L 	 - microcontroller's Flash sector where EEPROM begins	*/
-/*  EE_SEC_H 	 - microcontroller's Flash sector where EEPROM ends		*/
-/*  EE_CCLK		 - microcontroller's system clock (cclk)                */
-/*                                                                     	*/
-/* description:															*/
-/*  This function erases LPC2000 on-chip Flash sectors selected to act 	*/
-/*  as an EEPROM. All Flash sectors between EE_SEC_L abd EE_SEC_H		*/
-/*  (including these sectors) will be erased using the In Application	*/
-/*  Programming (IAP) routines (see User Manual for more details). 		*/
-/*  Also, this function disables all interrupts while erasing the       */
-/*  EEPROM. If this is not needed, three lines of the ee_erase          */
-/*  subroutine can simply be commented-out without affecting the        */
-/*  routine performance at all.                                         */
-/*                                                                     	*/
-/* revision history:                                                   	*/
-/* - Rev. 1.1 adds interrupt disable feature.							*/
-/*                                                                     	*/
-/************************************************************************/
-void ee_erase(unsigned int command_ee,unsigned int result_ee[]){
-	unsigned int command_iap[5];
-	unsigned int result_iap[3];
-	unsigned long int enabled_interrupts;
-
-	enabled_interrupts = VICIntEnable;  //disable all interrupts
-	VICIntEnClr        = enabled_interrupts;
-
-	command_iap[0]=50;					//prepare sectors from EE_SEC_L to EE_SEC_H for erase
-	command_iap[1]=EE_SEC_L;
-	command_iap[2]=EE_SEC_H;
-	iap_entry=(IAP) IAP_LOCATION;
-	iap_entry(command_iap,result_iap);
-
-	command_iap[0]=52;					//erase sectors from EE_SEC_L to EE_SEC_H
-	command_iap[1]=EE_SEC_L;
-	command_iap[2]=EE_SEC_H;
-	command_iap[3]=EE_CCLK;
-	iap_entry=(IAP) IAP_LOCATION;
-	iap_entry(command_iap,result_iap);
-
-	command_iap[0]=53;					//blankcheck sectors from EE_SEC_L to EE_SEC_H
-	command_iap[1]=EE_SEC_L;
-	command_iap[2]=EE_SEC_H;
-	iap_entry=(IAP) IAP_LOCATION;
-	iap_entry(command_iap,result_iap);
-
-	VICIntEnable = enabled_interrupts;  //restore interrupt enable register
-
-	result_ee[0]=result_iap[0];
-	return;
-}
-
-/************************************************************************/
-/*                                                                    	*/
-/* function: 															*/
-/*  void ee_write(unsigned int command_ee,unsigned int result_ee[])		*/
-/*                                                                     	*/
-/* type: void                                                          	*/
-/*                                                                     	*/
-/* parameters: 															*/
-/* 	command_ee   - An address of a content of ee_data type that has		*/
-/*                 to be programmed into EEPROM.                       	*/
-/*  result_ee[0] - Returns a response to the last IAP command used.		*/
-/*                 0 - data successfully programmed in EEPROM.			*/
-/*               501 - no space in EEPROM to program data.             	*/
-/*                 For all other response values, see microcontroller 	*/
-/*				   User Manual, IAP Commands and Status Codes Summary.	*/
-/*  result_ee[1] - Not used.  	                              			*/
-/*                                                                     	*/
-/* version: 1.1 (01/27/2006)                                           	*/
-/*                                                                     	*/
-/* constants defined in LPC2k_ee.h used in this function:              	*/
-/*  EE_BUFFER_SIZE 	   - IAP buffer size; must be 256 or 512 			*/
-/*  NO_SPACE_IN_EEPROM - EEPROM is full and no data can be programmed	*/
-/*  EE_BUFFER_MASK	   - parameter used for interfacing with IAP		*/
-/*  EE_REC_SIZE   	   - ee_data structure size in bytes        		*/
-/*  EE_SEC_L 	 	   - micro's Flash sector where EEPROM begins		*/
-/*  EE_SEC_H 	 	   - micro's Flash sector where EEPROM ends			*/
-/*  EE_CCLK		 	   - micro's system clock (cclk)                	*/
-/*                                                                     	*/
-/* description:															*/
-/*  This function writes a single structure of ee_data type into the	*/
-/*  EEPROM using an In Application	Programming (IAP) routines (see 	*/
-/*  User Manual for more details). command_ee contains an address of	*/
-/*  this structure. EEPROM is scanned for the last (if any) record 		*/
-/*  identifier (EE_REC_ID), and a new record is added next to it.      	*/
-/*  Also, this function disables all interrupts while erasing the       */
-/*  EEPROM. If this is not needed, three lines of the ee_write          */
-/*  subroutine can simply be commented-out without affecting the        */
-/*  routine performance at all.                                         */
-/*                                                                     	*/
-/* revision history:                                                   	*/
-/* - Rev. 1.1 fixes a bug related to verifying a content written into	*/
-/*   the EEPROM. 1.0 was reporting missmatch even when there were no	*/
-/*   problems at all.													*/
-/*   Rev. 1.1 adds interrupt disable feature.							*/
-/*                                                                     	*/
-/************************************************************************/
-void ee_write(unsigned int command_ee,unsigned int result_ee[]){
-	int location;
-	unsigned int *source, *destination, i;
-	unsigned char ee_buffer[EE_BUFFER_SIZE];
-	unsigned int command_iap[5], result_iap[3];
-	unsigned long int enabled_interrupts;
-
-	location = ee_locate();
-	if (location == -1){
-		result_ee[0]=NO_SPACE_IN_EEPROM;
-	}
-	else{
-		for (i=0;i<EE_BUFFER_SIZE;i++) ee_buffer[i]=0xFF;
-
-		destination = (unsigned int *) ((&ee_buffer[0])+((unsigned int)location & EE_BUFFER_MASK));
-		source = (unsigned int *) command_ee;
-		for(i=0;i!=EE_REC_SIZE/4;i++) *(destination+i) = *(source+i);
-
-		enabled_interrupts = VICIntEnable;  //disable all interrupts
-		VICIntEnClr        = enabled_interrupts;
-
-		command_iap[0]=50;					//prepare sectors from EE_SEC_L to EE_SEC_H for erase
-		command_iap[1]=EE_SEC_L;
-		command_iap[2]=EE_SEC_H;
-		iap_entry=(IAP) IAP_LOCATION;
-		iap_entry(command_iap,result_iap);
-
-		command_iap[0]=51;					//copy RAM to flash/eeprom
-		command_iap[1]=(unsigned int) (location & EE_START_MASK);
-		command_iap[2]=(unsigned int) (&ee_buffer[0]);
-		command_iap[3]=EE_BUFFER_SIZE;
-		command_iap[4]=EE_CCLK;
-		iap_entry=(IAP) IAP_LOCATION;
-		iap_entry(command_iap,result_iap);
-
-		command_iap[0]=56;					//compare RAM and flash/eeprom
-		command_iap[1]=(unsigned int) source;
-		command_iap[2]=(unsigned int) location;
-		command_iap[3]=EE_REC_SIZE;
-		iap_entry=(IAP) IAP_LOCATION;
-		iap_entry(command_iap,result_iap);
-
-		VICIntEnable = enabled_interrupts;  //restore interrupt enable register
-
-		result_ee[0]=result_iap[0];
-	}
-	return;
-}
-
-/************************************************************************/
-/*                                                                    	*/
-/* function: 															*/
-/*  void ee_read(unsigned int command_ee,unsigned int result_ee[])		*/
-/*                                                                     	*/
-/* type: void                                                          	*/
-/*                                                                     	*/
-/* parameters: 															*/
-/* 	command_ee   - Not used.											*/
-/*  result_ee[0] - Returns a response.									*/
-/*                 0 - data successfully found in EEPROM.				*/
-/*               500 - no data/records available in EEPROM.				*/
-/*  result_ee[1] - an address of the last record of ee_data type		*/
-/*				   in EEPROM.  	                              			*/
-/*                                                                     	*/
-/* version: 1.1 (01/27/2006)                                           	*/
-/*                                                                     	*/
-/* constants defined in LPC2k_ee.h used in this function:              	*/
-/*  NO_RECORDS_AVAILABLE - EEPROM is empty/no records identifiable		*/
-/*						   with a record identifier (EE_REC_ID) found	*/
-/*  EE_ADR_L 	 	   - micro's Flash address from where EEPROM begins	*/
-/*  EE_REC_SIZE 	   - size (in bytes) of a ee_data structure        	*/
-/*                                                                     	*/
-/* description:															*/
-/*  This function scans an EEPROM content looking for the last record 	*/
-/*  that can be identified with a record identifier (EE_REC_ID). When 	*/
-/*  such data is found, its address is passed as result_ee[1].			*/
-/*                                                                     	*/
-/* revision history:                                                   	*/
-/* - Rev. 1.0 had problems with accessing the last record in a fully	*/
-/*   occupied EEPROM. Rev. 1.1 fixes this.								*/
-/*                                                                     	*/
-/************************************************************************/
-void ee_read(unsigned int command_ee,unsigned int result_ee[]){
-	int location;
-
-	location = ee_locate();
-	if (location == EE_ADDR_L){
-		result_ee[0]=NO_RECORDS_AVAILABLE;
-	}
-	else{
-		result_ee[0]=0;
-		if (location == -1)
-			result_ee[1]=(unsigned int)(EE_ADDR_H+1 - EE_REC_SIZE);
-		else
-			result_ee[1]=(unsigned int)(location - EE_REC_SIZE);
-	}
-	return;
-}
-
-/************************************************************************/
-/*                                                                    	*/
-/* function: 															*/
-/*  void ee_readn(unsigned int command_ee,unsigned int result_ee[])		*/
-/*                                                                     	*/
-/* type: void                                                          	*/
-/*                                                                     	*/
-/* parameters: 															*/
-/* 	command_ee   - An index of a record in EEPROM that should be read.	*/
-/*  result_ee[0] - Returns a response.									*/
-/*                 0 - data successfully found in EEPROM.				*/
-/*               502 - requested index of record in EEPROM is out of 	*/
-/*                     EEPROM's memory.                                	*/
-/*  result_ee[1] - an address of the specified record of ee_data type	*/
-/*				   in EEPROM.  	                              			*/
-/*                                                                     	*/
-/* version: 1.0 (initial release 05/13/2005)                           	*/
-/*                                                                     	*/
-/* constants defined in LPC2k_ee.h used in this function:              	*/
-/*  INDEX_OUT_OF_RANGE - index of a record in EEPROM specified by 		*/
-/*						 command_ee is out of EEPROM's range			*/
-/*  EE_ADR_L 	 	   - micro's Flash address from where EEPROM begins	*/
-/*  EE_ADR_H 	 	   - micro's Flash address where EEPROM ends		*/
-/*  EE_REC_SIZE 	   - size (in bytes) of a ee_data structure        	*/
-/*                                                                     	*/
-/* description:															*/
-/*  This function returns in result_ee[1] an address of an EEPROM 		*/
-/*  record index specified in command_ee. Index can not be less than 0.	*/
-/*                                                                     	*/
-/************************************************************************/
-void ee_readn(unsigned int command_ee,unsigned int result_ee[]){
-	if(command_ee>((EE_ADDR_H+1-EE_ADDR_L)/EE_REC_SIZE)){
-		result_ee[0]=INDEX_OUT_OF_RANGE;}
-	else{
-		result_ee[0]=0;
-		result_ee[1]=(unsigned int)(EE_ADDR_L+EE_REC_SIZE*command_ee);
-	}
-	return;
-}
-
-/************************************************************************/
-/*                                                                    	*/
-/* function: 															*/
-/*  void ee_count(unsigned int command_ee,unsigned int result_ee[])		*/
-/*                                                                     	*/
-/* type: void                                                          	*/
-/*                                                                     	*/
-/* parameters: 															*/
-/* 	command_ee   - Not used.											*/
-/*  result_ee[0] - Returns a response. Always 0.						*/
-/*  result_ee[1] - number of records of ee_data type in EEPROM.			*/
-/*                                                                     	*/
-/* version: 1.1 (01/27/2006)                                           	*/
-/*                                                                     	*/
-/* constants defined in LPC2k_ee.h used in this function:              	*/
-/*  EE_ADR_L 	 	   - micro's Flash address from where EEPROM begins	*/
-/*  EE_REC_SIZE 	   - size (in bytes) of a ee_data structure        	*/
-/*                                                                     	*/
-/* description:															*/
-/*  This function returns number of records of ee_data type in EEPROM.	*/
-/*                                                                     	*/
-/* revision history:                                                   	*/
-/* - Initial release (1.0) was not supplying the right feedback in case */
-/*   of counting records in a full EEPROM. Rev. 1.1 fixes this.         */
-/*                                                                     	*/
-/************************************************************************/
-void ee_count(unsigned int command_ee,unsigned int result_ee[]){
-	int location;
-	result_ee[0]=0;
-	location = ee_locate();
-	if (location == -1) location = EE_ADDR_H+1;
-	result_ee[1]=(unsigned int)((location-EE_ADDR_L)/EE_REC_SIZE);
-	return;
-}
-
-/************************************************************************/
-/*                                                                    	*/
-/* function: 															*/
-/*  void ee_locate()													*/
-/*                                                                     	*/
-/* type: int                                                          	*/
-/*                                                                     	*/
-/* parameters: none														*/
-/*                                                                     	*/
-/* version: 1.1 (01/27/2006)                                           	*/
-/*                                                                     	*/
-/* constants defined in LPC2k_ee.h used in this function:              	*/
-/*  EE_ADR_L 	 	   - micro's Flash address from where EEPROM begins	*/
-/*  EE_ADR_H 	 	   - micro's Flash address where EEPROM ends		*/
-/*  EE_REC_ID 	 	   - a record indicator used to identify valid data	*/
-/*  EE_REC_SIZE 	   - size (in bytes) of a ee_data structure        	*/
-/*                                                                     	*/
-/* description:															*/
-/*  This function returns an address as of which new record can be 		*/
-/*	added into Flash/EEPROM. In case of EEPROM being full, function     */
-/*  returns -1. Searching is based on divide by two method that         */
-/*  provides the fastest processing time.                               */
-/*                                                                     	*/
-/* revision history:                                                   	*/
-/* - Rev. 1.1 fixes a bug related to identifying an unused byte of 		*/
-/*   EEPROM in an EEPROM with size not equal to EE_REC_SIZE * 2^k (k>=0)*/
-/*                                                                     	*/
-/************************************************************************/
-int ee_locate(void){
-	unsigned int addr_l, addr_m, addr_r, size, slice_limit;
-	addr_l = EE_ADDR_L;
-	if ((*((unsigned char *)addr_l))==0xFF) return(addr_l);
-	addr_r = EE_ADDR_H+1;
-	if ((*((unsigned char *)(addr_r-EE_REC_SIZE)))==EE_REC_ID) return(-1);
-	size = addr_r - addr_l;
-	slice_limit = EE_REC_SIZE - 1;
-	while(size != EE_REC_SIZE){
-		addr_m = (addr_r+addr_l)/2;
-		if ((addr_m & slice_limit)!=0x00000000){
-			if ((*((unsigned char *)(addr_r - EE_REC_SIZE)))==0xFF) 
-				addr_r = addr_r - EE_REC_SIZE;
-			else
-				addr_l = addr_l + EE_REC_SIZE;
-			addr_m = (addr_r+addr_l)/2;
-			size = size - EE_REC_SIZE;
-		}
-		if ((*((unsigned char *)addr_m))==0xFF)
-			addr_r = addr_m;
-		else
-			addr_l = addr_m;
-		size = size/2;
-	}
-	return(addr_r);
-}
diff --git a/ccny_asctec_firmware/src/adc.c b/ccny_asctec_firmware/src/adc.c
deleted file mode 100644
index 29427f2..0000000
--- a/ccny_asctec_firmware/src/adc.c
+++ /dev/null
@@ -1,361 +0,0 @@
-/*****************************************************************************
- *   adc.c:  ADC module file for Philips LPC214x Family Microprocessors
- *
- *   Copyright(C) 2006, Philips Semiconductor
- *   All rights reserved.
- *
- *   History
- *   2005.10.01  ver 1.00    Prelimnary version, first Release
- *
-******************************************************************************/
-#include "LPC214x.h"                        /* LPC21xx definitions */
-#include "type.h"
-#include "irq.h"
-#include "target.h"
-#include "adc.h"
-
-volatile unsigned int ADC0Value[ADC_NUM], ADC1Value[ADC_NUM];
-volatile unsigned int ADC0IntDone = 0, ADC1IntDone = 0;
-
-#if ADC_INTERRUPT_FLAG
-/******************************************************************************
-** Function name:		ADC0Handler
-**
-** Descriptions:		ADC0 interrupt handler
-**
-** parameters:			None
-** Returned value:		None
-** 
-******************************************************************************/
-void ADC0Handler (void) __irq 
-{
-    unsigned int regVal;
-  
-    IENABLE;			/* handles nested interrupt */
-
-    regVal = AD0STAT;		/* Read ADC will clear the interrupt */
-    if ( regVal & 0x0000FF00 )	/* check OVERRUN error first */
-    {
-	regVal = (regVal & 0x0000FF00) >> 0x08;
-				/* if overrun, just read ADDR to clear */
-				/* regVal variable has been reused. */
-	switch ( regVal )
-	{
-	    case 0x01:
-		regVal = AD0DR0;
-		break;
-	    case 0x02:
-		regVal = AD0DR1;
-		break;
-	    case 0x04:
-		regVal = AD0DR2;
-		break;
-	    case 0x08:
-		regVal = AD0DR3;
-		break;
-	    case 0x10:
-		regVal = AD0DR4;
-		break;
-	    case 0x20:
-		regVal = AD0DR5;
-		break;
-	    case 0x40:
-		regVal = AD0DR6;
-		break;
-	    case 0x80:
-		regVal = AD0DR7;
-		break;
-	    default:
-		break;
-	}
-	AD0CR &= 0xF8FFFFFF;	/* stop ADC now */ 
-	ADC0IntDone = 1;
-	return;	
-    }
-    
-    if ( regVal & ADC_ADINT )
-    {
-	switch ( regVal & 0xFF )	/* check DONE bit */
-	{
-	    case 0x01:
-		ADC0Value[0] = ( AD0DR0 >> 6 ) & 0x3FF;
-		break;
-	    case 0x02:
-		ADC0Value[1] = ( AD0DR1 >> 6 ) & 0x3FF;
-		break;
-	    case 0x04:
-		ADC0Value[2] = ( AD0DR2 >> 6 ) & 0x3FF;
-		break;
-	    case 0x08:
-		ADC0Value[3] = ( AD0DR3 >> 6 ) & 0x3FF;
-		break;
-	    case 0x10:
-		ADC0Value[4] = ( AD0DR4 >> 6 ) & 0x3FF;
-		break;
-	    case 0x20:
-		ADC0Value[5] = ( AD0DR5 >> 6 ) & 0x3FF;
-		break;
-	    case 0x40:
-		ADC0Value[6] = ( AD0DR6 >> 6 ) & 0x3FF;
-		break;
-	    case 0x80:
-		ADC0Value[7] = ( AD0DR7 >> 6 ) & 0x3FF;
-		break;		
-	    default:
-		break;
-	}
-	AD0CR &= 0xF8FFFFFF;	/* stop ADC now */ 
-	ADC0IntDone = 1;
-    }
-
-    IDISABLE;
-    VICVectAddr = 0;		/* Acknowledge Interrupt */
-}
-
-/******************************************************************************
-** Function name:		ADC1Handler
-**
-** Descriptions:		ADC1 interrupt handler
-**
-** parameters:			None
-** Returned value:		None
-** 
-******************************************************************************/
-void ADC1Handler (void) __irq 
-{
-    unsigned int regVal;
-  
-    IENABLE;			/* handles nested interrupt */
-
-    regVal = AD1STAT;		/* Read ADC will clear the interrupt */
-    if ( regVal & 0x0000FF00 )	/* check OVERRUN error first */
-    {
-	regVal = (regVal & 0x0000FF00) >> 0x08;
-				/* if overrun, just read AD1DRx to clear */
-				/* regVal variable has been reused. */
-	switch ( regVal )
-	{
-	    case 0x01:
-		regVal = AD1DR0;
-		break;
-	    case 0x02:
-		regVal = AD1DR1;
-		break;
-	    case 0x04:
-		regVal = AD1DR2;
-		break;
-	    case 0x08:
-		regVal = AD1DR3;
-		break;
-	    case 0x10:
-		regVal = AD1DR4;
-		break;
-	    case 0x20:
-		regVal = AD1DR5;
-		break;
-	    case 0x40:
-		regVal = AD1DR6;
-		break;
-	    case 0x80:
-		regVal = AD1DR7;
-		break;
-	    default:
-		break;
-	}
-	AD1CR &= 0xF8FFFFFF;	/* stop ADC now */ 
-	ADC1IntDone = 1;
-	return;	
-    }
-    
-    if ( regVal & ADC_ADINT )
-    {
-	switch ( regVal & 0xFF )	/* check DONE bit */
-	{
-	    case 0x01:
-		ADC1Value[0] = ( AD1DR0 >> 6 ) & 0x3FF;
-		break;
-	    case 0x02:
-		ADC1Value[1] = ( AD1DR1 >> 6 ) & 0x3FF;
-		break;
-	    case 0x04:
-		ADC1Value[2] = ( AD1DR2 >> 6 ) & 0x3FF;
-		break;
-	    case 0x08:
-		ADC1Value[3] = ( AD1DR3 >> 6 ) & 0x3FF;
-		break;
-	    case 0x10:
-		ADC1Value[4] = ( AD1DR4 >> 6 ) & 0x3FF;
-		break;		
-	    case 0x20:
-		ADC1Value[5] = ( AD1DR5 >> 6 ) & 0x3FF;
-		break;
-	    case 0x40:
-		ADC1Value[6] = ( AD1DR6 >> 6 ) & 0x3FF;
-		break;
-	    case 0x80:
-		ADC1Value[7] = ( AD1DR7 >> 6 ) & 0x3FF;
-		break;		
-	    default:
-		break;
-	}
-	AD1CR &= 0xF8FFFFFF;	/* stop ADC now */ 
-	ADC1IntDone = 1;
-    }
-
-    IDISABLE;
-    VICVectAddr = 0;		/* Acknowledge Interrupt */
-}
-#endif
-
-/*****************************************************************************
-** Function name:		ADCInit
-**
-** Descriptions:		initialize ADC channel
-**
-** parameters:			ADC clock rate
-** Returned value:		true or false
-** 
-*****************************************************************************/
-unsigned int ADCInit( unsigned int ADC_Clk )
-{
-      AD0CR = ( 0x01 << 0 ) | 	// SEL=1,select channel 0, 1 to 4 on ADC0
-	( ( Fpclk / ADC_Clk - 1 ) << 8 ) |  // CLKDIV = Fpclk / 1000000 - 1 
-	( 0 << 16 ) | 		// BURST = 0, no BURST, software controlled
-	( 0 << 17 ) |  		// CLKS = 0, 11 clocks/10 bits 
-	( 1 << 21 ) |  		// PDN = 1, normal operation 
-	( 0 << 22 ) |  		// TEST1:0 = 00 
-	( 0 << 24 ) |  		// START = 0 A/D conversion stops
-	( 0 << 27 );		/* EDGE = 0 (CAP/MAT singal falling,trigger A/D 
-				conversion) */
-    AD1CR = ( 0x01 << 0 ) | 	// SEL=1,select channel 0, 0 to 7 on ADC1
-	( ( Fpclk / ADC_Clk - 1 ) << 8 ) |  // CLKDIV = Fpclk / 1000000 - 1 
-	( 0 << 16 ) | 		// BURST = 0, no BURST, software controlled 
-	( 0 << 17 ) |  		// CLKS = 0, 11 clocks/10 bits 
-	( 1 << 21 ) |  		// PDN = 1, normal operation 
-	( 0 << 22 ) |  		// TEST1:0 = 00 
-	( 0 << 24 ) |  		// START = 0 A/D conversion stops
-	( 0 << 27 );		/* EDGE = 0 (CAP/MAT singal falling,trigger A/D 
-				conversion) */
-
-    /* If POLLING, no need to do the following */
-#if ADC_INTERRUPT_FLAG
-    AD0INTEN = 0x11E;		// Enable all interrupts 
-    AD1INTEN = 0x1FF;
-
-    if ( install_irq( ADC0_INT, (void *)ADC0Handler ) == FALSE )
-    {
-	return (FALSE);
-    }
-    if ( install_irq( ADC1_INT, (void *)ADC1Handler ) == FALSE )
-    {
-	return (FALSE);
-    }
-#endif
-
-    return (TRUE);
-}
-
-/*****************************************************************************
-** Function name:		ADC0Read
-**
-** Descriptions:		Read ADC0 channel
-**
-** parameters:			Channel number
-** Returned value:		Value read, if interrupt driven, return channel #
-** 
-*****************************************************************************/
-unsigned int ADC0Read( unsigned char channelNum )
-{
-#if !ADC_INTERRUPT_FLAG
-    unsigned int regVal, ADC_Data;
-    volatile unsigned int timeout=0;
-#endif
-
-    /* channel number is 0 through 7 */
-    if ( channelNum >= ADC_NUM )
-    {
-	channelNum = 0;		/* reset channel number to 0 */
-    }
-    AD0CR &= 0xFFFFFF00;
-    AD0CR |= (1 << 24) | (1 << channelNum);	
-				/* switch channel,start A/D convert */
-#if !ADC_INTERRUPT_FLAG
-    while ( timeout++<5000 )			/* wait until end of A/D convert */
-    {
-	regVal = *(volatile unsigned long *)(AD0_BASE_ADDR 
-			+ ADC_OFFSET + ADC_INDEX * channelNum);
-				/* read result of A/D conversion */
-	if ( regVal & ADC_DONE )
-	{
-	    break;
-	}
-    }	
-        
-    AD0CR &= 0xF8FFFFFF;	/* stop ADC now */    
-    if ( regVal & ADC_OVERRUN )	/* save data when it's not overrun
-				otherwise, return zero */
-    {
-	return ( 0 );
-    }
-    ADC_Data = ( regVal >> 6 ) & 0x3FF;
-    return ( ADC_Data );	/* return A/D conversion value */
-#else
-    return ( channelNum );	/* if it's interrupt driven, the 
-				ADC reading is done inside the handler.
-				so, return channel number */
-#endif
-}
-
-/*****************************************************************************
-** Function name:		ADC1Read
-**
-** Descriptions:		Read ADC1 channel
-**
-** parameters:			Channel number
-** Returned value:		Value read, if interrupt driven, return channel #
-** 
-*****************************************************************************/
-unsigned int ADC1Read( unsigned char channelNum )
-{
-#if !ADC_INTERRUPT_FLAG
-    unsigned int regVal;
-	unsigned int ADC_Data;
-#endif
-
-    /* channel number is 0 through 7 */
-    if ( channelNum >= ADC_NUM )
-    {
-	channelNum = 0;		/* reset channel number to 0 */
-    }
-    AD1CR &= 0xFFFFFF00;
-    AD1CR |= (1 << 24) | (1 << channelNum);	
-				/* switch channel,start A/D convert */
-#if !ADC_INTERRUPT_FLAG
-    while ( 1 )			/* wait until end of A/D convert */
-    {
-	regVal = *(volatile unsigned long *)(AD1_BASE_ADDR 
-			+ ADC_OFFSET + ADC_INDEX * channelNum);
-				/* read result of A/D conversion */
-	if ( regVal & ADC_DONE )
-	{
-	    break;
-	}
-    }	
-        
-    AD1CR &= 0xF8FFFFFF;	/* stop ADC now */
-    if ( regVal & ADC_OVERRUN )	/* save data when it's not overrun
-				otherwise, return zero */
-    {
-	return ( 0 );
-    }
-    
-    ADC_Data = ( regVal >> 6 ) & 0x3FF;
-    return ( ADC_Data );	/* return A/D conversion value */
-#else
-    return ( channelNum );
-#endif
-}
-
-/*********************************************************************************
-**                            End Of File
-*********************************************************************************/
diff --git a/ccny_asctec_firmware/src/comm_util_LL.c b/ccny_asctec_firmware/src/comm_util_LL.c
deleted file mode 100644
index b5a8d5e..0000000
--- a/ccny_asctec_firmware/src/comm_util_LL.c
+++ /dev/null
@@ -1,153 +0,0 @@
-#include "comm_util_LL.h"
-
-inline float degreesToRadians(float angle)
-{
-  return angle * M_PI / 180.0;
-}
-
-inline float radiansToDegrees(float angle)
-{
-  return angle * 180.0 / M_PI;
-}
-
-inline float LLToSIClimb(int16_t climb)
-{
-  return ((float)(climb)) / 1000.0;
-}
-
-// ****************** accel ***********************
-
-float LLToSIAccX(int16_t acc, float g)
-{
-  return ( - (float)(acc)  ) / g * GRAVITY_SI ;
-}
-
-float LLToSIAccY(int16_t acc, float g)
-{
-  return ( - (float)(acc)  ) / g * GRAVITY_SI ;
-}
-
-float LLToSIAccZ(int16_t acc, float g)
-{
-  return ( - (float)(acc)  ) / g * GRAVITY_SI ;
-}
-
-/*
-int32_t LLtoCommAccX(int16_t acc, float g)
-{
-  return - (int32_t)((float)(acc) / g * GRAVITY_COMM);
-}
-
-int32_t LLtoCommAccY(int16_t acc, float g)
-{
-  return - (int32_t)((float)(acc) / g * GRAVITY_COMM);
-}
-
-int32_t LLtoCommAccZ(int16_t acc, float g)
-{
-  return - (int32_t)((float)(acc) / g * GRAVITY_COMM);
-}
-*/
-// ****************** angle ***********************
-
-float LLToSIAngleRoll(int16_t angle)
-{
-  float ta =  degreesToRadians(((float)(-angle)) / 100.0);
-  //normalizeSIAngle2Pi(&ta);
-  return ta;
-}
-
-float LLToSIAnglePitch(int16_t angle)
-{
-  float ta = degreesToRadians(((float)(angle)) / 100.0);
-  //normalizeSIAngle2Pi(&ta);
-  return ta;
-}
-
-float LLToSIAngleYaw(uint16_t angle)
-{
-  float ta = degreesToRadians(((float)(36000-angle)) / 100.0);
-  //normalizeSIAngle2Pi(&ta);
-  return ta;
-}
-/*
-uint16_t LLtoCommAngleRoll(int16_t angle)
-{
-  return (int)((-(float)(angle)) / 36000.0  * 65535.0);
-}
-
-uint16_t LLtoCommAnglePitch(int16_t angle)
-{
-  return (int)(((float)(angle)) / 36000.0  * 65535.0);
-}
-
-uint16_t LLtoCommAngleYaw(uint16_t angle)
-{
-  return (int)((36000.0 - (float)(angle)) / 36000.0  * 65535.0);
-}
-*/
-// ****************** angle rate ***********************
-
-float LLToSIAngleRateYaw(int16_t angle_rate)
-{
-  return degreesToRadians( (float)(-angle_rate) * 0.015 );
-}
-
-float LLToSIAngleRateRoll(int16_t angle_rate)
-{
-  return degreesToRadians( (float)(-angle_rate) * 0.015 );
-}
-
-float LLToSIAngleRatePitch(int16_t angle_rate)
-{
-  return degreesToRadians( (float)(angle_rate) * 0.015 );
-}
-/*
-int32_t LLtoCommAngleRateYaw(int16_t angle_rate)
-{
-  return (int32_t)((float)(-angle_rate) * 0.015 / 360.0 * 65535.0);
-}
-*/
-// ******* motor commands ***
-
-short SIToLLCmdRoll (float angle_cmd)
-{
-  return -((short)(angle_cmd * 2293.578 )); // minus to invert roll because of the frame conversion (ASCTEC coordinate frame(??) to ENU)
-}
-
-short SIToLLCmdPitch (float angle_cmd)
-{
-  return ((short)(angle_cmd * 2293.578 ));
-}
-
-short SIToLLCmdYawRate (float yaw_rate_cmd)
-{
-  return ((short)(yaw_rate_cmd * 460.37235)); // minus to invert yaw rate because of the frame conversion (ASCTEC coordinate frame(??) to ENU)
-}
-
-short SIToLLCmdThrust (float thrust_cmd)
-{
-  return (short)(thrust_cmd * 40.95 );
-}
-/*
-short commToLLCmdRoll    (int16_t cmd_roll)
-{
-  return -(short) ( ((float)(cmd_roll)) / 65535 * (2.0 * M_PI) * 2293.578);
-  //return -((short)((float) cmd_roll / 1000.0 * 2293.578 ));
-}
-short commToLLCmdPitch   (int16_t cmd_pitch)
-{
-  return (short) ( ((float)(cmd_pitch)) / 65535 * (2.0 * M_PI) * 2293.578);
-  //return ((short)((float) cmd_pitch/ 1000.0 * 2293.578 ));
-}
-short commToLLCmdYawRate (int32_t cmd_yaw_rate)
-{
-  return -((short)((float)(cmd_yaw_rate)) / 65535 * (2.0 * M_PI) * 460.37235);
-  //return -((short)((float) cmd_yaw_rate / 1000.0 * 460.37235));
-}
-
-short commToLLCmdThrust  (int16_t cmd_thrust)
-{
-  return (short)((float)(cmd_thrust) / 10000.0 * 4095 );
-}
-*/
diff --git a/ccny_asctec_firmware/src/gpsmath.c b/ccny_asctec_firmware/src/gpsmath.c
deleted file mode 100644
index 57eba6d..0000000
--- a/ccny_asctec_firmware/src/gpsmath.c
+++ /dev/null
@@ -1,9 +0,0 @@
-#include "math.h"
-#include "gpsmath.h"
-
-struct GPS_DATA GPS_Data;
-struct GPS_DATA gps_data_temp;
-
-unsigned int gpsDataOkTrigger=0;
-
-
diff --git a/ccny_asctec_firmware/src/hardware.c b/ccny_asctec_firmware/src/hardware.c
deleted file mode 100644
index b4d5048..0000000
--- a/ccny_asctec_firmware/src/hardware.c
+++ /dev/null
@@ -1,27 +0,0 @@
-#include "hardware.h"
-
-void LED(unsigned char nr, unsigned char onoff) //set or reset LED 0..3
-{
-  if (nr>=2)
-  	return;
-  if(onoff == OFF)
-  {
-    IOSET1 = (1<<(24+nr));
-  }
-  else
-  {
-    IOCLR1 = (1<<(24+nr));
-  }
-}
-
-void beeper(unsigned char offon)
-{
-  if (offon) //beeper on
-  {
-    IOSET1 = (1 << 17);
-  }
-  else
-  {
-    IOCLR1 = (1 << 17);
-  }
-}
diff --git a/ccny_asctec_firmware/src/i2c.c b/ccny_asctec_firmware/src/i2c.c
deleted file mode 100644
index 244789c..0000000
--- a/ccny_asctec_firmware/src/i2c.c
+++ /dev/null
@@ -1,300 +0,0 @@
-/*****************************************************************************
- *   i2c.c:  I2C C file for Philips LPC214x Family Microprocessors
- *
- *   Copyright(C) 2006, Philips Semiconductor
- *   All rights reserved.
- *
- *   History
- *   2005.10.01  ver 1.00    Prelimnary version, first Release
- *
-*****************************************************************************/
-#include "LPC214x.h"                        /* LPC21xx definitions */
-#include "type.h"
-#include "irq.h"
-#include "i2c.h"
-
-DWORD I2CMasterState = I2C_IDLE;
-DWORD I2CSlaveState = I2C_IDLE;
-
-DWORD I2CCmd;
-DWORD I2CMode;
-
-BYTE I2CMasterBuffer[BUFSIZE];
-BYTE I2CSlaveBuffer[BUFSIZE];
-DWORD I2CCount = 0;
-DWORD I2CReadLength;
-DWORD I2CWriteLength;
-
-DWORD RdIndex = 0;
-DWORD WrIndex = 0;
-
-/* 
-From device to device, the I2C communication protocol may vary, 
-in the example below, the protocol uses repeated start to read data from or 
-write to the device:
-For master read: the sequence is: STA,Addr(W),offset,RE-STA,Addr(w),data...STO 
-for master write: the sequence is: STA,Addr(W),length,RE-STA,Addr(r),data...STO
-Thus, in state 8, the address is always WRITE. in state 10, the address could 
-be READ or WRITE depending on the I2CCmd.
-*/   
-
-/*****************************************************************************
-** Function name:		I2C0MasterHandler
-**
-** Descriptions:		I2C0 interrupt handler, deal with master mode
-**				only.
-**
-** parameters:			None
-** Returned value:		None
-** 
-*****************************************************************************/
-void I2C0MasterHandler (void) __irq 
-{
-    BYTE StatValue;
-
-    /* this handler deals with master read and master write only */
-    StatValue = I20STAT;
-    
-    IENABLE;   
-    switch ( StatValue )
-    {
-	case 0x08:			/* A Start condition is issued. */
-	I20DAT = I2CMasterBuffer[0];
-	I20CONCLR = (I2CONCLR_SIC | I2CONCLR_STAC);
-	I2CMasterState = I2C_STARTED;
-	break;
-	
-	case 0x10:			/* A repeated started is issued */
-	if (  I2CCmd == GET_DEVICE_ID || I2CCmd == GET_TEMPERATURE )
-	{
-	    I20DAT = I2CMasterBuffer[2];
-	}
-	I20CONCLR = (I2CONCLR_SIC | I2CONCLR_STAC);
-	I2CMasterState = I2C_RESTARTED;
-	break;
-	
-	case 0x18:			/* Regardless, it's a ACK */
-	if ( I2CMasterState == I2C_STARTED )
-	{
-	    I20DAT = I2CMasterBuffer[1+WrIndex];
-	    WrIndex++;
-	    I2CMasterState = DATA_ACK;
-	}
-	I20CONCLR = I2CONCLR_SIC;
-	break;
-	
-	case 0x28:	/* Data byte has been transmitted, regardless ACK or NACK */
-	case 0x30:
-	if ( WrIndex != I2CWriteLength )
-	{   
-	    I20DAT = I2CMasterBuffer[1+WrIndex]; /* this should be the last one */
-	    WrIndex++;
-	    if ( WrIndex != I2CWriteLength )
-	    {   
-		I2CMasterState = DATA_ACK;
-	    }
-	    else
-	    {
-		I2CMasterState = DATA_NACK;
-		if ( I2CReadLength != 0 )
-		{
-		    I20CONSET = I2CONSET_STA;	/* Set Repeated-start flag */
-		    I2CMasterState = I2C_REPEATED_START;
-		}
-	    }
-	}
-	else
-	{
-	    if ( I2CReadLength != 0 )
-	    {
-		I20CONSET = I2CONSET_STA;	/* Set Repeated-start flag */
-		I2CMasterState = I2C_REPEATED_START;
-	    }
-	    else
-	    {
-		I2CMasterState = DATA_NACK;
-	    }
-	}
-	I20CONCLR = I2CONCLR_SIC;
-	break;
-	
-	case 0x40:	/* Master Receive, SLA_R has been sent */
-	I20CONCLR = I2CONCLR_SIC;
-	break;
-	
-	case 0x50:	/* Data byte has been received, regardless following ACK or NACK */
-	case 0x58:
-	I2CMasterBuffer[3+RdIndex] = I20DAT;
-	RdIndex++;
-	if ( RdIndex != I2CReadLength )
-	{   
-	    I2CMasterState = DATA_ACK;
-	}
-	else
-	{
-	    RdIndex = 0;
-	    I2CMasterState = DATA_NACK;
-	}
-	I20CONSET = I2CONSET_AA;	/* assert ACK after data is received */
-	I20CONCLR = I2CONCLR_SIC;
-	break;
-	
-	case 0x20:			/* regardless, it's a NACK */
-	case 0x48:
-	I20CONCLR = I2CONCLR_SIC;
-	I2CMasterState = DATA_NACK;
-	break;
-	
-	case 0x38:			/* Arbitration lost, in this example, we don't
-					deal with multiple master situation */
-	default:
-	I20CONCLR = I2CONCLR_SIC;	
-	break;
-    }
-    
-    IDISABLE;
-    VICVectAddr = 0;		/* Acknowledge Interrupt */
-
-}
-
-
-void I2C0_send_motordata(void)
-{
-	WrIndex=0;
-	RdIndex=0;
-	I2CWriteLength = 5;
-	I2CReadLength = 0;
-    I2CMasterBuffer[0] = 0x02;
-    I2CMasterBuffer[1] = 100;
-    I2CMasterBuffer[2] = 100;
-    I2CMasterBuffer[3] = 100;
-    I2CMasterBuffer[4] = 1;
-
-    //I20CONSET = I2CONSET_STA;	/* Set Start flag */
-    //if ( !I2CStart() ) I2CStop();
-    I2CCmd = GET_TEMPERATURE;
-	I2CEngine();
-}
-
-/*****************************************************************************
-** Function name:		I2CStart
-**
-** Descriptions:		Create I2C start condition, a timeout
-**				value is set if the I2C never gets started,
-**				and timed out. It's a fatal error. 
-**
-** parameters:			None
-** Returned value:		true or false, return false if timed out
-** 
-*****************************************************************************/
-unsigned int I2CStart( void )
-{
-    unsigned int timeout = 0;
-    unsigned int returnValue = FALSE;
- 
-    /*--- Issue a start condition ---*/
-    I20CONSET = I2CONSET_STA;	/* Set Start flag */
-    
-    /*--- Wait until START transmitted ---*/
-    while( 1 )
-    {
-	if ( I2CMasterState == I2C_STARTED )
-	{
-	    returnValue = TRUE;
-	    break;	
-	}
-	if ( timeout >= MAX_TIMEOUT )
-	{
-	    returnValue = FALSE;
-	    break;
-	}
-	timeout++;
-    }
-    return( returnValue );
-}
-
-/*****************************************************************************
-** Function name:		I2CStop
-**
-** Descriptions:		Set the I2C stop condition, if the routine
-**				never exit, it's a fatal bus error.
-**
-** parameters:			None
-** Returned value:		true or never return
-** 
-*****************************************************************************/
-unsigned int I2CStop( void )
-{
-    I20CONSET = I2CONSET_STO;      /* Set Stop flag */ 
-    I20CONCLR = I2CONCLR_SIC;  /* Clear SI flag */ 
-            
-    /*--- Wait for STOP detected ---*/
-    while( I20CONSET & I2CONSET_STO );
-    return TRUE;
-}
-
-/*****************************************************************************
-** Function name:		I2CInit
-**
-** Descriptions:		Initialize I2C controller
-**
-** parameters:			I2c mode is either MASTER or SLAVE
-** Returned value:		true or false, return false if the I2C
-**				interrupt handler was not installed correctly
-** 
-*****************************************************************************/
-void I2CInit( unsigned int I2cMode ) 
-{
-    IODIR0|= 0x0C;	/* set port 0.2 and port 0.3 to output, high */
-    IOSET0 = 0x0C;
-
-    /*--- Clear flags ---*/
-    I20CONCLR = I2CONCLR_AAC | I2CONCLR_SIC | I2CONCLR_STAC | I2CONCLR_I2ENC;    
-
-    /*--- Reset registers ---*/
-    I20SCLL   = I2SCLL_SCLL;
-    I20SCLH   = I2SCLH_SCLH;
-}
-
-/*****************************************************************************
-** Function name:		I2CEngine
-**
-** Descriptions:		The routine to complete a I2C transaction
-**				from start to stop. All the intermitten
-**				steps are handled in the interrupt handler.
-**				Before this routine is called, the read
-**				length, write length, I2C master buffer,
-**				and I2C command fields need to be filled.
-**				see i2cmst.c for more details. 
-**
-** parameters:			None
-** Returned value:		true or false, return false only if the
-**				start condition can never be generated and
-**				timed out. 
-** 
-*****************************************************************************/
-unsigned int I2CEngine( void ) 
-{
-    I2CMasterState = I2C_IDLE;
-    RdIndex = 0;
-    WrIndex = 0;
-    if ( I2CStart() != TRUE )
-    {
-		I2CStop();
-	return ( FALSE );
-    }
-    while ( 1 )
-    {
-	if ( I2CMasterState == DATA_NACK )
-	{
-	    I2CStop();
-	    break;
-	}
-    }    
-    return ( TRUE );      
-}
-
-/******************************************************************************
-**                            End Of File
-******************************************************************************/
-
diff --git a/ccny_asctec_firmware/src/kalman.c b/ccny_asctec_firmware/src/kalman.c
deleted file mode 100644
index 31a375e..0000000
--- a/ccny_asctec_firmware/src/kalman.c
+++ /dev/null
@@ -1,294 +0,0 @@
-#include "kalman.h"
-
-//volatile int64_t g_latest_kf_time = 0;
-volatile int64_t g_last_height_pkt_time = 0;
-
-float g_cos_psi;
-float g_sin_psi;
-float g_vz_p_f = 0;
-
-float g_accel_x;
-float g_accel_y;
-float g_accel_z;
-
-extern uint8_t g_kf_x_enabled;
-extern uint8_t g_kf_y_enabled;
-extern uint8_t g_kf_z_enabled;
-extern uint8_t g_kf_yaw_enabled;
-extern float g_imu_gravity;
-extern MAV_IMU_PKT g_imu_pkt;
-
-extern MAV_POSE2D_PKT        g_mav_pose2D_pkt;
-extern PacketInfo *          g_mav_pose2D_pkt_info;
-
-extern MAV_HEIGHT_PKT        g_mav_height_pkt;
-extern PacketInfo *          g_mav_height_pkt_info;
-
-extern MAV_KF_CFG_PKT        g_mav_kf_cfg_pkt;
-
-extern MAV_CTRL_DEBUG_PKT    g_ctrl_debug_pkt;
-
-extern unsigned int g_sdk_loops;
-
-void InitKalPos(KalPos *k)
-{
-  k->Input = 0;
-
-  for (int i=0; i<2; i++)
-  {
-    for (int j=0; j<2; j++)
-    {
-      if (i==j)
-        k->A[i][j] = k->At[i][j] = k->P[i][j] = k->T[i][j] = k->I[i][j] = 1;
-      else
-        k->A[i][j] = k->At[i][j] = k->P[i][j] = k->T[i][j] = k->I[i][j] = 0;
-    }
-  }
-
-  for (int i=0; i<2; i++)
-  {
-    for (int j=0; j<2; j++)
-    {
-        k->K[i][j] = k->Q[i][j] = k->R[i][j] = 0;
-    }
-  }
-
-  for (int i=0; i<2; i++)
-  {
-    k->Correction[i] = k->Res[i] = 0;//KalPos->Est_out[i] =
-  }
-
-  k->Q[0][0] = k->Sigma2Q1;
-  k->Q[1][1] = k->Sigma2Q2;
-
-  k->R[0][0] = k->Sigma2R1;
-  k->R[1][1] = k->Sigma2R2;
-}
-
-void InitKalYaw(KalYaw *k)
-{
-  k->Q = k->Sigma2Q;
-  k->R = k->Sigma2R;
-  k->P = k->T = 1;
-  k->Input = k->State = k->Correction  = 0;//KalYaw->Est_out = KalYaw->Res KalYaw->B =
-}
-
-void PredictPos(KalPos *k, float dt)
-{
-  float dt2;
-  float Est[2];
-  float tmpA[2][2];
-  float tmpB[2];
-  float tmpA1[2][2];
-
-  dt2 = (dt*dt)/2;
-
-  k->A[0][1] = dt;
-  k->At[1][0] = dt;
-  k->B[0] = dt2;
-  k->B[1] = dt;
-
-  VectmultSc2(k->B, k->Input,tmpB);
-  multMatVec2(k->A, k->State, Est);
-  addVector2(Est,tmpB,k->State);
-
-  // propagate covariances
-  multMatrix2(k->A, k->T, tmpA); //mtmpA=A*T  2x2
-  multMatrix2(tmpA, k->At, tmpA1);//mtmpC=A*T*A'  2x2
-  addMatrix2(k->Q, tmpA1, k->P);// P = A*T*A'+ Q  2x2 matrix
-}
-
-void CorrectPos(KalPos *k)
-{
-  // Compute Kalman gains: K = P*C'*inv(C*P*C'+R)
-  // C matrix = Identity matrix so: K = P*inv(P + R)
-  float tmpP[2][2];
-  float tmpP1[2][2];
-  float tmpVect[2];
-
-  addMatrix2(k->P, k->R, tmpP); // P + R
-  invert2(tmpP, tmpP1); // (P + R)^-1
-  multMatrix2(k->P, tmpP1, k->K); // K = P*(P + R)^-1
-
-  // compute residual as difference between sensor output and estimated output (state)
-  subVector2(k->Correction, k->State, k->Res);
-  multMatVec2(k->K, k->Res, tmpVect); //K*residual
-
-  //apply correction
-  k->State[0] += tmpVect[0];
-  k->State[1] += tmpVect[1];
-
-  //Compute "a posteriori " covariance matrix T = (I-K*C)*P
-  subMatrix2(k->I, k->K,tmpP); //I-K*C
-  multMatrix2(tmpP, k->P, k->T); //(I-K*C)*P
-}
-
-void PredictYaw(KalYaw *k, float dt)
-{
-  float Est_yaw;
-  Est_yaw = k->State + dt * k->Input;
-  k->State = Est_yaw;
-  normalizeSIAngle2Pi(&k->State);
-  k->P = k->T + k->Q; // P = T + Q
-}
-
-void CorrectYaw(KalYaw *k)
-{
-  k->K = (k->P) / (k->P + k->R);
-
-  float Res = k->Correction - k->State;
-  normalizeSIAnglePi(&Res);
-
-  k->State += k->K * Res;
-  normalizeSIAngle2Pi(&k->State);
-
-  //Compute "a posteriori " covariance T = (I-K*C)*P
-  k->T = (1 - k->K) * k->P;
-}
-
-void KFilter (void)
-{
-  static unsigned short first_time = 1;
-  //float accel_x, accel_y, accel_z;
-  float roll, pitch, yaw, yaw_rate;
-  float accel_x_wf, accel_y_wf, accel_z_wf;
-  float dt = 0.001;
-  float vz_p;
-
-  vz_p = LLToSIClimb(LL_1khz_attitude_data.dheight);  // z velocity from pressure, SI
-
-  g_vz_p_f = 0.995 * g_vz_p_f + 0.005 * vz_p;   // simple smoothing filter
-
-  roll     = LLToSIAngleRoll (LL_1khz_attitude_data.angle_roll);
-  pitch    = LLToSIAnglePitch(LL_1khz_attitude_data.angle_pitch);
-
-  yaw_rate = LLToSIAngleRateYaw(LL_1khz_attitude_data.angvel_yaw);
-
-  if (first_time == 1)
-  {
-    first_time = 0;
-    resetKalmanFilter();
-  }
-
-  float cos_phi   = cos(roll);    float sin_phi   = sin(roll);
-  float cos_theta = cos(pitch);   float sin_theta = sin(pitch);
-
-  if (g_kf_yaw_enabled != 0)
-  {
-    yaw = kal_yaw.State;
-  }
-  else
-  {
-    yaw = LLToSIAngleYaw (LL_1khz_attitude_data.angle_yaw);
-  }
-
-  g_cos_psi = cos(yaw);
-  g_sin_psi = sin(yaw);
-
-  g_accel_x = LLToSIAccX(LL_1khz_attitude_data.acc_x, g_imu_gravity);
-  g_accel_y = LLToSIAccY(LL_1khz_attitude_data.acc_y, g_imu_gravity);
-  g_accel_z = LLToSIAccZ(LL_1khz_attitude_data.acc_z, g_imu_gravity);
-
-  // body frame to world frame transform
-
-  float accel_x_cos_theta = g_accel_x*cos_theta;
-  float sin_phi_sin_theta = sin_phi*sin_theta;
-  float cos_phi_sin_theta = cos_phi*sin_theta;
-
-  accel_x_wf =  accel_x_cos_theta*g_cos_psi + g_accel_y*(sin_phi_sin_theta*g_cos_psi - cos_phi*g_sin_psi) + g_accel_z*(cos_phi_sin_theta*g_cos_psi + sin_phi*g_sin_psi);
-  accel_y_wf =  accel_x_cos_theta*g_sin_psi + g_accel_y*(sin_phi_sin_theta*g_sin_psi + cos_phi*g_cos_psi) + g_accel_z*(cos_phi_sin_theta*g_sin_psi - sin_phi*g_cos_psi);
-  accel_z_wf = -g_accel_x*sin_theta         + g_accel_y*sin_phi*cos_theta                                 + g_accel_z*cos_phi*cos_theta - GRAVITY_SI;
-
-  g_imu_pkt.acc_x = g_accel_x;
-  g_imu_pkt.acc_y = g_accel_y;
-  g_imu_pkt.acc_z = g_accel_z;
-
-  // debug purposes
-  g_ctrl_debug_pkt.acc_x_wf = accel_x_wf;
-  g_ctrl_debug_pkt.acc_y_wf = accel_y_wf;
-  g_ctrl_debug_pkt.acc_z_wf = accel_z_wf;
-
-  //dt  = (g_timestamp - g_latest_kf_time) * 0.000001;
-  //g_latest_kf_time = g_timestamp;
-
-  if (g_kf_yaw_enabled != 0)
-  {
-    kal_yaw.Input = yaw_rate;
-    PredictYaw(&kal_yaw, dt);
-    if (g_mav_pose2D_pkt_info->updated == 1)
-    {
-      kal_yaw.Correction = g_mav_pose2D_pkt.yaw;
-      CorrectYaw(&kal_yaw);
-    }
-    kal_out.yaw_filtered = kal_yaw.State;
-  }
-
-  if (g_kf_x_enabled != 0)
-  {
-    kal_x.Input = accel_x_wf;
-    PredictPos(&kal_x, dt);
-    if (g_mav_pose2D_pkt_info->updated == 1)
-    {
-      kal_x.Correction[0] = g_mav_pose2D_pkt.x;
-      kal_x.Correction[1] = g_mav_pose2D_pkt.vx;
-      CorrectPos(&kal_x);
-    }
-    kal_out.pos_filtered[0] = kal_x.State[0];
-    kal_out.vel_filtered[0] = kal_x.State[1];
-  }
-
-  if (g_kf_y_enabled != 0)
-  {
-    kal_y.Input = accel_y_wf;
-    PredictPos(&kal_y, dt);
-    if (g_mav_pose2D_pkt_info->updated==1)
-    {
-      kal_y.Correction[0] = g_mav_pose2D_pkt.y;
-      kal_y.Correction[1] = g_mav_pose2D_pkt.vy;
-      CorrectPos(&kal_y);
-    }
-    kal_out.pos_filtered[1] = kal_y.State[0];
-    kal_out.vel_filtered[1] = kal_y.State[1];
-  }
-
-  if (g_kf_z_enabled != 0  )
-  {
-    kal_z.Input = accel_z_wf;
-    PredictPos(&kal_z, dt);
-
-    // correct z, vz from laser
-    if (g_mav_height_pkt_info->updated == 1)
-    {
-      g_last_height_pkt_time = g_timestamp;
-      kal_z.Sigma2R1 = g_mav_kf_cfg_pkt.R_z;
-      kal_z.Sigma2R2 = g_mav_kf_cfg_pkt.R_vz;
-      kal_z.Correction[0] = g_mav_height_pkt.z;
-      kal_z.Correction[1] = g_mav_height_pkt.vz;
-      CorrectPos(&kal_z);
-    }
-    //if (g_sdk_loops % 200 == 0 ) // old
-    if (g_last_height_pkt_time - g_timestamp > HEIGHT_PKT_TIMEOUT)
-    {
-      // correct vz from pressure
-      kal_z.Sigma2R1 = 100.00e6;//(float) g_mav_kf_cfg_pkt.R_z;
-      kal_z.Sigma2R2 = g_mav_kf_cfg_pkt.R_vz_p;
-      kal_z.Correction[0] = kal_z.State[0]; //force residual to zero to have the predicted state as output
-      kal_z.Correction[1] = g_vz_p_f;
-      CorrectPos(&kal_z);
-    }
-
-    kal_out.pos_filtered[2] = kal_z.State[0];
-    kal_out.vel_filtered[2] = kal_z.State[1];
-  }
-
-  g_mav_pose2D_pkt_info->updated = 0;
-  g_mav_height_pkt_info->updated = 0;
-}
-
-void resetKalmanFilter()
-{
-  InitKalPos(&kal_x);
-  InitKalPos(&kal_y);
-  InitKalPos(&kal_z);
-  InitKalYaw(&kal_yaw);
-}
diff --git a/ccny_asctec_firmware/src/main.c b/ccny_asctec_firmware/src/main.c
deleted file mode 100644
index bc58b96..0000000
--- a/ccny_asctec_firmware/src/main.c
+++ /dev/null
@@ -1,194 +0,0 @@
-/**********************************************************
- Header files
- **********************************************************/
-
-#include "stdio.h"
-#include "main.h"
-#include "system.h"
-#include "uart.h"
-#include <math.h>
-#include "hardware.h"
-#include "irq.h"
-#include "i2c.h"
-#include "gpsmath.h"
-#include "adc.h"
-#include "uart.h"
-#include "uart1.h"
-#include "ssp.h"
-#include "LL_HL_comm.h"
-#include "sdk.h"
-#include <unistd.h>
-
-/* *********************************************************
- Function declarations
- ********************************************************* */
-
-//void Initialize(void);
-//void feed(void);
-
-/**********************************************************
- Global Variables
- **********************************************************/
-struct HL_STATUS HL_Status;
-struct IMU_RAWDATA IMU_RawData;
-volatile unsigned int int_cnt = 0, cnt = 0, mainloop_cnt = 0;
-volatile unsigned char mainloop_trigger = 0;
-volatile unsigned int GPS_timeout = 0;
-
-//extern unsigned char data_requested;
-//extern int ZeroDepth;
-
-volatile unsigned int trigger_cnt = 0;
-unsigned int logs_per_second = 0, total_logs_per_second = 0;
-
-unsigned char packets = 0x00;
-unsigned char packetsTemp;
-unsigned int uart_cnt;
-unsigned char DataOutputsPerSecond = 20;
-
-struct IMU_CALCDATA IMU_CalcData, IMU_CalcData_tmp;
-struct GPS_TIME GPS_Time;
-struct SYSTEM_PERMANENT_DATA SYSTEM_Permanent_Data;
-
-float g_imu_gravity; // as reported in LL units (not exactly mg)
-
-void timer0ISR(void) __irq
-{
-  T0IR = 0x01; //Clear the timer 0 interrupt
-  IENABLE;
-  trigger_cnt++;
-  if (trigger_cnt == ControllerCyclesPerSecond)
-  {
-    trigger_cnt = 0;
-    HL_Status.up_time++;
-    HL_Status.cpu_load = mainloop_cnt;
-
-    mainloop_cnt = 0;
-  }
-
-  if (mainloop_trigger < 10)
-    mainloop_trigger++;
-  g_timestamp += ControllerCyclesPerSecond;
-
-  IDISABLE;
-  VICVectAddr = 0; // Acknowledge Interrupt
-}
-
-void timer1ISR(void) __irq
-{
-  T1IR = 0x01; //Clear the timer 1 interrupt
-  IENABLE;
-
-  IDISABLE;
-  VICVectAddr = 0; // Acknowledge Interrupt
-}
-
-/**********************************************************
- MAIN
- **********************************************************/
-int main(void)
-{
-  static int vbat1, vbat2;
-  int vbat;
-  static int bat_cnt = 0, bat_warning = 1000;
-  static char bat_warning_enabled = 1;
-
-  IDISABLE;
-
-  init();
-  LL_write_init();
-
-  HL_Status.up_time = 0;
-
-  printf("\n\nProgramm is running ... \n");
-  printf("Processor Clock Frequency: %d Hz\n", processorClockFrequency());
-  printf("Peripheral Clock Frequency: %d Hz\n", peripheralClockFrequency());
-
-  IENABLE;
-
-  packetsTemp = packets;
-
-  LED(1, ON);
-
-  sdkInit();
-
-  beeper(OFF);
-  wait(5000000);
-  calibrate();
-  //g_imu_gravity = 1022.0; // TODO it this correct??
-  while (1)
-  {
-    if (mainloop_trigger > 0)
-    {
-      mainloop_cnt++;
-      if (++bat_cnt == 100)
-        bat_cnt = 0;
-
-      //battery monitoring
-      vbat1 = (vbat1 * 29 + (ADC0Read(VOLTAGE_1) * 9872 / 579)) / 30; //voltage in mV //*9872/579
-
-      HL_Status.battery_voltage_1 = vbat1;
-      HL_Status.battery_voltage_2 = vbat2;
-
-      vbat = vbat1;
-
-      if (vbat < BATTERY_WARNING_VOLTAGE) //decide if it's really an empty battery
-      {
-        if (bat_warning < ControllerCyclesPerSecond * 2)
-          bat_warning++;
-        else
-          bat_warning_enabled = 1;
-      }
-      else
-      {
-        if (bat_warning > 10)
-          bat_warning -= 5;
-        else
-        {
-          bat_warning_enabled = 0;
-          beeper(OFF);
-        }
-      }
-      if (bat_warning_enabled)
-      {
-        if (bat_cnt > ((vbat - 9000) / BAT_DIV))
-          beeper(ON);
-        else
-          beeper(OFF);
-      }
-
-      if (mainloop_trigger)
-        mainloop_trigger--;
-      mainloop();
-    }
-  }
-  return 0;
-}
-
-
-void mainloop(void)
-{
-  SDK_mainloop();
-
-  HL2LL_write_cycle(); //write data to transmit buffer for immediate transfer to LL processor
-}
-
-void calibrate()
-{
-  double sum = 0.0;
-
-  for (int i = 0; i < 2000; ++i)
-  {
-    wait(1200); // wait 1 ms
-    HL2LL_write_cycle();
-    double ax = LL_1khz_attitude_data.acc_x;
-    double ay = LL_1khz_attitude_data.acc_y;
-    double az = LL_1khz_attitude_data.acc_z;
-
-    double a = sqrt(ax*ax + ay*ay + az*az);
-    sum +=a;
-  }
-
-  g_imu_gravity  = sum / 2000.0;
-}
-
diff --git a/ccny_asctec_firmware/src/matrices.c b/ccny_asctec_firmware/src/matrices.c
deleted file mode 100644
index cff213f..0000000
--- a/ccny_asctec_firmware/src/matrices.c
+++ /dev/null
@@ -1,294 +0,0 @@
-#include "matrices.h"
-
-void addMatrix2 (float A[2][2], float B[2][2], float C[2][2]){
-    /*C= A+B;
-     * A,B and C need to be the same size (m by n); function does not check*/
-    int i, j;
-    for(i=0; i<2; ++i){
-        for(j=0; j<2; ++j){
-            C[i][j] = A[i][j] + B[i][j];
-        }//inner for
-    }//outer for
-}//add matrices
-
-void addMatrix (matrix A, matrix B, matrix C, int m, int n){
-    /*C= A+B;
-     * A,B and C need to be the same size (m by n); function does not check*/
-    int i, j;
-    for(i=0; i<m; ++i){
-        for(j=0; j<n; ++j){
-            C[i][j] = A[i][j] + B[i][j];
-        }//inner for
-    }//outer for
-}//add matrices
-
-void addVector (float* A, float* B, float* C, int m){
-    /*C= A+B;
-     *  A,B and C need to be the same size (m); function does not check*/
-    int i;
-    for(i=0; i<m; ++i){
-        C[i] = A[i] + B[i];
-    }//for
-}//add Vectors
-
-void addVector2(float V[2], float V1[2], float V2[2])
-{
-    V2[0] = V[0] + V1[0];
-    V2[1] = V[1] + V1[1];
-}
-
-void subMatrix2 (float A[2][2], float B[2][2], float C[2][2]){
-    /*C= A-B;
-     * A,B and C need to be the same size (m by n); function does not check*/
-    int i, j;
-    for(i=0; i<2; ++i){
-            for(j=0; j<2; ++j){
-                C[i][j] = A[i][j] - B[i][j];
-            }//inner for
-    }//outer for
-}//sub matrices
-
-
-void subMatrix (matrix A, matrix B, matrix C, int m, int n){
-    /*C= A-B;
-     * A,B and C need to be the same size (m by n); function does not check*/
-    int i, j;
-    for(i=0; i<m; ++i){
-            for(j=0; j<n; ++j){
-                C[i][j] = A[i][j] - B[i][j];
-            }//inner for
-    }//outer for
-}//sub matrices
-
-void subVector (float* A, float* B, float* C, int m){
-    /*C= A-B;
-     * A,B and C need to be the same size (m); function does not check*/
-    int i;
-    for(i=0; i<m; ++i){
-        C[i] = A[i] - B[i];
-    }//for
-}//add Vectors
-
-void subVector2 (float A[2], float B[2], float C[2]){
-    /*C= A-B;
-     * A,B and C need to be the same size (m); function does not check*/
-    int i;
-    for(i=0; i<2; ++i){
-        C[i] = A[i] - B[i];
-    }//for
-}//add Vectors
-
-
-void negMatrix(matrix A, int m, int n){
-    /*negate matrix*/
-    int i,j;
-    for(i=0; i<m; ++i){
-        for(j=0; j<n; ++j){
-            A[i][j] = -A[i][j];
-        }//inner for
-    }//outer for
-}//negMAtrix
-
-
-void multMatrix(matrix A, matrix B, matrix C, int Am, int An, int Bn){
-    //C = A*B
-    //A,B and C need to be of correct dimensions, function does not check
-    int i,j,k;
-    float sum;
-
-    for(i=0; i < Bn; i++){
-        for(j=0; j < Am; j++){
-            sum=0;
-            for(k=0; k < An; k++)
-                sum += A[j][k] * B[k][i];
-            C[j][i] = sum;
-        }//inner for
-    }//outer for
-}
-
-void multMatrix2(float A[2][2], float B[2][2], float C[2][2]){
-    //C = A*B
-    //A,B and C need to be of correct dimensions, function does not check
-    int i,j,k;
-    float sum;
-
-    for(i=0; i < 2; i++){
-        for(j=0; j < 2; j++){
-            sum=0;
-            for(k=0; k < 2; k++)
-                sum += A[j][k] * B[k][i];
-            C[j][i] = sum;
-        }//inner for
-    }//outer for
-}
-void multMatVec(matrix A, float* B, float* C, int Am, int Bn){
-    /*C = A*B
-     *A,B and C need to be of correct dimensions, function does not check */
-
-
-    int j,k;
-    float sum;
-    for(j=0; j < Am; j++){
-        sum=0;
-        for(k=0; k < Bn; k++)
-            sum += A[j][k] * B[k];
-        C[j] = sum;
-        }//for
-}//multMatVec
-
-void multMatVec2(float A[2][2], float B[2], float C[2]){
-    /*C = A*B
-     *A,B and C need to be of correct dimensions, function does not check */
-
-    int j,k;
-    float sum;
-    for(j=0; j < 2; j++){
-        sum=0;
-        for(k=0; k < 2; k++)
-            sum += A[j][k] * B[k];
-        C[j] = sum;
-        }//for
-}//multMatVec
-
-
-void transpose(matrix A, matrix B, int Am, int An){
-    /*B = A'*/
-    int i,j;
-     for(i=0; i < Am; i++)
-        for(j=0; j < An; j++)
-            B[j][i] = A[i][j];
-
-}
-
-void invert3(matrix A, matrix B){
-/* B = A^-1 for 3x3 matrices*/
-    float det = (A[0][0]*A[1][1]*A[2][2]-A[0][0]*A[1][2]*A[2][1]-A[1][0]*A[0][1]*A[2][2]+A[1][0]*A[0][2]*A[2][1]+A[2][0]*A[0][1]*A[1][2]-A[2][0]*A[0][2]*A[1][1]);
-
-    B[0][0]=(A[1][1]*A[2][2]-A[1][2]*A[2][1])/det;
-    B[0][1]=(-A[0][1]*A[2][2]+A[0][2]*A[2][1])/det;
-    B[0][2]=(A[0][1]*A[1][2]-A[0][2]*A[1][1])/det;
-    B[1][0]=(-A[1][0]*A[2][2]+A[1][2]*A[2][0])/det;
-    B[1][1]=(A[0][0]*A[2][2]-A[0][2]*A[2][0])/det;
-    B[1][2]=(-A[0][0]*A[1][2]+A[0][2]*A[1][0])/det;
-    B[2][0]=(A[1][0]*A[2][1]-A[1][1]*A[2][0])/det;
-    B[2][1]=(-A[0][0]*A[2][1]+A[0][1]*A[2][0])/det;
-    B[2][2]=(A[0][0]*A[1][1]-A[0][1]*A[1][0])/det;
-}//invert3
-
-void invert2(float A[2][2], float B[2][2]){
-/* B = A^-1 for 2x2 matrices*/
-    float det = (A[0][0]*A[1][1]-A[0][1]*A[1][0]);
-
-    B[0][0]=(A[1][1])/det;
-    B[0][1]=(-A[0][1])/det;
-    B[1][0]=(-A[1][0])/det;
-    B[1][1]=(A[0][0])/det;
-}//invert2
-
-float determinant(matrix A,matrix tmp, int n){
-    /*returns determinant of n x n matrix*/
-    int i,j,k;
-    float q;
-    float dtr=1;
-    /* copy A to tmp*/
-    for(i=0; i < n; i++)
-        for(j=0; j < n; j++)
-            tmp[i][j] = A[j][i];
-
-    /*compute determinant*/
-    for(i=0;i < n;i++){
-        for(j=0;j < n;j++){
-            q=tmp[j][i]/tmp[i][i];
-            for(k=0;k < n;k++){
-                if(i==j) break;
-                tmp[j][k]=(tmp[j][k]-tmp[i][k])*q;
-            }//innermost for
-        }//middle for
-    }//outer for
-    for(i=0;i < n;i++){
-        dtr=dtr*tmp[i][i];
-    }//for
-    return(dtr);
-}//det
-
-
-void getMinor(matrix A, matrix B,int An, int m, int n){
-    /*  use this function to generate a matrix B that is the mn minor of A; A must be square
-     *  m>=1, n>=1, An is the size of A*/
-    int i,j;
-    int k=0;
-    for(i=0; i < An; i++){
-        if(i!=(m-1)){
-            for(j=0; j < (An-1); j++){
-                if(j<(n-1)){
-                    B[k][j] = A[i][j];
-                }
-                else{
-                    B[k][j] = A[i][j+1];
-                }
-            }//inner for (column)
-            k++;
-        }//if
-    }//outer for
-}//get minor
-
-
-void invt(matrix A, matrix B, matrix tmp1, matrix tmp2, int An){
-    /*B =  A^-1 ; tmp1 & tmp2 must be at least of size (An-1)x(An-1)
-     * function does not check if matrix is singular, tried, but even if det(A)==0, it did not escape,
-     * just reutrned "nan" for some elements, and garbage for others
-     *  */
-    int i,j;
-    float detA = determinant(A,tmp2,An);
-    for(i=0; i < An; i++){
-        for(j=0; j < An; j++){
-            getMinor(A,tmp1,An,i+1,j+1);
-            if(((i+j)%2)==0){
-                B[j][i]= determinant(tmp1,tmp2,(An-1))/detA;
-            }
-            else{
-                B[j][i]= -determinant(tmp1,tmp2,(An-1))/detA;
-            }
-             //problem if an element is zero (returns "nan" for zero element)
-        }//inner for
-    }//outer for
-}//invert
-
-float BhQhBhT(matrix Qh, float* Bh, float* tmp){
-    //function returns the value for Bh*Qh*Bh', where Qh is an  3x3 matrix, and Bh is a vector of length 3
-
-
-
-    //Bh*Qh
-    int i,j;
-    float sum;
-    for(i=0; i < 3; i++){
-        sum=0;
-        for(j=0; j < 3; j++)
-            sum += Bh[j]*Qh[j][i];
-        tmp[i] = sum;
-     }//outer for
-
-    //tmp*BhT
-    sum = 0;
-    for(i=0; i < 3; i++)
-        sum += tmp[i]*Bh[i];
-
-
-
-    return sum;
-}
-
-void VectdivSc(float* V, float scl){
-    //function returns the value of Vector/scalar where vector is 3x1
-
-    int i;
-    for(i=0; i < 3; i++){
-        V[i] = V[i]/scl;
-     }// for
-}
-void VectmultSc2(float V[2], float scl, float V1[2])
-{
-     V1[0] = V[0] * scl;
-     V1[1] = V[1] * scl;
-}
diff --git a/ccny_asctec_firmware/src/pid.c b/ccny_asctec_firmware/src/pid.c
deleted file mode 100644
index fe9a4f4..0000000
--- a/ccny_asctec_firmware/src/pid.c
+++ /dev/null
@@ -1,334 +0,0 @@
-#include "pid.h"
-
-//volatile int64_t g_latest_ctrl_time = 0;
-
-PID pid_x, pid_y, pid_z, pid_yaw, pid_vx, pid_vy, pid_vz;
-
-extern float g_cos_psi;
-extern float g_sin_psi;
-
-extern float g_accel_x;
-extern float g_accel_y;
-extern float g_accel_z;
-
-extern MAV_POSE_PKT          g_pose_pkt;
-extern MAV_CTRL_CMD          g_ctrl_cmd;
-extern MAV_FLIGHT_STATE_PKT  g_flight_state_pkt;
-extern MAV_CTRL_DEBUG_PKT    g_ctrl_debug_pkt;
-extern MAV_CTRL_INPUT_PKT    g_ctrl_input_pkt;
-extern MAV_CTRL_CFG_PKT      g_ctrl_cfg_pkt;
-extern MAV_DES_VEL_PKT       g_des_vel_pkt;
-
-extern MAV_DES_POSE_PKT      g_des_pose_pkt;
-extern PacketInfo *          g_des_pose_pkt_info;
-
-extern MAV_PID_CFG_PKT       g_pid_cfg_pkt;
-extern PacketInfo *          g_pid_cfg_pkt_info;
-
-//float g_vel_x_bf_last = 0;
-//float g_vel_y_bf_last = 0;
-//float g_vel_z_last = 0;
-void pidReset(void)
-{
-  // Check if there's a new packet with desired pose, if not set des_pose to zero
-  if (g_des_pose_pkt_info->updated == 0)
-  {
-    g_des_pose_pkt.x         = 0.0;
-    g_des_pose_pkt.y         = 0.0;
-    g_des_pose_pkt.z         = 0.0;
-    g_des_vel_pkt.vx         = 0.0;
-    g_des_vel_pkt.vy         = 0.0;
-    g_des_vel_pkt.vz         = 0.0;
-    g_des_vel_pkt.yaw_rate   = 0.0;
-    g_des_pose_pkt.yaw       = 0.0;
-  }
-
-  //initialize PID variables
-  pid_x.sum_error   = 0.0;
-  pid_y.sum_error   = 0.0;
-  pid_z.sum_error   = 0.0;
-  pid_vx.sum_error  = 0.0;
-  pid_vy.sum_error  = 0.0;
-  pid_vz.sum_error  = 0.0;
-  pid_yaw.sum_error = 0.0;
-}
-
-float pidCalc(PID * pid, float error, float d_term, float d_base, float dt)
-{
-  // clamp error
-  if      (error >  pid->max_error) error =  pid->max_error;
-  else if (error < -pid->max_error) error = -pid->max_error;
-
-  pid->sum_error += error * dt;
-
-  // prevent integral windup through clamping
-  if      (pid->sum_error >  pid->max_sum_error) pid->sum_error =  pid->max_sum_error;
-  else if (pid->sum_error < -pid->max_sum_error) pid->sum_error = -pid->max_sum_error;
-
-  float error_pow = pow((1.0/d_base),abs(error));
-  return  (pid->bias + pid->kp * error + (pid->kd *error_pow)* d_term + pid->ki * pid->sum_error);
-}
-
-void pidParamUpdate()
-{
-  // *************** X axis par *******************
-
-  pid_x.kp            = g_pid_cfg_pkt.k_p_x;
-  pid_x.ki            = g_pid_cfg_pkt.k_i_x;
-  pid_x.kd            = g_pid_cfg_pkt.k_d_x;
-  pid_x.d_base        = g_pid_cfg_pkt.d_base_x;
-  pid_x.kd2           = g_pid_cfg_pkt.k_d2_x;
-  pid_x.bias          = g_pid_cfg_pkt.bias_x;
-  pid_x.max_error     = g_pid_cfg_pkt.max_err_x;
-  pid_x.max_sum_error = g_pid_cfg_pkt.max_i_x;
-
-  pid_vx.kp            = g_pid_cfg_pkt.k_p_vx;
-  pid_vx.ki            = g_pid_cfg_pkt.k_i_vx;
-  pid_vx.kd            = g_pid_cfg_pkt.k_d_vx;
-  pid_vx.bias          = g_pid_cfg_pkt.bias_vx;
-  pid_vx.max_error     = g_pid_cfg_pkt.max_err_vx;
-  pid_vx.max_sum_error = g_pid_cfg_pkt.max_i_vx;
-
-  // *************** Y axis par *******************
-
-  pid_y.kp          = g_pid_cfg_pkt.k_p_y;
-  pid_y.ki          = g_pid_cfg_pkt.k_i_y;
-  pid_y.kd          = g_pid_cfg_pkt.k_d_y;
-  pid_y.d_base      = g_pid_cfg_pkt.d_base_y;
-  pid_y.kd2         = g_pid_cfg_pkt.k_d2_y;
-  pid_y.bias        = g_pid_cfg_pkt.bias_y;
-  pid_y.max_error     = g_pid_cfg_pkt.max_err_y;
-  pid_y.max_sum_error = g_pid_cfg_pkt.max_i_y;
-
-  pid_vy.kp         = g_pid_cfg_pkt.k_p_vy;
-  pid_vy.ki         = g_pid_cfg_pkt.k_i_vy;
-  pid_vy.kd         = g_pid_cfg_pkt.k_d_vy;
-  pid_vy.bias       = g_pid_cfg_pkt.bias_vy;
-  pid_vy.max_error     = g_pid_cfg_pkt.max_err_vy;
-  pid_vy.max_sum_error = g_pid_cfg_pkt.max_i_vy;
-
-  // *************** Z axis par *******************
-
-  pid_z.kp             = g_pid_cfg_pkt.k_p_z;
-  pid_z.ki             = g_pid_cfg_pkt.k_i_z;
-  pid_z.kd             = g_pid_cfg_pkt.k_d_z;
-  pid_z.kd2            = g_pid_cfg_pkt.k_d2_z;
-  pid_z.bias           = g_pid_cfg_pkt.bias_z;
-  pid_z.max_error      = g_pid_cfg_pkt.max_err_z;
-  pid_z.max_sum_error  = g_pid_cfg_pkt.max_i_z;
-
-
-  pid_vz.kp         = g_pid_cfg_pkt.k_p_vz;
-  pid_vz.ki         = g_pid_cfg_pkt.k_i_vz;
-  pid_vz.kd         = g_pid_cfg_pkt.k_d_vz;
-  pid_vz.bias       = g_pid_cfg_pkt.bias_vz;
-  pid_vz.max_error     = g_pid_cfg_pkt.max_err_vz;
-  pid_vz.max_sum_error = g_pid_cfg_pkt.max_i_vz;
-
-  // ****************** Yaw par *******************
-
-  pid_yaw.kp             = g_pid_cfg_pkt.k_p_yaw;
-  pid_yaw.ki             = g_pid_cfg_pkt.k_i_yaw;
-  pid_yaw.kd             = g_pid_cfg_pkt.k_d_yaw;
-  pid_yaw.bias           = g_pid_cfg_pkt.bias_yaw;
-  pid_yaw.max_error      = g_pid_cfg_pkt.max_err_yaw;
-  pid_yaw.max_sum_error  = g_pid_cfg_pkt.max_i_yaw;
-}
-
-void processCtrl(void)
-{
-  float dt = 0.001;//(g_timestamp - g_latest_ctrl_time) * 0.000001; //dt in sec
-  //g_latest_ctrl_time = g_timestamp;
-  // **** Check if there's a new packet with PID parameters ***************
-
-  if (g_pid_cfg_pkt_info->updated != 0)
-  {
-    g_pid_cfg_pkt_info->updated = 0;
-    pidParamUpdate();
-  }
-
-  if (g_flight_state_pkt.state == MAV_STATE_FLYING)
-  {
-    float roll     = LLToSIAngleRoll (LL_1khz_attitude_data.angle_roll);
-    float pitch    = LLToSIAnglePitch(LL_1khz_attitude_data.angle_pitch);
-
-    float a_x = g_accel_x * cos(pitch) + g_accel_y * sin(pitch)*sin(roll) + g_accel_z * sin(pitch)*cos(roll);
-    float a_y = g_accel_y * cos(roll)  - g_accel_z * sin(roll);
-
-    float vel_x_bf  = g_pose_pkt.vx * g_cos_psi + g_pose_pkt.vy * g_sin_psi;
-    float vel_y_bf  = g_pose_pkt.vy * g_cos_psi - g_pose_pkt.vx * g_sin_psi;
-    float vel_z = g_pose_pkt.vz;
-
-    //float dv_x = (vel_x_bf - g_vel_x_bf_last)/dt;
-    //float dv_y = (vel_y_bf - g_vel_y_bf_last)/dt;
-    //float dv_z = (g_pose_pkt.vz - g_vel_z_last )/dt;
-
-    //g_vel_x_bf_last = vel_x_bf;
-    //g_vel_y_bf_last = vel_y_bf;
-    //g_vel_z_last = vel_z;
-
-    g_ctrl_debug_pkt.vel_x_bf = vel_x_bf;
-    g_ctrl_debug_pkt.vel_y_bf = vel_y_bf;
-    g_ctrl_debug_pkt.ax_bf = a_x;
-    g_ctrl_debug_pkt.ay_bf = a_y;
-    //g_ctrl_debug_pkt.az    = dv_z;
-
-    // *************************** X axis ctrl*********************************
-
-    if (g_ctrl_cfg_pkt.ctrl_mode_pitch == MAV_CTRL_MODE_POSITION)
-    {
-      float des_x_bf   = (g_des_pose_pkt.x - g_pose_pkt.x) * g_cos_psi + (g_des_pose_pkt.y - g_pose_pkt.y) * g_sin_psi;
-      //float vel_x_bf   = g_pose_pkt.vx * g_cos_psi + g_pose_pkt.vy * g_sin_psi;
-      //float pitch_rate = LLToSIAngleRatePitch (LL_1khz_attitude_data.angvel_pitch);
-
-      g_ctrl_cmd.cmd_pitch = pidCalc(&pid_x, des_x_bf, -vel_x_bf, pid_x.d_base, dt);
-      g_ctrl_debug_pkt.pid_error_x_bf = des_x_bf;
-    }
-
-    else if (g_ctrl_cfg_pkt.ctrl_mode_pitch == MAV_CTRL_MODE_VELOCITY)
-    {
-      //float des_vx_bf   = (g_des_pose_pkt.vx - g_pose_pkt.vx) * g_cos_psi + (g_des_pose_pkt.vy - g_pose_pkt.vy) * g_sin_psi;
-      //float des_vx     = (float) g_des_pose_pkt.vx;
-      //float current_vx = (float) g_pose_pkt.vx;
-      float vx_error = g_des_vel_pkt.vx - vel_x_bf;
-      g_ctrl_debug_pkt.pid_error_vx_bf = vx_error;
-
-      g_ctrl_cmd.cmd_pitch = pidCalc(&pid_vx, vx_error, -a_x, 1.0, dt);
-    }
-
-    else if (g_ctrl_cfg_pkt.ctrl_mode_pitch == MAV_CTRL_MODE_DIRECT)
-      g_ctrl_cmd.cmd_pitch = g_ctrl_input_pkt.cmd_pitch;
-
-    else if (g_ctrl_cfg_pkt.ctrl_mode_pitch == MAV_CTRL_MODE_DISABLED)
-      g_ctrl_cmd.cmd_pitch = 0;
-
-    // set debug info
-    g_ctrl_debug_pkt.pid_x_i_term = pid_x.sum_error;
-
-    // *************************** Y axis ctrl *********************************
-
-    if (g_ctrl_cfg_pkt.ctrl_mode_roll == MAV_CTRL_MODE_POSITION)
-    {
-      float des_y_bf  = (g_des_pose_pkt.y - g_pose_pkt.y)* g_cos_psi - (g_des_pose_pkt.x - g_pose_pkt.x) * g_sin_psi;
-      //float vel_y_bf  = g_pose_pkt.vy * g_cos_psi - g_pose_pkt.vx * g_sin_psi;
-      //float roll_rate = LLToSIAngleRateRoll (LL_1khz_attitude_data.angvel_roll);
-
-      g_ctrl_cmd.cmd_roll = - pidCalc(&pid_y, des_y_bf, -vel_y_bf, pid_y.d_base, dt); // positive roll gives you negative y
-      g_ctrl_debug_pkt.pid_error_y_bf = des_y_bf;
-    }
-    else if (g_ctrl_cfg_pkt.ctrl_mode_roll == MAV_CTRL_MODE_VELOCITY)
-    {
-      //float des_vy     = (float) g_des_pose_pkt.vy;
-      //float current_vy = (float) g_pose_pkt.vy;
-
-      float vy_error = g_des_vel_pkt.vy - vel_y_bf;
-      g_ctrl_debug_pkt.pid_error_vy_bf = vy_error;
-      g_ctrl_cmd.cmd_roll = -pidCalc(&pid_vy, vy_error, -a_y, 1.0, dt);
-    }
-
-    else if (g_ctrl_cfg_pkt.ctrl_mode_roll == MAV_CTRL_MODE_DIRECT)
-      g_ctrl_cmd.cmd_roll = g_ctrl_input_pkt.cmd_roll;
-
-    else if (g_ctrl_cfg_pkt.ctrl_mode_roll == MAV_CTRL_MODE_DISABLED)
-      g_ctrl_cmd.cmd_roll = 0;
-
-    // set debug info
-    g_ctrl_debug_pkt.pid_y_i_term = pid_y.sum_error;
-
-    // **************************** Z axis ctrl *********************************
-
-    if (g_ctrl_cfg_pkt.ctrl_mode_thrust == MAV_CTRL_MODE_DISABLED)
-    {
-      g_ctrl_cmd.cmd_thrust = 0;
-    }
-    else
-    {
-      Thrust new_cmd_thrust = g_ctrl_cmd.cmd_thrust;
-
-      if (g_ctrl_cfg_pkt.ctrl_mode_thrust == MAV_CTRL_MODE_POSITION)
-      {
-        float des_z     = g_des_pose_pkt.z;
-        float current_z = g_pose_pkt.z;
-
-        new_cmd_thrust = pidCalc(&pid_z, des_z - current_z, -vel_z, 1.0, dt);// - pid_z.kd2 * g_accel_z;
-      }
-
-      else if (g_ctrl_cfg_pkt.ctrl_mode_thrust == MAV_CTRL_MODE_VELOCITY)
-            {
-              float des_vz     = g_des_vel_pkt.vz;
-
-              new_cmd_thrust = pidCalc(&pid_vz, des_vz - vel_z, -g_accel_z, 1.0, dt);
-            }
-
-      else if (g_ctrl_cfg_pkt.ctrl_mode_thrust == MAV_CTRL_MODE_DIRECT)
-      {
-        new_cmd_thrust = g_ctrl_input_pkt.cmd_thrust;
-      }
-
-      // spike guard
-      double delta_cmd_thrust = new_cmd_thrust - g_ctrl_cmd.cmd_thrust;
-
-      if      (delta_cmd_thrust > g_ctrl_cfg_pkt.cmd_thrust_delta_limit)
-        g_ctrl_cmd.cmd_thrust += g_ctrl_cfg_pkt.cmd_thrust_delta_limit;
-      else if (delta_cmd_thrust < -g_ctrl_cfg_pkt.cmd_thrust_delta_limit)
-        g_ctrl_cmd.cmd_thrust -= g_ctrl_cfg_pkt.cmd_thrust_delta_limit;
-      else
-        g_ctrl_cmd.cmd_thrust = new_cmd_thrust;
-
-      // set debug info
-      g_ctrl_debug_pkt.pid_z_i_term = pid_z.sum_error;
-    }
-
-    // ****************************** YAW ctrl *********************************
-
-    if (g_ctrl_cfg_pkt.ctrl_mode_yaw_rate == MAV_CTRL_MODE_POSITION)
-    {
-      float des_yaw     = g_des_pose_pkt.yaw;
-      float current_yaw = g_pose_pkt.yaw;
-      float yaw_rate    = LLToSIAngleRateYaw(LL_1khz_attitude_data.angvel_yaw);
-
-      float error =  des_yaw - current_yaw;
-      normalizeSIAnglePi(&error);
-
-      g_ctrl_cmd.cmd_yaw_rate = pidCalc(&pid_yaw, error, -yaw_rate, 1, dt);
-    }
-    if (g_ctrl_cfg_pkt.ctrl_mode_yaw_rate == MAV_CTRL_MODE_VELOCITY)
-      g_ctrl_cmd.cmd_yaw_rate = g_des_vel_pkt.yaw_rate;
-
-    else if (g_ctrl_cfg_pkt.ctrl_mode_yaw_rate == MAV_CTRL_MODE_DIRECT)
-      g_ctrl_cmd.cmd_yaw_rate = g_ctrl_input_pkt.cmd_yaw_rate;
-
-    else if (g_ctrl_cfg_pkt.ctrl_mode_yaw_rate == MAV_CTRL_MODE_DISABLED)
-      g_ctrl_cmd.cmd_yaw_rate = 0;
-
-    // set debug info
-    g_ctrl_debug_pkt.pid_yaw_i_term = pid_yaw.sum_error;
-
-  }
-
-  // **************************** CLAMP ********************************
-
-  // Clamp roll command
-  if      (g_ctrl_cmd.cmd_roll >  g_ctrl_cfg_pkt.cmd_roll_limit)
-    g_ctrl_cmd.cmd_roll =  g_ctrl_cfg_pkt.cmd_roll_limit;
-  else if (g_ctrl_cmd.cmd_roll < -g_ctrl_cfg_pkt.cmd_roll_limit)
-    g_ctrl_cmd.cmd_roll = -g_ctrl_cfg_pkt.cmd_roll_limit;
-
-  // Clamp pitch command
-  if      (g_ctrl_cmd.cmd_pitch >  g_ctrl_cfg_pkt.cmd_pitch_limit)
-    g_ctrl_cmd.cmd_pitch =  g_ctrl_cfg_pkt.cmd_pitch_limit;
-  else if (g_ctrl_cmd.cmd_pitch < -g_ctrl_cfg_pkt.cmd_pitch_limit)
-    g_ctrl_cmd.cmd_pitch = -g_ctrl_cfg_pkt.cmd_pitch_limit;
-
-  // Clamp yaw rate command
-  if      (g_ctrl_cmd.cmd_yaw_rate > g_ctrl_cfg_pkt.cmd_yaw_rate_limit)
-    g_ctrl_cmd.cmd_yaw_rate =  g_ctrl_cfg_pkt.cmd_yaw_rate_limit;
-  else if (g_ctrl_cmd.cmd_yaw_rate < -g_ctrl_cfg_pkt.cmd_yaw_rate_limit)
-    g_ctrl_cmd.cmd_yaw_rate = -g_ctrl_cfg_pkt.cmd_yaw_rate_limit;
-
-  // Clamp thrust command
-  if      (g_ctrl_cmd.cmd_thrust > g_ctrl_cfg_pkt.cmd_thrust_limit)
-    g_ctrl_cmd.cmd_thrust = g_ctrl_cfg_pkt.cmd_thrust_limit;
-  else if (g_ctrl_cmd.cmd_thrust < 0)
-    g_ctrl_cmd.cmd_thrust = 0;
-}
diff --git a/ccny_asctec_firmware/src/sdk.c b/ccny_asctec_firmware/src/sdk.c
deleted file mode 100644
index 8005fc6..0000000
--- a/ccny_asctec_firmware/src/sdk.c
+++ /dev/null
@@ -1,711 +0,0 @@
-/*
-
-Copyright (c) 2011, Markus Achtelik, ASL, ETH Zurich, Switzerland
-You can contact the author at <markus dot achtelik at mavt dot ethz dot ch>
-
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-* Redistributions of source code must retain the above copyright
-notice, this list of conditions and the following disclaimer.
-* Redistributions in binary form must reproduce the above copyright
-notice, this list of conditions and the following disclaimer in the
-documentation and/or other materials provided with the distribution.
-* Neither the name of ETHZ-ASL nor the
-names of its contributors may be used to endorse or promote products
-derived from this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
-ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL ETHZ-ASL BE LIABLE FOR ANY
-DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-
-*/
-
-#include <mav_common/comm_packets.h>
-#include <mav_common/comm.h>
-#include <mav_common/comm_types.h>
-
-#include "sdk.h"
-#include "main.h"
-
-#include "system.h"
-#include "LL_HL_comm.h"
-#include "uart.h"
-#include "time.h"
-#include "irq.h"
-#include "LPC214x.h"
-#include "gpsmath.h"
-
-struct WO_SDK_STRUCT WO_SDK;
-struct WO_CTRL_INPUT WO_CTRL_Input;
-struct RO_RC_DATA RO_RC_Data;
-struct WO_DIRECT_MOTOR_CONTROL WO_Direct_Motor_Control;
-
-volatile int64_t g_timestamp  = 0;
-
-int64_t timeOffset = 0;
-unsigned short time_step = 2000;
-int64_t time_correction = 0;
-extern float g_vz_p_f;
-#define MAX_TOGGLE_CMD_TIME 2000000  // maximum toggle time allowed - 2s
-
-unsigned int g_sdk_loops;             // SDK loops counter
-float g_cpu_load_sum = 0.0;           // for filtered CPU load
-
-MAV_STATUS_PKT        g_status_pkt;         // Pose + vel of MAV, from output of KF or directly from computer updates
-MAV_CTRL_CMD          g_ctrl_cmd;
-MAV_FLIGHT_STATE_PKT  g_flight_state_pkt;
-MAV_RCDATA_PKT        g_rcdata_pkt;
-MAV_CTRL_DEBUG_PKT    g_ctrl_debug_pkt;
-MAV_POSE_PKT          g_pose_pkt;           // 9D state (pose + vel) of MAV in Comm unit
-MAV_IMU_PKT           g_imu_pkt;            // imu (angles and linear accelerations)
-
-MAV_DUMMY_PKT         g_dummy_pkt;
-PacketInfo *          g_dummy_pkt_info;
-
-MAV_FLIGHT_ACTION_PKT g_flight_action_pkt;
-PacketInfo *          g_flight_action_pkt_info;
-
-MAV_TIMESYNC_PKT      g_timesync_pkt;
-PacketInfo *          g_timesync_pkt_info;
-
-MAV_TX_FREQ_CFG_PKT   g_tx_freq_cfg_pkt;
-PacketInfo *          g_tx_freq_cfg_pkt_info;
-
-MAV_PID_CFG_PKT       g_pid_cfg_pkt;
-PacketInfo *          g_pid_cfg_pkt_info;
-
-MAV_CTRL_CFG_PKT      g_ctrl_cfg_pkt;
-PacketInfo *          g_ctrl_cfg_pkt_info;
-
-MAV_CTRL_INPUT_PKT    g_ctrl_input_pkt;
-PacketInfo *          g_ctrl_input_pkt_info;
-
-MAV_DES_POSE_PKT      g_des_pose_pkt;
-PacketInfo *          g_des_pose_pkt_info;
-
-MAV_DES_VEL_PKT       g_des_vel_pkt;
-PacketInfo *          g_des_vel_pkt_info;
-
-MAV_POSE2D_PKT        g_mav_pose2D_pkt;
-PacketInfo *          g_mav_pose2D_pkt_info;
-
-MAV_HEIGHT_PKT        g_mav_height_pkt;
-PacketInfo *          g_mav_height_pkt_info;
-
-MAV_KF_CFG_PKT        g_mav_kf_cfg_pkt;
-PacketInfo *          g_mav_kf_cfg_pkt_info;
-
-// *** for MAV state machine
-
-short   g_motors_running;             // are the motors on?
-int64_t g_toggle_motors_start_time;   // when we started toggling the motors
-//int16_t g_land_thrust;                // while landing, this is the current thrust  // TODO: type
-
-// *** for KF state estimation
-
-uint8_t g_kf_x_enabled;
-uint8_t g_kf_y_enabled;
-uint8_t g_kf_z_enabled;
-uint8_t g_kf_yaw_enabled;
-
-void sdkInit(void)
-{
-  g_sdk_loops = 0;
-  g_motors_running  = 0;
-
-  // **** these should be sent by the CPU upon successful connection
-
-  g_tx_freq_cfg_pkt.imu_period          = 0;
-  g_tx_freq_cfg_pkt.rcdata_period       = 0;
-  g_tx_freq_cfg_pkt.flight_state_period = 0;
-  g_tx_freq_cfg_pkt.pose_period         = 0;
-  g_tx_freq_cfg_pkt.status_period       = 0;
-  g_tx_freq_cfg_pkt.ctrl_debug_period   = 0;
-
-  g_tx_freq_cfg_pkt.imu_phase           = 0;
-  g_tx_freq_cfg_pkt.rcdata_phase        = 0;
-  g_tx_freq_cfg_pkt.flight_state_phase  = 0;
-  g_tx_freq_cfg_pkt.pose_phase          = 0;
-  g_tx_freq_cfg_pkt.status_phase        = 0;
-  g_tx_freq_cfg_pkt.ctrl_debug_phase    = 0;
-
-  // **** register packets to receive
-
-  g_dummy_pkt_info         = registerPacket(MAV_DUMMY_PKT_ID,         &g_dummy_pkt);
-  g_mav_pose2D_pkt_info    = registerPacket(MAV_POSE2D_PKT_ID,        &g_mav_pose2D_pkt);
-  g_mav_height_pkt_info    = registerPacket(MAV_HEIGHT_PKT_ID,        &g_mav_height_pkt);
-  g_mav_kf_cfg_pkt_info    = registerPacket(MAV_KF_CFG_PKT_ID,        &g_mav_kf_cfg_pkt);
-  g_timesync_pkt_info      = registerPacket(MAV_TIMESYNC_PKT_ID,      &g_timesync_pkt);
-  g_ctrl_cfg_pkt_info      = registerPacket(MAV_CTRL_CFG_PKT_ID,      &g_ctrl_cfg_pkt);
-  g_pid_cfg_pkt_info       = registerPacket(MAV_PID_CFG_PKT_ID,       &g_pid_cfg_pkt);
-  g_flight_action_pkt_info = registerPacket(MAV_FLIGHT_ACTION_PKT_ID, &g_flight_action_pkt);
-  g_des_pose_pkt_info      = registerPacket(MAV_DES_POSE_PKT_ID,      &g_des_pose_pkt);
-  g_ctrl_input_pkt_info    = registerPacket(MAV_CTRL_INPUT_PKT_ID,    &g_ctrl_input_pkt);
-  g_tx_freq_cfg_pkt_info   = registerPacket(MAV_TX_FREQ_CFG_PKT_ID,   &g_tx_freq_cfg_pkt);
-  g_des_vel_pkt_info       = registerPacket(MAV_DES_VEL_PKT_ID,      &g_des_vel_pkt);
-
-  UART0_rxFlush();
-  UART0_txFlush();
-
-  startAutoBaud();
-}
-
-/** SDK_mainloop(void) is triggered @ 1kHz.
- *
- * WO_(Write Only) data is written to the LL processor after
- * execution of this function.
- *
- * RO_(Read Only) data is updated before entering this function
- * and can be read to obtain information for supervision or control
- *
- * WO_ and RO_ structs are defined in sdk.h
- *
- * The struct LL_1khz_attitude_data (defined in LL_HL_comm.h) can
- * be used to read all sensor data, results of the data fusion
- * and R/C inputs transmitted from the LL-processor. This struct is
- * automatically updated at 1 kHz.
- * */
-
-void SDK_mainloop(void)
-{
-  unsigned int sdk_cycle_start_time = T1TC;
-  WO_SDK.ctrl_mode = 0x00; //0x00: absolute angle and throttle control
-
-  ++g_sdk_loops;
-
-  // add beeping to mark stay-alive
-
-  feedbackBeep();
-
-  // parse serial port for data
-
-  parseRxFifo();
-
-  // process pose updates and fusion using KalmanFilter
-
-  processKF();
-
-  // process control commands - from PID or direct motor control
-
-  processCtrl();
-
-  // process changes of motor state - if motors change from ON to OFF, or
-  // from OFF to ON (from LL read only structs) then the flight state of the
-  // vehicle is updated accordingly
-
-  processMotorStateChanges();
-
-  // process Flight action requests
-  // only when serial is enabled (rcdata[4])
-
-  processFlightActionRequests();
-
-  // process engage/disengage timeouts
-  // only allow toggle motors commands to be sent for a certain period of time
-  // after a timeout, go to error state
-
-  processEngageDisengageTimeouts();
-
-  // process landing speed
-  // gradual landing, thrust decreases over time
-
-  processLandingThrust();
-
-  // determine motor commands based on the flight state
-
-  processMotorCommands();
-
-  // check to send packet data over serial port
-
-  processSendData();
-
-  // *************************************************************************
-
-  UART_send_ringbuffer();
-
-  //synchronizeTime();
-
-  // ------------------------------------------------------------------------
-
-  unsigned int dt;
-  if (T1TC < sdk_cycle_start_time)
-    dt = (processorClockFrequency() - sdk_cycle_start_time) + T1TC;
-  else
-    dt = T1TC - sdk_cycle_start_time;
-
-  // calculate average cpu load in %
-  float cpu_load = ControllerCyclesPerSecond * ((dt * 1e2) / processorClockFrequency());
-  g_cpu_load_sum += cpu_load;
-  
-  if (g_sdk_loops % 100 == 0)
-  {
-    g_status_pkt.cpu_load = g_cpu_load_sum / 100.0;
-    g_cpu_load_sum = 0.0;
-  }
-
-  g_status_pkt.battery_voltage = HL_Status.battery_voltage_1 / 1000.0; //mv to volts
-  g_status_pkt.timestamp = g_timestamp;
-
-  //watchdog();
-}
-
-inline void writeCommand(short pitch, short roll, short yaw, short thrust, short ctrl, short enable)
-{
-  WO_CTRL_Input.pitch  = pitch;
-  WO_CTRL_Input.roll   = roll;
-  WO_CTRL_Input.thrust = thrust;
-  WO_CTRL_Input.yaw    = yaw;
-  WO_CTRL_Input.ctrl   = ctrl;
-  WO_SDK.ctrl_enabled  = enable;
-}
-
-inline void sendMavPoseData(void)
-{
-  writePacket2Ringbuffer(MAV_POSE_PKT_ID, (unsigned char*)&g_pose_pkt, sizeof(g_pose_pkt));
-}
-
-inline void sendImuData(void)
-{
-  g_imu_pkt.roll  = LLToSIAngleRoll (LL_1khz_attitude_data.angle_roll);
-  g_imu_pkt.pitch = LLToSIAnglePitch(LL_1khz_attitude_data.angle_pitch);
-  g_imu_pkt.yaw   = LLToSIAngleYaw  (LL_1khz_attitude_data.angle_yaw);
-  g_imu_pkt.roll_rate  = LLToSIAngleRateRoll (LL_1khz_attitude_data.angvel_roll);
-  g_imu_pkt.pitch_rate = LLToSIAngleRatePitch(LL_1khz_attitude_data.angvel_pitch);
-  g_imu_pkt.yaw_rate   = LLToSIAngleRateYaw  (LL_1khz_attitude_data.angvel_yaw);
-  writePacket2Ringbuffer(MAV_IMU_PKT_ID, (unsigned char*)&g_imu_pkt, sizeof(g_imu_pkt));
-}
-
-inline void sendFlightStateData(void)
-{
-  writePacket2Ringbuffer(MAV_FLIGHT_STATE_PKT_ID, (unsigned char*)&g_flight_state_pkt, sizeof(g_flight_state_pkt));
-}
-
-inline void sendRcData(void)
-{
-  for (int i = 0; i < 8; ++i)
-    g_rcdata_pkt.channel[i] = RO_RC_Data.channel[i];
-
-  writePacket2Ringbuffer(MAV_RCDATA_PKT_ID, (unsigned char*)&g_rcdata_pkt, sizeof(g_rcdata_pkt));
-}
-
-inline void sendStatusData(void)
-{
-  writePacket2Ringbuffer(MAV_STATUS_PKT_ID, (unsigned char*)&g_status_pkt, sizeof(g_status_pkt));
-}
-
-inline void sendCtrlDebugData(void)
-{
-  // debug packet - takes commands that were written to control
-  // and sends back up to CPU
-
-  g_ctrl_debug_pkt.cmd_roll_LL           = WO_CTRL_Input.roll ;
-  g_ctrl_debug_pkt.cmd_pitch_LL          = WO_CTRL_Input.pitch ;
-  g_ctrl_debug_pkt.cmd_yaw_rate_LL       = WO_CTRL_Input.yaw ;
-  g_ctrl_debug_pkt.cmd_thrust_LL         = WO_CTRL_Input.thrust;
-
-  g_ctrl_debug_pkt.roll_limit     = - SIToLLCmdRoll(g_ctrl_cfg_pkt.cmd_roll_limit); // -1 for coordinate system
-  g_ctrl_debug_pkt.pitch_limit    =   SIToLLCmdPitch(g_ctrl_cfg_pkt.cmd_pitch_limit);
-  g_ctrl_debug_pkt.yaw_rate_limit =   SIToLLCmdYawRate(g_ctrl_cfg_pkt.cmd_yaw_rate_limit);
-  g_ctrl_debug_pkt.thrust_limit   =   SIToLLCmdThrust(g_ctrl_cfg_pkt.cmd_thrust_limit);
-
-  g_ctrl_debug_pkt.ctrl_mode_roll = g_ctrl_cfg_pkt.ctrl_mode_roll;
-  g_ctrl_debug_pkt.ctrl_mode_pitch = g_ctrl_cfg_pkt.ctrl_mode_pitch;
-  g_ctrl_debug_pkt.ctrl_mode_yaw_rate  = g_ctrl_cfg_pkt.ctrl_mode_yaw_rate;
-  g_ctrl_debug_pkt.ctrl_mode_thrust =  g_ctrl_cfg_pkt.ctrl_mode_thrust;
-
-  writePacket2Ringbuffer(MAV_CTRL_DEBUG_PKT_ID, (unsigned char*)&g_ctrl_debug_pkt, sizeof(g_ctrl_debug_pkt));
-}
-
-inline unsigned short isSerialEnabled(void)
-{
-  return RO_RC_Data.channel[4];
-}
-
-inline void synchronizeTime(void)
-{
-  // check for timesync packet
-  if (g_timesync_pkt_info->updated)
-  {
-    timeOffset = (900*timeOffset + 100 * (g_timesync_pkt.ts1 * 2 - g_timesync_pkt.tc1 - g_timestamp) / 2) / 1000;
-    g_status_pkt.timesync_offset = timeOffset;
-
-    if (timeOffset > 1e7 || timeOffset < -1e7)
-    {
-      g_timestamp = g_timesync_pkt.ts1;
-      timeOffset = 0;
-    }
-    else if (timeOffset > 2000)
-      timeOffset = 2000;
-    else if (timeOffset < -2000)
-      timeOffset = -2000;
-
-    if (timeOffset > 0)
-    {
-      time_step = 4000 / timeOffset;
-      time_correction = 1;
-    }
-    else if (timeOffset < 0)
-    {
-      time_step = -4000 / timeOffset;
-      time_correction = -1;
-    }
-    else
-    {
-      time_step = 4000;
-      time_correction = 0;
-    }
-
-    g_timesync_pkt_info->updated = 0;
-  }
-
-  // correct timestamp every step sdkloops by one us
-  if (g_sdk_loops % time_step == 0)
-  {
-    g_timestamp += time_correction;
-  }
-
-  if (g_sdk_loops % 2000 == 0)
-  {
-    g_timesync_pkt.tc1 = g_timestamp;
-    g_timesync_pkt.ts1 = 0;
-    writePacket2Ringbuffer(MAV_TIMESYNC_PKT_ID, (unsigned char*)&g_timesync_pkt, sizeof(g_timesync_pkt));
-    UART_send_ringbuffer();
-  }
-}
-/*
-inline void watchdog(void)
-{
-  static uint32_t lastTxPackets = 0;
-
-  // check if a valid packet arrived in the HLI_COMMUNICATION_TIMEOUT s
-  if ((g_sdk_loops % (ControllerCyclesPerSecond  * HLI_COMMUNICATION_TIMEOUT )) == 0)
-  {
-    if (UART_rxGoodPacketCount == lastTxPackets)
-    {
-      startAutoBaud();
-    }
-    lastTxPackets = UART_rxGoodPacketCount;
-  }
-}
-*/
-
-inline int checkTxPeriod(uint16_t period, uint16_t phase)
-{
-  if (period == 0)
-    return 0;
-  else
-    return g_sdk_loops % period == phase;
-}
-
-inline void processKF()
-{
-  if (g_mav_kf_cfg_pkt_info->updated)
-  {
-    g_mav_kf_cfg_pkt_info->updated = 0;
-
-    uint8_t kf_reset = 0;
-
-    kf_reset         = g_mav_kf_cfg_pkt.enable_mask & (1<<MAV_KF_RESET_BIT);
-    g_kf_x_enabled   = g_mav_kf_cfg_pkt.enable_mask & (1<<MAV_KF_X_BIT);
-    g_kf_y_enabled   = g_mav_kf_cfg_pkt.enable_mask & (1<<MAV_KF_Y_BIT);
-    g_kf_z_enabled   = g_mav_kf_cfg_pkt.enable_mask & (1<<MAV_KF_Z_BIT);
-    g_kf_yaw_enabled = g_mav_kf_cfg_pkt.enable_mask & (1<<MAV_KF_YAW_BIT);
-
-    kal_x.Sigma2Q1 = g_mav_kf_cfg_pkt.Q_x;
-    kal_x.Sigma2Q2 = g_mav_kf_cfg_pkt.Q_x;
-    kal_x.Sigma2R1 = g_mav_kf_cfg_pkt.R_x;
-    kal_x.Sigma2R2 = g_mav_kf_cfg_pkt.R_vx;
-
-    kal_y.Sigma2Q1 = g_mav_kf_cfg_pkt.Q_y;
-    kal_y.Sigma2Q2 = g_mav_kf_cfg_pkt.Q_y;
-    kal_y.Sigma2R1 = g_mav_kf_cfg_pkt.R_y;
-    kal_y.Sigma2R2 = g_mav_kf_cfg_pkt.R_vy;
-
-    kal_z.Sigma2Q1 = g_mav_kf_cfg_pkt.Q_z;
-    kal_z.Sigma2Q2 = g_mav_kf_cfg_pkt.Q_z;
-    kal_z.Sigma2R1 = g_mav_kf_cfg_pkt.R_z;
-    kal_z.Sigma2R2 = g_mav_kf_cfg_pkt.R_vz_p;
-
-    kal_yaw.Sigma2Q = g_mav_kf_cfg_pkt.Q_yaw;
-    kal_yaw.Sigma2R = g_mav_kf_cfg_pkt.R_yaw;
-
-    if (kf_reset != 0) resetKalmanFilter();
-  }
-
-  KFilter();
-
-  // **** Update pose based on Kalman Filter (or direct CPU updates)
-
-  if (g_kf_yaw_enabled != 0)
-  {
-    g_pose_pkt.yaw = kal_out.yaw_filtered;
-  }
-  else
-  {
-    g_pose_pkt.yaw = g_mav_pose2D_pkt.yaw;
-  }
-
-  if (g_kf_x_enabled != 0)
-  {
-    g_pose_pkt.x  = kal_out.pos_filtered[0];
-    g_pose_pkt.vx = kal_out.vel_filtered[0];
-  }
-  else
-  {
-    g_pose_pkt.x  = g_mav_pose2D_pkt.x;
-    g_pose_pkt.vx = g_mav_pose2D_pkt.vx;
-  }
-
-  if (g_kf_y_enabled != 0)
-  {
-    g_pose_pkt.y  = kal_out.pos_filtered[1];
-    g_pose_pkt.vy = kal_out.vel_filtered[1];
-  }
-  else
-  {
-    g_pose_pkt.y  = g_mav_pose2D_pkt.y;
-    g_pose_pkt.vy = g_mav_pose2D_pkt.vy;
-  }
-
-  if (g_kf_z_enabled != 0)
-  {
-    g_pose_pkt.z  = kal_out.pos_filtered[2];
-    g_pose_pkt.vz = kal_out.vel_filtered[2];
-  }
-  else
-  {
-    g_pose_pkt.z  = g_mav_height_pkt.z;
-    g_pose_pkt.vz = g_mav_height_pkt.vz;
-  }
-
-  g_pose_pkt.roll  = LLToSIAngleRoll (LL_1khz_attitude_data.angle_roll);
-  g_pose_pkt.pitch = LLToSIAnglePitch(LL_1khz_attitude_data.angle_pitch);
-}
-
-
-inline void feedbackBeep()
-{
-  if (g_flight_state_pkt.state == MAV_STATE_ERROR)
-  {
-    // High frequency ERROR beep
-    if (g_sdk_loops % 100 == 0)
-      beeper(ON);
-    if (g_sdk_loops % 100 == 50)
-      beeper(OFF);
-  }
-  else if (isSerialEnabled() != 0)
-  {
-    // Double beep, serial is enabled
-    if (g_sdk_loops % 1000 ==  0 || g_sdk_loops % 1000 == 100)
-      beeper(ON);
-    if (g_sdk_loops % 1000 == 50 || g_sdk_loops % 1000 == 150)
-      beeper(OFF);
-  }
-  else
-  {
-    // Single beep, serial disable
-    if (g_sdk_loops % 1000 == 0)
-      beeper(ON);
-    if (g_sdk_loops % 1000 == 50)
-      beeper(OFF);
-  }
-}
-
-inline void processMotorStateChanges()
-{
-  short motors_running = LL_1khz_attitude_data.status2 & 0x1;
-
-  if (g_motors_running == 0 && motors_running != 0)
-  {
-    // motors just changed from to ON from Remote command
-    g_flight_state_pkt.state = MAV_STATE_IDLE;
-  }
-  else if (g_motors_running != 0 && motors_running == 0)
-  {
-    if (g_flight_state_pkt.state != MAV_STATE_ERROR)
-    {
-      // motors just changed from ON to OFF
-      g_flight_state_pkt.state = MAV_STATE_OFF;
-    }
-  }
-
-  g_motors_running = motors_running;
-}
-
-inline void processFlightActionRequests()
-{
-  if (g_flight_action_pkt_info->updated)
-  {
-    if(isSerialEnabled() != 0)
-    {
-      if (g_flight_action_pkt.action == MAV_ACTION_TOGGLE_ENGAGE)
-      {
-        if (g_flight_state_pkt.state == MAV_STATE_OFF)
-        {
-          g_flight_state_pkt.state = MAV_STATE_ENGAGING;
-          g_toggle_motors_start_time = g_timestamp;
-        }
-        else if (g_flight_state_pkt.state == MAV_STATE_IDLE)
-        {
-          g_flight_state_pkt.state = MAV_STATE_DISENGAGING;
-          g_toggle_motors_start_time = g_timestamp;
-        }
-      }
-      else if (g_flight_action_pkt.action == MAV_ACTION_ESTOP)
-      {
-        // estop
-        g_flight_state_pkt.state = MAV_STATE_ERROR;
-      }
-      else if (g_flight_action_pkt.action == MAV_ACTION_TAKEOFF)
-      {
-        if (g_flight_state_pkt.state == MAV_STATE_IDLE)
-        {
-          // takeoff
-          g_flight_state_pkt.state = MAV_STATE_FLYING;
-
-          // reset the PID controls
-          pidReset();
-        }
-      }
-      else if (g_flight_action_pkt.action == MAV_ACTION_LAND)
-      {
-        if (g_flight_state_pkt.state == MAV_STATE_FLYING)
-        {
-          // land
-          g_flight_state_pkt.state = MAV_STATE_LANDING;
-
-          //g_land_thrust = g_ctrl_cmd.cmd_thrust;
-        }
-      }
-    }
-
-    g_flight_action_pkt_info->updated = 0;
-  }
-}
-
-inline void processEngageDisengageTimeouts()
-{
-  if (g_flight_state_pkt.state == MAV_STATE_ENGAGING || g_flight_state_pkt.state == MAV_STATE_DISENGAGING)
-  {
-    if (g_timestamp - g_toggle_motors_start_time >= MAX_TOGGLE_CMD_TIME)
-    {
-      // go to error state
-      g_flight_state_pkt.state = MAV_STATE_ERROR;
-    }
-  }
-}
-
-inline void processLandingThrust()
-{
-  if (g_flight_state_pkt.state == MAV_STATE_LANDING)
-  {
-   /* while (g_pose_pkt.z > 0.30) //TODO include desired landing height in the packet
-    {
-      g_ctrl_cfg_pkt.ctrl_mode_pitch = MAV_CTRL_MODE_POSITION;
-      g_ctrl_cfg_pkt.ctrl_mode_roll = MAV_CTRL_MODE_POSITION;
-      g_des_vel_pkt.vz = 0.3; // TODO include desired landing velocity in the packet
-      processCtrl();
-    }*/
-
-    if (g_ctrl_cmd.cmd_thrust > 0)
-    {
-      // still landing - decrease thrust
-
-      if (g_sdk_loops % LAND_THRUST_DECREASE_PERIOD == 0)
-        g_ctrl_cmd.cmd_thrust -= LAND_THRUST_DECREASE_STEP;
-
-      if (g_ctrl_cmd.cmd_thrust < 0) g_ctrl_cmd.cmd_thrust = 0; // prevent from going under 0
-    }
-    else
-    {
-      g_flight_state_pkt.state = MAV_STATE_IDLE;
-    }
-  }
-}
-
-inline void processMotorCommands()
-{
-  if (g_flight_state_pkt.state == MAV_STATE_ERROR)
-  {
-    // TODO: real estop here!
-    writeCommand(0, 0, 0, 0, 0, 0);
-  }
-  else if (g_flight_state_pkt.state == MAV_STATE_ENGAGING || g_flight_state_pkt.state == MAV_STATE_DISENGAGING )
-  {
-    writeCommand(0, 0, 2047, 0, MAV_LL_CMD_YAW_RATE_MASK | MAV_LL_CMD_THRUST_MASK, 1);
-  }
-  else if (g_flight_state_pkt.state == MAV_STATE_IDLE || g_flight_state_pkt.state == MAV_STATE_OFF)
-  {
-    writeCommand(0, 0, 0, 0, MAV_LL_CMD_RPYT_MASK, 1);
-  }
-  else if (g_flight_state_pkt.state == MAV_STATE_LANDING)
-  {
-    writeCommand(0, 0, 0, SIToLLCmdThrust(g_ctrl_cmd.cmd_thrust), MAV_LL_CMD_THRUST_MASK, 1);
-  }
-  else if (g_flight_state_pkt.state == MAV_STATE_FLYING)
-  {
-    // fill out debug packet
-    g_ctrl_debug_pkt.cmd_roll     = g_ctrl_cmd.cmd_roll;
-    g_ctrl_debug_pkt.cmd_pitch    = g_ctrl_cmd.cmd_pitch;
-    g_ctrl_debug_pkt.cmd_yaw_rate = g_ctrl_cmd.cmd_yaw_rate;
-    g_ctrl_debug_pkt.cmd_thrust   = g_ctrl_cmd.cmd_thrust;
-
-    WO_CTRL_Input.roll   = SIToLLCmdRoll   (g_ctrl_cmd.cmd_roll);
-    WO_CTRL_Input.pitch  = SIToLLCmdPitch  (g_ctrl_cmd.cmd_pitch);
-    WO_CTRL_Input.yaw    = SIToLLCmdYawRate(g_ctrl_cmd.cmd_yaw_rate);
-    WO_CTRL_Input.thrust = SIToLLCmdThrust (g_ctrl_cmd.cmd_thrust);
-
-    short ctrl_mask = 0x00;
-
-    if (g_ctrl_cfg_pkt.ctrl_mode_roll     != MAV_CTRL_MODE_DISABLED) ctrl_mask |= MAV_LL_CMD_ROLL_MASK;
-    if (g_ctrl_cfg_pkt.ctrl_mode_pitch    != MAV_CTRL_MODE_DISABLED) ctrl_mask |= MAV_LL_CMD_PITCH_MASK;
-    if (g_ctrl_cfg_pkt.ctrl_mode_yaw_rate != MAV_CTRL_MODE_DISABLED) ctrl_mask |= MAV_LL_CMD_YAW_RATE_MASK;
-    if (g_ctrl_cfg_pkt.ctrl_mode_thrust   != MAV_CTRL_MODE_DISABLED) ctrl_mask |= MAV_LL_CMD_THRUST_MASK;
-
-    WO_CTRL_Input.ctrl  = ctrl_mask;
-    WO_SDK.ctrl_enabled = 0x01;
-  }
-}
-
-inline void processSendData()
-{
-  if (checkTxPeriod(g_tx_freq_cfg_pkt.rcdata_period, g_tx_freq_cfg_pkt.rcdata_phase))
-  {
-    sendRcData();
-  }
-
-  if (checkTxPeriod(g_tx_freq_cfg_pkt.imu_period, g_tx_freq_cfg_pkt.imu_phase))
-  {
-    sendImuData();
-  }
-
-  if (checkTxPeriod(g_tx_freq_cfg_pkt.flight_state_period, g_tx_freq_cfg_pkt.flight_state_phase))
-  {
-    sendFlightStateData();
-  }
-
-  if (checkTxPeriod(g_tx_freq_cfg_pkt.pose_period, g_tx_freq_cfg_pkt.pose_phase))
-  {
-    sendMavPoseData();
-  }
-
-  if (checkTxPeriod(g_tx_freq_cfg_pkt.status_period, g_tx_freq_cfg_pkt.status_phase ))
-  {
-    sendStatusData();
-  }
-
-  if (checkTxPeriod(g_tx_freq_cfg_pkt.ctrl_debug_period, g_tx_freq_cfg_pkt.ctrl_debug_phase))
-  {
-    sendCtrlDebugData();
-  }
-}
-
diff --git a/ccny_asctec_firmware/src/ssp.c b/ccny_asctec_firmware/src/ssp.c
deleted file mode 100644
index cf1ed16..0000000
--- a/ccny_asctec_firmware/src/ssp.c
+++ /dev/null
@@ -1,216 +0,0 @@
-#include "LPC214x.h"			/* LPC21XX Peripheral Registers	*/
-#include "type.h"
-#include "irq.h"
-#include "ssp.h"
-#include "main.h"
-#include "system.h"
-#include "LL_HL_comm.h"
-
-char SPIWRData[128];
-char SPIRDData[128];
-int CurrentTxIndex;
-int CurrentRxIndex;
-unsigned int SPIWR_num_bytes;
-
-volatile unsigned int SSP_trans_cnt=0;
-
-unsigned char data_sent_to_LL=1;
-
-unsigned char SSP_receiption_complete=1;
-unsigned char IMU_CalcData_updated=0;
-
-
-char data_sent_to_HL=1;
-
-inline void SSPReceive(unsigned char);
-
-void SSPHandler (void) __irq
-{
-    int regValue;
-    unsigned short input_data;
-//    unsigned char timeout=0;
-
-    IENABLE;				/* handles nested interrupt */
-
-    regValue = SSPMIS;
-    if ( regValue & SSPMIS_RORMIS )	/* Receive overrun interrupt */
-    {
-		SSPICR = SSPICR_RORIC;		/* clear interrupt */
-    }
-    if ( regValue & SSPMIS_RTMIS )	/* Receive timeout interrupt */
-    {
-		SSPICR = SSPICR_RTIC;		/* clear interrupt */
-    }
-
-    if ( regValue & SSPMIS_RXMIS )	/* Rx at least half full */
-    {
-    			/* receive until it's empty */
-	while ( SSPSR & SSPSR_RNE )
-	{
-		input_data=SSPDR;
-	    //SSPReceive(input_data&0xFF);
-	    //SSPReceive(input_data>>8);
-
-		SSP_rx_handler_HL(input_data&0xFF);
-		SSP_rx_handler_HL(input_data>>8);
-
-		//SSP_trans_cnt+=2;
-	    /* Wait until the Busy bit is cleared */
-	//    while ( (!(SSPSR & SSPSR_BSY) )&&(timeout++<50) );
-	}				/* interrupt will be cleared when */
-					/* data register is read or written */
-    }
-
-    if ( regValue & SSPMIS_TXMIS )	/* Tx at least half empty */
-    {
-	/* transmit until it's full */
-	while ( (SSPSR & SSPSR_TNF) )
-	{
-	    if(CurrentTxIndex<SPIWR_num_bytes)
-	    {
-	    	SSPDR = SPIWRData[CurrentTxIndex]|(SPIWRData[CurrentTxIndex+1]<<8);
-	    	CurrentTxIndex+=2;
-	    }
-	    else
-	    {
-	    	CurrentTxIndex=0;
-	    	SPIWR_num_bytes=0;
-	    	data_sent_to_LL=1;
-			SSPDR=0;
-	    }
-
-	    /* Wait until the Busy bit is cleared */
-	//    while ( !(SSPSR & SSPSR_BSY) );
-	}				/* interrupt will be cleared when */
-					/* data register is read or written */
-    }
-
-    IDISABLE;
-    VICVectAddr = 0;		/* Acknowledge Interrupt */
-}
-
-
-inline void SSPReceive(unsigned char SPI_rxdata)
-{
-	static unsigned char SPI_syncstate=0;
-	static unsigned char SPI_rxcount=0;
-	static unsigned char *SPI_rxptr;
-	static volatile unsigned char incoming_data;
-
-        //receive handler
-        if (SPI_syncstate==0)
-		{
-			if (SPI_rxdata=='>') SPI_syncstate++; else SPI_syncstate=0;
-		}
-		else if (SPI_syncstate==1)
-		{
-			if (SPI_rxdata=='*') SPI_syncstate++; else SPI_syncstate=0;
-		}
-		else if (SPI_syncstate==2)
-		{
-			if (SPI_rxdata=='>') SPI_syncstate++; else SPI_syncstate=0;
-		}
-		else if (SPI_syncstate==3)
-		{
-			if (SPI_rxdata==PD_IMUCALCDATA) //IMU CalcData
-			{
-				SPI_rxcount=sizeof(IMU_CalcData);
-				SPI_rxptr=(unsigned char *)&IMU_CalcData_tmp;
-				SPI_syncstate=4;
-				incoming_data=PD_IMUCALCDATA;
-			}
-			else if (SPI_rxdata==PD_IMURAWDATA) //IMU CalcData
-			{
-				SPI_rxcount=sizeof(IMU_RawData);
-				SPI_rxptr=(unsigned char *)&IMU_RawData;
-				SPI_syncstate=4;
-				incoming_data=PD_IMURAWDATA;
-			}
-            else SPI_syncstate=0;
-        }
-        else if (SPI_syncstate==4)
-		{
-			SPI_rxcount--;
-			*SPI_rxptr=SPI_rxdata;
-			SPI_rxptr++;
-			if (SPI_rxcount==0)
-        	{
-             	SPI_syncstate=5;
-             	if(incoming_data==PD_IMUCALCDATA)
-             	{
-             		IMU_CalcData_updated=1;
-             	}
-             	incoming_data=0;
-        	}
-		}
-		else if(SPI_syncstate==5) //check if another packet is pending
-		{
-			if(SPI_rxdata==0)
-			{
-				SPI_syncstate=0;
-			}
-			else SPI_syncstate=1;
-		}
-		else SPI_syncstate=0;
-
-		if(!SPI_syncstate) SSP_receiption_complete=1;
-		else SSP_receiption_complete=0;
-}
-
-void LL_write_init(void)
-{
-		SPIWRData[0]='>';
-		SPIWRData[1]='*';
-		SPIWRData[2]='>';
-}
-
-int LL_write(unsigned char *data, unsigned short cnt, unsigned char PD )	//write data to high-level processor
-{
-	unsigned int i;
-/*
-	if(data_sent_to_LL)
-	{
-		//SSP_trans_cnt++;
-		if(!SPIWR_num_bytes)
-		{
-			SPIWRData[3]=PD;
-			for(i=0; i<cnt; i++)
-			{
-				SPIWRData[i+4]=data[i];
-			}
-			SPIWRData[cnt+4]=0;
-			SPIWR_num_bytes=cnt+5;
-
-		}
-	}
-*/
-	if(data_sent_to_LL)
-	{
-		SPIWRData[3]=PD;
-		for(i=0; i<cnt; i++)
-		{
-			SPIWRData[i+4]=data[i];
-		}
-		SPIWRData[cnt+4]=0;
-		SPIWR_num_bytes=cnt+5;
-	}
-	else if(SPIWR_num_bytes+cnt<127)
-	{
-		SPIWRData[SPIWR_num_bytes-1]='>';
-		SPIWRData[0+SPIWR_num_bytes]='*';
-		SPIWRData[1+SPIWR_num_bytes]='>';
-		SPIWRData[2+SPIWR_num_bytes]=PD;
-		for(i=SPIWR_num_bytes; i<cnt+SPIWR_num_bytes; i++)
-		{
-			SPIWRData[i+3]=data[i-SPIWR_num_bytes];
-		}
-		SPIWR_num_bytes+=cnt+5;
-		SPIWRData[SPIWR_num_bytes-1]=0;
-	}
-	else return(0);
-	data_sent_to_LL=0;
-
-	return(1);
-}
-
-
diff --git a/ccny_asctec_firmware/src/syscalls.c b/ccny_asctec_firmware/src/syscalls.c
deleted file mode 100644
index abcc591..0000000
--- a/ccny_asctec_firmware/src/syscalls.c
+++ /dev/null
@@ -1,169 +0,0 @@
-/***********************************************************************/
-/*                                                                     */
-/*  SYSCALLS.C:  System Calls Remapping                                */
-/*  most of this is from newlib-lpc and a Keil-demo                    */
-/*                                                                     */
-/*  these are "reentrant functions" as needed by                       */
-/*  the WinARM-newlib-config, see newlib-manual                        */
-/*  collected and modified by Martin Thomas                            */
-/*  TODO: some more work has to be done on this                        */
-/***********************************************************************/
-
-#include <stdlib.h>
-#include <reent.h>
-#include <sys/stat.h>
-#include "uart.h"
-
-// new code for _read_r provided by Alexey Shusharin - Thanks
-_ssize_t _read_r(struct _reent *r, int file, void *ptr, size_t len)
-{
-  char c;
-  int  i;
-  unsigned char *p;
-
-  p = (unsigned char*)ptr;
-
-  for (i = 0; i < len; i++)
-  {
-    c = UARTReadChar();
-
-    *p++ = c;
-    UARTWriteChar(c);
-
-    if (c == 0x0D && i <= (len - 2))
-    {
-      *p = 0x0A;
-      UARTWriteChar(0x0A);
-      return i + 2;
-    }
-  }
-  return i;
-}
-
-
-#if 0
-// old version - no longer in use
-_ssize_t _read_r(
-    struct _reent *r, 
-    int file, 
-    void *ptr, 
-    size_t len)
-{
-	char c;
-	int  i;
-	unsigned char *p;
-	
-	p = (unsigned char*)ptr;
-	
-	for (i = 0; i < len; i++) {
-		// c = uart0Getch();
-		c = UARTReadChar();
-		if (c == 0x0D) {
-			*p='\0';
-			break;
-		}
-		*p++ = c;
-		UARTWriteChar(c);
-	}
-	return len - i;
-}
-#endif
-
-_ssize_t _write_r (
-    struct _reent *r, 
-    int file, 
-    const void *ptr, 
-    size_t len)
-{
-	int i;
-	const unsigned char *p;
-	
-	p = (const unsigned char*) ptr;
-	
-	for (i = 0; i < len; i++) {
-		if (*p == '\n' ) UARTWriteChar('\r');
-		UARTWriteChar(*p++);
-	}
-	
-	return len;
-}
-
-int _close_r(
-    struct _reent *r, 
-    int file)
-{
-	return 0;
-}
-
-_off_t _lseek_r(
-    struct _reent *r, 
-    int file, 
-    _off_t ptr, 
-    int dir)
-{
-	return (_off_t)0;	/*  Always indicate we are at file beginning.	*/
-}
-
-
-int _fstat_r(
-    struct _reent *r, 
-    int file, 
-    struct stat *st)
-{
-	/*  Always set as character device.				*/
-	st->st_mode = S_IFCHR;	
-		/* assigned to strong type with implicit 	*/
-		/* signed/unsigned conversion.  Required by 	*/
-		/* newlib.					*/
-
-	return 0;
-}
-
-int isatty(int file); /* avoid warning */
-
-int isatty(int file)
-{
-	return 1;
-}
-
-#if 0
-static void _exit (int n) {
-label:  goto label; /* endless loop */
-}
-#endif 
-
-/* "malloc clue function" */
-
-	/**** Locally used variables. ****/
-extern char _end[];              /*  end is set in the linker command 	*/
-				/* file and is the end of statically 	*/
-				/* allocated data (thus start of heap).	*/
-
-static char *heap_ptr;		/* Points to current end of the heap.	*/
-
-/************************** _sbrk_r *************************************/
-/*  Support function.  Adjusts end of heap to provide more memory to	*/
-/* memory allocator. Simple and dumb with no sanity checks.		*/
-/*  struct _reent *r	-- re-entrancy structure, used by newlib to 	*/
-/*			support multiple threads of operation.		*/
-/*  ptrdiff_t nbytes	-- number of bytes to add.			*/
-/*  Returns pointer to start of new heap area.				*/
-/*  Note:  This implementation is not thread safe (despite taking a	*/
-/* _reent structure as a parameter).  					*/
-/*  Since _s_r is not used in the current implementation, the following	*/
-/* messages must be suppressed.						*/
-
-void * _sbrk_r(
-    struct _reent *_s_r, 
-    ptrdiff_t nbytes)
-{
-	char  *base;		/*  errno should be set to  ENOMEM on error	*/
-
-	if (!heap_ptr) {	/*  Initialize if first time through.		*/
-		heap_ptr = _end;
-	}
-	base = heap_ptr;	/*  Point to end of heap.			*/
-	heap_ptr += nbytes;	/*  Increase heap.				*/
-	
-	return base;		/*  Return pointer to start of new heap area.	*/
-}
diff --git a/ccny_asctec_firmware/src/system.c b/ccny_asctec_firmware/src/system.c
deleted file mode 100644
index dae1241..0000000
--- a/ccny_asctec_firmware/src/system.c
+++ /dev/null
@@ -1,279 +0,0 @@
-#include "LPC214x.h"
-#include "system.h"
-#include "uart.h"
-#include "uart1.h"
-#include "main.h"
-#include "hardware.h"
-#include "LPC2k_ee.h"
-#include "type.h"
-#include "irq.h"
-#include "i2c.h"
-#include "ssp.h"
-#include "adc.h"
-
-#include "sdk.h"
-
-void init(void)
-{
-	MAMCR=0x00;
-	MAMTIM=0x03;
-	MAMCR=0x02;
-  VPBDIV = 0x01;  //0x01: peripheral frequency == cpu frequency, 0x00: per. freq. = crystal freq.
-  pll_init();
-  pll_feed();
-  init_ports();
-  UARTInitialize(57600);	//debug / command
-  UART1Initialize(57600);	//57600 Servo / GPS, 38400 "indoor GPS"
-  init_spi();
-  init_spi1();
-  init_timer0();
-  init_timer1();
-//  I2CInit(I2CMASTER);
-  PWM_Init();
-  ADCInit(ADC_CLK);
-  init_interrupts();
- }
-
-void init_interrupts(void)
-{
-  init_VIC();
-
-  //Timer0 interrupt
-  install_irq( TIMER0_INT, (void *) timer0ISR );
-
-  //Timer1 interrupt
-  install_irq( TIMER1_INT, (void *) timer1ISR );
-
-  //UART1 interrupt
-  install_irq( UART1_INT, (void *) uart1ISR );
-  U1IER = 3; //=3; enable THRE and RX interrupt
-
-  //UART0 interrupt
-  install_irq( UART0_INT, (void *) uart0ISR );
-  U0IER = 3; //=3; enable THRE and RX interrupt
-
-  //I2C0 interrupt
-//  install_irq( I2C0_INT, (void *) I2C0MasterHandler );
-//  I20CONSET = I2CONSET_I2EN;
-
-  //SSP interrupt
-  install_irq( SPI1_INT, (void *) SSPHandler );
-  /* Set SSPINMS registers to enable interrupts */
-  /* enable all interrupts, Rx overrun, Rx timeout, RX FIFO half full int,
-  TX FIFO half empty int */
-  SSPIMSC = SSPIMSC_TXIM | SSPIMSC_RXIM | SSPIMSC_RORIM;// | SSPIMSC_RTIM;
-  /* SSP Enabled */
-  SSPCR1 |= SSPCR1_SSE;
-}
-
-
-void init_ports(void)
-{
-/* PINSEL0
- *
- * PORT0:
- * P0.0: TXD0 -> 01
- * P0.1: RXD0 -> 01
- * P0.2: SCO0 -> 01
- * P0.3: SDA0 -> 01
- * Byte0_sel = 0b01010101 = 0x55
- *
- * P0.4: SCK0 -> 01
- * P0.5: MISO0 -> 01
- * P0.6: MOSI0 -> 01
- * P0.7: LL_NCS/IO_out -> 00
- * or: PWM2 -> 10
- * Byte1_sel = 0x00010101 = 0x15
- * Byte0_io_dir = 0x80
- *
- * P0.8: TXD1 -> 01
- * P0.9: RXD1 -> 01
- * P0.10: IO_in -> 00
- * P0.11: SCL1 -> 11
- * or Falcon8: IO_out -> 00
- * Byte2_sel = 0b11000101 = 0xC5
- *
- * P0.12: IO_in -> 00
- * P0.13: IO_in -> 00
- * P0.14: SDA1 -> 11
- * or IO_out (CS SD-Card) => SD_Logging
- * P0.15: IO_in -> 00
- * Byte3_sel = 0b00110000 = 0x30
- * Byte1_io_dir = 0x00
- * or SD_Logging => Byte1_io_dir=0x40
- */
-
- 	PINSEL0=0x30C51555;
-
- /* PINSEL1
-  *
-  * P0.16: IO_in -> 00
-  * P0.17: SCK1 -> 10
-  * P0.18: MISO1 -> 10
-  * P0.19: MOSI1-> 10
-  * Byte0: 0b10101000 = 0xA8
-  *
-  * P0.20: SSEL1 -> 10
-  * P0.21: PWM5 -> 01
-  * P0.22: IO_in -> 00
-  * P0.23: IO_in -> 00
-  * Byte1: 0b00000110 = 0x06
-  * Byte2_io_dir: 0x30 //0x11
-  *
-  * P0.24: 00
-  * P0.25: VOLTAGE_2: -> 01
-  * or IO_in (FALCON) -> 00
-  * P0.26: 00
-  * P0.27: 00
-  * Byte2: 0b00000100 = 0x04
-  *
-  * P0.28: CURRENT_2: -> 01
-  * P0.29: VOLTAGE_1: -> 01
-  * P0.30: CURRENT_1: -> 01
-  * P0.31: IO_in -> 00
-  * Byte3: 0b00010101 = 0x15
-  * Byte3_io_dir=0x00
-  */
- PINSEL1 = 0x150406A8;
-
- PINSEL2 = 0x00000004;
-
- IODIR0 = 0x0030B480;
-
- IOSET0 = (1<<EXT_NCS)|(1<<11); //all nCS high
- //IOSET0 = (1<<LL_nCS);	//CS LL_Controller
-
-/* P1.16: IO_1/IO_out	=> FET for camera power supply
- * P1.17: Beeper/IO_out
- * .
- * .
- * P1.24: LED1/IO_out
- * P1.25: LED2/IO_out
- *
- */
-
- IODIR1 = 0x03030000;
- IOSET1 = ((1<<24)|(1<<16)); //turn off LED1, turn beeper off
-
-}
-
-void init_timer0(void)
-{
-  T0TC=0;
-  T0TCR=0x0;    //Reset timer0
-  T0MCR=0x3;    //Interrupt on match MR0 and reset counter
-  T0PR=0;
-  T0PC=0;     //Prescale Counter = 0
-  T0MR0=peripheralClockFrequency()/ControllerCyclesPerSecond; // /200 => 200 Hz Period
-  T0TCR=0x1;   //Set timer0
-}
-
-//Weiss:{
-void init_timer1(void)
-{
-  T1TC=0;
-  T1TCR=0x0;    //disable timer1
-  T1MCR=0x3;    //Interrupt on match MR0 and reset counter
-  T1PR=0;
-  T1PC=0; 		//Prescale Counter = 0
-  T1MR0=processorClockFrequency(); // match every s
-  T1TCR=0x1;   //enable timer1
-}
-//}
-
-void PWM_Init( void )
-{
-  //  match_counter = 0;
-  //  PINSEL0 = 0x000A800A;	/* set GPIOs for all PWMs */
-  //  PINSEL1 = 0x00000400;
-    PWMTCR = TCR_RESET;		/* Counter Reset */
-
-    PWMPR = 0x00;		/* count frequency:Fpclk */
-    PWMMCR = PWMMR0R;	/* interrupt on PWMMR0, reset on PWMMR0, reset
-				TC if PWM0 matches */
-    PWMMR0 = 1179648 ;
-    PWMMR5 = 88470;
-
-    /* all PWM latch enabled */
-    PWMLER = LER5_EN;
-
-        /* All single edge, all enable */
-    PWMPCR = PWMENA1 | PWMENA2 | PWMENA3 | PWMENA4 | PWMENA5 | PWMENA6;
-    PWMTCR = TCR_CNT_EN | TCR_PWM_EN;	/* counter enable, PWM enable */
-}
-
-
-void init_spi(void)
-{
-  S0SPCCR=0x04; //30 clock-cycles (~60MHz) = 1 SPI cycle => SPI @ 2MHz
-  S0SPCR=0x20;  //LPC is Master
-}
-
-void init_spi1(void)
-{
-	unsigned char i, Dummy;
-
-    /* Set DSS data to 8-bit, Frame format SPI, CPOL = 0, CPHA = 0, and SCR is 3 */
-    SSPCR0 = 0x040F;
-
-    /* SSPCPSR clock prescale register, master mode, minimum divisor is 0x02 */
-    SSPCPSR = 0x1B;
-
-    for ( i = 0; i < FIFOSIZE; i++ )
-    {
-	Dummy = SSPDR;		/* clear the RxFIFO */
-    }
-
-    /*all ints deactivated*/
-	SSPIMSC = 0;
-
-    /* Device select as master, SSP Enabled */
-    SSPCR1 = 0x00;// | SSPCR1_SSE;
-
-    return;
-
-
-}
-
-void pll_init(void)
-{
-  PLLCFG=0x23;    //0b00100011; => M=4,0690; P=2;
-  PLLCON=0x03;    //PLLE=1, PLLC=1 => PLL enabled as system clock
-}
-
-void pll_feed(void)
-{
-  PLLFEED=0xAA;
-  PLLFEED=0x55;
-}
-
-unsigned int processorClockFrequency(void)
-{
-  return 58982400;
-}
-
-unsigned int peripheralClockFrequency(void)
-{
-  unsigned int divider;
-  switch (VPBDIV & 3)
-    {
-      case 0:
-        divider = 4;
-        break;
-      case 1:
-        divider = 1;
-        break;
-      case 2:
-        divider = 2;
-        break;
-    }
-  return processorClockFrequency() / divider;
-}
-
-void delay(int n)
-{
-  volatile int i;
-  for (i = 0; i < n; ++i);
-}
-
-
diff --git a/ccny_asctec_firmware/src/uart.c b/ccny_asctec_firmware/src/uart.c
deleted file mode 100644
index 79d0dc7..0000000
--- a/ccny_asctec_firmware/src/uart.c
+++ /dev/null
@@ -1,470 +0,0 @@
-#include <string.h>
-#include <mav_common/comm.h>
-
-#include "LPC214x.h"
-#include "interrupt_utils.h"
-#include "system.h"
-#include "main.h"
-#include "uart.h"
-#include "irq.h"
-#include "hardware.h"
-#include "gpsmath.h"
-#include "ssp.h"
-#include "lpcUART.h"
-
-volatile unsigned char transmission_running = 0;
-
-unsigned char UART_syncstate = 0;
-unsigned int UART_rxcount = 0;
-unsigned char *UART_rxptr;
-
-unsigned uart0_rx_cpsr;
-unsigned uart0_tx_cpsr;
-
-#define UART0_DISABLE_TX_INT uart0_tx_cpsr=disableIRQ();U0IER &= ~UIER_ETBEI;restoreIRQ(uart0_tx_cpsr);
-#define UART0_ENABLE_TX_INT  uart0_tx_cpsr=disableIRQ();U0IER |= UIER_ETBEI;restoreIRQ(uart0_tx_cpsr);
-#define UART0_DISABLE_RX_INT uart0_rx_cpsr=disableIRQ();U0IER &= ~UIER_ERBFI;restoreIRQ(uart0_rx_cpsr);
-#define UART0_ENABLE_RX_INT  uart0_rx_cpsr=disableIRQ();U0IER |= UIER_ERBFI;restoreIRQ(uart0_rx_cpsr);
-
-short uart0_min_tx_buffer = UART0_TX_BUFFERSIZE;
-short uart0_min_rx_buffer = UART0_RX_BUFFERSIZE;
-
-uint8_t rxBuffer[UART0_RX_BUFFERSIZE];
-uint8_t rxParseBuffer[UART0_RX_BUFFERSIZE];
-Fifo rxFifo;
-
-uint8_t txBuffer[UART0_TX_BUFFERSIZE];
-Fifo txFifo;
-
-volatile unsigned int UART_rxPacketCount = 0;
-volatile unsigned int UART_rxGoodPacketCount = 0;
-
-PacketInfo packetInfo[PACKET_INFO_SIZE];
-uint32_t registeredPacketCnt = 0;
-
-volatile char autobaud_in_progress = 0;
-
-void uart0ISR(void) __irq
-{
-  uint8_t t;
-  uint16_t iid;
-  short freemem = 0;
-
-  // Read IIR to clear interrupt and find out the cause
-  while (((iid = U0IIR) & UIIR_NO_INT) == 0)
-  {
-    if (iid & 0x100)
-    {
-      autobaud_in_progress = 1;
-      U0ACR |= 0x100; //clear ABEO interrupt
-      U0ACR &= ~0x01; // disable autobaud
-      U0IER &= ~((1 << 8) | (1 << 9)); //disable ABEO and ABTO interrupts
-
-      autobaud_in_progress = 0;
-    }
-
-    if (iid & 0x200)
-    {
-      autobaud_in_progress = 1;
-      U0ACR |= 0x200; //clear ABTO int
-
-      autobaud_in_progress = 0;
-    }
-
-    switch (iid & UIIR_ID_MASK)
-    {
-      case UIIR_RLS_INT: // Receive Line Status
-        U0LSR; // read LSR to clear
-        break;
-
-      case UIIR_CTI_INT: // <-- keep this together, in order to read remaining bytes below fifo threshold
-      case UIIR_RDA_INT:
-        // RDA interrupt
-        //receive handler
-        rxFifo.inUse = 1;
-        do
-        { // read from fifo as long as there is data available
-          t = U0RBR;
-          freemem = Fifo_availableMemory(&rxFifo);
-          if (freemem < uart0_min_rx_buffer)
-            uart0_min_rx_buffer = freemem;
-          if (!Fifo_writeByte(&rxFifo, t))
-            break;
-        } while (U0LSR & ULSR_RDR);
-        rxFifo.inUse = 0;
-
-        break;
-
-      case UIIR_THRE_INT:
-        // THRE interrupt
-        if(!(IOPIN0&(1<<CTS_RADIO))){
-          txFifo.inUse = 1;
-          while (U0LSR & ULSR_THRE)
-          {
-            if (Fifo_readByte(&txFifo, &t))
-            {
-              U0THR = t;
-            }
-            else
-            {
-              transmission_running = 0;
-              break;
-            }
-          }
-          txFifo.inUse = 0;
-        }
-        break;
-
-      default: // Unknown
-        U0LSR;
-        U0RBR;
-        break;
-    }
-  }
-  VICVectAddr = 0; // Acknowledge Interrupt
-}
-
-void Fifo_initialize(Fifo * fifo, uint8_t * buffer, uint32_t bufferSize)
-{
-  fifo->buffer = buffer;
-  fifo->bufferSize = bufferSize;
-  fifo->readIdx = 0;
-  fifo->writeIdx = 0;
-  fifo->tmp = 0;
-  fifo->mask = bufferSize - 1;
-  fifo->inUse = 0;
-}
-
-uint8_t Fifo_writeByte(Fifo * fifo, uint8_t byte)
-{
-  fifo->tmp = ((fifo->writeIdx + 1) & fifo->mask);
-  if (fifo->readIdx == fifo->tmp)
-    return 0;
-  fifo->buffer[fifo->writeIdx] = byte;
-  fifo->writeIdx = fifo->tmp;
-  return 1;
-}
-
-uint8_t Fifo_writeBlock(Fifo * fifo, void *data, uint32_t length)
-{
-  if (Fifo_availableMemory(fifo) <= length)
-    return 0;
-  uint8_t *ptr = (uint8_t *)data;
-  while (length--)
-  {
-    fifo->buffer[fifo->writeIdx] = *ptr++;
-    fifo->writeIdx = (fifo->writeIdx + 1) & fifo->mask;
-  }
-
-  //	//safe method
-  //	int i=0;
-  //	uint8_t *ptr = (uint8_t *)data;
-  //	for(i=0; i<length; i++){
-  //		if(!Fifo_writeByte(fifo, ptr[i]))
-  //			return 0;
-  //	}
-
-  return 1;
-}
-
-uint8_t Fifo_readByte(Fifo * fifo, uint8_t * byte)
-{
-  if (fifo->readIdx == fifo->writeIdx)
-    return 0;
-  *byte = fifo->buffer[fifo->readIdx];
-  fifo->readIdx = (fifo->readIdx + 1) & fifo->mask;
-  return 1;
-}
-
-uint16_t Fifo_availableMemory(Fifo * fifo)
-{
-  return (fifo->readIdx - fifo->writeIdx - 1) & fifo->mask;
-}
-
-void Fifo_reset(Fifo * fifo)
-{
-  fifo->writeIdx = 0;
-  fifo->readIdx = 0;
-}
-
-PacketInfo* registerPacket(uint8_t descriptor, void * data)
-{
-  //	if(registeredPacketCnt < PACKET_INFO_SIZE){
-  packetInfo[registeredPacketCnt].data = data;
-  packetInfo[registeredPacketCnt].descriptor = descriptor;
-  packetInfo[registeredPacketCnt].updated = 0;
-  registeredPacketCnt++;
-  return &packetInfo[registeredPacketCnt - 1];
-  //	}
-  // TODO: what if space for packets is exceeded??
-  //	return NULL;
-}
-
-void parseRxFifo(void)
-{
-  static uint8_t packetType;
-  static uint8_t flag;
-  static int packetSize = 0;
-  static int rxCount = 0;
-  static uint16_t checksum_computed = 0;
-  static uint16_t checksum_received = 0;
-  static uint32_t syncstate = 0;
-  static MAV_ACK_PKT packet_ack;
-  uint32_t i = 0;
-  uint8_t rxdata = 0;
-
-  if (rxFifo.inUse == 1)
-    return;
-
-  //	UART0_DISABLE_RX_INT;
-
-  while (Fifo_readByte(&rxFifo, &rxdata))
-  {
-
-    if (syncstate == 0)
-    {
-      if (rxdata == '>')
-        syncstate++;
-      else
-        syncstate = 0;
-
-      rxCount = 0;
-      checksum_received = 0;
-      UART_rxptr = rxParseBuffer;
-      packetSize = 0;
-      flag = 0;
-    }
-    else if (syncstate == 1)
-    {
-      if (rxdata == '*')
-        syncstate++;
-      else
-        syncstate = 0;
-    }
-    else if (syncstate == 2)
-    {
-      if (rxdata == '>')
-        syncstate++;
-      else
-        syncstate = 0;
-    }
-    else if (syncstate == 3)
-    {
-      packetSize = rxdata; // get size of packet
-      syncstate++;
-    }
-    else if (syncstate == 4)
-    {
-      packetType = rxdata; // get packet type
-      if (packetSize < 1)
-        syncstate = 0;
-      else
-      {
-        rxCount = packetSize;
-        syncstate++;
-      }
-    }
-    else if (syncstate == 5)
-    {
-      flag = rxdata;
-      syncstate++;
-    }
-    else if (syncstate == 6) // read data
-    {
-      rxParseBuffer[packetSize - rxCount] = rxdata;
-      rxCount--;
-
-      if (rxCount == 0)
-      {
-        syncstate++;
-      }
-    }
-    else if (syncstate == 7) // first byte of checksum
-    {
-      checksum_received = rxdata & 0xff;
-      syncstate++;
-    }
-    else if (syncstate == 8) // second byte of checksum + check (and dispatch?)
-    {
-      checksum_received |= ((unsigned short)rxdata << 8);
-      UART_rxPacketCount++;
-
-      checksum_computed = crc16(&packetType, 1, 0xff);
-      checksum_computed = crc16(&flag, 1, checksum_computed);
-      checksum_computed = crc16(rxParseBuffer, packetSize, checksum_computed);
-
-      if (checksum_received == checksum_computed)
-      {
-        UART_rxGoodPacketCount++;
-        for (i = 0; i < registeredPacketCnt; i++)
-        {
-          if (packetType == packetInfo[i].descriptor)
-          {
-            memcpy((packetInfo[i].data), rxParseBuffer, packetSize);
-            packetInfo[i].updated = 1;
-            if (flag & MAV_COMM_ACK)
-            {
-              packet_ack.ack_packet = flag;
-              writePacket2Ringbuffer(MAV_ACK_PKT_ID, &packet_ack, sizeof(packet_ack));
-            }
-            break;
-          }
-        }
-      }
-      syncstate = 0;
-    }
-    else
-      syncstate = 0;
-  }
-  //	UART0_ENABLE_RX_INT;
-}
-
-inline int writePacket2Ringbuffer(uint8_t descriptor, void * data, uint8_t length)
-{
-  static uint8_t header[] = {0xFF, 0x09, 0, 0};
-  uint16_t checksum = 0;
-  int state = 0;
-
-  header[2] = length;
-  header[3] = descriptor;
-  checksum = crc16(&descriptor, 1, 0xff);
-  checksum = crc16(data, length, checksum);
-
-  state = 1;
-  state &= UART0_writeFifo(header, sizeof(header));
-  state &= UART0_writeFifo(data, length);
-  state &= UART0_writeFifo(&checksum, sizeof(checksum));
-
-  return state;
-}
-
-uint8_t UART0_writeFifo(void * data, uint32_t length)
-{
-  uint8_t ret = 0;
-  short freemem;
-  //	while(txFifo.inUse);
-  //	UART0_DISABLE_TX_INT;
-  ret = Fifo_writeBlock(&txFifo, data, length);
-  freemem = Fifo_availableMemory(&txFifo);
-  if (freemem < uart0_min_tx_buffer)
-    uart0_min_tx_buffer = freemem;
-  //	UART0_ENABLE_TX_INT;
-  return ret;
-}
-
-void UARTInitialize(unsigned int baud)
-{
-  UART0_DISABLE_RX_INT;
-  UART0_DISABLE_TX_INT;
-
-  unsigned int divisor = peripheralClockFrequency() / (16 * baud);
-
-  //UART0
-  U0LCR = 0x83; /* 8 bit, 1 stop bit, no parity, enable DLAB */
-  U0DLL = divisor & 0xFF;
-  U0DLM = (divisor >> 8) & 0xFF;
-  U0LCR &= ~0x80; /* Disable DLAB */
-  U0FCR = UFCR_FIFO_ENABLE | UFCR_FIFO_TRIG8 | UFCR_RX_FIFO_RESET | UFCR_TX_FIFO_RESET;//1; fifo enable, trigger interrupt after 8 bytes in the fifo
-  Fifo_initialize(&rxFifo, rxBuffer, UART0_RX_BUFFERSIZE);
-  Fifo_initialize(&txFifo, txBuffer, UART0_TX_BUFFERSIZE);
-
-  UART0_ENABLE_RX_INT;
-  UART0_ENABLE_TX_INT;
-}
-
-void startAutoBaud(void)
-{
-  if (U0ACR & 0x01)
-    return;
-
-  U0ACR = 0x01 | 0x04;// start, mode 0, autorestart
-  U0IER |= ((1 << 8) | (1 << 9)); //enable ABEO and ABTO interrupts
-}
-
-void UART0_rxFlush(void)
-{
-  U0FCR |= UFCR_RX_FIFO_RESET;
-  Fifo_reset(&rxFifo);
-}
-void UART0_txFlush(void)
-{
-  U0FCR |= UFCR_TX_FIFO_RESET;
-}
-
-int UART0_txEmpty(void)
-{
-  return (U0LSR & (ULSR_THRE | ULSR_TEMT)) == (ULSR_THRE | ULSR_TEMT);
-}
-
-//Write to UART0
-void UARTWriteChar(unsigned char ch)
-{
-  while ((U0LSR & 0x20) == 0)
-    ;
-  U0THR = ch;
-}
-
-unsigned char UARTReadChar(void)
-{
-  while ((U0LSR & 0x01) == 0)
-    ;
-  return U0RBR;
-}
-
-void __putchar(int ch)
-{
-  if (ch == '\n')
-    UARTWriteChar('\r');
-  UARTWriteChar(ch);
-}
-
-void UART_send(char *buffer, unsigned char length)
-{
-  unsigned char cnt = 0;
-  while (!(U0LSR & 0x20))
-    ; //wait until U0THR and U0TSR are both empty
-  while (length--)
-  {
-    U0THR = buffer[cnt++];
-    if (cnt > 15)
-    {
-      while (!(U0LSR & 0x20))
-        ; //wait until U0THR is empty
-    }
-  }
-}
-
-void UART_send_ringbuffer(void)
-{
-  uint8_t t;
-  if (!transmission_running)
-  {
-    if (Fifo_readByte(&txFifo, &t))
-    {
-      transmission_running = 1;
-      UARTWriteChar(t);
-    }
-  }
-}
-
-uint16_t crc_update(uint16_t crc, uint8_t data)
-{
-  data ^= (crc & 0xff);
-  data ^= data << 4;
-
-  return ((((uint16_t)data << 8) | ((crc >> 8) & 0xff)) ^ (uint8_t)(data >> 4) ^ ((uint16_t)data << 3));
-}
-
-uint16_t crc16(void* data, uint16_t cnt, uint16_t crc)
-{
-  uint8_t * ptr = (uint8_t *)data;
-  int i;
-
-  for (i = 0; i < cnt; i++)
-  {
-    crc = crc_update(crc, *ptr);
-    ptr++;
-  }
-  return crc;
-}
-
diff --git a/ccny_asctec_firmware/src/uart1.c b/ccny_asctec_firmware/src/uart1.c
deleted file mode 100644
index 9f38afe..0000000
--- a/ccny_asctec_firmware/src/uart1.c
+++ /dev/null
@@ -1,731 +0,0 @@
-#include "LPC214x.h"
-#include "interrupt_utils.h"
-#include "system.h"
-#include "main.h"
-#include "uart1.h"
-#include "irq.h"
-#include "hardware.h"
-#include "gpsmath.h"
-#include "ssp.h"
-
-unsigned char packets;
-unsigned char DataOutputsPerSecond;
-unsigned int uart_cnt;
-
-unsigned char data_requested=0;
-extern int ZeroDepth;
-
-unsigned short current_chksum;
-unsigned char chksum_to_check=0;
-unsigned char chksum_trigger=1;
-
-unsigned char transmission1_running=0;
-unsigned char trigger_transmission=0;
-
-volatile unsigned char baudrate1_change=0;
-
-unsigned char send_buffer[16];
-unsigned char *tx_buff;
-unsigned char UART1_syncstate=0;
-unsigned int UART1_rxcount=0;
-unsigned char *UART1_rxptr;
-
-unsigned char UART_CalibDoneFlag = 0;
-
-static volatile unsigned char rb_busy=0;
-
-static volatile unsigned char GPS_ACK_received=0;
-
-/*
-//configuration commands for GPS
-const unsigned char GPS_CFG_PRT[26] =
-		{	0x06, 0x00, 0x14, 0x00, 0x01, 0x00, 0x00, 0x00, 0xd0, 0x08, 0x08, 0x00, 0x00,
-			0xe1, 0x00, 0x00, 0x07, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe4, 0x2d };
-const unsigned char GPS_CFG_ANT[10] =
-		{	0x06, 0x13, 0x04, 0x00, 0x0b, 0x00, 0x0f, 0x38, 0x6f, 0x4f };
-const unsigned char GPS_CFG_MSG[11][12] =
-		{	{0x06, 0x01, 0x06, 0x00, 0x01, 0x01, 0x00, 0x00, 0x00, 0x00, 0x0f, 0x80},
-			{0x06, 0x01, 0x06, 0x00, 0x01, 0x02, 0x00, 0x01, 0x00, 0x00, 0x11, 0x88},
-			{0x06, 0x01, 0x06, 0x00, 0x01, 0x03, 0x00, 0x01, 0x00, 0x00, 0x12, 0x8d},
-			{0x06, 0x01, 0x06, 0x00, 0x01, 0x04, 0x00, 0x00, 0x00, 0x00, 0x12, 0x8f},
-			{0x06, 0x01, 0x06, 0x00, 0x01, 0x06, 0x00, 0x01, 0x00, 0x00, 0x15, 0x9c},
-			{0x06, 0x01, 0x06, 0x00, 0x01, 0x11, 0x00, 0x00, 0x00, 0x00, 0x1f, 0xd0},
-			{0x06, 0x01, 0x06, 0x00, 0x01, 0x12, 0x00, 0x01, 0x00, 0x00, 0x21, 0xd8},
-			{0x06, 0x01, 0x06, 0x00, 0x01, 0x20, 0x00, 0x00, 0x00, 0x00, 0x2e, 0x1b},
-			{0x06, 0x01, 0x06, 0x00, 0x01, 0x21, 0x00, 0x00, 0x00, 0x00, 0x2f, 0x20},
-			{0x06, 0x01, 0x06, 0x00, 0x01, 0x22, 0x00, 0x00, 0x00, 0x00, 0x30, 0x25},
-			{0x06, 0x01, 0x06, 0x00, 0x01, 0x30, 0x00, 0x00, 0x00, 0x00, 0x3e, 0x6b} };
-const unsigned char GPS_CFG_NAV2[46] =
-		{	0x06, 0x1a, 0x28, 0x00, 0x05, 0x00, 0x00, 0x00, 0x04, 0x03, 0x10, 0x02,
-			0x50, 0xc3, 0x00, 0x00, 0x0f, 0x0a, 0x0a, 0x3c, 0x00, 0x01, 0x00, 0x00,
-			0xfa, 0x00, 0xfa, 0x00, 0x64, 0x00, 0x2c, 0x01, 0x00, 0x00, 0x00, 0x00,
-			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5e, 0x30 };
-const unsigned char GPS_CFG_RATE[12] =
-		{	0x06, 0x08, 0x06, 0x00, 0xc8, 0x00, 0x01, 0x00, 0x00, 0x00, 0xdd, 0x68 };
-const unsigned char GPS_CFG_SBAS[14] =
-		{	0x06, 0x16, 0x08, 0x00, 0x03, 0x07, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
-			0x2f, 0xd9 };
-const unsigned char GPS_CFG_CFG[19] =
-		{	0x06, 0x09, 0x0d, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0x00, 0x00,
-			0x00, 0x00, 0x00, 0x00, 0x07, 0x21, 0xaf };
-*/
-
-// new commands for gps, sbas disabled
-const unsigned char GPS_CFG_PRT[26] =
-                {       0x06, 0x00, 0x14, 0x00, 0x01, 0x00, 0x00, 0x00, 0xd0, 0x08, 0x08, 0x00, 0x00,
-                        0xe1, 0x00, 0x00, 0x07, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe4, 0x2d };
-const unsigned char GPS_CFG_ANT[10] =
-                {       0x06, 0x13, 0x04, 0x00, 0x0b, 0x00, 0x0f, 0x38, 0x6f, 0x4f };
-const unsigned char GPS_CFG_MSG[11][12] =
-                {       {0x06, 0x01, 0x06, 0x00, 0x01, 0x01, 0x00, 0x00, 0x00, 0x00, 0x0f, 0x80},
-                        {0x06, 0x01, 0x06, 0x00, 0x01, 0x02, 0x00, 0x01, 0x00, 0x00, 0x11, 0x88},
-                        {0x06, 0x01, 0x06, 0x00, 0x01, 0x03, 0x00, 0x01, 0x00, 0x00, 0x12, 0x8d},
-                        {0x06, 0x01, 0x06, 0x00, 0x01, 0x04, 0x00, 0x00, 0x00, 0x00, 0x12, 0x8f},
-                        {0x06, 0x01, 0x06, 0x00, 0x01, 0x06, 0x00, 0x01, 0x00, 0x00, 0x15, 0x9c},
-                        {0x06, 0x01, 0x06, 0x00, 0x01, 0x11, 0x00, 0x00, 0x00, 0x00, 0x1f, 0xd0},
-                        {0x06, 0x01, 0x06, 0x00, 0x01, 0x12, 0x00, 0x01, 0x00, 0x00, 0x21, 0xd8},
-                        {0x06, 0x01, 0x06, 0x00, 0x01, 0x20, 0x00, 0x00, 0x00, 0x00, 0x2e, 0x1b},
-                        {0x06, 0x01, 0x06, 0x00, 0x01, 0x21, 0x00, 0x00, 0x00, 0x00, 0x2f, 0x20},
-                        {0x06, 0x01, 0x06, 0x00, 0x01, 0x22, 0x00, 0x00, 0x00, 0x00, 0x30, 0x25},
-                        {0x06, 0x01, 0x06, 0x00, 0x01, 0x30, 0x00, 0x00, 0x00, 0x00, 0x3e, 0x6b} };
-const unsigned char GPS_CFG_SBAS[14] =
-            {     0x06, 0x16, 0x08, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
-                  0x25, 0x90 }; //SBAS OFF
-const unsigned char GPS_CFG_NAV2[46] =
-            {     0x06, 0x1a, 0x28, 0x00, 0x05, 0x00, 0x00, 0x00, 0x04, 0x03, 0x0A, 0x02,
-                  0x50, 0xc3, 0x00, 0x00, 0x0f, 0x0a, 0x0a, 0x3c, 0x00, 0x01, 0x00, 0x00,
-                  0xfa, 0x00, 0xfa, 0x00, 0x64, 0x00, 0x2c, 0x01, 0x00, 0x00, 0x00, 0x00,
-                  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x58, 0x64 }; //max SV=10
-const unsigned char GPS_CFG_RATE[12] =
-            {     0x06, 0x08, 0x06, 0x00, 0xc8, 0x00, 0x01, 0x00, 0x00, 0x00, 0xdd, 0x68 };      //5Hz
-const unsigned char GPS_CFG_CFG[19] =
-                {       0x06, 0x09, 0x0d, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0x00, 0x00,
-                        0x00, 0x00, 0x00, 0x00, 0x07, 0x21, 0xaf };
-
-/*
-
-//globals for NMEA parser
-	double latitudeDeg;
-	double longitudeDeg;
-	char gprmc_string[5]="GPRMC";
-	static unsigned char gpsState=GPS_IDLE;
-	static unsigned char gpsCnt=0;
-	static unsigned char gpsFieldStart=1;
-	static unsigned char gpsFieldCnt=0;
-	static unsigned char gpsInitString[5];
-	static unsigned char gpsValue[20];
-//<- globals
-*/
-unsigned char startstring[]={'>','*','>'};
-unsigned char stopstring[]={'<','#','<'};
-
-void parse_POSLLH(unsigned char, unsigned char);
-void parse_POSUTM(unsigned char, unsigned char);
-void parse_VELNED(unsigned char, unsigned char);
-void parse_STATUS(unsigned char, unsigned char);
-void parse_NAVSOL(unsigned char, unsigned char);
-
-inline void parse_VELNED(unsigned char c, unsigned char reset)
-{
-	static unsigned char cnt=0;
-	static int VE, VN, heading;
-	static unsigned int sacc;
-
-	if(reset) cnt=0;
-	else
-	{
-		if(cnt==0) VN=c;
-		else if(cnt==1) VN+=c<<8;
-		else if(cnt==2) VN+=c<<16;
-		else if(cnt==3) VN+=c<<24;
-		else if(cnt==4) VE=c;
-		else if(cnt==5) VE+=c<<8;
-		else if(cnt==6) VE+=c<<16;
-		else if(cnt==7) VE+=c<<24;
-		else if(cnt==20) heading=c;
-		else if(cnt==21) heading+=c<<8;
-		else if(cnt==22) heading+=c<<16;
-		else if(cnt==23) heading+=c<<24;
-		else if(cnt==24) sacc=c;
-		else if(cnt==25) sacc+=c<<8;
-		else if(cnt==26) sacc+=c<<16;
-		else if(cnt==27)
-		{
-			sacc+=c<<24;
-			GPS_Data.speed_x=VE*10;	//convert to mm/s
-			GPS_Data.speed_y=VN*10; //convert to mm/s
-			GPS_Data.heading=heading/100;	//convert to deg * 1000
-			GPS_Data.speed_accuracy=sacc*10;	//convert to mm/s
-			gpsDataOkTrigger=1;
-		}
-		cnt++;
-	}
-}
-inline void parse_POSLLH(unsigned char c, unsigned char reset)
-{
-	static unsigned char cnt=0;
-	static int lat, lon, height;
-	static unsigned int hacc, vacc;
-
-	if(reset) cnt=0;
-	else
-	{
-		if(cnt==0) lon=c;
-		else if(cnt==1) lon+=c<<8;
-		else if(cnt==2) lon+=c<<16;
-		else if(cnt==3) lon+=c<<24;
-		else if(cnt==4) lat=c;
-		else if(cnt==5) lat+=c<<8;
-		else if(cnt==6) lat+=c<<16;
-		else if(cnt==7) lat+=c<<24;
-		else if(cnt==12) height=c;
-		else if(cnt==13) height+=c<<8;
-		else if(cnt==14) height+=c<<16;
-		else if(cnt==15) height+=c<<24;
-		else if(cnt==16) hacc=c;
-		else if(cnt==17) hacc+=c<<8;
-		else if(cnt==18) hacc+=c<<16;
-		else if(cnt==19) hacc+=c<<24;
-		else if(cnt==20) vacc=c;
-		else if(cnt==21) vacc+=c<<8;
-		else if(cnt==22) vacc+=c<<16;
-		else if(cnt==23)
-		{
-			vacc+=c<<24;
-			GPS_Data.latitude=lat;
-			GPS_Data.longitude=lon;
-			GPS_Data.height=height;
-			GPS_Data.horizontal_accuracy=hacc;
-			GPS_Data.vertical_accuracy=vacc;
-		}
-		cnt++;
-	}
-}
-inline void parse_POSUTM(unsigned char c, unsigned char reset)
-{
-	static unsigned char cnt=0;
-	static int E, N;
-
-	if(reset) cnt=0;
-	else
-	{
-		if(cnt==0) E=c;
-		else if(cnt==1) E+=c<<8;
-		else if(cnt==2) E+=c<<16;
-		else if(cnt==3) E+=c<<24;
-		else if(cnt==4) N=c;
-		else if(cnt==5) N+=c<<8;
-		else if(cnt==6) N+=c<<16;
-		else if(cnt==7)
-		{
-			N+=c<<24;
-//			GPS_Data.x=E;
-//			GPS_Data.y=N;
-		}
-		cnt++;
-	}
-}
-
-//NAVSOL is the only packet where the first 4 bytes need to be parsed. Any other packet discardes the first 4 bytes!!!
-inline void parse_NAVSOL(unsigned char c, unsigned char reset)
-{
-	static unsigned char cnt=0;
-	static unsigned int tow;
-	static unsigned short week;
-
-	if(reset) cnt=0;
-	else
-	{
-		if(cnt==0) tow=c;
-		else if(cnt==1)	tow+=c<<8;
-		else if(cnt==2)	tow+=c<<16;
-		else if(cnt==3) tow+=c<<24;
-		else if(cnt==8) week=c;
-		else if(cnt==9)
-		{
-			week+=c<<8;
-			GPS_Time.time_of_week=tow;
-			GPS_Time.week=week;
-		}
-		else if(cnt==47)
-		{
-			GPS_Data.numSV=c;
-		}
-		cnt++;
-	}
-}
-
-inline void parse_STATUS(unsigned char c, unsigned char reset)
-{
-	static unsigned char cnt=0;
-	static unsigned char GPSfix, flags, diffs;
-
-	if(reset) cnt=0;
-	else
-	{
-		if(cnt==0) GPSfix=c;
-		else if(cnt==1) flags=c;
-		else if(cnt==2)
-		{
-			diffs=c;
-			GPS_Data.status=GPSfix|(flags<<8)|(diffs<<16);
-		}
-		cnt++;
-	}
-}
-
-void uart1ISR(void) __irq
-{
-  static unsigned char state;
-  static unsigned char current_packet;
-  static unsigned short cnt, length;
-  unsigned char t;
-  unsigned char c;
-  IENABLE;
-  unsigned iir = U1IIR;
-  // Handle UART interrupt
-  switch ((iir >> 1) & 0x7)
-    {
-      case 1:
-		  // THRE interrupt
-
-		 if (ringbuffer1(RBREAD, &t, 1))
-		 {
-		   transmission1_running=1;
-		   UART1WriteChar(t);
-		 }
-		 else
-		 {
-		   transmission1_running=0;
-		   if (baudrate1_change)		//baudrate change after first GPS config command
-		   {
-			   UART1Initialize(57600);
-			   baudrate1_change=0;
-		   }
-		 }
-        break;
-      case 2:
-		c=U1RBR;
-
-		//UARTWriteChar(c);
-
-#ifndef INDOOR_GPS	//run GPS statemachine
-
-        //parse UBX (U0RBR);
-
-	//SSP_trans_cnt++;
-		switch (state)
-		{
-			case 0:
-				if(c==0xB5)
-				{
-					state=1;
-				}
-			break;
-			case 1:
-				if(c==0x62)
-				{
-					state=2;
-				}
-				else state=0;
-			break;
-			case 2:
-				if(c==0x01)	//NAV message
-				{
-				 	state=3;
-				}
-				else if (c==0x05)	//ACK message
-					{
-						state=10;
-					}
-				else state=0;
-			break;
-			case 3:
-				current_packet=c;
-				cnt=0;
-				state=4;
-			break;
-			case 4:
-				if(!cnt) length=c;
-				if(current_packet==0x06) parse_NAVSOL(0,1);
-				if(++cnt==2)
-				{
-					cnt=0;
-					state=5;
-				}
-			break;
-			case 5:	//Four bytes ITOW
-				//NAVSOL is the only packets where the first 4 bytes need to be parsed. Any other packet discardes the first 4 bytes!!!
-				if(current_packet==0x06) parse_NAVSOL(c,0);
-				if(++cnt==4)
-				{
-					cnt=0;
-					state=6;
-					if(current_packet==0x02) parse_POSLLH(0,1);
-					//else if(current_packet==0x08) parse_POSUTM(0,1);
-					else if(current_packet==0x03) parse_STATUS(0,1);
-					else if(current_packet==0x12) parse_VELNED(0,1);
-				}
-			break;
-			case 6:
-				if(current_packet==0x02)
-				{
-					parse_POSLLH(c,0);
-				}
-		/*		else if(current_packet==0x08	//POSUTM currently not used
-				{
-					parse_POSUTM(c,0);
-				}
-			*/	else if(current_packet==0x03)
-				{
-					parse_STATUS(c,0);
-				}
-				else if(current_packet==0x12)
-				{
-					parse_VELNED(c,0);
-				}
-				else if(current_packet==0x06)
-				{
-					parse_NAVSOL(c,0);
-				}
-				else state=0;
-
-				if(++cnt>=length-4)
-				{
-					state=0;
-				}
-			break;
-			case 10:
-				if (c==0x01)
-				{
-					cnt=0;
-					state=11;
-				} else
-					state=0;
-			break;
-			case 11:
-				if (!cnt) length=c;
-				if (cnt++==1)
-				{
-					cnt=0;
-					state=12;
-				}
-			break;
-			case 12:
-				if (c==0x06)		//ACK of a CFG-message
-				{
-					state=13;
-				} else
-					state=0;
-			break;
-			case 13:
-				state=14;
-			break;
-			case 14:
-				if (!GPS_ACK_received)
-				{
-					GPS_ACK_received=1;
-					state=0;
-				}
-			break;
-			default:
-				state=0;
-			break;
-		}
-
-#else	//run optical tracking statemachine
-		switch (state)
-		{
-			case 0:
-				if(c=='>') state=1;
-			break;
-			case 1:
-				if(c=='*') state=2;
-				else state=0;
-			break;
-			case 2:
-				if(c=='>')	//Startstring received
-				{
-					UART1_rxcount=sizeof(OF_Data);
-					UART1_rxptr=(unsigned char *)&OF_Data_e;
-				 	state=3;
-				}
-				else state=0;
-			break;
-			case 3:
-				UART1_rxcount--;
-				*UART1_rxptr=c;
-				UART1_rxptr++;
-				if (UART1_rxcount==0)
-	        	{
-	             	state=0;
-	             	OF_data_updated=0;
-	        	}
-			break;
-			default:
-			state=0;
-			break;
-		}
-#endif
-
-        break;
-      case 3:
-        // RLS interrupt
-        break;
-      case 6:
-        // CTI interrupt
-        break;
-   }
-  IDISABLE;
-  VICVectAddr = 0;		/* Acknowledge Interrupt */
-}
-
-void UART1Initialize(unsigned int baud)
-{
-  unsigned int divisor = peripheralClockFrequency() / (16 * baud);
-//UART1
-  U1LCR = 0x83; /* 8 bit, 1 stop bit, no parity, enable DLAB */
-  U1DLL = divisor & 0xFF;
-  U1DLM = (divisor >> 8) & 0xFF;
-  U1LCR &= ~0x80; /* Disable DLAB */
-  U1FCR = 1;
-}
-
-//Write to UART1
-void UART1WriteChar(unsigned char ch)
-{
-  while ((U1LSR & 0x20) == 0);
-  U1THR = ch;
-}
-
-unsigned char UART1ReadChar(void)
-{
-  while ((U1LSR & 0x01) == 0);
-  return U1RBR;
-}
-
-void UART1_send(unsigned char *buffer, unsigned char length)
-{
-	unsigned char cnt=0;
-	while(length--)
-	{
-		while (!(U0LSR & 0x20)); //wait until U0THR is empty
-		U1THR = buffer[cnt++];
-	}
-}
-
-void UART1_send_ringbuffer(void)
-{
-  unsigned char t;
-  if(!transmission1_running)
-  {
-    if(ringbuffer1(RBREAD, &t, 1))
-    {
-      transmission1_running=1;
-      UART1WriteChar(t);
-    }
-  }
-}
-
-int ringbuffer1(unsigned char rw, unsigned char *data, unsigned int count)	//returns 1 when write/read was successful, 0 elsewise
-{
-    static volatile unsigned char buffer[RINGBUFFERSIZE];
-//	static volatile unsigned int pfirst=0, plast=0;	//Pointers to first and last to read byte
-	static volatile unsigned int read_pointer, write_pointer;
-	static volatile unsigned int content=0;
-	unsigned int p=0;
-    unsigned int p2=0;
-
-	if(rw==RBWRITE)
-	{
-		if(count<RINGBUFFERSIZE-content)	//enough space in buffer?
-		{
-			while(p<count)
-			{
-				buffer[write_pointer++]=data[p++];
-			}
-            content+=count;
-            return(1);
-		}
-	}
-	else if(rw==RBREAD)
-	{
-		if(content>=count)
-		{
-			while(p2<count)
-			{
-				data[p2++]=buffer[read_pointer++];
-			}
-            content-=count;
-            if(!content) //buffer empty
-            {
-            	write_pointer=0;
-            	read_pointer=0;
-            }
-			return(1);
-		}
-	}
-        else if(rw==RBFREE)
-        {
-          if(content) return 0;
-          else return(RINGBUFFERSIZE-11);
-        }
-
-	return(0);
-}
-
-void GPS_configure(void)
-{
-	const unsigned char gps_startstring[2]={ 0xb5, 0x62 };		//sync chars
-
-	static unsigned char gpsconf_state, gps_cfg_msg_counter;
-	int written;
-	static unsigned char gpsconfig_timeout;
-	static unsigned char StartWithHighBaudrate = 0;
-
-	switch (gpsconf_state)
-	{
-		case 0:
-			if (StartWithHighBaudrate)
-			{
-				UART1Initialize(57600);
-				StartWithHighBaudrate = 0;
-			}
-			else
-				UART1Initialize(9600);
-			if ((ringbuffer1(RBFREE, 0, 0))>28)
-			{
-				written=ringbuffer1(RBWRITE, (unsigned char*)gps_startstring, 2);
-				written=ringbuffer1(RBWRITE, (unsigned char*)GPS_CFG_PRT, 26);
-				UART1_send_ringbuffer();
-				baudrate1_change=1;
-				gpsconf_state++;
-			}
-			gpsconfig_timeout=0;
-		break;
-		case 1:
-			if (GPS_ACK_received)
-			{
-				GPS_ACK_received=0;
-				if (ringbuffer1(RBFREE, 0, 0)>12)
-				{
-					ringbuffer1(RBWRITE, (unsigned char*)gps_startstring, 2);
-					ringbuffer1(RBWRITE, (unsigned char*)GPS_CFG_ANT, 10);
-					UART1_send_ringbuffer();
-					gps_cfg_msg_counter=0;
-					gpsconf_state++;
-				}
-				gpsconfig_timeout=0;
-				StartWithHighBaudrate = 0;
-			} else
-			{
-				gpsconfig_timeout++;
-				StartWithHighBaudrate = 1;
-			}
-		break;
-		case 2:
-			if (GPS_ACK_received)
-			{
-				GPS_ACK_received=0;
-				if (ringbuffer1(RBFREE, 0, 0)>14)
-				{
-					ringbuffer1(RBWRITE, (unsigned char*)gps_startstring, 2);
-					ringbuffer1(RBWRITE, (unsigned char*)GPS_CFG_MSG[gps_cfg_msg_counter], 12);
-					UART1_send_ringbuffer();
-					if (++gps_cfg_msg_counter==11)
-					{
-						gpsconf_state++;
-					}
-				}
-				gpsconfig_timeout=0;
-			} else
-				gpsconfig_timeout++;
-		break;
-		case 3:
-			if (GPS_ACK_received)
-			{
-				GPS_ACK_received=0;
-				if (ringbuffer1(RBFREE, 0, 0)>48)
-				{
-					ringbuffer1(RBWRITE, (unsigned char*)gps_startstring, 2);
-					ringbuffer1(RBWRITE, (unsigned char*)GPS_CFG_NAV2, 46);
-					UART1_send_ringbuffer();
-					gpsconf_state++;
-				}
-				gpsconfig_timeout=0;
-			} else
-				gpsconfig_timeout++;
-		break;
-		case 4:
-			if (GPS_ACK_received)
-			{
-				GPS_ACK_received=0;
-				if (ringbuffer1(RBFREE, 0, 0)>14)
-				{
-					ringbuffer1(RBWRITE, (unsigned char*)gps_startstring, 2);
-					ringbuffer1(RBWRITE, (unsigned char*)GPS_CFG_RATE, 12);
-					UART1_send_ringbuffer();
-					gpsconf_state++;
-				}
-				gpsconfig_timeout=0;
-			} else
-				gpsconfig_timeout++;
-		break;
-		case 5:
-			if (GPS_ACK_received)
-			{
-				GPS_ACK_received=0;
-				if (ringbuffer1(RBFREE, 0, 0)>16)
-				{
-					ringbuffer1(RBWRITE, (unsigned char*)gps_startstring, 2);
-					ringbuffer1(RBWRITE, (unsigned char*)GPS_CFG_SBAS, 14);
-					UART1_send_ringbuffer();
-					gpsconf_state++;
-				}
-				gpsconfig_timeout=0;
-			} else
-				gpsconfig_timeout++;
-		break;
-		case 6:
-			if (GPS_ACK_received)
-			{
-				GPS_ACK_received=0;
-				if (ringbuffer1(RBFREE, 0, 0)>21)
-				{
-					ringbuffer1(RBWRITE, (unsigned char*)gps_startstring, 2);
-					ringbuffer1(RBWRITE, (unsigned char*)GPS_CFG_CFG, 19);
-					UART1_send_ringbuffer();
-					gpsconf_state++;
-				}
-				gpsconfig_timeout=0;
-			} else
-				gpsconfig_timeout++;
-		break;
-		case 7:
-			if (GPS_ACK_received)
-			{
-				GPS_ACK_received=0;
-				GPS_init_status=GPS_IS_CONFIGURED;
-				gpsconf_state=0;
-				gpsconfig_timeout=0;
-			} else
-				gpsconfig_timeout++;
-		break;
-		default:
-			gpsconf_state=0;
-		break;
-	}
-	if (gpsconfig_timeout>GPSCONF_TIMEOUT)				//timeout for ACK receiving
-	{
-		if (StartWithHighBaudrate)
-		{
-			gpsconf_state=0;
-			gpsconfig_timeout=0;
-		} else
-		{
-			gpsconf_state=0;
-			gpsconfig_timeout=0;
-			GPS_init_status=GPS_CONFIG_ERROR;
-		}
-	}
-}
diff --git a/ccny_asctec_firmware/src/util.c b/ccny_asctec_firmware/src/util.c
deleted file mode 100644
index 4d58dd7..0000000
--- a/ccny_asctec_firmware/src/util.c
+++ /dev/null
@@ -1,12 +0,0 @@
-#include "util.h"
-
-void wait(int usec)
-{
-    volatile int64_t time_start = g_timestamp;
-
-    while(g_timestamp < time_start + usec)
-    {
-        //do nothing
-    }
-}
-
diff --git a/ccny_asctec_firmware_2/.cproject b/ccny_asctec_firmware_2/.cproject
deleted file mode 100644
index 089349e..0000000
--- a/ccny_asctec_firmware_2/.cproject
+++ /dev/null
@@ -1,607 +0,0 @@
-<?xml version="1.0" encoding="UTF-8" standalone="no"?>
-<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
-	<storageModule moduleId="org.eclipse.cdt.core.settings">
-		<cconfiguration id="0.1074116139">
-			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="0.1074116139" moduleId="org.eclipse.cdt.core.settings" name="Default">
-				<externalSettings/>
-				<extensions>
-					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
-					<extension id="org.eclipse.cdt.core.MachO64" point="org.eclipse.cdt.core.BinaryParser"/>
-					<extension id="org.eclipse.cdt.core.PE" point="org.eclipse.cdt.core.BinaryParser"/>
-					<extension id="org.eclipse.cdt.core.GNU_ELF" point="org.eclipse.cdt.core.BinaryParser"/>
-					<extension id="org.eclipse.cdt.core.VCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
-					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
-					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
-					<extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
-					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
-					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
-				</extensions>
-			</storageModule>
-			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
-				<configuration artifactName="ccny_asctec_firmware" buildProperties="" description="" id="0.1074116139" name="Default" parent="org.eclipse.cdt.build.core.prefbase.cfg">
-					<folderInfo id="0.1074116139." name="/" resourcePath="">
-						<toolChain id="org.eclipse.cdt.build.core.prefbase.toolchain.676623506" name="No ToolChain" resourceTypeBasedDiscovery="false" superClass="org.eclipse.cdt.build.core.prefbase.toolchain">
-							<targetPlatform binaryParser="org.eclipse.cdt.core.ELF;org.eclipse.cdt.core.MachO64;org.eclipse.cdt.core.PE;org.eclipse.cdt.core.GNU_ELF" id="org.eclipse.cdt.build.core.prefbase.toolchain.676623506.267380396" name=""/>
-							<builder buildPath="${workspace_loc:/ccny_asctec_firmware_2.0}" id="org.eclipse.cdt.build.core.settings.default.builder.314348906" keepEnvironmentInBuildfile="false" managedBuildOn="false" name="Gnu Make Builder" superClass="org.eclipse.cdt.build.core.settings.default.builder"/>
-							<tool id="org.eclipse.cdt.build.core.settings.holder.libs.926437784" name="holder for library settings" superClass="org.eclipse.cdt.build.core.settings.holder.libs"/>
-							<tool id="org.eclipse.cdt.build.core.settings.holder.822877595" name="Assembly" superClass="org.eclipse.cdt.build.core.settings.holder">
-								<option id="org.eclipse.cdt.build.core.settings.holder.undef.incpaths.1434511063" name="Undefined Include Paths" superClass="org.eclipse.cdt.build.core.settings.holder.undef.incpaths" valueType="undefIncludePath">
-									<listOptionValue builtIn="false" value="c:/WinARM/arm-elf/include"/>
-								</option>
-								<option id="org.eclipse.cdt.build.core.settings.holder.incpaths.2057674559" name="Include Paths" superClass="org.eclipse.cdt.build.core.settings.holder.incpaths" valueType="includePath">
-									<listOptionValue builtIn="false" value="&quot;C:\WinARM\arm-elf\include&quot;"/>
-									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/ccny_asctec_firmware_2/external/Common_WinARM/inc}&quot;"/>
-									<listOptionValue builtIn="false" value="&quot;C:\Users\rvalenti\workspace\ccny_asctec_firmware_2\include\ccny_asctec_firmware&quot;"/>
-								</option>
-								<inputType id="org.eclipse.cdt.build.core.settings.holder.inType.367932988" languageId="org.eclipse.cdt.core.assembly" languageName="Assembly" sourceContentType="org.eclipse.cdt.core.asmSource" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>
-							</tool>
-							<tool id="org.eclipse.cdt.build.core.settings.holder.815875827" name="GNU C++" superClass="org.eclipse.cdt.build.core.settings.holder">
-								<option id="org.eclipse.cdt.build.core.settings.holder.undef.incpaths.594669839" name="Undefined Include Paths" superClass="org.eclipse.cdt.build.core.settings.holder.undef.incpaths" valueType="undefIncludePath">
-									<listOptionValue builtIn="false" value="c:/WinARM/arm-elf/include"/>
-								</option>
-								<option id="org.eclipse.cdt.build.core.settings.holder.incpaths.1218124766" name="Include Paths" superClass="org.eclipse.cdt.build.core.settings.holder.incpaths" valueType="includePath">
-									<listOptionValue builtIn="false" value="&quot;C:\WinARM\arm-elf\include&quot;"/>
-									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/ccny_asctec_firmware_2/external/Common_WinARM/inc}&quot;"/>
-									<listOptionValue builtIn="false" value="&quot;C:\Users\rvalenti\workspace\ccny_asctec_firmware_2\include\ccny_asctec_firmware&quot;"/>
-								</option>
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-							</tool>
-							<tool id="org.eclipse.cdt.build.core.settings.holder.2081652367" name="GNU C" superClass="org.eclipse.cdt.build.core.settings.holder">
-								<option id="org.eclipse.cdt.build.core.settings.holder.undef.incpaths.691564143" name="Undefined Include Paths" superClass="org.eclipse.cdt.build.core.settings.holder.undef.incpaths" valueType="undefIncludePath">
-									<listOptionValue builtIn="false" value="c:/WinARM/arm-elf/include"/>
-								</option>
-								<option id="org.eclipse.cdt.build.core.settings.holder.incpaths.1992028641" name="Include Paths" superClass="org.eclipse.cdt.build.core.settings.holder.incpaths" valueType="includePath">
-									<listOptionValue builtIn="false" value="&quot;C:\WinARM\arm-elf\include&quot;"/>
-									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/ccny_asctec_firmware_2/external/Common_WinARM/inc}&quot;"/>
-									<listOptionValue builtIn="false" value="&quot;C:\Users\rvalenti\workspace\ccny_asctec_firmware_2\include\ccny_asctec_firmware&quot;"/>
-								</option>
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-						</toolChain>
-					</folderInfo>
-				</configuration>
-			</storageModule>
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-				<externalSettings/>
-				<extensions>
-					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
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-					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
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-			</storageModule>
-			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
-				<configuration artifactName="ccny_asctec_firmware_2" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.release,org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe" cleanCommand="rm -rf" description="" id="cdt.managedbuild.config.gnu.mingw.exe.release.1410576453" name="MinGW" parent="cdt.managedbuild.config.gnu.mingw.exe.release">
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-						<toolChain id="cdt.managedbuild.toolchain.gnu.mingw.exe.release.1602348472" name="MinGW GCC" superClass="cdt.managedbuild.toolchain.gnu.mingw.exe.release">
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-							<builder buildPath="${workspace_loc:/ccny_asctec_firmware_2/MinGW}" id="cdt.managedbuild.tool.gnu.builder.mingw.base.1466159823" keepEnvironmentInBuildfile="false" name="CDT Internal Builder" superClass="cdt.managedbuild.tool.gnu.builder.mingw.base"/>
-							<tool id="cdt.managedbuild.tool.gnu.assembler.mingw.exe.release.650949420" name="GCC Assembler" superClass="cdt.managedbuild.tool.gnu.assembler.mingw.exe.release">
-								<inputType id="cdt.managedbuild.tool.gnu.assembler.input.1934650763" superClass="cdt.managedbuild.tool.gnu.assembler.input"/>
-							</tool>
-							<tool id="cdt.managedbuild.tool.gnu.archiver.mingw.base.1483799868" name="GCC Archiver" superClass="cdt.managedbuild.tool.gnu.archiver.mingw.base"/>
-							<tool id="cdt.managedbuild.tool.gnu.cpp.compiler.mingw.exe.release.963476097" name="GCC C++ Compiler" superClass="cdt.managedbuild.tool.gnu.cpp.compiler.mingw.exe.release">
-								<option id="gnu.cpp.compiler.mingw.exe.release.option.optimization.level.1766121973" name="Optimization Level" superClass="gnu.cpp.compiler.mingw.exe.release.option.optimization.level" value="gnu.cpp.compiler.optimization.level.most" valueType="enumerated"/>
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-							</tool>
-							<tool id="cdt.managedbuild.tool.gnu.c.compiler.mingw.exe.release.1870075365" name="GCC C Compiler" superClass="cdt.managedbuild.tool.gnu.c.compiler.mingw.exe.release">
-								<option defaultValue="gnu.c.optimization.level.most" id="gnu.c.compiler.mingw.exe.release.option.optimization.level.1663670612" name="Optimization Level" superClass="gnu.c.compiler.mingw.exe.release.option.optimization.level" valueType="enumerated"/>
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-								<inputType id="cdt.managedbuild.tool.gnu.c.compiler.input.1563499045" superClass="cdt.managedbuild.tool.gnu.c.compiler.input"/>
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-							<tool id="cdt.managedbuild.tool.gnu.c.linker.mingw.exe.release.1191210324" name="MinGW C Linker" superClass="cdt.managedbuild.tool.gnu.c.linker.mingw.exe.release">
-								<inputType id="cdt.managedbuild.tool.gnu.c.linker.input.1308519046" superClass="cdt.managedbuild.tool.gnu.c.linker.input">
-									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
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-							<tool id="cdt.managedbuild.tool.gnu.cpp.linker.mingw.exe.release.2030913718" name="MinGW C++ Linker" superClass="cdt.managedbuild.tool.gnu.cpp.linker.mingw.exe.release"/>
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-		<scannerConfigBuildInfo instanceId="cdt.managedbuild.config.gnu.mingw.exe.release.1410576453;cdt.managedbuild.config.gnu.mingw.exe.release.1410576453.;cdt.managedbuild.tool.gnu.c.compiler.mingw.exe.release.1870075365;cdt.managedbuild.tool.gnu.c.compiler.input.1563499045">
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-				<scannerInfoProvider id="specsFile">
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-				</scannerInfoProvider>
-			</profile>
-			<profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
-				<buildOutputProvider>
-					<openAction enabled="true" filePath=""/>
-					<parser enabled="true"/>
-				</buildOutputProvider>
-				<scannerInfoProvider id="makefileGenerator">
-					<runAction arguments="-f ${project_name}_scd.mk" command="make" useDefault="true"/>
-					<parser enabled="true"/>
-				</scannerInfoProvider>
-			</profile>
-			<profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
-				<buildOutputProvider>
-					<openAction enabled="true" filePath=""/>
-					<parser enabled="true"/>
-				</buildOutputProvider>
-				<scannerInfoProvider id="specsFile">
-					<runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
-					<parser enabled="true"/>
-				</scannerInfoProvider>
-			</profile>
-			<profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
-				<buildOutputProvider>
-					<openAction enabled="true" filePath=""/>
-					<parser enabled="true"/>
-				</buildOutputProvider>
-				<scannerInfoProvider id="specsFile">
-					<runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
-					<parser enabled="true"/>
-				</scannerInfoProvider>
-			</profile>
-			<profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
-				<buildOutputProvider>
-					<openAction enabled="true" filePath=""/>
-					<parser enabled="true"/>
-				</buildOutputProvider>
-				<scannerInfoProvider id="specsFile">
-					<runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
-					<parser enabled="true"/>
-				</scannerInfoProvider>
-			</profile>
-		</scannerConfigBuildInfo>
-		<scannerConfigBuildInfo instanceId="cdt.managedbuild.config.gnu.mingw.exe.release.1657109378">
-			<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC"/>
-			<profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
-				<buildOutputProvider>
-					<openAction enabled="true" filePath=""/>
-					<parser enabled="true"/>
-				</buildOutputProvider>
-				<scannerInfoProvider id="specsFile">
-					<runAction arguments="-E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;" command="C:\WinARM\arm-elf\bin\gcc.exe" useDefault="true"/>
-					<parser enabled="true"/>
-				</scannerInfoProvider>
-			</profile>
-		</scannerConfigBuildInfo>
-	</storageModule>
-</cproject>
diff --git a/ccny_asctec_firmware_2/.dep/LL_HL_comm.o.d b/ccny_asctec_firmware_2/.dep/LL_HL_comm.o.d
deleted file mode 100644
index 168776b..0000000
--- a/ccny_asctec_firmware_2/.dep/LL_HL_comm.o.d
+++ /dev/null
@@ -1,109 +0,0 @@
-src/LL_HL_comm.o: src/LL_HL_comm.c include/ccny_asctec_firmware/main.h \
-  include/ccny_asctec_firmware/util.h C:\WinARM\arm-elf\include/stdint.h \
-  include/ccny_asctec_firmware/LPC214x.h \
-  include/ccny_asctec_firmware/LL_HL_comm.h \
-  include/ccny_asctec_firmware/system.h \
-  include/ccny_asctec_firmware/gpsmath.h \
-  include/ccny_asctec_firmware/sdk.h C:\WinARM\arm-elf\include/inttypes.h \
-  c:\asctec_arm_sdk\winarm\bin\../lib/gcc/arm-elf/4.1.1/include/stddef.h \
-  include/ccny_asctec_firmware/pid.h mav_common/comm.h \
-  mav_common/comm_packets.h mav_common/comm_types.h \
-  mav_common/comm_types.h include/ccny_asctec_firmware/sdk.h \
-  include/ccny_asctec_firmware/LL_HL_comm.h \
-  include/ccny_asctec_firmware/uart.h \
-  include/ccny_asctec_firmware/hardware.h \
-  include/ccny_asctec_firmware/main.h \
-  include/ccny_asctec_firmware/system.h external/Common_WinARM/inc/irq.h \
-  include/ccny_asctec_firmware/kalman.h mav_common/comm_util.h \
-  C:\WinARM\arm-elf\include/math.h C:\WinARM\arm-elf\include/sys/reent.h \
-  C:\WinARM\arm-elf\include/_ansi.h C:\WinARM\arm-elf\include/newlib.h \
-  C:\WinARM\arm-elf\include/sys/config.h \
-  C:\WinARM\arm-elf\include/machine/ieeefp.h \
-  C:\WinARM\arm-elf\include/sys/_types.h \
-  C:\WinARM\arm-elf\include/sys/lock.h C:\WinARM\arm-elf\include/_ansi.h \
-  include/ccny_asctec_firmware/matrices.h \
-  C:\WinARM\arm-elf\include/stdlib.h \
-  C:\WinARM\arm-elf\include/machine/stdlib.h \
-  C:\WinARM\arm-elf\include/alloca.h include/ccny_asctec_firmware/ssp.h \
-  include/ccny_asctec_firmware/comm_util_LL.h \
-  include/ccny_asctec_firmware/declination.h
-
-include/ccny_asctec_firmware/main.h:
-
-include/ccny_asctec_firmware/util.h:
-
-C:\WinARM\arm-elf\include/stdint.h:
-
-include/ccny_asctec_firmware/LPC214x.h:
-
-include/ccny_asctec_firmware/LL_HL_comm.h:
-
-include/ccny_asctec_firmware/system.h:
-
-include/ccny_asctec_firmware/gpsmath.h:
-
-include/ccny_asctec_firmware/sdk.h:
-
-C:\WinARM\arm-elf\include/inttypes.h:
-
-c:\asctec_arm_sdk\winarm\bin\../lib/gcc/arm-elf/4.1.1/include/stddef.h:
-
-include/ccny_asctec_firmware/pid.h:
-
-mav_common/comm.h:
-
-mav_common/comm_packets.h:
-
-mav_common/comm_types.h:
-
-mav_common/comm_types.h:
-
-include/ccny_asctec_firmware/sdk.h:
-
-include/ccny_asctec_firmware/LL_HL_comm.h:
-
-include/ccny_asctec_firmware/uart.h:
-
-include/ccny_asctec_firmware/hardware.h:
-
-include/ccny_asctec_firmware/main.h:
-
-include/ccny_asctec_firmware/system.h:
-
-external/Common_WinARM/inc/irq.h:
-
-include/ccny_asctec_firmware/kalman.h:
-
-mav_common/comm_util.h:
-
-C:\WinARM\arm-elf\include/math.h:
-
-C:\WinARM\arm-elf\include/sys/reent.h:
-
-C:\WinARM\arm-elf\include/_ansi.h:
-
-C:\WinARM\arm-elf\include/newlib.h:
-
-C:\WinARM\arm-elf\include/sys/config.h:
-
-C:\WinARM\arm-elf\include/machine/ieeefp.h:
-
-C:\WinARM\arm-elf\include/sys/_types.h:
-
-C:\WinARM\arm-elf\include/sys/lock.h:
-
-C:\WinARM\arm-elf\include/_ansi.h:
-
-include/ccny_asctec_firmware/matrices.h:
-
-C:\WinARM\arm-elf\include/stdlib.h:
-
-C:\WinARM\arm-elf\include/machine/stdlib.h:
-
-C:\WinARM\arm-elf\include/alloca.h:
-
-include/ccny_asctec_firmware/ssp.h:
-
-include/ccny_asctec_firmware/comm_util_LL.h:
-
-include/ccny_asctec_firmware/declination.h:
diff --git a/ccny_asctec_firmware_2/.dep/LPC2k_ee.o.d b/ccny_asctec_firmware_2/.dep/LPC2k_ee.o.d
deleted file mode 100644
index a5a3f5d..0000000
--- a/ccny_asctec_firmware_2/.dep/LPC2k_ee.o.d
+++ /dev/null
@@ -1,6 +0,0 @@
-src/LPC2k_ee.o: src/LPC2k_ee.c external/Common_WinARM/inc/LPC214x.h \
-  include/ccny_asctec_firmware/LPC2k_ee.h
-
-external/Common_WinARM/inc/LPC214x.h:
-
-include/ccny_asctec_firmware/LPC2k_ee.h:
diff --git a/ccny_asctec_firmware_2/.dep/adc.o.d b/ccny_asctec_firmware_2/.dep/adc.o.d
deleted file mode 100644
index 3de8be8..0000000
--- a/ccny_asctec_firmware_2/.dep/adc.o.d
+++ /dev/null
@@ -1,13 +0,0 @@
-src/adc.o: src/adc.c external/Common_WinARM/inc/LPC214x.h \
-  external/Common_WinARM/inc/type.h external/Common_WinARM/inc/irq.h \
-  external/Common_WinARM/inc/target.h include/ccny_asctec_firmware/adc.h
-
-external/Common_WinARM/inc/LPC214x.h:
-
-external/Common_WinARM/inc/type.h:
-
-external/Common_WinARM/inc/irq.h:
-
-external/Common_WinARM/inc/target.h:
-
-include/ccny_asctec_firmware/adc.h:
diff --git a/ccny_asctec_firmware_2/.dep/comm_util.o.d b/ccny_asctec_firmware_2/.dep/comm_util.o.d
deleted file mode 100644
index 7ced891..0000000
--- a/ccny_asctec_firmware_2/.dep/comm_util.o.d
+++ /dev/null
@@ -1,36 +0,0 @@
-mav_common/src/comm_util.o: mav_common/src/comm_util.c \
-  mav_common/comm_util.h C:\WinARM\arm-elf\include/stdint.h \
-  C:\WinARM\arm-elf\include/math.h C:\WinARM\arm-elf\include/sys/reent.h \
-  C:\WinARM\arm-elf\include/_ansi.h C:\WinARM\arm-elf\include/newlib.h \
-  C:\WinARM\arm-elf\include/sys/config.h \
-  C:\WinARM\arm-elf\include/machine/ieeefp.h \
-  C:\WinARM\arm-elf\include/sys/_types.h \
-  C:\WinARM\arm-elf\include/sys/lock.h \
-  c:\asctec_arm_sdk\winarm\bin\../lib/gcc/arm-elf/4.1.1/include/stddef.h \
-  C:\WinARM\arm-elf\include/_ansi.h mav_common/comm_types.h
-
-mav_common/comm_util.h:
-
-C:\WinARM\arm-elf\include/stdint.h:
-
-C:\WinARM\arm-elf\include/math.h:
-
-C:\WinARM\arm-elf\include/sys/reent.h:
-
-C:\WinARM\arm-elf\include/_ansi.h:
-
-C:\WinARM\arm-elf\include/newlib.h:
-
-C:\WinARM\arm-elf\include/sys/config.h:
-
-C:\WinARM\arm-elf\include/machine/ieeefp.h:
-
-C:\WinARM\arm-elf\include/sys/_types.h:
-
-C:\WinARM\arm-elf\include/sys/lock.h:
-
-c:\asctec_arm_sdk\winarm\bin\../lib/gcc/arm-elf/4.1.1/include/stddef.h:
-
-C:\WinARM\arm-elf\include/_ansi.h:
-
-mav_common/comm_types.h:
diff --git a/ccny_asctec_firmware_2/.dep/comm_util_LL.o.d b/ccny_asctec_firmware_2/.dep/comm_util_LL.o.d
deleted file mode 100644
index bd8143a..0000000
--- a/ccny_asctec_firmware_2/.dep/comm_util_LL.o.d
+++ /dev/null
@@ -1,35 +0,0 @@
-src/comm_util_LL.o: src/comm_util_LL.c \
-  include/ccny_asctec_firmware/comm_util_LL.h \
-  C:\WinARM\arm-elf\include/stdint.h C:\WinARM\arm-elf\include/math.h \
-  C:\WinARM\arm-elf\include/sys/reent.h C:\WinARM\arm-elf\include/_ansi.h \
-  C:\WinARM\arm-elf\include/newlib.h \
-  C:\WinARM\arm-elf\include/sys/config.h \
-  C:\WinARM\arm-elf\include/machine/ieeefp.h \
-  C:\WinARM\arm-elf\include/sys/_types.h \
-  C:\WinARM\arm-elf\include/sys/lock.h \
-  c:\asctec_arm_sdk\winarm\bin\../lib/gcc/arm-elf/4.1.1/include/stddef.h \
-  C:\WinARM\arm-elf\include/_ansi.h
-
-include/ccny_asctec_firmware/comm_util_LL.h:
-
-C:\WinARM\arm-elf\include/stdint.h:
-
-C:\WinARM\arm-elf\include/math.h:
-
-C:\WinARM\arm-elf\include/sys/reent.h:
-
-C:\WinARM\arm-elf\include/_ansi.h:
-
-C:\WinARM\arm-elf\include/newlib.h:
-
-C:\WinARM\arm-elf\include/sys/config.h:
-
-C:\WinARM\arm-elf\include/machine/ieeefp.h:
-
-C:\WinARM\arm-elf\include/sys/_types.h:
-
-C:\WinARM\arm-elf\include/sys/lock.h:
-
-c:\asctec_arm_sdk\winarm\bin\../lib/gcc/arm-elf/4.1.1/include/stddef.h:
-
-C:\WinARM\arm-elf\include/_ansi.h:
diff --git a/ccny_asctec_firmware_2/.dep/gpsmath.o.d b/ccny_asctec_firmware_2/.dep/gpsmath.o.d
deleted file mode 100644
index 34149f6..0000000
--- a/ccny_asctec_firmware_2/.dep/gpsmath.o.d
+++ /dev/null
@@ -1,32 +0,0 @@
-src/gpsmath.o: src/gpsmath.c C:\WinARM\arm-elf\include/math.h \
-  C:\WinARM\arm-elf\include/sys/reent.h C:\WinARM\arm-elf\include/_ansi.h \
-  C:\WinARM\arm-elf\include/newlib.h \
-  C:\WinARM\arm-elf\include/sys/config.h \
-  C:\WinARM\arm-elf\include/machine/ieeefp.h \
-  C:\WinARM\arm-elf\include/sys/_types.h \
-  C:\WinARM\arm-elf\include/sys/lock.h \
-  c:\asctec_arm_sdk\winarm\bin\../lib/gcc/arm-elf/4.1.1/include/stddef.h \
-  C:\WinARM\arm-elf\include/_ansi.h \
-  include/ccny_asctec_firmware/gpsmath.h
-
-C:\WinARM\arm-elf\include/math.h:
-
-C:\WinARM\arm-elf\include/sys/reent.h:
-
-C:\WinARM\arm-elf\include/_ansi.h:
-
-C:\WinARM\arm-elf\include/newlib.h:
-
-C:\WinARM\arm-elf\include/sys/config.h:
-
-C:\WinARM\arm-elf\include/machine/ieeefp.h:
-
-C:\WinARM\arm-elf\include/sys/_types.h:
-
-C:\WinARM\arm-elf\include/sys/lock.h:
-
-c:\asctec_arm_sdk\winarm\bin\../lib/gcc/arm-elf/4.1.1/include/stddef.h:
-
-C:\WinARM\arm-elf\include/_ansi.h:
-
-include/ccny_asctec_firmware/gpsmath.h:
diff --git a/ccny_asctec_firmware_2/.dep/hardware.o.d b/ccny_asctec_firmware_2/.dep/hardware.o.d
deleted file mode 100644
index 2cc5906..0000000
--- a/ccny_asctec_firmware_2/.dep/hardware.o.d
+++ /dev/null
@@ -1,34 +0,0 @@
-src/hardware.o: src/hardware.c include/ccny_asctec_firmware/hardware.h \
-  include/ccny_asctec_firmware/LPC214x.h \
-  include/ccny_asctec_firmware/main.h include/ccny_asctec_firmware/util.h \
-  C:\WinARM\arm-elf\include/stdint.h \
-  include/ccny_asctec_firmware/system.h \
-  include/ccny_asctec_firmware/uart.h \
-  C:\WinARM\arm-elf\include/inttypes.h \
-  c:\asctec_arm_sdk\winarm\bin\../lib/gcc/arm-elf/4.1.1/include/stddef.h \
-  mav_common/comm_packets.h mav_common/comm_types.h \
-  external/Common_WinARM/inc/irq.h
-
-include/ccny_asctec_firmware/hardware.h:
-
-include/ccny_asctec_firmware/LPC214x.h:
-
-include/ccny_asctec_firmware/main.h:
-
-include/ccny_asctec_firmware/util.h:
-
-C:\WinARM\arm-elf\include/stdint.h:
-
-include/ccny_asctec_firmware/system.h:
-
-include/ccny_asctec_firmware/uart.h:
-
-C:\WinARM\arm-elf\include/inttypes.h:
-
-c:\asctec_arm_sdk\winarm\bin\../lib/gcc/arm-elf/4.1.1/include/stddef.h:
-
-mav_common/comm_packets.h:
-
-mav_common/comm_types.h:
-
-external/Common_WinARM/inc/irq.h:
diff --git a/ccny_asctec_firmware_2/.dep/i2c.o.d b/ccny_asctec_firmware_2/.dep/i2c.o.d
deleted file mode 100644
index e837c82..0000000
--- a/ccny_asctec_firmware_2/.dep/i2c.o.d
+++ /dev/null
@@ -1,11 +0,0 @@
-src/i2c.o: src/i2c.c external/Common_WinARM/inc/LPC214x.h \
-  external/Common_WinARM/inc/type.h external/Common_WinARM/inc/irq.h \
-  include/ccny_asctec_firmware/i2c.h
-
-external/Common_WinARM/inc/LPC214x.h:
-
-external/Common_WinARM/inc/type.h:
-
-external/Common_WinARM/inc/irq.h:
-
-include/ccny_asctec_firmware/i2c.h:
diff --git a/ccny_asctec_firmware_2/.dep/interrupt_utils.o.d b/ccny_asctec_firmware_2/.dep/interrupt_utils.o.d
deleted file mode 100644
index 0d9fd29..0000000
--- a/ccny_asctec_firmware_2/.dep/interrupt_utils.o.d
+++ /dev/null
@@ -1,5 +0,0 @@
-external/Common_WinARM/src/interrupt_utils.o:  \
- external/Common_WinARM/src/interrupt_utils.c \
-  external/Common_WinARM/inc/interrupt_utils.h
-
-external/Common_WinARM/inc/interrupt_utils.h:
diff --git a/ccny_asctec_firmware_2/.dep/irq.o.d b/ccny_asctec_firmware_2/.dep/irq.o.d
deleted file mode 100644
index 620be11..0000000
--- a/ccny_asctec_firmware_2/.dep/irq.o.d
+++ /dev/null
@@ -1,6 +0,0 @@
-external/Common_WinARM/src/irq.o: external/Common_WinARM/src/irq.c \
-  external/Common_WinARM/inc/LPC214x.h external/Common_WinARM/inc/irq.h
-
-external/Common_WinARM/inc/LPC214x.h:
-
-external/Common_WinARM/inc/irq.h:
diff --git a/ccny_asctec_firmware_2/.dep/kalman.o.d b/ccny_asctec_firmware_2/.dep/kalman.o.d
deleted file mode 100644
index d35524b..0000000
--- a/ccny_asctec_firmware_2/.dep/kalman.o.d
+++ /dev/null
@@ -1,95 +0,0 @@
-src/kalman.o: src/kalman.c include/ccny_asctec_firmware/kalman.h \
-  C:\WinARM\arm-elf\include/inttypes.h C:\WinARM\arm-elf\include/stdint.h \
-  c:\asctec_arm_sdk\winarm\bin\../lib/gcc/arm-elf/4.1.1/include/stddef.h \
-  mav_common/comm_packets.h mav_common/comm_types.h \
-  mav_common/comm_util.h C:\WinARM\arm-elf\include/math.h \
-  C:\WinARM\arm-elf\include/sys/reent.h C:\WinARM\arm-elf\include/_ansi.h \
-  C:\WinARM\arm-elf\include/newlib.h \
-  C:\WinARM\arm-elf\include/sys/config.h \
-  C:\WinARM\arm-elf\include/machine/ieeefp.h \
-  C:\WinARM\arm-elf\include/sys/_types.h \
-  C:\WinARM\arm-elf\include/sys/lock.h C:\WinARM\arm-elf\include/_ansi.h \
-  mav_common/comm_types.h include/ccny_asctec_firmware/matrices.h \
-  C:\WinARM\arm-elf\include/stdlib.h \
-  C:\WinARM\arm-elf\include/machine/stdlib.h \
-  C:\WinARM\arm-elf\include/alloca.h \
-  include/ccny_asctec_firmware/LL_HL_comm.h \
-  include/ccny_asctec_firmware/sdk.h include/ccny_asctec_firmware/pid.h \
-  mav_common/comm.h include/ccny_asctec_firmware/uart.h \
-  include/ccny_asctec_firmware/hardware.h \
-  include/ccny_asctec_firmware/LPC214x.h \
-  include/ccny_asctec_firmware/main.h include/ccny_asctec_firmware/util.h \
-  include/ccny_asctec_firmware/system.h external/Common_WinARM/inc/irq.h \
-  include/ccny_asctec_firmware/kalman.h \
-  include/ccny_asctec_firmware/comm_util_LL.h \
-  include/ccny_asctec_firmware/ssp.h
-
-include/ccny_asctec_firmware/kalman.h:
-
-C:\WinARM\arm-elf\include/inttypes.h:
-
-C:\WinARM\arm-elf\include/stdint.h:
-
-c:\asctec_arm_sdk\winarm\bin\../lib/gcc/arm-elf/4.1.1/include/stddef.h:
-
-mav_common/comm_packets.h:
-
-mav_common/comm_types.h:
-
-mav_common/comm_util.h:
-
-C:\WinARM\arm-elf\include/math.h:
-
-C:\WinARM\arm-elf\include/sys/reent.h:
-
-C:\WinARM\arm-elf\include/_ansi.h:
-
-C:\WinARM\arm-elf\include/newlib.h:
-
-C:\WinARM\arm-elf\include/sys/config.h:
-
-C:\WinARM\arm-elf\include/machine/ieeefp.h:
-
-C:\WinARM\arm-elf\include/sys/_types.h:
-
-C:\WinARM\arm-elf\include/sys/lock.h:
-
-C:\WinARM\arm-elf\include/_ansi.h:
-
-mav_common/comm_types.h:
-
-include/ccny_asctec_firmware/matrices.h:
-
-C:\WinARM\arm-elf\include/stdlib.h:
-
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-C:\WinARM\arm-elf\include/alloca.h:
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-include/ccny_asctec_firmware/LL_HL_comm.h:
-
-include/ccny_asctec_firmware/sdk.h:
-
-include/ccny_asctec_firmware/pid.h:
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-mav_common/comm.h:
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-include/ccny_asctec_firmware/uart.h:
-
-include/ccny_asctec_firmware/hardware.h:
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-include/ccny_asctec_firmware/LPC214x.h:
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-include/ccny_asctec_firmware/main.h:
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-include/ccny_asctec_firmware/util.h:
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-include/ccny_asctec_firmware/system.h:
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-external/Common_WinARM/inc/irq.h:
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-include/ccny_asctec_firmware/kalman.h:
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-include/ccny_asctec_firmware/comm_util_LL.h:
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-include/ccny_asctec_firmware/ssp.h:
diff --git a/ccny_asctec_firmware_2/.dep/main.o.d b/ccny_asctec_firmware_2/.dep/main.o.d
deleted file mode 100644
index c3fc6e3..0000000
--- a/ccny_asctec_firmware_2/.dep/main.o.d
+++ /dev/null
@@ -1,159 +0,0 @@
-src/main.o: src/main.c C:\WinARM\arm-elf\include/stdio.h \
-  C:\WinARM\arm-elf\include/_ansi.h C:\WinARM\arm-elf\include/newlib.h \
-  C:\WinARM\arm-elf\include/sys/config.h \
-  C:\WinARM\arm-elf\include/machine/ieeefp.h \
-  c:\asctec_arm_sdk\winarm\bin\../lib/gcc/arm-elf/4.1.1/include/stddef.h \
-  c:\asctec_arm_sdk\winarm\bin\../lib/gcc/arm-elf/4.1.1/include/stdarg.h \
-  C:\WinARM\arm-elf\include/sys/reent.h C:\WinARM\arm-elf\include/_ansi.h \
-  C:\WinARM\arm-elf\include/sys/_types.h \
-  C:\WinARM\arm-elf\include/sys/lock.h \
-  C:\WinARM\arm-elf\include/sys/types.h \
-  C:\WinARM\arm-elf\include/machine/_types.h \
-  C:\WinARM\arm-elf\include/limits.h \
-  c:\asctec_arm_sdk\winarm\bin\../lib/gcc/arm-elf/4.1.1/include/limits.h \
-  C:\WinARM\arm-elf\include/machine/types.h \
-  C:\WinARM\arm-elf\include/sys/features.h \
-  C:\WinARM\arm-elf\include/sys/stdio.h \
-  include/ccny_asctec_firmware/main.h include/ccny_asctec_firmware/util.h \
-  C:\WinARM\arm-elf\include/stdint.h \
-  include/ccny_asctec_firmware/LPC214x.h \
-  include/ccny_asctec_firmware/system.h \
-  include/ccny_asctec_firmware/uart.h \
-  C:\WinARM\arm-elf\include/inttypes.h mav_common/comm_packets.h \
-  mav_common/comm_types.h C:\WinARM\arm-elf\include/math.h \
-  include/ccny_asctec_firmware/hardware.h \
-  include/ccny_asctec_firmware/main.h \
-  include/ccny_asctec_firmware/system.h \
-  include/ccny_asctec_firmware/uart.h external/Common_WinARM/inc/irq.h \
-  external/Common_WinARM/inc/irq.h include/ccny_asctec_firmware/i2c.h \
-  include/ccny_asctec_firmware/gpsmath.h \
-  include/ccny_asctec_firmware/adc.h include/ccny_asctec_firmware/uart1.h \
-  include/ccny_asctec_firmware/ssp.h \
-  include/ccny_asctec_firmware/LL_HL_comm.h \
-  include/ccny_asctec_firmware/sdk.h include/ccny_asctec_firmware/pid.h \
-  mav_common/comm.h mav_common/comm_types.h \
-  include/ccny_asctec_firmware/sdk.h \
-  include/ccny_asctec_firmware/LL_HL_comm.h \
-  include/ccny_asctec_firmware/hardware.h \
-  include/ccny_asctec_firmware/kalman.h mav_common/comm_util.h \
-  include/ccny_asctec_firmware/matrices.h \
-  C:\WinARM\arm-elf\include/stdlib.h \
-  C:\WinARM\arm-elf\include/machine/stdlib.h \
-  C:\WinARM\arm-elf\include/alloca.h include/ccny_asctec_firmware/ssp.h \
-  include/ccny_asctec_firmware/comm_util_LL.h \
-  C:\WinARM\arm-elf\include/unistd.h \
-  C:\WinARM\arm-elf\include/sys/unistd.h
-
-C:\WinARM\arm-elf\include/stdio.h:
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-C:\WinARM\arm-elf\include/_ansi.h:
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-C:\WinARM\arm-elf\include/sys/config.h:
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-C:\WinARM\arm-elf\include/machine/ieeefp.h:
-
-c:\asctec_arm_sdk\winarm\bin\../lib/gcc/arm-elf/4.1.1/include/stddef.h:
-
-c:\asctec_arm_sdk\winarm\bin\../lib/gcc/arm-elf/4.1.1/include/stdarg.h:
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-C:\WinARM\arm-elf\include/sys/reent.h:
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-c:\asctec_arm_sdk\winarm\bin\../lib/gcc/arm-elf/4.1.1/include/limits.h:
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-C:\WinARM\arm-elf\include/sys/features.h:
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-include/ccny_asctec_firmware/main.h:
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-include/ccny_asctec_firmware/LPC214x.h:
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-include/ccny_asctec_firmware/system.h:
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-include/ccny_asctec_firmware/uart.h:
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-include/ccny_asctec_firmware/hardware.h:
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-include/ccny_asctec_firmware/system.h:
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-include/ccny_asctec_firmware/uart.h:
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-external/Common_WinARM/inc/irq.h:
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-external/Common_WinARM/inc/irq.h:
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-include/ccny_asctec_firmware/i2c.h:
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-include/ccny_asctec_firmware/gpsmath.h:
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-include/ccny_asctec_firmware/adc.h:
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-include/ccny_asctec_firmware/uart1.h:
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-include/ccny_asctec_firmware/ssp.h:
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-include/ccny_asctec_firmware/LL_HL_comm.h:
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-include/ccny_asctec_firmware/sdk.h:
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-mav_common/comm.h:
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-include/ccny_asctec_firmware/sdk.h:
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-include/ccny_asctec_firmware/LL_HL_comm.h:
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-include/ccny_asctec_firmware/hardware.h:
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-include/ccny_asctec_firmware/kalman.h:
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-mav_common/comm_util.h:
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-include/ccny_asctec_firmware/matrices.h:
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-include/ccny_asctec_firmware/ssp.h:
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diff --git a/ccny_asctec_firmware_2/.dep/matrices.o.d b/ccny_asctec_firmware_2/.dep/matrices.o.d
deleted file mode 100644
index 8157c48..0000000
--- a/ccny_asctec_firmware_2/.dep/matrices.o.d
+++ /dev/null
@@ -1,39 +0,0 @@
-src/matrices.o: src/matrices.c include/ccny_asctec_firmware/matrices.h \
-  C:\WinARM\arm-elf\include/math.h C:\WinARM\arm-elf\include/sys/reent.h \
-  C:\WinARM\arm-elf\include/_ansi.h C:\WinARM\arm-elf\include/newlib.h \
-  C:\WinARM\arm-elf\include/sys/config.h \
-  C:\WinARM\arm-elf\include/machine/ieeefp.h \
-  C:\WinARM\arm-elf\include/sys/_types.h \
-  C:\WinARM\arm-elf\include/sys/lock.h \
-  c:\asctec_arm_sdk\winarm\bin\../lib/gcc/arm-elf/4.1.1/include/stddef.h \
-  C:\WinARM\arm-elf\include/_ansi.h C:\WinARM\arm-elf\include/stdlib.h \
-  C:\WinARM\arm-elf\include/machine/stdlib.h \
-  C:\WinARM\arm-elf\include/alloca.h
-
-include/ccny_asctec_firmware/matrices.h:
-
-C:\WinARM\arm-elf\include/math.h:
-
-C:\WinARM\arm-elf\include/sys/reent.h:
-
-C:\WinARM\arm-elf\include/_ansi.h:
-
-C:\WinARM\arm-elf\include/newlib.h:
-
-C:\WinARM\arm-elf\include/sys/config.h:
-
-C:\WinARM\arm-elf\include/machine/ieeefp.h:
-
-C:\WinARM\arm-elf\include/sys/_types.h:
-
-C:\WinARM\arm-elf\include/sys/lock.h:
-
-c:\asctec_arm_sdk\winarm\bin\../lib/gcc/arm-elf/4.1.1/include/stddef.h:
-
-C:\WinARM\arm-elf\include/_ansi.h:
-
-C:\WinARM\arm-elf\include/stdlib.h:
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diff --git a/ccny_asctec_firmware_2/.dep/pid.o.d b/ccny_asctec_firmware_2/.dep/pid.o.d
deleted file mode 100644
index 77fa9c9..0000000
--- a/ccny_asctec_firmware_2/.dep/pid.o.d
+++ /dev/null
@@ -1,94 +0,0 @@
-src/pid.o: src/pid.c include/ccny_asctec_firmware/pid.h \
-  C:\WinARM\arm-elf\include/inttypes.h C:\WinARM\arm-elf\include/stdint.h \
-  c:\asctec_arm_sdk\winarm\bin\../lib/gcc/arm-elf/4.1.1/include/stddef.h \
-  mav_common/comm.h mav_common/comm_packets.h mav_common/comm_types.h \
-  mav_common/comm_types.h include/ccny_asctec_firmware/sdk.h \
-  include/ccny_asctec_firmware/pid.h include/ccny_asctec_firmware/uart.h \
-  include/ccny_asctec_firmware/hardware.h \
-  include/ccny_asctec_firmware/LPC214x.h \
-  include/ccny_asctec_firmware/main.h include/ccny_asctec_firmware/util.h \
-  include/ccny_asctec_firmware/system.h external/Common_WinARM/inc/irq.h \
-  include/ccny_asctec_firmware/kalman.h mav_common/comm_util.h \
-  C:\WinARM\arm-elf\include/math.h C:\WinARM\arm-elf\include/sys/reent.h \
-  C:\WinARM\arm-elf\include/_ansi.h C:\WinARM\arm-elf\include/newlib.h \
-  C:\WinARM\arm-elf\include/sys/config.h \
-  C:\WinARM\arm-elf\include/machine/ieeefp.h \
-  C:\WinARM\arm-elf\include/sys/_types.h \
-  C:\WinARM\arm-elf\include/sys/lock.h C:\WinARM\arm-elf\include/_ansi.h \
-  include/ccny_asctec_firmware/matrices.h \
-  C:\WinARM\arm-elf\include/stdlib.h \
-  C:\WinARM\arm-elf\include/machine/stdlib.h \
-  C:\WinARM\arm-elf\include/alloca.h \
-  include/ccny_asctec_firmware/LL_HL_comm.h \
-  include/ccny_asctec_firmware/ssp.h \
-  include/ccny_asctec_firmware/comm_util_LL.h
-
-include/ccny_asctec_firmware/pid.h:
-
-C:\WinARM\arm-elf\include/inttypes.h:
-
-C:\WinARM\arm-elf\include/stdint.h:
-
-c:\asctec_arm_sdk\winarm\bin\../lib/gcc/arm-elf/4.1.1/include/stddef.h:
-
-mav_common/comm.h:
-
-mav_common/comm_packets.h:
-
-mav_common/comm_types.h:
-
-mav_common/comm_types.h:
-
-include/ccny_asctec_firmware/sdk.h:
-
-include/ccny_asctec_firmware/pid.h:
-
-include/ccny_asctec_firmware/uart.h:
-
-include/ccny_asctec_firmware/hardware.h:
-
-include/ccny_asctec_firmware/LPC214x.h:
-
-include/ccny_asctec_firmware/main.h:
-
-include/ccny_asctec_firmware/util.h:
-
-include/ccny_asctec_firmware/system.h:
-
-external/Common_WinARM/inc/irq.h:
-
-include/ccny_asctec_firmware/kalman.h:
-
-mav_common/comm_util.h:
-
-C:\WinARM\arm-elf\include/math.h:
-
-C:\WinARM\arm-elf\include/sys/reent.h:
-
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-
-C:\WinARM\arm-elf\include/newlib.h:
-
-C:\WinARM\arm-elf\include/sys/config.h:
-
-C:\WinARM\arm-elf\include/machine/ieeefp.h:
-
-C:\WinARM\arm-elf\include/sys/_types.h:
-
-C:\WinARM\arm-elf\include/sys/lock.h:
-
-C:\WinARM\arm-elf\include/_ansi.h:
-
-include/ccny_asctec_firmware/matrices.h:
-
-C:\WinARM\arm-elf\include/stdlib.h:
-
-C:\WinARM\arm-elf\include/machine/stdlib.h:
-
-C:\WinARM\arm-elf\include/alloca.h:
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-include/ccny_asctec_firmware/LL_HL_comm.h:
-
-include/ccny_asctec_firmware/ssp.h:
-
-include/ccny_asctec_firmware/comm_util_LL.h:
diff --git a/ccny_asctec_firmware_2/.dep/sdk.o.d b/ccny_asctec_firmware_2/.dep/sdk.o.d
deleted file mode 100644
index ea01844..0000000
--- a/ccny_asctec_firmware_2/.dep/sdk.o.d
+++ /dev/null
@@ -1,137 +0,0 @@
-src/sdk.o: src/sdk.c mav_common/comm_packets.h \
-  C:\WinARM\arm-elf\include/inttypes.h C:\WinARM\arm-elf\include/stdint.h \
-  c:\asctec_arm_sdk\winarm\bin\../lib/gcc/arm-elf/4.1.1/include/stddef.h \
-  mav_common/comm_types.h mav_common/comm.h mav_common/comm_types.h \
-  include/ccny_asctec_firmware/sdk.h include/ccny_asctec_firmware/pid.h \
-  include/ccny_asctec_firmware/sdk.h \
-  include/ccny_asctec_firmware/LL_HL_comm.h \
-  include/ccny_asctec_firmware/uart.h \
-  include/ccny_asctec_firmware/hardware.h \
-  include/ccny_asctec_firmware/LPC214x.h \
-  include/ccny_asctec_firmware/main.h include/ccny_asctec_firmware/util.h \
-  include/ccny_asctec_firmware/system.h external/Common_WinARM/inc/irq.h \
-  include/ccny_asctec_firmware/kalman.h mav_common/comm_util.h \
-  C:\WinARM\arm-elf\include/math.h C:\WinARM\arm-elf\include/sys/reent.h \
-  C:\WinARM\arm-elf\include/_ansi.h C:\WinARM\arm-elf\include/newlib.h \
-  C:\WinARM\arm-elf\include/sys/config.h \
-  C:\WinARM\arm-elf\include/machine/ieeefp.h \
-  C:\WinARM\arm-elf\include/sys/_types.h \
-  C:\WinARM\arm-elf\include/sys/lock.h C:\WinARM\arm-elf\include/_ansi.h \
-  include/ccny_asctec_firmware/matrices.h \
-  C:\WinARM\arm-elf\include/stdlib.h \
-  C:\WinARM\arm-elf\include/machine/stdlib.h \
-  C:\WinARM\arm-elf\include/alloca.h include/ccny_asctec_firmware/ssp.h \
-  include/ccny_asctec_firmware/comm_util_LL.h \
-  include/ccny_asctec_firmware/main.h \
-  include/ccny_asctec_firmware/system.h \
-  include/ccny_asctec_firmware/LL_HL_comm.h \
-  include/ccny_asctec_firmware/uart.h C:\WinARM\arm-elf\include/time.h \
-  C:\WinARM\arm-elf\include/machine/time.h \
-  C:\WinARM\arm-elf\include/sys/types.h \
-  C:\WinARM\arm-elf\include/machine/_types.h \
-  C:\WinARM\arm-elf\include/limits.h \
-  c:\asctec_arm_sdk\winarm\bin\../lib/gcc/arm-elf/4.1.1/include/limits.h \
-  C:\WinARM\arm-elf\include/machine/types.h \
-  C:\WinARM\arm-elf\include/sys/features.h \
-  external/Common_WinARM/inc/irq.h external/Common_WinARM/inc/LPC214x.h \
-  include/ccny_asctec_firmware/gpsmath.h
-
-mav_common/comm_packets.h:
-
-C:\WinARM\arm-elf\include/inttypes.h:
-
-C:\WinARM\arm-elf\include/stdint.h:
-
-c:\asctec_arm_sdk\winarm\bin\../lib/gcc/arm-elf/4.1.1/include/stddef.h:
-
-mav_common/comm_types.h:
-
-mav_common/comm.h:
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-mav_common/comm_types.h:
-
-include/ccny_asctec_firmware/sdk.h:
-
-include/ccny_asctec_firmware/pid.h:
-
-include/ccny_asctec_firmware/sdk.h:
-
-include/ccny_asctec_firmware/LL_HL_comm.h:
-
-include/ccny_asctec_firmware/uart.h:
-
-include/ccny_asctec_firmware/hardware.h:
-
-include/ccny_asctec_firmware/LPC214x.h:
-
-include/ccny_asctec_firmware/main.h:
-
-include/ccny_asctec_firmware/util.h:
-
-include/ccny_asctec_firmware/system.h:
-
-external/Common_WinARM/inc/irq.h:
-
-include/ccny_asctec_firmware/kalman.h:
-
-mav_common/comm_util.h:
-
-C:\WinARM\arm-elf\include/math.h:
-
-C:\WinARM\arm-elf\include/sys/reent.h:
-
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-
-C:\WinARM\arm-elf\include/newlib.h:
-
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-
-C:\WinARM\arm-elf\include/machine/ieeefp.h:
-
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-
-C:\WinARM\arm-elf\include/sys/lock.h:
-
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-
-include/ccny_asctec_firmware/matrices.h:
-
-C:\WinARM\arm-elf\include/stdlib.h:
-
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-
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-
-include/ccny_asctec_firmware/ssp.h:
-
-include/ccny_asctec_firmware/comm_util_LL.h:
-
-include/ccny_asctec_firmware/main.h:
-
-include/ccny_asctec_firmware/system.h:
-
-include/ccny_asctec_firmware/LL_HL_comm.h:
-
-include/ccny_asctec_firmware/uart.h:
-
-C:\WinARM\arm-elf\include/time.h:
-
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-
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-
-C:\WinARM\arm-elf\include/machine/_types.h:
-
-C:\WinARM\arm-elf\include/limits.h:
-
-c:\asctec_arm_sdk\winarm\bin\../lib/gcc/arm-elf/4.1.1/include/limits.h:
-
-C:\WinARM\arm-elf\include/machine/types.h:
-
-C:\WinARM\arm-elf\include/sys/features.h:
-
-external/Common_WinARM/inc/irq.h:
-
-external/Common_WinARM/inc/LPC214x.h:
-
-include/ccny_asctec_firmware/gpsmath.h:
diff --git a/ccny_asctec_firmware_2/.dep/ssp.o.d b/ccny_asctec_firmware_2/.dep/ssp.o.d
deleted file mode 100644
index ff44539..0000000
--- a/ccny_asctec_firmware_2/.dep/ssp.o.d
+++ /dev/null
@@ -1,113 +0,0 @@
-src/ssp.o: src/ssp.c external/Common_WinARM/inc/LPC214x.h \
-  external/Common_WinARM/inc/type.h external/Common_WinARM/inc/irq.h \
-  include/ccny_asctec_firmware/ssp.h include/ccny_asctec_firmware/main.h \
-  include/ccny_asctec_firmware/util.h C:\WinARM\arm-elf\include/stdint.h \
-  include/ccny_asctec_firmware/LPC214x.h \
-  include/ccny_asctec_firmware/system.h \
-  include/ccny_asctec_firmware/LL_HL_comm.h \
-  include/ccny_asctec_firmware/sdk.h C:\WinARM\arm-elf\include/inttypes.h \
-  c:\asctec_arm_sdk\winarm\bin\../lib/gcc/arm-elf/4.1.1/include/stddef.h \
-  include/ccny_asctec_firmware/pid.h mav_common/comm.h \
-  mav_common/comm_packets.h mav_common/comm_types.h \
-  mav_common/comm_types.h include/ccny_asctec_firmware/sdk.h \
-  include/ccny_asctec_firmware/LL_HL_comm.h \
-  include/ccny_asctec_firmware/uart.h \
-  include/ccny_asctec_firmware/hardware.h \
-  include/ccny_asctec_firmware/main.h \
-  include/ccny_asctec_firmware/system.h external/Common_WinARM/inc/irq.h \
-  include/ccny_asctec_firmware/kalman.h mav_common/comm_util.h \
-  C:\WinARM\arm-elf\include/math.h C:\WinARM\arm-elf\include/sys/reent.h \
-  C:\WinARM\arm-elf\include/_ansi.h C:\WinARM\arm-elf\include/newlib.h \
-  C:\WinARM\arm-elf\include/sys/config.h \
-  C:\WinARM\arm-elf\include/machine/ieeefp.h \
-  C:\WinARM\arm-elf\include/sys/_types.h \
-  C:\WinARM\arm-elf\include/sys/lock.h C:\WinARM\arm-elf\include/_ansi.h \
-  include/ccny_asctec_firmware/matrices.h \
-  C:\WinARM\arm-elf\include/stdlib.h \
-  C:\WinARM\arm-elf\include/machine/stdlib.h \
-  C:\WinARM\arm-elf\include/alloca.h include/ccny_asctec_firmware/ssp.h \
-  include/ccny_asctec_firmware/comm_util_LL.h
-
-external/Common_WinARM/inc/LPC214x.h:
-
-external/Common_WinARM/inc/type.h:
-
-external/Common_WinARM/inc/irq.h:
-
-include/ccny_asctec_firmware/ssp.h:
-
-include/ccny_asctec_firmware/main.h:
-
-include/ccny_asctec_firmware/util.h:
-
-C:\WinARM\arm-elf\include/stdint.h:
-
-include/ccny_asctec_firmware/LPC214x.h:
-
-include/ccny_asctec_firmware/system.h:
-
-include/ccny_asctec_firmware/LL_HL_comm.h:
-
-include/ccny_asctec_firmware/sdk.h:
-
-C:\WinARM\arm-elf\include/inttypes.h:
-
-c:\asctec_arm_sdk\winarm\bin\../lib/gcc/arm-elf/4.1.1/include/stddef.h:
-
-include/ccny_asctec_firmware/pid.h:
-
-mav_common/comm.h:
-
-mav_common/comm_packets.h:
-
-mav_common/comm_types.h:
-
-mav_common/comm_types.h:
-
-include/ccny_asctec_firmware/sdk.h:
-
-include/ccny_asctec_firmware/LL_HL_comm.h:
-
-include/ccny_asctec_firmware/uart.h:
-
-include/ccny_asctec_firmware/hardware.h:
-
-include/ccny_asctec_firmware/main.h:
-
-include/ccny_asctec_firmware/system.h:
-
-external/Common_WinARM/inc/irq.h:
-
-include/ccny_asctec_firmware/kalman.h:
-
-mav_common/comm_util.h:
-
-C:\WinARM\arm-elf\include/math.h:
-
-C:\WinARM\arm-elf\include/sys/reent.h:
-
-C:\WinARM\arm-elf\include/_ansi.h:
-
-C:\WinARM\arm-elf\include/newlib.h:
-
-C:\WinARM\arm-elf\include/sys/config.h:
-
-C:\WinARM\arm-elf\include/machine/ieeefp.h:
-
-C:\WinARM\arm-elf\include/sys/_types.h:
-
-C:\WinARM\arm-elf\include/sys/lock.h:
-
-C:\WinARM\arm-elf\include/_ansi.h:
-
-include/ccny_asctec_firmware/matrices.h:
-
-C:\WinARM\arm-elf\include/stdlib.h:
-
-C:\WinARM\arm-elf\include/machine/stdlib.h:
-
-C:\WinARM\arm-elf\include/alloca.h:
-
-include/ccny_asctec_firmware/ssp.h:
-
-include/ccny_asctec_firmware/comm_util_LL.h:
diff --git a/ccny_asctec_firmware_2/.dep/syscalls.o.d b/ccny_asctec_firmware_2/.dep/syscalls.o.d
deleted file mode 100644
index 1ee016f..0000000
--- a/ccny_asctec_firmware_2/.dep/syscalls.o.d
+++ /dev/null
@@ -1,75 +0,0 @@
-src/syscalls.o: src/syscalls.c C:\WinARM\arm-elf\include/stdlib.h \
-  C:\WinARM\arm-elf\include/_ansi.h C:\WinARM\arm-elf\include/newlib.h \
-  C:\WinARM\arm-elf\include/sys/config.h \
-  C:\WinARM\arm-elf\include/machine/ieeefp.h \
-  c:\asctec_arm_sdk\winarm\bin\../lib/gcc/arm-elf/4.1.1/include/stddef.h \
-  C:\WinARM\arm-elf\include/sys/reent.h C:\WinARM\arm-elf\include/_ansi.h \
-  C:\WinARM\arm-elf\include/sys/_types.h \
-  C:\WinARM\arm-elf\include/sys/lock.h \
-  C:\WinARM\arm-elf\include/machine/stdlib.h \
-  C:\WinARM\arm-elf\include/alloca.h C:\WinARM\arm-elf\include/reent.h \
-  C:\WinARM\arm-elf\include/machine/types.h \
-  C:\WinARM\arm-elf\include/sys/stat.h C:\WinARM\arm-elf\include/time.h \
-  C:\WinARM\arm-elf\include/machine/time.h \
-  C:\WinARM\arm-elf\include/sys/types.h \
-  C:\WinARM\arm-elf\include/machine/_types.h \
-  C:\WinARM\arm-elf\include/limits.h \
-  c:\asctec_arm_sdk\winarm\bin\../lib/gcc/arm-elf/4.1.1/include/limits.h \
-  C:\WinARM\arm-elf\include/sys/features.h \
-  include/ccny_asctec_firmware/uart.h \
-  C:\WinARM\arm-elf\include/inttypes.h C:\WinARM\arm-elf\include/stdint.h \
-  mav_common/comm_packets.h mav_common/comm_types.h
-
-C:\WinARM\arm-elf\include/stdlib.h:
-
-C:\WinARM\arm-elf\include/_ansi.h:
-
-C:\WinARM\arm-elf\include/newlib.h:
-
-C:\WinARM\arm-elf\include/sys/config.h:
-
-C:\WinARM\arm-elf\include/machine/ieeefp.h:
-
-c:\asctec_arm_sdk\winarm\bin\../lib/gcc/arm-elf/4.1.1/include/stddef.h:
-
-C:\WinARM\arm-elf\include/sys/reent.h:
-
-C:\WinARM\arm-elf\include/_ansi.h:
-
-C:\WinARM\arm-elf\include/sys/_types.h:
-
-C:\WinARM\arm-elf\include/sys/lock.h:
-
-C:\WinARM\arm-elf\include/machine/stdlib.h:
-
-C:\WinARM\arm-elf\include/alloca.h:
-
-C:\WinARM\arm-elf\include/reent.h:
-
-C:\WinARM\arm-elf\include/machine/types.h:
-
-C:\WinARM\arm-elf\include/sys/stat.h:
-
-C:\WinARM\arm-elf\include/time.h:
-
-C:\WinARM\arm-elf\include/machine/time.h:
-
-C:\WinARM\arm-elf\include/sys/types.h:
-
-C:\WinARM\arm-elf\include/machine/_types.h:
-
-C:\WinARM\arm-elf\include/limits.h:
-
-c:\asctec_arm_sdk\winarm\bin\../lib/gcc/arm-elf/4.1.1/include/limits.h:
-
-C:\WinARM\arm-elf\include/sys/features.h:
-
-include/ccny_asctec_firmware/uart.h:
-
-C:\WinARM\arm-elf\include/inttypes.h:
-
-C:\WinARM\arm-elf\include/stdint.h:
-
-mav_common/comm_packets.h:
-
-mav_common/comm_types.h:
diff --git a/ccny_asctec_firmware_2/.dep/system.o.d b/ccny_asctec_firmware_2/.dep/system.o.d
deleted file mode 100644
index bb5ef94..0000000
--- a/ccny_asctec_firmware_2/.dep/system.o.d
+++ /dev/null
@@ -1,127 +0,0 @@
-src/system.o: src/system.c external/Common_WinARM/inc/LPC214x.h \
-  include/ccny_asctec_firmware/system.h \
-  include/ccny_asctec_firmware/uart.h \
-  C:\WinARM\arm-elf\include/inttypes.h C:\WinARM\arm-elf\include/stdint.h \
-  c:\asctec_arm_sdk\winarm\bin\../lib/gcc/arm-elf/4.1.1/include/stddef.h \
-  mav_common/comm_packets.h mav_common/comm_types.h \
-  include/ccny_asctec_firmware/uart1.h \
-  include/ccny_asctec_firmware/main.h include/ccny_asctec_firmware/util.h \
-  include/ccny_asctec_firmware/LPC214x.h \
-  include/ccny_asctec_firmware/hardware.h \
-  include/ccny_asctec_firmware/main.h \
-  include/ccny_asctec_firmware/system.h \
-  include/ccny_asctec_firmware/uart.h external/Common_WinARM/inc/irq.h \
-  include/ccny_asctec_firmware/LPC2k_ee.h \
-  external/Common_WinARM/inc/type.h external/Common_WinARM/inc/irq.h \
-  include/ccny_asctec_firmware/i2c.h include/ccny_asctec_firmware/ssp.h \
-  include/ccny_asctec_firmware/adc.h include/ccny_asctec_firmware/sdk.h \
-  include/ccny_asctec_firmware/pid.h mav_common/comm.h \
-  mav_common/comm_types.h include/ccny_asctec_firmware/sdk.h \
-  include/ccny_asctec_firmware/LL_HL_comm.h \
-  include/ccny_asctec_firmware/hardware.h \
-  include/ccny_asctec_firmware/kalman.h mav_common/comm_util.h \
-  C:\WinARM\arm-elf\include/math.h C:\WinARM\arm-elf\include/sys/reent.h \
-  C:\WinARM\arm-elf\include/_ansi.h C:\WinARM\arm-elf\include/newlib.h \
-  C:\WinARM\arm-elf\include/sys/config.h \
-  C:\WinARM\arm-elf\include/machine/ieeefp.h \
-  C:\WinARM\arm-elf\include/sys/_types.h \
-  C:\WinARM\arm-elf\include/sys/lock.h C:\WinARM\arm-elf\include/_ansi.h \
-  include/ccny_asctec_firmware/matrices.h \
-  C:\WinARM\arm-elf\include/stdlib.h \
-  C:\WinARM\arm-elf\include/machine/stdlib.h \
-  C:\WinARM\arm-elf\include/alloca.h include/ccny_asctec_firmware/ssp.h \
-  include/ccny_asctec_firmware/comm_util_LL.h
-
-external/Common_WinARM/inc/LPC214x.h:
-
-include/ccny_asctec_firmware/system.h:
-
-include/ccny_asctec_firmware/uart.h:
-
-C:\WinARM\arm-elf\include/inttypes.h:
-
-C:\WinARM\arm-elf\include/stdint.h:
-
-c:\asctec_arm_sdk\winarm\bin\../lib/gcc/arm-elf/4.1.1/include/stddef.h:
-
-mav_common/comm_packets.h:
-
-mav_common/comm_types.h:
-
-include/ccny_asctec_firmware/uart1.h:
-
-include/ccny_asctec_firmware/main.h:
-
-include/ccny_asctec_firmware/util.h:
-
-include/ccny_asctec_firmware/LPC214x.h:
-
-include/ccny_asctec_firmware/hardware.h:
-
-include/ccny_asctec_firmware/main.h:
-
-include/ccny_asctec_firmware/system.h:
-
-include/ccny_asctec_firmware/uart.h:
-
-external/Common_WinARM/inc/irq.h:
-
-include/ccny_asctec_firmware/LPC2k_ee.h:
-
-external/Common_WinARM/inc/type.h:
-
-external/Common_WinARM/inc/irq.h:
-
-include/ccny_asctec_firmware/i2c.h:
-
-include/ccny_asctec_firmware/ssp.h:
-
-include/ccny_asctec_firmware/adc.h:
-
-include/ccny_asctec_firmware/sdk.h:
-
-include/ccny_asctec_firmware/pid.h:
-
-mav_common/comm.h:
-
-mav_common/comm_types.h:
-
-include/ccny_asctec_firmware/sdk.h:
-
-include/ccny_asctec_firmware/LL_HL_comm.h:
-
-include/ccny_asctec_firmware/hardware.h:
-
-include/ccny_asctec_firmware/kalman.h:
-
-mav_common/comm_util.h:
-
-C:\WinARM\arm-elf\include/math.h:
-
-C:\WinARM\arm-elf\include/sys/reent.h:
-
-C:\WinARM\arm-elf\include/_ansi.h:
-
-C:\WinARM\arm-elf\include/newlib.h:
-
-C:\WinARM\arm-elf\include/sys/config.h:
-
-C:\WinARM\arm-elf\include/machine/ieeefp.h:
-
-C:\WinARM\arm-elf\include/sys/_types.h:
-
-C:\WinARM\arm-elf\include/sys/lock.h:
-
-C:\WinARM\arm-elf\include/_ansi.h:
-
-include/ccny_asctec_firmware/matrices.h:
-
-C:\WinARM\arm-elf\include/stdlib.h:
-
-C:\WinARM\arm-elf\include/machine/stdlib.h:
-
-C:\WinARM\arm-elf\include/alloca.h:
-
-include/ccny_asctec_firmware/ssp.h:
-
-include/ccny_asctec_firmware/comm_util_LL.h:
diff --git a/ccny_asctec_firmware_2/.dep/uart.o.d b/ccny_asctec_firmware_2/.dep/uart.o.d
deleted file mode 100644
index ddcb823..0000000
--- a/ccny_asctec_firmware_2/.dep/uart.o.d
+++ /dev/null
@@ -1,89 +0,0 @@
-src/uart.o: src/uart.c C:\WinARM\arm-elf\include/string.h \
-  C:\WinARM\arm-elf\include/_ansi.h C:\WinARM\arm-elf\include/newlib.h \
-  C:\WinARM\arm-elf\include/sys/config.h \
-  C:\WinARM\arm-elf\include/machine/ieeefp.h \
-  C:\WinARM\arm-elf\include/sys/reent.h C:\WinARM\arm-elf\include/_ansi.h \
-  C:\WinARM\arm-elf\include/sys/_types.h \
-  C:\WinARM\arm-elf\include/sys/lock.h \
-  c:\asctec_arm_sdk\winarm\bin\../lib/gcc/arm-elf/4.1.1/include/stddef.h \
-  C:\WinARM\arm-elf\include/sys/string.h mav_common/comm.h \
-  external/Common_WinARM/inc/LPC214x.h \
-  external/Common_WinARM/inc/interrupt_utils.h \
-  include/ccny_asctec_firmware/system.h \
-  include/ccny_asctec_firmware/main.h include/ccny_asctec_firmware/util.h \
-  C:\WinARM\arm-elf\include/stdint.h \
-  include/ccny_asctec_firmware/LPC214x.h \
-  include/ccny_asctec_firmware/uart.h \
-  C:\WinARM\arm-elf\include/inttypes.h mav_common/comm_packets.h \
-  mav_common/comm_types.h external/Common_WinARM/inc/irq.h \
-  include/ccny_asctec_firmware/hardware.h \
-  include/ccny_asctec_firmware/main.h \
-  include/ccny_asctec_firmware/system.h \
-  include/ccny_asctec_firmware/uart.h external/Common_WinARM/inc/irq.h \
-  include/ccny_asctec_firmware/gpsmath.h \
-  include/ccny_asctec_firmware/ssp.h \
-  include/ccny_asctec_firmware/lpcUART.h
-
-C:\WinARM\arm-elf\include/string.h:
-
-C:\WinARM\arm-elf\include/_ansi.h:
-
-C:\WinARM\arm-elf\include/newlib.h:
-
-C:\WinARM\arm-elf\include/sys/config.h:
-
-C:\WinARM\arm-elf\include/machine/ieeefp.h:
-
-C:\WinARM\arm-elf\include/sys/reent.h:
-
-C:\WinARM\arm-elf\include/_ansi.h:
-
-C:\WinARM\arm-elf\include/sys/_types.h:
-
-C:\WinARM\arm-elf\include/sys/lock.h:
-
-c:\asctec_arm_sdk\winarm\bin\../lib/gcc/arm-elf/4.1.1/include/stddef.h:
-
-C:\WinARM\arm-elf\include/sys/string.h:
-
-mav_common/comm.h:
-
-external/Common_WinARM/inc/LPC214x.h:
-
-external/Common_WinARM/inc/interrupt_utils.h:
-
-include/ccny_asctec_firmware/system.h:
-
-include/ccny_asctec_firmware/main.h:
-
-include/ccny_asctec_firmware/util.h:
-
-C:\WinARM\arm-elf\include/stdint.h:
-
-include/ccny_asctec_firmware/LPC214x.h:
-
-include/ccny_asctec_firmware/uart.h:
-
-C:\WinARM\arm-elf\include/inttypes.h:
-
-mav_common/comm_packets.h:
-
-mav_common/comm_types.h:
-
-external/Common_WinARM/inc/irq.h:
-
-include/ccny_asctec_firmware/hardware.h:
-
-include/ccny_asctec_firmware/main.h:
-
-include/ccny_asctec_firmware/system.h:
-
-include/ccny_asctec_firmware/uart.h:
-
-external/Common_WinARM/inc/irq.h:
-
-include/ccny_asctec_firmware/gpsmath.h:
-
-include/ccny_asctec_firmware/ssp.h:
-
-include/ccny_asctec_firmware/lpcUART.h:
diff --git a/ccny_asctec_firmware_2/.dep/uart1.o.d b/ccny_asctec_firmware_2/.dep/uart1.o.d
deleted file mode 100644
index aacde3c..0000000
--- a/ccny_asctec_firmware_2/.dep/uart1.o.d
+++ /dev/null
@@ -1,56 +0,0 @@
-src/uart1.o: src/uart1.c external/Common_WinARM/inc/LPC214x.h \
-  external/Common_WinARM/inc/interrupt_utils.h \
-  include/ccny_asctec_firmware/system.h \
-  include/ccny_asctec_firmware/main.h include/ccny_asctec_firmware/util.h \
-  C:\WinARM\arm-elf\include/stdint.h \
-  include/ccny_asctec_firmware/LPC214x.h \
-  include/ccny_asctec_firmware/uart1.h external/Common_WinARM/inc/irq.h \
-  include/ccny_asctec_firmware/hardware.h \
-  include/ccny_asctec_firmware/main.h \
-  include/ccny_asctec_firmware/system.h \
-  include/ccny_asctec_firmware/uart.h \
-  C:\WinARM\arm-elf\include/inttypes.h \
-  c:\asctec_arm_sdk\winarm\bin\../lib/gcc/arm-elf/4.1.1/include/stddef.h \
-  mav_common/comm_packets.h mav_common/comm_types.h \
-  external/Common_WinARM/inc/irq.h include/ccny_asctec_firmware/gpsmath.h \
-  include/ccny_asctec_firmware/ssp.h
-
-external/Common_WinARM/inc/LPC214x.h:
-
-external/Common_WinARM/inc/interrupt_utils.h:
-
-include/ccny_asctec_firmware/system.h:
-
-include/ccny_asctec_firmware/main.h:
-
-include/ccny_asctec_firmware/util.h:
-
-C:\WinARM\arm-elf\include/stdint.h:
-
-include/ccny_asctec_firmware/LPC214x.h:
-
-include/ccny_asctec_firmware/uart1.h:
-
-external/Common_WinARM/inc/irq.h:
-
-include/ccny_asctec_firmware/hardware.h:
-
-include/ccny_asctec_firmware/main.h:
-
-include/ccny_asctec_firmware/system.h:
-
-include/ccny_asctec_firmware/uart.h:
-
-C:\WinARM\arm-elf\include/inttypes.h:
-
-c:\asctec_arm_sdk\winarm\bin\../lib/gcc/arm-elf/4.1.1/include/stddef.h:
-
-mav_common/comm_packets.h:
-
-mav_common/comm_types.h:
-
-external/Common_WinARM/inc/irq.h:
-
-include/ccny_asctec_firmware/gpsmath.h:
-
-include/ccny_asctec_firmware/ssp.h:
diff --git a/ccny_asctec_firmware_2/.dep/util.o.d b/ccny_asctec_firmware_2/.dep/util.o.d
deleted file mode 100644
index 541add9..0000000
--- a/ccny_asctec_firmware_2/.dep/util.o.d
+++ /dev/null
@@ -1,9 +0,0 @@
-src/util.o: src/util.c include/ccny_asctec_firmware/util.h \
-  C:\WinARM\arm-elf\include/stdint.h \
-  include/ccny_asctec_firmware/LPC214x.h
-
-include/ccny_asctec_firmware/util.h:
-
-C:\WinARM\arm-elf\include/stdint.h:
-
-include/ccny_asctec_firmware/LPC214x.h:
diff --git a/ccny_asctec_firmware_2/.project b/ccny_asctec_firmware_2/.project
deleted file mode 100644
index 25ef1c9..0000000
--- a/ccny_asctec_firmware_2/.project
+++ /dev/null
@@ -1,70 +0,0 @@
-<?xml version="1.0" encoding="UTF-8"?>
-<projectDescription>
-	<name>ccny_asctec_firmware_2.0</name>
-	<comment></comment>
-	<projects>
-		<project>AutoPilot_HL_SDK_v2.0</project>
-	</projects>
-	<buildSpec>
-		<buildCommand>
-			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
-			<triggers>clean,full,incremental,</triggers>
-			<arguments>
-				<dictionary>
-					<key>?name?</key>
-					<value></value>
-				</dictionary>
-				<dictionary>
-					<key>org.eclipse.cdt.make.core.append_environment</key>
-					<value>true</value>
-				</dictionary>
-				<dictionary>
-					<key>org.eclipse.cdt.make.core.buildArguments</key>
-					<value></value>
-				</dictionary>
-				<dictionary>
-					<key>org.eclipse.cdt.make.core.buildCommand</key>
-					<value>make</value>
-				</dictionary>
-				<dictionary>
-					<key>org.eclipse.cdt.make.core.buildLocation</key>
-					<value>${workspace_loc:/ccny_asctec_firmware_2/WinARM}</value>
-				</dictionary>
-				<dictionary>
-					<key>org.eclipse.cdt.make.core.contents</key>
-					<value>org.eclipse.cdt.make.core.activeConfigSettings</value>
-				</dictionary>
-				<dictionary>
-					<key>org.eclipse.cdt.make.core.enableAutoBuild</key>
-					<value>false</value>
-				</dictionary>
-				<dictionary>
-					<key>org.eclipse.cdt.make.core.enableCleanBuild</key>
-					<value>true</value>
-				</dictionary>
-				<dictionary>
-					<key>org.eclipse.cdt.make.core.enableFullBuild</key>
-					<value>true</value>
-				</dictionary>
-				<dictionary>
-					<key>org.eclipse.cdt.make.core.stopOnError</key>
-					<value>true</value>
-				</dictionary>
-				<dictionary>
-					<key>org.eclipse.cdt.make.core.useDefaultBuildCmd</key>
-					<value>true</value>
-				</dictionary>
-			</arguments>
-		</buildCommand>
-		<buildCommand>
-			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
-			<arguments>
-			</arguments>
-		</buildCommand>
-	</buildSpec>
-	<natures>
-		<nature>org.eclipse.cdt.core.cnature</nature>
-		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
-		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
-	</natures>
-</projectDescription>
diff --git a/ccny_asctec_firmware_2/ROS_NOBUILD b/ccny_asctec_firmware_2/ROS_NOBUILD
deleted file mode 100644
index e69de29..0000000
diff --git a/ccny_asctec_firmware_2/external/Common_WinARM/LPC2138-RAM.ld b/ccny_asctec_firmware_2/external/Common_WinARM/LPC2138-RAM.ld
deleted file mode 100644
index 05315b9..0000000
--- a/ccny_asctec_firmware_2/external/Common_WinARM/LPC2138-RAM.ld
+++ /dev/null
@@ -1,156 +0,0 @@
-/***********************************************************************/
-/*  ROM.ld:  Linker Script File                                        */
-/***********************************************************************/
-
-/* modified and extended by Martin Thomas */
-
-/* ENTRY(_boot)
-STACK_SIZE = 0x800; */
-
-/* Memory Definitions */
-MEMORY
-{
-  ROM (rx) : ORIGIN = 0x00000000, LENGTH = 512k
-  RAM (rw) : ORIGIN = 0x40000000, LENGTH = 32k
-}
-
-/* Section Definitions */
-SECTIONS
-{
-  /* first section is .text which is used for code */
-   .text :
-  {
-	/* *crt0.o (.text) */           /* Startup code */
-	KEEP(*(.vectorg))
-	. = ALIGN(4);
-	KEEP(*(.init))             /* Startup code from .init-section */
-	*(.text .text.*)           /* remaining code */
-	*(.gnu.linkonce.t.*)
-	*(.glue_7)
-	*(.glue_7t)
-	*(.gcc_except_table)
-	*(.rodata)                 /* read-only data (constants) */
-	*(.rodata*)
-	*(.gnu.linkonce.r.*)
-	. = ALIGN(4);
-  } > RAM
-  
-  /***** old: 
-  .text :
-  {
-    *crt0.o (.text)            
-    *(.text)                   
-    *(.rodata)                 
-    *(.rodata*)
-    *(.glue_7)
-    *(.glue_7t)
-  } > ROM 
-  *****/
-
-  . = ALIGN(4);
-  
-	/* .ctors .dtors are used for c++ constructors/destructors */
-	/* added by Martin Thomas 4/2005 based on Anglia Design example */
-	.ctors :
-	{
-		PROVIDE(__ctors_start__ = .);
-		KEEP(*(SORT(.ctors.*)))
-		KEEP(*(.ctors))
-		. = ALIGN(4);
-		PROVIDE(__ctors_end__ = .);
-		. = ALIGN(4);
-	} >ROM
-	
-	.dtors :
-	{
-		PROVIDE(__dtors_start__ = .); 
-		KEEP(*(SORT(.dtors.*)))
-		KEEP(*(.dtors))
-		. = ALIGN(4);
-		PROVIDE(__dtors_end__ = .);
-		. = ALIGN(4);
-	} >ROM
-  
-    . = ALIGN(4);
-	/* mthomas - end */
-   
-  _etext = . ;
-  PROVIDE (etext = .);
-
-  /* .data section which is used for initialized data */
-  .data : AT (_etext)
-  {
-    _data = .;
-	*(.fastrun) /* mthomas: for "RAMFUNC" */
-	. = ALIGN(4);
-	SORT(CONSTRUCTORS) /* mt 4/2005 */
-	. = ALIGN(4);
-    *(.data)
-	*(.data.*)
-	*(.gnu.linkonce.d*)
-	. = ALIGN(4);
-  } > RAM
- 
-  . = ALIGN(4);
-  _edata = . ;
-  PROVIDE (edata = .);
-
-  /* .bss section which is used for uninitialized data */
-  .bss (NOLOAD) :
-  {
-    __bss_start = . ;
-    __bss_start__ = . ;
-    *(.bss)
-	*(.gnu.linkonce.b*)
-    *(COMMON)
-    . = ALIGN(4);
-  } > RAM
-
-  . = ALIGN(4);
-  __bss_end__ = . ;
-  PROVIDE (__bss_end = .);
-
-  .stack ALIGN(256) :
-  {
-    *(.stack)
-    PROVIDE (_stack = .);
-	. = ALIGN(4);
-  } > RAM
-
-  _end = . ;
-  PROVIDE (end = .);
-
-  /* Stabs debugging sections.  */
-  .stab          0 : { *(.stab) }
-  .stabstr       0 : { *(.stabstr) }
-  .stab.excl     0 : { *(.stab.excl) }
-  .stab.exclstr  0 : { *(.stab.exclstr) }
-  .stab.index    0 : { *(.stab.index) }
-  .stab.indexstr 0 : { *(.stab.indexstr) }
-  .comment       0 : { *(.comment) }
-  /* DWARF debug sections.
-     Symbols in the DWARF debugging sections are relative to the beginning
-     of the section so we begin them at 0.  */
-  /* DWARF 1 */
-  .debug          0 : { *(.debug) }
-  .line           0 : { *(.line) }
-  /* GNU DWARF 1 extensions */
-  .debug_srcinfo  0 : { *(.debug_srcinfo) }
-  .debug_sfnames  0 : { *(.debug_sfnames) }
-  /* DWARF 1.1 and DWARF 2 */
-  .debug_aranges  0 : { *(.debug_aranges) }
-  .debug_pubnames 0 : { *(.debug_pubnames) }
-  /* DWARF 2 */
-  .debug_info     0 : { *(.debug_info .gnu.linkonce.wi.*) }
-  .debug_abbrev   0 : { *(.debug_abbrev) }
-  .debug_line     0 : { *(.debug_line) }
-  .debug_frame    0 : { *(.debug_frame) }
-  .debug_str      0 : { *(.debug_str) }
-  .debug_loc      0 : { *(.debug_loc) }
-  .debug_macinfo  0 : { *(.debug_macinfo) }
-  /* SGI/MIPS DWARF 2 extensions */
-  .debug_weaknames 0 : { *(.debug_weaknames) }
-  .debug_funcnames 0 : { *(.debug_funcnames) }
-  .debug_typenames 0 : { *(.debug_typenames) }
-  .debug_varnames  0 : { *(.debug_varnames) }
-}
diff --git a/ccny_asctec_firmware_2/external/Common_WinARM/LPC2138-ROM.ld b/ccny_asctec_firmware_2/external/Common_WinARM/LPC2138-ROM.ld
deleted file mode 100644
index ba2a4e3..0000000
--- a/ccny_asctec_firmware_2/external/Common_WinARM/LPC2138-ROM.ld
+++ /dev/null
@@ -1,164 +0,0 @@
-/***********************************************************************/
-/*  ROM.ld:  Linker Script File                                        */
-/***********************************************************************/
-
-/* 
-   Based on scripts found in the LPC yahoo-group and the Keil examples 
-   modified by Martin Thomas, Kaiserslautern, Germany
-   http://www.siwawi.arubi.uni-kl.de/avr_projects
-*/
-
-/* 
-ENTRY(_boot)
-STACK_SIZE = 0x800; -> see startup-file and .stack-section 
-*/
-
-/* Memory Definitions */
-MEMORY
-{
-  ROM (rx) : ORIGIN = 0x00000000, LENGTH = 512k
-  RAM (rw) : ORIGIN = 0x40000000, LENGTH = 32k
-}
-
-/* Section Definitions */
-SECTIONS
-{
-  /* first section is .text which is used for code */
-   .text :
-  {
-	/* *crt0.o (.text) */           /* Startup code */
-	KEEP(*(.vectorg))
-	. = ALIGN(4);
-	KEEP(*(.init))             /* Startup code from .init-section */
-	*(.text .text.*)           /* remaining code */
-	*(.gnu.linkonce.t.*)
-	*(.glue_7)
-	*(.glue_7t)
-	*(.gcc_except_table)
-	*(.rodata)                 /* read-only data (constants) */
-	*(.rodata*)
-	*(.gnu.linkonce.r.*)
-	. = ALIGN(4);
-  } > ROM
-  
-  /***** old: 
-  .text :
-  {
-    *crt0.o (.text)            
-    *(.text)                   
-    *(.rodata)                 
-    *(.rodata*)
-    *(.glue_7)
-    *(.glue_7t)
-  } > ROM 
-  *****/
-
-  . = ALIGN(4);
-  
-	/* .ctors .dtors are used for c++ constructors/destructors */
-	/* added by Martin Thomas 4/2005 based on Anglia Design example */
-	.ctors :
-	{
-		PROVIDE(__ctors_start__ = .);
-		KEEP(*(SORT(.ctors.*)))
-		KEEP(*(.ctors))
-		. = ALIGN(4);
-		PROVIDE(__ctors_end__ = .);
-		. = ALIGN(4);
-	} >ROM
-	
-	.dtors :
-	{
-		PROVIDE(__dtors_start__ = .); 
-		KEEP(*(SORT(.dtors.*)))
-		KEEP(*(.dtors))
-		. = ALIGN(4);
-		PROVIDE(__dtors_end__ = .);
-		. = ALIGN(4);
-	} >ROM
-  
-    . = ALIGN(4);
-	/* mthomas - end */
-   
-  _etext = . ;
-  PROVIDE (etext = .);
-
-  /* .data section which is used for initialized data */
-  .data : AT (_etext)
-  {
-	_data = .;
-	KEEP(*(.vectmapped)) /* mthomas: when code in ROM and vectors remapped */
-	. = ALIGN(4);
-	*(.fastrun) /* mthomas: for "RAMFUNC" */
-	. = ALIGN(4);
-	SORT(CONSTRUCTORS) /* mt 4/2005 */
-	. = ALIGN(4);
-	*(.data)
-	*(.data.*)
-	*(.gnu.linkonce.d*)
-	. = ALIGN(4);
-  } > RAM
- 
-  . = ALIGN(4);
-  _edata = . ;
-  PROVIDE (edata = .);
-
-  /* .bss section which is used for uninitialized data */
-  .bss (NOLOAD) :
-  {
-    __bss_start = . ;
-    __bss_start__ = . ;
-    *(.bss)
-    *(.gnu.linkonce.b*)
-    *(COMMON)
-    . = ALIGN(4);
-  } > RAM
-
-  . = ALIGN(4);
-  __bss_end__ = . ;
-  PROVIDE (__bss_end = .);
-
-  .stack ALIGN(256) :
-  {
-    *(.stack)
-    PROVIDE (_stack = .);
-    . = ALIGN(4);
-  } > RAM
-
-  _end = . ;
-  PROVIDE (end = .);
-
-  /* Stabs debugging sections.  */
-  .stab          0 : { *(.stab) }
-  .stabstr       0 : { *(.stabstr) }
-  .stab.excl     0 : { *(.stab.excl) }
-  .stab.exclstr  0 : { *(.stab.exclstr) }
-  .stab.index    0 : { *(.stab.index) }
-  .stab.indexstr 0 : { *(.stab.indexstr) }
-  .comment       0 : { *(.comment) }
-  /* DWARF debug sections.
-     Symbols in the DWARF debugging sections are relative to the beginning
-     of the section so we begin them at 0.  */
-  /* DWARF 1 */
-  .debug          0 : { *(.debug) }
-  .line           0 : { *(.line) }
-  /* GNU DWARF 1 extensions */
-  .debug_srcinfo  0 : { *(.debug_srcinfo) }
-  .debug_sfnames  0 : { *(.debug_sfnames) }
-  /* DWARF 1.1 and DWARF 2 */
-  .debug_aranges  0 : { *(.debug_aranges) }
-  .debug_pubnames 0 : { *(.debug_pubnames) }
-  /* DWARF 2 */
-  .debug_info     0 : { *(.debug_info .gnu.linkonce.wi.*) }
-  .debug_abbrev   0 : { *(.debug_abbrev) }
-  .debug_line     0 : { *(.debug_line) }
-  .debug_frame    0 : { *(.debug_frame) }
-  .debug_str      0 : { *(.debug_str) }
-  .debug_loc      0 : { *(.debug_loc) }
-  .debug_macinfo  0 : { *(.debug_macinfo) }
-  /* SGI/MIPS DWARF 2 extensions */
-  .debug_weaknames 0 : { *(.debug_weaknames) }
-  .debug_funcnames 0 : { *(.debug_funcnames) }
-  .debug_typenames 0 : { *(.debug_typenames) }
-  .debug_varnames  0 : { *(.debug_varnames) }
-}
diff --git a/ccny_asctec_firmware_2/external/Common_WinARM/LPC2146-ROM.ld b/ccny_asctec_firmware_2/external/Common_WinARM/LPC2146-ROM.ld
deleted file mode 100644
index ba2a4e3..0000000
--- a/ccny_asctec_firmware_2/external/Common_WinARM/LPC2146-ROM.ld
+++ /dev/null
@@ -1,164 +0,0 @@
-/***********************************************************************/
-/*  ROM.ld:  Linker Script File                                        */
-/***********************************************************************/
-
-/* 
-   Based on scripts found in the LPC yahoo-group and the Keil examples 
-   modified by Martin Thomas, Kaiserslautern, Germany
-   http://www.siwawi.arubi.uni-kl.de/avr_projects
-*/
-
-/* 
-ENTRY(_boot)
-STACK_SIZE = 0x800; -> see startup-file and .stack-section 
-*/
-
-/* Memory Definitions */
-MEMORY
-{
-  ROM (rx) : ORIGIN = 0x00000000, LENGTH = 512k
-  RAM (rw) : ORIGIN = 0x40000000, LENGTH = 32k
-}
-
-/* Section Definitions */
-SECTIONS
-{
-  /* first section is .text which is used for code */
-   .text :
-  {
-	/* *crt0.o (.text) */           /* Startup code */
-	KEEP(*(.vectorg))
-	. = ALIGN(4);
-	KEEP(*(.init))             /* Startup code from .init-section */
-	*(.text .text.*)           /* remaining code */
-	*(.gnu.linkonce.t.*)
-	*(.glue_7)
-	*(.glue_7t)
-	*(.gcc_except_table)
-	*(.rodata)                 /* read-only data (constants) */
-	*(.rodata*)
-	*(.gnu.linkonce.r.*)
-	. = ALIGN(4);
-  } > ROM
-  
-  /***** old: 
-  .text :
-  {
-    *crt0.o (.text)            
-    *(.text)                   
-    *(.rodata)                 
-    *(.rodata*)
-    *(.glue_7)
-    *(.glue_7t)
-  } > ROM 
-  *****/
-
-  . = ALIGN(4);
-  
-	/* .ctors .dtors are used for c++ constructors/destructors */
-	/* added by Martin Thomas 4/2005 based on Anglia Design example */
-	.ctors :
-	{
-		PROVIDE(__ctors_start__ = .);
-		KEEP(*(SORT(.ctors.*)))
-		KEEP(*(.ctors))
-		. = ALIGN(4);
-		PROVIDE(__ctors_end__ = .);
-		. = ALIGN(4);
-	} >ROM
-	
-	.dtors :
-	{
-		PROVIDE(__dtors_start__ = .); 
-		KEEP(*(SORT(.dtors.*)))
-		KEEP(*(.dtors))
-		. = ALIGN(4);
-		PROVIDE(__dtors_end__ = .);
-		. = ALIGN(4);
-	} >ROM
-  
-    . = ALIGN(4);
-	/* mthomas - end */
-   
-  _etext = . ;
-  PROVIDE (etext = .);
-
-  /* .data section which is used for initialized data */
-  .data : AT (_etext)
-  {
-	_data = .;
-	KEEP(*(.vectmapped)) /* mthomas: when code in ROM and vectors remapped */
-	. = ALIGN(4);
-	*(.fastrun) /* mthomas: for "RAMFUNC" */
-	. = ALIGN(4);
-	SORT(CONSTRUCTORS) /* mt 4/2005 */
-	. = ALIGN(4);
-	*(.data)
-	*(.data.*)
-	*(.gnu.linkonce.d*)
-	. = ALIGN(4);
-  } > RAM
- 
-  . = ALIGN(4);
-  _edata = . ;
-  PROVIDE (edata = .);
-
-  /* .bss section which is used for uninitialized data */
-  .bss (NOLOAD) :
-  {
-    __bss_start = . ;
-    __bss_start__ = . ;
-    *(.bss)
-    *(.gnu.linkonce.b*)
-    *(COMMON)
-    . = ALIGN(4);
-  } > RAM
-
-  . = ALIGN(4);
-  __bss_end__ = . ;
-  PROVIDE (__bss_end = .);
-
-  .stack ALIGN(256) :
-  {
-    *(.stack)
-    PROVIDE (_stack = .);
-    . = ALIGN(4);
-  } > RAM
-
-  _end = . ;
-  PROVIDE (end = .);
-
-  /* Stabs debugging sections.  */
-  .stab          0 : { *(.stab) }
-  .stabstr       0 : { *(.stabstr) }
-  .stab.excl     0 : { *(.stab.excl) }
-  .stab.exclstr  0 : { *(.stab.exclstr) }
-  .stab.index    0 : { *(.stab.index) }
-  .stab.indexstr 0 : { *(.stab.indexstr) }
-  .comment       0 : { *(.comment) }
-  /* DWARF debug sections.
-     Symbols in the DWARF debugging sections are relative to the beginning
-     of the section so we begin them at 0.  */
-  /* DWARF 1 */
-  .debug          0 : { *(.debug) }
-  .line           0 : { *(.line) }
-  /* GNU DWARF 1 extensions */
-  .debug_srcinfo  0 : { *(.debug_srcinfo) }
-  .debug_sfnames  0 : { *(.debug_sfnames) }
-  /* DWARF 1.1 and DWARF 2 */
-  .debug_aranges  0 : { *(.debug_aranges) }
-  .debug_pubnames 0 : { *(.debug_pubnames) }
-  /* DWARF 2 */
-  .debug_info     0 : { *(.debug_info .gnu.linkonce.wi.*) }
-  .debug_abbrev   0 : { *(.debug_abbrev) }
-  .debug_line     0 : { *(.debug_line) }
-  .debug_frame    0 : { *(.debug_frame) }
-  .debug_str      0 : { *(.debug_str) }
-  .debug_loc      0 : { *(.debug_loc) }
-  .debug_macinfo  0 : { *(.debug_macinfo) }
-  /* SGI/MIPS DWARF 2 extensions */
-  .debug_weaknames 0 : { *(.debug_weaknames) }
-  .debug_funcnames 0 : { *(.debug_funcnames) }
-  .debug_typenames 0 : { *(.debug_typenames) }
-  .debug_varnames  0 : { *(.debug_varnames) }
-}
diff --git a/ccny_asctec_firmware_2/external/Common_WinARM/inc/LPC214x.h b/ccny_asctec_firmware_2/external/Common_WinARM/inc/LPC214x.h
deleted file mode 100644
index e2c69cf..0000000
--- a/ccny_asctec_firmware_2/external/Common_WinARM/inc/LPC214x.h
+++ /dev/null
@@ -1,399 +0,0 @@
-/******************************************************************************
- *   LPC214X.h:  Header file for Philips LPC214x Family Microprocessors
- *   The header file is the super set of all hardware definition of the 
- *   peripherals for the LPC214x family microprocessor.
- *
- *   Copyright(C) 2006, Philips Semiconductor
- *   All rights reserved.
-
- *   History
- *   2005.10.01  ver 1.00    Prelimnary version, first Release
- *   2005.10.13  ver 1.01    Removed CSPR and DC_REVISION register.
- *                           CSPR can not be accessed at the user level,
- *                           DC_REVISION is no long available.
- *                           All registers use "volatile unsigned long". 
-******************************************************************************/
-
-#ifndef __LPC214x_H
-#define __LPC214x_H
-
-/* Vectored Interrupt Controller (VIC) */
-#define VIC_BASE_ADDR	0xFFFFF000
-
-#define VICIRQStatus   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x000))
-#define VICFIQStatus   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x004))
-#define VICRawIntr     (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x008))
-#define VICIntSelect   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x00C))
-#define VICIntEnable   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x010))
-#define VICIntEnClr    (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x014))
-#define VICSoftInt     (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x018))
-#define VICSoftIntClr  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x01C))
-#define VICProtection  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x020))
-#define VICVectAddr    (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x030))
-#define VICDefVectAddr (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x034))
-#define VICVectAddr0   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x100))
-#define VICVectAddr1   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x104))
-#define VICVectAddr2   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x108))
-#define VICVectAddr3   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x10C))
-#define VICVectAddr4   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x110))
-#define VICVectAddr5   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x114))
-#define VICVectAddr6   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x118))
-#define VICVectAddr7   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x11C))
-#define VICVectAddr8   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x120))
-#define VICVectAddr9   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x124))
-#define VICVectAddr10  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x128))
-#define VICVectAddr11  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x12C))
-#define VICVectAddr12  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x130))
-#define VICVectAddr13  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x134))
-#define VICVectAddr14  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x138))
-#define VICVectAddr15  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x13C))
-#define VICVectCntl0   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x200))
-#define VICVectCntl1   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x204))
-#define VICVectCntl2   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x208))
-#define VICVectCntl3   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x20C))
-#define VICVectCntl4   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x210))
-#define VICVectCntl5   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x214))
-#define VICVectCntl6   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x218))
-#define VICVectCntl7   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x21C))
-#define VICVectCntl8   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x220))
-#define VICVectCntl9   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x224))
-#define VICVectCntl10  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x228))
-#define VICVectCntl11  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x22C))
-#define VICVectCntl12  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x230))
-#define VICVectCntl13  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x234))
-#define VICVectCntl14  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x238))
-#define VICVectCntl15  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x23C))
-
-/* Pin Connect Block */
-#define PINSEL_BASE_ADDR	0xE002C000
-#define PINSEL0        (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x00))
-#define PINSEL1        (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x04))
-#define PINSEL2        (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x14))
-
-/* General Purpose Input/Output (GPIO) */
-#define GPIO_BASE_ADDR		0xE0028000
-#define IOPIN0         (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x00))
-#define IOSET0         (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x04))
-#define IODIR0         (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x08))
-#define IOCLR0         (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x0C))
-#define IOPIN1         (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x10))
-#define IOSET1         (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x14))
-#define IODIR1         (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x18))
-#define IOCLR1         (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x1C))
-
-/* Fast I/O setup */
-#define FIO_BASE_ADDR		0x3FFFC000
-#define FIO0DIR        (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x00)) 
-#define FIO0MASK       (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x10))
-#define FIO0PIN        (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x14))
-#define FIO0SET        (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x18))
-#define FIO0CLR        (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x1C))
-#define FIO1DIR        (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x20)) 
-#define FIO1MASK       (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x30))
-#define FIO1PIN        (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x34))
-#define FIO1SET        (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x38))
-#define FIO1CLR        (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x3C))
-
-/* System Control Block(SCB) modules include Memory Accelerator Module,
-Phase Locked Loop, VPB divider, Power Control, External Interrupt, 
-Reset, and Code Security/Debugging */
-
-#define SCB_BASE_ADDR	0xE01FC000
-
-/* Memory Accelerator Module (MAM) */
-#define MAMCR          (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x000))
-#define MAMTIM         (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x004))
-#define MEMMAP         (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x040))
-
-/* Phase Locked Loop (PLL) */
-#define PLLCON         (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x080))
-#define PLLCFG         (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x084))
-#define PLLSTAT        (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x088))
-#define PLLFEED        (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x08C))
-
-/* PLL48 Registers */
-#define PLL48CON       (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x0A0))
-#define PLL48CFG       (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x0A4))
-#define PLL48STAT      (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x0A8))
-#define PLL48FEED      (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x0AC))
-
-/* Power Control */
-#define PCON           (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x0C0))
-#define PCONP          (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x0C4))
-
-/* VPB Divider */
-#define VPBDIV         (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x100))
-
-/* External Interrupts */
-#define EXTINT         (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x140))
-#define INTWAKE        (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x144))
-#define EXTMODE        (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x148))
-#define EXTPOLAR       (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x14C))
-
-/* Reset */
-#define RSIR           (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x180))
-
-/* System Controls and Status */
-#define SCS            (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x1A0))	
-
-/* Timer 0 */
-#define TMR0_BASE_ADDR		0xE0004000
-#define T0IR           (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x00))
-#define T0TCR          (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x04))
-#define T0TC           (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x08))
-#define T0PR           (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x0C))
-#define T0PC           (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x10))
-#define T0MCR          (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x14))
-#define T0MR0          (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x18))
-#define T0MR1          (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x1C))
-#define T0MR2          (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x20))
-#define T0MR3          (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x24))
-#define T0CCR          (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x28))
-#define T0CR0          (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x2C))
-#define T0CR1          (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x30))
-#define T0CR2          (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x34))
-#define T0CR3          (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x38))
-#define T0EMR          (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x3C))
-#define T0CTCR         (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x70))
-
-/* Timer 1 */
-#define TMR1_BASE_ADDR		0xE0008000
-#define T1IR           (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x00))
-#define T1TCR          (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x04))
-#define T1TC           (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x08))
-#define T1PR           (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x0C))
-#define T1PC           (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x10))
-#define T1MCR          (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x14))
-#define T1MR0          (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x18))
-#define T1MR1          (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x1C))
-#define T1MR2          (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x20))
-#define T1MR3          (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x24))
-#define T1CCR          (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x28))
-#define T1CR0          (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x2C))
-#define T1CR1          (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x30))
-#define T1CR2          (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x34))
-#define T1CR3          (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x38))
-#define T1EMR          (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x3C))
-#define T1CTCR         (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x70))
-
-/* Pulse Width Modulator (PWM) */
-#define PWM_BASE_ADDR		0xE0014000
-#define PWMIR          (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x00))
-#define PWMTCR         (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x04))
-#define PWMTC          (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x08))
-#define PWMPR          (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x0C))
-#define PWMPC          (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x10))
-#define PWMMCR         (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x14))
-#define PWMMR0         (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x18))
-#define PWMMR1         (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x1C))
-#define PWMMR2         (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x20))
-#define PWMMR3         (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x24))
-#define PWMMR4         (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x40))
-#define PWMMR5         (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x44))
-#define PWMMR6         (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x48))
-#define PWMEMR         (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x3C))
-#define PWMPCR         (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x4C))
-#define PWMLER         (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x50))
-
-/* Universal Asynchronous Receiver Transmitter 0 (UART0) */
-#define UART0_BASE_ADDR		0xE000C000
-#define U0RBR          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x00))
-#define U0THR          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x00))
-#define U0DLL          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x00))
-#define U0DLM          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x04))
-#define U0IER          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x04))
-#define U0IIR          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x08))
-#define U0FCR          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x08))
-#define U0LCR          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x0C))
-#define U0MCR          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x10))
-#define U0LSR          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x14))
-#define U0MSR          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x18))
-#define U0SCR          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x1C))
-#define U0ACR          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x20))
-#define U0FDR          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x28))
-#define U0TER          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x30))
-
-/* Universal Asynchronous Receiver Transmitter 1 (UART1) */
-#define UART1_BASE_ADDR		0xE0010000
-#define U1RBR          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x00))
-#define U1THR          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x00))
-#define U1DLL          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x00))
-#define U1DLM          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x04))
-#define U1IER          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x04))
-#define U1IIR          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x08))
-#define U1FCR          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x08))
-#define U1LCR          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x0C))
-#define U1MCR          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x10))
-#define U1LSR          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x14))
-#define U1MSR          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x18))
-#define U1SCR          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x1C))
-#define U1ACR          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x20))
-#define U1FDR          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x28))
-#define U1TER          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x30))
-
-/* I2C Interface 0 */
-#define I2C0_BASE_ADDR		0xE001C000
-#define I20CONSET      (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x00))
-#define I20STAT        (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x04))
-#define I20DAT         (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x08))
-#define I20ADR         (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x0C))
-#define I20SCLH        (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x10))
-#define I20SCLL        (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x14))
-#define I20CONCLR      (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x18))
-
-/* I2C Interface 1 */
-#define I2C1_BASE_ADDR		0xE005C000
-#define I21CONSET      (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x00))
-#define I21STAT        (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x04))
-#define I21DAT         (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x08))
-#define I21ADR         (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x0C))
-#define I21SCLH        (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x10))
-#define I21SCLL        (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x14))
-#define I21CONCLR      (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x18))
-
-/* SPI0 (Serial Peripheral Interface 0) */
-#define SPI0_BASE_ADDR		0xE0020000
-#define S0SPCR         (*(volatile unsigned long *)(SPI0_BASE_ADDR + 0x00))
-#define S0SPSR         (*(volatile unsigned long *)(SPI0_BASE_ADDR + 0x04))
-#define S0SPDR         (*(volatile unsigned long *)(SPI0_BASE_ADDR + 0x08))
-#define S0SPCCR        (*(volatile unsigned long *)(SPI0_BASE_ADDR + 0x0C))
-#define S0SPINT        (*(volatile unsigned long *)(SPI0_BASE_ADDR + 0x1C))
-
-/* SSP Controller */
-#define SSP_BASE_ADDR		0xE0068000
-#define SSPCR0         (*(volatile unsigned long * )(SSP_BASE_ADDR + 0x00))
-#define SSPCR1         (*(volatile unsigned long * )(SSP_BASE_ADDR + 0x04))
-#define SSPDR          (*(volatile unsigned long * )(SSP_BASE_ADDR + 0x08))
-#define SSPSR          (*(volatile unsigned long * )(SSP_BASE_ADDR + 0x0C))
-#define SSPCPSR        (*(volatile unsigned long * )(SSP_BASE_ADDR + 0x10))
-#define SSPIMSC        (*(volatile unsigned long * )(SSP_BASE_ADDR + 0x14))
-#define SSPRIS         (*(volatile unsigned long * )(SSP_BASE_ADDR + 0x18))
-#define SSPMIS         (*(volatile unsigned long * )(SSP_BASE_ADDR + 0x1C))
-#define SSPICR         (*(volatile unsigned long * )(SSP_BASE_ADDR + 0x20))
-
-/* Real Time Clock */
-#define RTC_BASE_ADDR		0xE0024000
-#define ILR            (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x00))
-#define CTC            (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x04))
-#define CCR            (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x08))
-#define CIIR           (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x0C))
-#define AMR            (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x10))
-#define CTIME0         (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x14))
-#define CTIME1         (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x18))
-#define CTIME2         (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x1C))
-#define SEC            (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x20))
-#define MIN            (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x24))
-#define HOUR           (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x28))
-#define DOM            (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x2C))
-#define DOW            (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x30))
-#define DOY            (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x34))
-#define MONTH          (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x38))
-#define YEAR           (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x3C))
-#define ALSEC          (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x60))
-#define ALMIN          (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x64))
-#define ALHOUR         (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x68))
-#define ALDOM          (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x6C))
-#define ALDOW          (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x70))
-#define ALDOY          (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x74))
-#define ALMON          (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x78))
-#define ALYEAR         (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x7C))
-#define PREINT         (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x80))
-#define PREFRAC        (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x84))
-
-/* A/D Converter 0 (AD0) */
-#define AD0_BASE_ADDR		0xE0034000
-#define AD0CR          (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x00))
-#define AD0GDR         (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x04))
-#define AD0STAT        (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x30))
-#define AD0INTEN       (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x0C))
-#define AD0DR0         (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x10))
-#define AD0DR1         (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x14))
-#define AD0DR2         (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x18))
-#define AD0DR3         (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x1C))
-#define AD0DR4         (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x20))
-#define AD0DR5         (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x24))
-#define AD0DR6         (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x28))
-#define AD0DR7         (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x2C))
-
-#define ADGSR          (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x08))
-/* A/D Converter 1 (AD1) */
-#define AD1_BASE_ADDR		0xE0060000
-#define AD1CR          (*(volatile unsigned long *)(AD1_BASE_ADDR + 0x00))
-#define AD1GDR         (*(volatile unsigned long *)(AD1_BASE_ADDR + 0x04))
-#define AD1STAT        (*(volatile unsigned long *)(AD1_BASE_ADDR + 0x30))
-#define AD1INTEN       (*(volatile unsigned long *)(AD1_BASE_ADDR + 0x0C))
-#define AD1DR0         (*(volatile unsigned long *)(AD1_BASE_ADDR + 0x10))
-#define AD1DR1         (*(volatile unsigned long *)(AD1_BASE_ADDR + 0x14))
-#define AD1DR2         (*(volatile unsigned long *)(AD1_BASE_ADDR + 0x18))
-#define AD1DR3         (*(volatile unsigned long *)(AD1_BASE_ADDR + 0x1C))
-#define AD1DR4         (*(volatile unsigned long *)(AD1_BASE_ADDR + 0x20))
-#define AD1DR5         (*(volatile unsigned long *)(AD1_BASE_ADDR + 0x24))
-#define AD1DR6         (*(volatile unsigned long *)(AD1_BASE_ADDR + 0x28))
-#define AD1DR7         (*(volatile unsigned long *)(AD1_BASE_ADDR + 0x2C))
-
-/* D/A Converter */
-#define DAC_BASE_ADDR		0xE006C000
-#define DACR           (*(volatile unsigned long *)(DAC_BASE_ADDR + 0x00))
-
-/* Watchdog */
-#define WDG_BASE_ADDR		0xE0000000
-#define WDMOD          (*(volatile unsigned long *)(WDG_BASE_ADDR + 0x00))
-#define WDTC           (*(volatile unsigned long *)(WDG_BASE_ADDR + 0x04))
-#define WDFEED         (*(volatile unsigned long *)(WDG_BASE_ADDR + 0x08))
-#define WDTV           (*(volatile unsigned long *)(WDG_BASE_ADDR + 0x0C))
-
-/* USB Controller */
-#define USB_BASE_ADDR		0xE0090000			/* USB Base Address */
-/* Device Interrupt Registers */
-#define DEV_INT_STAT    (*(volatile unsigned long *)(USB_BASE_ADDR + 0x00))
-#define DEV_INT_EN      (*(volatile unsigned long *)(USB_BASE_ADDR + 0x04))
-#define DEV_INT_CLR     (*(volatile unsigned long *)(USB_BASE_ADDR + 0x08))
-#define DEV_INT_SET     (*(volatile unsigned long *)(USB_BASE_ADDR + 0x0C))
-#define DEV_INT_PRIO    (*(volatile unsigned long *)(USB_BASE_ADDR + 0x2C))
-
-/* Endpoint Interrupt Registers */
-#define EP_INT_STAT     (*(volatile unsigned long *)(USB_BASE_ADDR + 0x30))
-#define EP_INT_EN       (*(volatile unsigned long *)(USB_BASE_ADDR + 0x34))
-#define EP_INT_CLR      (*(volatile unsigned long *)(USB_BASE_ADDR + 0x38))
-#define EP_INT_SET      (*(volatile unsigned long *)(USB_BASE_ADDR + 0x3C))
-#define EP_INT_PRIO     (*(volatile unsigned long *)(USB_BASE_ADDR + 0x40))
-
-/* Endpoint Realization Registers */
-#define REALIZE_EP      (*(volatile unsigned long *)(USB_BASE_ADDR + 0x44))
-#define EP_INDEX        (*(volatile unsigned long *)(USB_BASE_ADDR + 0x48))
-#define MAXPACKET_SIZE  (*(volatile unsigned long *)(USB_BASE_ADDR + 0x4C))
-
-/* Command Reagisters */
-#define CMD_CODE        (*(volatile unsigned long *)(USB_BASE_ADDR + 0x10))
-#define CMD_DATA        (*(volatile unsigned long *)(USB_BASE_ADDR + 0x14))
-
-/* Data Transfer Registers */
-#define RX_DATA         (*(volatile unsigned long *)(USB_BASE_ADDR + 0x18))
-#define TX_DATA         (*(volatile unsigned long *)(USB_BASE_ADDR + 0x1C))
-#define RX_PLENGTH      (*(volatile unsigned long *)(USB_BASE_ADDR + 0x20))
-#define TX_PLENGTH      (*(volatile unsigned long *)(USB_BASE_ADDR + 0x24))
-#define USB_CTRL        (*(volatile unsigned long *)(USB_BASE_ADDR + 0x28))
-
-/* DMA Registers */
-#define DMA_REQ_STAT        (*((volatile unsigned long *)USB_BASE_ADDR + 0x50))
-#define DMA_REQ_CLR         (*((volatile unsigned long *)USB_BASE_ADDR + 0x54))
-#define DMA_REQ_SET         (*((volatile unsigned long *)USB_BASE_ADDR + 0x58))
-#define UDCA_HEAD           (*((volatile unsigned long *)USB_BASE_ADDR + 0x80))
-#define EP_DMA_STAT         (*((volatile unsigned long *)USB_BASE_ADDR + 0x84))
-#define EP_DMA_EN           (*((volatile unsigned long *)USB_BASE_ADDR + 0x88))
-#define EP_DMA_DIS          (*((volatile unsigned long *)USB_BASE_ADDR + 0x8C))
-#define DMA_INT_STAT        (*((volatile unsigned long *)USB_BASE_ADDR + 0x90))
-#define DMA_INT_EN          (*((volatile unsigned long *)USB_BASE_ADDR + 0x94))
-#define EOT_INT_STAT        (*((volatile unsigned long *)USB_BASE_ADDR + 0xA0))
-#define EOT_INT_CLR         (*((volatile unsigned long *)USB_BASE_ADDR + 0xA4))
-#define EOT_INT_SET         (*((volatile unsigned long *)USB_BASE_ADDR + 0xA8))
-#define NDD_REQ_INT_STAT    (*((volatile unsigned long *)USB_BASE_ADDR + 0xAC))
-#define NDD_REQ_INT_CLR     (*((volatile unsigned long *)USB_BASE_ADDR + 0xB0))
-#define NDD_REQ_INT_SET     (*((volatile unsigned long *)USB_BASE_ADDR + 0xB4))
-#define SYS_ERR_INT_STAT    (*((volatile unsigned long *)USB_BASE_ADDR + 0xB8))
-#define SYS_ERR_INT_CLR     (*((volatile unsigned long *)USB_BASE_ADDR + 0xBC))
-#define SYS_ERR_INT_SET     (*((volatile unsigned long *)USB_BASE_ADDR + 0xC0))    
-#define MODULE_ID           (*((volatile unsigned long *)USB_BASE_ADDR + 0xFC))
-
-#endif  // __LPC214x_H
-
diff --git a/ccny_asctec_firmware_2/external/Common_WinARM/inc/interrupt_utils.h b/ccny_asctec_firmware_2/external/Common_WinARM/inc/interrupt_utils.h
deleted file mode 100644
index a3a0c18..0000000
--- a/ccny_asctec_firmware_2/external/Common_WinARM/inc/interrupt_utils.h
+++ /dev/null
@@ -1,289 +0,0 @@
-/*
- *  Defines and Macros for Interrupt-Service-Routines
- *  collected and partly created by
- *  Martin Thomas <mthomas@rhrk.uni-kl.de>
- *
- *  Copyright 2005 M. Thomas
- *  No guarantees, warrantees, or promises, implied or otherwise.
- *  May be used for hobby or commercial purposes provided copyright
- *  notice remains intact.
- */
-
-/* 
-   Warning: The enable- and disable-functions can not be used
-   in USR-mode which is the default for the Philips-examples
-   (see Startup.S). cpsr can not be written in USR-mode. 
-   If you need to enable or disable interrupts use the 
-   SWI-calls (see example SWI/swi.c/swi_handler.S). The 
-   functions can be used in SYS-mode to start the system
-   in SYS-mode the startup-code must be changed.
-
-   The macros in this file are useful if interrupt-service-routines
-   when using thumb-mode and/or optimisation without an addtional
-   "assembler-wrapper". The gcc-attribute interrupt("IRQ") does 
-   not work reliably here. See timer.c for an example implementation 
-   of an ISR that uses macros. For the gcc-port of the Philips-examples 
-   the macros are not needed, all functionality has been integrated 
-   into isr_wrapper (see Startup.S).
-*/
-
-#ifndef interrupt_utils_
-#define interrupt_utils_
-
-/* 
-   The following defines are usefull for 
-   interrupt service routine declarations.
-*/
-
-/* 
-   RAMFUNC 
-   Attribute which defines a function to be located 
-   in memory section .fastrun and called via "long calls". 
-   See linker-skript and startup-code to see how the
-   .fastrun-section is handled.
-   The definition is not only useful for ISRs but since
-   ISRs should be executed fast the macro is defined in
-   this header.
-*/
-#define RAMFUNC __attribute__ ((long_call, section (".fastrun")))
-
-
-/*
-  INTFUNC
-  standard attribute for arm-elf-gcc which marks
-  a function as ISR (for the VIC). Since gcc seems
-  to produce wrong code if this attribute is used in
-  thumb/thumb-interwork and/or activated optimisation
-  the attribute should only be used for "pure ARM-mode" 
-  binaries.
-*/
-#define INTFUNC __attribute__ ((interrupt("IRQ"))) 
-
-
-/*
-  NACKEDFUNC
-  gcc will not add any code to a function declared
-  "nacked". The user has to take care to save registers
-  and add the needed code for ISR functions. Some
-  macros for this tasks are provided below.
-*/
-#define NACKEDFUNC __attribute__((naked))
-
-
-/******************************************************************************
- *
- * MACRO Name: ISR_STORE()
- *
- * Description:
- *    This MACRO is used upon entry to an ISR with interrupt nesting.  
- *    Should be used together with ISR_ENABLE_NEST(). The MACRO
- *    performs the following steps:
- *
- *    1 - Save the non-banked registers r0-r12 and lr onto the IRQ stack.
- *
- *****************************************************************************/
-#define ISR_STORE() asm volatile( \
- "STMDB SP!,{R0-R12,LR}\n" )
- 
- /******************************************************************************
- *
- * MACRO Name: ISR_RESTORE()
- *
- * Description:
- *    This MACRO is used upon exit from an ISR with interrupt nesting.  
- *    Should be used together with ISR_DISABLE_NEST(). The MACRO
- *    performs the following steps:
- *
- *    1 - Load the non-banked registers r0-r12 and lr from the IRQ stack.
- *    2 - Adjusts resume adress
- *
- *****************************************************************************/
-#define ISR_RESTORE()  asm volatile( \
- "LDMIA SP!,{R0-R12,LR}\n" \
- "SUBS  R15,R14,#0x0004\n" ) 
-
-/******************************************************************************
- *
- * MACRO Name: ISR_ENABLE_NEST()
- *
- * Description:
- *    This MACRO is used upon entry from an ISR with interrupt nesting.  
- *    Should be used after ISR_STORE. 
- *
- *****************************************************************************/
-#define ISR_ENABLE_NEST() asm volatile( \
- "MRS     LR, SPSR \n"  \
- "STMFD   SP!, {LR} \n" \
- "MSR     CPSR_c, #0x1F \n" \
- "STMFD   SP!, {LR} " )
-
-/******************************************************************************
- *
- * MACRO Name: ISR_DISABLE_NEST()
- *
- * Description:
- *    This MACRO is used upon entry from an ISR with interrupt nesting.  
- *    Should be used before ISR_RESTORE. 
- *
- *****************************************************************************/
-#define ISR_DISABLE_NEST() asm volatile(  \
- "LDMFD   SP!, {LR} \n" \
- "MSR     CPSR_c, #0x92 \n" \
- "LDMFD   SP!, {LR} \n" \
- "MSR     SPSR_cxsf, LR \n" )
-
-
- 
-/*
- * The following marcos are from the file "armVIC.h" by:
- *
- * Copyright 2004, R O SoftWare
- * No guarantees, warrantees, or promises, implied or otherwise.
- * May be used for hobby or commercial purposes provided copyright
- * notice remains intact.
- * 
- */ 
- 
-/******************************************************************************
- *
- * MACRO Name: ISR_ENTRY()
- *
- * Description:
- *    This MACRO is used upon entry to an ISR.  The current version of
- *    the gcc compiler for ARM does not produce correct code for
- *    interrupt routines to operate properly with THUMB code.  The MACRO
- *    performs the following steps:
- *
- *    1 - Adjust address at which execution should resume after servicing
- *        ISR to compensate for IRQ entry
- *    2 - Save the non-banked registers r0-r12 and lr onto the IRQ stack.
- *    3 - Get the status of the interrupted program is in SPSR.
- *    4 - Push it onto the IRQ stack as well.
- *
- *****************************************************************************/
-#define ISR_ENTRY() asm volatile(" sub   lr, lr,#4\n" \
-                                 " stmfd sp!,{r0-r12,lr}\n" \
-                                 " mrs   r1, spsr\n" \
-                                 " stmfd sp!,{r1}")
-
-/******************************************************************************
- *
- * MACRO Name: ISR_EXIT()
- *
- * Description:
- *    This MACRO is used to exit an ISR.  The current version of the gcc
- *    compiler for ARM does not produce correct code for interrupt
- *    routines to operate properly with THUMB code.  The MACRO performs
- *    the following steps:
- *
- *    1 - Recover SPSR value from stack       
- *    2 - and restore  its value                   
- *    3 - Pop the return address & the saved general registers from
- *        the IRQ stack & return
- *
- *****************************************************************************/
-#define ISR_EXIT()  asm volatile(" ldmfd sp!,{r1}\n" \
-                                 " msr   spsr_c,r1\n" \
-                                 " ldmfd sp!,{r0-r12,pc}^") 
-  
-/******************************************************************************
- *
- * Function Name: disableIRQ()
- *
- * Description:
- *    This function sets the IRQ disable bit in the status register
- *
- * Calling Sequence: 
- *    void
- *
- * Returns:
- *    previous value of CPSR
- *
- *****************************************************************************/
-unsigned disableIRQ(void);
-
-/******************************************************************************
- *
- * Function Name: enableIRQ()
- *
- * Description:
- *    This function clears the IRQ disable bit in the status register
- *
- * Calling Sequence: 
- *    void
- *
- * Returns:
- *    previous value of CPSR
- *
- *****************************************************************************/
-unsigned enableIRQ(void);
-
-/******************************************************************************
- *
- * Function Name: restoreIRQ()
- *
- * Description:
- *    This function restores the IRQ disable bit in the status register
- *    to the value contained within passed oldCPSR
- *
- * Calling Sequence: 
- *    void
- *
- * Returns:
- *    previous value of CPSR
- *
- *****************************************************************************/
-unsigned restoreIRQ(unsigned oldCPSR);
-
-/******************************************************************************
- *
- * Function Name: disableFIQ()
- *
- * Description:
- *    This function sets the FIQ disable bit in the status register
- *
- * Calling Sequence: 
- *    void
- *
- * Returns:
- *    previous value of CPSR
- *
- *****************************************************************************/
-unsigned disableFIQ(void);
-
-/******************************************************************************
- *
- * Function Name: enableFIQ()
- *
- * Description:
- *    This function clears the FIQ disable bit in the status register
- *
- * Calling Sequence: 
- *    void
- *
- * Returns:
- *    previous value of CPSR
- *
- *****************************************************************************/
-unsigned enableFIQ(void);
-
-/******************************************************************************
- *
- * Function Name: restoreFIQ()
- *
- * Description:
- *    This function restores the FIQ disable bit in the status register
- *    to the value contained within passed oldCPSR
- *
- * Calling Sequence: 
- *    void
- *
- * Returns:
- *    previous value of CPSR
- *
- *****************************************************************************/
-unsigned restoreFIQ(unsigned oldCPSR);
-
-
-#endif
-
diff --git a/ccny_asctec_firmware_2/external/Common_WinARM/inc/irq.h b/ccny_asctec_firmware_2/external/Common_WinARM/inc/irq.h
deleted file mode 100644
index 90055a0..0000000
--- a/ccny_asctec_firmware_2/external/Common_WinARM/inc/irq.h
+++ /dev/null
@@ -1,127 +0,0 @@
-/******************************************************************************
- *   irq.h:  Interrupt related Header file for Philips LPC214x Family 
- *   Microprocessors
- *
- *   Copyright(C) 2006, Philips Semiconductor
- *   All rights reserved.
- *
- *   History
- *   2005.10.01  ver 1.00    Prelimnary version, first Release
- *
- *   21. Apr. 2006 - modified for gnu/gcc by Martin Thomas
- ******************************************************************************/
-#ifndef __IRQ_H 
-#define __IRQ_H
-
-// #define __irq __attribute__ ((interrupt("IRQ")))
-// #define __fiq __attribute__ ((interrupt("FIQ")))
-#define __irq
-#define __fiq
-
-
-/* if nested interrupt is used, NEST_INTERRUPT needs to be set to 1, otherwise 0 */
-// mthomas : macros disabled for now 
-// nesting is the default in the current arm-elf-gcc/WinARM-port
-// see Startup.S function IRQ_Wrapper
-//#define NESTED_INTERRUPT	1
-#define NESTED_INTERRUPT	0
-
-#define I_Bit			0x80
-#define F_Bit			0x40
-
-#define SYS32Mode		0x1F
-#define IRQ32Mode		0x12
-#define FIQ32Mode		0x11
-
-#define	WDT_INT			0
-#define SWI_INT			1
-#define ARM_CORE0_INT		2
-#define	ARM_CORE1_INT		3
-#define	TIMER0_INT		4
-#define TIMER1_INT		5
-#define UART0_INT		6
-#define	UART1_INT		7
-#define	PWM0_INT		8
-#define I2C0_INT		9
-#define SPI0_INT		10
-#define	SPI1_INT		11
-#define	PLL_INT			12
-#define RTC_INT			13
-#define EINT0_INT		14
-#define EINT1_INT		15
-#define EINT2_INT		16
-#define EINT3_INT		17
-#define	ADC0_INT		18
-#define I2C1_INT		19
-#define BOD_INT			20
-#define ADC1_INT		21
-#define USB_INT			22
-
-#define IRQ_SLOT_EN		0x20	/* bit 5 in Vector control register */
-#define VIC_SIZE		16
-
-#define VECT_ADDR_INDEX	0x100
-#define VECT_CNTL_INDEX 0x200
-
-/* Be aware that, from compiler to compiler, nested interrupt will have to
-be handled differently. More details can be found in Philips LPC2000
-family app-note AN10381 */
- 
-/* unlike Keil Compiler, don't save and restore registers into the stack
-in RVD as the compiler does that for you. See RVD ARM compiler Inline and
-embedded assemblers, "Rules for using __asm and asm keywords. */
-// static DWORD sysreg;		/* used as LR register */
-
-#if 0
-#if NESTED_INTERRUPT 
-#define IENABLE __asm { MRS LR, SPSR } \
-				__asm { STMFD SP!, {LR} } \
-				__asm { MSR CPSR_c, #SYS32Mode } \
-				__asm { STMFD SP!, {LR} }
-#else
-#define IENABLE ;	/* do nothing */
-#endif
-
-#if NESTED_INTERRUPT
-#define IDISABLE	__asm { LDMFD SP!, {LR} } \
-					__asm { MSR CPSR_c, #(IRQ32Mode|I_Bit) } \
-					__asm { LDMFD SP!, {LR} } \
-					__asm { MSR SPSR_cxsf, LR }
-#else
-#define IDISABLE ;	/* do nothing */
-#endif
-#endif
-
-#if NESTED_INTERRUPT 
-#warning "Macros not tested successfully with arm-elf-gcc
-#define IENABLE asm volatile( \
- "MRS     LR, SPSR \n"  \
- "STMFD   SP!, {LR} \n" \
- "MSR     CPSR_c, #0x1F \n" \
- "STMFD   SP!, {LR} " )
-#else
-#define IENABLE ;	/* do nothing */
-#endif
-
-#if NESTED_INTERRUPT
-#define IDISABLE asm volatile(  \
- "LDMFD   SP!, {LR} \n" \
- "MSR     CPSR_c, #0x92 \n" \
- "LDMFD   SP!, {LR} \n" \
- "MSR     SPSR_cxsf, LR \n" )
-#else
-#define IDISABLE ;	/* do nothing */
-#endif
-
-
-void init_VIC( void );
-unsigned long install_irq( unsigned long IntNumber, void *HandlerAddr );
-unsigned long uninstall_irq( unsigned long IntNumber );
-
-
-
-#endif /* end __IRQ_H */
-
-/******************************************************************************
-**                            End Of File
-******************************************************************************/
diff --git a/ccny_asctec_firmware_2/external/Common_WinARM/inc/swi.h b/ccny_asctec_firmware_2/external/Common_WinARM/inc/swi.h
deleted file mode 100644
index e45b292..0000000
--- a/ccny_asctec_firmware_2/external/Common_WinARM/inc/swi.h
+++ /dev/null
@@ -1,15 +0,0 @@
-#ifndef SWI_H_
-#define SWI_H_
-
-extern unsigned long IntGetCPSR(void);
-
-extern unsigned long IntDisable(void);
-extern unsigned long IntEnable(void);
-extern void IntRestore(unsigned long oldstate);
-
-extern unsigned long FiqDisable(void);
-extern unsigned long FiqEnable(void);
-extern void FiqRestore(unsigned long oldstate);
-
-#endif
-
diff --git a/ccny_asctec_firmware_2/external/Common_WinARM/inc/target.h b/ccny_asctec_firmware_2/external/Common_WinARM/inc/target.h
deleted file mode 100644
index d6267f4..0000000
--- a/ccny_asctec_firmware_2/external/Common_WinARM/inc/target.h
+++ /dev/null
@@ -1,43 +0,0 @@
-/*****************************************************************************
- *   target.h:  Header file for Philips LPC214x Family Microprocessors
- *
- *   Copyright(C) 2006, Philips Semiconductor
- *   All rights reserved.
- *
- *   History
- *   2005.10.01  ver 1.00    Prelimnary version, first Release
- *
-******************************************************************************/
-#ifndef __TARGET_H 
-#define __TARGET_H
-
-#ifdef __cplusplus
-   extern "C" {
-#endif
-
-/* System configuration: Fosc, Fcclk, Fcco, Fpclk must be defined */
-/* Crystal frequence,10MHz~25MHz should be the same as actual status. */
-#define Fosc	12000000
-
-/* System frequence,should be (1~32)multiples of Fosc,and should be equal or 
-less than 60MHz. */
-#define Fcclk	(Fosc * 5)
-
-/* CCO frequence,should be 2/4/8/16 multiples of Fcclk, ranged from 156MHz to 
-320MHz. */
-#define Fcco	(Fcclk * 4)
-
-/* VPB clock frequence , must be 1/2/4 multiples of (Fcclk / 4). */
-#define Fpclk	(Fcclk / 4) * 1
-
-extern void TargetInit(void);
-extern void TargetResetInit(void);
-
-#ifdef __cplusplus
-   }
-#endif
- 
-#endif /* end __TARGET_H */
-/******************************************************************************
-**                            End Of File
-******************************************************************************/
diff --git a/ccny_asctec_firmware_2/external/Common_WinARM/inc/timer.h b/ccny_asctec_firmware_2/external/Common_WinARM/inc/timer.h
deleted file mode 100644
index 64fb038..0000000
--- a/ccny_asctec_firmware_2/external/Common_WinARM/inc/timer.h
+++ /dev/null
@@ -1,26 +0,0 @@
-/*****************************************************************************
- *   timer.h:  Header file for Philips LPC214x Family Microprocessors
- *
- *   Copyright(C) 2006, Philips Semiconductor
- *   All rights reserved.
- *
- *   History
- *   2005.10.01  ver 1.00    Prelimnary version, first Release
- *
-******************************************************************************/
-#ifndef __TIMER_H 
-#define __TIMER_H
-
-#define INTERVAL_10MS	149999			/* 10mSec = 150.000-1 counts */
-
-extern DWORD init_timer(void);
-extern void enable_timer( BYTE timer_num );
-extern void disable_timer( BYTE timer_num );
-extern void reset_timer( BYTE timer_num );
-
-extern volatile DWORD timer_counter;
-
-#endif /* end __TIMER_H */
-/*****************************************************************************
-**                            End Of File
-******************************************************************************/
diff --git a/ccny_asctec_firmware_2/external/Common_WinARM/inc/type.h b/ccny_asctec_firmware_2/external/Common_WinARM/inc/type.h
deleted file mode 100644
index 9d991a9..0000000
--- a/ccny_asctec_firmware_2/external/Common_WinARM/inc/type.h
+++ /dev/null
@@ -1,32 +0,0 @@
-/*****************************************************************************
- *   type.h:  Type definition Header file for Philips LPC214x Family 
- *   Microprocessors
- *
- *   Copyright(C) 2006, Philips Semiconductor
- *   All rights reserved.
- *
- *   History
- *   2005.10.01  ver 1.00    Prelimnary version, first Release
- *
-******************************************************************************/
-#ifndef __TYPE_H__
-#define __TYPE_H__
-
-#ifndef NULL
-#define NULL    ((void *)0)
-#endif
-
-#ifndef FALSE
-#define FALSE   (0)
-#endif
-
-#ifndef TRUE
-#define TRUE    (1)
-#endif
-
-typedef unsigned char  BYTE;
-typedef unsigned short WORD;
-typedef unsigned long  DWORD;
-typedef unsigned int   BOOL;
-
-#endif  /* __TYPE_H__ */
diff --git a/ccny_asctec_firmware_2/external/Common_WinARM/src/Startup.S b/ccny_asctec_firmware_2/external/Common_WinARM/src/Startup.S
deleted file mode 100644
index e01c54a..0000000
--- a/ccny_asctec_firmware_2/external/Common_WinARM/src/Startup.S
+++ /dev/null
@@ -1,632 +0,0 @@
-/***********************************************************************/
-/*  This file is part of the uVision/ARM development tools             */
-/*  Copyright KEIL ELEKTRONIK GmbH 2002-2005                           */
-/***********************************************************************/
-/*                                                                     */
-/*  STARTUP.S:  Startup file for Philips LPC2000 device series         */
-/*                                                                     */
-/***********************************************************************/
-
-/* 
-   This file has been heavily modified for the GNU-Toolchain by:
-   Martin Thomas, Kaiserslautern, Germany
-   <mthomas@rhrk.uni-kl.de>
-   http://www.siwawi.arubi.uni-kl.de/avr_projects
-   
-   If it does not work for you: don't blame Keil or Philips. 
-*/
-
-/* 
-//*** <<< Use Configuration Wizard in Context Menu >>> *** 
-*/
-
-
-/*
- *  The STARTUP.S code is executed after CPU Reset. This file may be 
- *  translated with the following SET symbols. In uVision these SET 
- *  symbols are entered under Options - ASM - Set.
- *
- *  REMAP: when set the startup code initializes the register MEMMAP 
- *  which overwrites the settings of the CPU configuration pins. The 
- *  startup and interrupt vectors are remapped from:
- *     0x00000000  default setting (not remapped)
- *     0x80000000  when EXTMEM_MODE is used
- *     0x40000000  when RAM_MODE is used
- *
- *  EXTMEM_MODE: when set the device is configured for code execution
- *  from external memory starting at address 0x80000000. The startup
- *  vectors are located to 0x80000000.
- *
- *  RAM_MODE: when set the device is configured for code execution
- *  from on-chip RAM starting at address 0x40000000. The startup
- *  vectors are located to 0x40000000.
- */
-
-/* Map Preprocessor definitions to assembler definitions/symbols */
-
-.set EXTMEM_MODE, 0
-
-.set RAM_MODE, 0
-#ifdef VECTORS_IN_RAM
-.set REMAP, 1
-.set VECTREMAPPED, 1
-#else
-.set REMAP, 0
-.set VECTREMAPPED, 0
-#endif
-
-/*
-#ifdef ROM_RUN
-.set RAM_MODE, 0
-#ifdef VECTORS_IN_RAM
-.set REMAP, 1
-.set VECTREMAPPED, 1
-#else
-.set REMAP, 0
-.set VECTREMAPPED, 0
-#endif
-#endif
-*/
-
-
-#ifdef RAM_RUN
-.set RAM_MODE, 1
-.set REMAP, 1
-.set VECTREMAPPED, 0
-#endif
-
-.if (RAM_MODE)
-.print "RAM_MODE enabled"
-.else
-.print "ROM_MODE enabled"
-.endif
-
-.if (REMAP)
-.print "remapping enabled"
-.endif
-
-.if (VECTREMAPPED)
-.print "Vectors at start of RAM"
-.else
-.print "Vectors at start of Code"
-.endif
-
-
-// Standard definitions of Mode bits and Interrupt (I & F) flags in PSRs
-
-        .set Mode_USR, 0x10
-        .set Mode_FIQ, 0x11
-        .set Mode_IRQ, 0x12
-        .set Mode_SVC, 0x13
-        .set Mode_ABT, 0x17
-        .set Mode_UND, 0x1B
-        .set Mode_SYS, 0x1F
-
-        .set I_Bit, 0x80    /* when I bit is set, IRQ is disabled */
-        .set F_Bit, 0x40    /* when F bit is set, FIQ is disabled */
-
-
-/*
-// <h> Stack Configuration (Stack Sizes in Bytes)
-//   <o0> Undefined Mode      <0x0-0xFFFFFFFF:4>
-//   <o1> Supervisor Mode     <0x0-0xFFFFFFFF:4>
-//   <o2> Abort Mode          <0x0-0xFFFFFFFF:4>
-//   <o3> Fast Interrupt Mode <0x0-0xFFFFFFFF:4>
-//   <o4> Interrupt Mode      <0x0-0xFFFFFFFF:4>
-//   <o5> User/System Mode    <0x0-0xFFFFFFFF:4>
-// </h>
-*/
-        .set UND_Stack_Size, 0x00000080
-        .set SVC_Stack_Size, 0x00000800
-        .set ABT_Stack_Size, 0x00000080
-        .set FIQ_Stack_Size, 0x00000080
-        .set IRQ_Stack_Size, 0x00000080
-        .set USR_Stack_Size, 0x00001000
-
-#if 0
-AREA   STACK, DATA, READWRITE, ALIGN=2 
-        DS   (USR_Stack_Size+3)&~3  ; Stack for User/System Mode 
-        DS   (SVC_Stack_Size+3)&~3  ; Stack for Supervisor Mode
-        DS   (IRQ_Stack_Size+3)&~3  ; Stack for Interrupt Mode
-        DS   (FIQ_Stack_Size+3)&~3  ; Stack for Fast Interrupt Mode 
-        DS   (ABT_Stack_Size+3)&~3  ; Stack for Abort Mode
-        DS   (UND_Stack_Size+3)&~3  ; Stack for Undefined Mode
-#endif
-
-.arm
-.section .stack, "w"
-.align 4
-        .space (USR_Stack_Size+3)&~3  // Stack for User/System Mode 
-        .space (SVC_Stack_Size+3)&~3  // Stack for Supervisor Mode
-        .space (IRQ_Stack_Size+3)&~3  // Stack for Interrupt Mode
-        .space (FIQ_Stack_Size+3)&~3  // Stack for Fast Interrupt Mode 
-        .space (ABT_Stack_Size+3)&~3  // Stack for Abort Mode
-        .space (UND_Stack_Size+3)&~3  // Stack for Undefined Mode
-Top_Stack:
-
-
-// VPBDIV definitions
-        .set VPBDIV, 0xE01FC100  /* VPBDIV Address */
-
-/*
-// <e> VPBDIV Setup
-// <i> Peripheral Bus Clock Rate
-//   <o1.0..1>   VPBDIV: VPB Clock
-//               <0=> VPB Clock = CPU Clock / 4
-//               <1=> VPB Clock = CPU Clock
-//               <2=> VPB Clock = CPU Clock / 2
-//   <o1.4..5>   XCLKDIV: XCLK Pin
-//               <0=> XCLK Pin = CPU Clock / 4
-//               <1=> XCLK Pin = CPU Clock
-//               <2=> XCLK Pin = CPU Clock / 2
-// </e>
-*/
-        .set VPBDIV_SETUP, 1
-        .set VPBDIV_Val, 0x00000000
-
-
-// Phase Locked Loop (PLL) definitions
-        .set PLL_BASE,      0xE01FC080  /* PLL Base Address */
-        .set PLLCON_OFS,    0x00        /* PLL Control Offset*/
-        .set PLLCFG_OFS,    0x04        /* PLL Configuration Offset */
-        .set PLLSTAT_OFS,   0x08        /* PLL Status Offset */
-        .set PLLFEED_OFS,   0x0C        /* PLL Feed Offset */
-        .set PLLCON_PLLE,   (1<<0)      /* PLL Enable */
-        .set PLLCON_PLLC,   (1<<1)      /* PLL Connect */
-        .set PLLCFG_MSEL,   (0x1F<<0)   /* PLL Multiplier */
-        .set PLLCFG_PSEL,   (0x03<<5)   /* PLL Divider */
-        .set PLLSTAT_PLOCK, (1<<10)     /* PLL Lock Status */
-
-/*
-// <e> PLL Setup
-// <i> Phase Locked Loop
-// <i> CCLK - Processor Clock
-// <i> Fcco - PLL Oscillator
-//   <o1.0..4>   MSEL: PLL Multiplier Selection
-//               <1-32><#-1>
-//               <i> PLL Multiplier "M" Value
-//               <i> CCLK = M * Fosc
-//   <o1.5..6>   PSEL: PLL Divider Selection
-//               <0=> 1   <1=> 2   <2=> 4   <3=> 8
-//               <i> PLL Divider "P" Value
-//               <i> Fcco = CCLK * 2 * P
-//               <i> 156MHz <= Fcco <= 320MHz
-// </e>
-*/
-        .set PLL_SETUP,  1
-        .set PLLCFG_Val, 0x00000024
-
-
-// Memory Accelerator Module (MAM) definitions
-        .set MAM_BASE,   0xE01FC000  /* MAM Base Address */
-        .set MAMCR_OFS,  0x00        /* MAM Control Offset*/
-        .set MAMTIM_OFS, 0x04        /* MAM Timing Offset */
-
-/*
-// <e> MAM Setup
-// <i> Memory Accelerator Module
-//   <o1.0..1>   MAM Control
-//               <0=> Disabled
-//               <1=> Partially Enabled
-//               <2=> Fully Enabled
-//               <i> Mode
-//   <o2.0..2>   MAM Timing
-//               <0=> Reserved  <1=> 1   <2=> 2   <3=> 3
-//               <4=> 4         <5=> 5   <6=> 6   <7=> 7
-//               <i> Fetch Cycles
-// </e>
-*/
-        .set MAM_SETUP,    1
-        .set MAMCR_Val,    0x00000002
-        .set MAMTIM_Val,   0x00000004
-
-
-// Starupt Code must be linked first at Address at which it expects to run.
-
-.if     (EXTMEM_MODE)
-        .set CODE_BASE,  0x80000000
-.elseif (RAM_MODE)
-        .set CODE_BASE,  0x40000000
-.else
-        .set CODE_BASE,  0x00000000
-.endif
-
-#if 0
-AREA   STARTUPCODE, CODE, AT CODE_BASE   // READONLY, ALIGN=4
-       PUBLIC  __startup
-
-       EXTERN  CODE32 (?C?INIT)
-
-__startup       PROC    CODE32
-
-// Pre-defined interrupt handlers that may be directly 
-// overwritten by C interrupt functions
-EXTERN CODE32 (Undef_Handler?A)
-EXTERN CODE32 (SWI_Handler?A)
-EXTERN CODE32 (PAbt_Handler?A)
-EXTERN CODE32 (DAbt_Handler?A)
-EXTERN CODE32 (IRQ_Handler?A)
-EXTERN CODE32 (FIQ_Handler?A)
-#endif
-
-.text
-.arm
-
-.if (VECTREMAPPED)
-.print "Vectors in section .vectmapped -> .data"
-.section .vectmapped, "ax"
-.else
-.print "Vectors in section .vectorg -> .text"
-.section .vectorg, "ax"
-.endif
-
-// Pre-defined interrupt handlers that may be directly 
-// overwritten by C interrupt functions
-.extern Undef_Handler
-.extern SWI_Handler
-.extern PAbt_Handler
-.extern DAbt_Handler
-.extern IRQ_Handler
-.extern FIQ_Handler
-
-
-// Exception Vectors
-// Mapped to Address 0.
-// Absolute addressing mode must be used.
-
-__Vectors:        LDR     PC,Reset_Addr         
-                LDR     PC,Undef_Addr
-                LDR     PC,SWI_Addr
-                LDR     PC,PAbt_Addr
-                LDR     PC,DAbt_Addr
-                NOP                            /* Reserved Vector */
-//                LDR     PC,IRQ_Addr
-//                LDR     PC,[PC, #-0x0FF0]      /* Vector from VicVectAddr */
-                LDR     PC,IRQ_Wrapper_Addr
-                LDR     PC,FIQ_Addr
-
-Reset_Addr:       .word     Reset_Handler
-Undef_Addr:       .word     Undef_Handler
-// SWI_Addr:         .word     SWI_Handler
-// SWI_Wrapper_Addr: .word     SWI_Wrapper
-SWI_Addr:         .word     SoftwareInterrupt      /* in swi_handler.S */
-PAbt_Addr:        .word     PAbt_Handler
-DAbt_Addr:        .word     DAbt_Handler
-                  .word     0                      /* Reserved Address */
-// IRQ_Addr:         .word     __IRQ_Handler
-IRQ_Wrapper_Addr: .word    __IRQ_Wrapper
-FIQ_Addr:         .word     FIQ_Handler
-
-Undef_Handler:  B       Undef_Handler
-/* SWI_Handler:    B       SWI_Handler */
-PAbt_Handler:   B       PAbt_Handler
-DAbt_Handler:   B       DAbt_Handler
-/* IRQ_Handler:    B       IRQ_Handler */
-FIQ_Handler:    B       FIQ_Handler
-
-.size   __Vectors, . - __Vectors
-
-
-
-.arm
-.section .init, "ax"
-
-.if (VECTREMAPPED)
-/* mthomas: Dummy used during startup - mind the nops since the 
-   flash-utility will overwrite the "reserved vector"-address
-   with the checksum */
-				B Reset_Handler
-				NOP
-				NOP
-				NOP
-				NOP
-				NOP  /* Reserved Address */
-				NOP
-				NOP
-.endif
-
-.arm
-.section .init, "ax"
-.global __startup
-.func __startup
-__startup:
-
-Reset_Handler:  
-
-.if (VPBDIV_SETUP)
-                LDR     R0, =VPBDIV
-                LDR     R1, =VPBDIV_Val
-                STR     R1, [R0]
-.endif
-
-
-.if (PLL_SETUP)
-                LDR     R0, =PLL_BASE
-                MOV     R1, #0xAA
-                MOV     R2, #0x55
-
-// Configure and Enable PLL
-                MOV     R3, #PLLCFG_Val
-                STR     R3, [R0, #PLLCFG_OFS] 
-                MOV     R3, #PLLCON_PLLE
-                STR     R3, [R0, #PLLCON_OFS]
-                STR     R1, [R0, #PLLFEED_OFS]
-                STR     R2, [R0, #PLLFEED_OFS]
-
-// Wait until PLL Locked
-PLL_Loop:       LDR     R3, [R0, #PLLSTAT_OFS]
-                ANDS    R3, R3, #PLLSTAT_PLOCK
-                BEQ     PLL_Loop
-
-// Switch to PLL Clock
-                MOV     R3, #(PLLCON_PLLE | PLLCON_PLLC)
-                STR     R3, [R0, #PLLCON_OFS]
-                STR     R1, [R0, #PLLFEED_OFS]
-                STR     R2, [R0, #PLLFEED_OFS]
-.endif
-
-
-.if (MAM_SETUP)
-                LDR     R0, =MAM_BASE
-                MOV     R1, #MAMTIM_Val
-                STR     R1, [R0, #MAMTIM_OFS] 
-                MOV     R1, #MAMCR_Val
-                STR     R1, [R0, #MAMCR_OFS] 
-.endif
-
-
-// Memory Mapping
-                .set MEMMAP, 0xE01FC040  /* Memory Mapping Control */
-
-.if (REMAP)
-                LDR     R0, =MEMMAP
-.if     (EXTMEM_MODE)                
-                MOV     R1, #3
-.elseif (RAM_MODE) || (VECTREMAPPED)
-.print "MEMMAP to 2 on init"
-                MOV     R1, #2
-.else
-                MOV     R1, #1
-.endif
-                STR     R1, [R0]
-.endif
-
-// Setup Stack for each mode
-                LDR     R0, =Top_Stack
-
-// Enter Undefined Instruction Mode and set its Stack Pointer
-                MSR     CPSR_c, #Mode_UND|I_Bit|F_Bit
-                MOV     SP, R0
-                SUB     R0, R0, #UND_Stack_Size
-
-// Enter Abort Mode and set its Stack Pointer
-                MSR     CPSR_c, #Mode_ABT|I_Bit|F_Bit
-                MOV     SP, R0
-                SUB     R0, R0, #ABT_Stack_Size
-
-// Enter FIQ Mode and set its Stack Pointer
-                MSR     CPSR_c, #Mode_FIQ|I_Bit|F_Bit
-                MOV     SP, R0
-                SUB     R0, R0, #FIQ_Stack_Size
-
-// Enter IRQ Mode and set its Stack Pointer
-                MSR     CPSR_c, #Mode_IRQ|I_Bit|F_Bit
-                MOV     SP, R0
-                SUB     R0, R0, #IRQ_Stack_Size
-
-// Enter Supervisor Mode and set its Stack Pointer
-                MSR     CPSR_c, #Mode_SVC|I_Bit|F_Bit
-                MOV     SP, R0
-                SUB     R0, R0, #SVC_Stack_Size
-
-// Enter User Mode and set its Stack Pointer
-                MSR     CPSR_c, #Mode_USR /* Interrupts enabled */
-//				MSR     CPSR_c, #Mode_USR|I_Bit|F_Bit /* Interrupts disabled */
-                MOV     SP, R0
-
-
-.if (RAM_MODE==0)
-/* Relocate .data section (Copy from ROM to RAM) */
-                LDR     R1, =_etext 
-                LDR     R2, =_data 
-                LDR     R3, =_edata 
-                CMP     R2, R3
-                BEQ     DataIsEmpty
-LoopRel:        CMP     R2, R3 
-                LDRLO   R0, [R1], #4 
-                STRLO   R0, [R2], #4 
-                BLO     LoopRel 
-DataIsEmpty:
-.endif
- 
-/* Clear .bss section (Zero init) */
-                MOV     R0, #0 
-                LDR     R1, =__bss_start__ 
-                LDR     R2, =__bss_end__ 
-                CMP     R1,R2
-                BEQ     BSSIsEmpty
-LoopZI:         CMP     R1, R2 
-                STRLO   R0, [R1], #4 
-                BLO     LoopZI 
-BSSIsEmpty:
-
-
-// call C++ constructors of global objects
-		LDR 	r0, =__ctors_start__
-		LDR 	r1, =__ctors_end__
-ctor_loop:
-		CMP 	r0, r1
-		BEQ 	ctor_end
-		LDR 	r2, [r0], #4
-		STMFD 	sp!, {r0-r1}
-		MOV 	lr, pc
-		MOV 	pc, r2
-		LDMFD 	sp!, {r0-r1}
-		B 		ctor_loop
-ctor_end:
-
-// Enter the C code
-                //LDR     R0,=INIT
-                LDR     R0,=main
-                TST     R0,#1             // Bit-0 set: main is Thumb
-                LDREQ   LR,=__exit_ARM    // ARM Mode
-                LDRNE   LR,=__exit_THUMB  // Thumb Mode
-                BX      R0
-
-.size   __startup, . - __startup
-.endfunc
-
-.arm
-.global __exit_ARM
-.func __exit_ARM
-__exit_ARM:
-                B       __exit_ARM
-.size   __exit_ARM, . - __exit_ARM
-.endfunc
-
-.thumb
-.global __exit_THUMB
-.func __exit_THUMB
-__exit_THUMB:
-                B       __exit_THUMB
-.size   __exit_THUMB, . - __exit_THUMB
-.endfunc
-
-
-/* mthomas: the following code is inspired by various examples and
-   documents from ARM, Atmel, Anglia Designs and others */
-
-
-.text
-.arm
-
-.if (VECTREMAPPED)
-.print "Handlers in section .vectmapped -> .data"
-.section .vectmapped, "ax"
-.else
-.print "Handlers in section .vectorg -> .code/.text"
-.section .vectorg, "ax"
-.endif
-
-.set VIC_base_addr, 0xFFFFF000
-.set VIC_vect_offs, 0x30
-
-        .arm
-        .global __IRQ_Wrapper
-        .func   __IRQ_Wrapper
-__IRQ_Wrapper:
-/*- Manage Exception Entry  */
-/*- Adjust and save LR_irq in IRQ stack  */
-            sub         lr, lr, #4
-            stmfd       sp!, {lr}
-
-/*- Save SPSR need to be saved for nested interrupt */
-            mrs         r14, SPSR
-            stmfd       sp!, {r14}
-
-/*- Save and r0 in IRQ stack  */
-            stmfd       sp!, {r0}
-
-/*- Write in the IVR to support Protect Mode  */
-/*- No effect in Normal Mode  */
-/*- De-assert the NIRQ and clear the source in Protect Mode */
-/* R14 = LR */
-            ldr         r14, =VIC_base_addr
-            ldr         r0 , [r14, #VIC_vect_offs]
-            /*str         r14, [r14, #VIC_vect_offs]*/
-
-/*- Enable Interrupt and Switch in Supervisor Mode */
-            msr         CPSR_c, #I_Bit | Mode_SVC
-
-/*- Save scratch/used registers and LR in User Stack */
-            /*stmfd       sp!, { r1-r3, r12, r14}*/
-            stmfd       sp!, { r1-r12, r14 }
-
-/*- Branch to the routine pointed by the VIC-Vector-Address  */
-            mov         r14, pc
-            bx          r0
-/*- Restore scratch/used registers and LR from User Stack*/
-            /* ldmia       sp!, { r1-r3, r12, r14} */
-            ldmia       sp!, { r1-r12, r14 }
-
-/*- Disable Interrupt and switch back in IRQ mode */
-            msr         CPSR_c, #I_Bit | Mode_IRQ
-
-#if 0
-/* VICVectAddr=0 is already done in the ISRs of the Philips-Examples 
-   so commented out here */
-/*- Mark the End of Interrupt on the VIC */
-            ldr         r14, =VIC_base_addr
-            str         r14, [r14, #VIC_vect_offs]
-#endif
-
-/*- Restore SPSR_irq and r0 from IRQ stack */
-            ldmia       sp!, {r0}
-
-/*- Restore SPSR_irq and r0 from IRQ stack */
-            ldmia       sp!, {r14}
-            msr         SPSR_cxsf, r14
-
-/*- Restore adjusted  LR_irq from IRQ stack directly in the PC */
-            ldmia       sp!, {pc}^
-
-.size   __IRQ_Wrapper, . - __IRQ_Wrapper
-.endfunc
-
-
-#if 0
-/* mthomas:
-   Wrapper to call a C swi-Function declared with 
-   void SWI_Handler(int swi_num, int *regs)
-   Inspired by Anglia Designs example 
-   -- not used here - see swi_handler.S
-*/
-        .arm
-        .global __SWI_Wrapper
-        .func   __SWI_Wrapper
-__SWI_Wrapper:                       /* r0 holds swi number */
-        STMFD   sp!,{r0-r12,lr}    /* Save The workspace plus the current return */
-                                   /* address lr_ mode into the stack */
-        MRS     r1, spsr           /* Save the spsr_mode into r1 */
-        STMFD   sp!, {r1}          /* Save spsr */
-        MOV     r1, sp             /* load regs */
-        LDR     r0,=SWI_Handler    
-        MOV     lr, pc
-        BX      r0                 /* call the C-funcktion */
-        LDMFD   sp!, {r1}          /* Restore the saved spsr_mode into r1 */
-        MSR     spsr_cxsf, r1      /* Restore spsr_mode */
-        LDMFD   sp!, {r0-r12,pc}   /* Return to the instruction following */
-                                   /* the exception interrupt */
-        .size   __SWI_Wrapper, . - __SWI_Wrapper
-        .endfunc
-#endif
-
-#if 0
-/* mthomas: not used here - reminder for future tests */
-		.arm
-		.global __IRQ_Wrapper
-		.func __IRQ_Wrapper
-__IRQ_Wrapper:
-		SUB		lr, lr, #4				/* Update the link register */
-		STMFD	sp!,{r0-r12,lr}	        /* Save The workspace plus the current return */
-										/* address lr_ mode into the stack */
-		MRS		r1, spsr				/* Save the spsr_mode into r1 */
-		STMFD	sp!, {r1}				/* Save spsr */
-		LDR		lr, =ReturnAddress		/* Read the return address. */
-		LDR		r0, =VIC_base_addr      /* Load VIC Base-Address */
-		LDR		r1, [r0, #VIC_vect_offs] /* Load ISR-Address from VICVectAddr */
-		bx      r1                      /* Branch to the IRQ handler. */
-ReturnAddress:
-		LDR     r2, =VIC_base_addr      /* clear Interrupt */
-		MOV     r3, #0
-		STR     R3, [R2, #VIC_vect_offs] /* by writing to VICVectAddr */
-		LDMFD	sp!, {r1}				/* Restore the saved spsr_mode into r1 */
-		MSR		spsr_cxsf, r1			/* Restore spsr_mode */
-		LDMFD	sp!, {r0-r12,pc}^	    /* Return to the instruction following */
-										/* the exception interrupt */
-.size   __IRQ_Wrapper, . - __IRQ_Wrapper
-.endfunc
-#endif
-
-.end
-
diff --git a/ccny_asctec_firmware_2/external/Common_WinARM/src/interrupt_utils.c b/ccny_asctec_firmware_2/external/Common_WinARM/src/interrupt_utils.c
deleted file mode 100644
index 5610713..0000000
--- a/ccny_asctec_firmware_2/external/Common_WinARM/src/interrupt_utils.c
+++ /dev/null
@@ -1,84 +0,0 @@
-/******************************************************************************
- *
- * $RCSfile: $
- * $Revision: $
- *
- * This module provides the interface routines for setting up and
- * controlling the various interrupt modes present on the ARM processor.
- * Copyright 2004, R O SoftWare
- * No guarantees, warrantees, or promises, implied or otherwise.
- * May be used for hobby or commercial purposes provided copyright
- * notice remains intact.
- *
- *****************************************************************************/
-#include "interrupt_utils.h"
-
-#define IRQ_MASK 0x00000080
-#define FIQ_MASK 0x00000040
-#define INT_MASK (IRQ_MASK | FIQ_MASK)
-
-static inline unsigned __get_cpsr(void)
-{
-  unsigned long retval;
-  asm volatile (" mrs  %0, cpsr" : "=r" (retval) : /* no inputs */  );
-  return retval;
-}
-
-static inline void __set_cpsr(unsigned val)
-{
-  asm volatile (" msr  cpsr, %0" : /* no outputs */ : "r" (val)  );
-}
-
-unsigned disableIRQ(void)
-{
-  unsigned _cpsr;
-
-  _cpsr = __get_cpsr();
-  __set_cpsr(_cpsr | IRQ_MASK);
-  return _cpsr;
-}
-
-unsigned restoreIRQ(unsigned oldCPSR)
-{
-  unsigned _cpsr;
-
-  _cpsr = __get_cpsr();
-  __set_cpsr((_cpsr & ~IRQ_MASK) | (oldCPSR & IRQ_MASK));
-  return _cpsr;
-}
-
-unsigned enableIRQ(void)
-{
-  unsigned _cpsr;
-
-  _cpsr = __get_cpsr();
-  __set_cpsr(_cpsr & ~IRQ_MASK);
-  return _cpsr;
-}
-
-unsigned disableFIQ(void)
-{
-  unsigned _cpsr;
-
-  _cpsr = __get_cpsr();
-  __set_cpsr(_cpsr | FIQ_MASK);
-  return _cpsr;
-}
-
-unsigned restoreFIQ(unsigned oldCPSR)
-{
-  unsigned _cpsr;
-
-  _cpsr = __get_cpsr();
-  __set_cpsr((_cpsr & ~FIQ_MASK) | (oldCPSR & FIQ_MASK));
-  return _cpsr;
-}
-
-unsigned enableFIQ(void)
-{
-  unsigned _cpsr;
-
-  _cpsr = __get_cpsr();
-  __set_cpsr(_cpsr & ~FIQ_MASK);
-  return _cpsr;
-}
diff --git a/ccny_asctec_firmware_2/external/Common_WinARM/src/irq.c b/ccny_asctec_firmware_2/external/Common_WinARM/src/irq.c
deleted file mode 100644
index 1abb0bd..0000000
--- a/ccny_asctec_firmware_2/external/Common_WinARM/src/irq.c
+++ /dev/null
@@ -1,169 +0,0 @@
-/*****************************************************************************
- *   irq.c: Interrupt handler C file for Philips LPC214x Family Microprocessors
- *
- *   Copyright(C) 2006, Philips Semiconductor
- *   All rights reserved.
- *
- *   History
- *   2005.10.01  ver 1.00    Prelimnary version, first Release
- *
-******************************************************************************/
-#include "LPC214x.h"			/* LPC23XX Peripheral Registers	*/
-#include "irq.h"
-
-#ifndef NULL
-#define NULL    ((void *)0)
-#endif
-
-#ifndef FALSE
-#define FALSE   (0)
-#endif
-
-#ifndef TRUE
-#define TRUE    (1)
-#endif
-
-
-/******************************************************************************
-** Function name:		DefaultVICHandler
-**
-** Descriptions:		Default VIC interrupt handler.
-**				This handler is set to deal with spurious 
-**				interrupt.
-**				If the IRQ service routine reads the VIC
-**				address register, and no IRQ slot responses
-**				as described above, this address is returned.
-** parameters:			None
-** Returned value:		None
-** 
-******************************************************************************/
-// mthomas: inserted static to avoid gcc-warning
-static void DefaultVICHandler (void) __irq 
-{
-    /* if the IRQ is not installed into the VIC, and interrupt occurs, the
-    default interrupt VIC address will be used. This could happen in a race 
-    condition. For debugging, use this endless loop to trace back. */
-    /* For more details, see Philips appnote AN10414 */
-    VICVectAddr = 0;		/* Acknowledge Interrupt */ 
-    while ( 1 );
-}
-
-/* Initialize the interrupt controller */
-/******************************************************************************
-** Function name:		init_VIC
-**
-** Descriptions:		Initialize VIC interrupt controller.
-** parameters:			None
-** Returned value:		None
-** 
-******************************************************************************/
-void init_VIC(void) 
-{
-    unsigned long i = 0;
-    unsigned long *vect_addr, *vect_cntl;
-   	
-    /* initialize VIC*/
-    VICIntEnClr = 0xffffffff;
-    VICVectAddr = 0;
-    VICIntSelect = 0;
-
-    /* set all the vector and vector control register to 0 */
-    for ( i = 0; i < VIC_SIZE; i++ )
-    {
-	vect_addr = (unsigned long *)(VIC_BASE_ADDR + VECT_ADDR_INDEX + i*4);
-	vect_cntl = (unsigned long *)(VIC_BASE_ADDR + VECT_CNTL_INDEX + i*4);
-	*vect_addr = 0;	
-	*vect_cntl = 0;
-    }
-
-    /* Install the default VIC handler here */
-    VICDefVectAddr = (unsigned long)DefaultVICHandler;   
-    return;
-}
-
-/******************************************************************************
-** Function name:		install_irq
-**
-** Descriptions:		Install interrupt handler
-**				The max VIC size is 16, but, there are 32 interrupt
-**				request inputs. Not all of them can be installed into
-**				VIC table at the same time.
-**				The order of the interrupt request installation is
-**				first come first serve.
-** parameters:			Interrupt number and interrupt handler address
-** Returned value:		true or false, when the table is full, return false
-** 
-******************************************************************************/
-unsigned long install_irq( unsigned long IntNumber, void *HandlerAddr )
-{
-    unsigned long i;
-    unsigned long *vect_addr;
-    unsigned long *vect_cntl;
-      
-    VICIntEnClr = 1 << IntNumber;	/* Disable Interrupt */
-    
-    for ( i = 0; i < VIC_SIZE; i++ )
-    {
-	/* find first un-assigned VIC address for the handler */
-
-	vect_addr = (unsigned long *)(VIC_BASE_ADDR + VECT_ADDR_INDEX + i*4);
-	vect_cntl = (unsigned long *)(VIC_BASE_ADDR + VECT_CNTL_INDEX + i*4);
-	if ( *vect_addr == (unsigned long)NULL )
-	{
-	    *vect_addr = (unsigned long)HandlerAddr;	/* set interrupt vector */
-	    *vect_cntl = (unsigned long)(IRQ_SLOT_EN | IntNumber);
-	    break;
-	}
-    }
-    if ( i == VIC_SIZE )
-    {
-	return( FALSE );		/* fatal error, can't find empty vector slot */
-    }
-    VICIntEnable = 1 << IntNumber;	/* Enable Interrupt */
-    return( TRUE );
-}
-
-/******************************************************************************
-** Function name:		uninstall_irq
-**
-** Descriptions:		Uninstall interrupt handler
-**				Find the interrupt handler installed in the VIC
-**				based on the interrupt number, set the location
-**				back to NULL to uninstall it.
-** parameters:			Interrupt number
-** Returned value:		true or false, when the interrupt number is not found, 
-**				return false
-** 
-******************************************************************************/
-unsigned long uninstall_irq( unsigned long IntNumber )
-{
-    unsigned long i;
-    unsigned long *vect_addr;
-    unsigned long *vect_cntl;
-      
-    VICIntEnClr = 1 << IntNumber;	/* Disable Interrupt */
-    
-    for ( i = 0; i < VIC_SIZE; i++ )
-    {
-	/* find first un-assigned VIC address for the handler */
-	vect_addr = (unsigned long *)(VIC_BASE_ADDR + VECT_ADDR_INDEX + i*4);
-	vect_cntl = (unsigned long *)(VIC_BASE_ADDR + VECT_CNTL_INDEX + i*4);
-	if ( (*vect_cntl & ~IRQ_SLOT_EN ) == IntNumber )
-	{
-	    *vect_addr = (unsigned long)NULL;	/* clear the VIC entry in the VIC table */
-	    *vect_cntl &= ~IRQ_SLOT_EN;	/* disable SLOT_EN bit */	
-	    break;
-	}
-    }
-    if ( i == VIC_SIZE )
-    {
-	return( FALSE );		/* fatal error, can't find interrupt number 
-					in vector slot */
-    }
-    VICIntEnable = 1 << IntNumber;	/* Enable Interrupt */
-    return( TRUE );
-}
-
-/******************************************************************************
-**                            End Of File
-******************************************************************************/
diff --git a/ccny_asctec_firmware_2/external/Common_WinARM/src/swi_handler.S b/ccny_asctec_firmware_2/external/Common_WinARM/src/swi_handler.S
deleted file mode 100644
index 1fa1f76..0000000
--- a/ccny_asctec_firmware_2/external/Common_WinARM/src/swi_handler.S
+++ /dev/null
@@ -1,280 +0,0 @@
-/*****************************************************************************
-*   swi_handler.s: SWI handler file ARM7TDMI-(S) (not just LPC2000)
-*
-*   by Martin Thomas 
-*   http://www.siwawi.arubi.uni-kl.de/avr_projects
-*   based on information from ARM documents
-*
-*   (I think there is nothing left from the Philips example-code beside
-*   of the filename and some comments.)
-*
-*****************************************************************************/
-
-.set SWI_IRQ_DIS,	0
-.set SWI_IRQ_EN,	1
-.set SWI_FIQ_DIS,	2
-.set SWI_FIQ_EN,	3
-.set SWI_GET_CPSR,	4
-.set SWI_IRQ_REST,	5
-.set SWI_FIQ_REST,	6
-
-.set I_Bit, 0x80
-.set F_Bit, 0x40
-.set T_Bit, 0x20
-
-
-#ifdef ROM_RUN
-#ifdef VECTORS_IN_RAM
-.set VECTREMAPPED, 1
-#else
-.set VECTREMAPPED, 0
-#endif
-#endif
-
-#ifdef RAM_RUN
-.set VECTREMAPPED, 0
-#endif
-
-  
-/*********************************************************************
-*  SWI interrupt handler                                             
-*  Function :  SoftwareInterrupt(SWI_Number)                         
-*              See below "SwiFunction" table                         
-*  Parameters:    None                                               
-*  input  :       SWI_Number (extracted from SWI command automaticly)
-*  output :       states for some SWIs - see below
-**********************************************************************/
-.text
-.arm
-
-.print "SWI-Handler in section .vectorg -> .code/.text"
-.section .vectorg, "ax"
-
-/*
-.if (VECTREMAPPED)
-.print "SWI-Handler in section .vectmapped -> .data"
-.section .vectmapped, "ax"
-.else
-.print "SWI-Handler in section .vectorg -> .code/.text"
-.section .vectorg, "ax"
-.endif
-*/
-
-.global SoftwareInterrupt
-.func   SoftwareInterrupt
-SoftwareInterrupt:
-SWI_HandlerMT:
-	STMFD   sp!, {r4, lr}      /* store regs. */
-	MRS     r4, spsr
-	TST     r4, #T_Bit             /* test for thumb */
-	LDRNEH  r4, [lr, #-2]          /* NE->thumb - get swi instruction code */
-	BICNE   r4, r4, #0xff00        /* NE->thumb - clear top 8 bits leaving swi "comment field"=number */
-	LDREQ   r4, [lr, #-4]          /* EQ->arm - get swi instruction code */
-	BICEQ   r4, r4, #0xff000000    /* EQ->arm - clear top 8 bits leaving swi "comment field"=number */
-	CMP     r4, #MAX_SWI           /* range-check */
-	LDRLS   pc, [pc, r4, LSL #2]   /* jump to routine if <= MAX (LS) */
-SWIOutOfRange:
-	B       SWIOutOfRange
-
-/* Jump-Table */
-SwiTableStart:
-	.word IRQDisable	// 0
-	.word IRQEnable		// 1
-	.word FIQDisable	// 2
-	.word FIQEnable		// 3
-	.word CPSRget		// 4
-	.word IRQRestore	// 5
-	.word FIQRestore	// 6
-SwiTableEnd:
-.set MAX_SWI, ((SwiTableEnd-SwiTableStart)/4)-1
-
-IRQDisable:
-	MRS     r0, SPSR                        /* Get SPSR = return value */
-	ORR     r4, r0, #I_Bit                  /* I_Bit set */
-	MSR     SPSR_c, r4                      /* Set SPSR */
-	B       EndofSWI
-
-IRQEnable:
-	MRS     r0, SPSR                        /* Get SPSR = return value */
-	BIC     r4, r0, #I_Bit                  /* I_Bit clear */
-	MSR     SPSR_c, r4                      /* Set SPSR */
-	B       EndofSWI                       
-
-FIQDisable:
-	MRS     r0, SPSR
-	ORR     r4, r0, #F_Bit
-	AND     r0, r0, #F_Bit
-	MSR     SPSR_c, r4
-	B       EndofSWI
-
-FIQEnable:
-	MRS     r0, SPSR
-	BIC     r4, r0, #F_Bit
-	AND     r0, r0, #F_Bit
-	MSR     SPSR_c, r4
-	B       EndofSWI
-
-CPSRget:
-	// LDR r0, =0xdeadbeef
-	MRS     r0, SPSR                        /* Get SPSR */
-	B       EndofSWI                       
-
-IRQRestore:
-	MRS     r4, SPSR                        /* Get SPSR */
-	AND     r0, r0, #I_Bit
-	TST     r0, #I_Bit             /* Test input for I_Bit */
-	BICEQ   r4, r4, #I_Bit
-	ORRNE   r4, r4, #I_Bit
-	MSR     SPSR_c, r4
-	B       EndofSWI
-
-FIQRestore:
-	MRS     r4, SPSR                        /* Get SPSR */
-	AND     r0, r0, #F_Bit
-	TST     r0, #F_Bit             /* Test input for F_Bit */
-	BICEQ   r4, r4, #F_Bit
-	ORRNE   r4, r4, #F_Bit
-	MSR     SPSR_c, r4
-	B       EndofSWI
-
-EndofSWI:
-	LDMFD   sp!, {r4,pc}^
-.endfunc
-
-
-/**********************************************************************
- *  Call SWI to restore IRQ
- *  Function : void IntEnable(uint32_t)
- *  Parameters:      None
- *  input  :         newstate
- *                   if I_bit in newstate cleared->IRQ on  -> clear I_BIT
- *                   if I_bit in newstate set    ->IRQ off -> set I_Bit
- *  output :         None
- **********************************************************************/
-.arm
-.text
-.section .text, "ax"
-.global IntRestore
-.func   IntRestore
-IntRestore:
-		SWI     SWI_IRQ_REST
-		BX      lr
-.endfunc
-
-/**********************************************************************
- *  Call SWI to restore FIQ
- *  Function : void IntEnable(uint32_t)
- *  Parameters:      None
- *  input  :         newstate
- *                   if F_bit in newstate cleared->FIQ on  -> clear F_BIT
- *                   if F_bit in newstate set    ->FIQ off -> set F_Bit
- *  output :         None
- **********************************************************************/
-.arm
-.text
-.section .text, "ax"
-.global FiqRestore
-.func   FiqRestore
-FiqRestore:
-		SWI     SWI_FIQ_REST
-		BX      lr
-.endfunc
-
-/**********************************************************************
- *  Call SWI to read IRQ/FIQ-status
- *  Function : uint32_t IntEnable(void)
- *  Parameters:      None
- *  input  :         None
- *  output :         CPSR (SPSR_SVC)
- **********************************************************************/
-.arm
-.text
-.section .text, "ax"
-.global IntGetCPSR
-.func   IntGetCPSR
-IntGetCPSR:
-		SWI     SWI_GET_CPSR
-		BX      lr
-.endfunc
-
-/**********************************************************************
- *  Call SWI to enable IRQ
- *  Function : uint32_t IntEnable(void)
- *  Parameters:      None
- *  input  :         None
- *  output :         previous status
- *                   I_Bit clear if IRQs were enabled
- *                   I_Bit set   if IRQs were disabled
- **********************************************************************/
-.arm
-.text
-.section .text, "ax"
-.global IntEnable
-.func   IntEnable
-IntEnable:
-        SWI     SWI_IRQ_EN
-        BX      lr
-.endfunc /* end of IntEnable */
-
-/**********************************************************************
- *  Call SWI to disable IRQ
- *  Function : uint32_t IntDisable(void)
- *  Parameters     : None
- *  input          : None
- *  output :         previous status
- *                   I_Bit clear if IRQs were enabled
- *                   I_Bit set   if IRQs were disabled
- **********************************************************************/
-.arm
-.global IntDisable
-.section .text, "ax"
-.func   IntDisable
-IntDisable:
-        SWI     SWI_IRQ_DIS
-        BX      lr
-.endfunc /* end of IntDisable */
-
-/**********************************************************************
- *  Call SWI to enable FIQ
- *  Function : uint32_t FiqEnable(void)
- *  Parameters:      None
- *  input  :         None
- *  output :         previous status
- *                   F_Bit clear if FIQs were enabled
- *                   F_Bit set   if FIQs were disabled
- **********************************************************************/
-.arm
-.text
-.section .text, "ax"
-.global FiqEnable
-.func   FiqEnable
-FiqEnable:
-        SWI     SWI_FIQ_EN
-        BX      lr
-.endfunc
-
-/**********************************************************************
- *  Call SWI to disable FIQ
- *  Function : uint32_t FiqDisable(void)
- *  Parameters     : None
- *  input          : None
- *  output :         previous status
- *                   F_Bit clear if FIQs were enabled
- *                   F_Bit set   if FIQs were disabled
- **********************************************************************/
-.arm
-.global FiqDisable
-.section .text, "ax"
-.func   FiqDisable
-FiqDisable:
-        SWI     SWI_FIQ_DIS
-        BX      lr
-.endfunc
-
-
-.end
-
-/*************************************************************************
-**                            End Of File
-**************************************************************************/
-
diff --git a/ccny_asctec_firmware_2/external/Common_WinARM/src/target.c b/ccny_asctec_firmware_2/external/Common_WinARM/src/target.c
deleted file mode 100644
index 4293938..0000000
--- a/ccny_asctec_firmware_2/external/Common_WinARM/src/target.c
+++ /dev/null
@@ -1,138 +0,0 @@
-/*****************************************************************************
- *   target.c:  Target C file for Philips LPC214x Family Microprocessors
- *
- *   Copyright(C) 2006, Philips Semiconductor
- *   All rights reserved.
- *
- *   History
- *   2005.10.01  ver 1.00    Prelimnary version, first Release
- *
-*****************************************************************************/
-
-#include "LPC214x.h"
-#include "type.h"
-#include "irq.h"
-#include "target.h"
-
-/*****************************************************************************
-** Function name:		IRQ_Exception
-**
-** Descriptions:		interrupt exceptional handler , change it as needed
-**
-** parameters:			None
-** Returned value:		None
-** 
-*****************************************************************************/
-void IRQ_Exception(void) __irq;
-void IRQ_Exception(void) __irq  
-{
-    while(1);                   /*  change it to your code */
-}
-
-/*****************************************************************************
-** Function name:		FIQ_Exception
-**
-** Descriptions:		Fast interrupt exceptional handler , change it as needed
-**
-** parameters:			None
-** Returned value:		None
-**
-******************************************************************************/
-void FIQ_Exception(void) __fiq;
-void FIQ_Exception(void) __fiq 
-{
-    while(1);                   /* change it to your code */
-}
-
-/******************************************************************************
-** Function name:		TargetInit
-**
-** Descriptions:		Initialize the target board; it is called in a necessary 
-**				place, change it as needed
-**
-** parameters:			None
-** Returned value:		None
-** 
-******************************************************************************/
-void TargetInit(void)
-{
-    /* Add your codes here */
-}
-
-/******************************************************************************
-** Function name:		TargetResetInit
-**
-** Descriptions:		Initialize the target board before running the main() 
-**				function; User may change it as needed, but may not 
-**				deleted it.
-**
-** parameters:			None
-** Returned value:		None
-** 
-******************************************************************************/
-/* mthomas: all reset-initialisation is done in startup.S */
-void TargetResetInit(void)
-{
-#ifdef __DEBUG_RAM    
-    MEMMAP = 0x2;                   /* set remap register */
-#endif
-
-#ifdef __DEBUG_FLASH    
-    MEMMAP = 0x1;                   /* set remap register */
-#endif
-
-#ifdef __IN_CHIP    
-    MEMMAP = 0x1;                   /* set remap register */
-#endif
-
-    /* Set system timers for each component */
-    PLLCON = 1;
-#if (Fpclk / (Fcclk / 4)) == 1
-    VPBDIV = 0;
-#endif
-#if (Fpclk / (Fcclk / 4)) == 2
-    VPBDIV = 2;
-#endif
-#if (Fpclk / (Fcclk / 4)) == 4
-    VPBDIV = 1;
-#endif
-
-#if (Fcco / Fcclk) == 2
-    PLLCFG = ((Fcclk / Fosc) - 1) | (0 << 5);
-#endif
-#if (Fcco / Fcclk) == 4
-    PLLCFG = ((Fcclk / Fosc) - 1) | (1 << 5);
-#endif
-#if (Fcco / Fcclk) == 8
-    PLLCFG = ((Fcclk / Fosc) - 1) | (2 << 5);
-#endif
-#if (Fcco / Fcclk) == 16
-    PLLCFG = ((Fcclk / Fosc) - 1) | (3 << 5);
-#endif
-    PLLFEED = 0xaa;
-    PLLFEED = 0x55;
-    while((PLLSTAT & (1 << 10)) == 0);
-    PLLCON = 3;
-    PLLFEED = 0xaa;
-    PLLFEED = 0x55;
-    
-    /* Set memory accelerater module*/
-    MAMCR = 0;
-#if Fcclk < 20000000
-    MAMTIM = 1;
-#else
-#if Fcclk < 40000000
-    MAMTIM = 2;
-#else
-    MAMTIM = 3;
-#endif
-#endif
-    MAMCR = 2;
-    
-    /* Add your codes here */
-    return;
-}
-
-/******************************************************************************
-**                            End Of File
-******************************************************************************/
diff --git a/ccny_asctec_firmware_2/external/Common_WinARM/src/timer.c b/ccny_asctec_firmware_2/external/Common_WinARM/src/timer.c
deleted file mode 100644
index 6e55d57..0000000
--- a/ccny_asctec_firmware_2/external/Common_WinARM/src/timer.c
+++ /dev/null
@@ -1,158 +0,0 @@
-/*****************************************************************************
- *   timer.c:  Timer C file for Philips LPC214x Family Microprocessors
- *
- *   Copyright(C) 2006, Philips Semiconductor
- *   All rights reserved.
- *
- *   History
- *   2005.10.01  ver 1.00    Prelimnary version, first Release
- *
-******************************************************************************/
-#include "LPC214x.h"		/* LPC21XX Peripheral Registers	*/
-#include "type.h"
-#include "irq.h"
-#include "timer.h"
-
-#include "interrupt_utils.h"
-
-volatile DWORD timer_counter = 0;
-
-/******************************************************************************
-** Function name:		Timer0Handler
-**
-** Descriptions:		Timer/Counter 0 interrupt handler
-**				executes each 10ms @ 60 MHz CPU Clock
-**
-** parameters:			None
-** Returned value:		None
-** 
-******************************************************************************/
-// mthomas: static inserted to avoid warning by gcc 4.1.0
-#if 1
-static void /*RAMFUNC*/ Timer0Handler (void) __irq
-{  
-    T0IR = 1;			/* clear interrupt flag */
-    IENABLE;			/* handles nested interrupt */
-
-    timer_counter++;
-
-    IDISABLE;
-    VICVectAddr = 0;		/* Acknowledge Interrupt */
-}
-#endif
-
-#if 0
-// mthomas: macro-approach - not needed since there
-// is an assembler-wrapper provided in Startup.S
-static void NACKEDFUNC Timer0Handler (void) __irq
-{  
-	ISR_STORE();
-    T0IR = 1;			/* clear interrupt flag */
-	ISR_ENABLE_NEST();  /* handles nested interrupt */
-
-    timer_counter++;
-
-	ISR_DISABLE_NEST();     /* Disable Interrupt nesting */
-    VICVectAddr = 0;		/* Acknowledge Interrupt */
-	ISR_RESTORE();
-}
-#endif
-
-/******************************************************************************
-** Function name:		enable_timer
-**
-** Descriptions:		Enable timer
-**
-** parameters:			timer number: 0 or 1
-** Returned value:		None
-** 
-******************************************************************************/
-void enable_timer( BYTE timer_num )
-{
-    if ( timer_num == 0 )
-    {
-	T0TCR = 1;
-    }
-    else
-    {
-	T1TCR = 1;
-    }
-    return;
-}
-
-/******************************************************************************
-** Function name:		disable_timer
-**
-** Descriptions:		Disable timer
-**
-** parameters:			timer number: 0 or 1
-** Returned value:		None
-** 
-******************************************************************************/
-void disable_timer( BYTE timer_num )
-{
-    if ( timer_num == 0 )
-    {
-	T0TCR = 0;
-    }
-    else
-    {
-	T1TCR = 0;
-    }
-    return;
-}
-
-/******************************************************************************
-** Function name:		reset_timer
-**
-** Descriptions:		Reset timer
-**
-** parameters:			timer number: 0 or 1
-** Returned value:		None
-** 
-******************************************************************************/
-void reset_timer( BYTE timer_num )
-{
-    DWORD regVal;
-
-    if ( timer_num == 0 )
-    {
-	regVal = T0TCR;
-	regVal |= 0x02;
-	T0TCR = regVal;
-    }
-    else
-    {
-	regVal = T1TCR;
-	regVal |= 0x02;
-	T1TCR = regVal;
-    }
-    return;
-}
-
-/******************************************************************************
-** Function name:		init_timer
-**
-** Descriptions:		Initialize timer, set timer interval, reset timer,
-**				install timer interrupt handler
-**
-** parameters:			None
-** Returned value:		true or false, if the interrupt handler can't be
-**				installed, return false.
-** 
-******************************************************************************/
-DWORD init_timer (void) 
-{
-    timer_counter = 0;
-    T0MR0 = INTERVAL_10MS;	/* 10mSec = 150.000-1 counts */
-    T0MCR = 3;			/* Interrupt and Reset on MR0 */
-    if ( install_irq( TIMER0_INT, (void *)Timer0Handler ) == FALSE )
-    {
-	return (FALSE);
-    }
-    else
-    {
-	return (TRUE);
-    }
-}
-
diff --git a/ccny_asctec_firmware_2/include/ccny_asctec_firmware/LL_HL_comm.h b/ccny_asctec_firmware_2/include/ccny_asctec_firmware/LL_HL_comm.h
deleted file mode 100644
index 94ee721..0000000
--- a/ccny_asctec_firmware_2/include/ccny_asctec_firmware/LL_HL_comm.h
+++ /dev/null
@@ -1,327 +0,0 @@
-/*
-
-Copyright (c) 2011, Ascending Technologies GmbH
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
- * Redistributions of source code must retain the above copyright notice,
-   this list of conditions and the following disclaimer.
- * Redistributions in binary form must reproduce the above copyright
-   notice, this list of conditions and the following disclaimer in the
-   documentation and/or other materials provided with the distribution.
-
-THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND ANY
-EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY
-DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
-OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
-DAMAGE.
-
- */
-
-#ifndef LL_HL_COMM_
-#define LL_HL_COMM_
-
-//system flags
-#define SF_PAGE_BIT1 						0x01
-#define SF_PAGE_BIT2 						0x02
-#define SF_SSP_ACK							0x04
-#define SF_GPS_NEW							0x08
-#define SF_HL_CONTROL_ENABLED 				0x10
-#define SF_DIRECT_MOTOR_CONTROL 			0x20
-#define SF_WAYPOINT_MODE					0x40
-#define SF_DIRECT_MOTOR_CONTROL_INDIVIDUAL	0x80
-#define SF_SDK_DISABLE_MOTORONOFF_BY_STICK	0x100
-#define SF_NEW_SDK							0x8000
-
-
-//ctrl_flags
-//scientific control
-#define HL_CTRL_PITCH			0x01
-#define HL_CTRL_ROLL			0x02
-#define HL_CTRL_YAW 			0x04
-#define HL_CTRL_THRUST			0x08
-#define HL_CTRL_HEIGHT_ENABLED	0x10
-#define HL_CTRL_GPS_ENABLED		0x20
-
-//direct motor control
-#define HL_CTRL_MOTORS_ONOFF_BY_RC	0x01
-
-
-#define WP_CMD_SINGLE_WP_PART1 	0x81 //internal use!
-#define WP_CMD_SINGLE_WP_PART2 	0x82 //internal use!
-
-//Slow Data Channel defines
-//declination data [short]
-#define SDC_DECLINATION 		0x01
-//declination data [short]
-#define SDC_INCLINATION 		0x12
-
-//Slow Data Up Channel defines
-#define SUDC_NONE				0x00
-//flight time. flighttime in slowDataUpChannelShort
-#define SUDC_FLIGHTTIME			0x01
-//set camera type. Cameratype in slowDataUpChannelShort
-#define SUDC_SETCAMERA			0x02
-//set payload options. payloadoptions in slowDataUpChannelShort
-#define SUDC_SETPAYLOADOPTIONS	0x03
-//set camera mount roll angle calibration
-#define SUDC_SETCAMERAROLLANGLECALIB 0x04
-//set camera mount roll angle calibration and store to eeprom
-#define SUDC_SETCAMERAROLLANGLECALIBANDSTORE 0x05
-//navigation status
-#define SUDC_NAVSTATUS 0x06
-//distance to waypoint
-#define SUDC_DISTTOWP  0x07
-//waypoint ack trigger
-#define SUDC_WPACKTRIGGER 0x08
-
-void LL_write_ctrl_data(char);
-int HL2LL_write_cycle(void);
-inline void SSP_rx_handler_HL(unsigned char);
-inline void SSP_data_distribution_HL(void);
-struct LL_ATTITUDE_DATA
-{
-	unsigned short system_flags;	//GPS data acknowledge, etc.
-
-	short angle_pitch;	//angles [deg*100]
-	short angle_roll;
-	unsigned short angle_yaw;
-
-	short angvel_pitch;	//angular velocities; bias-free [0.015°/s]
-	short angvel_roll;
-	short angvel_yaw;
-
-				//<-- 14 bytes @ 1kHz
-				//--> 3x 26 bytes @ 333 Hz
-				//=> total = 40 bytes @ 1 kHz
-//-----------------------------PAGE0
-	unsigned char RC_data[10];	//8 channels @ 10 bit
-
-	int latitude_best_estimate;	//GPS data fused with all other sensors
-	int longitude_best_estimate;
-	short acc_x;		//accelerations [mg]
-	short acc_y;
-	short acc_z;
-
-	unsigned short temp_gyro;
-//-----------------------------PAGE1
-	unsigned char motor_data[16];	//speed 0..7, PWM 0..7
-
-	short speed_x_best_estimate;
-	short speed_y_best_estimate;
-	int height;		//height [mm]
-	short dheight;		//differentiated height[mm/s]
-//------------------------------PAGE2
-	short mag_x;
-	short mag_y;
-	short mag_z;
-
-	short cam_angle_pitch;
-	short cam_angle_roll;
-	short cam_status;
-
-	short battery_voltage1;
-	short battery_voltage2;
-	short flightMode;
-	short slowDataUpChannelDataShort; //former flight_time
-	short cpu_load;
-	short status;
-	short status2; //Bits 7..1: slowDataUpChannelSelect (7bit) Bit0:flying Bit15..8:active Motors
-
-};
-
-extern struct LL_ATTITUDE_DATA LL_1khz_attitude_data;
-
-struct LL_CONTROL_INPUT
-{
-	unsigned short system_flags;
-							//bit 0: page_select
-							//bit 1: reserved (page_select)
-							//bit 2: SSP_ack
-							//bit 3: GPS new
-							//bit 4: HL controller enabled
-							//bit 5: 0 -> "scientific" commands
-							//       1 -> direct motor commands
-							//bit 6: waypoint mode
-
-	unsigned short ctrl_flags;
-							//bit 0..3:
-							// pitch, roll, yaw, thrust enable bits
-							//bit 4: height control enabled
-							//bit 5: GPS_control enabled
-							//bit 8..15: waypoint command if waypoint mode is active or POI options if POI mode is active
-
-	short pitch, roll, yaw, thrust; 		//"scientific interface"
-	unsigned char direct_motor_control[8];		//direct motor commands: pitch, roll, yaw, throttle, 4xDNC
-							//or motor 0..7 (Falcon)
-
-							//<-- 20 bytes @ 1kHz
-							//--> 2x18 bytes @ 500 Hz
-							//=> total = 38 bytes @ 1kHz
-
-	int latitude;					//data received from GPS-unit
-	int longitude;
-	int height;
-	short speed_x;
-	short speed_y;
-	short status;
-//-----------------------------
-
-	unsigned short hor_accuracy;
-	unsigned short vert_accuracy;
-	unsigned short speed_accuracy;
-	unsigned short numSV;
-	unsigned short heading;
-	short battery_voltage_1, battery_voltage_2; 	//battery voltage read by HL-ADC [mV]
-	unsigned char slowDataChannelSelect; // these three vars define a slow data transfer channel. the select byte defines which data is in the data channel
-	unsigned char slowDataChannelDataChar;
-	short slowDataChannelDataShort;
-};
-extern struct LL_CONTROL_INPUT LL_1khz_control_input;
-
-
-
-#endif /*LL_HL_COMM_*/
-
-
-
-/* old file
-#ifndef LL_HL_COMM_
-#define LL_HL_COMM_
-
-//system flags
-#define SF_PAGE_BIT1 				0x01
-#define SF_PAGE_BIT2 				0x02
-#define SF_SSP_ACK					0x04
-#define SF_GPS_NEW					0x08
-#define SF_HL_CONTROL_ENABLED 		0x10
-#define SF_DIRECT_MOTOR_CONTROL 	0x20
-#define SF_WAYPOINT_MODE			0x40
-
-//ctrl_flags
-//scientific control
-#define HL_CTRL_PITCH			0x01
-#define HL_CTRL_ROLL			0x02
-#define HL_CTRL_YAW 			0x04
-#define HL_CTRL_THRUST			0x08
-#define HL_CTRL_HEIGHT_ENABLED	0x10
-#define HL_CTRL_GPS_ENABLED		0x20
-//direct motor control
-#define HL_CTRL_MOTORS_ONOFF_BY_RC	0x01
-
-
-void LL_write_ctrl_data(char);
-int HL2LL_write_cycle(void);
-inline void SSP_rx_handler_HL(unsigned char);
-inline void SSP_data_distribution_HL(void);
-
-struct LL_ATTITUDE_DATA
-{
-	unsigned short system_flags;	//GPS data acknowledge, etc.
-
-	short angle_pitch;	//angles [deg*100]
-	short angle_roll;
-	unsigned short angle_yaw;
-
-	short angvel_pitch;	//angular velocities; bias-free [0.015°/s]
-	short angvel_roll;
-	short angvel_yaw;
-
-				//<-- 14 bytes @ 1kHz
-				//--> 3x 26 bytes @ 333 Hz
-				//=> total = 40 bytes @ 1 kHz
-//-----------------------------PAGE0
-	unsigned char RC_data[10];	//8 channels @ 10 bit
-
-	int latitude_best_estimate;	//GPS data fused with all other sensors
-	int longitude_best_estimate;
-	short acc_x;		//accelerations [mg]
-	short acc_y;
-	short acc_z;
-
-	short dummy_333Hz_1;
-//-----------------------------PAGE1
-	unsigned char motor_data[16];	//speed 0..7, PWM 0..7
-
-	short speed_x_best_estimate;
-	short speed_y_best_estimate;
-	int height;		//height [mm]
-	short dheight;		//differentiated height[mm/s]
-//------------------------------PAGE2
-	short mag_x;
-	short mag_y;
-	short mag_z;
-
-	short cam_angle_pitch;
-	short cam_angle_roll;
-	short cam_status;
-
-	short battery_voltage1;
-	short battery_voltage2;
-	short flightMode;
-	short flight_time;
-	short cpu_load;
-	short status;
-	short status2;
-
-};
-
-extern struct LL_ATTITUDE_DATA LL_1khz_attitude_data;
-
-struct LL_CONTROL_INPUT
-{
-	unsigned short system_flags;
-							//bit 0: page_select
-							//bit 1: reserved (page_select)
-							//bit 2: SSP_ack
-							//bit 3: GPS new
-							//bit 4: HL controller enabled
-							//bit 5: 0 -> "scientific" commands
-							//       1 -> direct motor commands
-							//bit 6: waypoint mode
-
-	unsigned short ctrl_flags;
-							//bit 0..3:
-							// pitch, roll, yaw, height enable bits
-							//bit 4: height control enabled
-							//bit 5: yaw_control enabled
-
-	short pitch, roll, yaw, thrust; 		//"scientific interface"
-	unsigned char direct_motor_control[8];		//direct motor commands: pitch, roll, yaw, throttle, 4xDNC
-							//or motor 0..7 (Falcon)
-
-							//<-- 20 bytes @ 1kHz
-							//--> 2x18 bytes @ 500 Hz
-							//=> total = 38 bytes @ 1kHz
-
-	int latitude;					//data received from GPS-unit
-	int longitude;
-	int height;
-	short speed_x;
-	short speed_y;
-	short status;
-//-----------------------------
-
-	unsigned short hor_accuracy;
-	unsigned short vert_accuracy;
-	unsigned short speed_accuracy;
-	unsigned short numSV;
-	unsigned short heading;
-	short battery_voltage_1, battery_voltage_2; 	//battery voltage read by HL-ADC [mV]
-	short dummy_500Hz_2;
-	short dummy_500Hz_3;
-};
-
-extern struct LL_CONTROL_INPUT LL_1khz_control_input;
-
-
-#endif //LL_HL_COMM_
-end old file */
diff --git a/ccny_asctec_firmware_2/include/ccny_asctec_firmware/LPC214x.h b/ccny_asctec_firmware_2/include/ccny_asctec_firmware/LPC214x.h
deleted file mode 100644
index e2c69cf..0000000
--- a/ccny_asctec_firmware_2/include/ccny_asctec_firmware/LPC214x.h
+++ /dev/null
@@ -1,399 +0,0 @@
-/******************************************************************************
- *   LPC214X.h:  Header file for Philips LPC214x Family Microprocessors
- *   The header file is the super set of all hardware definition of the 
- *   peripherals for the LPC214x family microprocessor.
- *
- *   Copyright(C) 2006, Philips Semiconductor
- *   All rights reserved.
-
- *   History
- *   2005.10.01  ver 1.00    Prelimnary version, first Release
- *   2005.10.13  ver 1.01    Removed CSPR and DC_REVISION register.
- *                           CSPR can not be accessed at the user level,
- *                           DC_REVISION is no long available.
- *                           All registers use "volatile unsigned long". 
-******************************************************************************/
-
-#ifndef __LPC214x_H
-#define __LPC214x_H
-
-/* Vectored Interrupt Controller (VIC) */
-#define VIC_BASE_ADDR	0xFFFFF000
-
-#define VICIRQStatus   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x000))
-#define VICFIQStatus   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x004))
-#define VICRawIntr     (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x008))
-#define VICIntSelect   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x00C))
-#define VICIntEnable   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x010))
-#define VICIntEnClr    (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x014))
-#define VICSoftInt     (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x018))
-#define VICSoftIntClr  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x01C))
-#define VICProtection  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x020))
-#define VICVectAddr    (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x030))
-#define VICDefVectAddr (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x034))
-#define VICVectAddr0   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x100))
-#define VICVectAddr1   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x104))
-#define VICVectAddr2   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x108))
-#define VICVectAddr3   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x10C))
-#define VICVectAddr4   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x110))
-#define VICVectAddr5   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x114))
-#define VICVectAddr6   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x118))
-#define VICVectAddr7   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x11C))
-#define VICVectAddr8   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x120))
-#define VICVectAddr9   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x124))
-#define VICVectAddr10  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x128))
-#define VICVectAddr11  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x12C))
-#define VICVectAddr12  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x130))
-#define VICVectAddr13  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x134))
-#define VICVectAddr14  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x138))
-#define VICVectAddr15  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x13C))
-#define VICVectCntl0   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x200))
-#define VICVectCntl1   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x204))
-#define VICVectCntl2   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x208))
-#define VICVectCntl3   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x20C))
-#define VICVectCntl4   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x210))
-#define VICVectCntl5   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x214))
-#define VICVectCntl6   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x218))
-#define VICVectCntl7   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x21C))
-#define VICVectCntl8   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x220))
-#define VICVectCntl9   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x224))
-#define VICVectCntl10  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x228))
-#define VICVectCntl11  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x22C))
-#define VICVectCntl12  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x230))
-#define VICVectCntl13  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x234))
-#define VICVectCntl14  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x238))
-#define VICVectCntl15  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x23C))
-
-/* Pin Connect Block */
-#define PINSEL_BASE_ADDR	0xE002C000
-#define PINSEL0        (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x00))
-#define PINSEL1        (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x04))
-#define PINSEL2        (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x14))
-
-/* General Purpose Input/Output (GPIO) */
-#define GPIO_BASE_ADDR		0xE0028000
-#define IOPIN0         (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x00))
-#define IOSET0         (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x04))
-#define IODIR0         (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x08))
-#define IOCLR0         (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x0C))
-#define IOPIN1         (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x10))
-#define IOSET1         (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x14))
-#define IODIR1         (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x18))
-#define IOCLR1         (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x1C))
-
-/* Fast I/O setup */
-#define FIO_BASE_ADDR		0x3FFFC000
-#define FIO0DIR        (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x00)) 
-#define FIO0MASK       (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x10))
-#define FIO0PIN        (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x14))
-#define FIO0SET        (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x18))
-#define FIO0CLR        (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x1C))
-#define FIO1DIR        (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x20)) 
-#define FIO1MASK       (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x30))
-#define FIO1PIN        (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x34))
-#define FIO1SET        (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x38))
-#define FIO1CLR        (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x3C))
-
-/* System Control Block(SCB) modules include Memory Accelerator Module,
-Phase Locked Loop, VPB divider, Power Control, External Interrupt, 
-Reset, and Code Security/Debugging */
-
-#define SCB_BASE_ADDR	0xE01FC000
-
-/* Memory Accelerator Module (MAM) */
-#define MAMCR          (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x000))
-#define MAMTIM         (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x004))
-#define MEMMAP         (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x040))
-
-/* Phase Locked Loop (PLL) */
-#define PLLCON         (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x080))
-#define PLLCFG         (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x084))
-#define PLLSTAT        (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x088))
-#define PLLFEED        (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x08C))
-
-/* PLL48 Registers */
-#define PLL48CON       (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x0A0))
-#define PLL48CFG       (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x0A4))
-#define PLL48STAT      (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x0A8))
-#define PLL48FEED      (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x0AC))
-
-/* Power Control */
-#define PCON           (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x0C0))
-#define PCONP          (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x0C4))
-
-/* VPB Divider */
-#define VPBDIV         (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x100))
-
-/* External Interrupts */
-#define EXTINT         (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x140))
-#define INTWAKE        (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x144))
-#define EXTMODE        (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x148))
-#define EXTPOLAR       (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x14C))
-
-/* Reset */
-#define RSIR           (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x180))
-
-/* System Controls and Status */
-#define SCS            (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x1A0))	
-
-/* Timer 0 */
-#define TMR0_BASE_ADDR		0xE0004000
-#define T0IR           (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x00))
-#define T0TCR          (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x04))
-#define T0TC           (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x08))
-#define T0PR           (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x0C))
-#define T0PC           (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x10))
-#define T0MCR          (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x14))
-#define T0MR0          (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x18))
-#define T0MR1          (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x1C))
-#define T0MR2          (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x20))
-#define T0MR3          (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x24))
-#define T0CCR          (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x28))
-#define T0CR0          (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x2C))
-#define T0CR1          (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x30))
-#define T0CR2          (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x34))
-#define T0CR3          (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x38))
-#define T0EMR          (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x3C))
-#define T0CTCR         (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x70))
-
-/* Timer 1 */
-#define TMR1_BASE_ADDR		0xE0008000
-#define T1IR           (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x00))
-#define T1TCR          (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x04))
-#define T1TC           (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x08))
-#define T1PR           (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x0C))
-#define T1PC           (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x10))
-#define T1MCR          (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x14))
-#define T1MR0          (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x18))
-#define T1MR1          (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x1C))
-#define T1MR2          (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x20))
-#define T1MR3          (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x24))
-#define T1CCR          (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x28))
-#define T1CR0          (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x2C))
-#define T1CR1          (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x30))
-#define T1CR2          (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x34))
-#define T1CR3          (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x38))
-#define T1EMR          (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x3C))
-#define T1CTCR         (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x70))
-
-/* Pulse Width Modulator (PWM) */
-#define PWM_BASE_ADDR		0xE0014000
-#define PWMIR          (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x00))
-#define PWMTCR         (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x04))
-#define PWMTC          (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x08))
-#define PWMPR          (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x0C))
-#define PWMPC          (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x10))
-#define PWMMCR         (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x14))
-#define PWMMR0         (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x18))
-#define PWMMR1         (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x1C))
-#define PWMMR2         (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x20))
-#define PWMMR3         (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x24))
-#define PWMMR4         (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x40))
-#define PWMMR5         (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x44))
-#define PWMMR6         (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x48))
-#define PWMEMR         (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x3C))
-#define PWMPCR         (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x4C))
-#define PWMLER         (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x50))
-
-/* Universal Asynchronous Receiver Transmitter 0 (UART0) */
-#define UART0_BASE_ADDR		0xE000C000
-#define U0RBR          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x00))
-#define U0THR          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x00))
-#define U0DLL          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x00))
-#define U0DLM          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x04))
-#define U0IER          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x04))
-#define U0IIR          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x08))
-#define U0FCR          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x08))
-#define U0LCR          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x0C))
-#define U0MCR          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x10))
-#define U0LSR          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x14))
-#define U0MSR          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x18))
-#define U0SCR          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x1C))
-#define U0ACR          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x20))
-#define U0FDR          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x28))
-#define U0TER          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x30))
-
-/* Universal Asynchronous Receiver Transmitter 1 (UART1) */
-#define UART1_BASE_ADDR		0xE0010000
-#define U1RBR          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x00))
-#define U1THR          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x00))
-#define U1DLL          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x00))
-#define U1DLM          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x04))
-#define U1IER          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x04))
-#define U1IIR          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x08))
-#define U1FCR          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x08))
-#define U1LCR          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x0C))
-#define U1MCR          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x10))
-#define U1LSR          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x14))
-#define U1MSR          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x18))
-#define U1SCR          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x1C))
-#define U1ACR          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x20))
-#define U1FDR          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x28))
-#define U1TER          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x30))
-
-/* I2C Interface 0 */
-#define I2C0_BASE_ADDR		0xE001C000
-#define I20CONSET      (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x00))
-#define I20STAT        (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x04))
-#define I20DAT         (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x08))
-#define I20ADR         (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x0C))
-#define I20SCLH        (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x10))
-#define I20SCLL        (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x14))
-#define I20CONCLR      (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x18))
-
-/* I2C Interface 1 */
-#define I2C1_BASE_ADDR		0xE005C000
-#define I21CONSET      (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x00))
-#define I21STAT        (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x04))
-#define I21DAT         (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x08))
-#define I21ADR         (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x0C))
-#define I21SCLH        (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x10))
-#define I21SCLL        (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x14))
-#define I21CONCLR      (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x18))
-
-/* SPI0 (Serial Peripheral Interface 0) */
-#define SPI0_BASE_ADDR		0xE0020000
-#define S0SPCR         (*(volatile unsigned long *)(SPI0_BASE_ADDR + 0x00))
-#define S0SPSR         (*(volatile unsigned long *)(SPI0_BASE_ADDR + 0x04))
-#define S0SPDR         (*(volatile unsigned long *)(SPI0_BASE_ADDR + 0x08))
-#define S0SPCCR        (*(volatile unsigned long *)(SPI0_BASE_ADDR + 0x0C))
-#define S0SPINT        (*(volatile unsigned long *)(SPI0_BASE_ADDR + 0x1C))
-
-/* SSP Controller */
-#define SSP_BASE_ADDR		0xE0068000
-#define SSPCR0         (*(volatile unsigned long * )(SSP_BASE_ADDR + 0x00))
-#define SSPCR1         (*(volatile unsigned long * )(SSP_BASE_ADDR + 0x04))
-#define SSPDR          (*(volatile unsigned long * )(SSP_BASE_ADDR + 0x08))
-#define SSPSR          (*(volatile unsigned long * )(SSP_BASE_ADDR + 0x0C))
-#define SSPCPSR        (*(volatile unsigned long * )(SSP_BASE_ADDR + 0x10))
-#define SSPIMSC        (*(volatile unsigned long * )(SSP_BASE_ADDR + 0x14))
-#define SSPRIS         (*(volatile unsigned long * )(SSP_BASE_ADDR + 0x18))
-#define SSPMIS         (*(volatile unsigned long * )(SSP_BASE_ADDR + 0x1C))
-#define SSPICR         (*(volatile unsigned long * )(SSP_BASE_ADDR + 0x20))
-
-/* Real Time Clock */
-#define RTC_BASE_ADDR		0xE0024000
-#define ILR            (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x00))
-#define CTC            (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x04))
-#define CCR            (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x08))
-#define CIIR           (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x0C))
-#define AMR            (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x10))
-#define CTIME0         (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x14))
-#define CTIME1         (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x18))
-#define CTIME2         (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x1C))
-#define SEC            (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x20))
-#define MIN            (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x24))
-#define HOUR           (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x28))
-#define DOM            (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x2C))
-#define DOW            (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x30))
-#define DOY            (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x34))
-#define MONTH          (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x38))
-#define YEAR           (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x3C))
-#define ALSEC          (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x60))
-#define ALMIN          (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x64))
-#define ALHOUR         (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x68))
-#define ALDOM          (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x6C))
-#define ALDOW          (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x70))
-#define ALDOY          (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x74))
-#define ALMON          (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x78))
-#define ALYEAR         (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x7C))
-#define PREINT         (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x80))
-#define PREFRAC        (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x84))
-
-/* A/D Converter 0 (AD0) */
-#define AD0_BASE_ADDR		0xE0034000
-#define AD0CR          (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x00))
-#define AD0GDR         (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x04))
-#define AD0STAT        (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x30))
-#define AD0INTEN       (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x0C))
-#define AD0DR0         (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x10))
-#define AD0DR1         (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x14))
-#define AD0DR2         (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x18))
-#define AD0DR3         (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x1C))
-#define AD0DR4         (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x20))
-#define AD0DR5         (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x24))
-#define AD0DR6         (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x28))
-#define AD0DR7         (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x2C))
-
-#define ADGSR          (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x08))
-/* A/D Converter 1 (AD1) */
-#define AD1_BASE_ADDR		0xE0060000
-#define AD1CR          (*(volatile unsigned long *)(AD1_BASE_ADDR + 0x00))
-#define AD1GDR         (*(volatile unsigned long *)(AD1_BASE_ADDR + 0x04))
-#define AD1STAT        (*(volatile unsigned long *)(AD1_BASE_ADDR + 0x30))
-#define AD1INTEN       (*(volatile unsigned long *)(AD1_BASE_ADDR + 0x0C))
-#define AD1DR0         (*(volatile unsigned long *)(AD1_BASE_ADDR + 0x10))
-#define AD1DR1         (*(volatile unsigned long *)(AD1_BASE_ADDR + 0x14))
-#define AD1DR2         (*(volatile unsigned long *)(AD1_BASE_ADDR + 0x18))
-#define AD1DR3         (*(volatile unsigned long *)(AD1_BASE_ADDR + 0x1C))
-#define AD1DR4         (*(volatile unsigned long *)(AD1_BASE_ADDR + 0x20))
-#define AD1DR5         (*(volatile unsigned long *)(AD1_BASE_ADDR + 0x24))
-#define AD1DR6         (*(volatile unsigned long *)(AD1_BASE_ADDR + 0x28))
-#define AD1DR7         (*(volatile unsigned long *)(AD1_BASE_ADDR + 0x2C))
-
-/* D/A Converter */
-#define DAC_BASE_ADDR		0xE006C000
-#define DACR           (*(volatile unsigned long *)(DAC_BASE_ADDR + 0x00))
-
-/* Watchdog */
-#define WDG_BASE_ADDR		0xE0000000
-#define WDMOD          (*(volatile unsigned long *)(WDG_BASE_ADDR + 0x00))
-#define WDTC           (*(volatile unsigned long *)(WDG_BASE_ADDR + 0x04))
-#define WDFEED         (*(volatile unsigned long *)(WDG_BASE_ADDR + 0x08))
-#define WDTV           (*(volatile unsigned long *)(WDG_BASE_ADDR + 0x0C))
-
-/* USB Controller */
-#define USB_BASE_ADDR		0xE0090000			/* USB Base Address */
-/* Device Interrupt Registers */
-#define DEV_INT_STAT    (*(volatile unsigned long *)(USB_BASE_ADDR + 0x00))
-#define DEV_INT_EN      (*(volatile unsigned long *)(USB_BASE_ADDR + 0x04))
-#define DEV_INT_CLR     (*(volatile unsigned long *)(USB_BASE_ADDR + 0x08))
-#define DEV_INT_SET     (*(volatile unsigned long *)(USB_BASE_ADDR + 0x0C))
-#define DEV_INT_PRIO    (*(volatile unsigned long *)(USB_BASE_ADDR + 0x2C))
-
-/* Endpoint Interrupt Registers */
-#define EP_INT_STAT     (*(volatile unsigned long *)(USB_BASE_ADDR + 0x30))
-#define EP_INT_EN       (*(volatile unsigned long *)(USB_BASE_ADDR + 0x34))
-#define EP_INT_CLR      (*(volatile unsigned long *)(USB_BASE_ADDR + 0x38))
-#define EP_INT_SET      (*(volatile unsigned long *)(USB_BASE_ADDR + 0x3C))
-#define EP_INT_PRIO     (*(volatile unsigned long *)(USB_BASE_ADDR + 0x40))
-
-/* Endpoint Realization Registers */
-#define REALIZE_EP      (*(volatile unsigned long *)(USB_BASE_ADDR + 0x44))
-#define EP_INDEX        (*(volatile unsigned long *)(USB_BASE_ADDR + 0x48))
-#define MAXPACKET_SIZE  (*(volatile unsigned long *)(USB_BASE_ADDR + 0x4C))
-
-/* Command Reagisters */
-#define CMD_CODE        (*(volatile unsigned long *)(USB_BASE_ADDR + 0x10))
-#define CMD_DATA        (*(volatile unsigned long *)(USB_BASE_ADDR + 0x14))
-
-/* Data Transfer Registers */
-#define RX_DATA         (*(volatile unsigned long *)(USB_BASE_ADDR + 0x18))
-#define TX_DATA         (*(volatile unsigned long *)(USB_BASE_ADDR + 0x1C))
-#define RX_PLENGTH      (*(volatile unsigned long *)(USB_BASE_ADDR + 0x20))
-#define TX_PLENGTH      (*(volatile unsigned long *)(USB_BASE_ADDR + 0x24))
-#define USB_CTRL        (*(volatile unsigned long *)(USB_BASE_ADDR + 0x28))
-
-/* DMA Registers */
-#define DMA_REQ_STAT        (*((volatile unsigned long *)USB_BASE_ADDR + 0x50))
-#define DMA_REQ_CLR         (*((volatile unsigned long *)USB_BASE_ADDR + 0x54))
-#define DMA_REQ_SET         (*((volatile unsigned long *)USB_BASE_ADDR + 0x58))
-#define UDCA_HEAD           (*((volatile unsigned long *)USB_BASE_ADDR + 0x80))
-#define EP_DMA_STAT         (*((volatile unsigned long *)USB_BASE_ADDR + 0x84))
-#define EP_DMA_EN           (*((volatile unsigned long *)USB_BASE_ADDR + 0x88))
-#define EP_DMA_DIS          (*((volatile unsigned long *)USB_BASE_ADDR + 0x8C))
-#define DMA_INT_STAT        (*((volatile unsigned long *)USB_BASE_ADDR + 0x90))
-#define DMA_INT_EN          (*((volatile unsigned long *)USB_BASE_ADDR + 0x94))
-#define EOT_INT_STAT        (*((volatile unsigned long *)USB_BASE_ADDR + 0xA0))
-#define EOT_INT_CLR         (*((volatile unsigned long *)USB_BASE_ADDR + 0xA4))
-#define EOT_INT_SET         (*((volatile unsigned long *)USB_BASE_ADDR + 0xA8))
-#define NDD_REQ_INT_STAT    (*((volatile unsigned long *)USB_BASE_ADDR + 0xAC))
-#define NDD_REQ_INT_CLR     (*((volatile unsigned long *)USB_BASE_ADDR + 0xB0))
-#define NDD_REQ_INT_SET     (*((volatile unsigned long *)USB_BASE_ADDR + 0xB4))
-#define SYS_ERR_INT_STAT    (*((volatile unsigned long *)USB_BASE_ADDR + 0xB8))
-#define SYS_ERR_INT_CLR     (*((volatile unsigned long *)USB_BASE_ADDR + 0xBC))
-#define SYS_ERR_INT_SET     (*((volatile unsigned long *)USB_BASE_ADDR + 0xC0))    
-#define MODULE_ID           (*((volatile unsigned long *)USB_BASE_ADDR + 0xFC))
-
-#endif  // __LPC214x_H
-
diff --git a/ccny_asctec_firmware_2/include/ccny_asctec_firmware/LPC2k_ee.h b/ccny_asctec_firmware_2/include/ccny_asctec_firmware/LPC2k_ee.h
deleted file mode 100644
index 65cc6bc..0000000
--- a/ccny_asctec_firmware_2/include/ccny_asctec_firmware/LPC2k_ee.h
+++ /dev/null
@@ -1,187 +0,0 @@
-/************************************************************************/
-/*                                                                    	*/
-/*			LPC2k_ee.H:  Header file enabling EEPROM support			*/
-/* 		for Philips LPC2000 microcontroller's on-chip Flash memory		*/
-/*       			(revision 1.0, May 13th, 2005.)						*/
-/*                                                                     	*/
-/*			This file is to be used with LPC2k_ee.c	file 			  	*/
-/*                                                                     	*/
-/* IMPORTANT: on-chip Flash memory sector(s) intended to be used as 	*/
-/* an EEPROM will be unavailable for regular code storage! The smallest	*/
-/* amount of Flash memory that can be used as an EEPROM is a single 	*/
-/* Flash sector (regardless of the Flash sector actual size). 			*/
-/*                                                                     	*/
-/* If size of desired EEPROM requires several Flash sectors, these		*/
-/* sectors must be a consecutive ones.									*/
-/*                                                                     	*/
-/************************************************************************/
-
-#define EE_SEC_L                14                              //Flash sector where EEPROM begins (see UM for details)
-#define EE_SEC_H                14                              //Flash sector where EEPROM ends (see UM for details)
-#define EE_ADDR_L               0x00038000              //Must match the EE_SEC_L Flash sector start address
-#define EE_ADDR_H               0x0003FFFF              //Must match the EE_SEC_H Flash sector end address
-
-#define EE_CCLK			60000			//system clock cclk expressed in kHz (5*12 MHz)
-
-/************************************************************************/
-/*                                                                    	*/
-/* ee_data structure can be defined differently from this example.		*/
-/* The only requirement is to have _id field as it is defined here		*/
-/* since EE_REC_ID character is used to identify a record's presence	*/
-/* in the EEPROM memory.												*/
-/*                                                                     	*/
-/* ====================================================================	*/
-/*                                                                     	*/
-/* IMPORTANT ARM memory access considerations:							*/
-/*                                                                     	*/
-/* char		: byte alligned. Can be accessed at any location in memory.	*/
-/*                                                                     	*/
-/* short int: occupies 2 consecutive bytes. It can be read/write 		*/
-/*			  accessed only when half-word alligned. Therefore, it is	*/
-/* 			  located at addresses ending with 0x0, 0x2, 0x4, 0x6, 0x8,	*/
-/*			  0xA, 0xC or 0xE.											*/
-/*                                                                     	*/
-/* int		: occupies 4 consecutive bytes.	It can be read/write 		*/
-/*			  accessed only when half-word alligned. Therefore, it is	*/
-/* 			  located at addresses ending with 0x0, 0x4, 0x8 or 0xC.	*/
-/*                                                                     	*/
-/* ====================================================================	*/
-/*                                                                     	*/
-/* Due to the LPC2000 Flash memory characteristics, an ee_data 			*/
-/* structure size (EE_REC_SIZE) is limited to the following set:		*/
-/*                                                                     	*/
-/* LPC2101/2/3, LPC2131/2/4/6/8, LPC2141/2/4/6/8: 0x10, 0x20, 0x40,     */ 
-/*                                                0x80 or 0x100         */
-/*                                                                     	*/
-/* LPC2104/5/6, LPC2112/4/9, LPC2124/9, LPC2192/4: 0x10, 0x20, 0x40,    */
-/*                                                 0x80, 0x100 or 0x200 */
-/*                                                                     	*/
-/* ====================================================================	*/
-/*                                                                     	*/
-/* example1:                                                          	*/
-/*                                                                     	*/
-/* struct ee_data{					//structure starts as word alligned	*/
-/*	unsigned char	_id;			//1 byte  - no allignement restr.	*/
-/*                                  //  	    3 BYTE GAP!!!!         	*/		
-/*	unsigned int	_rec_count;		//4 bytes - must be word alligned!	*/
-/*	unsigned char	_cs;			//1 byte  - no allignement restr.	*/
-/*};								// next structure will start as		*/
-/*                                  // word alligned...                 */
-/* Structure in example 1 occupies 12 bytes of memory					*/
-/*                                                                     	*/
-/* --------------------------------------------------------------------	*/
-/*                               
-                                      	*/
-/* example2:                                                          	*/
-/*                                                                     	*/
-/* struct ee_data{					//structure starts as word alligned	*/
-/*	unsigned char	_id;			//1 byte  - no allignement restr.	*/
-/*	unsigned char	_cs;			//1 byte  - no allignement restr.	*/
-/*                                  //  	    2 BYTE GAP!!!!         	*/		
-/*	unsigned int	_rec_count;		//4 bytes - must be word alligned!	*/
-/*};								// next structure will start as		*/
-/*                                  // word alligned...                 */
-/* Structure in example 2 occupies 8 bytes of memory					*/
-/*                                                                     	*/
-/************************************************************************/
-
-struct ee_data{
-	unsigned char	_id;				//  4 bytes: 1 byte (char) + 3 byte GAP!
-	
-	int 	acc_mid_x;
-	int 	acc_mid_y;
-	int 	acc_mid_z;
-	
-	int	acc_scale_x;
-	int	acc_scale_y;
-	int	acc_scale_z;
-	
-	int	mag_offset_x;
-	int	mag_offset_y;
-	int	mag_offset_z;
-
-	int	mag_scale_x;
-	int	mag_scale_y;
-	int	mag_scale_z;
-	
-	int 	gyro_offset_x;
-	int 	gyro_offset_y;
-	int 	gyro_offset_z;
-
-	int	int_mult;
-	int	int_div;
-	
-	int     used;
-	
-//	int FlightParams[sizeof(struct FLIGHT_PARAMETERS)];
-	
-};										// 16 bytes total
-
-struct ee_data2{
-	unsigned char	_id;				//  4 bytes: 1 byte (char) + 3 byte GAP!	
-	int FlightParams[63];
-};
-
-/************************************************************************/
-/*																		*/
-/* 	Disclaimer: all observations presented in example1, example 2 and 	*/
-/*	ee_data structure defined here are based on Keil's ARM compiler. 	*/
-/*	If another compiler is used, memory usage would have to be 		 	*/
-/*	re-examined and verified.										 	*/
-/*																		*/
-/************************************************************************/
-
-
-#define EE_REC_SIZE		0x100		//see restrictions from above
-
-/********************************************************************/
-/*																	*/
-/* 						Valid combinations for 						*/
-/* EE_REC_SIZE, EE_BUFFER_SIZE, EE_BUFFER_MASK and EE_START_MASK	*/
-/*																	*/
-/* EE_BUFFER_SIZE ! EE_START_MASK ! EE_REC_SIZE ! EE_BUFFER_MASK	*/
-/* ----------------------------------------------------------------	*/
-/*    	256			0xFFFFFF00			0x010		  	0xF0		*/
-/*		256			0xFFFFFF00			0x020		 	0xE0		*/
-/*    	256			0xFFFFFF00			0x040		  	0xC0		*/
-/*		256			0xFFFFFF00			0x080		 	0x80		*/
-/*		256			0xFFFFFF00			0x100			0x00		*/
-/* ---------------------------------------------------------------- */
-/*    	512			0xFFFFFE00			0x010		  	0x1F0		*/
-/*		512			0xFFFFFE00			0x020		 	0x1E0		*/
-/*    	512			0xFFFFFE00			0x040		  	0x1C0		*/
-/*		512			0xFFFFFE00			0x080			0x180	 	*/
-/*		512			0xFFFFFE00			0x100		 	0x100		*/
-/*		512			0xFFFFFE00			0x200		 	0x000		*/
-/********************************************************************/
-/*	For LPC2101/2/3, LPC213x and LPC214x EE_BUFFER_SIZE is 256.		*/
-/*	For all other LPC2000 devices EE_BUFFER_SIZE is always 512.		*/
-/********************************************************************/
-#define EE_BUFFER_SIZE	256
-#define EE_START_MASK	0xFFFFFF00
-#define EE_BUFFER_MASK	0x00000000
-
-/********************************************************************/
-/*!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!*/
-/*!!															  !!*/
-/*!!															  !!*/
-/*!! 				DO NOT MODIFY THE FOLLOWING CODE!!!			  !!*/
-/*!!				===================================			  !!*/
-/*!!															  !!*/
-/*!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!*/
-/********************************************************************/
-
-#define EE_REC_ID 				0xAA
-#define EE_SIZE					(EE_ADDR_H+1-EE_ADDR_L)
-#define NO_RECORDS_AVAILABLE	500
-#define NO_SPACE_IN_EEPROM		501
-#define INDEX_OUT_OF_RANGE		502
-
-#ifndef _EEPROM_
-	extern const unsigned char eeprom[];
-	extern void ee_erase(unsigned int , unsigned int []);	//function erases EEPROM
-	extern void ee_write(unsigned int , unsigned int []);	//function adds a record in EEPROM
-	extern void ee_read (unsigned int , unsigned int []);	//function reads the latest valid record in EEPROM
-	extern void ee_readn(unsigned int , unsigned int []);	//function reads n-th record in EEPROM
-	extern void ee_count(unsigned int , unsigned int []);	//function counts records in EEPROM
-#endif
diff --git a/ccny_asctec_firmware_2/include/ccny_asctec_firmware/adc.h b/ccny_asctec_firmware_2/include/ccny_asctec_firmware/adc.h
deleted file mode 100644
index 66f5a7a..0000000
--- a/ccny_asctec_firmware_2/include/ccny_asctec_firmware/adc.h
+++ /dev/null
@@ -1,42 +0,0 @@
-/*****************************************************************************
- *   adc.h:  Header file for Philips LPC214x Family Microprocessors
- *
- *   Copyright(C) 2006, Philips Semiconductor
- *   All rights reserved.
- *
- *   History
- *   2005.10.01  ver 1.00    Prelimnary version, first Release
- *
-******************************************************************************/
-#ifndef __ADC_H 
-#define __ADC_H
-
-#define ADC_INTERRUPT_FLAG	0	/* 1 is interrupt driven, 0 is polling */
-
-#define ADC_OFFSET	0x10
-#define ADC_INDEX	4
-
-#define ADC_DONE	0x80000000
-#define ADC_OVERRUN	0x40000000
-#define ADC_ADINT	0x00010000
-
-#define VOLTAGE_1	2
-#define VOLTAGE_2  	4
-#define CURRENT_2	1
-
-#define ADC_NUM		8		/* for LPC2146/8 */
-#define ADC_CLK		1000000		/* set to 1Mhz */
-
-extern void ADC0Handler( void ) __irq;
-extern void ADC1Handler( void ) __irq;
-extern unsigned int ADCInit( unsigned int ADC_Clk );
-extern unsigned int ADC0Read( unsigned char channelNum );
-extern unsigned int ADC1Read( unsigned char channelNum );
-
-extern volatile unsigned int ADC0Value[ADC_NUM], ADC1Value[ADC_NUM];
-extern volatile unsigned int ADC0IntDone, ADC1IntDone;
-
-#endif /* end __ADC_H */
-/*****************************************************************************
-**                            End Of File
-******************************************************************************/
diff --git a/ccny_asctec_firmware_2/include/ccny_asctec_firmware/buzzer.h b/ccny_asctec_firmware_2/include/ccny_asctec_firmware/buzzer.h
deleted file mode 100644
index 7548c50..0000000
--- a/ccny_asctec_firmware_2/include/ccny_asctec_firmware/buzzer.h
+++ /dev/null
@@ -1,14 +0,0 @@
-/*
- * buzzer.h
- *
- *  Created on: 14.09.2011
- *      Author: daniel
- */
-
-#ifndef BUZZER_H_
-#define BUZZER_H_
-
-void buzzer_handler(unsigned int);
-void buzzer(unsigned char);
-
-#endif /* BUZZER_H_ */
diff --git a/ccny_asctec_firmware_2/include/ccny_asctec_firmware/comm_util_LL.h b/ccny_asctec_firmware_2/include/ccny_asctec_firmware/comm_util_LL.h
deleted file mode 100644
index 634abb8..0000000
--- a/ccny_asctec_firmware_2/include/ccny_asctec_firmware/comm_util_LL.h
+++ /dev/null
@@ -1,56 +0,0 @@
-#ifndef COMM_UTIL_LL_H
-#define COMM_UTIL_LL_H
-
-#include <stdint.h>
-#include <math.h>
-
-#define GRAVITY_SI      9.80665            // in SI m/s^2
-//#define GRAVITY_COMM    GRAVITY_SI * 1000.0 // in Comm  mm/s^2
-
-inline float degreesToRadians(float angle);
-inline float radiansToDegrees(float angle);
-
-inline float LLToSIClimb(int16_t climb);
-
-// ****************** accel ***********************
-
-inline float LLToSIAccX(int16_t acc);
-inline float LLToSIAccY(int16_t acc);
-inline float LLToSIAccZ(int16_t acc);
-
-/*
-inline int32_t LLtoCommAccX(int16_t acc, float g);
-inline int32_t LLtoCommAccY(int16_t acc, float g);
-inline int32_t LLtoCommAccZ(int16_t acc, float g);
-*/
-// ****************** angle rate ***********************
-
-inline float LLToSIAngleRateYaw  (int angle_rate);
-inline float LLToSIAngleRateRoll (int angle_rate);
-inline float LLToSIAngleRatePitch(int angle_rate);
-//inline int32_t LLtoCommAngleRateYaw(int16_t angle_rate);
-
-// ****************** angle ***********************
-
-inline float LLToSIAngleRoll(int angle);
-inline float LLToSIAnglePitch(int angle);
-inline float LLToSIAngleYaw(int angle);
-
-/*
-inline uint16_t LLtoCommAngleRoll (int16_t angle);
-inline uint16_t LLtoCommAnglePitch(int16_t angle);
-inline uint16_t LLtoCommAngleYaw  (uint16_t angle);
-*/
-// **** for direct motor control
-
-inline short SIToLLCmdRoll   (float angle_cmd);
-inline short SIToLLCmdPitch  (float angle_cmd);
-inline short SIToLLCmdYawRate(float yaw_rate_cmd);
-inline short SIToLLCmdThrust (float thrust_cmd);
-/*
-inline short commToLLCmdRoll    (int16_t cmd_roll);
-inline short commToLLCmdPitch   (int16_t cmd_pitch);
-inline short commToLLCmdYawRate (int32_t cmd_yaw_rate);
-inline short commToLLCmdThrust  (int16_t cmd_thrust);
-*/
-#endif // COMM_UTIL_H
diff --git a/ccny_asctec_firmware_2/include/ccny_asctec_firmware/debug.h b/ccny_asctec_firmware_2/include/ccny_asctec_firmware/debug.h
deleted file mode 100644
index c166bd7..0000000
--- a/ccny_asctec_firmware_2/include/ccny_asctec_firmware/debug.h
+++ /dev/null
@@ -1,138 +0,0 @@
-/****************************************************************************
-*
-*   Copyright (c) 2006 Carrick Detweiler
-*                      and Massachusetts Institute of Technology
-*
-*   This program is free software; you can redistribute it and/or modify
-*   it under the terms of the GNU General Public License as published by
-*   the Free Software Foundation; either version 2 of the License, or
-*   (at your option) any later version.
-*
-*   This program is distributed in the hope that it will be useful,
-*   but WITHOUT ANY WARRANTY; without even the implied warranty of
-*   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-*   GNU General Public License for more details.
-*
-*   You should have received a copy of the GNU General Public License
-*   along with this program; if not, write to the Free Software
-*   Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
-*
-*   $Id: debug.h 142 2007-01-05 17:10:44Z carrick $
-****************************************************************************/
-
-
-#if !defined( DEBUG_H )
-#define DEBUG_H
-#include "stdio.h"
-//#include "console.h"
-
-/**
- * The default debug level (if not specified in the file itself)
- **/
-#ifndef DEBUG
-#define DEBUG 4
-#endif
-
-/**
- * Where debug printfs should go to
- **/
-//#define DEBUG_PRINTF printf
-#define DEBUG_PRINTF(...) 
-
-/**
- * If the debug output should be pretty (a little nicer to read?), but
- * this requires the allocation of some memory and the use of snprintf
- **/
-//#define DEBUG_PRETTY_PRINT
-
-/**
- * Prints file and line info.
- **/
-#ifndef DEBUG_PRETTY_PRINT
-#define DEBUG_PRINTLINE(pre,...)                       \
-  {                                                    \
-    DEBUG_PRINTF(pre );                                \
-    DEBUG_PRINTF("%s:%d %s() ",                        \
-                 __FILE__,__LINE__,__FUNCTION__);      \
-    DEBUG_PRINTF( __VA_ARGS__ );                       \
-  }
-#else /* DEBUG_PRETTY_PRINT */
-
-#define DEBUG_PRINTLINE(pre,...)                       \
-  { char __debugTmp[45];                               \
-    DEBUG_PRINTF(pre );                                \
-    snprintf(__debugTmp,45,"%-18s %-4d %s()",     \
-                 __FILE__,__LINE__,__FUNCTION__);      \
-    DEBUG_PRINTF("%-45s |  ",__debugTmp);                   \
-    DEBUG_PRINTF( __VA_ARGS__ );                       \
-    DEBUG_PRINTG("\n");
-  }
-#endif
-
-/**
- * Info printing
- **/
-#define PRINTF(...) 
-//#define PRINTF(...) 
-
-
-/**
- * Just a macro to indicate that something still needs to be done
- **/
-#define TBD(...)                                                 \
-  DEBUG_PRINTLINE("TBD:    ",__VA_ARGS__);                       
-
-
-#if DEBUG > 0
-/**
- * Debug printing at level 1 debug.  Usage:
- *   DEBUG1(("value %d",val));
- **/
-#define DEBUG1(...)                             \
-  DEBUG_PRINTLINE("DEBUG1: ",__VA_ARGS__);
-
-#if DEBUG > 1
-/**
- * Debug printing at level 2 debug.  Usage:
- *   DEBUG2("value %d",val);
- **/
-#define DEBUG2(...)                             \
-  DEBUG_PRINTLINE("DEBUG2: ",__VA_ARGS__);
-
-#if DEBUG > 2
-/**
- * Debug printing at level 3 debug.  Usage:
- *   DEBUG3("value %d",val);
- **/
-#define DEBUG3(...)                             \
-  DEBUG_PRINTLINE("DEBUG3: ",__VA_ARGS__);
-
-#if DEBUG > 3
-/**
- * Debug printing at level 4 debug.  Usage:
- *   DEBUG4("value %d",val);
- **/
-#define DEBUG4(...)                             \
-  DEBUG_PRINTLINE("DEBUG4: ",__VA_ARGS__);
-
-#else
-#define DEBUG4(...)
-#endif /* DEBUG > 3 */
-#else
-#define DEBUG4(...)
-#define DEBUG3(...)
-#endif /* DEBUG > 2 */
-#else
-#define DEBUG4(...)
-#define DEBUG3(...)
-#define DEBUG2(...)
-#endif /* DEBUG > 1 */
-#else
-#define DEBUG4(...)
-#define DEBUG3(...)
-#define DEBUG2(...)
-#define DEBUG1(...)
-#endif /* DEBUG > 0 */
-
-
-#endif /* DEBUG_H */
diff --git a/ccny_asctec_firmware_2/include/ccny_asctec_firmware/declination.h b/ccny_asctec_firmware_2/include/ccny_asctec_firmware/declination.h
deleted file mode 100644
index 23a8367..0000000
--- a/ccny_asctec_firmware_2/include/ccny_asctec_firmware/declination.h
+++ /dev/null
@@ -1,38 +0,0 @@
-/*
-
-Copyright (c) 2011, Ascending Technologies GmbH
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
- * Redistributions of source code must retain the above copyright notice,
-   this list of conditions and the following disclaimer.
- * Redistributions in binary form must reproduce the above copyright
-   notice, this list of conditions and the following disclaimer in the
-   documentation and/or other materials provided with the distribution.
-
-THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND ANY
-EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY
-DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
-OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
-DAMAGE.
-
- */
-
-#ifndef DECLINATION_
-#define DECLINATION_
-
-int getDeclination(int lat, int lon, int height, int year, int *status);
-
-volatile int estimatedDeclination;
-volatile int estimatedInclination;
-volatile unsigned char declinationAvailable;
-
-#endif //DECLINATION_
diff --git a/ccny_asctec_firmware_2/include/ccny_asctec_firmware/gpsmath.h b/ccny_asctec_firmware_2/include/ccny_asctec_firmware/gpsmath.h
deleted file mode 100644
index 626319c..0000000
--- a/ccny_asctec_firmware_2/include/ccny_asctec_firmware/gpsmath.h
+++ /dev/null
@@ -1,49 +0,0 @@
-#ifndef GPS_MATH_H
-#define GPS_MATH_H
-
-#define GPS_A	6378137.0								// earth semimajor axis in meters
-#define GPS_F 	0.0033528106647474807198455286185206	// reciprocal flattening
-#define GPS_E2 	2*GPS_F-GPS_F*GPS_F									// eccentricity squared
-#define MEAN_EARTH_RADIUS 	6378137.0
-#define MEAN_EARTH_DIAMETER	12756274.0
-#define UMR	0.017453292519943295769236907684886		//PI/180
-
-
-struct GPS_DATA
-{	
-//latitude/longitude in deg * 10^7
-	int latitude;
-	int longitude;
-//GPS height in mm 
-	int height;
-//speed in x (E/W) and y(N/S) in mm/s	
-	int speed_x;
-	int speed_y;
-//GPS heading in deg * 1000
-	int heading; 
-	
-//accuracy estimates in mm and mm/s
-	unsigned int horizontal_accuracy;
-	unsigned int vertical_accuracy;
-	unsigned int speed_accuracy;
-
-//number of satellite vehicles used in NAV solution
-	unsigned int numSV;
-
-// GPS status information; Bit7...Bit3: 0 Bit 2: longitude direction Bit1: latitude direction Bit 0: GPS lock
-	int status; 		
-};
-extern struct GPS_DATA GPS_Data;
-
-struct GPS_TIME 
-{
-	unsigned int time_of_week;	//[ms]
-	unsigned short week;		//[1..52]
-};
-extern struct GPS_TIME GPS_Time;
-
-//trigger's new gps data transmission
-extern unsigned int gpsDataOkTrigger;
-void xy2latlon(double lat0, double lon0, double X, double Y, double *lat, double *lon);	//X: East, Y: North in m; lat0,lon0: Reference coordinates; lat,lon: current GPS measurement
-
-#endif // GPS_MATH_H
diff --git a/ccny_asctec_firmware_2/include/ccny_asctec_firmware/hardware.h b/ccny_asctec_firmware_2/include/ccny_asctec_firmware/hardware.h
deleted file mode 100644
index 997a4a4..0000000
--- a/ccny_asctec_firmware_2/include/ccny_asctec_firmware/hardware.h
+++ /dev/null
@@ -1,23 +0,0 @@
-#ifndef HARDWARE_H
-#define HARDWARE_H
-
-#include "LPC214x.h"
-#include "main.h"
-#include "system.h"
-#include "uart.h"
-#include "irq.h"
-
-#define EXT_NCS 7   //CS outputs on P0
-#define LL_nCS  20	
-#define CTS_RADIO 22
-
-//I/Os on P1
-#define CAMERA_FET	16	
-
-void LED(unsigned char, unsigned char);
-
-void beeper(unsigned char offon);
-
-#endif // HARDWARE_H
-
-
diff --git a/ccny_asctec_firmware_2/include/ccny_asctec_firmware/i2c.h b/ccny_asctec_firmware_2/include/ccny_asctec_firmware/i2c.h
deleted file mode 100644
index d122ed5..0000000
--- a/ccny_asctec_firmware_2/include/ccny_asctec_firmware/i2c.h
+++ /dev/null
@@ -1,64 +0,0 @@
-/*****************************************************************************
- *   i2c.h:  Header file for Philips LPC214x Family Microprocessors
- *
- *   Copyright(C) 2006, Philips Semiconductor
- *   All rights reserved.
- *
- *   History
- *   2005.10.01  ver 1.00    Prelimnary version, first Release
- *
-******************************************************************************/
-#ifndef __I2C_H 
-#define __I2C_H
-
-#define BUFSIZE			0x20
-#define MAX_TIMEOUT		0x00FFFFFF
-
-#define I2CMASTER		0x01
-#define I2CSLAVE		0x02
-
-/* For more info, read Philips's SE95 datasheet */
-#define SE95_ADDR		0x9E
-#define SE95_ID			0x05
-#define SE95_CONFIG		0x01
-#define SE95_TEMP		0x00
-#define RD_BIT			0x01
-
-#define GET_DEVICE_ID		0x01
-#define GET_TEMPERATURE		0x02
-#define SET_CONFIGURATION	0x03
-
-#define I2C_IDLE		0
-#define I2C_STARTED		1
-#define I2C_RESTARTED		2
-#define I2C_REPEATED_START	3
-#define DATA_ACK		4
-#define DATA_NACK		5
-
-#define I2CONSET_I2EN		0x00000040  /* I2C Control Set Register */
-#define I2CONSET_AA		0x00000004
-#define I2CONSET_SI		0x00000008
-#define I2CONSET_STO		0x00000010
-#define I2CONSET_STA		0x00000020
-
-#define I2CONCLR_AAC		0x00000004  /* I2C Control clear Register */
-#define I2CONCLR_SIC		0x00000008
-#define I2CONCLR_STAC		0x00000020
-#define I2CONCLR_I2ENC		0x00000040
-
-#define I2DAT_I2C		0x00000000  /* I2C Data Reg */
-#define I2ADR_I2C		0x00000000  /* I2C Slave Address Reg */
-#define I2SCLH_SCLH		0x00000080  /* I2C SCL Duty Cycle High Reg */
-#define I2SCLL_SCLL		0x00000080  /* I2C SCL Duty Cycle Low Reg */
-
-extern void I2CInit( unsigned int I2cMode );
-extern unsigned int I2CStart( void );
-extern unsigned int I2CStop( void );
-extern unsigned int I2CEngine( void );
-extern void I2C0_send_motordata(void);
-extern void I2C0MasterHandler(void);
-
-#endif /* end __I2C_H */
-/****************************************************************************
-**                            End Of File
-*****************************************************************************/
diff --git a/ccny_asctec_firmware_2/include/ccny_asctec_firmware/kalman.h b/ccny_asctec_firmware_2/include/ccny_asctec_firmware/kalman.h
deleted file mode 100644
index ca174ce..0000000
--- a/ccny_asctec_firmware_2/include/ccny_asctec_firmware/kalman.h
+++ /dev/null
@@ -1,100 +0,0 @@
-#ifndef KALMAN_H
-#define KALMAN_H
-
-#include <inttypes.h>
-#include <mav_common/comm_packets.h>
-#include <mav_common/comm_util.h>
-#include <mav_common/comm_types.h>
-
-#include "matrices.h"
-#include "LL_HL_comm.h"
-#include "sdk.h"
-#include "ssp.h"
-#include "uart.h"
-#include "comm_util_LL.h"
-
-#define HEIGHT_PKT_TIMEOUT 200000 // 200 ms
-
-typedef struct
-{
-  float A[2][2];
-  float At[2][2];
-  float K[2][2];
-  float P[2][2];
-  float T[2][2];
-  float C[2][2];
-  float I[2][2];
-  float Q[2][2];
-  float R[2][2];
-  float Sigma2Q1;
-  float Sigma2Q2;
-  float Sigma2R1;
-  float Sigma2R2;
-  float B[2];
-  float Input;
-  float State[2];
-  float Correction[2];
-  float Res[2];
-} KalPos;
-
-typedef struct
-{
-  float K;
-  float P;
-  float T;
-  float Q;
-  float R;
-  float Sigma2Q;
-  float Sigma2R;
-  float Input;
-  float State;
-  float Correction;
-} KalYaw;
-
-typedef struct
-{
-  float pos_filtered[3]; // Position
-  float vel_filtered[3]; // linear velocity
-  float yaw_filtered;    //yaw angle
-} KalOut;
-
-typedef struct
-{
-  float sigma2Q1x;
-  float sigma2Q2x;
-  float sigma2R1x;
-  float sigma2R2vx;
-
-  float sigma2Q1y;
-  float sigma2Q2y;
-  float sigma2R1y;
-  float sigma2R2vy;
-
-  float sigma2Q1z;
-  float sigma2Q2z;
-  float sigma2R1z;
-  float sigma2R2vz;
-
-  float sigma2Qyaw;
-  float sigma2Ryaw;
-} Covariance;
-
-KalPos kal_x, kal_y, kal_z;
-KalYaw kal_yaw;
-KalOut kal_out;
-Covariance covariance;
-
-void KFilter(void);
-
-void InitKalPos(KalPos *k);
-void PredictPos(KalPos *k, float dt);
-void CorrectPos(KalPos *k);
-
-void InitKalYaw(KalYaw *k);
-void PredictYaw(KalYaw *k, float dt);
-void CorrectYaw(KalYaw *k);
-
-void resetKalmanFilter(void);
-
-#endif // KALMAN_H
-
diff --git a/ccny_asctec_firmware_2/include/ccny_asctec_firmware/lpcUART.h b/ccny_asctec_firmware_2/include/ccny_asctec_firmware/lpcUART.h
deleted file mode 100644
index 8081ed3..0000000
--- a/ccny_asctec_firmware_2/include/ccny_asctec_firmware/lpcUART.h
+++ /dev/null
@@ -1,122 +0,0 @@
-/******************************************************************************
- *
- * $RCSfile: $
- * $Revision: $
- *
- * Header file for Philips LPC ARM Processors.
- * Copyright 2004 R O SoftWare
- *
- * No guarantees, warrantees, or promises, implied or otherwise.
- * May be used for hobby or commercial purposes provided copyright
- * notice remains intact.
- *
- *****************************************************************************/
-#ifndef INC_LPC_UART_H
-#define INC_LPC_UART_H
-
-// Universal Asynchronous Receiver Transmitter Registers
-//typedef struct
-//{
-//  union
-//    {
-//    REG_8 rbr;                          // Receive Buffer Register
-//    REG_8 thr;                          // Transmit Holding Register
-//    REG_8 dll;                          // Divisor Latch Register (LSB)
-//    REG_8 _pad0[4];
-//    };
-//
-//  union
-//    {
-//    REG_8 ier;                          // Interrupt Enable Register
-//    REG_8 dlm;                          // Divisor Latch Register (MSB)
-//    REG_8 _pad1[4];
-//    };
-//
-//  union
-//    {
-//    REG_8 iir;                          // Interrupt ID Register
-//    REG_8 fcr;                          // FIFO Control Register
-//    REG_8 _pad2[4];
-//    };
-//
-//  REG_8 lcr;                            // Line Control Registe
-//  REG_8 _pad3[3];
-//  REG_8 mcr;                            // MODEM Control Register
-//  REG_8 _pad4[3];
-//  REG_8 lsr;                            // Line Status Register
-//  REG_8 _pad5[3];
-//  REG_8 msr;                            // MODEM Status Register
-//  REG_8 _pad6[3];
-//  REG_8 scr;                            // Scratch Pad Register
-//  REG_8 _pad7[3];
-//} uartRegs_t;
-
-///////////////////////////////////////////////////////////////////////////////
-// UART defines
-
-// Interrupt Enable Register bit definitions
-#define UIER_ERBFI          (1 << 0)    // Enable Receive Data Available Interrupt
-#define UIER_ETBEI          (1 << 1)    // Enable Transmit Holding Register Empty Interrupt
-#define UIER_ELSI           (1 << 2)    // Enable Receive Line Status Interrupt
-#define UIER_EDSSI          (1 << 3)    // Enable MODEM Status Interrupt
-
-// Interrupt ID Register bit definitions
-#define UIIR_NO_INT         (1 << 0)    // NO INTERRUPTS PENDING
-#define UIIR_MS_INT         (0 << 1)    // MODEM Status
-#define UIIR_THRE_INT       (1 << 1)    // Transmit Holding Register Empty
-#define UIIR_RDA_INT        (2 << 1)    // Receive Data Available
-#define UIIR_RLS_INT        (3 << 1)    // Receive Line Status
-#define UIIR_CTI_INT        (6 << 1)    // Character Timeout Indicator
-#define UIIR_ID_MASK        0x0E
-
-// FIFO Control Register bit definitions
-#define UFCR_FIFO_ENABLE    (1 << 0)    // FIFO Enable
-#define UFCR_RX_FIFO_RESET  (1 << 1)    // Reset Receive FIFO
-#define UFCR_TX_FIFO_RESET  (1 << 2)    // Reset Transmit FIFO
-#define UFCR_FIFO_TRIG1     (0 << 6)    // Trigger @ 1 character in FIFO
-#define UFCR_FIFO_TRIG4     (1 << 6)    // Trigger @ 4 characters in FIFO
-#define UFCR_FIFO_TRIG8     (2 << 6)    // Trigger @ 8 characters in FIFO
-#define UFCR_FIFO_TRIG14    (3 << 6)    // Trigger @ 14 characters in FIFO
-
-// Line Control Register bit definitions
-#define ULCR_CHAR_5         (0 << 0)    // 5-bit character length
-#define ULCR_CHAR_6         (1 << 0)    // 6-bit character length
-#define ULCR_CHAR_7         (2 << 0)    // 7-bit character length
-#define ULCR_CHAR_8         (3 << 0)    // 8-bit character length
-#define ULCR_STOP_1         (0 << 2)    // 1 stop bit
-#define ULCR_STOP_2         (1 << 2)    // 2 stop bits
-#define ULCR_PAR_NO         (0 << 3)    // No Parity
-#define ULCR_PAR_ODD        (1 << 3)    // Odd Parity
-#define ULCR_PAR_EVEN       (3 << 3)    // Even Parity
-#define ULCR_PAR_MARK       (5 << 3)    // MARK "1" Parity
-#define ULCR_PAR_SPACE      (7 << 3)    // SPACE "0" Paruty
-#define ULCR_BREAK_ENABLE   (1 << 6)    // Output BREAK line condition
-#define ULCR_DLAB_ENABLE    (1 << 7)    // Enable Divisor Latch Access
-
-// Modem Control Register bit definitions
-#define UMCR_DTR            (1 << 0)    // Data Terminal Ready
-#define UMCR_RTS            (1 << 1)    // Request To Send
-#define UMCR_LB             (1 << 4)    // Loopback
-
-// Line Status Register bit definitions
-#define ULSR_RDR            (1 << 0)    // Receive Data Ready
-#define ULSR_OE             (1 << 1)    // Overrun Error
-#define ULSR_PE             (1 << 2)    // Parity Error
-#define ULSR_FE             (1 << 3)    // Framing Error
-#define ULSR_BI             (1 << 4)    // Break Interrupt
-#define ULSR_THRE           (1 << 5)    // Transmit Holding Register Empty
-#define ULSR_TEMT           (1 << 6)    // Transmitter Empty
-#define ULSR_RXFE           (1 << 7)    // Error in Receive FIFO
-#define ULSR_ERR_MASK       0x1E
-
-// Modem Status Register bit definitions
-#define UMSR_DCTS           (1 << 0)    // Delta Clear To Send
-#define UMSR_DDSR           (1 << 1)    // Delta Data Set Ready
-#define UMSR_TERI           (1 << 2)    // Trailing Edge Ring Indicator
-#define UMSR_DDCD           (1 << 3)    // Delta Data Carrier Detect
-#define UMSR_CTS            (1 << 4)    // Clear To Send
-#define UMSR_DSR            (1 << 5)    // Data Set Ready
-#define UMSR_RI             (1 << 6)    // Ring Indicator
-#define UMSR_DCD            (1 << 7)    // Data Carrier Detect
-
-#endif
diff --git a/ccny_asctec_firmware_2/include/ccny_asctec_firmware/main.h b/ccny_asctec_firmware_2/include/ccny_asctec_firmware/main.h
deleted file mode 100644
index b483b0c..0000000
--- a/ccny_asctec_firmware_2/include/ccny_asctec_firmware/main.h
+++ /dev/null
@@ -1,167 +0,0 @@
-#ifndef MAIN_H_
-#define MAIN_H_
-
-#include "util.h"
-
-extern void mainloop(void);
-extern void timer0ISR(void);
-extern void timer1ISR(void);
-
-volatile unsigned int GPS_timeout;
-extern unsigned int GPS_cnt_trigger[4];
-unsigned char GPS_init_status;
-volatile char SYSTEM_initialized; //new
-void calibrate(void);
-
-//#define BATTERY_WARNING_VOLTAGE 10700   //10500 mV, for newer batteries with flatter discharging characteristic, such as TP 5000
-#define BATTERY_WARNING_VOLTAGE 10000   //9800 mV
-#define BAT_DIV 10//(BATTERY_WARNING_VOLTAGE-9000)/100
-
-#define TRIGGER_SERVO_ACTIVE	1800
-#define TRIGGER_SERVO_INACTIVE	3600
-#define CAMER_OFFSET_HUMMINGBIRD	63000
-
-#define ControllerCyclesPerSecond 	1000
-
-//defines for VP_CAMREMOTE (in �s)
-#define VP_SHOOT				2000
-#define VP_LENSCLOSE_SLEEP		1900
-#define VP_REFOCUS_LOCKFOCUS	1800
-#define VP_ZOOM_IN				1700
-#define VP_ZOOM_OUT				1600
-#define VP_NEXT_PROFILE			1500
-#define VP_PREVIOUS_PROFILE		1400
-#define VP_SHUTTER_SPEED_INC	1300
-#define VP_SHUTTER_SPEED_DEC	1200
-#define VP_APERTURE_INC			1100
-#define VP_APERTURE_DEC			1000
-
-#define OFF 0
-#define ON  1
-
-#define NORMAL 0
-
-//reconfigure GPS if needed
-#define GPS_STARTUP 			0
-#define GPS_NEEDS_CONFIGURATION	1
-#define GPS_IS_CONFIGURED		2
-#define GPS_CONFIG_ERROR		3
-
-//packet descriptors
-#define PD_IMURAWDATA       0x01
-#define PD_LLSTATUS        	0x02
-#define PD_IMUCALCDATA      0x03
-#define PD_HLSTATUS        	0x04
-
-#define PD_CTRLOUT			0x11
-#define PD_FLIGHTPARAMS     0x12
-#define PD_CTRLCOMMANDS		0x13
-#define PD_CTRLINTERNAL		0x14
-#define PD_RCDATA       	0x15
-#define PD_CTRLSTATUS		0x16
-
-#define PD_WAYPOINT     	0x20
-#define PD_CURRENTWAY   	0x21
-#define PD_NMEADATA     	0x22
-#define PD_GPSDATA			0x23
-
-#define PD_CAMERACOMMANDS	0x30
-
-#define CAM_TRIGGERED		0x04
-
-struct IMU_CALCDATA {
-//angles derived by integration of gyro_outputs, drift compensated by data fusion; -90000..+90000 pitch(nick) and roll, 0..360000 yaw; 1000 = 1 degree
-    int angle_nick;
-    int angle_roll;
-    int angle_yaw;
-
-//angular velocities, raw values [16 bit], bias free, in 0.0154 �/s (=> 64.8 = 1 �/s)
-    int angvel_nick;
-    int angvel_roll;
-    int angvel_yaw;
-
-//acc-sensor outputs, calibrated: -10000..+10000 = -1g..+1g
-    short acc_x_calib;
-    short acc_y_calib;
-    short acc_z_calib;
-
-//horizontal / vertical accelerations: -10000..+10000 = -1g..+1g
-    short acc_x;
-    short acc_y;
-    short acc_z;
-
-//reference angles derived by accelerations only: -90000..+90000; 1000 = 1 degree
-    int acc_angle_nick;
-    int acc_angle_roll;
-
-//total acceleration measured (10000 = 1g)
-    int acc_absolute_value;
-
-//magnetic field sensors output, offset free and scaled; units not determined, as only the direction of the field vector is taken into account
-    int Hx;
-    int Hy;
-    int Hz;
-
-//compass reading: angle reference for angle_yaw: 0..360000; 1000 = 1 degree
-    int mag_heading;
-
-//pseudo speed measurements: integrated accelerations, pulled towards zero; units unknown; used for short-term position stabilization
-    int speed_x;
-    int speed_y;
-    int speed_z;
-
-//height in mm (after data fusion)
-    int height;
-
-//diff. height in mm/s (after data fusion)
-    int dheight;
-
-//diff. height measured by the pressure sensor [mm/s]
-    int dheight_reference;
-
-//height measured by the pressure sensor [mm]
-    int height_reference;
-};
-extern struct IMU_CALCDATA IMU_CalcData, IMU_CalcData_tmp;
-
-struct IMU_RAWDATA {
-//pressure sensor 24-bit value, not scaled but bias free
-	int pressure;
-
-//16-bit gyro readings; 32768 = 2.5V
-    short gyro_x;
-	short gyro_y;
-	short gyro_z;
-
-//10-bit magnetic field sensor readings
-    short mag_x;
-	short mag_y;
-	short mag_z;
-
-//16-bit accelerometer readings
-    short acc_x;
-	short acc_y;
-    short acc_z;
-
-//16-bit temperature measurement using yaw-gyro internal sensor
-	unsigned short temp_gyro;
-
-//16-bit temperature measurement using ADC internal sensor
-	unsigned int temp_ADC;
-};
-
-extern struct IMU_RAWDATA IMU_RawData;
-
-
-struct SYSTEM_PERMANENT_DATA
-{
-	unsigned int total_uptime;
-	unsigned int total_flighttime;
-	unsigned int onoff_cycles;
-	unsigned int number_of_flights;
-	unsigned int chksum;
-};
-extern struct SYSTEM_PERMANENT_DATA SYSTEM_Permanent_Data;
-
-#endif /*MAIN_H_*/
-
diff --git a/ccny_asctec_firmware_2/include/ccny_asctec_firmware/matrices.h b/ccny_asctec_firmware_2/include/ccny_asctec_firmware/matrices.h
deleted file mode 100644
index 7b87269..0000000
--- a/ccny_asctec_firmware_2/include/ccny_asctec_firmware/matrices.h
+++ /dev/null
@@ -1,54 +0,0 @@
-#ifndef MATRICES_H
-#define MATRICES_H
-
-#include <math.h>
-#include <stdlib.h>
-
-typedef float** matrix;  // designate a matrix as an array (2D) of floatsdef Row* Matrix;
-
-void addMatrix2 (float A[2][2], float B[2][2], float C[2][2]);
-void subMatrix2 (float A[2][2], float B[2][2], float C[2][2]);
-void multMatrix2(float A[2][2], float B[2][2], float C[2][2]);
-void subVector2 (float A[2], float B[2], float C[2]);
-void multMatVec2(float A[2][2], float B[2], float C[2]);
-void invert2(float A[2][2], float B[2][2]);
-void VectmultSc2(float V[2], float scl, float V1[2]);
-void addVector2(float V[2], float V1[2], float V2[2]);
-//void allocMatrix(matrix mat, int nrows, int ncolumns);
-void addMatrix (matrix A, matrix B, matrix C, int m, int n);
-void addVector (float* A, float* B, float* C, int m);
-void subMatrix (matrix A, matrix B, matrix C, int m, int n);
-void subVector (float* A, float* B, float* C, int m);
-void negMatrix(matrix A, int m, int n);
-void multMatrix(matrix A, matrix B, matrix C, int Am, int An, int Bn);
-void multMatVec(matrix A, float* B, float* C, int Am, int Bn);
-void transpose(matrix A, matrix B, int Am, int An);
-void invert3(matrix A, matrix B);
-float determinant(matrix A,matrix tmp, int n);
-void getMinor(matrix A, matrix B,int An, int m, int n);
-void invt(matrix A, matrix B, matrix tmp1, matrix tmp2, int An);
-float BhQhBhT(matrix Qh, float* Bh, float* tmp);
-void VectdivSc(float* V, float scl);
-
-/*void allocMatrix(float** mat, int nrows, int ncolumns)
-{
-	mat = (float **)malloc(nrows * ncolumns * sizeof(float));
-
-	float* temp = (float*) malloc(nrows * ncolumns * sizeof(float));
-
-	for(int i = 0; i < nrows; i++)
-		mat[i] = temp + (i * ncolumns);
-
-}*/
-
-/*void allocMatrix(float** mat, int nrows, int ncolumns)
-{
-	mat = malloc(ncolumns * sizeof(float*));
-  for(int i = 0; i < ncolumns; i++)
-   mat[i] = malloc(nrows * sizeof(float));
-}*/
-
-
-#endif /*MATRICES_H_*/
-
-
diff --git a/ccny_asctec_firmware_2/include/ccny_asctec_firmware/matrices2.h b/ccny_asctec_firmware_2/include/ccny_asctec_firmware/matrices2.h
deleted file mode 100644
index 064f453..0000000
--- a/ccny_asctec_firmware_2/include/ccny_asctec_firmware/matrices2.h
+++ /dev/null
@@ -1,248 +0,0 @@
-#ifndef MATRICES_H
-#define MATRICES_H
-#include <math.h>
-
-typedef float** matrix;  // designate a matrix as an array (2D) of floats
-
-void addMatrix (matrix A, matrix B, matrix C, int m, int n);
-void addVector (float* A, float* B, float* C, int m);
-void subMatrix (matrix A, matrix B, matrix C, int m, int n);
-void subVector (float* A, float* B, float* C, int m);
-void negMatrix(matrix A, int m, int n);
-void multMatrix(matrix A, matrix B, matrix C, int Am, int An, int Bn);
-void multMatVec(matrix A, float* B, float* C, int Am, int Bn);
-void transpose(matrix A, matrix B, int Am, int An);
-void invert3(matrix A, matrix B);
-void invert2(matrix A, matrix B);
-float determinant(matrix A,matrix tmp, int n);
-void getMinor(matrix A, matrix B,int An, int m, int n);
-void invt(matrix A, matrix B, matrix tmp1, matrix tmp2, int An);
-float BhQhBhT(matrix Qh, float* Bh, float* tmp);
-void VectdivSc(float* V, float scl);
-
-
-void addMatrix (matrix A, matrix B, matrix C, int m, int n){
-	/*C= A+B;
-	 * A,B and C need to be the same size (m by n); function does not check*/
-	int i, j;
-	for(i=0; i<m; ++i){
-		for(j=0; j<n; ++j){
-			C[i][j] = A[i][j] + B[i][j];
-		}//inner for
-	}//outer for
-}//add matrices
-
-void addVector (float* A, float* B, float* C, int m){
-	/*C= A+B;
-	 *  A,B and C need to be the same size (m); function does not check*/
-	int i;
-	for(i=0; i<m; ++i){
-		C[i] = A[i] + B[i];
-	}//for
-}//add Vectors
-
-void subMatrix (matrix A, matrix B, matrix C, int m, int n){
-	/*C= A-B;
-	 * A,B and C need to be the same size (m by n); function does not check*/
-	int i, j;
-	for(i=0; i<m; ++i){
-			for(j=0; j<n; ++j){
-				C[i][j] = A[i][j] - B[i][j];
-			}//inner for
-	}//outer for
-}//sub matrices
-
-void subVector (float* A, float* B, float* C, int m){
-	/*C= A-B;
-	 * A,B and C need to be the same size (m); function does not check*/
-	int i;
-	for(i=0; i<m; ++i){
-		C[i] = A[i] - B[i];
-	}//for
-}//add Vectors
-
-
-
-void negMatrix(matrix A, int m, int n){
-	/*negate matrix*/
-	int i,j;
-	for(i=0; i<m; ++i){
-		for(j=0; j<n; ++j){
-			A[i][j] = -A[i][j];
-		}//inner for
-	}//outer for
-}//negMAtrix
-
-
-void multMatrix(matrix A, matrix B, matrix C, int Am, int An, int Bn){
-	//C = A*B
-	//A,B and C need to be of correct dimensions, function does not check
-    int i,j,k;
-    float sum;
-
-    for(i=0; i < Bn; i++){
-    	for(j=0; j < Am; j++){
-    		sum=0;
-    		for(k=0; k < An; k++)
-    			sum += A[j][k] * B[k][i];
-    		C[j][i] = sum;
-    	}//inner for
-    }//outer for
-}
-
-void multMatVec(matrix A, float* B, float* C, int Am, int Bn){
-	/*C = A*B
-	 *A,B and C need to be of correct dimensions, function does not check */
-
-
-	int j,k;
-	float sum;
-  	for(j=0; j < Am; j++){
-  		sum=0;
-   		for(k=0; k < Bn; k++)
-   			sum += A[j][k] * B[k];
-   		C[j] = sum;
-  		}//for
-}//multMatVec
-
-
-void transpose(matrix A, matrix B, int Am, int An){
-	/*B = A'*/
-	int i,j;
-	 for(i=0; i < Am; i++)
-		for(j=0; j < An; j++)
-		    B[j][i] = A[i][j];
-
-}
-
-void invert3(matrix A, matrix B){
-/* B = A^-1 for 3x3 matrices*/
-	float det = (A[0][0]*A[1][1]*A[2][2]-A[0][0]*A[1][2]*A[2][1]-A[1][0]*A[0][1]*A[2][2]+A[1][0]*A[0][2]*A[2][1]+A[2][0]*A[0][1]*A[1][2]-A[2][0]*A[0][2]*A[1][1]);
-
-	B[0][0]=(A[1][1]*A[2][2]-A[1][2]*A[2][1])/det;
-	B[0][1]=(-A[0][1]*A[2][2]+A[0][2]*A[2][1])/det;
-	B[0][2]=(A[0][1]*A[1][2]-A[0][2]*A[1][1])/det;
-	B[1][0]=(-A[1][0]*A[2][2]+A[1][2]*A[2][0])/det;
-	B[1][1]=(A[0][0]*A[2][2]-A[0][2]*A[2][0])/det;
-	B[1][2]=(-A[0][0]*A[1][2]+A[0][2]*A[1][0])/det;
-	B[2][0]=(A[1][0]*A[2][1]-A[1][1]*A[2][0])/det;
-	B[2][1]=(-A[0][0]*A[2][1]+A[0][1]*A[2][0])/det;
-	B[2][2]=(A[0][0]*A[1][1]-A[0][1]*A[1][0])/det;
-}//invert3
-
-void invert2(matrix A, matrix B){
-/* B = A^-1 for 2x2 matrices*/
-	float det = (A[0][0]*A[1][1]-A[0][1]*A[1][0]);
-
-	B[0][0]=(A[1][1])/det;
-	B[0][1]=(-A[0][1])/det;
-	B[1][0]=(-A[1][0])/det;
-	B[1][1]=(A[0][0])/det;
-}//invert2
-
-float determinant(matrix A,matrix tmp, int n){
-	/*returns determinant of n x n matrix*/
-	int i,j,k;
-	float q;
-	float dtr=1;
-	/* copy A to tmp*/
-	for(i=0; i < n; i++)
-		for(j=0; j < n; j++)
-		    tmp[i][j] = A[j][i];
-
-	/*compute determinant*/
-	for(i=0;i < n;i++){
-		for(j=0;j < n;j++){
-			q=tmp[j][i]/tmp[i][i];
-			for(k=0;k < n;k++){
-				if(i==j) break;
-				tmp[j][k]=(tmp[j][k]-tmp[i][k])*q;
-			}//innermost for
-		}//middle for
-	}//outer for
-	for(i=0;i < n;i++){
-		dtr=dtr*tmp[i][i];
-	}//for
-	return(dtr);
-}//det
-
-
-void getMinor(matrix A, matrix B,int An, int m, int n){
-	/*	use this function to generate a matrix B that is the mn minor of A; A must be square
-	 *  m>=1, n>=1, An is the size of A*/
-	int i,j;
-	int k=0;
-	for(i=0; i < An; i++){
-		if(i!=(m-1)){
-			for(j=0; j < (An-1); j++){
-				if(j<(n-1)){
-					B[k][j] = A[i][j];
-				}
-				else{
-					B[k][j] = A[i][j+1];
-				}
-			}//inner for (column)
-			k++;
-		}//if
-	}//outer for
-}//get minor
-
-
-void invt(matrix A, matrix B, matrix tmp1, matrix tmp2, int An){
-	/*B =  A^-1 ; tmp1 & tmp2 must be at least of size (An-1)x(An-1)
-	 * function does not check if matrix is singular, tried, but even if det(A)==0, it did not escape,
-	 * just reutrned "nan" for some elements, and garbage for others
-	 *  */
-	int i,j;
-	float detA = determinant(A,tmp2,An);
-	for(i=0; i < An; i++){
-		for(j=0; j < An; j++){
-			getMinor(A,tmp1,An,i+1,j+1);
-			if(((i+j)%2)==0){
-				B[j][i]= determinant(tmp1,tmp2,(An-1))/detA;
-			}
-			else{
-				B[j][i]= -determinant(tmp1,tmp2,(An-1))/detA;
-			}
-			 //problem if an element is zero (returns "nan" for zero element)
-		}//inner for
-	}//outer for
-}//invert
-
-float BhQhBhT(matrix Qh, float* Bh, float* tmp){
-	//function returns the value for Bh*Qh*Bh', where Qh is an  3x3 matrix, and Bh is a vector of length 3
-
-
-
-	//Bh*Qh
-	int i,j;
-	float sum;
-	for(i=0; i < 3; i++){
-		sum=0;
-		for(j=0; j < 3; j++)
-			sum += Bh[j]*Qh[j][i];
-		tmp[i] = sum;
-	 }//outer for
-
-	//tmp*BhT
-	sum = 0;
-	for(i=0; i < 3; i++)
-		sum += tmp[i]*Bh[i];
-
-
-
-	return sum;
-}
-
-void VectdivSc(float* V, float scl){
-	//function returns the value of Vector/scalar where vector is 3x1
-
-	int i;
-	for(i=0; i < 3; i++){
-		V[i] = V[i]/scl;
-	 }// for
-}
-
-#endif /*MATRICES_H_*/
-
-
diff --git a/ccny_asctec_firmware_2/include/ccny_asctec_firmware/pid.h b/ccny_asctec_firmware_2/include/ccny_asctec_firmware/pid.h
deleted file mode 100644
index 66d0c68..0000000
--- a/ccny_asctec_firmware_2/include/ccny_asctec_firmware/pid.h
+++ /dev/null
@@ -1,35 +0,0 @@
-#ifndef PID_H
-#define PID_H
-
-#include <inttypes.h>
-#include <mav_common/comm.h>
-#include <mav_common/comm_packets.h>
-#include <mav_common/comm_types.h>
-#include "sdk.h"
-#include "LL_HL_comm.h"
-
-
-typedef struct
-{
-  float kp;         //  Proportional Const
-  float ki;         //  Integral Const
-  float kd;         //  Derivative Const
-  float kd2;        //  Derivative Const for angular velocity feedback
-  float d_base;
-  float bias;       //  constant term in the PID sum
-  float sum_error;  //  Sums of Errors
-  float max_sum_error; //  integrative saturation to avoid increasing error from the integration
-  float max_error;    // maximum instantaneous error
-
-} PID;
-
-void pidReset(void);
-
-float pidCalc(PID * pid, float error, float d_term, float d_base, float dt);
-
-void processCtrl(void);
-
-void pidParamUpdate(void);
-
-#endif // PID_H
-
diff --git a/ccny_asctec_firmware_2/include/ccny_asctec_firmware/sdk.h b/ccny_asctec_firmware_2/include/ccny_asctec_firmware/sdk.h
deleted file mode 100644
index c479590..0000000
--- a/ccny_asctec_firmware_2/include/ccny_asctec_firmware/sdk.h
+++ /dev/null
@@ -1,399 +0,0 @@
-/*
-
-Copyright (c) 2011, Markus Achtelik, ASL, ETH Zurich, Switzerland
-You can contact the author at <markus dot achtelik at mavt dot ethz dot ch>
-
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-* Redistributions of source code must retain the above copyright
-notice, this list of conditions and the following disclaimer.
-* Redistributions in binary form must reproduce the above copyright
-notice, this list of conditions and the following disclaimer in the
-documentation and/or other materials provided with the distribution.
-* Neither the name of ETHZ-ASL nor the
-names of its contributors may be used to endorse or promote products
-derived from this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
-ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL ETHZ-ASL BE LIABLE FOR ANY
-DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-
-*/
-
-#ifndef SDK_H
-#define SDK_H
-
-#include <inttypes.h>
-
-#include "pid.h"
-#include "uart.h"
-#include "hardware.h"
-#include "kalman.h"
-#include "comm_util_LL.h"
-
-#define CMD_MAX_PERIOD 100 // in [ms] ==> 10Hz
-
-#define LAND_THRUST_DECREASE_STEP    0.01      // while landing, decrease thrust by this much
-#define LAND_THRUST_DECREASE_PERIOD  1      // while landing, decrease thrust every # of cycles
-
-typedef struct
-{
-  Position x;     // x position, in m
-  Position y;     // y position, in m
-  Position z;     // z position, in m
-
-  Velocity vx;    // x velocity, in m/sec
-  Velocity vy;    // y velocity, in m/sec
-  Velocity vz;    // y velocity, in m/sec
-
-  Angle roll;  // roll  orientation, in rad
-  Angle pitch; // pitch orientation, in rad
-  Angle yaw;   // yaw   orientation, in rad
-} MAV_POSE_SI;
-
-typedef struct
-{
-  Angle cmd_roll;      // roll  ,    in rad/....
-  Angle cmd_pitch;     // pitch ,    in rad
-  AngVelocity cmd_yaw_rate;  // yaw_rate , in rad/s
-  Thrust cmd_thrust;    // thrust,    in %      [0, 100]
-
-} MAV_CTRL_CMD;
-
-typedef struct
-{
-  Position x;     // desired x position, in mm
-  Position y;     // desired y position, in mm
-  Position z;     // desired z position, in mm
-
-  Velocity vx;    // desired x velocity, in mm/sec
-  Velocity vy;    // desired y velocity, in mm/sec
-
-  Angle yaw;   // desired yaw   orientation, in deg/100, [0, 36000)
-} MAV_DES_POSE;
-
-extern void SDK_mainloop(void);
-
-void sdkInit(void);
-
-inline void writeCommand(short pitch, short roll, short yaw, short thrust, short ctrl, short enable);
-inline void sendImuData(void);
-inline void sendRcData(void);
-inline void sendFlightStateData(void);
-inline void sendMavPoseData(void);
-inline void sendStatusData(void);
-inline void sendCtrlDebugData(void);
-
-inline unsigned short isSerialEnabled(void);
-inline void feedbackBeep(void);
-inline void estop(void);
-
-inline void processKF(void);
-inline void processMotorStateChanges(void);
-inline void processFlightActionRequests(void);
-inline void processEngageDisengageTimeouts(void);
-inline void processLandingThrust(void);
-inline void processMotorCommands(void);
-inline void processSendData(void);
-
-/// adjusts HLP time to host PC time
-/***
- * Timestamped packets get send around every 2 s to average the transmission delay.
- * Corrects at max 500 us per second. If the time offset is large, the server (host PC)
- * time is taken directly and synchronization starts from that time.
- */
-inline void synchronizeTime(void);
-
-/// gets called every sdk loops. Currently, only checks for packets from the PC and starts autobaud in case there wwas no communication in the last 10 s
-//inline void watchdog(void);
-
-/// checks if a packet has to be sent
-inline int checkTxPeriod(uint16_t period, uint16_t phase);
-
-struct WO_SDK_STRUCT
-{
-  unsigned char ctrl_mode;
-  //0x00: Direct individual motor control: individual
-          //commands for motors 0..3 (AscTec HB,  AscTec Pelican) or 0..5 (AscTec FireFly)
-  //0x01: Direct motor control using standard output
-         //mapping: commands are interpreted as pitch, roll, yaw and thrust inputs for all motors;
-         //no  attitude controller active !
-  //0x02: Attitude and thrust control
-  //0x03: GPS waypoint navigation. When in GPS mode the vehicle will fly to the desired waypoints
-
-  unsigned char ctrl_enabled; 
-  //0x00: Control commands are ignored by LL processor
-  //0x01: Control commands are accepted by LL processor
-
-  //new field
-  unsigned char disable_motor_onoff_by_stick; // if true, "minimum thrust + full yaw" command will not start/stop motors
-};
-extern struct WO_SDK_STRUCT WO_SDK;
-
-//new struct
-struct RO_ALL_DATA {
-
-	//remote control data
-		unsigned short channel[8];
-		/*
-		 * channel[0]: pitch
-		 * channel[1]: roll
-		 * channel[2]: thrust
-		 * channel[3]: yaw
-		 * channel[4]: serial interface enable/disable (>2048 enabled)
-		 * channel[5]: manual / height control / GPS + height control (0 -> manual mode; 2048 -> height mode; 4095 -> GPS mode)
-		 *
-		 * range of each channel: 0..4095
-		 */
-
-	//angles derived by integration of gyro_outputs, drift compensated by data fusion; -90000..+90000 pitch(nick) and roll, 0..360000 yaw; 1000 = 1 degree
-	    int angle_pitch;
-	    int angle_roll;
-	    int angle_yaw;
-
-	//angular velocities, bias free, in 0.0154 °/s (=> 64.8 = 1 °/s)
-	    int angvel_pitch;
-	    int angvel_roll;
-	    int angvel_yaw;
-
-	//acc-sensor outputs, calibrated: -10000..+10000 = -1g..+1g, body frame coordinate system
-	    short acc_x;
-	    short acc_y;
-	    short acc_z;
-
-	//magnetic field sensors output, offset free and scaled to +-2500 = +- earth field strength;
-	    int Hx;
-	    int Hy;
-	    int Hz;
-
-	//RPM measurements (0..200)
-	/*
-	 * Quadcopter (AscTec Hummingbird, AscTec Pelican)
-	 *
-	 * motor[0]: front
-	 * motor[1]: rear
-	 * motor[2]: left
-	 * motor[3]: right
-	 *
-	 */
-
-	/*
-	 * Hexcopter (AscTec Firefly)
-	 *
-	 * motor[0]: front-left
-	 * motor[1]: left
-	 * motor[2]: rear-left
-	 * motor[3]: rear-right
-	 * motor[4]: right
-	 * motor[5]: front-right
-	 *
-	 */
-	    unsigned char motor_rpm[6];
-
-	//latitude/longitude in degrees * 10^7
-		int GPS_latitude;
-		int GPS_longitude;
-
-	//GPS height in mm
-		int GPS_height;
-
-	//speed in x (E/W) and y(N/S) in mm/s
-		int GPS_speed_x;
-		int GPS_speed_y;
-
-	//GPS heading in deg * 1000
-		int GPS_heading;
-
-	//accuracy estimates in mm and mm/s
-		unsigned int GPS_position_accuracy;
-		unsigned int GPS_height_accuracy;
-		unsigned int GPS_speed_accuracy;
-
-	//number of satellites used in NAV solution
-		unsigned int GPS_sat_num;
-
-	// GPS status information: Bit7...Bit3: 0; Bit 2: longitude direction; Bit1: latitude direction; Bit 0: GPS lock
-		int GPS_status;
-
-		unsigned int GPS_time_of_week;	//[ms] (1 week = 604,800 s)
-		unsigned short GPS_week;		// starts from beginning of year 1980
-
-	//height in mm (after data fusion)
-		int fusion_height;
-
-	//diff. height in mm/s (after data fusion)
-		int fusion_dheight;
-
-	//GPS data fused with all other sensors (best estimations)
-		int fusion_latitude; 	//Fused latitude in degrees * 10^7
-		int fusion_longitude;	//Fused longitude in degrees * 10^7
-
-		short fusion_speed_x; 	//[mm/s]
-		short fusion_speed_y;	//[mm/s]
-
-}; //************************************************************
-struct RO_ALL_DATA RO_ALL_Data;
-
-
-struct RO_RC_DATA
-{
-  unsigned short channel[8];
-  /*
-   * channel[0]: Pitch
-   * channel[1]: Roll
-   * channel[2]: Thrust
-   * channel[3]: Yaw
-   * channel[4]: Serial interface enable/disable
-   * channel[5]: manual / height control / GPS + height control
-   *
-   * range of each channel: 0..4095
-   */
-};
-extern struct RO_RC_DATA RO_RC_Data;
-
-
-//--- send commands -----------------------------------------------------------------------------------------------------------------------------------------------
-//new struct
-struct WO_DIRECT_INDIVIDUAL_MOTOR_CONTROL
-{
-	unsigned char motor[8];
-
-	/*
-	 * commands will be directly interpreted by each motor individually
-	 *
-	 * range: 0..200 = 0..100 %; 0 = motor off! Please check for command != 0 during flight, as a motor restart might take > 1s!
-	 */
-
-	/*
-	 * Quadcopter (AscTec Hummingbird, AscTec Pelican)
-	 *
-	 * motor[0]: front
-	 * motor[1]: rear
-	 * motor[2]: left
-	 * motor[3]: right
-	 *
-	 */
-
-	/*
-	 * Hexcopter (AscTec Firefly)
-	 *
-	 * motor[0]: front-left
-	 * motor[1]: left
-	 * motor[2]: rear-left
-	 * motor[3]: rear-right
-	 * motor[4]: right
-	 * motor[5]: front-right
-	 *
-	 */
-
-};
-struct WO_DIRECT_INDIVIDUAL_MOTOR_CONTROL WO_Direct_Individual_Motor_Control;
-
-struct WO_DIRECT_MOTOR_CONTROL
-{
-  unsigned char pitch;
-  unsigned char roll;
-  unsigned char yaw;
-  unsigned char thrust;
-
-  /*
-   * commands will be directly interpreted by the mixer
-   * running on each of the motor controllers
-   *
-   * range (pitch, roll, yaw commands): 0..200 = - 100..+100 %
-   * range of thrust command: 0..200 = 0..100 %
-   */
-
-};
-extern struct WO_DIRECT_MOTOR_CONTROL WO_Direct_Motor_Control;
-
-struct WO_CTRL_INPUT
-{ //serial commands (= Scientific Interface)
-  short pitch; //Pitch input: -2047..+2047 (0=neutral)
-  short roll; //Roll input: -2047..+2047	(0=neutral)
-  short yaw; //(=R/C Stick input) -2047..+2047 (0=neutral)
-  short thrust; //Collective: 0..4095 = 0..100%
-  short ctrl; /*control byte:
-   bit 0: pitch control enabled
-   bit 1: roll control enabled
-   bit 2: yaw control enabled
-   bit 3: thrust control enabled
-   bit 4: Height control enabled
-   bit 5: GPS position control enabled
-   */
-};
-extern struct WO_CTRL_INPUT WO_CTRL_Input;
-
-//new part
-
-//waypoint commands
-
-struct WAYPOINT { //waypoint definition
-//always set to 1
-  unsigned int wp_activated;
-
-//use WPPROP_* defines to set waypoint properties
-  unsigned char properties;
-
-//max. speed to travel to waypoint in % (default 100)
-  unsigned char max_speed;
-
-//time to stay at a waypoint (XYZ) in 1/100 s
-  unsigned short time;
-
-//position accuracy to consider a waypoint reached in mm (recommended: 3000 (= 3.0 m))
-  unsigned short pos_acc;
-
-//chksum = 0xAAAA + wp.yaw + wp.height + wp.time + wp.X + wp.Y + wp.max_speed + wp.pos_acc + wp.properties + wp.wp_number;
-  short chksum;
-
- //relative waypoint coordinates in mm 	// longitude in abs coords e.g. 113647430 (= 11.3647430°; angle in degrees * 10^7)
-  int X;
- //relative waypoint coordinates in mm  	// latitude in abs coords e.g. 480950480 (= 48.0950480°; angle in degrees * 10^7)
-  int Y;
-
-//yaw angle
-  int yaw; // 1/1000°
-
-//height over 0 reference in mm
-  int height;
-
-};
-extern struct WAYPOINT wpToLL;
-
-//set waypoint properties with WPPROP_* defines (wpToLL.properties)
-#define WPPROP_ABSCOORDS 			0x01	//if set waypoint is interpreted as absolute coordinates, else relative coordinates
-#define WPPROP_HEIGHTENABLED 		0x02  	//set new height at waypoint
-#define WPPROP_YAWENABLED 			0x04	//set new yaw-angle at waypoint
-#define WPPROP_AUTOMATICGOTO		0x10 	//if set, vehicle will not wait for a goto command, but goto this waypoint directly
-
-extern unsigned char wpCtrlWpCmd; //choose actual waypoint command from WP_CMD_* defines
-#define WP_CMD_SINGLE_WP 	0x01 //fly to single waypoint
-#define WP_CMD_LAUNCH		0x02 //launch to 10m at current position
-#define WP_CMD_LAND			0x03 //land at current position
-#define WP_CMD_GOHOME		0x04 //come home at current height. Home position is set when motors are started (valid GPS signal mandatory!) or with WP_CMD_SETHOME
-#define WP_CMD_SETHOME		0x05 //save current vehicle position as home position
-#define WP_CMD_ABORT		0x06 //abort navigation (stops current waypoint flying)
-
-extern unsigned char wpCtrlWpCmdUpdated; //send current waypoint command to LL
-extern unsigned char wpCtrlAckTrigger; //acknowledge from LL processor that waypoint was accepted
-
-//Waypoint navigation status
-extern unsigned short wpCtrlNavStatus; //check navigation status with WP_NAVSTAT_* defines
-#define WP_NAVSTAT_REACHED_POS 			0x01	//vehicle has entered a radius of WAYPOINT.pos_acc and time to stay is not necessarily over
-#define WP_NAVSTAT_REACHED_POS_TIME		0x02 	//vehicle is within a radius of WAYPOINT.pos_acc and time to stay is over
-#define WP_NAVSTAT_20M					0x04 	//vehicle within a 20m radius of the waypoint
-#define WP_NAVSTAT_PILOT_ABORT			0x08	//waypoint navigation aborted by safety pilot (any stick was moved)
-
-extern unsigned short wpCtrlDistToWp; //current distance to the current waypoint in dm (=10 cm)
-
-#endif // SDK_H
diff --git a/ccny_asctec_firmware_2/include/ccny_asctec_firmware/ssp.h b/ccny_asctec_firmware_2/include/ccny_asctec_firmware/ssp.h
deleted file mode 100644
index 331e31f..0000000
--- a/ccny_asctec_firmware_2/include/ccny_asctec_firmware/ssp.h
+++ /dev/null
@@ -1,71 +0,0 @@
-/*****************************************************************************
- *   ssp.h:  Header file for Philips LPC214x Family Microprocessors
- *
- *   Copyright(C) 2006, Philips Semiconductor
- *   All rights reserved.
- *
- *   History
- *   2005.10.01  ver 1.00    Prelimnary version, first Release
- *
-******************************************************************************/
-#ifndef __SSP_H__
-#define __SSP_H__
-
-volatile unsigned int SSP_trans_cnt;
-
-/* SPI read and write buffer size */
-#define FIFOSIZE	8
-	
-/* SPI Status register */
-#define SSPSR_TFE	1 << 0
-#define SSPSR_TNF	1 << 1 
-#define SSPSR_RNE	1 << 2
-#define SSPSR_RFF	1 << 3 
-#define SSPSR_BSY	1 << 4
-
-/* SPI 1 CR0 register */
-#define SSPCR0_DSS	1 << 0
-#define SSPCR0_FRF	1 << 4
-#define SSPCR0_CPOL	1 << 6
-#define SSPCR0_CPHA	1 << 7
-#define SSPCR0_SCR	1 << 8
-
-/* SPI 1 CR1 register */
-#define SSPCR1_LBM	1 << 0
-#define SSPCR1_SSE	1 << 1
-#define SSPCR1_MS	1 << 2
-#define SSPCR1_SOD	1 << 3
-
-/* SPI 1 Interrupt Mask Set/Clear register */
-#define SSPIMSC_RORIM	1 << 0
-#define SSPIMSC_RTIM	1 << 1
-#define SSPIMSC_RXIM	1 << 2
-#define SSPIMSC_TXIM	1 << 3
-
-/* SPI 1 Interrupt Status register */
-#define SSPRIS_RORRIS	1 << 0
-#define SSPRIS_RTRIS	1 << 1
-#define SSPRIS_RXRIS	1 << 2
-#define SSPRIS_TXRIS	1 << 3
-
-/* SPI 1 Masked Interrupt register */
-#define SSPMIS_RORMIS	1 << 0
-#define SSPMIS_RTMIS	1 << 1
-#define SSPMIS_RXMIS	1 << 2
-#define SSPMIS_TXMIS	1 << 3
-
-/* SPI 1 Interrupt clear register */
-#define SSPICR_RORIC	1 << 0
-#define SSPICR_RTIC	1 << 1
-
-extern void SSPHandler (void) __irq;
-int LL_write(unsigned char *, unsigned short, unsigned char);
-void LL_write_init(void);
-
-unsigned char IMU_CalcData_updated;
-
-#endif  /* __SSP_H__ */
-/*****************************************************************************
-**                            End Of File
-******************************************************************************/
-
diff --git a/ccny_asctec_firmware_2/include/ccny_asctec_firmware/system.h b/ccny_asctec_firmware_2/include/ccny_asctec_firmware/system.h
deleted file mode 100644
index eeb4d56..0000000
--- a/ccny_asctec_firmware_2/include/ccny_asctec_firmware/system.h
+++ /dev/null
@@ -1,103 +0,0 @@
-#ifndef SYSTEM_H_
-#define SYSTEM_H_
-
-extern unsigned int processorClockFrequency(void);
-extern unsigned int peripheralClockFrequency(void);
-extern void delay(int);
-extern void init(void);
-extern void pll_init(void);
-extern void pll_feed(void);
-extern void init_timer0(void);
-extern void init_timer1(void);
-extern void init_interrupts(void);
-extern void init_ports(void);
-extern void init_spi(void);
-extern void init_pwm(void);
-extern void init_get_calibdata_from_flash(void);
-extern void write_calibdata_to_flash(void);
-extern void init_spi1(void);
-extern void SPI1Send(char *, unsigned int, unsigned char);
-extern void PWM_Init( void );
-extern void SPI_get_data(unsigned int);
-
-extern unsigned char CAM_Commands_received;
-
-struct HL_STATUS {
-      short battery_voltage_1;
-      short battery_voltage_2;
-      
-      short up_time; 
-      short flight_time;
-      
-      int latitude;
-      int longitude;
-      
-      short status;
-      short cpu_load;
-      short yawenabled;
-      short chksum_error;
-};
-
-extern struct HL_STATUS HL_Status;
-
-
-//PWM defines
-#define PWM_CYCLE		1200
-#define PWM_OFFSET		200
-
-#define MR0_INT			1 << 0
-#define MR1_INT			1 << 1
-#define MR2_INT			1 << 2
-#define MR3_INT			1 << 3
-#define MR4_INT			1 << 8
-#define MR5_INT			1 << 9
-#define MR6_INT			1 << 10
-
-#define TCR_CNT_EN		0x00000001
-#define TCR_RESET		0x00000002
-#define TCR_PWM_EN		0x00000008
-
-#define PWMMR0I			1 << 0
-#define PWMMR0R			1 << 1
-#define PWMMR0S			1 << 2
-#define PWMMR1I			1 << 3
-#define PWMMR1R			1 << 4
-#define PWMMR1S			1 << 5
-#define PWMMR2I			1 << 6
-#define PWMMR2R			1 << 7
-#define PWMMR2S			1 << 8
-#define PWMMR3I			1 << 9
-#define PWMMR3R			1 << 10
-#define PWMMR3S			1 << 11
-#define PWMMR4I			1 << 12
-#define PWMMR4R			1 << 13
-#define PWMMR4S			1 << 14
-#define PWMMR5I			1 << 15
-#define PWMMR5R			1 << 16
-#define PWMMR5S			1 << 17
-#define PWMMR6I			1 << 18
-#define PWMMR6R			1 << 19
-#define PWMMR6S			1 << 20
-
-#define PWMSEL2			1 << 2
-#define PWMSEL3			1 << 3
-#define PWMSEL4			1 << 4
-#define PWMSEL5			1 << 5
-#define PWMSEL6			1 << 6
-#define PWMENA1			1 << 9
-#define PWMENA2			1 << 10
-#define PWMENA3			1 << 11
-#define PWMENA4			1 << 12
-#define PWMENA5			1 << 13
-#define PWMENA6			1 << 14
-
-#define LER0_EN			1 << 0
-#define LER1_EN			1 << 1
-#define LER2_EN			1 << 2
-#define LER3_EN			1 << 3
-#define LER4_EN			1 << 4
-#define LER5_EN			1 << 5
-#define LER6_EN			1 << 6
-
-#endif /*SYSTEM_H_*/
-
diff --git a/ccny_asctec_firmware_2/include/ccny_asctec_firmware/types.h b/ccny_asctec_firmware_2/include/ccny_asctec_firmware/types.h
deleted file mode 100644
index b882e91..0000000
--- a/ccny_asctec_firmware_2/include/ccny_asctec_firmware/types.h
+++ /dev/null
@@ -1,43 +0,0 @@
-/****************************************************************************
-*
-*   Copyright (c) 2006 Carrick Detweiler
-*                      and Massachusetts Institute of Technology
-*
-*   This program is free software; you can redistribute it and/or modify
-*   it under the terms of the GNU General Public License as published by
-*   the Free Software Foundation; either version 2 of the License, or
-*   (at your option) any later version.
-*
-*   This program is distributed in the hope that it will be useful,
-*   but WITHOUT ANY WARRANTY; without even the implied warranty of
-*   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-*   GNU General Public License for more details.
-*
-*   You should have received a copy of the GNU General Public License
-*   along with this program; if not, write to the Free Software
-*   Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
-*
-*   $Id: types.h 142 2007-01-05 17:10:44Z carrick $
-****************************************************************************/
-
-
-#if !defined( TYPES_H )
-#define TYPES_H
-
-/**
- * Different types that are needed.  It is assumed that the type is
- * signed unless they are eu types in which case they should be
- * unsigned.  Ideally (perhaps required?) that they have they same bit
- * length as indicated (eg uint8_t is an unsigned 8-bit type).
- **/
-#define eint8 signed char
-#define euint8 unsigned char
-#define eint16 signed short
-#define euint16 unsigned short
-#define eint32 signed int
-#define euint32 unsigned int
-#define echar char
-#define euchar unsigned char
-
-
-#endif /* TYPES_H */
diff --git a/ccny_asctec_firmware_2/include/ccny_asctec_firmware/uart.h b/ccny_asctec_firmware_2/include/ccny_asctec_firmware/uart.h
deleted file mode 100644
index 439d81e..0000000
--- a/ccny_asctec_firmware_2/include/ccny_asctec_firmware/uart.h
+++ /dev/null
@@ -1,76 +0,0 @@
-#ifndef __UART_H
-#define __UART_H
-
-#include <inttypes.h>
-#include <mav_common/comm_packets.h>
-
-extern void UARTInitialize(unsigned int);
-extern void UARTWriteChar(unsigned char);
-extern unsigned char UARTReadChar(void);
-extern void __putchar(int);
-extern void UART_send(char *, unsigned char);
-extern void UART_send_ringbuffer(void);
-extern int ringbuffer(unsigned char, unsigned char*, unsigned int);
-
-void startAutoBaud(void);
-volatile extern char autobaud_in_progress;
-
-inline int writePacket2Ringbuffer(uint8_t descriptor, void * data, uint8_t length);
-extern void uart0ISR(void);
-
-extern uint16_t crc16(void *, uint16_t count, uint16_t prev_crc);
-extern uint16_t crc_update(uint16_t, uint8_t);
-
-#define RBREAD 0
-#define RBWRITE 1
-#define RBFREE  2 
-#define RINGBUFFERSIZE	384
-
-int UART0_txEmpty(void);
-void UART0_rxFlush(void);
-void UART0_txFlush(void);
-uint8_t UART0_writeFifo(void * data, uint32_t length);
-
-// this has to be 2^n !!!
-#define UART0_RX_BUFFERSIZE 512
-#define UART0_TX_BUFFERSIZE 512
-
-// not more than 64 different packettypes
-#define PACKET_INFO_SIZE 64
-
-typedef struct
-{
-  uint8_t descriptor;
-  void * data;
-  uint8_t updated;
-} PacketInfo;
-
-extern volatile unsigned int UART_rxPacketCount;
-extern volatile unsigned int UART_rxGoodPacketCount;
-
-typedef struct
-{
-  uint8_t *buffer;
-  uint8_t inUse;
-  uint32_t bufferSize;
-  uint32_t readIdx;
-  uint32_t writeIdx;
-  uint32_t tmp;
-  uint32_t mask;
-}volatile Fifo;
-
-extern short uart0_min_tx_buffer;
-extern short uart0_min_rx_buffer;
-
-void Fifo_initialize(Fifo * fifo, uint8_t * buffer, uint32_t bufferSize);
-inline uint8_t Fifo_writeByte(Fifo * fifo, uint8_t byte);
-inline uint8_t Fifo_writeBlock(Fifo * fifo, void *data, uint32_t length);
-inline uint8_t Fifo_readByte(Fifo * fifo, uint8_t * byte);
-inline uint16_t Fifo_availableMemory(Fifo * fifo);
-inline void Fifo_reset(Fifo * fifo);
-
-void parseRxFifo(void);
-
-PacketInfo* registerPacket(uint8_t descriptor, void * data);
-
-#endif //__UART_H
diff --git a/ccny_asctec_firmware_2/include/ccny_asctec_firmware/uart1.h b/ccny_asctec_firmware_2/include/ccny_asctec_firmware/uart1.h
deleted file mode 100644
index 7e0ae54..0000000
--- a/ccny_asctec_firmware_2/include/ccny_asctec_firmware/uart1.h
+++ /dev/null
@@ -1,35 +0,0 @@
-
-#ifndef __UART1_H
-#define __UART1_H
-
-extern void UART1Initialize(unsigned int baud);
-
-extern void UART1WriteChar(unsigned char);
-extern unsigned char UART1ReadChar(void);
-extern void UART1_send(unsigned char *, unsigned char);
-extern void UART1_send_ringbuffer(void);
-extern int ringbuffer1(unsigned char, unsigned char*, unsigned int);
-extern void uart1ISR(void);
-extern void GPS_configure(void);
-
-extern unsigned char send_buffer[16];
-extern unsigned char chksum_trigger;
-extern unsigned char UART_CalibDoneFlag;
-extern unsigned char trigger_transmission;
-extern unsigned char transmission1_running;
-
-#define RBREAD 0
-#define RBWRITE 1
-#define RBFREE  2 
-#define RINGBUFFERSIZE	384
-
-#define RX_IDLE 0
-#define RX_ACTSYNC1 1
-#define RX_ACTSYNC2 2
-#define RX_ACTDATA 3
-#define RX_ACTCHKSUM 4
-
-#define GPSCONF_TIMEOUT 200
-
-#endif //__UART_H
-
diff --git a/ccny_asctec_firmware_2/include/ccny_asctec_firmware/util.h b/ccny_asctec_firmware_2/include/ccny_asctec_firmware/util.h
deleted file mode 100644
index 054bd39..0000000
--- a/ccny_asctec_firmware_2/include/ccny_asctec_firmware/util.h
+++ /dev/null
@@ -1,11 +0,0 @@
-#ifndef UTIL_H
-#define UTIL_H
-
-#include <stdint.h>
-#include "LPC214x.h"
-
-extern volatile int64_t g_timestamp;
-
-void wait(int usec);
-
-#endif // UTIL_H
diff --git a/ccny_asctec_firmware_2/main.bin b/ccny_asctec_firmware_2/main.bin
deleted file mode 100644
index d9cd98a..0000000
Binary files a/ccny_asctec_firmware_2/main.bin and /dev/null differ
diff --git a/ccny_asctec_firmware_2/main.elf b/ccny_asctec_firmware_2/main.elf
deleted file mode 100644
index 3b32adf..0000000
Binary files a/ccny_asctec_firmware_2/main.elf and /dev/null differ
diff --git a/ccny_asctec_firmware_2/main.hex b/ccny_asctec_firmware_2/main.hex
deleted file mode 100644
index 919b05c..0000000
--- a/ccny_asctec_firmware_2/main.hex
+++ /dev/null
@@ -1,5676 +0,0 @@
-:1000000018F09FE518F09FE518F09FE518F09FE5C0
-:1000100018F09FE50000A0E118F09FE518F09FE5BB
-:10002000680100004000000098000000440000004B
-:100030004800000000000000500000004C000000DC
-:10004000FEFFFFEAFEFFFFEAFEFFFFEAFEFFFFEA18
-:1000500004E04EE200402DE900E04FE100402DE9D0
-:1000600001002DE928E09FE530009EE593F021E3B3
-:10007000FE5F2DE90FE0A0E110FF2FE1FE5FBDE87C
-:1000800092F021E30100BDE80040BDE80EF06FE111
-:100090000080FDE800F0FFFF10402DE900404FE137
-:1000A000200014E3B2405E11FF4CC41304401E054F
-:1000B000FF44C403060054E304F19F97FEFFFFEAE8
-:1000C000DC000000EC000000FC000000100100005B
-:1000D000240100002C0100004801000000004FE155
-:1000E000804080E304F061E11D0000EA00004FE180
-:1000F0008040C0E304F061E1190000EA00004FE134
-:10010000404080E3400000E204F061E1140000EAB6
-:1001100000004FE14040C0E3400000E204F061E134
-:100120000F0000EA00004FE10D0000EA00404FE13F
-:10013000800000E2800010E38040C403804084130C
-:1001400004F061E1060000EA00404FE1400000E2F7
-:10015000400010E34040C4034040841304F061E1D8
-:10016000FFFFFFEA1080FDE828019FE50010A0E3F3
-:10017000001080E520019FE5AA10A0E35520A0E330
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diff --git a/ccny_asctec_firmware_2/main.lss b/ccny_asctec_firmware_2/main.lss
deleted file mode 100644
index 4204f40..0000000
--- a/ccny_asctec_firmware_2/main.lss
+++ /dev/null
@@ -1,28940 +0,0 @@
-
-main.elf:     file format elf32-littlearm
-
-Sections:
-Idx Name          Size      VMA       LMA       File off  Algn
-  0 .text         00015a50  00000000  00000000  00008000  2**2
-                  CONTENTS, ALLOC, LOAD, READONLY, CODE
-  1 .data         00000844  40000000  00015a50  00020000  2**2
-                  CONTENTS, ALLOC, LOAD, DATA
-  2 .bss          000017a8  40000844  40000844  00020844  2**2
-                  ALLOC
-  3 .stack        00001a00  40002000  40002000  00020850  2**4
-                  CONTENTS
-  4 .comment      000007ce  00000000  00000000  00022250  2**0
-                  CONTENTS, READONLY
-  5 .debug_aranges 000001e0  00000000  00000000  00022a20  2**3
-                  CONTENTS, READONLY, DEBUGGING
-  6 .debug_pubnames 0000003f  00000000  00000000  00022c00  2**0
-                  CONTENTS, READONLY, DEBUGGING
-  7 .debug_info   00000e61  00000000  00000000  00022c3f  2**0
-                  CONTENTS, READONLY, DEBUGGING
-  8 .debug_abbrev 000002f3  00000000  00000000  00023aa0  2**0
-                  CONTENTS, READONLY, DEBUGGING
-  9 .debug_line   00000b83  00000000  00000000  00023d93  2**0
-                  CONTENTS, READONLY, DEBUGGING
- 10 .debug_frame  000000dc  00000000  00000000  00024918  2**2
-                  CONTENTS, READONLY, DEBUGGING
- 11 .debug_str    00000161  00000000  00000000  000249f4  2**0
-                  CONTENTS, READONLY, DEBUGGING
- 12 .debug_loc    00000cd9  00000000  00000000  00024b55  2**0
-                  CONTENTS, READONLY, DEBUGGING
- 13 .debug_ranges 000001c0  00000000  00000000  0002582e  2**0
-                  CONTENTS, READONLY, DEBUGGING
-Disassembly of section .text:
-
-00000000 <__Vectors>:
-       0:	e59ff018 	ldr	pc, [pc, #24]	; 20 <T_Bit>
-       4:	e59ff018 	ldr	pc, [pc, #24]	; 24 <PLLCFG_Val>
-       8:	e59ff018 	ldr	pc, [pc, #24]	; 28 <SWI_Addr>
-       c:	e59ff018 	ldr	pc, [pc, #24]	; 2c <PAbt_Addr>
-      10:	e59ff018 	ldr	pc, [pc, #24]	; 30 <VIC_vect_offs>
-      14:	e1a00000 	nop			(mov r0,r0)
-      18:	e59ff018 	ldr	pc, [pc, #24]	; 38 <IRQ_Wrapper_Addr>
-      1c:	e59ff018 	ldr	pc, [pc, #24]	; 3c <FIQ_Addr>
-
-00000020 <Reset_Addr>:
-      20:	00000168 	andeq	r0, r0, r8, ror #2
-
-00000024 <Undef_Addr>:
-      24:	00000040 	andeq	r0, r0, r0, asr #32
-
-00000028 <SWI_Addr>:
-      28:	00000098 	muleq	r0, r8, r0
-
-0000002c <PAbt_Addr>:
-      2c:	00000044 	andeq	r0, r0, r4, asr #32
-
-00000030 <DAbt_Addr>:
-      30:	00000048 	andeq	r0, r0, r8, asr #32
-      34:	00000000 	andeq	r0, r0, r0
-
-00000038 <IRQ_Wrapper_Addr>:
-      38:	00000050 	andeq	r0, r0, r0, asr r0
-
-0000003c <FIQ_Addr>:
-      3c:	0000004c 	andeq	r0, r0, ip, asr #32
-
-00000040 <Undef_Handler>:
-      40:	eafffffe 	b	40 <F_Bit>
-
-00000044 <PAbt_Handler>:
-      44:	eafffffe 	b	44 <PAbt_Handler>
-
-00000048 <DAbt_Handler>:
-      48:	eafffffe 	b	48 <DAbt_Handler>
-
-0000004c <FIQ_Handler>:
-      4c:	eafffffe 	b	4c <FIQ_Handler>
-
-00000050 <__IRQ_Wrapper>:
-      50:	e24ee004 	sub	lr, lr, #4	; 0x4
-      54:	e92d4000 	stmdb	sp!, {lr}
-      58:	e14fe000 	mrs	lr, SPSR
-      5c:	e92d4000 	stmdb	sp!, {lr}
-      60:	e92d0001 	stmdb	sp!, {r0}
-      64:	e59fe028 	ldr	lr, [pc, #40]	; 94 <.text+0x94>
-      68:	e59e0030 	ldr	r0, [lr, #48]
-      6c:	e321f093 	msr	CPSR_c, #147	; 0x93
-      70:	e92d5ffe 	stmdb	sp!, {r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp, ip, lr}
-      74:	e1a0e00f 	mov	lr, pc
-      78:	e12fff10 	bx	r0
-      7c:	e8bd5ffe 	ldmia	sp!, {r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp, ip, lr}
-      80:	e321f092 	msr	CPSR_c, #146	; 0x92
-      84:	e8bd0001 	ldmia	sp!, {r0}
-      88:	e8bd4000 	ldmia	sp!, {lr}
-      8c:	e16ff00e 	msr	SPSR_fsxc, lr
-      90:	e8fd8000 	ldmia	sp!, {pc}^
-      94:	fffff000 	undefined instruction 0xfffff000
-
-00000098 <SoftwareInterrupt>:
-      98:	e92d4010 	stmdb	sp!, {r4, lr}
-      9c:	e14f4000 	mrs	r4, SPSR
-      a0:	e3140020 	tst	r4, #32	; 0x20
-      a4:	115e40b2 	ldrneh	r4, [lr, #-2]
-      a8:	13c44cff 	bicne	r4, r4, #65280	; 0xff00
-      ac:	051e4004 	ldreq	r4, [lr, #-4]
-      b0:	03c444ff 	biceq	r4, r4, #-16777216	; 0xff000000
-      b4:	e3540006 	cmp	r4, #6	; 0x6
-      b8:	979ff104 	ldrls	pc, [pc, r4, lsl #2]
-
-000000bc <SWIOutOfRange>:
-      bc:	eafffffe 	b	bc <SWIOutOfRange>
-
-000000c0 <SwiTableStart>:
-      c0:	000000dc 	ldreqd	r0, [r0], -ip
-      c4:	000000ec 	andeq	r0, r0, ip, ror #1
-      c8:	000000fc 	streqd	r0, [r0], -ip
-      cc:	00000110 	andeq	r0, r0, r0, lsl r1
-      d0:	00000124 	andeq	r0, r0, r4, lsr #2
-      d4:	0000012c 	andeq	r0, r0, ip, lsr #2
-      d8:	00000148 	andeq	r0, r0, r8, asr #2
-
-000000dc <IRQDisable>:
-      dc:	e14f0000 	mrs	r0, SPSR
-      e0:	e3804080 	orr	r4, r0, #128	; 0x80
-      e4:	e161f004 	msr	SPSR_c, r4
-      e8:	ea00001d 	b	164 <EndofSWI>
-
-000000ec <IRQEnable>:
-      ec:	e14f0000 	mrs	r0, SPSR
-      f0:	e3c04080 	bic	r4, r0, #128	; 0x80
-      f4:	e161f004 	msr	SPSR_c, r4
-      f8:	ea000019 	b	164 <EndofSWI>
-
-000000fc <FIQDisable>:
-      fc:	e14f0000 	mrs	r0, SPSR
-     100:	e3804040 	orr	r4, r0, #64	; 0x40
-     104:	e2000040 	and	r0, r0, #64	; 0x40
-     108:	e161f004 	msr	SPSR_c, r4
-     10c:	ea000014 	b	164 <EndofSWI>
-
-00000110 <FIQEnable>:
-     110:	e14f0000 	mrs	r0, SPSR
-     114:	e3c04040 	bic	r4, r0, #64	; 0x40
-     118:	e2000040 	and	r0, r0, #64	; 0x40
-     11c:	e161f004 	msr	SPSR_c, r4
-     120:	ea00000f 	b	164 <EndofSWI>
-
-00000124 <CPSRget>:
-     124:	e14f0000 	mrs	r0, SPSR
-     128:	ea00000d 	b	164 <EndofSWI>
-
-0000012c <IRQRestore>:
-     12c:	e14f4000 	mrs	r4, SPSR
-     130:	e2000080 	and	r0, r0, #128	; 0x80
-     134:	e3100080 	tst	r0, #128	; 0x80
-     138:	03c44080 	biceq	r4, r4, #128	; 0x80
-     13c:	13844080 	orrne	r4, r4, #128	; 0x80
-     140:	e161f004 	msr	SPSR_c, r4
-     144:	ea000006 	b	164 <EndofSWI>
-
-00000148 <FIQRestore>:
-     148:	e14f4000 	mrs	r4, SPSR
-     14c:	e2000040 	and	r0, r0, #64	; 0x40
-     150:	e3100040 	tst	r0, #64	; 0x40
-     154:	03c44040 	biceq	r4, r4, #64	; 0x40
-     158:	13844040 	orrne	r4, r4, #64	; 0x40
-     15c:	e161f004 	msr	SPSR_c, r4
-     160:	eaffffff 	b	164 <EndofSWI>
-
-00000164 <EndofSWI>:
-     164:	e8fd8010 	ldmia	sp!, {r4, pc}^
-
-00000168 <__startup>:
-     168:	e59f0128 	ldr	r0, [pc, #296]	; 298 <.text+0x298>
-     16c:	e3a01000 	mov	r1, #0	; 0x0
-     170:	e5801000 	str	r1, [r0]
-     174:	e59f0120 	ldr	r0, [pc, #288]	; 29c <.text+0x29c>
-     178:	e3a010aa 	mov	r1, #170	; 0xaa
-     17c:	e3a02055 	mov	r2, #85	; 0x55
-     180:	e3a03024 	mov	r3, #36	; 0x24
-     184:	e5803004 	str	r3, [r0, #4]
-     188:	e3a03001 	mov	r3, #1	; 0x1
-     18c:	e5803000 	str	r3, [r0]
-     190:	e580100c 	str	r1, [r0, #12]
-     194:	e580200c 	str	r2, [r0, #12]
-
-00000198 <PLL_Loop>:
-     198:	e5903008 	ldr	r3, [r0, #8]
-     19c:	e2133b01 	ands	r3, r3, #1024	; 0x400
-     1a0:	0afffffc 	beq	198 <PLL_Loop>
-     1a4:	e3a03003 	mov	r3, #3	; 0x3
-     1a8:	e5803000 	str	r3, [r0]
-     1ac:	e580100c 	str	r1, [r0, #12]
-     1b0:	e580200c 	str	r2, [r0, #12]
-     1b4:	e59f00e4 	ldr	r0, [pc, #228]	; 2a0 <.text+0x2a0>
-     1b8:	e3a01004 	mov	r1, #4	; 0x4
-     1bc:	e5801004 	str	r1, [r0, #4]
-     1c0:	e3a01002 	mov	r1, #2	; 0x2
-     1c4:	e5801000 	str	r1, [r0]
-     1c8:	e59f00d4 	ldr	r0, [pc, #212]	; 2a4 <.text+0x2a4>
-     1cc:	e321f0db 	msr	CPSR_c, #219	; 0xdb
-     1d0:	e1a0d000 	mov	sp, r0
-     1d4:	e2400080 	sub	r0, r0, #128	; 0x80
-     1d8:	e321f0d7 	msr	CPSR_c, #215	; 0xd7
-     1dc:	e1a0d000 	mov	sp, r0
-     1e0:	e2400080 	sub	r0, r0, #128	; 0x80
-     1e4:	e321f0d1 	msr	CPSR_c, #209	; 0xd1
-     1e8:	e1a0d000 	mov	sp, r0
-     1ec:	e2400080 	sub	r0, r0, #128	; 0x80
-     1f0:	e321f0d2 	msr	CPSR_c, #210	; 0xd2
-     1f4:	e1a0d000 	mov	sp, r0
-     1f8:	e2400080 	sub	r0, r0, #128	; 0x80
-     1fc:	e321f0d3 	msr	CPSR_c, #211	; 0xd3
-     200:	e1a0d000 	mov	sp, r0
-     204:	e2400b02 	sub	r0, r0, #2048	; 0x800
-     208:	e321f010 	msr	CPSR_c, #16	; 0x10
-     20c:	e1a0d000 	mov	sp, r0
-     210:	e59f1090 	ldr	r1, [pc, #144]	; 2a8 <.text+0x2a8>
-     214:	e59f2090 	ldr	r2, [pc, #144]	; 2ac <.text+0x2ac>
-     218:	e59f3090 	ldr	r3, [pc, #144]	; 2b0 <.text+0x2b0>
-     21c:	e1520003 	cmp	r2, r3
-     220:	0a000003 	beq	234 <DataIsEmpty>
-
-00000224 <LoopRel>:
-     224:	e1520003 	cmp	r2, r3
-     228:	34910004 	ldrcc	r0, [r1], #4
-     22c:	34820004 	strcc	r0, [r2], #4
-     230:	3afffffb 	bcc	224 <LoopRel>
-
-00000234 <DataIsEmpty>:
-     234:	e3a00000 	mov	r0, #0	; 0x0
-     238:	e59f1074 	ldr	r1, [pc, #116]	; 2b4 <.text+0x2b4>
-     23c:	e59f2074 	ldr	r2, [pc, #116]	; 2b8 <.text+0x2b8>
-     240:	e1510002 	cmp	r1, r2
-     244:	0a000002 	beq	254 <BSSIsEmpty>
-
-00000248 <LoopZI>:
-     248:	e1510002 	cmp	r1, r2
-     24c:	34810004 	strcc	r0, [r1], #4
-     250:	3afffffc 	bcc	248 <LoopZI>
-
-00000254 <BSSIsEmpty>:
-     254:	e59f0060 	ldr	r0, [pc, #96]	; 2bc <.text+0x2bc>
-     258:	e59f1060 	ldr	r1, [pc, #96]	; 2c0 <.text+0x2c0>
-
-0000025c <ctor_loop>:
-     25c:	e1500001 	cmp	r0, r1
-     260:	0a000005 	beq	27c <ctor_end>
-     264:	e4902004 	ldr	r2, [r0], #4
-     268:	e92d0003 	stmdb	sp!, {r0, r1}
-     26c:	e1a0e00f 	mov	lr, pc
-     270:	e1a0f002 	mov	pc, r2
-     274:	e8bd0003 	ldmia	sp!, {r0, r1}
-     278:	eafffff7 	b	25c <ctor_loop>
-
-0000027c <ctor_end>:
-     27c:	e59f0040 	ldr	r0, [pc, #64]	; 2c4 <.text+0x2c4>
-     280:	e3100001 	tst	r0, #1	; 0x1
-     284:	059fe03c 	ldreq	lr, [pc, #60]	; 2c8 <.text+0x2c8>
-     288:	159fe03c 	ldrne	lr, [pc, #60]	; 2cc <.text+0x2cc>
-     28c:	e12fff10 	bx	r0
-
-00000290 <__exit_ARM>:
-     290:	eafffffe 	b	290 <__exit_ARM>
-
-00000294 <__exit_THUMB>:
-     294:	e7fe      	b.n	294 <__exit_THUMB>
-     296:	0000      	lsls	r0, r0, #0
-     298:	c100      	stmia	r1!, {}
-     29a:	e01f      	b.n	2dc <FiqRestore+0x4>
-     29c:	c080      	stmia	r0!, {r7}
-     29e:	e01f      	b.n	2e0 <IntGetCPSR>
-     2a0:	c000      	stmia	r0!, {}
-     2a2:	e01f      	b.n	2e4 <IntGetCPSR+0x4>
-     2a4:	3a00      	subs	r2, #0
-     2a6:	4000      	ands	r0, r0
-     2a8:	5a50      	ldrh	r0, [r2, r1]
-     2aa:	0001      	lsls	r1, r0, #0
-     2ac:	0000      	lsls	r0, r0, #0
-     2ae:	4000      	ands	r0, r0
-     2b0:	0844      	lsrs	r4, r0, #1
-     2b2:	4000      	ands	r0, r0
-     2b4:	0844      	lsrs	r4, r0, #1
-     2b6:	4000      	ands	r0, r0
-     2b8:	1fec      	subs	r4, r5, #7
-     2ba:	4000      	ands	r0, r0
-     2bc:	5a50      	ldrh	r0, [r2, r1]
-     2be:	0001      	lsls	r1, r0, #0
-     2c0:	5a50      	ldrh	r0, [r2, r1]
-     2c2:	0001      	lsls	r1, r0, #0
-     2c4:	7700      	strb	r0, [r0, #28]
-     2c6:	0000      	lsls	r0, r0, #0
-     2c8:	0290      	lsls	r0, r2, #10
-     2ca:	0000      	lsls	r0, r0, #0
-     2cc:	0294      	lsls	r4, r2, #10
-	...
-
-000002d0 <IntRestore>:
-     2d0:	ef000005 	svc	0x00000005
-     2d4:	e12fff1e 	bx	lr
-
-000002d8 <FiqRestore>:
-     2d8:	ef000006 	svc	0x00000006
-     2dc:	e12fff1e 	bx	lr
-
-000002e0 <IntGetCPSR>:
-     2e0:	ef000004 	svc	0x00000004
-     2e4:	e12fff1e 	bx	lr
-
-000002e8 <IntEnable>:
-     2e8:	ef000001 	svc	0x00000001
-     2ec:	e12fff1e 	bx	lr
-
-000002f0 <IntDisable>:
-     2f0:	ef000000 	svc	0x00000000
-     2f4:	e12fff1e 	bx	lr
-
-000002f8 <FiqEnable>:
-     2f8:	ef000003 	svc	0x00000003
-     2fc:	e12fff1e 	bx	lr
-
-00000300 <FiqDisable>:
-     300:	ef000002 	svc	0x00000002
-     304:	e12fff1e 	bx	lr
-
-00000308 <SSP_data_distribution_HL>:
-     308:	e92d45f0 	stmdb	sp!, {r4, r5, r6, r7, r8, sl, lr}
-     30c:	e59f8250 	ldr	r8, [pc, #592]	; 564 <.text+0x564>
-     310:	e1d830b0 	ldrh	r3, [r8]
-     314:	e3130008 	tst	r3, #8	; 0x8
-     318:	e2034003 	and	r4, r3, #3	; 0x3
-     31c:	159f3244 	ldrne	r3, [pc, #580]	; 568 <.text+0x568>
-     320:	13a02000 	movne	r2, #0	; 0x0
-     324:	15832000 	strne	r2, [r3]
-     328:	e1d810b6 	ldrh	r1, [r8, #6]
-     32c:	e1d830f2 	ldrsh	r3, [r8, #2]
-     330:	e1d820f4 	ldrsh	r2, [r8, #4]
-     334:	e59f7230 	ldr	r7, [pc, #560]	; 56c <.text+0x56c>
-     338:	e59f6230 	ldr	r6, [pc, #560]	; 570 <.text+0x570>
-     33c:	e1d800f8 	ldrsh	r0, [r8, #8]
-     340:	e1d8c0fa 	ldrsh	ip, [r8, #10]
-     344:	e1d8e0fc 	ldrsh	lr, [r8, #12]
-     348:	e0833103 	add	r3, r3, r3, lsl #2
-     34c:	e0822102 	add	r2, r2, r2, lsl #2
-     350:	e0811101 	add	r1, r1, r1, lsl #2
-     354:	e1a03083 	mov	r3, r3, lsl #1
-     358:	e1a02082 	mov	r2, r2, lsl #1
-     35c:	e1a01081 	mov	r1, r1, lsl #1
-     360:	e3540000 	cmp	r4, #0	; 0x0
-     364:	e5863010 	str	r3, [r6, #16]
-     368:	e5862014 	str	r2, [r6, #20]
-     36c:	e5861018 	str	r1, [r6, #24]
-     370:	e586001c 	str	r0, [r6, #28]
-     374:	e586c020 	str	ip, [r6, #32]
-     378:	e586e024 	str	lr, [r6, #36]
-     37c:	e5873000 	str	r3, [r7]
-     380:	e5872004 	str	r2, [r7, #4]
-     384:	e5871008 	str	r1, [r7, #8]
-     388:	e587000c 	str	r0, [r7, #12]
-     38c:	e587c010 	str	ip, [r7, #16]
-     390:	e587e014 	str	lr, [r7, #20]
-     394:	e1a05007 	mov	r5, r7
-     398:	e1a0a006 	mov	sl, r6
-     39c:	1a000025 	bne	438 <PLLSTAT_PLOCK+0x38>
-     3a0:	e59f01cc 	ldr	r0, [pc, #460]	; 574 <.text+0x574>
-     3a4:	e1a01006 	mov	r1, r6
-     3a8:	e1a02008 	mov	r2, r8
-     3ac:	e288c008 	add	ip, r8, #8	; 0x8
-     3b0:	e1a0e008 	mov	lr, r8
-     3b4:	e5d2300e 	ldrb	r3, [r2, #14]
-     3b8:	e2822001 	add	r2, r2, #1	; 0x1
-     3bc:	e1a03203 	mov	r3, r3, lsl #4
-     3c0:	e15c0002 	cmp	ip, r2
-     3c4:	e0c130b2 	strh	r3, [r1], #2
-     3c8:	e0c030b2 	strh	r3, [r0], #2
-     3cc:	1afffff8 	bne	3b4 <SSP_data_distribution_HL+0xac>
-     3d0:	e1de32f4 	ldrsh	r3, [lr, #36]
-     3d4:	e1de22f0 	ldrsh	r2, [lr, #32]
-     3d8:	e1de12f2 	ldrsh	r1, [lr, #34]
-     3dc:	e0833103 	add	r3, r3, r3, lsl #2
-     3e0:	e0822102 	add	r2, r2, r2, lsl #2
-     3e4:	e0811101 	add	r1, r1, r1, lsl #2
-     3e8:	e1a03883 	mov	r3, r3, lsl #17
-     3ec:	e1a00823 	mov	r0, r3, lsr #16
-     3f0:	e1a02882 	mov	r2, r2, lsl #17
-     3f4:	e1a01881 	mov	r1, r1, lsl #17
-     3f8:	e1a0c822 	mov	ip, r2, lsr #16
-     3fc:	e1a01821 	mov	r1, r1, lsr #16
-     400:	e3500000 	cmp	r0, #0	; 0x0
-     404:	e1c501bc 	strh	r0, [r5, #28]
-     408:	e1c5c1b8 	strh	ip, [r5, #24]
-     40c:	e1c511ba 	strh	r1, [r5, #26]
-     410:	1a000024 	bne	4a8 <.text+0x4a8>
-     414:	e2882018 	add	r2, r8, #24	; 0x18
-     418:	e892000c 	ldmia	r2, {r2, r3}
-     41c:	e58a3084 	str	r3, [sl, #132]
-     420:	e1cac2b8 	strh	ip, [sl, #40]
-     424:	e1ca12ba 	strh	r1, [sl, #42]
-     428:	e1ca02bc 	strh	r0, [sl, #44]
-     42c:	e58a2080 	str	r2, [sl, #128]
-     430:	e8bd45f0 	ldmia	sp!, {r4, r5, r6, r7, r8, sl, lr}
-     434:	e12fff1e 	bx	lr
-     438:	e3540001 	cmp	r4, #1	; 0x1
-     43c:	0a000021 	beq	4c8 <.text+0x4c8>
-     440:	e3540002 	cmp	r4, #2	; 0x2
-     444:	1afffff9 	bne	430 <PLLSTAT_PLOCK+0x30>
-     448:	e1d835fa 	ldrsh	r3, [r8, #90]
-     44c:	e1a030c3 	mov	r3, r3, asr #1
-     450:	e1d814f2 	ldrsh	r1, [r8, #66]
-     454:	e1d804f4 	ldrsh	r0, [r8, #68]
-     458:	e1d824f6 	ldrsh	r2, [r8, #70]
-     45c:	e203307f 	and	r3, r3, #127	; 0x7f
-     460:	e2433001 	sub	r3, r3, #1	; 0x1
-     464:	e5862038 	str	r2, [r6, #56]
-     468:	e5872038 	str	r2, [r7, #56]
-     46c:	e5861030 	str	r1, [r6, #48]
-     470:	e5860034 	str	r0, [r6, #52]
-     474:	e5871030 	str	r1, [r7, #48]
-     478:	e5870034 	str	r0, [r7, #52]
-     47c:	e3530007 	cmp	r3, #7	; 0x7
-     480:	979ff103 	ldrls	pc, [pc, r3, lsl #2]
-     484:	eaffffe9 	b	430 <PLLSTAT_PLOCK+0x30>
-     488:	00000524 	andeq	r0, r0, r4, lsr #10
-     48c:	00000430 	andeq	r0, r0, r0, lsr r4
-     490:	00000430 	andeq	r0, r0, r0, lsr r4
-     494:	00000430 	andeq	r0, r0, r0, lsr r4
-     498:	00000430 	andeq	r0, r0, r0, lsr r4
-     49c:	00000534 	andeq	r0, r0, r4, lsr r5
-     4a0:	00000544 	andeq	r0, r0, r4, asr #10
-     4a4:	00000554 	andeq	r0, r0, r4, asr r5
-     4a8:	e59f20c8 	ldr	r2, [pc, #200]	; 578 <.text+0x578>
-     4ac:	e5d23000 	ldrb	r3, [r2]
-     4b0:	e3530009 	cmp	r3, #9	; 0x9
-     4b4:	95d23000 	ldrlsb	r3, [r2]
-     4b8:	92833001 	addls	r3, r3, #1	; 0x1
-     4bc:	920330ff 	andls	r3, r3, #255	; 0xff
-     4c0:	95c23000 	strlsb	r3, [r2]
-     4c4:	eaffffd2 	b	414 <PLLSTAT_PLOCK+0x14>
-     4c8:	e1d834f0 	ldrsh	r3, [r8, #64]
-     4cc:	e598503c 	ldr	r5, [r8, #60]
-     4d0:	e5d8202d 	ldrb	r2, [r8, #45]
-     4d4:	e5d81028 	ldrb	r1, [r8, #40]
-     4d8:	e5d80029 	ldrb	r0, [r8, #41]
-     4dc:	e5d8c02a 	ldrb	ip, [r8, #42]
-     4e0:	e5d8e02b 	ldrb	lr, [r8, #43]
-     4e4:	e5d8402c 	ldrb	r4, [r8, #44]
-     4e8:	e5873050 	str	r3, [r7, #80]
-     4ec:	e586307c 	str	r3, [r6, #124]
-     4f0:	e1d833b8 	ldrh	r3, [r8, #56]
-     4f4:	e1d883ba 	ldrh	r8, [r8, #58]
-     4f8:	e5c62041 	strb	r2, [r6, #65]
-     4fc:	e5865078 	str	r5, [r6, #120]
-     500:	e5c6103c 	strb	r1, [r6, #60]
-     504:	e5c6003d 	strb	r0, [r6, #61]
-     508:	e5c6c03e 	strb	ip, [r6, #62]
-     50c:	e5c6e03f 	strb	lr, [r6, #63]
-     510:	e5c64040 	strb	r4, [r6, #64]
-     514:	e587504c 	str	r5, [r7, #76]
-     518:	e1c638b8 	strh	r3, [r6, #136]
-     51c:	e1c688ba 	strh	r8, [r6, #138]
-     520:	eaffffc2 	b	430 <PLLSTAT_PLOCK+0x30>
-     524:	e59f3050 	ldr	r3, [pc, #80]	; 57c <.text+0x57c>
-     528:	e1d885b4 	ldrh	r8, [r8, #84]
-     52c:	e1c380b6 	strh	r8, [r3, #6]
-     530:	eaffffbe 	b	430 <PLLSTAT_PLOCK+0x30>
-     534:	e59f3044 	ldr	r3, [pc, #68]	; 580 <.text+0x580>
-     538:	e1d885b4 	ldrh	r8, [r8, #84]
-     53c:	e1c380b0 	strh	r8, [r3]
-     540:	eaffffba 	b	430 <PLLSTAT_PLOCK+0x30>
-     544:	e59f3038 	ldr	r3, [pc, #56]	; 584 <.text+0x584>
-     548:	e1d885b4 	ldrh	r8, [r8, #84]
-     54c:	e1c380b0 	strh	r8, [r3]
-     550:	eaffffb6 	b	430 <PLLSTAT_PLOCK+0x30>
-     554:	e1d825b4 	ldrh	r2, [r8, #84]
-     558:	e59f3028 	ldr	r3, [pc, #40]	; 588 <.text+0x588>
-     55c:	e5c32000 	strb	r2, [r3]
-     560:	eaffffb2 	b	430 <PLLSTAT_PLOCK+0x30>
-     564:	40000b44 	andmi	r0, r0, r4, asr #22
-     568:	4000085c 	andmi	r0, r0, ip, asr r8
-     56c:	400013e0 	andmi	r1, r0, r0, ror #7
-     570:	40000d50 	andmi	r0, r0, r0, asr sp
-     574:	4000116c 	andmi	r1, r0, ip, ror #2
-     578:	400008ac 	andmi	r0, r0, ip, lsr #17
-     57c:	40001474 	andmi	r1, r0, r4, ror r4
-     580:	4000084a 	andmi	r0, r0, sl, asr #16
-     584:	4000084c 	andmi	r0, r0, ip, asr #16
-     588:	40000848 	andmi	r0, r0, r8, asr #16
-
-0000058c <LL_write_ctrl_data>:
-     58c:	e31000ff 	tst	r0, #255	; 0xff
-     590:	e92d4030 	stmdb	sp!, {r4, r5, lr}
-     594:	e59fc0f8 	ldr	ip, [pc, #248]	; 694 <.text+0x694>
-     598:	e59f50f8 	ldr	r5, [pc, #248]	; 698 <.text+0x698>
-     59c:	e3e03c55 	mvn	r3, #21760	; 0x5500
-     5a0:	159f00f4 	ldrne	r0, [pc, #244]	; 69c <.text+0x69c>
-     5a4:	e3a0102a 	mov	r1, #42	; 0x2a
-     5a8:	e2433055 	sub	r3, r3, #85	; 0x55
-     5ac:	e3a0203e 	mov	r2, #62	; 0x3e
-     5b0:	e5c51001 	strb	r1, [r5, #1]
-     5b4:	e5c52000 	strb	r2, [r5]
-     5b8:	e1cc30b0 	strh	r3, [ip]
-     5bc:	11a01005 	movne	r1, r5
-     5c0:	1280e014 	addne	lr, r0, #20	; 0x14
-     5c4:	1a000019 	bne	630 <LL_write_ctrl_data+0xa4>
-     5c8:	e59f00cc 	ldr	r0, [pc, #204]	; 69c <.text+0x69c>
-     5cc:	e1a01005 	mov	r1, r5
-     5d0:	e280e026 	add	lr, r0, #38	; 0x26
-     5d4:	e4d02001 	ldrb	r2, [r0], #1
-     5d8:	e1dc30b0 	ldrh	r3, [ip]
-     5dc:	e0833002 	add	r3, r3, r2
-     5e0:	e1a03803 	mov	r3, r3, lsl #16
-     5e4:	e1a03823 	mov	r3, r3, lsr #16
-     5e8:	e15e0000 	cmp	lr, r0
-     5ec:	e5c12002 	strb	r2, [r1, #2]
-     5f0:	e1cc30b0 	strh	r3, [ip]
-     5f4:	e2811001 	add	r1, r1, #1	; 0x1
-     5f8:	1afffff5 	bne	5d4 <LL_write_ctrl_data+0x48>
-     5fc:	e1dc00b0 	ldrh	r0, [ip]
-     600:	e1dc30b0 	ldrh	r3, [ip]
-     604:	e1a03423 	mov	r3, r3, lsr #8
-     608:	e5c53029 	strb	r3, [r5, #41]
-     60c:	e59f308c 	ldr	r3, [pc, #140]	; 6a0 <.text+0x6a0>
-     610:	e3a0202a 	mov	r2, #42	; 0x2a
-     614:	e5832000 	str	r2, [r3]
-     618:	e59f3084 	ldr	r3, [pc, #132]	; 6a4 <.text+0x6a4>
-     61c:	e3a01000 	mov	r1, #0	; 0x0
-     620:	e5c31000 	strb	r1, [r3]
-     624:	e5c50028 	strb	r0, [r5, #40]
-     628:	e8bd4030 	ldmia	sp!, {r4, r5, lr}
-     62c:	e12fff1e 	bx	lr
-     630:	e4d02001 	ldrb	r2, [r0], #1
-     634:	e1dc30b0 	ldrh	r3, [ip]
-     638:	e0833002 	add	r3, r3, r2
-     63c:	e1a03803 	mov	r3, r3, lsl #16
-     640:	e1a03823 	mov	r3, r3, lsr #16
-     644:	e150000e 	cmp	r0, lr
-     648:	e5c12002 	strb	r2, [r1, #2]
-     64c:	e1cc30b0 	strh	r3, [ip]
-     650:	e2811001 	add	r1, r1, #1	; 0x1
-     654:	1afffff5 	bne	630 <LL_write_ctrl_data+0xa4>
-     658:	e59fe038 	ldr	lr, [pc, #56]	; 698 <.text+0x698>
-     65c:	e2804025 	add	r4, r0, #37	; 0x25
-     660:	e2801013 	add	r1, r0, #19	; 0x13
-     664:	e5512001 	ldrb	r2, [r1, #-1]
-     668:	e1dc30b0 	ldrh	r3, [ip]
-     66c:	e0833002 	add	r3, r3, r2
-     670:	e1a03803 	mov	r3, r3, lsl #16
-     674:	e2811001 	add	r1, r1, #1	; 0x1
-     678:	e1a03823 	mov	r3, r3, lsr #16
-     67c:	e1510004 	cmp	r1, r4
-     680:	e5ce2016 	strb	r2, [lr, #22]
-     684:	e1cc30b0 	strh	r3, [ip]
-     688:	e28ee001 	add	lr, lr, #1	; 0x1
-     68c:	1afffff4 	bne	664 <LL_write_ctrl_data+0xd8>
-     690:	eaffffd9 	b	5fc <LL_write_ctrl_data+0x70>
-     694:	40000856 	andmi	r0, r0, r6, asr r8
-     698:	40001eec 	andmi	r1, r0, ip, ror #29
-     69c:	40000cdc 	ldrmid	r0, [r0], -ip
-     6a0:	40001ee4 	andmi	r1, r0, r4, ror #29
-     6a4:	4000001b 	andmi	r0, r0, fp, lsl r0
-
-000006a8 <HL2LL_write_cycle>:
-     6a8:	e92d4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
-     6ac:	e59f33ec 	ldr	r3, [pc, #1004]	; aa0 <.text+0xaa0>
-     6b0:	e5d30000 	ldrb	r0, [r3]
-     6b4:	e3500000 	cmp	r0, #0	; 0x0
-     6b8:	e24dd014 	sub	sp, sp, #20	; 0x14
-     6bc:	0a00004b 	beq	7f0 <HL2LL_write_cycle+0x148>
-     6c0:	e59f33dc 	ldr	r3, [pc, #988]	; aa4 <.text+0xaa4>
-     6c4:	e59fa3dc 	ldr	sl, [pc, #988]	; aa8 <.text+0xaa8>
-     6c8:	e5932000 	ldr	r2, [r3]
-     6cc:	e5da9000 	ldrb	r9, [sl]
-     6d0:	e59fb3d4 	ldr	fp, [pc, #980]	; aac <.text+0xaac>
-     6d4:	e3520000 	cmp	r2, #0	; 0x0
-     6d8:	e59f23d0 	ldr	r2, [pc, #976]	; ab0 <.text+0xab0>
-     6dc:	13893008 	orrne	r3, r9, #8	; 0x8
-     6e0:	e1cb90b0 	strh	r9, [fp]
-     6e4:	11cb30b0 	strneh	r3, [fp]
-     6e8:	e5d23001 	ldrb	r3, [r2, #1]
-     6ec:	e3530000 	cmp	r3, #0	; 0x0
-     6f0:	11db30b0 	ldrneh	r3, [fp]
-     6f4:	01db30b0 	ldreqh	r3, [fp]
-     6f8:	13833143 	orrne	r3, r3, #-1073741808	; 0xc0000010
-     6fc:	03c33010 	biceq	r3, r3, #16	; 0x10
-     700:	138335ff 	orrne	r3, r3, #1069547520	; 0x3fc00000
-     704:	01a03883 	moveq	r3, r3, lsl #17
-     708:	138339fe 	orrne	r3, r3, #4161536	; 0x3f8000
-     70c:	01a038a3 	moveq	r3, r3, lsr #17
-     710:	11cb30b0 	strneh	r3, [fp]
-     714:	01cb30b0 	streqh	r3, [fp]
-     718:	e5d23002 	ldrb	r3, [r2, #2]
-     71c:	e3530000 	cmp	r3, #0	; 0x0
-     720:	11db30b0 	ldrneh	r3, [fp]
-     724:	01db30b0 	ldreqh	r3, [fp]
-     728:	13833c01 	orrne	r3, r3, #256	; 0x100
-     72c:	03c33c01 	biceq	r3, r3, #256	; 0x100
-     730:	11cb30b0 	strneh	r3, [fp]
-     734:	01cb30b0 	streqh	r3, [fp]
-     738:	e5d23000 	ldrb	r3, [r2]
-     73c:	e3530000 	cmp	r3, #0	; 0x0
-     740:	0a00002d 	beq	7fc <HL2LL_write_cycle+0x154>
-     744:	e3530001 	cmp	r3, #1	; 0x1
-     748:	0a000063 	beq	8dc <SVC_Stack_Size+0xdc>
-     74c:	e3530002 	cmp	r3, #2	; 0x2
-     750:	0a00004b 	beq	884 <SVC_Stack_Size+0x84>
-     754:	e3530003 	cmp	r3, #3	; 0x3
-     758:	0a000074 	beq	930 <SVC_Stack_Size+0x130>
-     75c:	e1db30b0 	ldrh	r3, [fp]
-     760:	e3c330e0 	bic	r3, r3, #224	; 0xe0
-     764:	e1cb30b0 	strh	r3, [fp]
-     768:	e3590000 	cmp	r9, #0	; 0x0
-     76c:	0a000030 	beq	834 <SVC_Stack_Size+0x34>
-     770:	e59f033c 	ldr	r0, [pc, #828]	; ab4 <.text+0xab4>
-     774:	e5d03000 	ldrb	r3, [r0]
-     778:	e59f2338 	ldr	r2, [pc, #824]	; ab8 <.text+0xab8>
-     77c:	e203c0ff 	and	ip, r3, #255	; 0xff
-     780:	e59f3334 	ldr	r3, [pc, #820]	; abc <.text+0xabc>
-     784:	e1d212b4 	ldrh	r1, [r2, #36]
-     788:	e1d3e0b2 	ldrh	lr, [r3, #2]
-     78c:	e1cb12bc 	strh	r1, [fp, #44]
-     790:	e1cbe3b2 	strh	lr, [fp, #50]
-     794:	e1d211bc 	ldrh	r1, [r2, #28]
-     798:	e1d2e1b8 	ldrh	lr, [r2, #24]
-     79c:	e1d330b0 	ldrh	r3, [r3]
-     7a0:	e1d222b0 	ldrh	r2, [r2, #32]
-     7a4:	e35c0001 	cmp	ip, #1	; 0x1
-     7a8:	e1cb12b8 	strh	r1, [fp, #40]
-     7ac:	e1cbe2b6 	strh	lr, [fp, #38]
-     7b0:	e1cb22ba 	strh	r2, [fp, #42]
-     7b4:	e1cb33b0 	strh	r3, [fp, #48]
-     7b8:	e59f12ec 	ldr	r1, [pc, #748]	; aac <.text+0xaac>
-     7bc:	0a00003f 	beq	8c0 <SVC_Stack_Size+0xc0>
-     7c0:	e5d03000 	ldrb	r3, [r0]
-     7c4:	e3530002 	cmp	r3, #2	; 0x2
-     7c8:	0a000050 	beq	910 <SVC_Stack_Size+0x110>
-     7cc:	e3a03000 	mov	r3, #0	; 0x0
-     7d0:	e5c13035 	strb	r3, [r1, #53]
-     7d4:	e5c13034 	strb	r3, [r1, #52]
-     7d8:	e1c133b6 	strh	r3, [r1, #54]
-     7dc:	e1a00009 	mov	r0, r9
-     7e0:	ebffff69 	bl	58c <LL_write_ctrl_data>
-     7e4:	e3a03000 	mov	r3, #0	; 0x0
-     7e8:	e5ca3000 	strb	r3, [sl]
-     7ec:	e3a00001 	mov	r0, #1	; 0x1
-     7f0:	e28dd014 	add	sp, sp, #20	; 0x14
-     7f4:	e8bd4ff0 	ldmia	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
-     7f8:	e12fff1e 	bx	lr
-     7fc:	e1db30b0 	ldrh	r3, [fp]
-     800:	e3833080 	orr	r3, r3, #128	; 0x80
-     804:	e1cb30b0 	strh	r3, [fp]
-     808:	e59f12b0 	ldr	r1, [pc, #688]	; ac0 <.text+0xac0>
-     80c:	e59fb298 	ldr	fp, [pc, #664]	; aac <.text+0xaac>
-     810:	e2810008 	add	r0, r1, #8	; 0x8
-     814:	e1a0200b 	mov	r2, fp
-     818:	e4d13001 	ldrb	r3, [r1], #1
-     81c:	e1510000 	cmp	r1, r0
-     820:	e5c2300c 	strb	r3, [r2, #12]
-     824:	e2822001 	add	r2, r2, #1	; 0x1
-     828:	1afffffa 	bne	818 <SVC_Stack_Size+0x18>
-     82c:	e3590000 	cmp	r9, #0	; 0x0
-     830:	1affffce 	bne	770 <HL2LL_write_cycle+0xc8>
-     834:	e59f327c 	ldr	r3, [pc, #636]	; ab8 <.text+0xab8>
-     838:	e5932000 	ldr	r2, [r3]
-     83c:	e9931002 	ldmib	r3, {r1, ip}
-     840:	e1d3e2b8 	ldrh	lr, [r3, #40]
-     844:	e58b2014 	str	r2, [fp, #20]
-     848:	e58b1018 	str	r1, [fp, #24]
-     84c:	e1d321b0 	ldrh	r2, [r3, #16]
-     850:	e1d310bc 	ldrh	r1, [r3, #12]
-     854:	e1d331b4 	ldrh	r3, [r3, #20]
-     858:	e1a00009 	mov	r0, r9
-     85c:	e1cb32be 	strh	r3, [fp, #46]
-     860:	e1cbe2b4 	strh	lr, [fp, #36]
-     864:	e58bc01c 	str	ip, [fp, #28]
-     868:	e1cb12b0 	strh	r1, [fp, #32]
-     86c:	e1cb22b2 	strh	r2, [fp, #34]
-     870:	ebffff45 	bl	58c <LL_write_ctrl_data>
-     874:	e3a03001 	mov	r3, #1	; 0x1
-     878:	e1a00003 	mov	r0, r3
-     87c:	e5ca3000 	strb	r3, [sl]
-     880:	eaffffda 	b	7f0 <HL2LL_write_cycle+0x148>
-     884:	e59f2238 	ldr	r2, [pc, #568]	; ac4 <.text+0xac4>
-     888:	e1db30b0 	ldrh	r3, [fp]
-     88c:	e1d210b6 	ldrh	r1, [r2, #6]
-     890:	e3c330e0 	bic	r3, r3, #224	; 0xe0
-     894:	e1d2e0b0 	ldrh	lr, [r2]
-     898:	e1cb30b0 	strh	r3, [fp]
-     89c:	e1cb10ba 	strh	r1, [fp, #10]
-     8a0:	e1d230b8 	ldrh	r3, [r2, #8]
-     8a4:	e1d210b2 	ldrh	r1, [r2, #2]
-     8a8:	e1d220b4 	ldrh	r2, [r2, #4]
-     8ac:	e1cb30b2 	strh	r3, [fp, #2]
-     8b0:	e1cbe0b4 	strh	lr, [fp, #4]
-     8b4:	e1cb10b6 	strh	r1, [fp, #6]
-     8b8:	e1cb20b8 	strh	r2, [fp, #8]
-     8bc:	eaffffa9 	b	768 <HL2LL_write_cycle+0xc0>
-     8c0:	e3a03002 	mov	r3, #2	; 0x2
-     8c4:	e5c03000 	strb	r3, [r0]
-     8c8:	e59f21f8 	ldr	r2, [pc, #504]	; ac8 <.text+0xac8>
-     8cc:	e5923000 	ldr	r3, [r2]
-     8d0:	e5c1c034 	strb	ip, [r1, #52]
-     8d4:	e1c133b6 	strh	r3, [r1, #54]
-     8d8:	eaffffbf 	b	7dc <HL2LL_write_cycle+0x134>
-     8dc:	e59f31e8 	ldr	r3, [pc, #488]	; acc <.text+0xacc>
-     8e0:	e1db20b0 	ldrh	r2, [fp]
-     8e4:	e5d3e003 	ldrb	lr, [r3, #3]
-     8e8:	e5d31000 	ldrb	r1, [r3]
-     8ec:	e5d30001 	ldrb	r0, [r3, #1]
-     8f0:	e5d3c002 	ldrb	ip, [r3, #2]
-     8f4:	e3822020 	orr	r2, r2, #32	; 0x20
-     8f8:	e1cb20b0 	strh	r2, [fp]
-     8fc:	e5cb100c 	strb	r1, [fp, #12]
-     900:	e5cb000d 	strb	r0, [fp, #13]
-     904:	e5cbc00e 	strb	ip, [fp, #14]
-     908:	e5cbe00f 	strb	lr, [fp, #15]
-     90c:	eaffff95 	b	768 <HL2LL_write_cycle+0xc0>
-     910:	e2833001 	add	r3, r3, #1	; 0x1
-     914:	e59f21b4 	ldr	r2, [pc, #436]	; ad0 <.text+0xad0>
-     918:	e5c03000 	strb	r3, [r0]
-     91c:	e5923000 	ldr	r3, [r2]
-     920:	e3a02012 	mov	r2, #18	; 0x12
-     924:	e1c133b6 	strh	r3, [r1, #54]
-     928:	e5c12034 	strb	r2, [r1, #52]
-     92c:	eaffffaa 	b	7dc <HL2LL_write_cycle+0x134>
-     930:	e59f719c 	ldr	r7, [pc, #412]	; ad4 <.text+0xad4>
-     934:	e1db30b0 	ldrh	r3, [fp]
-     938:	e5d72000 	ldrb	r2, [r7]
-     93c:	e59f8168 	ldr	r8, [pc, #360]	; aac <.text+0xaac>
-     940:	e3833040 	orr	r3, r3, #64	; 0x40
-     944:	e3520000 	cmp	r2, #0	; 0x0
-     948:	e1cb30b0 	strh	r3, [fp]
-     94c:	05d83002 	ldreqb	r3, [r8, #2]
-     950:	01c830b2 	streqh	r3, [r8, #2]
-     954:	0affff83 	beq	768 <HL2LL_write_cycle+0xc0>
-     958:	e59f3178 	ldr	r3, [pc, #376]	; ad8 <.text+0xad8>
-     95c:	e5d31000 	ldrb	r1, [r3]
-     960:	e3510001 	cmp	r1, #1	; 0x1
-     964:	0a000005 	beq	980 <SVC_Stack_Size+0x180>
-     968:	e5d83002 	ldrb	r3, [r8, #2]
-     96c:	e3a02000 	mov	r2, #0	; 0x0
-     970:	e1833401 	orr	r3, r3, r1, lsl #8
-     974:	e1c830b2 	strh	r3, [r8, #2]
-     978:	e5c72000 	strb	r2, [r7]
-     97c:	eaffff79 	b	768 <HL2LL_write_cycle+0xc0>
-     980:	e3520001 	cmp	r2, #1	; 0x1
-     984:	0a00001c 	beq	9fc <SVC_Stack_Size+0x1fc>
-     988:	e3520002 	cmp	r2, #2	; 0x2
-     98c:	1affff75 	bne	768 <HL2LL_write_cycle+0xc0>
-     990:	e5d82002 	ldrb	r2, [r8, #2]
-     994:	e59f1140 	ldr	r1, [pc, #320]	; adc <.text+0xadc>
-     998:	e59f3140 	ldr	r3, [pc, #320]	; ae0 <.text+0xae0>
-     99c:	e3a0c000 	mov	ip, #0	; 0x0
-     9a0:	e3822c82 	orr	r2, r2, #33280	; 0x8200
-     9a4:	e5916000 	ldr	r6, [r1]
-     9a8:	e5d1e005 	ldrb	lr, [r1, #5]
-     9ac:	e5d14004 	ldrb	r4, [r1, #4]
-     9b0:	e1c3c0b0 	strh	ip, [r3]
-     9b4:	e1c820b2 	strh	r2, [r8, #2]
-     9b8:	e1d130b8 	ldrh	r3, [r1, #8]
-     9bc:	e1d120b6 	ldrh	r2, [r1, #6]
-     9c0:	e1d110ba 	ldrh	r1, [r1, #10]
-     9c4:	e5c7c000 	strb	ip, [r7]
-     9c8:	e5c8e00d 	strb	lr, [r8, #13]
-     9cc:	e5c8400e 	strb	r4, [r8, #14]
-     9d0:	e5c8600f 	strb	r6, [r8, #15]
-     9d4:	e5c8c013 	strb	ip, [r8, #19]
-     9d8:	e1c820b4 	strh	r2, [r8, #4]
-     9dc:	e1c8c0b6 	strh	ip, [r8, #6]
-     9e0:	e1c830ba 	strh	r3, [r8, #10]
-     9e4:	e1c810b8 	strh	r1, [r8, #8]
-     9e8:	e5c8c00c 	strb	ip, [r8, #12]
-     9ec:	e5c8c010 	strb	ip, [r8, #16]
-     9f0:	e5c8c011 	strb	ip, [r8, #17]
-     9f4:	e5c8c012 	strb	ip, [r8, #18]
-     9f8:	eaffff5a 	b	768 <HL2LL_write_cycle+0xc0>
-     9fc:	e59f30d8 	ldr	r3, [pc, #216]	; adc <.text+0xadc>
-     a00:	e2830014 	add	r0, r3, #20	; 0x14
-     a04:	e8901001 	ldmia	r0, {r0, ip}
-     a08:	e593e00c 	ldr	lr, [r3, #12]
-     a0c:	e5933010 	ldr	r3, [r3, #16]
-     a10:	e1a01c4c 	mov	r1, ip, asr #24
-     a14:	e5d82002 	ldrb	r2, [r8, #2]
-     a18:	e58de00c 	str	lr, [sp, #12]
-     a1c:	e58d3010 	str	r3, [sp, #16]
-     a20:	e1a0684e 	mov	r6, lr, asr #16
-     a24:	e1a05843 	mov	r5, r3, asr #16
-     a28:	e58d1008 	str	r1, [sp, #8]
-     a2c:	e1a0e44c 	mov	lr, ip, asr #8
-     a30:	e1a03440 	mov	r3, r0, asr #8
-     a34:	e58d3004 	str	r3, [sp, #4]
-     a38:	e5c8e00d 	strb	lr, [r8, #13]
-     a3c:	e1a03840 	mov	r3, r0, asr #16
-     a40:	e59de008 	ldr	lr, [sp, #8]
-     a44:	e3822c81 	orr	r2, r2, #33024	; 0x8100
-     a48:	e1a01c40 	mov	r1, r0, asr #24
-     a4c:	e58d3000 	str	r3, [sp]
-     a50:	e3a03002 	mov	r3, #2	; 0x2
-     a54:	e5c81013 	strb	r1, [r8, #19]
-     a58:	e5c73000 	strb	r3, [r7]
-     a5c:	e1c820b2 	strh	r2, [r8, #2]
-     a60:	e5c8e00f 	strb	lr, [r8, #15]
-     a64:	e59d1004 	ldr	r1, [sp, #4]
-     a68:	e59d2000 	ldr	r2, [sp]
-     a6c:	e28d300c 	add	r3, sp, #12	; 0xc
-     a70:	e8934008 	ldmia	r3, {r3, lr}
-     a74:	e1a0484c 	mov	r4, ip, asr #16
-     a78:	e1c860b6 	strh	r6, [r8, #6]
-     a7c:	e1c850b8 	strh	r5, [r8, #8]
-     a80:	e5c8400e 	strb	r4, [r8, #14]
-     a84:	e5c81011 	strb	r1, [r8, #17]
-     a88:	e5c82012 	strb	r2, [r8, #18]
-     a8c:	e1c830b4 	strh	r3, [r8, #4]
-     a90:	e1c8e0ba 	strh	lr, [r8, #10]
-     a94:	e5c8c00c 	strb	ip, [r8, #12]
-     a98:	e5c80010 	strb	r0, [r8, #16]
-     a9c:	eaffff31 	b	768 <HL2LL_write_cycle+0xc0>
-     aa0:	4000001b 	andmi	r0, r0, fp, lsl r0
-     aa4:	4000085c 	andmi	r0, r0, ip, asr r8
-     aa8:	40000858 	andmi	r0, r0, r8, asr r8
-     aac:	40000cdc 	ldrmid	r0, [r0], -ip
-     ab0:	40001104 	andmi	r1, r0, r4, lsl #2
-     ab4:	40000d14 	andmi	r0, r0, r4, lsl sp
-     ab8:	40000f64 	andmi	r0, r0, r4, ror #30
-     abc:	40001474 	andmi	r1, r0, r4, ror r4
-     ac0:	40000c0c 	andmi	r0, r0, ip, lsl #24
-     ac4:	40000fc0 	andmi	r0, r0, r0, asr #31
-     ac8:	40000ba0 	andmi	r0, r0, r0, lsr #23
-     acc:	40001088 	andmi	r1, r0, r8, lsl #1
-     ad0:	40000bdc 	ldrmid	r0, [r0], -ip
-     ad4:	40000847 	andmi	r0, r0, r7, asr #16
-     ad8:	40000846 	andmi	r0, r0, r6, asr #16
-     adc:	40000d34 	andmi	r0, r0, r4, lsr sp
-     ae0:	4000084a 	andmi	r0, r0, sl, asr #16
-
-00000ae4 <SSP_rx_handler_HL>:
-     ae4:	e92d47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
-     ae8:	e59f23a4 	ldr	r2, [pc, #932]	; e94 <.text+0xe94>
-     aec:	e5d23000 	ldrb	r3, [r2]
-     af0:	e20330ff 	and	r3, r3, #255	; 0xff
-     af4:	e3530000 	cmp	r3, #0	; 0x0
-     af8:	e20000ff 	and	r0, r0, #255	; 0xff
-     afc:	e1a07002 	mov	r7, r2
-     b00:	1a000004 	bne	b18 <SSP_rx_handler_HL+0x34>
-     b04:	e350003e 	cmp	r0, #62	; 0x3e
-     b08:	0a000011 	beq	b54 <SSP_rx_handler_HL+0x70>
-     b0c:	e5c23000 	strb	r3, [r2]
-     b10:	e8bd47f0 	ldmia	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
-     b14:	e12fff1e 	bx	lr
-     b18:	e5d23000 	ldrb	r3, [r2]
-     b1c:	e3530001 	cmp	r3, #1	; 0x1
-     b20:	0a000010 	beq	b68 <SSP_rx_handler_HL+0x84>
-     b24:	e5d23000 	ldrb	r3, [r2]
-     b28:	e3530002 	cmp	r3, #2	; 0x2
-     b2c:	0a00001c 	beq	ba4 <SSP_rx_handler_HL+0xc0>
-     b30:	e5d23000 	ldrb	r3, [r2]
-     b34:	e3530003 	cmp	r3, #3	; 0x3
-     b38:	13a03000 	movne	r3, #0	; 0x0
-     b3c:	1afffff2 	bne	b0c <SSP_rx_handler_HL+0x28>
-     b40:	e350003c 	cmp	r0, #60	; 0x3c
-     b44:	0a000039 	beq	c30 <SSP_rx_handler_HL+0x14c>
-     b48:	e3a03000 	mov	r3, #0	; 0x0
-     b4c:	e5c73000 	strb	r3, [r7]
-     b50:	eaffffee 	b	b10 <SSP_rx_handler_HL+0x2c>
-     b54:	e5d23000 	ldrb	r3, [r2]
-     b58:	e2833001 	add	r3, r3, #1	; 0x1
-     b5c:	e20330ff 	and	r3, r3, #255	; 0xff
-     b60:	e5c23000 	strb	r3, [r2]
-     b64:	eaffffe9 	b	b10 <SSP_rx_handler_HL+0x2c>
-     b68:	e350002a 	cmp	r0, #42	; 0x2a
-     b6c:	13a03000 	movne	r3, #0	; 0x0
-     b70:	15c23000 	strneb	r3, [r2]
-     b74:	1affffe5 	bne	b10 <SSP_rx_handler_HL+0x2c>
-     b78:	e5d23000 	ldrb	r3, [r2]
-     b7c:	e2833001 	add	r3, r3, #1	; 0x1
-     b80:	e20330ff 	and	r3, r3, #255	; 0xff
-     b84:	e5c23000 	strb	r3, [r2]
-     b88:	e59f3308 	ldr	r3, [pc, #776]	; e98 <.text+0xe98>
-     b8c:	e59f2308 	ldr	r2, [pc, #776]	; e9c <.text+0xe9c>
-     b90:	e5832000 	str	r2, [r3]
-     b94:	e59f3304 	ldr	r3, [pc, #772]	; ea0 <.text+0xea0>
-     b98:	e3a01028 	mov	r1, #40	; 0x28
-     b9c:	e5c31000 	strb	r1, [r3]
-     ba0:	eaffffda 	b	b10 <SSP_rx_handler_HL+0x2c>
-     ba4:	e59fc2f4 	ldr	ip, [pc, #756]	; ea0 <.text+0xea0>
-     ba8:	e5dc3000 	ldrb	r3, [ip]
-     bac:	e353001a 	cmp	r3, #26	; 0x1a
-     bb0:	0a00000e 	beq	bf0 <SSP_rx_handler_HL+0x10c>
-     bb4:	e59f12dc 	ldr	r1, [pc, #732]	; e98 <.text+0xe98>
-     bb8:	e5dc3000 	ldrb	r3, [ip]
-     bbc:	e5912000 	ldr	r2, [r1]
-     bc0:	e2433001 	sub	r3, r3, #1	; 0x1
-     bc4:	e20330ff 	and	r3, r3, #255	; 0xff
-     bc8:	e5cc3000 	strb	r3, [ip]
-     bcc:	e4c20001 	strb	r0, [r2], #1
-     bd0:	e5dc3000 	ldrb	r3, [ip]
-     bd4:	e3530000 	cmp	r3, #0	; 0x0
-     bd8:	e5812000 	str	r2, [r1]
-     bdc:	05d73000 	ldreqb	r3, [r7]
-     be0:	02833001 	addeq	r3, r3, #1	; 0x1
-     be4:	020330ff 	andeq	r3, r3, #255	; 0xff
-     be8:	05c73000 	streqb	r3, [r7]
-     bec:	eaffffc7 	b	b10 <SSP_rx_handler_HL+0x2c>
-     bf0:	e59f32a4 	ldr	r3, [pc, #676]	; e9c <.text+0xe9c>
-     bf4:	e1d320b0 	ldrh	r2, [r3]
-     bf8:	e59f12a4 	ldr	r1, [pc, #676]	; ea4 <.text+0xea4>
-     bfc:	e2022003 	and	r2, r2, #3	; 0x3
-     c00:	e5c12000 	strb	r2, [r1]
-     c04:	e5d13000 	ldrb	r3, [r1]
-     c08:	e3530001 	cmp	r3, #1	; 0x1
-     c0c:	0a000084 	beq	e24 <.text+0xe24>
-     c10:	e5d13000 	ldrb	r3, [r1]
-     c14:	e3530002 	cmp	r3, #2	; 0x2
-     c18:	1affffe5 	bne	bb4 <SSP_rx_handler_HL+0xd0>
-     c1c:	e59f1274 	ldr	r1, [pc, #628]	; e98 <.text+0xe98>
-     c20:	e5913000 	ldr	r3, [r1]
-     c24:	e2833034 	add	r3, r3, #52	; 0x34
-     c28:	e5813000 	str	r3, [r1]
-     c2c:	eaffffe1 	b	bb8 <SSP_rx_handler_HL+0xd4>
-     c30:	e59fa264 	ldr	sl, [pc, #612]	; e9c <.text+0xe9c>
-     c34:	e1da30b0 	ldrh	r3, [sl]
-     c38:	e3130008 	tst	r3, #8	; 0x8
-     c3c:	e2034003 	and	r4, r3, #3	; 0x3
-     c40:	159f3260 	ldrne	r3, [pc, #608]	; ea8 <.text+0xea8>
-     c44:	13a02000 	movne	r2, #0	; 0x0
-     c48:	15832000 	strne	r2, [r3]
-     c4c:	e1da10b6 	ldrh	r1, [sl, #6]
-     c50:	e1da30f2 	ldrsh	r3, [sl, #2]
-     c54:	e1da20f4 	ldrsh	r2, [sl, #4]
-     c58:	e59f824c 	ldr	r8, [pc, #588]	; eac <.text+0xeac>
-     c5c:	e59f624c 	ldr	r6, [pc, #588]	; eb0 <.text+0xeb0>
-     c60:	e1da00f8 	ldrsh	r0, [sl, #8]
-     c64:	e1dac0fa 	ldrsh	ip, [sl, #10]
-     c68:	e1dae0fc 	ldrsh	lr, [sl, #12]
-     c6c:	e0833103 	add	r3, r3, r3, lsl #2
-     c70:	e0822102 	add	r2, r2, r2, lsl #2
-     c74:	e0811101 	add	r1, r1, r1, lsl #2
-     c78:	e1a03083 	mov	r3, r3, lsl #1
-     c7c:	e1a02082 	mov	r2, r2, lsl #1
-     c80:	e1a01081 	mov	r1, r1, lsl #1
-     c84:	e3540000 	cmp	r4, #0	; 0x0
-     c88:	e5863010 	str	r3, [r6, #16]
-     c8c:	e5862014 	str	r2, [r6, #20]
-     c90:	e5861018 	str	r1, [r6, #24]
-     c94:	e586001c 	str	r0, [r6, #28]
-     c98:	e586c020 	str	ip, [r6, #32]
-     c9c:	e586e024 	str	lr, [r6, #36]
-     ca0:	e5883000 	str	r3, [r8]
-     ca4:	e5882004 	str	r2, [r8, #4]
-     ca8:	e5881008 	str	r1, [r8, #8]
-     cac:	e588000c 	str	r0, [r8, #12]
-     cb0:	e588c010 	str	ip, [r8, #16]
-     cb4:	e588e014 	str	lr, [r8, #20]
-     cb8:	e1a05008 	mov	r5, r8
-     cbc:	e1a09006 	mov	r9, r6
-     cc0:	1a00002b 	bne	d74 <SSP_rx_handler_HL+0x290>
-     cc4:	e59f01e8 	ldr	r0, [pc, #488]	; eb4 <.text+0xeb4>
-     cc8:	e1a01006 	mov	r1, r6
-     ccc:	e1a0200a 	mov	r2, sl
-     cd0:	e28ac008 	add	ip, sl, #8	; 0x8
-     cd4:	e1a0e00a 	mov	lr, sl
-     cd8:	e5d2300e 	ldrb	r3, [r2, #14]
-     cdc:	e2822001 	add	r2, r2, #1	; 0x1
-     ce0:	e1a03203 	mov	r3, r3, lsl #4
-     ce4:	e15c0002 	cmp	ip, r2
-     ce8:	e0c130b2 	strh	r3, [r1], #2
-     cec:	e0c030b2 	strh	r3, [r0], #2
-     cf0:	1afffff8 	bne	cd8 <SSP_rx_handler_HL+0x1f4>
-     cf4:	e1de32f4 	ldrsh	r3, [lr, #36]
-     cf8:	e1de22f0 	ldrsh	r2, [lr, #32]
-     cfc:	e1de12f2 	ldrsh	r1, [lr, #34]
-     d00:	e0833103 	add	r3, r3, r3, lsl #2
-     d04:	e0822102 	add	r2, r2, r2, lsl #2
-     d08:	e0811101 	add	r1, r1, r1, lsl #2
-     d0c:	e1a03883 	mov	r3, r3, lsl #17
-     d10:	e1a00823 	mov	r0, r3, lsr #16
-     d14:	e1a02882 	mov	r2, r2, lsl #17
-     d18:	e1a01881 	mov	r1, r1, lsl #17
-     d1c:	e1a0c822 	mov	ip, r2, lsr #16
-     d20:	e1a01821 	mov	r1, r1, lsr #16
-     d24:	e3500000 	cmp	r0, #0	; 0x0
-     d28:	e1c501bc 	strh	r0, [r5, #28]
-     d2c:	e1c5c1b8 	strh	ip, [r5, #24]
-     d30:	e1c511ba 	strh	r1, [r5, #26]
-     d34:	0a000006 	beq	d54 <SSP_rx_handler_HL+0x270>
-     d38:	e59f2178 	ldr	r2, [pc, #376]	; eb8 <.text+0xeb8>
-     d3c:	e5d23000 	ldrb	r3, [r2]
-     d40:	e3530009 	cmp	r3, #9	; 0x9
-     d44:	95d23000 	ldrlsb	r3, [r2]
-     d48:	92833001 	addls	r3, r3, #1	; 0x1
-     d4c:	920330ff 	andls	r3, r3, #255	; 0xff
-     d50:	95c23000 	strlsb	r3, [r2]
-     d54:	e28a2018 	add	r2, sl, #24	; 0x18
-     d58:	e892000c 	ldmia	r2, {r2, r3}
-     d5c:	e5893084 	str	r3, [r9, #132]
-     d60:	e1c9c2b8 	strh	ip, [r9, #40]
-     d64:	e1c912ba 	strh	r1, [r9, #42]
-     d68:	e1c902bc 	strh	r0, [r9, #44]
-     d6c:	e5892080 	str	r2, [r9, #128]
-     d70:	eaffff74 	b	b48 <SSP_rx_handler_HL+0x64>
-     d74:	e3540001 	cmp	r4, #1	; 0x1
-     d78:	0a00002e 	beq	e38 <.text+0xe38>
-     d7c:	e3540002 	cmp	r4, #2	; 0x2
-     d80:	1affff70 	bne	b48 <SSP_rx_handler_HL+0x64>
-     d84:	e1da35fa 	ldrsh	r3, [sl, #90]
-     d88:	e1a030c3 	mov	r3, r3, asr #1
-     d8c:	e1da14f2 	ldrsh	r1, [sl, #66]
-     d90:	e1da04f4 	ldrsh	r0, [sl, #68]
-     d94:	e1da24f6 	ldrsh	r2, [sl, #70]
-     d98:	e203307f 	and	r3, r3, #127	; 0x7f
-     d9c:	e2433001 	sub	r3, r3, #1	; 0x1
-     da0:	e5862038 	str	r2, [r6, #56]
-     da4:	e5882038 	str	r2, [r8, #56]
-     da8:	e5861030 	str	r1, [r6, #48]
-     dac:	e5860034 	str	r0, [r6, #52]
-     db0:	e5881030 	str	r1, [r8, #48]
-     db4:	e5880034 	str	r0, [r8, #52]
-     db8:	e3530007 	cmp	r3, #7	; 0x7
-     dbc:	979ff103 	ldrls	pc, [pc, r3, lsl #2]
-     dc0:	eaffff60 	b	b48 <SSP_rx_handler_HL+0x64>
-     dc4:	00000de4 	andeq	r0, r0, r4, ror #27
-     dc8:	00000b48 	andeq	r0, r0, r8, asr #22
-     dcc:	00000b48 	andeq	r0, r0, r8, asr #22
-     dd0:	00000b48 	andeq	r0, r0, r8, asr #22
-     dd4:	00000b48 	andeq	r0, r0, r8, asr #22
-     dd8:	00000df4 	streqd	r0, [r0], -r4
-     ddc:	00000e04 	andeq	r0, r0, r4, lsl #28
-     de0:	00000e14 	andeq	r0, r0, r4, lsl lr
-     de4:	e59f30d0 	ldr	r3, [pc, #208]	; ebc <.text+0xebc>
-     de8:	e1daa5b4 	ldrh	sl, [sl, #84]
-     dec:	e1c3a0b6 	strh	sl, [r3, #6]
-     df0:	eaffff54 	b	b48 <SSP_rx_handler_HL+0x64>
-     df4:	e59f30c4 	ldr	r3, [pc, #196]	; ec0 <.text+0xec0>
-     df8:	e1daa5b4 	ldrh	sl, [sl, #84]
-     dfc:	e1c3a0b0 	strh	sl, [r3]
-     e00:	eaffff50 	b	b48 <SSP_rx_handler_HL+0x64>
-     e04:	e59f30b8 	ldr	r3, [pc, #184]	; ec4 <.text+0xec4>
-     e08:	e1daa5b4 	ldrh	sl, [sl, #84]
-     e0c:	e1c3a0b0 	strh	sl, [r3]
-     e10:	eaffff4c 	b	b48 <SSP_rx_handler_HL+0x64>
-     e14:	e1da25b4 	ldrh	r2, [sl, #84]
-     e18:	e59f30a8 	ldr	r3, [pc, #168]	; ec8 <.text+0xec8>
-     e1c:	e5c32000 	strb	r2, [r3]
-     e20:	eaffff48 	b	b48 <SSP_rx_handler_HL+0x64>
-     e24:	e59f106c 	ldr	r1, [pc, #108]	; e98 <.text+0xe98>
-     e28:	e5913000 	ldr	r3, [r1]
-     e2c:	e283301a 	add	r3, r3, #26	; 0x1a
-     e30:	e5813000 	str	r3, [r1]
-     e34:	eaffff5f 	b	bb8 <SSP_rx_handler_HL+0xd4>
-     e38:	e1da34f0 	ldrsh	r3, [sl, #64]
-     e3c:	e59a503c 	ldr	r5, [sl, #60]
-     e40:	e5da202d 	ldrb	r2, [sl, #45]
-     e44:	e5da1028 	ldrb	r1, [sl, #40]
-     e48:	e5da0029 	ldrb	r0, [sl, #41]
-     e4c:	e5dac02a 	ldrb	ip, [sl, #42]
-     e50:	e5dae02b 	ldrb	lr, [sl, #43]
-     e54:	e5da402c 	ldrb	r4, [sl, #44]
-     e58:	e5883050 	str	r3, [r8, #80]
-     e5c:	e586307c 	str	r3, [r6, #124]
-     e60:	e1da33b8 	ldrh	r3, [sl, #56]
-     e64:	e1daa3ba 	ldrh	sl, [sl, #58]
-     e68:	e5c62041 	strb	r2, [r6, #65]
-     e6c:	e5865078 	str	r5, [r6, #120]
-     e70:	e5c6103c 	strb	r1, [r6, #60]
-     e74:	e5c6003d 	strb	r0, [r6, #61]
-     e78:	e5c6c03e 	strb	ip, [r6, #62]
-     e7c:	e5c6e03f 	strb	lr, [r6, #63]
-     e80:	e5c64040 	strb	r4, [r6, #64]
-     e84:	e588504c 	str	r5, [r8, #76]
-     e88:	e1c638b8 	strh	r3, [r6, #136]
-     e8c:	e1c6a8ba 	strh	sl, [r6, #138]
-     e90:	eaffff2c 	b	b48 <SSP_rx_handler_HL+0x64>
-     e94:	40000855 	andmi	r0, r0, r5, asr r8
-     e98:	40000850 	andmi	r0, r0, r0, asr r8
-     e9c:	40000b44 	andmi	r0, r0, r4, asr #22
-     ea0:	40000854 	andmi	r0, r0, r4, asr r8
-     ea4:	4000084e 	andmi	r0, r0, lr, asr #16
-     ea8:	4000085c 	andmi	r0, r0, ip, asr r8
-     eac:	400013e0 	andmi	r1, r0, r0, ror #7
-     eb0:	40000d50 	andmi	r0, r0, r0, asr sp
-     eb4:	4000116c 	andmi	r1, r0, ip, ror #2
-     eb8:	400008ac 	andmi	r0, r0, ip, lsr #17
-     ebc:	40001474 	andmi	r1, r0, r4, ror r4
-     ec0:	4000084a 	andmi	r0, r0, sl, asr #16
-     ec4:	4000084c 	andmi	r0, r0, ip, asr #16
-     ec8:	40000848 	andmi	r0, r0, r8, asr #16
-
-00000ecc <xy2latlon>:
-     ecc:	e92d4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
-     ed0:	e59f40f4 	ldr	r4, [pc, #244]	; fcc <.text+0xfcc>
-     ed4:	e3a06101 	mov	r6, #1073741824	; 0x40000000
-     ed8:	e24dd008 	sub	sp, sp, #8	; 0x8
-     edc:	e3a05101 	mov	r5, #1073741824	; 0x40000000
-     ee0:	e2866876 	add	r6, r6, #7733248	; 0x760000
-     ee4:	e28f80d0 	add	r8, pc, #208	; 0xd0
-     ee8:	e8980300 	ldmia	r8, {r8, r9}
-     eec:	e1a0a000 	mov	sl, r0
-     ef0:	e1a0b001 	mov	fp, r1
-     ef4:	e88d000c 	stmia	sp, {r2, r3}
-     ef8:	e28d0034 	add	r0, sp, #52	; 0x34
-     efc:	e8900003 	ldmia	r0, {r0, r1}
-     f00:	e1a02004 	mov	r2, r4
-     f04:	e1a03005 	mov	r3, r5
-     f08:	e2866902 	add	r6, r6, #32768	; 0x8000
-     f0c:	e3a07000 	mov	r7, #0	; 0x0
-     f10:	eb004c8e 	bl	14150 <__aeabi_ddiv>
-     f14:	e1a02006 	mov	r2, r6
-     f18:	e1a03007 	mov	r3, r7
-     f1c:	eb004be7 	bl	13ec0 <__aeabi_dmul>
-     f20:	e1a02008 	mov	r2, r8
-     f24:	e1a03009 	mov	r3, r9
-     f28:	eb004c88 	bl	14150 <__aeabi_ddiv>
-     f2c:	e1a0200a 	mov	r2, sl
-     f30:	e1a0300b 	mov	r3, fp
-     f34:	eb004ad8 	bl	13a9c <__adddf3>
-     f38:	e59d303c 	ldr	r3, [sp, #60]
-     f3c:	e8830003 	stmia	r3, {r0, r1}
-     f40:	e1a02004 	mov	r2, r4
-     f44:	e1a03005 	mov	r3, r5
-     f48:	e28d002c 	add	r0, sp, #44	; 0x2c
-     f4c:	e8900003 	ldmia	r0, {r0, r1}
-     f50:	eb004c7e 	bl	14150 <__aeabi_ddiv>
-     f54:	e1a02006 	mov	r2, r6
-     f58:	e1a03007 	mov	r3, r7
-     f5c:	eb004bd7 	bl	13ec0 <__aeabi_dmul>
-     f60:	e1a02008 	mov	r2, r8
-     f64:	e1a03009 	mov	r3, r9
-     f68:	eb004c78 	bl	14150 <__aeabi_ddiv>
-     f6c:	e28f2050 	add	r2, pc, #80	; 0x50
-     f70:	e892000c 	ldmia	r2, {r2, r3}
-     f74:	e1a04000 	mov	r4, r0
-     f78:	e1a05001 	mov	r5, r1
-     f7c:	e1a0000a 	mov	r0, sl
-     f80:	e1a0100b 	mov	r1, fp
-     f84:	eb004bcd 	bl	13ec0 <__aeabi_dmul>
-     f88:	eb00505f 	bl	1510c <__cos_from_arm>
-     f8c:	e1a02000 	mov	r2, r0
-     f90:	e1a03001 	mov	r3, r1
-     f94:	e1a00004 	mov	r0, r4
-     f98:	e1a01005 	mov	r1, r5
-     f9c:	eb004c6b 	bl	14150 <__aeabi_ddiv>
-     fa0:	e89d000c 	ldmia	sp, {r2, r3}
-     fa4:	eb004abc 	bl	13a9c <__adddf3>
-     fa8:	e59d3040 	ldr	r3, [sp, #64]
-     fac:	e8830003 	stmia	r3, {r0, r1}
-     fb0:	e28dd008 	add	sp, sp, #8	; 0x8
-     fb4:	e8bd4ff0 	ldmia	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
-     fb8:	e12fff1e 	bx	lr
-     fbc:	400921fb 	strmid	r2, [r9], -fp
-     fc0:	54442d18 	strplb	r2, [r4], #-3352
-     fc4:	3f91df46 	svccc	0x0091df46
-     fc8:	a2529d39 	subges	r9, r2, #3648	; 0xe40
-     fcc:	416854a6 	cmnmi	r8, r6, lsr #9
-
-00000fd0 <buzzer>:
-     fd0:	e31000ff 	tst	r0, #255	; 0xff
-     fd4:	e3a0120e 	mov	r1, #-536870912	; 0xe0000000
-     fd8:	e3a0220e 	mov	r2, #-536870912	; 0xe0000000
-     fdc:	e281190a 	add	r1, r1, #163840	; 0x28000
-     fe0:	e282290a 	add	r2, r2, #163840	; 0x28000
-     fe4:	13a03802 	movne	r3, #131072	; 0x20000
-     fe8:	03a03802 	moveq	r3, #131072	; 0x20000
-     fec:	15823014 	strne	r3, [r2, #20]
-     ff0:	0581301c 	streq	r3, [r1, #28]
-     ff4:	e12fff1e 	bx	lr
-
-00000ff8 <buzzer_handler>:
-     ff8:	e59f2114 	ldr	r2, [pc, #276]	; 1114 <.text+0x1114>
-     ffc:	e1d230b0 	ldrh	r3, [r2]
-    1000:	e2833001 	add	r3, r3, #1	; 0x1
-    1004:	e1a03803 	mov	r3, r3, lsl #16
-    1008:	e1a03823 	mov	r3, r3, lsr #16
-    100c:	e35300c7 	cmp	r3, #199	; 0xc7
-    1010:	e59f1100 	ldr	r1, [pc, #256]	; 1118 <.text+0x1118>
-    1014:	e1c230b0 	strh	r3, [r2]
-    1018:	83a03000 	movhi	r3, #0	; 0x0
-    101c:	81c230b0 	strhih	r3, [r2]
-    1020:	e5913000 	ldr	r3, [r1]
-    1024:	e2833001 	add	r3, r3, #1	; 0x1
-    1028:	e3530064 	cmp	r3, #100	; 0x64
-    102c:	e5813000 	str	r3, [r1]
-    1030:	e52de004 	str	lr, [sp, #-4]!
-    1034:	02433064 	subeq	r3, r3, #100	; 0x64
-    1038:	e59fe0dc 	ldr	lr, [pc, #220]	; 111c <.text+0x111c>
-    103c:	05813000 	streq	r3, [r1]
-    1040:	e3a03c27 	mov	r3, #9984	; 0x2700
-    1044:	e59ec000 	ldr	ip, [lr]
-    1048:	e2833010 	add	r3, r3, #16	; 0x10
-    104c:	e1500003 	cmp	r0, r3
-    1050:	e3a02c27 	mov	r2, #9984	; 0x2700
-    1054:	92820011 	addls	r0, r2, #17	; 0x11
-    1058:	e35c000a 	cmp	ip, #10	; 0xa
-    105c:	da000019 	ble	10c8 <USR_Stack_Size+0xc8>
-    1060:	e59f30b8 	ldr	r3, [pc, #184]	; 1120 <.text+0x1120>
-    1064:	e5d33000 	ldrb	r3, [r3]
-    1068:	e3530000 	cmp	r3, #0	; 0x0
-    106c:	e24c2002 	sub	r2, ip, #2	; 0x2
-    1070:	01a00003 	moveq	r0, r3
-    1074:	e58e2000 	str	r2, [lr]
-    1078:	01a0c000 	moveq	ip, r0
-    107c:	1a000019 	bne	10e8 <USR_Stack_Size+0xe8>
-    1080:	e3a02000 	mov	r2, #0	; 0x0
-    1084:	e3a01001 	mov	r1, #1	; 0x1
-    1088:	e1a03211 	mov	r3, r1, lsl r2
-    108c:	e11c0003 	tst	ip, r3
-    1090:	e2822001 	add	r2, r2, #1	; 0x1
-    1094:	1a000005 	bne	10b0 <USR_Stack_Size+0xb0>
-    1098:	e3520009 	cmp	r2, #9	; 0x9
-    109c:	0a000004 	beq	10b4 <USR_Stack_Size+0xb4>
-    10a0:	e1a03211 	mov	r3, r1, lsl r2
-    10a4:	e11c0003 	tst	ip, r3
-    10a8:	e2822001 	add	r2, r2, #1	; 0x1
-    10ac:	0afffff9 	beq	1098 <USR_Stack_Size+0x98>
-    10b0:	e0000003 	and	r0, r0, r3
-    10b4:	e3500000 	cmp	r0, #0	; 0x0
-    10b8:	0a000008 	beq	10e0 <USR_Stack_Size+0xe0>
-    10bc:	e3a00001 	mov	r0, #1	; 0x1
-    10c0:	e49de004 	ldr	lr, [sp], #4
-    10c4:	eaffffc1 	b	fd0 <buzzer>
-    10c8:	e3a02000 	mov	r2, #0	; 0x0
-    10cc:	e59f304c 	ldr	r3, [pc, #76]	; 1120 <.text+0x1120>
-    10d0:	e1a00002 	mov	r0, r2
-    10d4:	e1a0c002 	mov	ip, r2
-    10d8:	e5c32000 	strb	r2, [r3]
-    10dc:	eaffffe7 	b	1080 <USR_Stack_Size+0x80>
-    10e0:	e49de004 	ldr	lr, [sp], #4
-    10e4:	eaffffb9 	b	fd0 <buzzer>
-    10e8:	e2403c27 	sub	r3, r0, #9984	; 0x2700
-    10ec:	e59f2030 	ldr	r2, [pc, #48]	; 1124 <.text+0x1124>
-    10f0:	e2433010 	sub	r3, r3, #16	; 0x10
-    10f4:	e080c392 	umull	ip, r0, r2, r3
-    10f8:	e5911000 	ldr	r1, [r1]
-    10fc:	e15101a0 	cmp	r1, r0, lsr #3
-    1100:	83a00010 	movhi	r0, #16	; 0x10
-    1104:	81a0c000 	movhi	ip, r0
-    1108:	93a00000 	movls	r0, #0	; 0x0
-    110c:	93a0c010 	movls	ip, #16	; 0x10
-    1110:	eaffffda 	b	1080 <USR_Stack_Size+0x80>
-    1114:	4000086c 	andmi	r0, r0, ip, ror #16
-    1118:	40000868 	andmi	r0, r0, r8, ror #16
-    111c:	40000864 	andmi	r0, r0, r4, ror #16
-    1120:	40000860 	andmi	r0, r0, r0, ror #16
-    1124:	cccccccd 	stcgtl	12, cr12, [ip], {205}
-
-00001128 <writeCommand>:
-    1128:	e92d4010 	stmdb	sp!, {r4, lr}
-    112c:	e59fc028 	ldr	ip, [pc, #40]	; 115c <.text+0x115c>
-    1130:	e1dde0b8 	ldrh	lr, [sp, #8]
-    1134:	e59d400c 	ldr	r4, [sp, #12]
-    1138:	e1cce0b8 	strh	lr, [ip, #8]
-    113c:	e59fe01c 	ldr	lr, [pc, #28]	; 1160 <.text+0x1160>
-    1140:	e1cc00b0 	strh	r0, [ip]
-    1144:	e5ce4001 	strb	r4, [lr, #1]
-    1148:	e1cc10b2 	strh	r1, [ip, #2]
-    114c:	e1cc30b6 	strh	r3, [ip, #6]
-    1150:	e1cc20b4 	strh	r2, [ip, #4]
-    1154:	e8bd4010 	ldmia	sp!, {r4, lr}
-    1158:	e12fff1e 	bx	lr
-    115c:	40000fc0 	andmi	r0, r0, r0, asr #31
-    1160:	40001104 	andmi	r1, r0, r4, lsl #2
-
-00001164 <isSerialEnabled>:
-    1164:	e59f3004 	ldr	r3, [pc, #4]	; 1170 <.text+0x1170>
-    1168:	e1d300b8 	ldrh	r0, [r3, #8]
-    116c:	e12fff1e 	bx	lr
-    1170:	4000116c 	andmi	r1, r0, ip, ror #2
-
-00001174 <checkTxPeriod>:
-    1174:	e1a00800 	mov	r0, r0, lsl #16
-    1178:	e1a03801 	mov	r3, r1, lsl #16
-    117c:	e1b00820 	movs	r0, r0, lsr #16
-    1180:	e92d4010 	stmdb	sp!, {r4, lr}
-    1184:	e1a01000 	mov	r1, r0
-    1188:	e1a04823 	mov	r4, r3, lsr #16
-    118c:	0a000005 	beq	11a8 <checkTxPeriod+0x34>
-    1190:	e59f3018 	ldr	r3, [pc, #24]	; 11b0 <.text+0x11b0>
-    1194:	e5930000 	ldr	r0, [r3]
-    1198:	eb004fde 	bl	15118 <____umodsi3_from_arm>
-    119c:	e1500004 	cmp	r0, r4
-    11a0:	13a00000 	movne	r0, #0	; 0x0
-    11a4:	03a00001 	moveq	r0, #1	; 0x1
-    11a8:	e8bd4010 	ldmia	sp!, {r4, lr}
-    11ac:	e12fff1e 	bx	lr
-    11b0:	4000113c 	andmi	r1, r0, ip, lsr r1
-
-000011b4 <processMotorStateChanges>:
-    11b4:	e59f30a4 	ldr	r3, [pc, #164]	; 1260 <.text+0x1260>
-    11b8:	e1d325ba 	ldrh	r2, [r3, #90]
-    11bc:	e3120001 	tst	r2, #1	; 0x1
-    11c0:	059f209c 	ldreq	r2, [pc, #156]	; 1264 <.text+0x1264>
-    11c4:	159f2098 	ldrne	r2, [pc, #152]	; 1264 <.text+0x1264>
-    11c8:	01d230b0 	ldreqh	r3, [r2]
-    11cc:	11d230b0 	ldrneh	r3, [r2]
-    11d0:	02433001 	subeq	r3, r3, #1	; 0x1
-    11d4:	12833001 	addne	r3, r3, #1	; 0x1
-    11d8:	01c230b0 	streqh	r3, [r2]
-    11dc:	11c230b0 	strneh	r3, [r2]
-    11e0:	e1d230f0 	ldrsh	r3, [r2]
-    11e4:	e59f0078 	ldr	r0, [pc, #120]	; 1264 <.text+0x1264>
-    11e8:	e3530004 	cmp	r3, #4	; 0x4
-    11ec:	c3a03005 	movgt	r3, #5	; 0x5
-    11f0:	e59f1070 	ldr	r1, [pc, #112]	; 1268 <.text+0x1268>
-    11f4:	c1c030b0 	strgth	r3, [r0]
-    11f8:	c3a03001 	movgt	r3, #1	; 0x1
-    11fc:	e1d120b0 	ldrh	r2, [r1]
-    1200:	c1c130b0 	strgth	r3, [r1]
-    1204:	ca000003 	bgt	1218 <processMotorStateChanges+0x64>
-    1208:	e3530000 	cmp	r3, #0	; 0x0
-    120c:	b3a03000 	movlt	r3, #0	; 0x0
-    1210:	b1c030b0 	strlth	r3, [r0]
-    1214:	b1c130b0 	strlth	r3, [r1]
-    1218:	e3520000 	cmp	r2, #0	; 0x0
-    121c:	1a000005 	bne	1238 <processMotorStateChanges+0x84>
-    1220:	e1d130f0 	ldrsh	r3, [r1]
-    1224:	e3530001 	cmp	r3, #1	; 0x1
-    1228:	059f303c 	ldreq	r3, [pc, #60]	; 126c <.text+0x126c>
-    122c:	02822003 	addeq	r2, r2, #3	; 0x3
-    1230:	05c32000 	streqb	r2, [r3]
-    1234:	e12fff1e 	bx	lr
-    1238:	e3520001 	cmp	r2, #1	; 0x1
-    123c:	112fff1e 	bxne	lr
-    1240:	e1d120f0 	ldrsh	r2, [r1]
-    1244:	e3520000 	cmp	r2, #0	; 0x0
-    1248:	112fff1e 	bxne	lr
-    124c:	e59f1018 	ldr	r1, [pc, #24]	; 126c <.text+0x126c>
-    1250:	e5d13000 	ldrb	r3, [r1]
-    1254:	e35300ff 	cmp	r3, #255	; 0xff
-    1258:	15c12000 	strneb	r2, [r1]
-    125c:	e12fff1e 	bx	lr
-    1260:	40000b44 	andmi	r0, r0, r4, asr #22
-    1264:	40001140 	andmi	r1, r0, r0, asr #2
-    1268:	4000108c 	andmi	r1, r0, ip, lsl #1
-    126c:	40001108 	andmi	r1, r0, r8, lsl #2
-
-00001270 <processEngageDisengageTimeouts>:
-    1270:	e59fc060 	ldr	ip, [pc, #96]	; 12d8 <.text+0x12d8>
-    1274:	e5dc3000 	ldrb	r3, [ip]
-    1278:	e2433001 	sub	r3, r3, #1	; 0x1
-    127c:	e3530001 	cmp	r3, #1	; 0x1
-    1280:	e52d4004 	str	r4, [sp, #-4]!
-    1284:	9a000001 	bls	1290 <processEngageDisengageTimeouts+0x20>
-    1288:	e8bd0010 	ldmia	sp!, {r4}
-    128c:	e12fff1e 	bx	lr
-    1290:	e59f3044 	ldr	r3, [pc, #68]	; 12dc <.text+0x12dc>
-    1294:	e59f2044 	ldr	r2, [pc, #68]	; 12e0 <.text+0x12e0>
-    1298:	e8930003 	ldmia	r3, {r0, r1}
-    129c:	e8920018 	ldmia	r2, {r3, r4}
-    12a0:	e0500003 	subs	r0, r0, r3
-    12a4:	e0c11004 	sbc	r1, r1, r4
-    12a8:	e3510000 	cmp	r1, #0	; 0x0
-    12ac:	da000002 	ble	12bc <processEngageDisengageTimeouts+0x4c>
-    12b0:	e3e03000 	mvn	r3, #0	; 0x0
-    12b4:	e5cc3000 	strb	r3, [ip]
-    12b8:	eafffff2 	b	1288 <processEngageDisengageTimeouts+0x18>
-    12bc:	e3a0397a 	mov	r3, #1998848	; 0x1e8000
-    12c0:	e2833e47 	add	r3, r3, #1136	; 0x470
-    12c4:	e283300f 	add	r3, r3, #15	; 0xf
-    12c8:	1affffee 	bne	1288 <processEngageDisengageTimeouts+0x18>
-    12cc:	e1500003 	cmp	r0, r3
-    12d0:	9affffec 	bls	1288 <processEngageDisengageTimeouts+0x18>
-    12d4:	eafffff5 	b	12b0 <processEngageDisengageTimeouts+0x40>
-    12d8:	40001108 	andmi	r1, r0, r8, lsl #2
-    12dc:	40000870 	andmi	r0, r0, r0, ror r8
-    12e0:	40001134 	andmi	r1, r0, r4, lsr r1
-
-000012e4 <processLandingThrust>:
-    12e4:	e92d4070 	stmdb	sp!, {r4, r5, r6, lr}
-    12e8:	e59f5074 	ldr	r5, [pc, #116]	; 1364 <.text+0x1364>
-    12ec:	e5d53000 	ldrb	r3, [r5]
-    12f0:	e3530004 	cmp	r3, #4	; 0x4
-    12f4:	e59f606c 	ldr	r6, [pc, #108]	; 1368 <.text+0x1368>
-    12f8:	e3a01000 	mov	r1, #0	; 0x0
-    12fc:	0a000001 	beq	1308 <processLandingThrust+0x24>
-    1300:	e8bd4070 	ldmia	sp!, {r4, r5, r6, lr}
-    1304:	e12fff1e 	bx	lr
-    1308:	e596400c 	ldr	r4, [r6, #12]
-    130c:	e1a00004 	mov	r0, r4
-    1310:	eb004e09 	bl	14b3c <__gesf2>
-    1314:	e3500000 	cmp	r0, #0	; 0x0
-    1318:	d3a03003 	movle	r3, #3	; 0x3
-    131c:	e1a00004 	mov	r0, r4
-    1320:	d5c53000 	strleb	r3, [r5]
-    1324:	dafffff5 	ble	1300 <processLandingThrust+0x1c>
-    1328:	eb004ab4 	bl	13e00 <__aeabi_f2d>
-    132c:	e28f2028 	add	r2, pc, #40	; 0x28
-    1330:	e892000c 	ldmia	r2, {r2, r3}
-    1334:	eb0049d7 	bl	13a98 <__aeabi_dsub>
-    1338:	eb004c6e 	bl	144f8 <__aeabi_d2f>
-    133c:	e3a01000 	mov	r1, #0	; 0x0
-    1340:	e1a03000 	mov	r3, r0
-    1344:	e586300c 	str	r3, [r6, #12]
-    1348:	eb004dfd 	bl	14b44 <__lesf2>
-    134c:	e3500000 	cmp	r0, #0	; 0x0
-    1350:	b3a03000 	movlt	r3, #0	; 0x0
-    1354:	b586300c 	strlt	r3, [r6, #12]
-    1358:	eaffffe8 	b	1300 <processLandingThrust+0x1c>
-    135c:	3f847ae1 	svccc	0x00847ae1
-    1360:	47ae147b 	undefined
-    1364:	40001108 	andmi	r1, r0, r8, lsl #2
-    1368:	40001244 	andmi	r1, r0, r4, asr #4
-
-0000136c <processMotorCommands>:
-    136c:	e92d4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
-    1370:	e59f324c 	ldr	r3, [pc, #588]	; 15c4 <.text+0x15c4>
-    1374:	e5d32000 	ldrb	r2, [r3]
-    1378:	e35200ff 	cmp	r2, #255	; 0xff
-    137c:	e24dd018 	sub	sp, sp, #24	; 0x18
-    1380:	0a000066 	beq	1520 <processMotorCommands+0x1b4>
-    1384:	e2423001 	sub	r3, r2, #1	; 0x1
-    1388:	e3530001 	cmp	r3, #1	; 0x1
-    138c:	9a00006d 	bls	1548 <processMotorCommands+0x1dc>
-    1390:	e3520000 	cmp	r2, #0	; 0x0
-    1394:	13520003 	cmpne	r2, #3	; 0x3
-    1398:	13a04000 	movne	r4, #0	; 0x0
-    139c:	03a04001 	moveq	r4, #1	; 0x1
-    13a0:	0a000051 	beq	14ec <processMotorCommands+0x180>
-    13a4:	e3520004 	cmp	r2, #4	; 0x4
-    13a8:	0a000077 	beq	158c <processMotorCommands+0x220>
-    13ac:	e3520005 	cmp	r2, #5	; 0x5
-    13b0:	1a000057 	bne	1514 <processMotorCommands+0x1a8>
-    13b4:	e59f420c 	ldr	r4, [pc, #524]	; 15c8 <.text+0x15c8>
-    13b8:	e5940000 	ldr	r0, [r4]
-    13bc:	e5941004 	ldr	r1, [r4, #4]
-    13c0:	e594c008 	ldr	ip, [r4, #8]
-    13c4:	e1a0ec20 	mov	lr, r0, lsr #24
-    13c8:	e58de014 	str	lr, [sp, #20]
-    13cc:	e1a0ec21 	mov	lr, r1, lsr #24
-    13d0:	e594500c 	ldr	r5, [r4, #12]
-    13d4:	e58de010 	str	lr, [sp, #16]
-    13d8:	e1a0ec2c 	mov	lr, ip, lsr #24
-    13dc:	e58de00c 	str	lr, [sp, #12]
-    13e0:	e1a0e420 	mov	lr, r0, lsr #8
-    13e4:	e59f31e0 	ldr	r3, [pc, #480]	; 15cc <.text+0x15cc>
-    13e8:	e58de000 	str	lr, [sp]
-    13ec:	e1a0e425 	mov	lr, r5, lsr #8
-    13f0:	e58de008 	str	lr, [sp, #8]
-    13f4:	e1a07c25 	mov	r7, r5, lsr #24
-    13f8:	e1a0e825 	mov	lr, r5, lsr #16
-    13fc:	e58de004 	str	lr, [sp, #4]
-    1400:	e5c37017 	strb	r7, [r3, #23]
-    1404:	e59de000 	ldr	lr, [sp]
-    1408:	e1a06820 	mov	r6, r0, lsr #16
-    140c:	e5c3e009 	strb	lr, [r3, #9]
-    1410:	e5c3600a 	strb	r6, [r3, #10]
-    1414:	e59de014 	ldr	lr, [sp, #20]
-    1418:	e1a08421 	mov	r8, r1, lsr #8
-    141c:	e1a0a821 	mov	sl, r1, lsr #16
-    1420:	e5c3e00b 	strb	lr, [r3, #11]
-    1424:	e5c3800d 	strb	r8, [r3, #13]
-    1428:	e5c3a00e 	strb	sl, [r3, #14]
-    142c:	e59de010 	ldr	lr, [sp, #16]
-    1430:	e1a0942c 	mov	r9, ip, lsr #8
-    1434:	e1a0b82c 	mov	fp, ip, lsr #16
-    1438:	e5c3e00f 	strb	lr, [r3, #15]
-    143c:	e5c39011 	strb	r9, [r3, #17]
-    1440:	e5c3b012 	strb	fp, [r3, #18]
-    1444:	e59de00c 	ldr	lr, [sp, #12]
-    1448:	e5c3e013 	strb	lr, [r3, #19]
-    144c:	e59de008 	ldr	lr, [sp, #8]
-    1450:	e5c3e015 	strb	lr, [r3, #21]
-    1454:	e59de004 	ldr	lr, [sp, #4]
-    1458:	e5c3100c 	strb	r1, [r3, #12]
-    145c:	e5c3e016 	strb	lr, [r3, #22]
-    1460:	e5c3c010 	strb	ip, [r3, #16]
-    1464:	e5c35014 	strb	r5, [r3, #20]
-    1468:	e5c30008 	strb	r0, [r3, #8]
-    146c:	eb000aaa 	bl	3f1c <SIToLLCmdRoll>
-    1470:	e59f5158 	ldr	r5, [pc, #344]	; 15d0 <.text+0x15d0>
-    1474:	e1c500b2 	strh	r0, [r5, #2]
-    1478:	e5940004 	ldr	r0, [r4, #4]
-    147c:	eb000ab2 	bl	3f4c <SIToLLCmdPitch>
-    1480:	e1c500b0 	strh	r0, [r5]
-    1484:	e5940008 	ldr	r0, [r4, #8]
-    1488:	eb000abc 	bl	3f80 <SIToLLCmdYawRate>
-    148c:	e1c500b4 	strh	r0, [r5, #4]
-    1490:	e594000c 	ldr	r0, [r4, #12]
-    1494:	eb000ac6 	bl	3fb4 <SIToLLCmdThrust>
-    1498:	e59fc134 	ldr	ip, [pc, #308]	; 15d4 <.text+0x15d4>
-    149c:	e5dc3000 	ldrb	r3, [ip]
-    14a0:	e5dc2001 	ldrb	r2, [ip, #1]
-    14a4:	e3530000 	cmp	r3, #0	; 0x0
-    14a8:	13a01002 	movne	r1, #2	; 0x2
-    14ac:	03a01000 	moveq	r1, #0	; 0x0
-    14b0:	e3520000 	cmp	r2, #0	; 0x0
-    14b4:	e1a0e00c 	mov	lr, ip
-    14b8:	e1c500b6 	strh	r0, [r5, #6]
-    14bc:	1a00002e 	bne	157c <processMotorCommands+0x210>
-    14c0:	e5de3002 	ldrb	r3, [lr, #2]
-    14c4:	e3530000 	cmp	r3, #0	; 0x0
-    14c8:	e5dc3003 	ldrb	r3, [ip, #3]
-    14cc:	13811004 	orrne	r1, r1, #4	; 0x4
-    14d0:	e3530000 	cmp	r3, #0	; 0x0
-    14d4:	e59f30fc 	ldr	r3, [pc, #252]	; 15d8 <.text+0x15d8>
-    14d8:	13811008 	orrne	r1, r1, #8	; 0x8
-    14dc:	e3a02001 	mov	r2, #1	; 0x1
-    14e0:	e1c510b8 	strh	r1, [r5, #8]
-    14e4:	e5c32001 	strb	r2, [r3, #1]
-    14e8:	ea000009 	b	1514 <processMotorCommands+0x1a8>
-    14ec:	e59f30dc 	ldr	r3, [pc, #220]	; 15d0 <.text+0x15d0>
-    14f0:	e59f20e0 	ldr	r2, [pc, #224]	; 15d8 <.text+0x15d8>
-    14f4:	e3a0e000 	mov	lr, #0	; 0x0
-    14f8:	e3a01001 	mov	r1, #1	; 0x1
-    14fc:	e5c21001 	strb	r1, [r2, #1]
-    1500:	e1c310b8 	strh	r1, [r3, #8]
-    1504:	e1c3e0b0 	strh	lr, [r3]
-    1508:	e1c3e0b2 	strh	lr, [r3, #2]
-    150c:	e1c3e0b6 	strh	lr, [r3, #6]
-    1510:	e1c3e0b4 	strh	lr, [r3, #4]
-    1514:	e28dd018 	add	sp, sp, #24	; 0x18
-    1518:	e8bd4ff0 	ldmia	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
-    151c:	e12fff1e 	bx	lr
-    1520:	e59f30a8 	ldr	r3, [pc, #168]	; 15d0 <.text+0x15d0>
-    1524:	e59f10ac 	ldr	r1, [pc, #172]	; 15d8 <.text+0x15d8>
-    1528:	e3a02000 	mov	r2, #0	; 0x0
-    152c:	e5c12001 	strb	r2, [r1, #1]
-    1530:	e1c320b8 	strh	r2, [r3, #8]
-    1534:	e1c320b0 	strh	r2, [r3]
-    1538:	e1c320b2 	strh	r2, [r3, #2]
-    153c:	e1c320b6 	strh	r2, [r3, #6]
-    1540:	e1c320b4 	strh	r2, [r3, #4]
-    1544:	eafffff2 	b	1514 <processMotorCommands+0x1a8>
-    1548:	e59f1080 	ldr	r1, [pc, #128]	; 15d0 <.text+0x15d0>
-    154c:	e59f3084 	ldr	r3, [pc, #132]	; 15d8 <.text+0x15d8>
-    1550:	e3e02b3e 	mvn	r2, #63488	; 0xf800
-    1554:	e3a00001 	mov	r0, #1	; 0x1
-    1558:	e5c30001 	strb	r0, [r3, #1]
-    155c:	e1c120b4 	strh	r2, [r1, #4]
-    1560:	e3a03000 	mov	r3, #0	; 0x0
-    1564:	e3a0200c 	mov	r2, #12	; 0xc
-    1568:	e1c120b8 	strh	r2, [r1, #8]
-    156c:	e1c130b0 	strh	r3, [r1]
-    1570:	e1c130b2 	strh	r3, [r1, #2]
-    1574:	e1c130b6 	strh	r3, [r1, #6]
-    1578:	eaffffe5 	b	1514 <processMotorCommands+0x1a8>
-    157c:	e3510000 	cmp	r1, #0	; 0x0
-    1580:	13a01003 	movne	r1, #3	; 0x3
-    1584:	03a01001 	moveq	r1, #1	; 0x1
-    1588:	eaffffcc 	b	14c0 <processMotorCommands+0x154>
-    158c:	e59f3034 	ldr	r3, [pc, #52]	; 15c8 <.text+0x15c8>
-    1590:	e593000c 	ldr	r0, [r3, #12]
-    1594:	eb000a86 	bl	3fb4 <SIToLLCmdThrust>
-    1598:	e59f3038 	ldr	r3, [pc, #56]	; 15d8 <.text+0x15d8>
-    159c:	e59f202c 	ldr	r2, [pc, #44]	; 15d0 <.text+0x15d0>
-    15a0:	e3a01001 	mov	r1, #1	; 0x1
-    15a4:	e5c31001 	strb	r1, [r3, #1]
-    15a8:	e3a03008 	mov	r3, #8	; 0x8
-    15ac:	e1c200b6 	strh	r0, [r2, #6]
-    15b0:	e1c240b4 	strh	r4, [r2, #4]
-    15b4:	e1c230b8 	strh	r3, [r2, #8]
-    15b8:	e1c240b0 	strh	r4, [r2]
-    15bc:	e1c240b2 	strh	r4, [r2, #2]
-    15c0:	eaffffd3 	b	1514 <processMotorCommands+0x1a8>
-    15c4:	40001108 	andmi	r1, r0, r8, lsl #2
-    15c8:	40001244 	andmi	r1, r0, r4, asr #4
-    15cc:	40000fcc 	andmi	r0, r0, ip, asr #31
-    15d0:	40000fc0 	andmi	r0, r0, r0, asr #31
-    15d4:	4000110a 	andmi	r1, r0, sl, lsl #2
-    15d8:	40001104 	andmi	r1, r0, r4, lsl #2
-
-000015dc <processFlightActionRequests>:
-    15dc:	e92d4010 	stmdb	sp!, {r4, lr}
-    15e0:	e59f40d4 	ldr	r4, [pc, #212]	; 16bc <.text+0x16bc>
-    15e4:	e5943000 	ldr	r3, [r4]
-    15e8:	e5d32008 	ldrb	r2, [r3, #8]
-    15ec:	e3520000 	cmp	r2, #0	; 0x0
-    15f0:	0a000006 	beq	1610 <processFlightActionRequests+0x34>
-    15f4:	e59f30c4 	ldr	r3, [pc, #196]	; 16c0 <.text+0x16c0>
-    15f8:	e1d320b8 	ldrh	r2, [r3, #8]
-    15fc:	e3520000 	cmp	r2, #0	; 0x0
-    1600:	1a000004 	bne	1618 <processFlightActionRequests+0x3c>
-    1604:	e5942000 	ldr	r2, [r4]
-    1608:	e3a03000 	mov	r3, #0	; 0x0
-    160c:	e5c23008 	strb	r3, [r2, #8]
-    1610:	e8bd4010 	ldmia	sp!, {r4, lr}
-    1614:	e12fff1e 	bx	lr
-    1618:	e59f30a4 	ldr	r3, [pc, #164]	; 16c4 <.text+0x16c4>
-    161c:	e5d33000 	ldrb	r3, [r3]
-    1620:	e3530003 	cmp	r3, #3	; 0x3
-    1624:	0a00000e 	beq	1664 <processFlightActionRequests+0x88>
-    1628:	e3530000 	cmp	r3, #0	; 0x0
-    162c:	059f3094 	ldreq	r3, [pc, #148]	; 16c8 <.text+0x16c8>
-    1630:	03e02000 	mvneq	r2, #0	; 0x0
-    1634:	05c32000 	streqb	r2, [r3]
-    1638:	0afffff1 	beq	1604 <processFlightActionRequests+0x28>
-    163c:	e3530004 	cmp	r3, #4	; 0x4
-    1640:	0a000015 	beq	169c <processFlightActionRequests+0xc0>
-    1644:	e3530005 	cmp	r3, #5	; 0x5
-    1648:	1affffed 	bne	1604 <processFlightActionRequests+0x28>
-    164c:	e59f2074 	ldr	r2, [pc, #116]	; 16c8 <.text+0x16c8>
-    1650:	e5d23000 	ldrb	r3, [r2]
-    1654:	e3530005 	cmp	r3, #5	; 0x5
-    1658:	02433001 	subeq	r3, r3, #1	; 0x1
-    165c:	05c23000 	streqb	r3, [r2]
-    1660:	eaffffe7 	b	1604 <processFlightActionRequests+0x28>
-    1664:	e59f205c 	ldr	r2, [pc, #92]	; 16c8 <.text+0x16c8>
-    1668:	e5d23000 	ldrb	r3, [r2]
-    166c:	e3530000 	cmp	r3, #0	; 0x0
-    1670:	02833001 	addeq	r3, r3, #1	; 0x1
-    1674:	0a000002 	beq	1684 <processFlightActionRequests+0xa8>
-    1678:	e3530003 	cmp	r3, #3	; 0x3
-    167c:	1affffe0 	bne	1604 <processFlightActionRequests+0x28>
-    1680:	e2433001 	sub	r3, r3, #1	; 0x1
-    1684:	e5c23000 	strb	r3, [r2]
-    1688:	e59f203c 	ldr	r2, [pc, #60]	; 16cc <.text+0x16cc>
-    168c:	e59f303c 	ldr	r3, [pc, #60]	; 16d0 <.text+0x16d0>
-    1690:	e8920003 	ldmia	r2, {r0, r1}
-    1694:	e8830003 	stmia	r3, {r0, r1}
-    1698:	eaffffd9 	b	1604 <processFlightActionRequests+0x28>
-    169c:	e59f2024 	ldr	r2, [pc, #36]	; 16c8 <.text+0x16c8>
-    16a0:	e5d23000 	ldrb	r3, [r2]
-    16a4:	e3530003 	cmp	r3, #3	; 0x3
-    16a8:	1affffd5 	bne	1604 <processFlightActionRequests+0x28>
-    16ac:	e2833002 	add	r3, r3, #2	; 0x2
-    16b0:	e5c23000 	strb	r3, [r2]
-    16b4:	eb000ae3 	bl	4248 <pidReset>
-    16b8:	eaffffd1 	b	1604 <processFlightActionRequests+0x28>
-    16bc:	40001180 	andmi	r1, r0, r0, lsl #3
-    16c0:	4000116c 	andmi	r1, r0, ip, ror #2
-    16c4:	4000128c 	andmi	r1, r0, ip, lsl #5
-    16c8:	40001108 	andmi	r1, r0, r8, lsl #2
-    16cc:	40000870 	andmi	r0, r0, r0, ror r8
-    16d0:	40001134 	andmi	r1, r0, r4, lsr r1
-
-000016d4 <feedbackBeep>:
-    16d4:	e92d4070 	stmdb	sp!, {r4, r5, r6, lr}
-    16d8:	e59f3138 	ldr	r3, [pc, #312]	; 1818 <.text+0x1818>
-    16dc:	e5d32000 	ldrb	r2, [r3]
-    16e0:	e35200ff 	cmp	r2, #255	; 0xff
-    16e4:	0a00002b 	beq	1798 <feedbackBeep+0xc4>
-    16e8:	e59f312c 	ldr	r3, [pc, #300]	; 181c <.text+0x181c>
-    16ec:	e1d340b8 	ldrh	r4, [r3, #8]
-    16f0:	e3540000 	cmp	r4, #0	; 0x0
-    16f4:	1a000011 	bne	1740 <feedbackBeep+0x6c>
-    16f8:	e59f6120 	ldr	r6, [pc, #288]	; 1820 <.text+0x1820>
-    16fc:	e59f5120 	ldr	r5, [pc, #288]	; 1824 <.text+0x1824>
-    1700:	e5961000 	ldr	r1, [r6]
-    1704:	e0832195 	umull	r2, r3, r5, r1
-    1708:	e1a03323 	mov	r3, r3, lsr #6
-    170c:	e0632283 	rsb	r2, r3, r3, lsl #5
-    1710:	e0833102 	add	r3, r3, r2, lsl #2
-    1714:	e1510183 	cmp	r1, r3, lsl #3
-    1718:	0a000033 	beq	17ec <feedbackBeep+0x118>
-    171c:	e0832195 	umull	r2, r3, r5, r1
-    1720:	e1a03323 	mov	r3, r3, lsr #6
-    1724:	e0632283 	rsb	r2, r3, r3, lsl #5
-    1728:	e0833102 	add	r3, r3, r2, lsl #2
-    172c:	e0413183 	sub	r3, r1, r3, lsl #3
-    1730:	e3530032 	cmp	r3, #50	; 0x32
-    1734:	0a000030 	beq	17fc <feedbackBeep+0x128>
-    1738:	e8bd4070 	ldmia	sp!, {r4, r5, r6, lr}
-    173c:	e12fff1e 	bx	lr
-    1740:	e59f50d8 	ldr	r5, [pc, #216]	; 1820 <.text+0x1820>
-    1744:	e59f40d8 	ldr	r4, [pc, #216]	; 1824 <.text+0x1824>
-    1748:	e5951000 	ldr	r1, [r5]
-    174c:	e0823194 	umull	r3, r2, r4, r1
-    1750:	e1a02322 	mov	r2, r2, lsr #6
-    1754:	e0623282 	rsb	r3, r2, r2, lsl #5
-    1758:	e0823103 	add	r3, r2, r3, lsl #2
-    175c:	e0412183 	sub	r2, r1, r3, lsl #3
-    1760:	e3520064 	cmp	r2, #100	; 0x64
-    1764:	13520000 	cmpne	r2, #0	; 0x0
-    1768:	0a00001b 	beq	17dc <feedbackBeep+0x108>
-    176c:	e0823194 	umull	r3, r2, r4, r1
-    1770:	e1a02322 	mov	r2, r2, lsr #6
-    1774:	e0623282 	rsb	r3, r2, r2, lsl #5
-    1778:	e0823103 	add	r3, r2, r3, lsl #2
-    177c:	e0412183 	sub	r2, r1, r3, lsl #3
-    1780:	e3520096 	cmp	r2, #150	; 0x96
-    1784:	13520032 	cmpne	r2, #50	; 0x32
-    1788:	1affffea 	bne	1738 <feedbackBeep+0x64>
-    178c:	e3a00000 	mov	r0, #0	; 0x0
-    1790:	eb001946 	bl	7cb0 <beeper>
-    1794:	eaffffe7 	b	1738 <feedbackBeep+0x64>
-    1798:	e59f5080 	ldr	r5, [pc, #128]	; 1820 <.text+0x1820>
-    179c:	e59f4084 	ldr	r4, [pc, #132]	; 1828 <.text+0x1828>
-    17a0:	e5952000 	ldr	r2, [r5]
-    17a4:	e0831294 	umull	r1, r3, r4, r2
-    17a8:	e1a032a3 	mov	r3, r3, lsr #5
-    17ac:	e0833103 	add	r3, r3, r3, lsl #2
-    17b0:	e0833103 	add	r3, r3, r3, lsl #2
-    17b4:	e1520103 	cmp	r2, r3, lsl #2
-    17b8:	0a000012 	beq	1808 <feedbackBeep+0x134>
-    17bc:	e0831294 	umull	r1, r3, r4, r2
-    17c0:	e1a032a3 	mov	r3, r3, lsr #5
-    17c4:	e0833103 	add	r3, r3, r3, lsl #2
-    17c8:	e0833103 	add	r3, r3, r3, lsl #2
-    17cc:	e0423103 	sub	r3, r2, r3, lsl #2
-    17d0:	e3530032 	cmp	r3, #50	; 0x32
-    17d4:	1affffd7 	bne	1738 <feedbackBeep+0x64>
-    17d8:	eaffffeb 	b	178c <feedbackBeep+0xb8>
-    17dc:	e3a00001 	mov	r0, #1	; 0x1
-    17e0:	eb001932 	bl	7cb0 <beeper>
-    17e4:	e5951000 	ldr	r1, [r5]
-    17e8:	eaffffdf 	b	176c <feedbackBeep+0x98>
-    17ec:	e3a00001 	mov	r0, #1	; 0x1
-    17f0:	eb00192e 	bl	7cb0 <beeper>
-    17f4:	e5961000 	ldr	r1, [r6]
-    17f8:	eaffffc7 	b	171c <feedbackBeep+0x48>
-    17fc:	e1a00004 	mov	r0, r4
-    1800:	eb00192a 	bl	7cb0 <beeper>
-    1804:	eaffffcb 	b	1738 <feedbackBeep+0x64>
-    1808:	e3a00001 	mov	r0, #1	; 0x1
-    180c:	eb001927 	bl	7cb0 <beeper>
-    1810:	e5952000 	ldr	r2, [r5]
-    1814:	eaffffe8 	b	17bc <feedbackBeep+0xe8>
-    1818:	40001108 	andmi	r1, r0, r8, lsl #2
-    181c:	4000116c 	andmi	r1, r0, ip, ror #2
-    1820:	4000113c 	andmi	r1, r0, ip, lsr r1
-    1824:	10624dd3 	ldrned	r4, [r2], #-211
-    1828:	51eb851f 	mvnpl	r8, pc, lsl r5
-
-0000182c <processKF>:
-    182c:	e92d4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
-    1830:	e59f35c4 	ldr	r3, [pc, #1476]	; 1dfc <.text+0x1dfc>
-    1834:	e5933000 	ldr	r3, [r3]
-    1838:	e5d32008 	ldrb	r2, [r3, #8]
-    183c:	e3520000 	cmp	r2, #0	; 0x0
-    1840:	e24dd040 	sub	sp, sp, #64	; 0x40
-    1844:	0a000090 	beq	1a8c <processKF+0x260>
-    1848:	e3a02000 	mov	r2, #0	; 0x0
-    184c:	e5c32008 	strb	r2, [r3, #8]
-    1850:	e59f35a8 	ldr	r3, [pc, #1448]	; 1e00 <.text+0x1e00>
-    1854:	e5d3b003 	ldrb	fp, [r3, #3]
-    1858:	e5d39002 	ldrb	r9, [r3, #2]
-    185c:	e5d3a01a 	ldrb	sl, [r3, #26]
-    1860:	e5d3801e 	ldrb	r8, [r3, #30]
-    1864:	e5d37006 	ldrb	r7, [r3, #6]
-    1868:	e5d34022 	ldrb	r4, [r3, #34]
-    186c:	e5d32026 	ldrb	r2, [r3, #38]
-    1870:	e5d35001 	ldrb	r5, [r3, #1]
-    1874:	e5d36019 	ldrb	r6, [r3, #25]
-    1878:	e5d3e01d 	ldrb	lr, [r3, #29]
-    187c:	e5d31005 	ldrb	r1, [r3, #5]
-    1880:	e5d3c021 	ldrb	ip, [r3, #33]
-    1884:	e5d30025 	ldrb	r0, [r3, #37]
-    1888:	e58db03c 	str	fp, [sp, #60]
-    188c:	e5d3b01b 	ldrb	fp, [r3, #27]
-    1890:	e58db038 	str	fp, [sp, #56]
-    1894:	e5d3b01f 	ldrb	fp, [r3, #31]
-    1898:	e58db030 	str	fp, [sp, #48]
-    189c:	e5d3b007 	ldrb	fp, [r3, #7]
-    18a0:	e58db028 	str	fp, [sp, #40]
-    18a4:	e5d3b023 	ldrb	fp, [r3, #35]
-    18a8:	e58db024 	str	fp, [sp, #36]
-    18ac:	e5d3b027 	ldrb	fp, [r3, #39]
-    18b0:	e58db01c 	str	fp, [sp, #28]
-    18b4:	e1800402 	orr	r0, r0, r2, lsl #8
-    18b8:	e5d3201c 	ldrb	r2, [r3, #28]
-    18bc:	e5d3b000 	ldrb	fp, [r3]
-    18c0:	e186640a 	orr	r6, r6, sl, lsl #8
-    18c4:	e5d3a004 	ldrb	sl, [r3, #4]
-    18c8:	e58d2034 	str	r2, [sp, #52]
-    18cc:	e18cc404 	orr	ip, ip, r4, lsl #8
-    18d0:	e5d34020 	ldrb	r4, [r3, #32]
-    18d4:	e58d402c 	str	r4, [sp, #44]
-    18d8:	e5d32024 	ldrb	r2, [r3, #36]
-    18dc:	e1855409 	orr	r5, r5, r9, lsl #8
-    18e0:	e5d39008 	ldrb	r9, [r3, #8]
-    18e4:	e58d2020 	str	r2, [sp, #32]
-    18e8:	e5d34028 	ldrb	r4, [r3, #40]
-    18ec:	e59d203c 	ldr	r2, [sp, #60]
-    18f0:	e58d4018 	str	r4, [sp, #24]
-    18f4:	e59d4038 	ldr	r4, [sp, #56]
-    18f8:	e1855802 	orr	r5, r5, r2, lsl #16
-    18fc:	e1866804 	orr	r6, r6, r4, lsl #16
-    1900:	e59d2030 	ldr	r2, [sp, #48]
-    1904:	e59d4028 	ldr	r4, [sp, #40]
-    1908:	e18ee408 	orr	lr, lr, r8, lsl #8
-    190c:	e1811407 	orr	r1, r1, r7, lsl #8
-    1910:	e18ee802 	orr	lr, lr, r2, lsl #16
-    1914:	e1811804 	orr	r1, r1, r4, lsl #16
-    1918:	e59d2024 	ldr	r2, [sp, #36]
-    191c:	e1857c0a 	orr	r7, r5, sl, lsl #24
-    1920:	e1818c09 	orr	r8, r1, r9, lsl #24
-    1924:	e59d5034 	ldr	r5, [sp, #52]
-    1928:	e59d102c 	ldr	r1, [sp, #44]
-    192c:	e18cc802 	orr	ip, ip, r2, lsl #16
-    1930:	e59f24cc 	ldr	r2, [pc, #1228]	; 1e04 <.text+0x1e04>
-    1934:	e186ac05 	orr	sl, r6, r5, lsl #24
-    1938:	e18e5c01 	orr	r5, lr, r1, lsl #24
-    193c:	e59d1020 	ldr	r1, [sp, #32]
-    1940:	e582509c 	str	r5, [r2, #156]
-    1944:	e59d401c 	ldr	r4, [sp, #28]
-    1948:	e59f54b8 	ldr	r5, [pc, #1208]	; 1e08 <.text+0x1e08>
-    194c:	e18c6c01 	orr	r6, ip, r1, lsl #24
-    1950:	e59dc018 	ldr	ip, [sp, #24]
-    1954:	e20b1001 	and	r1, fp, #1	; 0x1
-    1958:	e5c51000 	strb	r1, [r5]
-    195c:	e1800804 	orr	r0, r0, r4, lsl #16
-    1960:	e59f54a4 	ldr	r5, [pc, #1188]	; 1e0c <.text+0x1e0c>
-    1964:	e1809c0c 	orr	r9, r0, ip, lsl #24
-    1968:	e20bc004 	and	ip, fp, #4	; 0x4
-    196c:	e5c5c000 	strb	ip, [r5]
-    1970:	e59f4498 	ldr	r4, [pc, #1176]	; 1e10 <.text+0x1e10>
-    1974:	e59f1498 	ldr	r1, [pc, #1176]	; 1e14 <.text+0x1e14>
-    1978:	e59fc498 	ldr	ip, [pc, #1176]	; 1e18 <.text+0x1e18>
-    197c:	e20b0002 	and	r0, fp, #2	; 0x2
-    1980:	e20be020 	and	lr, fp, #32	; 0x20
-    1984:	e584909c 	str	r9, [r4, #156]
-    1988:	e5c10000 	strb	r0, [r1]
-    198c:	e5cce000 	strb	lr, [ip]
-    1990:	e5827094 	str	r7, [r2, #148]
-    1994:	e582a098 	str	sl, [r2, #152]
-    1998:	e5848094 	str	r8, [r4, #148]
-    199c:	e5846098 	str	r6, [r4, #152]
-    19a0:	e5827090 	str	r7, [r2, #144]
-    19a4:	e5848090 	str	r8, [r4, #144]
-    19a8:	e5d3a00b 	ldrb	sl, [r3, #11]
-    19ac:	e5d3800a 	ldrb	r8, [r3, #10]
-    19b0:	e5d3702a 	ldrb	r7, [r3, #42]
-    19b4:	e5d36032 	ldrb	r6, [r3, #50]
-    19b8:	e5d35016 	ldrb	r5, [r3, #22]
-    19bc:	e5d3403e 	ldrb	r4, [r3, #62]
-    19c0:	e5d31009 	ldrb	r1, [r3, #9]
-    19c4:	e5d3e029 	ldrb	lr, [r3, #41]
-    19c8:	e5d32031 	ldrb	r2, [r3, #49]
-    19cc:	e5d3c015 	ldrb	ip, [r3, #21]
-    19d0:	e5d3003d 	ldrb	r0, [r3, #61]
-    19d4:	e58da014 	str	sl, [sp, #20]
-    19d8:	e5d3a02b 	ldrb	sl, [r3, #43]
-    19dc:	e58da010 	str	sl, [sp, #16]
-    19e0:	e5d3a033 	ldrb	sl, [r3, #51]
-    19e4:	e58da00c 	str	sl, [sp, #12]
-    19e8:	e5d3a017 	ldrb	sl, [r3, #23]
-    19ec:	e58da008 	str	sl, [sp, #8]
-    19f0:	e5d3a03f 	ldrb	sl, [r3, #63]
-    19f4:	e58da004 	str	sl, [sp, #4]
-    19f8:	e1800404 	orr	r0, r0, r4, lsl #8
-    19fc:	e5d34040 	ldrb	r4, [r3, #64]
-    1a00:	e58d4000 	str	r4, [sp]
-    1a04:	e18cc405 	orr	ip, ip, r5, lsl #8
-    1a08:	e59d5014 	ldr	r5, [sp, #20]
-    1a0c:	e5d3a034 	ldrb	sl, [r3, #52]
-    1a10:	e5d39018 	ldrb	r9, [r3, #24]
-    1a14:	e1811408 	orr	r1, r1, r8, lsl #8
-    1a18:	e18ee407 	orr	lr, lr, r7, lsl #8
-    1a1c:	e5d3802c 	ldrb	r8, [r3, #44]
-    1a20:	e5d3700c 	ldrb	r7, [r3, #12]
-    1a24:	e59d400c 	ldr	r4, [sp, #12]
-    1a28:	e59d3010 	ldr	r3, [sp, #16]
-    1a2c:	e1811805 	orr	r1, r1, r5, lsl #16
-    1a30:	e1822406 	orr	r2, r2, r6, lsl #8
-    1a34:	e59d5008 	ldr	r5, [sp, #8]
-    1a38:	e18ee803 	orr	lr, lr, r3, lsl #16
-    1a3c:	e1822804 	orr	r2, r2, r4, lsl #16
-    1a40:	e59d3004 	ldr	r3, [sp, #4]
-    1a44:	e18cc805 	orr	ip, ip, r5, lsl #16
-    1a48:	e1815c07 	orr	r5, r1, r7, lsl #24
-    1a4c:	e1821c0a 	orr	r1, r2, sl, lsl #24
-    1a50:	e59da000 	ldr	sl, [sp]
-    1a54:	e1800803 	orr	r0, r0, r3, lsl #16
-    1a58:	e59f43bc 	ldr	r4, [pc, #956]	; 1e1c <.text+0x1e1c>
-    1a5c:	e59f33bc 	ldr	r3, [pc, #956]	; 1e20 <.text+0x1e20>
-    1a60:	e18e6c08 	orr	r6, lr, r8, lsl #24
-    1a64:	e1802c0a 	orr	r2, r0, sl, lsl #24
-    1a68:	e18cec09 	orr	lr, ip, r9, lsl #24
-    1a6c:	e31b0080 	tst	fp, #128	; 0x80
-    1a70:	e583109c 	str	r1, [r3, #156]
-    1a74:	e5842018 	str	r2, [r4, #24]
-    1a78:	e5835094 	str	r5, [r3, #148]
-    1a7c:	e5836098 	str	r6, [r3, #152]
-    1a80:	e584e014 	str	lr, [r4, #20]
-    1a84:	e5835090 	str	r5, [r3, #144]
-    1a88:	1a0000d9 	bne	1df4 <processKF+0x5c8>
-    1a8c:	e59fb384 	ldr	fp, [pc, #900]	; 1e18 <.text+0x1e18>
-    1a90:	eb0010f3 	bl	5e64 <KFilter>
-    1a94:	e5db3000 	ldrb	r3, [fp]
-    1a98:	e3530000 	cmp	r3, #0	; 0x0
-    1a9c:	0a000060 	beq	1c24 <processKF+0x3f8>
-    1aa0:	e59f337c 	ldr	r3, [pc, #892]	; 1e24 <.text+0x1e24>
-    1aa4:	e5932018 	ldr	r2, [r3, #24]
-    1aa8:	e59f6378 	ldr	r6, [pc, #888]	; 1e28 <.text+0x1e28>
-    1aac:	e1a03422 	mov	r3, r2, lsr #8
-    1ab0:	e1a00c22 	mov	r0, r2, lsr #24
-    1ab4:	e1a01822 	mov	r1, r2, lsr #16
-    1ab8:	e5c63021 	strb	r3, [r6, #33]
-    1abc:	e5c61022 	strb	r1, [r6, #34]
-    1ac0:	e5c60023 	strb	r0, [r6, #35]
-    1ac4:	e5c62020 	strb	r2, [r6, #32]
-    1ac8:	e59fc338 	ldr	ip, [pc, #824]	; 1e08 <.text+0x1e08>
-    1acc:	e5dc3000 	ldrb	r3, [ip]
-    1ad0:	e3530000 	cmp	r3, #0	; 0x0
-    1ad4:	0a000066 	beq	1c74 <processKF+0x448>
-    1ad8:	e59f3344 	ldr	r3, [pc, #836]	; 1e24 <.text+0x1e24>
-    1adc:	e593100c 	ldr	r1, [r3, #12]
-    1ae0:	e5932000 	ldr	r2, [r3]
-    1ae4:	e1a05c21 	mov	r5, r1, lsr #24
-    1ae8:	e1a03422 	mov	r3, r2, lsr #8
-    1aec:	e1a0c421 	mov	ip, r1, lsr #8
-    1af0:	e1a0e821 	mov	lr, r1, lsr #16
-    1af4:	e1a04c22 	mov	r4, r2, lsr #24
-    1af8:	e1a00822 	mov	r0, r2, lsr #16
-    1afc:	e5c6100c 	strb	r1, [r6, #12]
-    1b00:	e5c63001 	strb	r3, [r6, #1]
-    1b04:	e5c60002 	strb	r0, [r6, #2]
-    1b08:	e5c64003 	strb	r4, [r6, #3]
-    1b0c:	e5c6c00d 	strb	ip, [r6, #13]
-    1b10:	e5c6e00e 	strb	lr, [r6, #14]
-    1b14:	e5c6500f 	strb	r5, [r6, #15]
-    1b18:	e5c62000 	strb	r2, [r6]
-    1b1c:	e59f12f0 	ldr	r1, [pc, #752]	; 1e14 <.text+0x1e14>
-    1b20:	e5d13000 	ldrb	r3, [r1]
-    1b24:	e3530000 	cmp	r3, #0	; 0x0
-    1b28:	0a000072 	beq	1cf8 <processKF+0x4cc>
-    1b2c:	e59f32f0 	ldr	r3, [pc, #752]	; 1e24 <.text+0x1e24>
-    1b30:	e5931010 	ldr	r1, [r3, #16]
-    1b34:	e5932004 	ldr	r2, [r3, #4]
-    1b38:	e1a05c21 	mov	r5, r1, lsr #24
-    1b3c:	e1a03422 	mov	r3, r2, lsr #8
-    1b40:	e1a04c22 	mov	r4, r2, lsr #24
-    1b44:	e1a00822 	mov	r0, r2, lsr #16
-    1b48:	e1a0c421 	mov	ip, r1, lsr #8
-    1b4c:	e1a0e821 	mov	lr, r1, lsr #16
-    1b50:	e5c62004 	strb	r2, [r6, #4]
-    1b54:	e5c63005 	strb	r3, [r6, #5]
-    1b58:	e5c60006 	strb	r0, [r6, #6]
-    1b5c:	e5c64007 	strb	r4, [r6, #7]
-    1b60:	e5c6c011 	strb	ip, [r6, #17]
-    1b64:	e5c6e012 	strb	lr, [r6, #18]
-    1b68:	e5c65013 	strb	r5, [r6, #19]
-    1b6c:	e5c61010 	strb	r1, [r6, #16]
-    1b70:	e59f2294 	ldr	r2, [pc, #660]	; 1e0c <.text+0x1e0c>
-    1b74:	e5d23000 	ldrb	r3, [r2]
-    1b78:	e3530000 	cmp	r3, #0	; 0x0
-    1b7c:	0a00007e 	beq	1d7c <processKF+0x550>
-    1b80:	e59f329c 	ldr	r3, [pc, #668]	; 1e24 <.text+0x1e24>
-    1b84:	e5931014 	ldr	r1, [r3, #20]
-    1b88:	e5932008 	ldr	r2, [r3, #8]
-    1b8c:	e1a05c21 	mov	r5, r1, lsr #24
-    1b90:	e1a04c22 	mov	r4, r2, lsr #24
-    1b94:	e1a03422 	mov	r3, r2, lsr #8
-    1b98:	e1a00822 	mov	r0, r2, lsr #16
-    1b9c:	e1a0c421 	mov	ip, r1, lsr #8
-    1ba0:	e1a0e821 	mov	lr, r1, lsr #16
-    1ba4:	e5c63009 	strb	r3, [r6, #9]
-    1ba8:	e5c6000a 	strb	r0, [r6, #10]
-    1bac:	e5c6400b 	strb	r4, [r6, #11]
-    1bb0:	e5c6c015 	strb	ip, [r6, #21]
-    1bb4:	e5c6e016 	strb	lr, [r6, #22]
-    1bb8:	e5c65017 	strb	r5, [r6, #23]
-    1bbc:	e5c62008 	strb	r2, [r6, #8]
-    1bc0:	e5c61014 	strb	r1, [r6, #20]
-    1bc4:	e59f4260 	ldr	r4, [pc, #608]	; 1e2c <.text+0x1e2c>
-    1bc8:	e5940014 	ldr	r0, [r4, #20]
-    1bcc:	eb000904 	bl	3fe4 <LLToSIAngleRoll>
-    1bd0:	e1a03000 	mov	r3, r0
-    1bd4:	e1a02423 	mov	r2, r3, lsr #8
-    1bd8:	e1a01823 	mov	r1, r3, lsr #16
-    1bdc:	e1a0cc20 	mov	ip, r0, lsr #24
-    1be0:	e5940010 	ldr	r0, [r4, #16]
-    1be4:	e5c62019 	strb	r2, [r6, #25]
-    1be8:	e5c6101a 	strb	r1, [r6, #26]
-    1bec:	e5c63018 	strb	r3, [r6, #24]
-    1bf0:	e5c6c01b 	strb	ip, [r6, #27]
-    1bf4:	eb00096a 	bl	41a4 <LLToSIAnglePitch>
-    1bf8:	e1a03000 	mov	r3, r0
-    1bfc:	e1a02c20 	mov	r2, r0, lsr #24
-    1c00:	e1a01420 	mov	r1, r0, lsr #8
-    1c04:	e1a00820 	mov	r0, r0, lsr #16
-    1c08:	e5c6201f 	strb	r2, [r6, #31]
-    1c0c:	e5c6101d 	strb	r1, [r6, #29]
-    1c10:	e5c6001e 	strb	r0, [r6, #30]
-    1c14:	e5c6301c 	strb	r3, [r6, #28]
-    1c18:	e28dd040 	add	sp, sp, #64	; 0x40
-    1c1c:	e8bd4ff0 	ldmia	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
-    1c20:	e12fff1e 	bx	lr
-    1c24:	e59f2204 	ldr	r2, [pc, #516]	; 1e30 <.text+0x1e30>
-    1c28:	e5d21011 	ldrb	r1, [r2, #17]
-    1c2c:	e5d23010 	ldrb	r3, [r2, #16]
-    1c30:	e5d2c012 	ldrb	ip, [r2, #18]
-    1c34:	e5d20013 	ldrb	r0, [r2, #19]
-    1c38:	e1833401 	orr	r3, r3, r1, lsl #8
-    1c3c:	e183380c 	orr	r3, r3, ip, lsl #16
-    1c40:	e1833c00 	orr	r3, r3, r0, lsl #24
-    1c44:	e59f61dc 	ldr	r6, [pc, #476]	; 1e28 <.text+0x1e28>
-    1c48:	e1a00c23 	mov	r0, r3, lsr #24
-    1c4c:	e1a02423 	mov	r2, r3, lsr #8
-    1c50:	e1a01823 	mov	r1, r3, lsr #16
-    1c54:	e5c62021 	strb	r2, [r6, #33]
-    1c58:	e5c61022 	strb	r1, [r6, #34]
-    1c5c:	e5c60023 	strb	r0, [r6, #35]
-    1c60:	e5c63020 	strb	r3, [r6, #32]
-    1c64:	e59fc19c 	ldr	ip, [pc, #412]	; 1e08 <.text+0x1e08>
-    1c68:	e5dc3000 	ldrb	r3, [ip]
-    1c6c:	e3530000 	cmp	r3, #0	; 0x0
-    1c70:	1affff98 	bne	1ad8 <processKF+0x2ac>
-    1c74:	e59f31b4 	ldr	r3, [pc, #436]	; 1e30 <.text+0x1e30>
-    1c78:	e5d3c001 	ldrb	ip, [r3, #1]
-    1c7c:	e5d30009 	ldrb	r0, [r3, #9]
-    1c80:	e5d31000 	ldrb	r1, [r3]
-    1c84:	e5d32008 	ldrb	r2, [r3, #8]
-    1c88:	e5d3e002 	ldrb	lr, [r3, #2]
-    1c8c:	e5d3400a 	ldrb	r4, [r3, #10]
-    1c90:	e181140c 	orr	r1, r1, ip, lsl #8
-    1c94:	e1822400 	orr	r2, r2, r0, lsl #8
-    1c98:	e5d3c00b 	ldrb	ip, [r3, #11]
-    1c9c:	e5d30003 	ldrb	r0, [r3, #3]
-    1ca0:	e181180e 	orr	r1, r1, lr, lsl #16
-    1ca4:	e1822804 	orr	r2, r2, r4, lsl #16
-    1ca8:	e1811c00 	orr	r1, r1, r0, lsl #24
-    1cac:	e1822c0c 	orr	r2, r2, ip, lsl #24
-    1cb0:	e1a03421 	mov	r3, r1, lsr #8
-    1cb4:	e1a04c21 	mov	r4, r1, lsr #24
-    1cb8:	e1a00821 	mov	r0, r1, lsr #16
-    1cbc:	e1a05c22 	mov	r5, r2, lsr #24
-    1cc0:	e1a0c422 	mov	ip, r2, lsr #8
-    1cc4:	e1a0e822 	mov	lr, r2, lsr #16
-    1cc8:	e5c61000 	strb	r1, [r6]
-    1ccc:	e5c63001 	strb	r3, [r6, #1]
-    1cd0:	e5c60002 	strb	r0, [r6, #2]
-    1cd4:	e5c64003 	strb	r4, [r6, #3]
-    1cd8:	e5c6c00d 	strb	ip, [r6, #13]
-    1cdc:	e5c6e00e 	strb	lr, [r6, #14]
-    1ce0:	e5c6500f 	strb	r5, [r6, #15]
-    1ce4:	e5c6200c 	strb	r2, [r6, #12]
-    1ce8:	e59f1124 	ldr	r1, [pc, #292]	; 1e14 <.text+0x1e14>
-    1cec:	e5d13000 	ldrb	r3, [r1]
-    1cf0:	e3530000 	cmp	r3, #0	; 0x0
-    1cf4:	1affff8c 	bne	1b2c <processKF+0x300>
-    1cf8:	e59f3130 	ldr	r3, [pc, #304]	; 1e30 <.text+0x1e30>
-    1cfc:	e5d3c005 	ldrb	ip, [r3, #5]
-    1d00:	e5d3000d 	ldrb	r0, [r3, #13]
-    1d04:	e5d31004 	ldrb	r1, [r3, #4]
-    1d08:	e5d3200c 	ldrb	r2, [r3, #12]
-    1d0c:	e5d3e006 	ldrb	lr, [r3, #6]
-    1d10:	e5d3400e 	ldrb	r4, [r3, #14]
-    1d14:	e181140c 	orr	r1, r1, ip, lsl #8
-    1d18:	e1822400 	orr	r2, r2, r0, lsl #8
-    1d1c:	e5d3c00f 	ldrb	ip, [r3, #15]
-    1d20:	e5d30007 	ldrb	r0, [r3, #7]
-    1d24:	e181180e 	orr	r1, r1, lr, lsl #16
-    1d28:	e1822804 	orr	r2, r2, r4, lsl #16
-    1d2c:	e1822c0c 	orr	r2, r2, ip, lsl #24
-    1d30:	e1811c00 	orr	r1, r1, r0, lsl #24
-    1d34:	e1a05c22 	mov	r5, r2, lsr #24
-    1d38:	e1a03421 	mov	r3, r1, lsr #8
-    1d3c:	e1a0c422 	mov	ip, r2, lsr #8
-    1d40:	e1a0e822 	mov	lr, r2, lsr #16
-    1d44:	e1a04c21 	mov	r4, r1, lsr #24
-    1d48:	e1a00821 	mov	r0, r1, lsr #16
-    1d4c:	e5c62010 	strb	r2, [r6, #16]
-    1d50:	e5c63005 	strb	r3, [r6, #5]
-    1d54:	e5c60006 	strb	r0, [r6, #6]
-    1d58:	e5c64007 	strb	r4, [r6, #7]
-    1d5c:	e5c6c011 	strb	ip, [r6, #17]
-    1d60:	e5c6e012 	strb	lr, [r6, #18]
-    1d64:	e5c65013 	strb	r5, [r6, #19]
-    1d68:	e5c61004 	strb	r1, [r6, #4]
-    1d6c:	e59f2098 	ldr	r2, [pc, #152]	; 1e0c <.text+0x1e0c>
-    1d70:	e5d23000 	ldrb	r3, [r2]
-    1d74:	e3530000 	cmp	r3, #0	; 0x0
-    1d78:	1affff80 	bne	1b80 <processKF+0x354>
-    1d7c:	e59f30b0 	ldr	r3, [pc, #176]	; 1e34 <.text+0x1e34>
-    1d80:	e5d3c001 	ldrb	ip, [r3, #1]
-    1d84:	e5d30005 	ldrb	r0, [r3, #5]
-    1d88:	e5d31000 	ldrb	r1, [r3]
-    1d8c:	e5d32004 	ldrb	r2, [r3, #4]
-    1d90:	e5d3e002 	ldrb	lr, [r3, #2]
-    1d94:	e5d34006 	ldrb	r4, [r3, #6]
-    1d98:	e181140c 	orr	r1, r1, ip, lsl #8
-    1d9c:	e1822400 	orr	r2, r2, r0, lsl #8
-    1da0:	e5d3c007 	ldrb	ip, [r3, #7]
-    1da4:	e5d30003 	ldrb	r0, [r3, #3]
-    1da8:	e181180e 	orr	r1, r1, lr, lsl #16
-    1dac:	e1822804 	orr	r2, r2, r4, lsl #16
-    1db0:	e1811c00 	orr	r1, r1, r0, lsl #24
-    1db4:	e1822c0c 	orr	r2, r2, ip, lsl #24
-    1db8:	e1a04c21 	mov	r4, r1, lsr #24
-    1dbc:	e1a05c22 	mov	r5, r2, lsr #24
-    1dc0:	e1a03421 	mov	r3, r1, lsr #8
-    1dc4:	e1a00821 	mov	r0, r1, lsr #16
-    1dc8:	e1a0c422 	mov	ip, r2, lsr #8
-    1dcc:	e1a0e822 	mov	lr, r2, lsr #16
-    1dd0:	e5c63009 	strb	r3, [r6, #9]
-    1dd4:	e5c6000a 	strb	r0, [r6, #10]
-    1dd8:	e5c6400b 	strb	r4, [r6, #11]
-    1ddc:	e5c6c015 	strb	ip, [r6, #21]
-    1de0:	e5c6e016 	strb	lr, [r6, #22]
-    1de4:	e5c65017 	strb	r5, [r6, #23]
-    1de8:	e5c61008 	strb	r1, [r6, #8]
-    1dec:	e5c62014 	strb	r2, [r6, #20]
-    1df0:	eaffff73 	b	1bc4 <processKF+0x398>
-    1df4:	eb000f7d 	bl	5bf0 <resetKalmanFilter>
-    1df8:	eaffff23 	b	1a8c <processKF+0x260>
-    1dfc:	40001184 	andmi	r1, r0, r4, lsl #3
-    1e00:	400010b1 	strmih	r1, [r0], -r1
-    1e04:	40000ddc 	ldrmid	r0, [r0], -ip
-    1e08:	40001109 	andmi	r1, r0, r9, lsl #2
-    1e0c:	40000fbc 	strmih	r0, [r0], -ip
-    1e10:	40000c18 	andmi	r0, r0, r8, lsl ip
-    1e14:	400012c4 	andmi	r1, r0, r4, asr #5
-    1e18:	400012c5 	andmi	r1, r0, r5, asr #5
-    1e1c:	40000be0 	andmi	r0, r0, r0, ror #23
-    1e20:	40000ea0 	andmi	r0, r0, r0, lsr #29
-    1e24:	40000d18 	andmi	r0, r0, r8, lsl sp
-    1e28:	40001268 	andmi	r1, r0, r8, ror #4
-    1e2c:	40000d50 	andmi	r0, r0, r0, asr sp
-    1e30:	4000128d 	andmi	r1, r0, sp, lsl #5
-    1e34:	400012bc 	strmih	r1, [r0], -ip
-
-00001e38 <sendCtrlDebugData>:
-    1e38:	e92d47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
-    1e3c:	e59f5138 	ldr	r5, [pc, #312]	; 1f7c <.text+0x1f7c>
-    1e40:	e5d52005 	ldrb	r2, [r5, #5]
-    1e44:	e5d50004 	ldrb	r0, [r5, #4]
-    1e48:	e59f3130 	ldr	r3, [pc, #304]	; 1f80 <.text+0x1f80>
-    1e4c:	e5d51006 	ldrb	r1, [r5, #6]
-    1e50:	e5d5a007 	ldrb	sl, [r5, #7]
-    1e54:	e1800402 	orr	r0, r0, r2, lsl #8
-    1e58:	e59f4124 	ldr	r4, [pc, #292]	; 1f84 <.text+0x1f84>
-    1e5c:	e5d3e001 	ldrb	lr, [r3, #1]
-    1e60:	e5d39007 	ldrb	r9, [r3, #7]
-    1e64:	e5d32002 	ldrb	r2, [r3, #2]
-    1e68:	e5d3c000 	ldrb	ip, [r3]
-    1e6c:	e5d36004 	ldrb	r6, [r3, #4]
-    1e70:	e5d37005 	ldrb	r7, [r3, #5]
-    1e74:	e5d38006 	ldrb	r8, [r3, #6]
-    1e78:	e1800801 	orr	r0, r0, r1, lsl #16
-    1e7c:	e5d31003 	ldrb	r1, [r3, #3]
-    1e80:	e1800c0a 	orr	r0, r0, sl, lsl #24
-    1e84:	e5c4e003 	strb	lr, [r4, #3]
-    1e88:	e5c42000 	strb	r2, [r4]
-    1e8c:	e5c41001 	strb	r1, [r4, #1]
-    1e90:	e5c4c002 	strb	ip, [r4, #2]
-    1e94:	e5c46004 	strb	r6, [r4, #4]
-    1e98:	e5c47005 	strb	r7, [r4, #5]
-    1e9c:	e5c48006 	strb	r8, [r4, #6]
-    1ea0:	e5c49007 	strb	r9, [r4, #7]
-    1ea4:	eb00081c 	bl	3f1c <SIToLLCmdRoll>
-    1ea8:	e5d51009 	ldrb	r1, [r5, #9]
-    1eac:	e5d52008 	ldrb	r2, [r5, #8]
-    1eb0:	e5d5c00a 	ldrb	ip, [r5, #10]
-    1eb4:	e1822401 	orr	r2, r2, r1, lsl #8
-    1eb8:	e1a03800 	mov	r3, r0, lsl #16
-    1ebc:	e5d5000b 	ldrb	r0, [r5, #11]
-    1ec0:	e182280c 	orr	r2, r2, ip, lsl #16
-    1ec4:	e2633000 	rsb	r3, r3, #0	; 0x0
-    1ec8:	e1a01c23 	mov	r1, r3, lsr #24
-    1ecc:	e1820c00 	orr	r0, r2, r0, lsl #24
-    1ed0:	e1a03823 	mov	r3, r3, lsr #16
-    1ed4:	e5c43018 	strb	r3, [r4, #24]
-    1ed8:	e5c41019 	strb	r1, [r4, #25]
-    1edc:	eb00081a 	bl	3f4c <SIToLLCmdPitch>
-    1ee0:	e5d5200d 	ldrb	r2, [r5, #13]
-    1ee4:	e5d5300c 	ldrb	r3, [r5, #12]
-    1ee8:	e5d5100e 	ldrb	r1, [r5, #14]
-    1eec:	e5d5c00f 	ldrb	ip, [r5, #15]
-    1ef0:	e1833402 	orr	r3, r3, r2, lsl #8
-    1ef4:	e1833801 	orr	r3, r3, r1, lsl #16
-    1ef8:	e1a02420 	mov	r2, r0, lsr #8
-    1efc:	e5c4001a 	strb	r0, [r4, #26]
-    1f00:	e1830c0c 	orr	r0, r3, ip, lsl #24
-    1f04:	e5c4201b 	strb	r2, [r4, #27]
-    1f08:	eb00081c 	bl	3f80 <SIToLLCmdYawRate>
-    1f0c:	e5d52011 	ldrb	r2, [r5, #17]
-    1f10:	e5d53010 	ldrb	r3, [r5, #16]
-    1f14:	e5d51012 	ldrb	r1, [r5, #18]
-    1f18:	e5d5c013 	ldrb	ip, [r5, #19]
-    1f1c:	e1833402 	orr	r3, r3, r2, lsl #8
-    1f20:	e1833801 	orr	r3, r3, r1, lsl #16
-    1f24:	e1a02420 	mov	r2, r0, lsr #8
-    1f28:	e5c4001c 	strb	r0, [r4, #28]
-    1f2c:	e1830c0c 	orr	r0, r3, ip, lsl #24
-    1f30:	e5c4201d 	strb	r2, [r4, #29]
-    1f34:	eb00081e 	bl	3fb4 <SIToLLCmdThrust>
-    1f38:	e5d57003 	ldrb	r7, [r5, #3]
-    1f3c:	e5d5c000 	ldrb	ip, [r5]
-    1f40:	e5d5e001 	ldrb	lr, [r5, #1]
-    1f44:	e5d56002 	ldrb	r6, [r5, #2]
-    1f48:	e1a03420 	mov	r3, r0, lsr #8
-    1f4c:	e5c4001e 	strb	r0, [r4, #30]
-    1f50:	e1a01004 	mov	r1, r4
-    1f54:	e3a02072 	mov	r2, #114	; 0x72
-    1f58:	e3a00012 	mov	r0, #18	; 0x12
-    1f5c:	e5c4301f 	strb	r3, [r4, #31]
-    1f60:	e5c4c04a 	strb	ip, [r4, #74]
-    1f64:	e5c4e04b 	strb	lr, [r4, #75]
-    1f68:	e5c4604c 	strb	r6, [r4, #76]
-    1f6c:	e5c4704d 	strb	r7, [r4, #77]
-    1f70:	eb001d99 	bl	95dc <writePacket2Ringbuffer>
-    1f74:	e8bd47f0 	ldmia	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
-    1f78:	e12fff1e 	bx	lr
-    1f7c:	4000110a 	andmi	r1, r0, sl, lsl #2
-    1f80:	40000fc0 	andmi	r0, r0, r0, asr #31
-    1f84:	40000fcc 	andmi	r0, r0, ip, asr #31
-
-00001f88 <sendStatusData>:
-    1f88:	e52de004 	str	lr, [sp, #-4]!
-    1f8c:	e59f1010 	ldr	r1, [pc, #16]	; 1fa4 <.text+0x1fa4>
-    1f90:	e3a02018 	mov	r2, #24	; 0x18
-    1f94:	e3a0000d 	mov	r0, #13	; 0xd
-    1f98:	eb001d8f 	bl	95dc <writePacket2Ringbuffer>
-    1f9c:	e49de004 	ldr	lr, [sp], #4
-    1fa0:	e12fff1e 	bx	lr
-    1fa4:	40001152 	andmi	r1, r0, r2, asr r1
-
-00001fa8 <sendRcData>:
-    1fa8:	e52de004 	str	lr, [sp, #-4]!
-    1fac:	e59f0040 	ldr	r0, [pc, #64]	; 1ff4 <.text+0x1ff4>
-    1fb0:	e59f1040 	ldr	r1, [pc, #64]	; 1ff8 <.text+0x1ff8>
-    1fb4:	e3a0c000 	mov	ip, #0	; 0x0
-    1fb8:	e5d03000 	ldrb	r3, [r0]
-    1fbc:	e5d02001 	ldrb	r2, [r0, #1]
-    1fc0:	e28cc001 	add	ip, ip, #1	; 0x1
-    1fc4:	e35c0008 	cmp	ip, #8	; 0x8
-    1fc8:	e5c13008 	strb	r3, [r1, #8]
-    1fcc:	e5c12009 	strb	r2, [r1, #9]
-    1fd0:	e2800002 	add	r0, r0, #2	; 0x2
-    1fd4:	e2811002 	add	r1, r1, #2	; 0x2
-    1fd8:	1afffff6 	bne	1fb8 <sendRcData+0x10>
-    1fdc:	e59f1014 	ldr	r1, [pc, #20]	; 1ff8 <.text+0x1ff8>
-    1fe0:	e3a02018 	mov	r2, #24	; 0x18
-    1fe4:	e3a0000b 	mov	r0, #11	; 0xb
-    1fe8:	eb001d7b 	bl	95dc <writePacket2Ringbuffer>
-    1fec:	e49de004 	ldr	lr, [sp], #4
-    1ff0:	e12fff1e 	bx	lr
-    1ff4:	4000116c 	andmi	r1, r0, ip, ror #2
-    1ff8:	40001098 	mulmi	r0, r8, r0
-
-00001ffc <sendFlightStateData>:
-    1ffc:	e52de004 	str	lr, [sp, #-4]!
-    2000:	e59f1010 	ldr	r1, [pc, #16]	; 2018 <.text+0x2018>
-    2004:	e3a02001 	mov	r2, #1	; 0x1
-    2008:	e3a00009 	mov	r0, #9	; 0x9
-    200c:	eb001d72 	bl	95dc <writePacket2Ringbuffer>
-    2010:	e49de004 	ldr	lr, [sp], #4
-    2014:	e12fff1e 	bx	lr
-    2018:	40001108 	andmi	r1, r0, r8, lsl #2
-
-0000201c <sendMavPoseData>:
-    201c:	e52de004 	str	lr, [sp, #-4]!
-    2020:	e59f1010 	ldr	r1, [pc, #16]	; 2038 <.text+0x2038>
-    2024:	e3a02024 	mov	r2, #36	; 0x24
-    2028:	e3a00007 	mov	r0, #7	; 0x7
-    202c:	eb001d6a 	bl	95dc <writePacket2Ringbuffer>
-    2030:	e49de004 	ldr	lr, [sp], #4
-    2034:	e12fff1e 	bx	lr
-    2038:	40001268 	andmi	r1, r0, r8, ror #4
-
-0000203c <synchronizeTime>:
-    203c:	e92d4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
-    2040:	e59f33bc 	ldr	r3, [pc, #956]	; 2404 <.text+0x2404>
-    2044:	e5933000 	ldr	r3, [r3]
-    2048:	e24dd018 	sub	sp, sp, #24	; 0x18
-    204c:	e58d300c 	str	r3, [sp, #12]
-    2050:	e5d32008 	ldrb	r2, [r3, #8]
-    2054:	e3520000 	cmp	r2, #0	; 0x0
-    2058:	059f23a8 	ldreq	r2, [pc, #936]	; 2408 <.text+0x2408>
-    205c:	0a000078 	beq	2244 <synchronizeTime+0x208>
-    2060:	e59f03a4 	ldr	r0, [pc, #932]	; 240c <.text+0x240c>
-    2064:	e5903000 	ldr	r3, [r0]
-    2068:	e3a01fe1 	mov	r1, #900	; 0x384
-    206c:	e0854193 	umull	r4, r5, r3, r1
-    2070:	e5902004 	ldr	r2, [r0, #4]
-    2074:	e98d0030 	stmib	sp, {r4, r5}
-    2078:	e0255192 	mla	r5, r2, r1, r5
-    207c:	e59f338c 	ldr	r3, [pc, #908]	; 2410 <.text+0x2410>
-    2080:	e58d5008 	str	r5, [sp, #8]
-    2084:	e5d32009 	ldrb	r2, [r3, #9]
-    2088:	e5d31008 	ldrb	r1, [r3, #8]
-    208c:	e1811402 	orr	r1, r1, r2, lsl #8
-    2090:	e5d32002 	ldrb	r2, [r3, #2]
-    2094:	e5d3500a 	ldrb	r5, [r3, #10]
-    2098:	e5d3400d 	ldrb	r4, [r3, #13]
-    209c:	e5d3c00c 	ldrb	ip, [r3, #12]
-    20a0:	e5d3e001 	ldrb	lr, [r3, #1]
-    20a4:	e5d3b00b 	ldrb	fp, [r3, #11]
-    20a8:	e5d3a00e 	ldrb	sl, [r3, #14]
-    20ac:	e5d30000 	ldrb	r0, [r3]
-    20b0:	e58d2000 	str	r2, [sp]
-    20b4:	e1811805 	orr	r1, r1, r5, lsl #16
-    20b8:	e181bc0b 	orr	fp, r1, fp, lsl #24
-    20bc:	e18cc404 	orr	ip, ip, r4, lsl #8
-    20c0:	e5d3400f 	ldrb	r4, [r3, #15]
-    20c4:	e59d1000 	ldr	r1, [sp]
-    20c8:	e5d36005 	ldrb	r6, [r3, #5]
-    20cc:	e5d35006 	ldrb	r5, [r3, #6]
-    20d0:	e5d32004 	ldrb	r2, [r3, #4]
-    20d4:	e18cc80a 	orr	ip, ip, sl, lsl #16
-    20d8:	e180040e 	orr	r0, r0, lr, lsl #8
-    20dc:	e5d3e003 	ldrb	lr, [r3, #3]
-    20e0:	e58db010 	str	fp, [sp, #16]
-    20e4:	e18c4c04 	orr	r4, ip, r4, lsl #24
-    20e8:	e1800801 	orr	r0, r0, r1, lsl #16
-    20ec:	e1822406 	orr	r2, r2, r6, lsl #8
-    20f0:	e5d31007 	ldrb	r1, [r3, #7]
-    20f4:	e58d4014 	str	r4, [sp, #20]
-    20f8:	e1822805 	orr	r2, r2, r5, lsl #16
-    20fc:	e28d5010 	add	r5, sp, #16	; 0x10
-    2100:	e8950060 	ldmia	r5, {r5, r6}
-    2104:	e59fb308 	ldr	fp, [pc, #776]	; 2414 <.text+0x2414>
-    2108:	e0955005 	adds	r5, r5, r5
-    210c:	e89b0018 	ldmia	fp, {r3, r4}
-    2110:	e1807c0e 	orr	r7, r0, lr, lsl #24
-    2114:	e1828c01 	orr	r8, r2, r1, lsl #24
-    2118:	e0a66006 	adc	r6, r6, r6
-    211c:	e0555007 	subs	r5, r5, r7
-    2120:	e0c66008 	sbc	r6, r6, r8
-    2124:	e0555003 	subs	r5, r5, r3
-    2128:	e0c66004 	sbc	r6, r6, r4
-    212c:	e0951005 	adds	r1, r5, r5
-    2130:	e0a62006 	adc	r2, r6, r6
-    2134:	e0911005 	adds	r1, r1, r5
-    2138:	e0a22006 	adc	r2, r2, r6
-    213c:	e1a04182 	mov	r4, r2, lsl #3
-    2140:	e1a03181 	mov	r3, r1, lsl #3
-    2144:	e0933005 	adds	r3, r3, r5
-    2148:	e1844ea1 	orr	r4, r4, r1, lsr #29
-    214c:	e99d0003 	ldmib	sp, {r0, r1}
-    2150:	e0a44006 	adc	r4, r4, r6
-    2154:	e0937003 	adds	r7, r3, r3
-    2158:	e0a48004 	adc	r8, r4, r4
-    215c:	e0900007 	adds	r0, r0, r7
-    2160:	e0a11008 	adc	r1, r1, r8
-    2164:	e3a02ffa 	mov	r2, #1000	; 0x3e8
-    2168:	e3a03000 	mov	r3, #0	; 0x0
-    216c:	eb004bec 	bl	15124 <____divdi3_from_arm>
-    2170:	e59f32a0 	ldr	r3, [pc, #672]	; 2418 <.text+0x2418>
-    2174:	e1a04c20 	mov	r4, r0, lsr #24
-    2178:	e5c3400b 	strb	r4, [r3, #11]
-    217c:	e59f4288 	ldr	r4, [pc, #648]	; 240c <.text+0x240c>
-    2180:	e1a07000 	mov	r7, r0
-    2184:	e1a08001 	mov	r8, r1
-    2188:	e1a0c420 	mov	ip, r0, lsr #8
-    218c:	e1a0e820 	mov	lr, r0, lsr #16
-    2190:	e1a05421 	mov	r5, r1, lsr #8
-    2194:	e1a02c21 	mov	r2, r1, lsr #24
-    2198:	e1a06821 	mov	r6, r1, lsr #16
-    219c:	e5c3200f 	strb	r2, [r3, #15]
-    21a0:	e5c3c009 	strb	ip, [r3, #9]
-    21a4:	e5c3e00a 	strb	lr, [r3, #10]
-    21a8:	e5c3500d 	strb	r5, [r3, #13]
-    21ac:	e5c3600e 	strb	r6, [r3, #14]
-    21b0:	e8840180 	stmia	r4, {r7, r8}
-    21b4:	e5c37008 	strb	r7, [r3, #8]
-    21b8:	e5c3800c 	strb	r8, [r3, #12]
-    21bc:	eb004724 	bl	13e54 <__aeabi_l2d>
-    21c0:	e59f2254 	ldr	r2, [pc, #596]	; 241c <.text+0x241c>
-    21c4:	e3a03000 	mov	r3, #0	; 0x0
-    21c8:	e1a04000 	mov	r4, r0
-    21cc:	e1a05001 	mov	r5, r1
-    21d0:	eb004861 	bl	1435c <__gedf2>
-    21d4:	e3500000 	cmp	r0, #0	; 0x0
-    21d8:	da000050 	ble	2320 <synchronizeTime+0x2e4>
-    21dc:	e28d0010 	add	r0, sp, #16	; 0x10
-    21e0:	e8900003 	ldmia	r0, {r0, r1}
-    21e4:	e59f3220 	ldr	r3, [pc, #544]	; 240c <.text+0x240c>
-    21e8:	e88b0003 	stmia	fp, {r0, r1}
-    21ec:	e3a02000 	mov	r2, #0	; 0x0
-    21f0:	e3a01000 	mov	r1, #0	; 0x0
-    21f4:	e8830006 	stmia	r3, {r1, r2}
-    21f8:	e59f120c 	ldr	r1, [pc, #524]	; 240c <.text+0x240c>
-    21fc:	e8910180 	ldmia	r1, {r7, r8}
-    2200:	e1971008 	orrs	r1, r7, r8
-    2204:	0a00005a 	beq	2374 <synchronizeTime+0x338>
-    2208:	e3a00483 	mov	r0, #-2097152000	; 0x83000000
-    220c:	e1a02007 	mov	r2, r7
-    2210:	e1a03008 	mov	r3, r8
-    2214:	e1a009c0 	mov	r0, r0, asr #19
-    2218:	e3e01000 	mvn	r1, #0	; 0x0
-    221c:	eb004bc0 	bl	15124 <____divdi3_from_arm>
-    2220:	e59f31f8 	ldr	r3, [pc, #504]	; 2420 <.text+0x2420>
-    2224:	e59f21dc 	ldr	r2, [pc, #476]	; 2408 <.text+0x2408>
-    2228:	e3e04000 	mvn	r4, #0	; 0x0
-    222c:	e3e05000 	mvn	r5, #0	; 0x0
-    2230:	e8830030 	stmia	r3, {r4, r5}
-    2234:	e1c200b0 	strh	r0, [r2]
-    2238:	e59d400c 	ldr	r4, [sp, #12]
-    223c:	e3a03000 	mov	r3, #0	; 0x0
-    2240:	e5c43008 	strb	r3, [r4, #8]
-    2244:	e59f31d8 	ldr	r3, [pc, #472]	; 2424 <.text+0x2424>
-    2248:	e5935000 	ldr	r5, [r3]
-    224c:	e1d210b0 	ldrh	r1, [r2]
-    2250:	e1a00005 	mov	r0, r5
-    2254:	eb004baf 	bl	15118 <____umodsi3_from_arm>
-    2258:	e3500000 	cmp	r0, #0	; 0x0
-    225c:	1a000006 	bne	227c <synchronizeTime+0x240>
-    2260:	e59fc1ac 	ldr	ip, [pc, #428]	; 2414 <.text+0x2414>
-    2264:	e59f21b4 	ldr	r2, [pc, #436]	; 2420 <.text+0x2420>
-    2268:	e89c0018 	ldmia	ip, {r3, r4}
-    226c:	e8920003 	ldmia	r2, {r0, r1}
-    2270:	e0933000 	adds	r3, r3, r0
-    2274:	e0a44001 	adc	r4, r4, r1
-    2278:	e88c0018 	stmia	ip, {r3, r4}
-    227c:	e59f31a4 	ldr	r3, [pc, #420]	; 2428 <.text+0x2428>
-    2280:	e0820593 	umull	r0, r2, r3, r5
-    2284:	e1a023a2 	mov	r2, r2, lsr #7
-    2288:	e0623282 	rsb	r3, r2, r2, lsl #5
-    228c:	e0822103 	add	r2, r2, r3, lsl #2
-    2290:	e0459202 	sub	r9, r5, r2, lsl #4
-    2294:	e3590000 	cmp	r9, #0	; 0x0
-    2298:	1a00001d 	bne	2314 <synchronizeTime+0x2d8>
-    229c:	e59f2170 	ldr	r2, [pc, #368]	; 2414 <.text+0x2414>
-    22a0:	e8920030 	ldmia	r2, {r4, r5}
-    22a4:	e59f3164 	ldr	r3, [pc, #356]	; 2410 <.text+0x2410>
-    22a8:	e1a0c424 	mov	ip, r4, lsr #8
-    22ac:	e1a0e824 	mov	lr, r4, lsr #16
-    22b0:	e1a0bc25 	mov	fp, r5, lsr #24
-    22b4:	e1a06c24 	mov	r6, r4, lsr #24
-    22b8:	e1a07425 	mov	r7, r5, lsr #8
-    22bc:	e1a08825 	mov	r8, r5, lsr #16
-    22c0:	e1a01003 	mov	r1, r3
-    22c4:	e3a02010 	mov	r2, #16	; 0x10
-    22c8:	e5c3c001 	strb	ip, [r3, #1]
-    22cc:	e5c3e002 	strb	lr, [r3, #2]
-    22d0:	e5c36003 	strb	r6, [r3, #3]
-    22d4:	e5c37005 	strb	r7, [r3, #5]
-    22d8:	e5c38006 	strb	r8, [r3, #6]
-    22dc:	e5c3b007 	strb	fp, [r3, #7]
-    22e0:	e5c3900f 	strb	r9, [r3, #15]
-    22e4:	e5c34000 	strb	r4, [r3]
-    22e8:	e5c35004 	strb	r5, [r3, #4]
-    22ec:	e5c39008 	strb	r9, [r3, #8]
-    22f0:	e5c39009 	strb	r9, [r3, #9]
-    22f4:	e5c3900a 	strb	r9, [r3, #10]
-    22f8:	e5c3900b 	strb	r9, [r3, #11]
-    22fc:	e5c3900c 	strb	r9, [r3, #12]
-    2300:	e5c3900d 	strb	r9, [r3, #13]
-    2304:	e5c3900e 	strb	r9, [r3, #14]
-    2308:	e3a0000c 	mov	r0, #12	; 0xc
-    230c:	eb001cb2 	bl	95dc <writePacket2Ringbuffer>
-    2310:	eb001e39 	bl	9bfc <UART_send_ringbuffer>
-    2314:	e28dd018 	add	sp, sp, #24	; 0x18
-    2318:	e8bd4ff0 	ldmia	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
-    231c:	e12fff1e 	bx	lr
-    2320:	e1a00004 	mov	r0, r4
-    2324:	e1a01005 	mov	r1, r5
-    2328:	e59f20fc 	ldr	r2, [pc, #252]	; 242c <.text+0x242c>
-    232c:	e3a03000 	mov	r3, #0	; 0x0
-    2330:	eb00480b 	bl	14364 <__ledf2>
-    2334:	e3500000 	cmp	r0, #0	; 0x0
-    2338:	baffffa7 	blt	21dc <synchronizeTime+0x1a0>
-    233c:	e3580000 	cmp	r8, #0	; 0x0
-    2340:	da000013 	ble	2394 <synchronizeTime+0x358>
-    2344:	e59f10c0 	ldr	r1, [pc, #192]	; 240c <.text+0x240c>
-    2348:	e3a04e7d 	mov	r4, #2000	; 0x7d0
-    234c:	e3a05000 	mov	r5, #0	; 0x0
-    2350:	e8810030 	stmia	r1, {r4, r5}
-    2354:	e3a00002 	mov	r0, #2	; 0x2
-    2358:	e59f20a8 	ldr	r2, [pc, #168]	; 2408 <.text+0x2408>
-    235c:	e59f30bc 	ldr	r3, [pc, #188]	; 2420 <.text+0x2420>
-    2360:	e1c200b0 	strh	r0, [r2]
-    2364:	e3a01000 	mov	r1, #0	; 0x0
-    2368:	e3a00001 	mov	r0, #1	; 0x1
-    236c:	e8830003 	stmia	r3, {r0, r1}
-    2370:	eaffffb0 	b	2238 <synchronizeTime+0x1fc>
-    2374:	e59f30a4 	ldr	r3, [pc, #164]	; 2420 <.text+0x2420>
-    2378:	e3a01000 	mov	r1, #0	; 0x0
-    237c:	e59f2084 	ldr	r2, [pc, #132]	; 2408 <.text+0x2408>
-    2380:	e3a00000 	mov	r0, #0	; 0x0
-    2384:	e8830003 	stmia	r3, {r0, r1}
-    2388:	e3a01efa 	mov	r1, #4000	; 0xfa0
-    238c:	e1c210b0 	strh	r1, [r2]
-    2390:	eaffffa8 	b	2238 <synchronizeTime+0x1fc>
-    2394:	1a000001 	bne	23a0 <synchronizeTime+0x364>
-    2398:	e3570e7d 	cmp	r7, #2000	; 0x7d0
-    239c:	8affffe8 	bhi	2344 <synchronizeTime+0x308>
-    23a0:	e3780001 	cmn	r8, #1	; 0x1
-    23a4:	ba00000c 	blt	23dc <synchronizeTime+0x3a0>
-    23a8:	0a000009 	beq	23d4 <synchronizeTime+0x398>
-    23ac:	e3580000 	cmp	r8, #0	; 0x0
-    23b0:	da00000f 	ble	23f4 <synchronizeTime+0x3b8>
-    23b4:	e1a02007 	mov	r2, r7
-    23b8:	e1a03008 	mov	r3, r8
-    23bc:	e3a00efa 	mov	r0, #4000	; 0xfa0
-    23c0:	e3a01000 	mov	r1, #0	; 0x0
-    23c4:	eb004b56 	bl	15124 <____divdi3_from_arm>
-    23c8:	e1a00800 	mov	r0, r0, lsl #16
-    23cc:	e1a00820 	mov	r0, r0, lsr #16
-    23d0:	eaffffe0 	b	2358 <synchronizeTime+0x31c>
-    23d4:	e3770e7d 	cmn	r7, #2000	; 0x7d0
-    23d8:	2afffff3 	bcs	23ac <synchronizeTime+0x370>
-    23dc:	e3a02483 	mov	r2, #-2097152000	; 0x83000000
-    23e0:	e59f4024 	ldr	r4, [pc, #36]	; 240c <.text+0x240c>
-    23e4:	e1a02a42 	mov	r2, r2, asr #20
-    23e8:	e3e03000 	mvn	r3, #0	; 0x0
-    23ec:	e884000c 	stmia	r4, {r2, r3}
-    23f0:	eaffff80 	b	21f8 <synchronizeTime+0x1bc>
-    23f4:	1affff81 	bne	2200 <synchronizeTime+0x1c4>
-    23f8:	e3570000 	cmp	r7, #0	; 0x0
-    23fc:	9affff7f 	bls	2200 <synchronizeTime+0x1c4>
-    2400:	eaffffeb 	b	23b4 <synchronizeTime+0x378>
-    2404:	40001090 	mulmi	r0, r0, r0
-    2408:	40000000 	andmi	r0, r0, r0
-    240c:	40000878 	andmi	r0, r0, r8, ror r8
-    2410:	40001254 	andmi	r1, r0, r4, asr r2
-    2414:	40000870 	andmi	r0, r0, r0, ror r8
-    2418:	40001152 	andmi	r1, r0, r2, asr r1
-    241c:	416312d0 	ldrmid	r1, [r3, #-32]!
-    2420:	40000880 	andmi	r0, r0, r0, lsl #17
-    2424:	4000113c 	andmi	r1, r0, ip, lsr r1
-    2428:	10624dd3 	ldrned	r4, [r2], #-211
-    242c:	c16312d0 	ldrgtd	r1, [r3, #-32]!
-
-00002430 <sendImuData>:
-    2430:	e92d4030 	stmdb	sp!, {r4, r5, lr}
-    2434:	e59f5108 	ldr	r5, [pc, #264]	; 2544 <.text+0x2544>
-    2438:	e5950014 	ldr	r0, [r5, #20]
-    243c:	eb0006e8 	bl	3fe4 <LLToSIAngleRoll>
-    2440:	e59f4100 	ldr	r4, [pc, #256]	; 2548 <.text+0x2548>
-    2444:	e1a03000 	mov	r3, r0
-    2448:	e1a0cc20 	mov	ip, r0, lsr #24
-    244c:	e1a02420 	mov	r2, r0, lsr #8
-    2450:	e1a01820 	mov	r1, r0, lsr #16
-    2454:	e5950010 	ldr	r0, [r5, #16]
-    2458:	e5c42001 	strb	r2, [r4, #1]
-    245c:	e5c41002 	strb	r1, [r4, #2]
-    2460:	e5c4c003 	strb	ip, [r4, #3]
-    2464:	e5c43000 	strb	r3, [r4]
-    2468:	eb00074d 	bl	41a4 <LLToSIAnglePitch>
-    246c:	e1a03000 	mov	r3, r0
-    2470:	e1a0cc20 	mov	ip, r0, lsr #24
-    2474:	e1a02420 	mov	r2, r0, lsr #8
-    2478:	e1a01820 	mov	r1, r0, lsr #16
-    247c:	e5950018 	ldr	r0, [r5, #24]
-    2480:	e5c42005 	strb	r2, [r4, #5]
-    2484:	e5c41006 	strb	r1, [r4, #6]
-    2488:	e5c4c007 	strb	ip, [r4, #7]
-    248c:	e5c43004 	strb	r3, [r4, #4]
-    2490:	eb00072d 	bl	414c <LLToSIAngleYaw>
-    2494:	e1a03000 	mov	r3, r0
-    2498:	e1a0cc20 	mov	ip, r0, lsr #24
-    249c:	e1a02420 	mov	r2, r0, lsr #8
-    24a0:	e1a01820 	mov	r1, r0, lsr #16
-    24a4:	e5950020 	ldr	r0, [r5, #32]
-    24a8:	e5c42009 	strb	r2, [r4, #9]
-    24ac:	e5c4100a 	strb	r1, [r4, #10]
-    24b0:	e5c4c00b 	strb	ip, [r4, #11]
-    24b4:	e5c43008 	strb	r3, [r4, #8]
-    24b8:	eb00070c 	bl	40f0 <LLToSIAngleRateRoll>
-    24bc:	e1a03000 	mov	r3, r0
-    24c0:	e1a0cc20 	mov	ip, r0, lsr #24
-    24c4:	e1a02420 	mov	r2, r0, lsr #8
-    24c8:	e1a01820 	mov	r1, r0, lsr #16
-    24cc:	e595001c 	ldr	r0, [r5, #28]
-    24d0:	e5c4200d 	strb	r2, [r4, #13]
-    24d4:	e5c4100e 	strb	r1, [r4, #14]
-    24d8:	e5c4c00f 	strb	ip, [r4, #15]
-    24dc:	e5c4300c 	strb	r3, [r4, #12]
-    24e0:	eb0006ea 	bl	4090 <LLToSIAngleRatePitch>
-    24e4:	e1a03000 	mov	r3, r0
-    24e8:	e1a0cc20 	mov	ip, r0, lsr #24
-    24ec:	e1a02423 	mov	r2, r3, lsr #8
-    24f0:	e5950024 	ldr	r0, [r5, #36]
-    24f4:	e1a01823 	mov	r1, r3, lsr #16
-    24f8:	e5c42011 	strb	r2, [r4, #17]
-    24fc:	e5c41012 	strb	r1, [r4, #18]
-    2500:	e5c4c013 	strb	ip, [r4, #19]
-    2504:	e5c43010 	strb	r3, [r4, #16]
-    2508:	eb0006c8 	bl	4030 <LLToSIAngleRateYaw>
-    250c:	e1a01004 	mov	r1, r4
-    2510:	e1a03000 	mov	r3, r0
-    2514:	e1a05c20 	mov	r5, r0, lsr #24
-    2518:	e1a0c420 	mov	ip, r0, lsr #8
-    251c:	e1a0e820 	mov	lr, r0, lsr #16
-    2520:	e3a02024 	mov	r2, #36	; 0x24
-    2524:	e3a0000a 	mov	r0, #10	; 0xa
-    2528:	e5c4c015 	strb	ip, [r4, #21]
-    252c:	e5c4e016 	strb	lr, [r4, #22]
-    2530:	e5c45017 	strb	r5, [r4, #23]
-    2534:	e5c43014 	strb	r3, [r4, #20]
-    2538:	eb001c27 	bl	95dc <writePacket2Ringbuffer>
-    253c:	e8bd4030 	ldmia	sp!, {r4, r5, lr}
-    2540:	e12fff1e 	bx	lr
-    2544:	40000d50 	andmi	r0, r0, r0, asr sp
-    2548:	40001044 	andmi	r1, r0, r4, asr #32
-
-0000254c <sdkInit>:
-    254c:	e59f2180 	ldr	r2, [pc, #384]	; 26d4 <.text+0x26d4>
-    2550:	e92d4010 	stmdb	sp!, {r4, lr}
-    2554:	e3a0e000 	mov	lr, #0	; 0x0
-    2558:	e1c2e0b0 	strh	lr, [r2]
-    255c:	e59f2174 	ldr	r2, [pc, #372]	; 26d8 <.text+0x26d8>
-    2560:	e59f4174 	ldr	r4, [pc, #372]	; 26dc <.text+0x26dc>
-    2564:	e59fc174 	ldr	ip, [pc, #372]	; 26e0 <.text+0x26e0>
-    2568:	e1c2e0b0 	strh	lr, [r2]
-    256c:	e59f1170 	ldr	r1, [pc, #368]	; 26e4 <.text+0x26e4>
-    2570:	e3a00004 	mov	r0, #4	; 0x4
-    2574:	e58ce000 	str	lr, [ip]
-    2578:	e5c4e017 	strb	lr, [r4, #23]
-    257c:	e5c4e000 	strb	lr, [r4]
-    2580:	e5c4e001 	strb	lr, [r4, #1]
-    2584:	e5c4e002 	strb	lr, [r4, #2]
-    2588:	e5c4e003 	strb	lr, [r4, #3]
-    258c:	e5c4e004 	strb	lr, [r4, #4]
-    2590:	e5c4e005 	strb	lr, [r4, #5]
-    2594:	e5c4e006 	strb	lr, [r4, #6]
-    2598:	e5c4e007 	strb	lr, [r4, #7]
-    259c:	e5c4e008 	strb	lr, [r4, #8]
-    25a0:	e5c4e009 	strb	lr, [r4, #9]
-    25a4:	e5c4e00a 	strb	lr, [r4, #10]
-    25a8:	e5c4e00b 	strb	lr, [r4, #11]
-    25ac:	e5c4e00c 	strb	lr, [r4, #12]
-    25b0:	e5c4e00d 	strb	lr, [r4, #13]
-    25b4:	e5c4e00e 	strb	lr, [r4, #14]
-    25b8:	e5c4e00f 	strb	lr, [r4, #15]
-    25bc:	e5c4e010 	strb	lr, [r4, #16]
-    25c0:	e5c4e011 	strb	lr, [r4, #17]
-    25c4:	e5c4e012 	strb	lr, [r4, #18]
-    25c8:	e5c4e013 	strb	lr, [r4, #19]
-    25cc:	e5c4e014 	strb	lr, [r4, #20]
-    25d0:	e5c4e015 	strb	lr, [r4, #21]
-    25d4:	e5c4e016 	strb	lr, [r4, #22]
-    25d8:	eb001a6e 	bl	8f98 <registerPacket>
-    25dc:	e59f3104 	ldr	r3, [pc, #260]	; 26e8 <.text+0x26e8>
-    25e0:	e59f1104 	ldr	r1, [pc, #260]	; 26ec <.text+0x26ec>
-    25e4:	e5830000 	str	r0, [r3]
-    25e8:	e3a00005 	mov	r0, #5	; 0x5
-    25ec:	eb001a69 	bl	8f98 <registerPacket>
-    25f0:	e59f30f8 	ldr	r3, [pc, #248]	; 26f0 <.text+0x26f0>
-    25f4:	e59f10f8 	ldr	r1, [pc, #248]	; 26f4 <.text+0x26f4>
-    25f8:	e5830000 	str	r0, [r3]
-    25fc:	e3a00006 	mov	r0, #6	; 0x6
-    2600:	eb001a64 	bl	8f98 <registerPacket>
-    2604:	e59f30ec 	ldr	r3, [pc, #236]	; 26f8 <.text+0x26f8>
-    2608:	e59f10ec 	ldr	r1, [pc, #236]	; 26fc <.text+0x26fc>
-    260c:	e5830000 	str	r0, [r3]
-    2610:	e3a00003 	mov	r0, #3	; 0x3
-    2614:	eb001a5f 	bl	8f98 <registerPacket>
-    2618:	e59f30e0 	ldr	r3, [pc, #224]	; 2700 <.text+0x2700>
-    261c:	e59f10e0 	ldr	r1, [pc, #224]	; 2704 <.text+0x2704>
-    2620:	e5830000 	str	r0, [r3]
-    2624:	e3a0000c 	mov	r0, #12	; 0xc
-    2628:	eb001a5a 	bl	8f98 <registerPacket>
-    262c:	e59f30d4 	ldr	r3, [pc, #212]	; 2708 <.text+0x2708>
-    2630:	e59f10d4 	ldr	r1, [pc, #212]	; 270c <.text+0x270c>
-    2634:	e5830000 	str	r0, [r3]
-    2638:	e3a00001 	mov	r0, #1	; 0x1
-    263c:	eb001a55 	bl	8f98 <registerPacket>
-    2640:	e59f30c8 	ldr	r3, [pc, #200]	; 2710 <.text+0x2710>
-    2644:	e59f10c8 	ldr	r1, [pc, #200]	; 2714 <.text+0x2714>
-    2648:	e5830000 	str	r0, [r3]
-    264c:	e3a00002 	mov	r0, #2	; 0x2
-    2650:	eb001a50 	bl	8f98 <registerPacket>
-    2654:	e59f30bc 	ldr	r3, [pc, #188]	; 2718 <.text+0x2718>
-    2658:	e59f10bc 	ldr	r1, [pc, #188]	; 271c <.text+0x271c>
-    265c:	e5830000 	str	r0, [r3]
-    2660:	e3a00008 	mov	r0, #8	; 0x8
-    2664:	eb001a4b 	bl	8f98 <registerPacket>
-    2668:	e59f30b0 	ldr	r3, [pc, #176]	; 2720 <.text+0x2720>
-    266c:	e59f10b0 	ldr	r1, [pc, #176]	; 2724 <.text+0x2724>
-    2670:	e5830000 	str	r0, [r3]
-    2674:	e3a00010 	mov	r0, #16	; 0x10
-    2678:	eb001a46 	bl	8f98 <registerPacket>
-    267c:	e59f30a4 	ldr	r3, [pc, #164]	; 2728 <.text+0x2728>
-    2680:	e59f10a4 	ldr	r1, [pc, #164]	; 272c <.text+0x272c>
-    2684:	e5830000 	str	r0, [r3]
-    2688:	e3a0000f 	mov	r0, #15	; 0xf
-    268c:	eb001a41 	bl	8f98 <registerPacket>
-    2690:	e59f3098 	ldr	r3, [pc, #152]	; 2730 <.text+0x2730>
-    2694:	e1a01004 	mov	r1, r4
-    2698:	e5830000 	str	r0, [r3]
-    269c:	e3a0000e 	mov	r0, #14	; 0xe
-    26a0:	eb001a3c 	bl	8f98 <registerPacket>
-    26a4:	e59f3088 	ldr	r3, [pc, #136]	; 2734 <.text+0x2734>
-    26a8:	e59f1088 	ldr	r1, [pc, #136]	; 2738 <.text+0x2738>
-    26ac:	e5830000 	str	r0, [r3]
-    26b0:	e3a00011 	mov	r0, #17	; 0x11
-    26b4:	eb001a37 	bl	8f98 <registerPacket>
-    26b8:	e59f307c 	ldr	r3, [pc, #124]	; 273c <.text+0x273c>
-    26bc:	e5830000 	str	r0, [r3]
-    26c0:	eb001cbb 	bl	99b4 <UART0_rxFlush>
-    26c4:	eb001cca 	bl	99f4 <UART0_txFlush>
-    26c8:	eb001c9f 	bl	994c <startAutoBaud>
-    26cc:	e8bd4010 	ldmia	sp!, {r4, lr}
-    26d0:	e12fff1e 	bx	lr
-    26d4:	40001140 	andmi	r1, r0, r0, asr #2
-    26d8:	4000108c 	andmi	r1, r0, ip, lsl #1
-    26dc:	40001070 	andmi	r1, r0, r0, ror r0
-    26e0:	4000113c 	andmi	r1, r0, ip, lsr r1
-    26e4:	400010b0 	strmih	r1, [r0], -r0
-    26e8:	40001040 	andmi	r1, r0, r0, asr #32
-    26ec:	4000128d 	andmi	r1, r0, sp, lsl #5
-    26f0:	40001264 	andmi	r1, r0, r4, ror #4
-    26f4:	400012bc 	strmih	r1, [r0], -ip
-    26f8:	4000117c 	andmi	r1, r0, ip, ror r1
-    26fc:	400010b1 	strmih	r1, [r0], -r1
-    2700:	40001184 	andmi	r1, r0, r4, lsl #3
-    2704:	40001254 	andmi	r1, r0, r4, asr r2
-    2708:	40001090 	mulmi	r0, r0, r0
-    270c:	4000110a 	andmi	r1, r0, sl, lsl #2
-    2710:	4000106c 	andmi	r1, r0, ip, rrx
-    2714:	40001188 	andmi	r1, r0, r8, lsl #3
-    2718:	400012a4 	andmi	r1, r0, r4, lsr #5
-    271c:	4000128c 	andmi	r1, r0, ip, lsl #5
-    2720:	40001180 	andmi	r1, r0, r0, lsl #3
-    2724:	40001142 	andmi	r1, r0, r2, asr #2
-    2728:	40001094 	mulmi	r0, r4, r0
-    272c:	400012ac 	andmi	r1, r0, ip, lsr #5
-    2730:	40001130 	andmi	r1, r0, r0, lsr r1
-    2734:	40001068 	andmi	r1, r0, r8, rrx
-    2738:	400010f2 	strmid	r1, [r0], -r2
-    273c:	400012a8 	andmi	r1, r0, r8, lsr #5
-
-00002740 <processSendData>:
-    2740:	e92d47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
-    2744:	e59f63ec 	ldr	r6, [pc, #1004]	; 2b38 <.text+0x2b38>
-    2748:	e5d61002 	ldrb	r1, [r6, #2]
-    274c:	e5d63003 	ldrb	r3, [r6, #3]
-    2750:	e5d6000e 	ldrb	r0, [r6, #14]
-    2754:	e5d6200f 	ldrb	r2, [r6, #15]
-    2758:	e1911403 	orrs	r1, r1, r3, lsl #8
-    275c:	e1804402 	orr	r4, r0, r2, lsl #8
-    2760:	0a000004 	beq	2778 <processSendData+0x38>
-    2764:	e59f33d0 	ldr	r3, [pc, #976]	; 2b3c <.text+0x2b3c>
-    2768:	e5930000 	ldr	r0, [r3]
-    276c:	eb004a69 	bl	15118 <____umodsi3_from_arm>
-    2770:	e1540000 	cmp	r4, r0
-    2774:	0a00003d 	beq	2870 <processSendData+0x130>
-    2778:	e5d61000 	ldrb	r1, [r6]
-    277c:	e5d63001 	ldrb	r3, [r6, #1]
-    2780:	e5d6000c 	ldrb	r0, [r6, #12]
-    2784:	e5d6200d 	ldrb	r2, [r6, #13]
-    2788:	e1911403 	orrs	r1, r1, r3, lsl #8
-    278c:	e1804402 	orr	r4, r0, r2, lsl #8
-    2790:	0a000004 	beq	27a8 <processSendData+0x68>
-    2794:	e59f33a0 	ldr	r3, [pc, #928]	; 2b3c <.text+0x2b3c>
-    2798:	e5930000 	ldr	r0, [r3]
-    279c:	eb004a5d 	bl	15118 <____umodsi3_from_arm>
-    27a0:	e1540000 	cmp	r4, r0
-    27a4:	0a000096 	beq	2a04 <processSendData+0x2c4>
-    27a8:	e5d61004 	ldrb	r1, [r6, #4]
-    27ac:	e5d63005 	ldrb	r3, [r6, #5]
-    27b0:	e5d60010 	ldrb	r0, [r6, #16]
-    27b4:	e5d62011 	ldrb	r2, [r6, #17]
-    27b8:	e1911403 	orrs	r1, r1, r3, lsl #8
-    27bc:	e1804402 	orr	r4, r0, r2, lsl #8
-    27c0:	0a000004 	beq	27d8 <processSendData+0x98>
-    27c4:	e59f3370 	ldr	r3, [pc, #880]	; 2b3c <.text+0x2b3c>
-    27c8:	e5930000 	ldr	r0, [r3]
-    27cc:	eb004a51 	bl	15118 <____umodsi3_from_arm>
-    27d0:	e1540000 	cmp	r4, r0
-    27d4:	0a0000cd 	beq	2b10 <processSendData+0x3d0>
-    27d8:	e5d61006 	ldrb	r1, [r6, #6]
-    27dc:	e5d63007 	ldrb	r3, [r6, #7]
-    27e0:	e5d60012 	ldrb	r0, [r6, #18]
-    27e4:	e5d62013 	ldrb	r2, [r6, #19]
-    27e8:	e1911403 	orrs	r1, r1, r3, lsl #8
-    27ec:	e1804402 	orr	r4, r0, r2, lsl #8
-    27f0:	0a000004 	beq	2808 <processSendData+0xc8>
-    27f4:	e59f3340 	ldr	r3, [pc, #832]	; 2b3c <.text+0x2b3c>
-    27f8:	e5930000 	ldr	r0, [r3]
-    27fc:	eb004a45 	bl	15118 <____umodsi3_from_arm>
-    2800:	e1540000 	cmp	r4, r0
-    2804:	0a0000c6 	beq	2b24 <processSendData+0x3e4>
-    2808:	e5d61008 	ldrb	r1, [r6, #8]
-    280c:	e5d63009 	ldrb	r3, [r6, #9]
-    2810:	e5d60014 	ldrb	r0, [r6, #20]
-    2814:	e5d62015 	ldrb	r2, [r6, #21]
-    2818:	e1911403 	orrs	r1, r1, r3, lsl #8
-    281c:	e1804402 	orr	r4, r0, r2, lsl #8
-    2820:	0a000004 	beq	2838 <processSendData+0xf8>
-    2824:	e59f3310 	ldr	r3, [pc, #784]	; 2b3c <.text+0x2b3c>
-    2828:	e5930000 	ldr	r0, [r3]
-    282c:	eb004a39 	bl	15118 <____umodsi3_from_arm>
-    2830:	e1540000 	cmp	r4, r0
-    2834:	0a00006d 	beq	29f0 <processSendData+0x2b0>
-    2838:	e5d6100b 	ldrb	r1, [r6, #11]
-    283c:	e5d6300a 	ldrb	r3, [r6, #10]
-    2840:	e5d60016 	ldrb	r0, [r6, #22]
-    2844:	e5d62017 	ldrb	r2, [r6, #23]
-    2848:	e1931401 	orrs	r1, r3, r1, lsl #8
-    284c:	e1804402 	orr	r4, r0, r2, lsl #8
-    2850:	0a000004 	beq	2868 <processSendData+0x128>
-    2854:	e59f32e0 	ldr	r3, [pc, #736]	; 2b3c <.text+0x2b3c>
-    2858:	e5930000 	ldr	r0, [r3]
-    285c:	eb004a2d 	bl	15118 <____umodsi3_from_arm>
-    2860:	e1540000 	cmp	r4, r0
-    2864:	0a000012 	beq	28b4 <processSendData+0x174>
-    2868:	e8bd47f0 	ldmia	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
-    286c:	e12fff1e 	bx	lr
-    2870:	e59f02c8 	ldr	r0, [pc, #712]	; 2b40 <.text+0x2b40>
-    2874:	e59f12c8 	ldr	r1, [pc, #712]	; 2b44 <.text+0x2b44>
-    2878:	e3a0c000 	mov	ip, #0	; 0x0
-    287c:	e5d03000 	ldrb	r3, [r0]
-    2880:	e5d02001 	ldrb	r2, [r0, #1]
-    2884:	e28cc001 	add	ip, ip, #1	; 0x1
-    2888:	e35c0008 	cmp	ip, #8	; 0x8
-    288c:	e5c13008 	strb	r3, [r1, #8]
-    2890:	e5c12009 	strb	r2, [r1, #9]
-    2894:	e2800002 	add	r0, r0, #2	; 0x2
-    2898:	e2811002 	add	r1, r1, #2	; 0x2
-    289c:	1afffff6 	bne	287c <processSendData+0x13c>
-    28a0:	e59f129c 	ldr	r1, [pc, #668]	; 2b44 <.text+0x2b44>
-    28a4:	e3a02018 	mov	r2, #24	; 0x18
-    28a8:	e3a0000b 	mov	r0, #11	; 0xb
-    28ac:	eb001b4a 	bl	95dc <writePacket2Ringbuffer>
-    28b0:	eaffffb0 	b	2778 <processSendData+0x38>
-    28b4:	e59f528c 	ldr	r5, [pc, #652]	; 2b48 <.text+0x2b48>
-    28b8:	e5d52005 	ldrb	r2, [r5, #5]
-    28bc:	e5d50004 	ldrb	r0, [r5, #4]
-    28c0:	e5d51006 	ldrb	r1, [r5, #6]
-    28c4:	e59f3280 	ldr	r3, [pc, #640]	; 2b4c <.text+0x2b4c>
-    28c8:	e1800402 	orr	r0, r0, r2, lsl #8
-    28cc:	e59f427c 	ldr	r4, [pc, #636]	; 2b50 <.text+0x2b50>
-    28d0:	e5d3e001 	ldrb	lr, [r3, #1]
-    28d4:	e5d5a007 	ldrb	sl, [r5, #7]
-    28d8:	e5d39007 	ldrb	r9, [r3, #7]
-    28dc:	e5d32002 	ldrb	r2, [r3, #2]
-    28e0:	e5d3c000 	ldrb	ip, [r3]
-    28e4:	e5d36004 	ldrb	r6, [r3, #4]
-    28e8:	e5d37005 	ldrb	r7, [r3, #5]
-    28ec:	e5d38006 	ldrb	r8, [r3, #6]
-    28f0:	e1800801 	orr	r0, r0, r1, lsl #16
-    28f4:	e5d31003 	ldrb	r1, [r3, #3]
-    28f8:	e1800c0a 	orr	r0, r0, sl, lsl #24
-    28fc:	e5c4e003 	strb	lr, [r4, #3]
-    2900:	e5c42000 	strb	r2, [r4]
-    2904:	e5c41001 	strb	r1, [r4, #1]
-    2908:	e5c4c002 	strb	ip, [r4, #2]
-    290c:	e5c46004 	strb	r6, [r4, #4]
-    2910:	e5c47005 	strb	r7, [r4, #5]
-    2914:	e5c48006 	strb	r8, [r4, #6]
-    2918:	e5c49007 	strb	r9, [r4, #7]
-    291c:	eb00057e 	bl	3f1c <SIToLLCmdRoll>
-    2920:	e5d51009 	ldrb	r1, [r5, #9]
-    2924:	e5d52008 	ldrb	r2, [r5, #8]
-    2928:	e5d5c00a 	ldrb	ip, [r5, #10]
-    292c:	e1a03800 	mov	r3, r0, lsl #16
-    2930:	e1822401 	orr	r2, r2, r1, lsl #8
-    2934:	e5d5000b 	ldrb	r0, [r5, #11]
-    2938:	e2633000 	rsb	r3, r3, #0	; 0x0
-    293c:	e182280c 	orr	r2, r2, ip, lsl #16
-    2940:	e1a01c23 	mov	r1, r3, lsr #24
-    2944:	e1a03823 	mov	r3, r3, lsr #16
-    2948:	e5c43018 	strb	r3, [r4, #24]
-    294c:	e5c41019 	strb	r1, [r4, #25]
-    2950:	e1820c00 	orr	r0, r2, r0, lsl #24
-    2954:	eb00057c 	bl	3f4c <SIToLLCmdPitch>
-    2958:	e5d5200d 	ldrb	r2, [r5, #13]
-    295c:	e5d5300c 	ldrb	r3, [r5, #12]
-    2960:	e5d5100e 	ldrb	r1, [r5, #14]
-    2964:	e5d5c00f 	ldrb	ip, [r5, #15]
-    2968:	e1833402 	orr	r3, r3, r2, lsl #8
-    296c:	e1833801 	orr	r3, r3, r1, lsl #16
-    2970:	e1a02420 	mov	r2, r0, lsr #8
-    2974:	e5c4001a 	strb	r0, [r4, #26]
-    2978:	e5c4201b 	strb	r2, [r4, #27]
-    297c:	e1830c0c 	orr	r0, r3, ip, lsl #24
-    2980:	eb00057e 	bl	3f80 <SIToLLCmdYawRate>
-    2984:	e5d52011 	ldrb	r2, [r5, #17]
-    2988:	e5d53010 	ldrb	r3, [r5, #16]
-    298c:	e5d51012 	ldrb	r1, [r5, #18]
-    2990:	e5d5c013 	ldrb	ip, [r5, #19]
-    2994:	e1833402 	orr	r3, r3, r2, lsl #8
-    2998:	e1833801 	orr	r3, r3, r1, lsl #16
-    299c:	e1a02420 	mov	r2, r0, lsr #8
-    29a0:	e5c4001c 	strb	r0, [r4, #28]
-    29a4:	e5c4201d 	strb	r2, [r4, #29]
-    29a8:	e1830c0c 	orr	r0, r3, ip, lsl #24
-    29ac:	eb000580 	bl	3fb4 <SIToLLCmdThrust>
-    29b0:	e5d57003 	ldrb	r7, [r5, #3]
-    29b4:	e5d5c000 	ldrb	ip, [r5]
-    29b8:	e5d5e001 	ldrb	lr, [r5, #1]
-    29bc:	e5d56002 	ldrb	r6, [r5, #2]
-    29c0:	e1a03420 	mov	r3, r0, lsr #8
-    29c4:	e5c4001e 	strb	r0, [r4, #30]
-    29c8:	e1a01004 	mov	r1, r4
-    29cc:	e3a02072 	mov	r2, #114	; 0x72
-    29d0:	e5c4301f 	strb	r3, [r4, #31]
-    29d4:	e5c4c04a 	strb	ip, [r4, #74]
-    29d8:	e5c4e04b 	strb	lr, [r4, #75]
-    29dc:	e5c4604c 	strb	r6, [r4, #76]
-    29e0:	e5c4704d 	strb	r7, [r4, #77]
-    29e4:	e3a00012 	mov	r0, #18	; 0x12
-    29e8:	eb001afb 	bl	95dc <writePacket2Ringbuffer>
-    29ec:	eaffff9d 	b	2868 <processSendData+0x128>
-    29f0:	e59f115c 	ldr	r1, [pc, #348]	; 2b54 <.text+0x2b54>
-    29f4:	e3a02018 	mov	r2, #24	; 0x18
-    29f8:	e3a0000d 	mov	r0, #13	; 0xd
-    29fc:	eb001af6 	bl	95dc <writePacket2Ringbuffer>
-    2a00:	eaffff8c 	b	2838 <processSendData+0xf8>
-    2a04:	e59f514c 	ldr	r5, [pc, #332]	; 2b58 <.text+0x2b58>
-    2a08:	e5950014 	ldr	r0, [r5, #20]
-    2a0c:	eb000574 	bl	3fe4 <LLToSIAngleRoll>
-    2a10:	e59f4144 	ldr	r4, [pc, #324]	; 2b5c <.text+0x2b5c>
-    2a14:	e1a03000 	mov	r3, r0
-    2a18:	e1a0cc20 	mov	ip, r0, lsr #24
-    2a1c:	e1a02420 	mov	r2, r0, lsr #8
-    2a20:	e1a01820 	mov	r1, r0, lsr #16
-    2a24:	e5950010 	ldr	r0, [r5, #16]
-    2a28:	e5c42001 	strb	r2, [r4, #1]
-    2a2c:	e5c41002 	strb	r1, [r4, #2]
-    2a30:	e5c4c003 	strb	ip, [r4, #3]
-    2a34:	e5c43000 	strb	r3, [r4]
-    2a38:	eb0005d9 	bl	41a4 <LLToSIAnglePitch>
-    2a3c:	e1a03000 	mov	r3, r0
-    2a40:	e1a0cc20 	mov	ip, r0, lsr #24
-    2a44:	e1a02420 	mov	r2, r0, lsr #8
-    2a48:	e1a01820 	mov	r1, r0, lsr #16
-    2a4c:	e5950018 	ldr	r0, [r5, #24]
-    2a50:	e5c42005 	strb	r2, [r4, #5]
-    2a54:	e5c41006 	strb	r1, [r4, #6]
-    2a58:	e5c4c007 	strb	ip, [r4, #7]
-    2a5c:	e5c43004 	strb	r3, [r4, #4]
-    2a60:	eb0005b9 	bl	414c <LLToSIAngleYaw>
-    2a64:	e1a03000 	mov	r3, r0
-    2a68:	e1a0cc20 	mov	ip, r0, lsr #24
-    2a6c:	e1a02420 	mov	r2, r0, lsr #8
-    2a70:	e1a01820 	mov	r1, r0, lsr #16
-    2a74:	e5950020 	ldr	r0, [r5, #32]
-    2a78:	e5c42009 	strb	r2, [r4, #9]
-    2a7c:	e5c4100a 	strb	r1, [r4, #10]
-    2a80:	e5c4c00b 	strb	ip, [r4, #11]
-    2a84:	e5c43008 	strb	r3, [r4, #8]
-    2a88:	eb000598 	bl	40f0 <LLToSIAngleRateRoll>
-    2a8c:	e1a03000 	mov	r3, r0
-    2a90:	e1a0cc20 	mov	ip, r0, lsr #24
-    2a94:	e1a02420 	mov	r2, r0, lsr #8
-    2a98:	e1a01820 	mov	r1, r0, lsr #16
-    2a9c:	e595001c 	ldr	r0, [r5, #28]
-    2aa0:	e5c4200d 	strb	r2, [r4, #13]
-    2aa4:	e5c4100e 	strb	r1, [r4, #14]
-    2aa8:	e5c4c00f 	strb	ip, [r4, #15]
-    2aac:	e5c4300c 	strb	r3, [r4, #12]
-    2ab0:	eb000576 	bl	4090 <LLToSIAngleRatePitch>
-    2ab4:	e1a03000 	mov	r3, r0
-    2ab8:	e1a0cc20 	mov	ip, r0, lsr #24
-    2abc:	e1a02423 	mov	r2, r3, lsr #8
-    2ac0:	e1a01823 	mov	r1, r3, lsr #16
-    2ac4:	e5950024 	ldr	r0, [r5, #36]
-    2ac8:	e5c42011 	strb	r2, [r4, #17]
-    2acc:	e5c41012 	strb	r1, [r4, #18]
-    2ad0:	e5c4c013 	strb	ip, [r4, #19]
-    2ad4:	e5c43010 	strb	r3, [r4, #16]
-    2ad8:	eb000554 	bl	4030 <LLToSIAngleRateYaw>
-    2adc:	e1a03000 	mov	r3, r0
-    2ae0:	e1a05c20 	mov	r5, r0, lsr #24
-    2ae4:	e1a0c420 	mov	ip, r0, lsr #8
-    2ae8:	e1a0e820 	mov	lr, r0, lsr #16
-    2aec:	e1a01004 	mov	r1, r4
-    2af0:	e3a02024 	mov	r2, #36	; 0x24
-    2af4:	e5c4c015 	strb	ip, [r4, #21]
-    2af8:	e5c4e016 	strb	lr, [r4, #22]
-    2afc:	e5c45017 	strb	r5, [r4, #23]
-    2b00:	e5c43014 	strb	r3, [r4, #20]
-    2b04:	e3a0000a 	mov	r0, #10	; 0xa
-    2b08:	eb001ab3 	bl	95dc <writePacket2Ringbuffer>
-    2b0c:	eaffff25 	b	27a8 <processSendData+0x68>
-    2b10:	e59f1048 	ldr	r1, [pc, #72]	; 2b60 <.text+0x2b60>
-    2b14:	e3a02001 	mov	r2, #1	; 0x1
-    2b18:	e3a00009 	mov	r0, #9	; 0x9
-    2b1c:	eb001aae 	bl	95dc <writePacket2Ringbuffer>
-    2b20:	eaffff2c 	b	27d8 <processSendData+0x98>
-    2b24:	e59f1038 	ldr	r1, [pc, #56]	; 2b64 <.text+0x2b64>
-    2b28:	e3a02024 	mov	r2, #36	; 0x24
-    2b2c:	e3a00007 	mov	r0, #7	; 0x7
-    2b30:	eb001aa9 	bl	95dc <writePacket2Ringbuffer>
-    2b34:	eaffff33 	b	2808 <processSendData+0xc8>
-    2b38:	40001070 	andmi	r1, r0, r0, ror r0
-    2b3c:	4000113c 	andmi	r1, r0, ip, lsr r1
-    2b40:	4000116c 	andmi	r1, r0, ip, ror #2
-    2b44:	40001098 	mulmi	r0, r8, r0
-    2b48:	4000110a 	andmi	r1, r0, sl, lsl #2
-    2b4c:	40000fc0 	andmi	r0, r0, r0, asr #31
-    2b50:	40000fcc 	andmi	r0, r0, ip, asr #31
-    2b54:	40001152 	andmi	r1, r0, r2, asr r1
-    2b58:	40000d50 	andmi	r0, r0, r0, asr sp
-    2b5c:	40001044 	andmi	r1, r0, r4, asr #32
-    2b60:	40001108 	andmi	r1, r0, r8, lsl #2
-    2b64:	40001268 	andmi	r1, r0, r8, ror #4
-
-00002b68 <SDK_mainloop>:
-    2b68:	e92d4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
-    2b6c:	e59f2fa8 	ldr	r2, [pc, #4008]	; 3b1c <.text+0x3b1c>
-    2b70:	e59f0fa8 	ldr	r0, [pc, #4008]	; 3b20 <.text+0x3b20>
-    2b74:	e5d23000 	ldrb	r3, [r2]
-    2b78:	e3a0220e 	mov	r2, #-536870912	; 0xe0000000
-    2b7c:	e5901000 	ldr	r1, [r0]
-    2b80:	e2822902 	add	r2, r2, #32768	; 0x8000
-    2b84:	e5922008 	ldr	r2, [r2, #8]
-    2b88:	e59f4f94 	ldr	r4, [pc, #3988]	; 3b24 <.text+0x3b24>
-    2b8c:	e24dd068 	sub	sp, sp, #104	; 0x68
-    2b90:	e35300ff 	cmp	r3, #255	; 0xff
-    2b94:	e2811001 	add	r1, r1, #1	; 0x1
-    2b98:	e3a03002 	mov	r3, #2	; 0x2
-    2b9c:	e58d2064 	str	r2, [sp, #100]
-    2ba0:	e5c43000 	strb	r3, [r4]
-    2ba4:	e5801000 	str	r1, [r0]
-    2ba8:	0a0002cd 	beq	36e4 <SDK_mainloop+0xb7c>
-    2bac:	e59f3f74 	ldr	r3, [pc, #3956]	; 3b28 <.text+0x3b28>
-    2bb0:	e1d340b8 	ldrh	r4, [r3, #8]
-    2bb4:	e3540000 	cmp	r4, #0	; 0x0
-    2bb8:	0a00021b 	beq	342c <SDK_mainloop+0x8c4>
-    2bbc:	e59f4f68 	ldr	r4, [pc, #3944]	; 3b2c <.text+0x3b2c>
-    2bc0:	e082c194 	umull	ip, r2, r4, r1
-    2bc4:	e1a02322 	mov	r2, r2, lsr #6
-    2bc8:	e0623282 	rsb	r3, r2, r2, lsl #5
-    2bcc:	e0823103 	add	r3, r2, r3, lsl #2
-    2bd0:	e0412183 	sub	r2, r1, r3, lsl #3
-    2bd4:	e3520064 	cmp	r2, #100	; 0x64
-    2bd8:	13520000 	cmpne	r2, #0	; 0x0
-    2bdc:	0a0003bd 	beq	3ad8 <SDK_mainloop+0xf70>
-    2be0:	e0820194 	umull	r0, r2, r4, r1
-    2be4:	e1a02322 	mov	r2, r2, lsr #6
-    2be8:	e0623282 	rsb	r3, r2, r2, lsl #5
-    2bec:	e0823103 	add	r3, r2, r3, lsl #2
-    2bf0:	e0412183 	sub	r2, r1, r3, lsl #3
-    2bf4:	e3520096 	cmp	r2, #150	; 0x96
-    2bf8:	13520032 	cmpne	r2, #50	; 0x32
-    2bfc:	0a0002c6 	beq	371c <SDK_mainloop+0xbb4>
-    2c00:	eb001922 	bl	9090 <parseRxFifo>
-    2c04:	e59f3f2c 	ldr	r3, [pc, #3884]	; 3b38 <.text+0x3b38>
-    2c08:	e5933000 	ldr	r3, [r3]
-    2c0c:	e5d32008 	ldrb	r2, [r3, #8]
-    2c10:	e3520000 	cmp	r2, #0	; 0x0
-    2c14:	0a000092 	beq	2e64 <SDK_mainloop+0x2fc>
-    2c18:	e3a02000 	mov	r2, #0	; 0x0
-    2c1c:	e5c32008 	strb	r2, [r3, #8]
-    2c20:	e59f3f14 	ldr	r3, [pc, #3860]	; 3b3c <.text+0x3b3c>
-    2c24:	e5d39003 	ldrb	r9, [r3, #3]
-    2c28:	e5d3b002 	ldrb	fp, [r3, #2]
-    2c2c:	e5d3a01a 	ldrb	sl, [r3, #26]
-    2c30:	e5d3801e 	ldrb	r8, [r3, #30]
-    2c34:	e5d37006 	ldrb	r7, [r3, #6]
-    2c38:	e5d34022 	ldrb	r4, [r3, #34]
-    2c3c:	e5d32026 	ldrb	r2, [r3, #38]
-    2c40:	e5d35001 	ldrb	r5, [r3, #1]
-    2c44:	e5d36019 	ldrb	r6, [r3, #25]
-    2c48:	e5d3e01d 	ldrb	lr, [r3, #29]
-    2c4c:	e5d31005 	ldrb	r1, [r3, #5]
-    2c50:	e5d3c021 	ldrb	ip, [r3, #33]
-    2c54:	e5d30025 	ldrb	r0, [r3, #37]
-    2c58:	e58d9060 	str	r9, [sp, #96]
-    2c5c:	e5d3901b 	ldrb	r9, [r3, #27]
-    2c60:	e58d905c 	str	r9, [sp, #92]
-    2c64:	e5d3901f 	ldrb	r9, [r3, #31]
-    2c68:	e58d9054 	str	r9, [sp, #84]
-    2c6c:	e5d39007 	ldrb	r9, [r3, #7]
-    2c70:	e58d904c 	str	r9, [sp, #76]
-    2c74:	e5d39023 	ldrb	r9, [r3, #35]
-    2c78:	e58d9048 	str	r9, [sp, #72]
-    2c7c:	e5d39027 	ldrb	r9, [r3, #39]
-    2c80:	e58d9040 	str	r9, [sp, #64]
-    2c84:	e1800402 	orr	r0, r0, r2, lsl #8
-    2c88:	e5d3201c 	ldrb	r2, [r3, #28]
-    2c8c:	e185540b 	orr	r5, r5, fp, lsl #8
-    2c90:	e186640a 	orr	r6, r6, sl, lsl #8
-    2c94:	e5d3b000 	ldrb	fp, [r3]
-    2c98:	e5d3a004 	ldrb	sl, [r3, #4]
-    2c9c:	e58d2058 	str	r2, [sp, #88]
-    2ca0:	e18cc404 	orr	ip, ip, r4, lsl #8
-    2ca4:	e5d34020 	ldrb	r4, [r3, #32]
-    2ca8:	e58d4050 	str	r4, [sp, #80]
-    2cac:	e5d39024 	ldrb	r9, [r3, #36]
-    2cb0:	e18ee408 	orr	lr, lr, r8, lsl #8
-    2cb4:	e5d38008 	ldrb	r8, [r3, #8]
-    2cb8:	e58d9044 	str	r9, [sp, #68]
-    2cbc:	e5d32028 	ldrb	r2, [r3, #40]
-    2cc0:	e59d4060 	ldr	r4, [sp, #96]
-    2cc4:	e59d905c 	ldr	r9, [sp, #92]
-    2cc8:	e58d203c 	str	r2, [sp, #60]
-    2ccc:	e59d2054 	ldr	r2, [sp, #84]
-    2cd0:	e1855804 	orr	r5, r5, r4, lsl #16
-    2cd4:	e1866809 	orr	r6, r6, r9, lsl #16
-    2cd8:	e59d404c 	ldr	r4, [sp, #76]
-    2cdc:	e59d9048 	ldr	r9, [sp, #72]
-    2ce0:	e18ee802 	orr	lr, lr, r2, lsl #16
-    2ce4:	e1811407 	orr	r1, r1, r7, lsl #8
-    2ce8:	e59d2040 	ldr	r2, [sp, #64]
-    2cec:	e1857c0a 	orr	r7, r5, sl, lsl #24
-    2cf0:	e1811804 	orr	r1, r1, r4, lsl #16
-    2cf4:	e59d5058 	ldr	r5, [sp, #88]
-    2cf8:	e18cc809 	orr	ip, ip, r9, lsl #16
-    2cfc:	e59d9050 	ldr	r9, [sp, #80]
-    2d00:	e1818c08 	orr	r8, r1, r8, lsl #24
-    2d04:	e1800802 	orr	r0, r0, r2, lsl #16
-    2d08:	e59d103c 	ldr	r1, [sp, #60]
-    2d0c:	e59f2e2c 	ldr	r2, [pc, #3628]	; 3b40 <.text+0x3b40>
-    2d10:	e186ac05 	orr	sl, r6, r5, lsl #24
-    2d14:	e18e5c09 	orr	r5, lr, r9, lsl #24
-    2d18:	e582509c 	str	r5, [r2, #156]
-    2d1c:	e1800c01 	orr	r0, r0, r1, lsl #24
-    2d20:	e59f5e1c 	ldr	r5, [pc, #3612]	; 3b44 <.text+0x3b44>
-    2d24:	e59f9e1c 	ldr	r9, [pc, #3612]	; 3b48 <.text+0x3b48>
-    2d28:	e58d0038 	str	r0, [sp, #56]
-    2d2c:	e59de044 	ldr	lr, [sp, #68]
-    2d30:	e20b1001 	and	r1, fp, #1	; 0x1
-    2d34:	e20b0002 	and	r0, fp, #2	; 0x2
-    2d38:	e5c51000 	strb	r1, [r5]
-    2d3c:	e5c90000 	strb	r0, [r9]
-    2d40:	e59f1e04 	ldr	r1, [pc, #3588]	; 3b4c <.text+0x3b4c>
-    2d44:	e59f0e04 	ldr	r0, [pc, #3588]	; 3b50 <.text+0x3b50>
-    2d48:	e18c6c0e 	orr	r6, ip, lr, lsl #24
-    2d4c:	e20bc004 	and	ip, fp, #4	; 0x4
-    2d50:	e20be020 	and	lr, fp, #32	; 0x20
-    2d54:	e5c0c000 	strb	ip, [r0]
-    2d58:	e5c1e000 	strb	lr, [r1]
-    2d5c:	e5827094 	str	r7, [r2, #148]
-    2d60:	e582a098 	str	sl, [r2, #152]
-    2d64:	e5827090 	str	r7, [r2, #144]
-    2d68:	e59f4de4 	ldr	r4, [pc, #3556]	; 3b54 <.text+0x3b54>
-    2d6c:	e59d2038 	ldr	r2, [sp, #56]
-    2d70:	e5848094 	str	r8, [r4, #148]
-    2d74:	e5846098 	str	r6, [r4, #152]
-    2d78:	e5848090 	str	r8, [r4, #144]
-    2d7c:	e584209c 	str	r2, [r4, #156]
-    2d80:	e5d3a02b 	ldrb	sl, [r3, #43]
-    2d84:	e5d3800a 	ldrb	r8, [r3, #10]
-    2d88:	e5d3702a 	ldrb	r7, [r3, #42]
-    2d8c:	e5d36032 	ldrb	r6, [r3, #50]
-    2d90:	e5d35016 	ldrb	r5, [r3, #22]
-    2d94:	e5d3403e 	ldrb	r4, [r3, #62]
-    2d98:	e5d3900b 	ldrb	r9, [r3, #11]
-    2d9c:	e5d31009 	ldrb	r1, [r3, #9]
-    2da0:	e5d3e029 	ldrb	lr, [r3, #41]
-    2da4:	e5d32031 	ldrb	r2, [r3, #49]
-    2da8:	e5d3c015 	ldrb	ip, [r3, #21]
-    2dac:	e5d3003d 	ldrb	r0, [r3, #61]
-    2db0:	e58da034 	str	sl, [sp, #52]
-    2db4:	e5d3a033 	ldrb	sl, [r3, #51]
-    2db8:	e58da030 	str	sl, [sp, #48]
-    2dbc:	e5d3a017 	ldrb	sl, [r3, #23]
-    2dc0:	e58da02c 	str	sl, [sp, #44]
-    2dc4:	e5d3a03f 	ldrb	sl, [r3, #63]
-    2dc8:	e58da024 	str	sl, [sp, #36]
-    2dcc:	e1800404 	orr	r0, r0, r4, lsl #8
-    2dd0:	e5d34040 	ldrb	r4, [r3, #64]
-    2dd4:	e58d4020 	str	r4, [sp, #32]
-    2dd8:	e1811408 	orr	r1, r1, r8, lsl #8
-    2ddc:	e5d3a034 	ldrb	sl, [r3, #52]
-    2de0:	e5d3802c 	ldrb	r8, [r3, #44]
-    2de4:	e1811809 	orr	r1, r1, r9, lsl #16
-    2de8:	e18ee407 	orr	lr, lr, r7, lsl #8
-    2dec:	e59d9030 	ldr	r9, [sp, #48]
-    2df0:	e5d3700c 	ldrb	r7, [r3, #12]
-    2df4:	e5d33018 	ldrb	r3, [r3, #24]
-    2df8:	e1822406 	orr	r2, r2, r6, lsl #8
-    2dfc:	e18cc405 	orr	ip, ip, r5, lsl #8
-    2e00:	e59d5034 	ldr	r5, [sp, #52]
-    2e04:	e1822809 	orr	r2, r2, r9, lsl #16
-    2e08:	e58d3028 	str	r3, [sp, #40]
-    2e0c:	e59d4024 	ldr	r4, [sp, #36]
-    2e10:	e59d302c 	ldr	r3, [sp, #44]
-    2e14:	e18ee805 	orr	lr, lr, r5, lsl #16
-    2e18:	e59d9028 	ldr	r9, [sp, #40]
-    2e1c:	e1815c07 	orr	r5, r1, r7, lsl #24
-    2e20:	e1821c0a 	orr	r1, r2, sl, lsl #24
-    2e24:	e59da020 	ldr	sl, [sp, #32]
-    2e28:	e18cc803 	orr	ip, ip, r3, lsl #16
-    2e2c:	e1800804 	orr	r0, r0, r4, lsl #16
-    2e30:	e59f3d20 	ldr	r3, [pc, #3360]	; 3b58 <.text+0x3b58>
-    2e34:	e59f4d20 	ldr	r4, [pc, #3360]	; 3b5c <.text+0x3b5c>
-    2e38:	e18e6c08 	orr	r6, lr, r8, lsl #24
-    2e3c:	e1802c0a 	orr	r2, r0, sl, lsl #24
-    2e40:	e18cec09 	orr	lr, ip, r9, lsl #24
-    2e44:	e31b0080 	tst	fp, #128	; 0x80
-    2e48:	e583109c 	str	r1, [r3, #156]
-    2e4c:	e5842018 	str	r2, [r4, #24]
-    2e50:	e5835094 	str	r5, [r3, #148]
-    2e54:	e5836098 	str	r6, [r3, #152]
-    2e58:	e584e014 	str	lr, [r4, #20]
-    2e5c:	e5835090 	str	r5, [r3, #144]
-    2e60:	1a00026b 	bne	3814 <SDK_mainloop+0xcac>
-    2e64:	eb000bfe 	bl	5e64 <KFilter>
-    2e68:	e59fccdc 	ldr	ip, [pc, #3292]	; 3b4c <.text+0x3b4c>
-    2e6c:	e5dc3000 	ldrb	r3, [ip]
-    2e70:	e3530000 	cmp	r3, #0	; 0x0
-    2e74:	0a0001e2 	beq	3604 <SDK_mainloop+0xa9c>
-    2e78:	e59f3ce0 	ldr	r3, [pc, #3296]	; 3b60 <.text+0x3b60>
-    2e7c:	e5932018 	ldr	r2, [r3, #24]
-    2e80:	e59f6cdc 	ldr	r6, [pc, #3292]	; 3b64 <.text+0x3b64>
-    2e84:	e1a00c22 	mov	r0, r2, lsr #24
-    2e88:	e1a03422 	mov	r3, r2, lsr #8
-    2e8c:	e1a01822 	mov	r1, r2, lsr #16
-    2e90:	e5c63021 	strb	r3, [r6, #33]
-    2e94:	e5c61022 	strb	r1, [r6, #34]
-    2e98:	e5c60023 	strb	r0, [r6, #35]
-    2e9c:	e5c62020 	strb	r2, [r6, #32]
-    2ea0:	e59fec9c 	ldr	lr, [pc, #3228]	; 3b44 <.text+0x3b44>
-    2ea4:	e5de3000 	ldrb	r3, [lr]
-    2ea8:	e3530000 	cmp	r3, #0	; 0x0
-    2eac:	0a0001b6 	beq	358c <SDK_mainloop+0xa24>
-    2eb0:	e59f3ca8 	ldr	r3, [pc, #3240]	; 3b60 <.text+0x3b60>
-    2eb4:	e593100c 	ldr	r1, [r3, #12]
-    2eb8:	e5932000 	ldr	r2, [r3]
-    2ebc:	e1a05c21 	mov	r5, r1, lsr #24
-    2ec0:	e1a04c22 	mov	r4, r2, lsr #24
-    2ec4:	e1a03422 	mov	r3, r2, lsr #8
-    2ec8:	e1a00822 	mov	r0, r2, lsr #16
-    2ecc:	e1a0c421 	mov	ip, r1, lsr #8
-    2ed0:	e1a0e821 	mov	lr, r1, lsr #16
-    2ed4:	e5c63001 	strb	r3, [r6, #1]
-    2ed8:	e5c60002 	strb	r0, [r6, #2]
-    2edc:	e5c64003 	strb	r4, [r6, #3]
-    2ee0:	e5c6c00d 	strb	ip, [r6, #13]
-    2ee4:	e5c6e00e 	strb	lr, [r6, #14]
-    2ee8:	e5c6500f 	strb	r5, [r6, #15]
-    2eec:	e5c62000 	strb	r2, [r6]
-    2ef0:	e5c6100c 	strb	r1, [r6, #12]
-    2ef4:	e59f0c4c 	ldr	r0, [pc, #3148]	; 3b48 <.text+0x3b48>
-    2ef8:	e5d03000 	ldrb	r3, [r0]
-    2efc:	e3530000 	cmp	r3, #0	; 0x0
-    2f00:	0a000183 	beq	3514 <SDK_mainloop+0x9ac>
-    2f04:	e59f3c54 	ldr	r3, [pc, #3156]	; 3b60 <.text+0x3b60>
-    2f08:	e5931010 	ldr	r1, [r3, #16]
-    2f0c:	e5932004 	ldr	r2, [r3, #4]
-    2f10:	e1a05c21 	mov	r5, r1, lsr #24
-    2f14:	e1a04c22 	mov	r4, r2, lsr #24
-    2f18:	e1a03422 	mov	r3, r2, lsr #8
-    2f1c:	e1a00822 	mov	r0, r2, lsr #16
-    2f20:	e1a0c421 	mov	ip, r1, lsr #8
-    2f24:	e1a0e821 	mov	lr, r1, lsr #16
-    2f28:	e5c63005 	strb	r3, [r6, #5]
-    2f2c:	e5c60006 	strb	r0, [r6, #6]
-    2f30:	e5c64007 	strb	r4, [r6, #7]
-    2f34:	e5c6c011 	strb	ip, [r6, #17]
-    2f38:	e5c6e012 	strb	lr, [r6, #18]
-    2f3c:	e5c65013 	strb	r5, [r6, #19]
-    2f40:	e5c62004 	strb	r2, [r6, #4]
-    2f44:	e5c61010 	strb	r1, [r6, #16]
-    2f48:	e59f1c00 	ldr	r1, [pc, #3072]	; 3b50 <.text+0x3b50>
-    2f4c:	e5d13000 	ldrb	r3, [r1]
-    2f50:	e3530000 	cmp	r3, #0	; 0x0
-    2f54:	0a000150 	beq	349c <SDK_mainloop+0x934>
-    2f58:	e59f3c00 	ldr	r3, [pc, #3072]	; 3b60 <.text+0x3b60>
-    2f5c:	e5931014 	ldr	r1, [r3, #20]
-    2f60:	e5932008 	ldr	r2, [r3, #8]
-    2f64:	e1a05c21 	mov	r5, r1, lsr #24
-    2f68:	e1a04c22 	mov	r4, r2, lsr #24
-    2f6c:	e1a03422 	mov	r3, r2, lsr #8
-    2f70:	e1a00822 	mov	r0, r2, lsr #16
-    2f74:	e1a0c421 	mov	ip, r1, lsr #8
-    2f78:	e1a0e821 	mov	lr, r1, lsr #16
-    2f7c:	e5c63009 	strb	r3, [r6, #9]
-    2f80:	e5c6000a 	strb	r0, [r6, #10]
-    2f84:	e5c6400b 	strb	r4, [r6, #11]
-    2f88:	e5c6c015 	strb	ip, [r6, #21]
-    2f8c:	e5c6e016 	strb	lr, [r6, #22]
-    2f90:	e5c65017 	strb	r5, [r6, #23]
-    2f94:	e5c62008 	strb	r2, [r6, #8]
-    2f98:	e5c61014 	strb	r1, [r6, #20]
-    2f9c:	e59fbbc4 	ldr	fp, [pc, #3012]	; 3b68 <.text+0x3b68>
-    2fa0:	e59b0014 	ldr	r0, [fp, #20]
-    2fa4:	eb00040e 	bl	3fe4 <LLToSIAngleRoll>
-    2fa8:	e1a03000 	mov	r3, r0
-    2fac:	e1a0cc20 	mov	ip, r0, lsr #24
-    2fb0:	e1a02420 	mov	r2, r0, lsr #8
-    2fb4:	e1a01820 	mov	r1, r0, lsr #16
-    2fb8:	e59b0010 	ldr	r0, [fp, #16]
-    2fbc:	e5c62019 	strb	r2, [r6, #25]
-    2fc0:	e5c6101a 	strb	r1, [r6, #26]
-    2fc4:	e5c6c01b 	strb	ip, [r6, #27]
-    2fc8:	e5c63018 	strb	r3, [r6, #24]
-    2fcc:	eb000474 	bl	41a4 <LLToSIAnglePitch>
-    2fd0:	e1a03000 	mov	r3, r0
-    2fd4:	e1a02c20 	mov	r2, r0, lsr #24
-    2fd8:	e1a01420 	mov	r1, r0, lsr #8
-    2fdc:	e1a00820 	mov	r0, r0, lsr #16
-    2fe0:	e5c6201f 	strb	r2, [r6, #31]
-    2fe4:	e5c6101d 	strb	r1, [r6, #29]
-    2fe8:	e5c6001e 	strb	r0, [r6, #30]
-    2fec:	e5c6301c 	strb	r3, [r6, #28]
-    2ff0:	eb000790 	bl	4e38 <processCtrl>
-    2ff4:	e59f3b70 	ldr	r3, [pc, #2928]	; 3b6c <.text+0x3b6c>
-    2ff8:	e1d325ba 	ldrh	r2, [r3, #90]
-    2ffc:	e3120001 	tst	r2, #1	; 0x1
-    3000:	059f2b68 	ldreq	r2, [pc, #2920]	; 3b70 <.text+0x3b70>
-    3004:	159f2b64 	ldrne	r2, [pc, #2916]	; 3b70 <.text+0x3b70>
-    3008:	01d230b0 	ldreqh	r3, [r2]
-    300c:	11d230b0 	ldrneh	r3, [r2]
-    3010:	02433001 	subeq	r3, r3, #1	; 0x1
-    3014:	12833001 	addne	r3, r3, #1	; 0x1
-    3018:	01c230b0 	streqh	r3, [r2]
-    301c:	11c230b0 	strneh	r3, [r2]
-    3020:	e1d230f0 	ldrsh	r3, [r2]
-    3024:	e59f1b48 	ldr	r1, [pc, #2888]	; 3b74 <.text+0x3b74>
-    3028:	e3530004 	cmp	r3, #4	; 0x4
-    302c:	e59f0b3c 	ldr	r0, [pc, #2876]	; 3b70 <.text+0x3b70>
-    3030:	c3a03005 	movgt	r3, #5	; 0x5
-    3034:	c3a04001 	movgt	r4, #1	; 0x1
-    3038:	e1d120b0 	ldrh	r2, [r1]
-    303c:	c1c030b0 	strgth	r3, [r0]
-    3040:	c1c140b0 	strgth	r4, [r1]
-    3044:	ca000003 	bgt	3058 <SDK_mainloop+0x4f0>
-    3048:	e3530000 	cmp	r3, #0	; 0x0
-    304c:	b3a05000 	movlt	r5, #0	; 0x0
-    3050:	b1c050b0 	strlth	r5, [r0]
-    3054:	b1c150b0 	strlth	r5, [r1]
-    3058:	e3520000 	cmp	r2, #0	; 0x0
-    305c:	1a000103 	bne	3470 <SDK_mainloop+0x908>
-    3060:	e1d130f0 	ldrsh	r3, [r1]
-    3064:	e3530001 	cmp	r3, #1	; 0x1
-    3068:	059f9aac 	ldreq	r9, [pc, #2732]	; 3b1c <.text+0x3b1c>
-    306c:	02833002 	addeq	r3, r3, #2	; 0x2
-    3070:	05c93000 	streqb	r3, [r9]
-    3074:	e59f4afc 	ldr	r4, [pc, #2812]	; 3b78 <.text+0x3b78>
-    3078:	e5943000 	ldr	r3, [r4]
-    307c:	e5d32008 	ldrb	r2, [r3, #8]
-    3080:	e3520000 	cmp	r2, #0	; 0x0
-    3084:	0a000013 	beq	30d8 <SDK_mainloop+0x570>
-    3088:	e59f3a98 	ldr	r3, [pc, #2712]	; 3b28 <.text+0x3b28>
-    308c:	e1d320b8 	ldrh	r2, [r3, #8]
-    3090:	e3520000 	cmp	r2, #0	; 0x0
-    3094:	0a00000c 	beq	30cc <SDK_mainloop+0x564>
-    3098:	e59f3adc 	ldr	r3, [pc, #2780]	; 3b7c <.text+0x3b7c>
-    309c:	e5d33000 	ldrb	r3, [r3]
-    30a0:	e3530003 	cmp	r3, #3	; 0x3
-    30a4:	0a0001cd 	beq	37e0 <SDK_mainloop+0xc78>
-    30a8:	e3530000 	cmp	r3, #0	; 0x0
-    30ac:	059fca68 	ldreq	ip, [pc, #2664]	; 3b1c <.text+0x3b1c>
-    30b0:	02433001 	subeq	r3, r3, #1	; 0x1
-    30b4:	05cc3000 	streqb	r3, [ip]
-    30b8:	0a000003 	beq	30cc <SDK_mainloop+0x564>
-    30bc:	e3530004 	cmp	r3, #4	; 0x4
-    30c0:	0a00032e 	beq	3d80 <.text+0x3d80>
-    30c4:	e3530005 	cmp	r3, #5	; 0x5
-    30c8:	0a000317 	beq	3d2c <.text+0x3d2c>
-    30cc:	e5942000 	ldr	r2, [r4]
-    30d0:	e3a03000 	mov	r3, #0	; 0x0
-    30d4:	e5c23008 	strb	r3, [r2, #8]
-    30d8:	e59f1a3c 	ldr	r1, [pc, #2620]	; 3b1c <.text+0x3b1c>
-    30dc:	e5d10000 	ldrb	r0, [r1]
-    30e0:	e2403001 	sub	r3, r0, #1	; 0x1
-    30e4:	e3530001 	cmp	r3, #1	; 0x1
-    30e8:	9a000156 	bls	3648 <SDK_mainloop+0xae0>
-    30ec:	e3500004 	cmp	r0, #4	; 0x4
-    30f0:	0a00018c 	beq	3728 <SDK_mainloop+0xbc0>
-    30f4:	e59f9a20 	ldr	r9, [pc, #2592]	; 3b1c <.text+0x3b1c>
-    30f8:	e5d92000 	ldrb	r2, [r9]
-    30fc:	e35200ff 	cmp	r2, #255	; 0xff
-    3100:	0a00015b 	beq	3674 <SDK_mainloop+0xb0c>
-    3104:	e2423001 	sub	r3, r2, #1	; 0x1
-    3108:	e3530001 	cmp	r3, #1	; 0x1
-    310c:	9a00025f 	bls	3a90 <SDK_mainloop+0xf28>
-    3110:	e3520000 	cmp	r2, #0	; 0x0
-    3114:	13520003 	cmpne	r2, #3	; 0x3
-    3118:	13a04000 	movne	r4, #0	; 0x0
-    311c:	03a04001 	moveq	r4, #1	; 0x1
-    3120:	0a00018a 	beq	3750 <SDK_mainloop+0xbe8>
-    3124:	e3520004 	cmp	r2, #4	; 0x4
-    3128:	0a000306 	beq	3d48 <.text+0x3d48>
-    312c:	e3520005 	cmp	r2, #5	; 0x5
-    3130:	0a0002aa 	beq	3be0 <.text+0x3be0>
-    3134:	e59f6a44 	ldr	r6, [pc, #2628]	; 3b80 <.text+0x3b80>
-    3138:	e5d61002 	ldrb	r1, [r6, #2]
-    313c:	e5d63003 	ldrb	r3, [r6, #3]
-    3140:	e5d6000e 	ldrb	r0, [r6, #14]
-    3144:	e5d6200f 	ldrb	r2, [r6, #15]
-    3148:	e1911403 	orrs	r1, r1, r3, lsl #8
-    314c:	e1804402 	orr	r4, r0, r2, lsl #8
-    3150:	0a000014 	beq	31a8 <SDK_mainloop+0x640>
-    3154:	e59fc9c4 	ldr	ip, [pc, #2500]	; 3b20 <.text+0x3b20>
-    3158:	e59c0000 	ldr	r0, [ip]
-    315c:	eb0047ed 	bl	15118 <____umodsi3_from_arm>
-    3160:	e1540000 	cmp	r4, r0
-    3164:	1a00000f 	bne	31a8 <SDK_mainloop+0x640>
-    3168:	e59f09b8 	ldr	r0, [pc, #2488]	; 3b28 <.text+0x3b28>
-    316c:	e59f1a10 	ldr	r1, [pc, #2576]	; 3b84 <.text+0x3b84>
-    3170:	e3a0c000 	mov	ip, #0	; 0x0
-    3174:	e5d03000 	ldrb	r3, [r0]
-    3178:	e5d02001 	ldrb	r2, [r0, #1]
-    317c:	e28cc001 	add	ip, ip, #1	; 0x1
-    3180:	e35c0008 	cmp	ip, #8	; 0x8
-    3184:	e5c13008 	strb	r3, [r1, #8]
-    3188:	e5c12009 	strb	r2, [r1, #9]
-    318c:	e2800002 	add	r0, r0, #2	; 0x2
-    3190:	e2811002 	add	r1, r1, #2	; 0x2
-    3194:	1afffff6 	bne	3174 <SDK_mainloop+0x60c>
-    3198:	e3a0000b 	mov	r0, #11	; 0xb
-    319c:	e59f19e0 	ldr	r1, [pc, #2528]	; 3b84 <.text+0x3b84>
-    31a0:	e3a02018 	mov	r2, #24	; 0x18
-    31a4:	eb00190c 	bl	95dc <writePacket2Ringbuffer>
-    31a8:	e5d61000 	ldrb	r1, [r6]
-    31ac:	e5d63001 	ldrb	r3, [r6, #1]
-    31b0:	e5d6000c 	ldrb	r0, [r6, #12]
-    31b4:	e5d6200d 	ldrb	r2, [r6, #13]
-    31b8:	e1911403 	orrs	r1, r1, r3, lsl #8
-    31bc:	e1804402 	orr	r4, r0, r2, lsl #8
-    31c0:	0a000004 	beq	31d8 <SDK_mainloop+0x670>
-    31c4:	e59fe954 	ldr	lr, [pc, #2388]	; 3b20 <.text+0x3b20>
-    31c8:	e59e0000 	ldr	r0, [lr]
-    31cc:	eb0047d1 	bl	15118 <____umodsi3_from_arm>
-    31d0:	e1540000 	cmp	r4, r0
-    31d4:	0a000195 	beq	3830 <SDK_mainloop+0xcc8>
-    31d8:	e5d61004 	ldrb	r1, [r6, #4]
-    31dc:	e5d63005 	ldrb	r3, [r6, #5]
-    31e0:	e5d60010 	ldrb	r0, [r6, #16]
-    31e4:	e5d62011 	ldrb	r2, [r6, #17]
-    31e8:	e1911403 	orrs	r1, r1, r3, lsl #8
-    31ec:	e1804402 	orr	r4, r0, r2, lsl #8
-    31f0:	0a000004 	beq	3208 <SDK_mainloop+0x6a0>
-    31f4:	e59f2924 	ldr	r2, [pc, #2340]	; 3b20 <.text+0x3b20>
-    31f8:	e5920000 	ldr	r0, [r2]
-    31fc:	eb0047c5 	bl	15118 <____umodsi3_from_arm>
-    3200:	e1540000 	cmp	r4, r0
-    3204:	0a000184 	beq	381c <SDK_mainloop+0xcb4>
-    3208:	e5d61006 	ldrb	r1, [r6, #6]
-    320c:	e5d63007 	ldrb	r3, [r6, #7]
-    3210:	e5d60012 	ldrb	r0, [r6, #18]
-    3214:	e5d62013 	ldrb	r2, [r6, #19]
-    3218:	e1911403 	orrs	r1, r1, r3, lsl #8
-    321c:	e1804402 	orr	r4, r0, r2, lsl #8
-    3220:	0a000004 	beq	3238 <SDK_mainloop+0x6d0>
-    3224:	e59f38f4 	ldr	r3, [pc, #2292]	; 3b20 <.text+0x3b20>
-    3228:	e5930000 	ldr	r0, [r3]
-    322c:	eb0047b9 	bl	15118 <____umodsi3_from_arm>
-    3230:	e1540000 	cmp	r4, r0
-    3234:	0a0001bf 	beq	3938 <SDK_mainloop+0xdd0>
-    3238:	e5d61008 	ldrb	r1, [r6, #8]
-    323c:	e5d63009 	ldrb	r3, [r6, #9]
-    3240:	e5d60014 	ldrb	r0, [r6, #20]
-    3244:	e5d62015 	ldrb	r2, [r6, #21]
-    3248:	e1911403 	orrs	r1, r1, r3, lsl #8
-    324c:	e1804402 	orr	r4, r0, r2, lsl #8
-    3250:	0a000004 	beq	3268 <SDK_mainloop+0x700>
-    3254:	e59f58c4 	ldr	r5, [pc, #2244]	; 3b20 <.text+0x3b20>
-    3258:	e5950000 	ldr	r0, [r5]
-    325c:	eb0047ad 	bl	15118 <____umodsi3_from_arm>
-    3260:	e1540000 	cmp	r4, r0
-    3264:	0a000157 	beq	37c8 <SDK_mainloop+0xc60>
-    3268:	e59fb918 	ldr	fp, [pc, #2328]	; 3b88 <.text+0x3b88>
-    326c:	e5d6100b 	ldrb	r1, [r6, #11]
-    3270:	e5d6300a 	ldrb	r3, [r6, #10]
-    3274:	e5d60016 	ldrb	r0, [r6, #22]
-    3278:	e5d62017 	ldrb	r2, [r6, #23]
-    327c:	e1931401 	orrs	r1, r3, r1, lsl #8
-    3280:	e1804402 	orr	r4, r0, r2, lsl #8
-    3284:	0a000004 	beq	329c <SDK_mainloop+0x734>
-    3288:	e59f9890 	ldr	r9, [pc, #2192]	; 3b20 <.text+0x3b20>
-    328c:	e5990000 	ldr	r0, [r9]
-    3290:	eb0047a0 	bl	15118 <____umodsi3_from_arm>
-    3294:	e1540000 	cmp	r4, r0
-    3298:	0a0001ab 	beq	394c <SDK_mainloop+0xde4>
-    329c:	e3a0420e 	mov	r4, #-536870912	; 0xe0000000
-    32a0:	e2844902 	add	r4, r4, #32768	; 0x8000
-    32a4:	eb001a54 	bl	9bfc <UART_send_ringbuffer>
-    32a8:	e5943008 	ldr	r3, [r4, #8]
-    32ac:	e59d0064 	ldr	r0, [sp, #100]
-    32b0:	e1500003 	cmp	r0, r3
-    32b4:	8a0000f8 	bhi	369c <SDK_mainloop+0xb34>
-    32b8:	e5943008 	ldr	r3, [r4, #8]
-    32bc:	e59d2064 	ldr	r2, [sp, #100]
-    32c0:	e0624003 	rsb	r4, r2, r3
-    32c4:	eb001567 	bl	8868 <processorClockFrequency>
-    32c8:	e59f88bc 	ldr	r8, [pc, #2236]	; 3b8c <.text+0x3b8c>
-    32cc:	e1a06000 	mov	r6, r0
-    32d0:	e1a00004 	mov	r0, r4
-    32d4:	eb0042be 	bl	13dd4 <__aeabi_i2d>
-    32d8:	e3540000 	cmp	r4, #0	; 0x0
-    32dc:	e5987000 	ldr	r7, [r8]
-    32e0:	ba0000fa 	blt	36d0 <SDK_mainloop+0xb68>
-    32e4:	e3a02101 	mov	r2, #1073741824	; 0x40000000
-    32e8:	e2822859 	add	r2, r2, #5832704	; 0x590000
-    32ec:	e3a03000 	mov	r3, #0	; 0x0
-    32f0:	eb0042f2 	bl	13ec0 <__aeabi_dmul>
-    32f4:	e1a04000 	mov	r4, r0
-    32f8:	e1a00006 	mov	r0, r6
-    32fc:	e1a05001 	mov	r5, r1
-    3300:	eb0042b3 	bl	13dd4 <__aeabi_i2d>
-    3304:	e3560000 	cmp	r6, #0	; 0x0
-    3308:	ba00011b 	blt	377c <SDK_mainloop+0xc14>
-    330c:	e1a02000 	mov	r2, r0
-    3310:	e1a03001 	mov	r3, r1
-    3314:	e1a00004 	mov	r0, r4
-    3318:	e1a01005 	mov	r1, r5
-    331c:	eb00438b 	bl	14150 <__aeabi_ddiv>
-    3320:	e3a02101 	mov	r2, #1073741824	; 0x40000000
-    3324:	e282288f 	add	r2, r2, #9371648	; 0x8f0000
-    3328:	e2822901 	add	r2, r2, #16384	; 0x4000
-    332c:	e3a03000 	mov	r3, #0	; 0x0
-    3330:	eb0042e2 	bl	13ec0 <__aeabi_dmul>
-    3334:	eb00446f 	bl	144f8 <__aeabi_d2f>
-    3338:	e1a01007 	mov	r1, r7
-    333c:	eb004498 	bl	145a4 <__addsf3>
-    3340:	e59f37d8 	ldr	r3, [pc, #2008]	; 3b20 <.text+0x3b20>
-    3344:	e59f2844 	ldr	r2, [pc, #2116]	; 3b90 <.text+0x3b90>
-    3348:	e5931000 	ldr	r1, [r3]
-    334c:	e0834192 	umull	r4, r3, r2, r1
-    3350:	e1a032a3 	mov	r3, r3, lsr #5
-    3354:	e0833103 	add	r3, r3, r3, lsl #2
-    3358:	e0833103 	add	r3, r3, r3, lsl #2
-    335c:	e1510103 	cmp	r1, r3, lsl #2
-    3360:	e5880000 	str	r0, [r8]
-    3364:	1a00000c 	bne	339c <SDK_mainloop+0x834>
-    3368:	e3a01442 	mov	r1, #1107296256	; 0x42000000
-    336c:	e2811732 	add	r1, r1, #13107200	; 0xc80000
-    3370:	eb004599 	bl	149dc <__aeabi_fdiv>
-    3374:	e3a03000 	mov	r3, #0	; 0x0
-    3378:	e1a02000 	mov	r2, r0
-    337c:	e1a0cc20 	mov	ip, r0, lsr #24
-    3380:	e1a01420 	mov	r1, r0, lsr #8
-    3384:	e1a00820 	mov	r0, r0, lsr #16
-    3388:	e5883000 	str	r3, [r8]
-    338c:	e5cb1015 	strb	r1, [fp, #21]
-    3390:	e5cb0016 	strb	r0, [fp, #22]
-    3394:	e5cbc017 	strb	ip, [fp, #23]
-    3398:	e5cb2014 	strb	r2, [fp, #20]
-    339c:	e59f37f0 	ldr	r3, [pc, #2032]	; 3b94 <.text+0x3b94>
-    33a0:	e1d300f0 	ldrsh	r0, [r3]
-    33a4:	eb00428a 	bl	13dd4 <__aeabi_i2d>
-    33a8:	e3a02101 	mov	r2, #1073741824	; 0x40000000
-    33ac:	e282288f 	add	r2, r2, #9371648	; 0x8f0000
-    33b0:	e2822901 	add	r2, r2, #16384	; 0x4000
-    33b4:	e3a03000 	mov	r3, #0	; 0x0
-    33b8:	eb004364 	bl	14150 <__aeabi_ddiv>
-    33bc:	eb00444d 	bl	144f8 <__aeabi_d2f>
-    33c0:	e59f57dc 	ldr	r5, [pc, #2012]	; 3ba4 <.text+0x3ba4>
-    33c4:	e8950018 	ldmia	r5, {r3, r4}
-    33c8:	e1a02000 	mov	r2, r0
-    33cc:	e1a0ac20 	mov	sl, r0, lsr #24
-    33d0:	e1a01c24 	mov	r1, r4, lsr #24
-    33d4:	e1a00420 	mov	r0, r0, lsr #8
-    33d8:	e1a0c822 	mov	ip, r2, lsr #16
-    33dc:	e1a0e423 	mov	lr, r3, lsr #8
-    33e0:	e1a05823 	mov	r5, r3, lsr #16
-    33e4:	e1a06c23 	mov	r6, r3, lsr #24
-    33e8:	e1a07424 	mov	r7, r4, lsr #8
-    33ec:	e1a08824 	mov	r8, r4, lsr #16
-    33f0:	e5cb1007 	strb	r1, [fp, #7]
-    33f4:	e5cb0011 	strb	r0, [fp, #17]
-    33f8:	e5cbc012 	strb	ip, [fp, #18]
-    33fc:	e5cba013 	strb	sl, [fp, #19]
-    3400:	e5cbe001 	strb	lr, [fp, #1]
-    3404:	e5cb5002 	strb	r5, [fp, #2]
-    3408:	e5cb6003 	strb	r6, [fp, #3]
-    340c:	e5cb7005 	strb	r7, [fp, #5]
-    3410:	e5cb8006 	strb	r8, [fp, #6]
-    3414:	e5cb2010 	strb	r2, [fp, #16]
-    3418:	e5cb3000 	strb	r3, [fp]
-    341c:	e5cb4004 	strb	r4, [fp, #4]
-    3420:	e28dd068 	add	sp, sp, #104	; 0x68
-    3424:	e8bd4ff0 	ldmia	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
-    3428:	e12fff1e 	bx	lr
-    342c:	e59f56f8 	ldr	r5, [pc, #1784]	; 3b2c <.text+0x3b2c>
-    3430:	e0832195 	umull	r2, r3, r5, r1
-    3434:	e1a03323 	mov	r3, r3, lsr #6
-    3438:	e0632283 	rsb	r2, r3, r3, lsl #5
-    343c:	e0833102 	add	r3, r3, r2, lsl #2
-    3440:	e1510183 	cmp	r1, r3, lsl #3
-    3444:	0a00019e 	beq	3ac4 <SDK_mainloop+0xf5c>
-    3448:	e0839195 	umull	r9, r3, r5, r1
-    344c:	e1a03323 	mov	r3, r3, lsr #6
-    3450:	e0632283 	rsb	r2, r3, r3, lsl #5
-    3454:	e0833102 	add	r3, r3, r2, lsl #2
-    3458:	e0413183 	sub	r3, r1, r3, lsl #3
-    345c:	e3530032 	cmp	r3, #50	; 0x32
-    3460:	1afffde6 	bne	2c00 <SDK_mainloop+0x98>
-    3464:	e1a00004 	mov	r0, r4
-    3468:	eb001210 	bl	7cb0 <beeper>
-    346c:	eafffde3 	b	2c00 <SDK_mainloop+0x98>
-    3470:	e3520001 	cmp	r2, #1	; 0x1
-    3474:	1afffefe 	bne	3074 <SDK_mainloop+0x50c>
-    3478:	e1d120f0 	ldrsh	r2, [r1]
-    347c:	e3520000 	cmp	r2, #0	; 0x0
-    3480:	1afffefb 	bne	3074 <SDK_mainloop+0x50c>
-    3484:	e59fa690 	ldr	sl, [pc, #1680]	; 3b1c <.text+0x3b1c>
-    3488:	e5da3000 	ldrb	r3, [sl]
-    348c:	e35300ff 	cmp	r3, #255	; 0xff
-    3490:	11a0300a 	movne	r3, sl
-    3494:	15c32000 	strneb	r2, [r3]
-    3498:	eafffef5 	b	3074 <SDK_mainloop+0x50c>
-    349c:	e59f36f4 	ldr	r3, [pc, #1780]	; 3b98 <.text+0x3b98>
-    34a0:	e5d3c001 	ldrb	ip, [r3, #1]
-    34a4:	e5d30005 	ldrb	r0, [r3, #5]
-    34a8:	e5d31000 	ldrb	r1, [r3]
-    34ac:	e5d32004 	ldrb	r2, [r3, #4]
-    34b0:	e5d3e002 	ldrb	lr, [r3, #2]
-    34b4:	e5d34006 	ldrb	r4, [r3, #6]
-    34b8:	e181140c 	orr	r1, r1, ip, lsl #8
-    34bc:	e1822400 	orr	r2, r2, r0, lsl #8
-    34c0:	e5d3c007 	ldrb	ip, [r3, #7]
-    34c4:	e5d30003 	ldrb	r0, [r3, #3]
-    34c8:	e181180e 	orr	r1, r1, lr, lsl #16
-    34cc:	e1822804 	orr	r2, r2, r4, lsl #16
-    34d0:	e1811c00 	orr	r1, r1, r0, lsl #24
-    34d4:	e1822c0c 	orr	r2, r2, ip, lsl #24
-    34d8:	e1a04c21 	mov	r4, r1, lsr #24
-    34dc:	e1a05c22 	mov	r5, r2, lsr #24
-    34e0:	e1a03421 	mov	r3, r1, lsr #8
-    34e4:	e1a00821 	mov	r0, r1, lsr #16
-    34e8:	e1a0c422 	mov	ip, r2, lsr #8
-    34ec:	e1a0e822 	mov	lr, r2, lsr #16
-    34f0:	e5c63009 	strb	r3, [r6, #9]
-    34f4:	e5c6000a 	strb	r0, [r6, #10]
-    34f8:	e5c6400b 	strb	r4, [r6, #11]
-    34fc:	e5c6c015 	strb	ip, [r6, #21]
-    3500:	e5c6e016 	strb	lr, [r6, #22]
-    3504:	e5c65017 	strb	r5, [r6, #23]
-    3508:	e5c61008 	strb	r1, [r6, #8]
-    350c:	e5c62014 	strb	r2, [r6, #20]
-    3510:	eafffea1 	b	2f9c <SDK_mainloop+0x434>
-    3514:	e59f3680 	ldr	r3, [pc, #1664]	; 3b9c <.text+0x3b9c>
-    3518:	e5d3c005 	ldrb	ip, [r3, #5]
-    351c:	e5d3000d 	ldrb	r0, [r3, #13]
-    3520:	e5d31004 	ldrb	r1, [r3, #4]
-    3524:	e5d3200c 	ldrb	r2, [r3, #12]
-    3528:	e5d3e006 	ldrb	lr, [r3, #6]
-    352c:	e5d3400e 	ldrb	r4, [r3, #14]
-    3530:	e181140c 	orr	r1, r1, ip, lsl #8
-    3534:	e1822400 	orr	r2, r2, r0, lsl #8
-    3538:	e5d3c00f 	ldrb	ip, [r3, #15]
-    353c:	e5d30007 	ldrb	r0, [r3, #7]
-    3540:	e181180e 	orr	r1, r1, lr, lsl #16
-    3544:	e1822804 	orr	r2, r2, r4, lsl #16
-    3548:	e1811c00 	orr	r1, r1, r0, lsl #24
-    354c:	e1822c0c 	orr	r2, r2, ip, lsl #24
-    3550:	e1a04c21 	mov	r4, r1, lsr #24
-    3554:	e1a05c22 	mov	r5, r2, lsr #24
-    3558:	e1a03421 	mov	r3, r1, lsr #8
-    355c:	e1a00821 	mov	r0, r1, lsr #16
-    3560:	e1a0c422 	mov	ip, r2, lsr #8
-    3564:	e1a0e822 	mov	lr, r2, lsr #16
-    3568:	e5c63005 	strb	r3, [r6, #5]
-    356c:	e5c60006 	strb	r0, [r6, #6]
-    3570:	e5c64007 	strb	r4, [r6, #7]
-    3574:	e5c6c011 	strb	ip, [r6, #17]
-    3578:	e5c6e012 	strb	lr, [r6, #18]
-    357c:	e5c65013 	strb	r5, [r6, #19]
-    3580:	e5c61004 	strb	r1, [r6, #4]
-    3584:	e5c62010 	strb	r2, [r6, #16]
-    3588:	eafffe6e 	b	2f48 <SDK_mainloop+0x3e0>
-    358c:	e59f3608 	ldr	r3, [pc, #1544]	; 3b9c <.text+0x3b9c>
-    3590:	e5d3c001 	ldrb	ip, [r3, #1]
-    3594:	e5d30009 	ldrb	r0, [r3, #9]
-    3598:	e5d31000 	ldrb	r1, [r3]
-    359c:	e5d32008 	ldrb	r2, [r3, #8]
-    35a0:	e5d3e002 	ldrb	lr, [r3, #2]
-    35a4:	e5d3400a 	ldrb	r4, [r3, #10]
-    35a8:	e181140c 	orr	r1, r1, ip, lsl #8
-    35ac:	e1822400 	orr	r2, r2, r0, lsl #8
-    35b0:	e5d3c00b 	ldrb	ip, [r3, #11]
-    35b4:	e5d30003 	ldrb	r0, [r3, #3]
-    35b8:	e181180e 	orr	r1, r1, lr, lsl #16
-    35bc:	e1822804 	orr	r2, r2, r4, lsl #16
-    35c0:	e1811c00 	orr	r1, r1, r0, lsl #24
-    35c4:	e1822c0c 	orr	r2, r2, ip, lsl #24
-    35c8:	e1a04c21 	mov	r4, r1, lsr #24
-    35cc:	e1a05c22 	mov	r5, r2, lsr #24
-    35d0:	e1a03421 	mov	r3, r1, lsr #8
-    35d4:	e1a00821 	mov	r0, r1, lsr #16
-    35d8:	e1a0c422 	mov	ip, r2, lsr #8
-    35dc:	e1a0e822 	mov	lr, r2, lsr #16
-    35e0:	e5c63001 	strb	r3, [r6, #1]
-    35e4:	e5c60002 	strb	r0, [r6, #2]
-    35e8:	e5c64003 	strb	r4, [r6, #3]
-    35ec:	e5c6c00d 	strb	ip, [r6, #13]
-    35f0:	e5c6e00e 	strb	lr, [r6, #14]
-    35f4:	e5c6500f 	strb	r5, [r6, #15]
-    35f8:	e5c61000 	strb	r1, [r6]
-    35fc:	e5c6200c 	strb	r2, [r6, #12]
-    3600:	eafffe3b 	b	2ef4 <SDK_mainloop+0x38c>
-    3604:	e59f2590 	ldr	r2, [pc, #1424]	; 3b9c <.text+0x3b9c>
-    3608:	e5d21011 	ldrb	r1, [r2, #17]
-    360c:	e5d23010 	ldrb	r3, [r2, #16]
-    3610:	e5d2c012 	ldrb	ip, [r2, #18]
-    3614:	e5d20013 	ldrb	r0, [r2, #19]
-    3618:	e1833401 	orr	r3, r3, r1, lsl #8
-    361c:	e183380c 	orr	r3, r3, ip, lsl #16
-    3620:	e1833c00 	orr	r3, r3, r0, lsl #24
-    3624:	e59f6538 	ldr	r6, [pc, #1336]	; 3b64 <.text+0x3b64>
-    3628:	e1a00c23 	mov	r0, r3, lsr #24
-    362c:	e1a02423 	mov	r2, r3, lsr #8
-    3630:	e1a01823 	mov	r1, r3, lsr #16
-    3634:	e5c62021 	strb	r2, [r6, #33]
-    3638:	e5c61022 	strb	r1, [r6, #34]
-    363c:	e5c60023 	strb	r0, [r6, #35]
-    3640:	e5c63020 	strb	r3, [r6, #32]
-    3644:	eafffe15 	b	2ea0 <SDK_mainloop+0x338>
-    3648:	e59f3558 	ldr	r3, [pc, #1368]	; 3ba8 <.text+0x3ba8>
-    364c:	e8930006 	ldmia	r3, {r1, r2}
-    3650:	e59f354c 	ldr	r3, [pc, #1356]	; 3ba4 <.text+0x3ba4>
-    3654:	e8930030 	ldmia	r3, {r4, r5}
-    3658:	e0544001 	subs	r4, r4, r1
-    365c:	e0c55002 	sbc	r5, r5, r2
-    3660:	e3550000 	cmp	r5, #0	; 0x0
-    3664:	da000125 	ble	3b00 <SDK_mainloop+0xf98>
-    3668:	e59f44ac 	ldr	r4, [pc, #1196]	; 3b1c <.text+0x3b1c>
-    366c:	e3e03000 	mvn	r3, #0	; 0x0
-    3670:	e5c43000 	strb	r3, [r4]
-    3674:	e59f2540 	ldr	r2, [pc, #1344]	; 3bbc <.text+0x3bbc>
-    3678:	e59fa4a4 	ldr	sl, [pc, #1188]	; 3b24 <.text+0x3b24>
-    367c:	e3a03000 	mov	r3, #0	; 0x0
-    3680:	e5ca3001 	strb	r3, [sl, #1]
-    3684:	e1c230b8 	strh	r3, [r2, #8]
-    3688:	e1c230b0 	strh	r3, [r2]
-    368c:	e1c230b2 	strh	r3, [r2, #2]
-    3690:	e1c230b6 	strh	r3, [r2, #6]
-    3694:	e1c230b4 	strh	r3, [r2, #4]
-    3698:	eafffea5 	b	3134 <SDK_mainloop+0x5cc>
-    369c:	eb001471 	bl	8868 <processorClockFrequency>
-    36a0:	e59d1064 	ldr	r1, [sp, #100]
-    36a4:	e5943008 	ldr	r3, [r4, #8]
-    36a8:	e0610000 	rsb	r0, r1, r0
-    36ac:	e0804003 	add	r4, r0, r3
-    36b0:	eb00146c 	bl	8868 <processorClockFrequency>
-    36b4:	e59f84d0 	ldr	r8, [pc, #1232]	; 3b8c <.text+0x3b8c>
-    36b8:	e1a06000 	mov	r6, r0
-    36bc:	e1a00004 	mov	r0, r4
-    36c0:	eb0041c3 	bl	13dd4 <__aeabi_i2d>
-    36c4:	e3540000 	cmp	r4, #0	; 0x0
-    36c8:	e5987000 	ldr	r7, [r8]
-    36cc:	aaffff04 	bge	32e4 <SDK_mainloop+0x77c>
-    36d0:	e3a02441 	mov	r2, #1090519040	; 0x41000000
-    36d4:	e282260f 	add	r2, r2, #15728640	; 0xf00000
-    36d8:	e3a03000 	mov	r3, #0	; 0x0
-    36dc:	eb0040ee 	bl	13a9c <__adddf3>
-    36e0:	eafffeff 	b	32e4 <SDK_mainloop+0x77c>
-    36e4:	e59f44a4 	ldr	r4, [pc, #1188]	; 3b90 <.text+0x3b90>
-    36e8:	e0835194 	umull	r5, r3, r4, r1
-    36ec:	e1a032a3 	mov	r3, r3, lsr #5
-    36f0:	e0833103 	add	r3, r3, r3, lsl #2
-    36f4:	e0833103 	add	r3, r3, r3, lsl #2
-    36f8:	e1510103 	cmp	r1, r3, lsl #2
-    36fc:	0a0000fa 	beq	3aec <SDK_mainloop+0xf84>
-    3700:	e083a194 	umull	sl, r3, r4, r1
-    3704:	e1a032a3 	mov	r3, r3, lsr #5
-    3708:	e0833103 	add	r3, r3, r3, lsl #2
-    370c:	e0833103 	add	r3, r3, r3, lsl #2
-    3710:	e0413103 	sub	r3, r1, r3, lsl #2
-    3714:	e3530032 	cmp	r3, #50	; 0x32
-    3718:	1afffd38 	bne	2c00 <SDK_mainloop+0x98>
-    371c:	e3a00000 	mov	r0, #0	; 0x0
-    3720:	eb001162 	bl	7cb0 <beeper>
-    3724:	eafffd35 	b	2c00 <SDK_mainloop+0x98>
-    3728:	e59f5484 	ldr	r5, [pc, #1156]	; 3bb4 <.text+0x3bb4>
-    372c:	e595400c 	ldr	r4, [r5, #12]
-    3730:	e3a01000 	mov	r1, #0	; 0x0
-    3734:	e1a00004 	mov	r0, r4
-    3738:	eb0044ff 	bl	14b3c <__gesf2>
-    373c:	e3500000 	cmp	r0, #0	; 0x0
-    3740:	ca000012 	bgt	3790 <SDK_mainloop+0xc28>
-    3744:	e59f53d0 	ldr	r5, [pc, #976]	; 3b1c <.text+0x3b1c>
-    3748:	e3a03003 	mov	r3, #3	; 0x3
-    374c:	e5c53000 	strb	r3, [r5]
-    3750:	e59f3464 	ldr	r3, [pc, #1124]	; 3bbc <.text+0x3bbc>
-    3754:	e59f13c8 	ldr	r1, [pc, #968]	; 3b24 <.text+0x3b24>
-    3758:	e3a02001 	mov	r2, #1	; 0x1
-    375c:	e5c12001 	strb	r2, [r1, #1]
-    3760:	e1c320b8 	strh	r2, [r3, #8]
-    3764:	e3a02000 	mov	r2, #0	; 0x0
-    3768:	e1c320b0 	strh	r2, [r3]
-    376c:	e1c320b2 	strh	r2, [r3, #2]
-    3770:	e1c320b6 	strh	r2, [r3, #6]
-    3774:	e1c320b4 	strh	r2, [r3, #4]
-    3778:	eafffe6d 	b	3134 <SDK_mainloop+0x5cc>
-    377c:	e3a02441 	mov	r2, #1090519040	; 0x41000000
-    3780:	e282260f 	add	r2, r2, #15728640	; 0xf00000
-    3784:	e3a03000 	mov	r3, #0	; 0x0
-    3788:	eb0040c3 	bl	13a9c <__adddf3>
-    378c:	eafffede 	b	330c <SDK_mainloop+0x7a4>
-    3790:	e1a00004 	mov	r0, r4
-    3794:	eb004199 	bl	13e00 <__aeabi_f2d>
-    3798:	e28f2e39 	add	r2, pc, #912	; 0x390
-    379c:	e892000c 	ldmia	r2, {r2, r3}
-    37a0:	eb0040bc 	bl	13a98 <__aeabi_dsub>
-    37a4:	eb004353 	bl	144f8 <__aeabi_d2f>
-    37a8:	e1a03000 	mov	r3, r0
-    37ac:	e585300c 	str	r3, [r5, #12]
-    37b0:	e3a01000 	mov	r1, #0	; 0x0
-    37b4:	eb0044e2 	bl	14b44 <__lesf2>
-    37b8:	e3500000 	cmp	r0, #0	; 0x0
-    37bc:	b3a03000 	movlt	r3, #0	; 0x0
-    37c0:	b585300c 	strlt	r3, [r5, #12]
-    37c4:	eafffe4a 	b	30f4 <SDK_mainloop+0x58c>
-    37c8:	e59fb3b8 	ldr	fp, [pc, #952]	; 3b88 <.text+0x3b88>
-    37cc:	e3a02018 	mov	r2, #24	; 0x18
-    37d0:	e1a0100b 	mov	r1, fp
-    37d4:	e3a0000d 	mov	r0, #13	; 0xd
-    37d8:	eb00177f 	bl	95dc <writePacket2Ringbuffer>
-    37dc:	eafffea2 	b	326c <SDK_mainloop+0x704>
-    37e0:	e59fc334 	ldr	ip, [pc, #820]	; 3b1c <.text+0x3b1c>
-    37e4:	e5dc3000 	ldrb	r3, [ip]
-    37e8:	e3530000 	cmp	r3, #0	; 0x0
-    37ec:	0a0000f4 	beq	3bc4 <.text+0x3bc4>
-    37f0:	e3530003 	cmp	r3, #3	; 0x3
-    37f4:	1afffe34 	bne	30cc <SDK_mainloop+0x564>
-    37f8:	e59fa3a4 	ldr	sl, [pc, #932]	; 3ba4 <.text+0x3ba4>
-    37fc:	e59f23a4 	ldr	r2, [pc, #932]	; 3ba8 <.text+0x3ba8>
-    3800:	e89a0600 	ldmia	sl, {r9, sl}
-    3804:	e2433001 	sub	r3, r3, #1	; 0x1
-    3808:	e5cc3000 	strb	r3, [ip]
-    380c:	e8820600 	stmia	r2, {r9, sl}
-    3810:	eafffe2d 	b	30cc <SDK_mainloop+0x564>
-    3814:	eb0008f5 	bl	5bf0 <resetKalmanFilter>
-    3818:	eafffd91 	b	2e64 <SDK_mainloop+0x2fc>
-    381c:	e59f12f8 	ldr	r1, [pc, #760]	; 3b1c <.text+0x3b1c>
-    3820:	e3a02001 	mov	r2, #1	; 0x1
-    3824:	e3a00009 	mov	r0, #9	; 0x9
-    3828:	eb00176b 	bl	95dc <writePacket2Ringbuffer>
-    382c:	eafffe75 	b	3208 <SDK_mainloop+0x6a0>
-    3830:	e59b0014 	ldr	r0, [fp, #20]
-    3834:	eb0001ea 	bl	3fe4 <LLToSIAngleRoll>
-    3838:	e59f4360 	ldr	r4, [pc, #864]	; 3ba0 <.text+0x3ba0>
-    383c:	e1a03000 	mov	r3, r0
-    3840:	e1a0cc20 	mov	ip, r0, lsr #24
-    3844:	e1a02420 	mov	r2, r0, lsr #8
-    3848:	e1a01820 	mov	r1, r0, lsr #16
-    384c:	e59b0010 	ldr	r0, [fp, #16]
-    3850:	e5c42001 	strb	r2, [r4, #1]
-    3854:	e5c41002 	strb	r1, [r4, #2]
-    3858:	e5c4c003 	strb	ip, [r4, #3]
-    385c:	e5c43000 	strb	r3, [r4]
-    3860:	eb00024f 	bl	41a4 <LLToSIAnglePitch>
-    3864:	e1a03000 	mov	r3, r0
-    3868:	e1a0cc20 	mov	ip, r0, lsr #24
-    386c:	e1a02420 	mov	r2, r0, lsr #8
-    3870:	e1a01820 	mov	r1, r0, lsr #16
-    3874:	e59b0018 	ldr	r0, [fp, #24]
-    3878:	e5c42005 	strb	r2, [r4, #5]
-    387c:	e5c41006 	strb	r1, [r4, #6]
-    3880:	e5c4c007 	strb	ip, [r4, #7]
-    3884:	e5c43004 	strb	r3, [r4, #4]
-    3888:	eb00022f 	bl	414c <LLToSIAngleYaw>
-    388c:	e1a03000 	mov	r3, r0
-    3890:	e1a0cc20 	mov	ip, r0, lsr #24
-    3894:	e1a02420 	mov	r2, r0, lsr #8
-    3898:	e1a01820 	mov	r1, r0, lsr #16
-    389c:	e59b0020 	ldr	r0, [fp, #32]
-    38a0:	e5c42009 	strb	r2, [r4, #9]
-    38a4:	e5c4100a 	strb	r1, [r4, #10]
-    38a8:	e5c4c00b 	strb	ip, [r4, #11]
-    38ac:	e5c43008 	strb	r3, [r4, #8]
-    38b0:	eb00020e 	bl	40f0 <LLToSIAngleRateRoll>
-    38b4:	e1a03000 	mov	r3, r0
-    38b8:	e1a0cc20 	mov	ip, r0, lsr #24
-    38bc:	e1a02420 	mov	r2, r0, lsr #8
-    38c0:	e1a01820 	mov	r1, r0, lsr #16
-    38c4:	e59b001c 	ldr	r0, [fp, #28]
-    38c8:	e5c4200d 	strb	r2, [r4, #13]
-    38cc:	e5c4100e 	strb	r1, [r4, #14]
-    38d0:	e5c4c00f 	strb	ip, [r4, #15]
-    38d4:	e5c4300c 	strb	r3, [r4, #12]
-    38d8:	eb0001ec 	bl	4090 <LLToSIAngleRatePitch>
-    38dc:	e1a03000 	mov	r3, r0
-    38e0:	e1a0cc20 	mov	ip, r0, lsr #24
-    38e4:	e1a02423 	mov	r2, r3, lsr #8
-    38e8:	e1a01823 	mov	r1, r3, lsr #16
-    38ec:	e59b0024 	ldr	r0, [fp, #36]
-    38f0:	e5c42011 	strb	r2, [r4, #17]
-    38f4:	e5c41012 	strb	r1, [r4, #18]
-    38f8:	e5c4c013 	strb	ip, [r4, #19]
-    38fc:	e5c43010 	strb	r3, [r4, #16]
-    3900:	eb0001ca 	bl	4030 <LLToSIAngleRateYaw>
-    3904:	e1a03000 	mov	r3, r0
-    3908:	e1a05c20 	mov	r5, r0, lsr #24
-    390c:	e1a0c420 	mov	ip, r0, lsr #8
-    3910:	e1a0e820 	mov	lr, r0, lsr #16
-    3914:	e1a01004 	mov	r1, r4
-    3918:	e3a02024 	mov	r2, #36	; 0x24
-    391c:	e5c4c015 	strb	ip, [r4, #21]
-    3920:	e5c4e016 	strb	lr, [r4, #22]
-    3924:	e5c45017 	strb	r5, [r4, #23]
-    3928:	e5c43014 	strb	r3, [r4, #20]
-    392c:	e3a0000a 	mov	r0, #10	; 0xa
-    3930:	eb001729 	bl	95dc <writePacket2Ringbuffer>
-    3934:	eafffe27 	b	31d8 <SDK_mainloop+0x670>
-    3938:	e59f1224 	ldr	r1, [pc, #548]	; 3b64 <.text+0x3b64>
-    393c:	e3a02024 	mov	r2, #36	; 0x24
-    3940:	e3a00007 	mov	r0, #7	; 0x7
-    3944:	eb001724 	bl	95dc <writePacket2Ringbuffer>
-    3948:	eafffe3a 	b	3238 <SDK_mainloop+0x6d0>
-    394c:	e59f525c 	ldr	r5, [pc, #604]	; 3bb0 <.text+0x3bb0>
-    3950:	e59f3264 	ldr	r3, [pc, #612]	; 3bbc <.text+0x3bbc>
-    3954:	e5d52005 	ldrb	r2, [r5, #5]
-    3958:	e5d50004 	ldrb	r0, [r5, #4]
-    395c:	e5d51006 	ldrb	r1, [r5, #6]
-    3960:	e5d3c007 	ldrb	ip, [r3, #7]
-    3964:	e1800402 	orr	r0, r0, r2, lsl #8
-    3968:	e59f423c 	ldr	r4, [pc, #572]	; 3bac <.text+0x3bac>
-    396c:	e5d5a007 	ldrb	sl, [r5, #7]
-    3970:	e5d32002 	ldrb	r2, [r3, #2]
-    3974:	e58dc000 	str	ip, [sp]
-    3978:	e5d3e001 	ldrb	lr, [r3, #1]
-    397c:	e5d3c000 	ldrb	ip, [r3]
-    3980:	e5d36004 	ldrb	r6, [r3, #4]
-    3984:	e5d37005 	ldrb	r7, [r3, #5]
-    3988:	e5d38006 	ldrb	r8, [r3, #6]
-    398c:	e1800801 	orr	r0, r0, r1, lsl #16
-    3990:	e5d31003 	ldrb	r1, [r3, #3]
-    3994:	e5c42000 	strb	r2, [r4]
-    3998:	e5c41001 	strb	r1, [r4, #1]
-    399c:	e5c4c002 	strb	ip, [r4, #2]
-    39a0:	e5c46004 	strb	r6, [r4, #4]
-    39a4:	e5c47005 	strb	r7, [r4, #5]
-    39a8:	e5c4e003 	strb	lr, [r4, #3]
-    39ac:	e5c48006 	strb	r8, [r4, #6]
-    39b0:	e59de000 	ldr	lr, [sp]
-    39b4:	e1800c0a 	orr	r0, r0, sl, lsl #24
-    39b8:	e5c4e007 	strb	lr, [r4, #7]
-    39bc:	eb000156 	bl	3f1c <SIToLLCmdRoll>
-    39c0:	e5d51009 	ldrb	r1, [r5, #9]
-    39c4:	e5d52008 	ldrb	r2, [r5, #8]
-    39c8:	e5d5c00a 	ldrb	ip, [r5, #10]
-    39cc:	e1a03800 	mov	r3, r0, lsl #16
-    39d0:	e1822401 	orr	r2, r2, r1, lsl #8
-    39d4:	e5d5000b 	ldrb	r0, [r5, #11]
-    39d8:	e2633000 	rsb	r3, r3, #0	; 0x0
-    39dc:	e182280c 	orr	r2, r2, ip, lsl #16
-    39e0:	e1a01c23 	mov	r1, r3, lsr #24
-    39e4:	e1a03823 	mov	r3, r3, lsr #16
-    39e8:	e5c43018 	strb	r3, [r4, #24]
-    39ec:	e5c41019 	strb	r1, [r4, #25]
-    39f0:	e1820c00 	orr	r0, r2, r0, lsl #24
-    39f4:	eb000154 	bl	3f4c <SIToLLCmdPitch>
-    39f8:	e5d5200d 	ldrb	r2, [r5, #13]
-    39fc:	e5d5300c 	ldrb	r3, [r5, #12]
-    3a00:	e5d5100e 	ldrb	r1, [r5, #14]
-    3a04:	e5d5c00f 	ldrb	ip, [r5, #15]
-    3a08:	e1833402 	orr	r3, r3, r2, lsl #8
-    3a0c:	e1833801 	orr	r3, r3, r1, lsl #16
-    3a10:	e1a02420 	mov	r2, r0, lsr #8
-    3a14:	e5c4001a 	strb	r0, [r4, #26]
-    3a18:	e5c4201b 	strb	r2, [r4, #27]
-    3a1c:	e1830c0c 	orr	r0, r3, ip, lsl #24
-    3a20:	eb000156 	bl	3f80 <SIToLLCmdYawRate>
-    3a24:	e5d52011 	ldrb	r2, [r5, #17]
-    3a28:	e5d53010 	ldrb	r3, [r5, #16]
-    3a2c:	e5d51012 	ldrb	r1, [r5, #18]
-    3a30:	e5d5c013 	ldrb	ip, [r5, #19]
-    3a34:	e1833402 	orr	r3, r3, r2, lsl #8
-    3a38:	e1833801 	orr	r3, r3, r1, lsl #16
-    3a3c:	e1a02420 	mov	r2, r0, lsr #8
-    3a40:	e5c4001c 	strb	r0, [r4, #28]
-    3a44:	e5c4201d 	strb	r2, [r4, #29]
-    3a48:	e1830c0c 	orr	r0, r3, ip, lsl #24
-    3a4c:	eb000158 	bl	3fb4 <SIToLLCmdThrust>
-    3a50:	e5d57003 	ldrb	r7, [r5, #3]
-    3a54:	e5d5c000 	ldrb	ip, [r5]
-    3a58:	e5d5e001 	ldrb	lr, [r5, #1]
-    3a5c:	e5d56002 	ldrb	r6, [r5, #2]
-    3a60:	e1a03420 	mov	r3, r0, lsr #8
-    3a64:	e5c4001e 	strb	r0, [r4, #30]
-    3a68:	e1a01004 	mov	r1, r4
-    3a6c:	e3a02072 	mov	r2, #114	; 0x72
-    3a70:	e5c4301f 	strb	r3, [r4, #31]
-    3a74:	e5c4c04a 	strb	ip, [r4, #74]
-    3a78:	e5c4e04b 	strb	lr, [r4, #75]
-    3a7c:	e5c4604c 	strb	r6, [r4, #76]
-    3a80:	e5c4704d 	strb	r7, [r4, #77]
-    3a84:	e3a00012 	mov	r0, #18	; 0x12
-    3a88:	eb0016d3 	bl	95dc <writePacket2Ringbuffer>
-    3a8c:	eafffe02 	b	329c <SDK_mainloop+0x734>
-    3a90:	e59f3124 	ldr	r3, [pc, #292]	; 3bbc <.text+0x3bbc>
-    3a94:	e59fc088 	ldr	ip, [pc, #136]	; 3b24 <.text+0x3b24>
-    3a98:	e3a00000 	mov	r0, #0	; 0x0
-    3a9c:	e3a02001 	mov	r2, #1	; 0x1
-    3aa0:	e3e01b3e 	mvn	r1, #63488	; 0xf800
-    3aa4:	e3a0e00c 	mov	lr, #12	; 0xc
-    3aa8:	e5cc2001 	strb	r2, [ip, #1]
-    3aac:	e1c310b4 	strh	r1, [r3, #4]
-    3ab0:	e1c3e0b8 	strh	lr, [r3, #8]
-    3ab4:	e1c300b0 	strh	r0, [r3]
-    3ab8:	e1c300b2 	strh	r0, [r3, #2]
-    3abc:	e1c300b6 	strh	r0, [r3, #6]
-    3ac0:	eafffd9b 	b	3134 <SDK_mainloop+0x5cc>
-    3ac4:	e3a00001 	mov	r0, #1	; 0x1
-    3ac8:	eb001078 	bl	7cb0 <beeper>
-    3acc:	e59f304c 	ldr	r3, [pc, #76]	; 3b20 <.text+0x3b20>
-    3ad0:	e5931000 	ldr	r1, [r3]
-    3ad4:	eafffe5b 	b	3448 <SDK_mainloop+0x8e0>
-    3ad8:	e3a00001 	mov	r0, #1	; 0x1
-    3adc:	eb001073 	bl	7cb0 <beeper>
-    3ae0:	e59fe038 	ldr	lr, [pc, #56]	; 3b20 <.text+0x3b20>
-    3ae4:	e59e1000 	ldr	r1, [lr]
-    3ae8:	eafffc3c 	b	2be0 <SDK_mainloop+0x78>
-    3aec:	e3a00001 	mov	r0, #1	; 0x1
-    3af0:	eb00106e 	bl	7cb0 <beeper>
-    3af4:	e59f9024 	ldr	r9, [pc, #36]	; 3b20 <.text+0x3b20>
-    3af8:	e5991000 	ldr	r1, [r9]
-    3afc:	eafffeff 	b	3700 <SDK_mainloop+0xb98>
-    3b00:	1afffd79 	bne	30ec <SDK_mainloop+0x584>
-    3b04:	e3a0397a 	mov	r3, #1998848	; 0x1e8000
-    3b08:	e2833e47 	add	r3, r3, #1136	; 0x470
-    3b0c:	e283300f 	add	r3, r3, #15	; 0xf
-    3b10:	e1540003 	cmp	r4, r3
-    3b14:	9afffd74 	bls	30ec <SDK_mainloop+0x584>
-    3b18:	eafffed2 	b	3668 <SDK_mainloop+0xb00>
-    3b1c:	40001108 	andmi	r1, r0, r8, lsl #2
-    3b20:	4000113c 	andmi	r1, r0, ip, lsr r1
-    3b24:	40001104 	andmi	r1, r0, r4, lsl #2
-    3b28:	4000116c 	andmi	r1, r0, ip, ror #2
-    3b2c:	10624dd3 	ldrned	r4, [r2], #-211
-    3b30:	3f847ae1 	svccc	0x00847ae1
-    3b34:	47ae147b 	undefined
-    3b38:	40001184 	andmi	r1, r0, r4, lsl #3
-    3b3c:	400010b1 	strmih	r1, [r0], -r1
-    3b40:	40000ddc 	ldrmid	r0, [r0], -ip
-    3b44:	40001109 	andmi	r1, r0, r9, lsl #2
-    3b48:	400012c4 	andmi	r1, r0, r4, asr #5
-    3b4c:	400012c5 	andmi	r1, r0, r5, asr #5
-    3b50:	40000fbc 	strmih	r0, [r0], -ip
-    3b54:	40000c18 	andmi	r0, r0, r8, lsl ip
-    3b58:	40000ea0 	andmi	r0, r0, r0, lsr #29
-    3b5c:	40000be0 	andmi	r0, r0, r0, ror #23
-    3b60:	40000d18 	andmi	r0, r0, r8, lsl sp
-    3b64:	40001268 	andmi	r1, r0, r8, ror #4
-    3b68:	40000d50 	andmi	r0, r0, r0, asr sp
-    3b6c:	40000b44 	andmi	r0, r0, r4, asr #22
-    3b70:	40001140 	andmi	r1, r0, r0, asr #2
-    3b74:	4000108c 	andmi	r1, r0, ip, lsl #1
-    3b78:	40001180 	andmi	r1, r0, r0, lsl #3
-    3b7c:	4000128c 	andmi	r1, r0, ip, lsl #5
-    3b80:	40001070 	andmi	r1, r0, r0, ror r0
-    3b84:	40001098 	mulmi	r0, r8, r0
-    3b88:	40001152 	andmi	r1, r0, r2, asr r1
-    3b8c:	40000888 	andmi	r0, r0, r8, lsl #17
-    3b90:	51eb851f 	mvnpl	r8, pc, lsl r5
-    3b94:	40001474 	andmi	r1, r0, r4, ror r4
-    3b98:	400012bc 	strmih	r1, [r0], -ip
-    3b9c:	4000128d 	andmi	r1, r0, sp, lsl #5
-    3ba0:	40001044 	andmi	r1, r0, r4, asr #32
-    3ba4:	40000870 	andmi	r0, r0, r0, ror r8
-    3ba8:	40001134 	andmi	r1, r0, r4, lsr r1
-    3bac:	40000fcc 	andmi	r0, r0, ip, asr #31
-    3bb0:	4000110a 	andmi	r1, r0, sl, lsl #2
-    3bb4:	40001244 	andmi	r1, r0, r4, asr #4
-    3bb8:	40001104 	andmi	r1, r0, r4, lsl #2
-    3bbc:	40000fc0 	andmi	r0, r0, r0, asr #31
-    3bc0:	40001108 	andmi	r1, r0, r8, lsl #2
-    3bc4:	e51f1028 	ldr	r1, [pc, #-40]	; 3ba4 <.text+0x3ba4>
-    3bc8:	e51f2028 	ldr	r2, [pc, #-40]	; 3ba8 <.text+0x3ba8>
-    3bcc:	e8910003 	ldmia	r1, {r0, r1}
-    3bd0:	e2833001 	add	r3, r3, #1	; 0x1
-    3bd4:	e5cc3000 	strb	r3, [ip]
-    3bd8:	e8820003 	stmia	r2, {r0, r1}
-    3bdc:	eafffd3a 	b	30cc <SDK_mainloop+0x564>
-    3be0:	e51f4034 	ldr	r4, [pc, #-52]	; 3bb4 <.text+0x3bb4>
-    3be4:	e594c008 	ldr	ip, [r4, #8]
-    3be8:	e5941004 	ldr	r1, [r4, #4]
-    3bec:	e5942000 	ldr	r2, [r4]
-    3bf0:	e594500c 	ldr	r5, [r4, #12]
-    3bf4:	e1a00c2c 	mov	r0, ip, lsr #24
-    3bf8:	e51f3054 	ldr	r3, [pc, #-84]	; 3bac <.text+0x3bac>
-    3bfc:	e58d000c 	str	r0, [sp, #12]
-    3c00:	e1a0ec21 	mov	lr, r1, lsr #24
-    3c04:	e1a0942c 	mov	r9, ip, lsr #8
-    3c08:	e1a0082c 	mov	r0, ip, lsr #16
-    3c0c:	e58de018 	str	lr, [sp, #24]
-    3c10:	e58d9014 	str	r9, [sp, #20]
-    3c14:	e58d0010 	str	r0, [sp, #16]
-    3c18:	e1a0ac22 	mov	sl, r2, lsr #24
-    3c1c:	e1a06422 	mov	r6, r2, lsr #8
-    3c20:	e1a07822 	mov	r7, r2, lsr #16
-    3c24:	e1a0ec25 	mov	lr, r5, lsr #24
-    3c28:	e1a09425 	mov	r9, r5, lsr #8
-    3c2c:	e1a00825 	mov	r0, r5, lsr #16
-    3c30:	e58da01c 	str	sl, [sp, #28]
-    3c34:	e98d0201 	stmib	sp, {r0, r9}
-    3c38:	e5c3e017 	strb	lr, [r3, #23]
-    3c3c:	e5c36009 	strb	r6, [r3, #9]
-    3c40:	e5c3700a 	strb	r7, [r3, #10]
-    3c44:	e59d901c 	ldr	r9, [sp, #28]
-    3c48:	e1a0a821 	mov	sl, r1, lsr #16
-    3c4c:	e1a08421 	mov	r8, r1, lsr #8
-    3c50:	e5c3900b 	strb	r9, [r3, #11]
-    3c54:	e5c3800d 	strb	r8, [r3, #13]
-    3c58:	e5c3a00e 	strb	sl, [r3, #14]
-    3c5c:	e59da018 	ldr	sl, [sp, #24]
-    3c60:	e5c3a00f 	strb	sl, [r3, #15]
-    3c64:	e59de014 	ldr	lr, [sp, #20]
-    3c68:	e5c3e011 	strb	lr, [r3, #17]
-    3c6c:	e59d9010 	ldr	r9, [sp, #16]
-    3c70:	e5c39012 	strb	r9, [r3, #18]
-    3c74:	e59da00c 	ldr	sl, [sp, #12]
-    3c78:	e5c3a013 	strb	sl, [r3, #19]
-    3c7c:	e59de008 	ldr	lr, [sp, #8]
-    3c80:	e5c3e015 	strb	lr, [r3, #21]
-    3c84:	e59d9004 	ldr	r9, [sp, #4]
-    3c88:	e1a00002 	mov	r0, r2
-    3c8c:	e5c3100c 	strb	r1, [r3, #12]
-    3c90:	e5c32008 	strb	r2, [r3, #8]
-    3c94:	e5c3c010 	strb	ip, [r3, #16]
-    3c98:	e5c39016 	strb	r9, [r3, #22]
-    3c9c:	e5c35014 	strb	r5, [r3, #20]
-    3ca0:	eb00009d 	bl	3f1c <SIToLLCmdRoll>
-    3ca4:	e51f50f0 	ldr	r5, [pc, #-240]	; 3bbc <.text+0x3bbc>
-    3ca8:	e1c500b2 	strh	r0, [r5, #2]
-    3cac:	e5940004 	ldr	r0, [r4, #4]
-    3cb0:	eb0000a5 	bl	3f4c <SIToLLCmdPitch>
-    3cb4:	e1c500b0 	strh	r0, [r5]
-    3cb8:	e5940008 	ldr	r0, [r4, #8]
-    3cbc:	eb0000af 	bl	3f80 <SIToLLCmdYawRate>
-    3cc0:	e1c500b4 	strh	r0, [r5, #4]
-    3cc4:	e594000c 	ldr	r0, [r4, #12]
-    3cc8:	eb0000b9 	bl	3fb4 <SIToLLCmdThrust>
-    3ccc:	e51fc124 	ldr	ip, [pc, #-292]	; 3bb0 <.text+0x3bb0>
-    3cd0:	e5dc3000 	ldrb	r3, [ip]
-    3cd4:	e5dc2001 	ldrb	r2, [ip, #1]
-    3cd8:	e3530000 	cmp	r3, #0	; 0x0
-    3cdc:	13a01002 	movne	r1, #2	; 0x2
-    3ce0:	03a01000 	moveq	r1, #0	; 0x0
-    3ce4:	e3520000 	cmp	r2, #0	; 0x0
-    3ce8:	e1a0e00c 	mov	lr, ip
-    3cec:	e1c500b6 	strh	r0, [r5, #6]
-    3cf0:	0a000002 	beq	3d00 <.text+0x3d00>
-    3cf4:	e3510000 	cmp	r1, #0	; 0x0
-    3cf8:	13a01003 	movne	r1, #3	; 0x3
-    3cfc:	03a01001 	moveq	r1, #1	; 0x1
-    3d00:	e5de3002 	ldrb	r3, [lr, #2]
-    3d04:	e3530000 	cmp	r3, #0	; 0x0
-    3d08:	e5dc3003 	ldrb	r3, [ip, #3]
-    3d0c:	13811004 	orrne	r1, r1, #4	; 0x4
-    3d10:	e51fa160 	ldr	sl, [pc, #-352]	; 3bb8 <.text+0x3bb8>
-    3d14:	e3530000 	cmp	r3, #0	; 0x0
-    3d18:	13811008 	orrne	r1, r1, #8	; 0x8
-    3d1c:	e3a03001 	mov	r3, #1	; 0x1
-    3d20:	e1c510b8 	strh	r1, [r5, #8]
-    3d24:	e5ca3001 	strb	r3, [sl, #1]
-    3d28:	eafffd01 	b	3134 <SDK_mainloop+0x5cc>
-    3d2c:	e51f0174 	ldr	r0, [pc, #-372]	; 3bc0 <.text+0x3bc0>
-    3d30:	e5d03000 	ldrb	r3, [r0]
-    3d34:	e3530005 	cmp	r3, #5	; 0x5
-    3d38:	03a02004 	moveq	r2, #4	; 0x4
-    3d3c:	01a03000 	moveq	r3, r0
-    3d40:	05c32000 	streqb	r2, [r3]
-    3d44:	eafffce0 	b	30cc <SDK_mainloop+0x564>
-    3d48:	e51f319c 	ldr	r3, [pc, #-412]	; 3bb4 <.text+0x3bb4>
-    3d4c:	e593000c 	ldr	r0, [r3, #12]
-    3d50:	eb000097 	bl	3fb4 <SIToLLCmdThrust>
-    3d54:	e51f51a4 	ldr	r5, [pc, #-420]	; 3bb8 <.text+0x3bb8>
-    3d58:	e51f21a4 	ldr	r2, [pc, #-420]	; 3bbc <.text+0x3bbc>
-    3d5c:	e3a03001 	mov	r3, #1	; 0x1
-    3d60:	e3a09008 	mov	r9, #8	; 0x8
-    3d64:	e5c53001 	strb	r3, [r5, #1]
-    3d68:	e1c200b6 	strh	r0, [r2, #6]
-    3d6c:	e1c240b4 	strh	r4, [r2, #4]
-    3d70:	e1c290b8 	strh	r9, [r2, #8]
-    3d74:	e1c240b0 	strh	r4, [r2]
-    3d78:	e1c240b2 	strh	r4, [r2, #2]
-    3d7c:	eafffcec 	b	3134 <SDK_mainloop+0x5cc>
-    3d80:	e51fe1c8 	ldr	lr, [pc, #-456]	; 3bc0 <.text+0x3bc0>
-    3d84:	e5de3000 	ldrb	r3, [lr]
-    3d88:	e3530003 	cmp	r3, #3	; 0x3
-    3d8c:	1afffcce 	bne	30cc <SDK_mainloop+0x564>
-    3d90:	e3a02005 	mov	r2, #5	; 0x5
-    3d94:	e5ce2000 	strb	r2, [lr]
-    3d98:	eb00012a 	bl	4248 <pidReset>
-    3d9c:	eafffcca 	b	30cc <SDK_mainloop+0x564>
-
-00003da0 <degreesToRadians>:
-    3da0:	e52de004 	str	lr, [sp, #-4]!
-    3da4:	eb004015 	bl	13e00 <__aeabi_f2d>
-    3da8:	e28f2024 	add	r2, pc, #36	; 0x24
-    3dac:	e892000c 	ldmia	r2, {r2, r3}
-    3db0:	eb004042 	bl	13ec0 <__aeabi_dmul>
-    3db4:	e3a02101 	mov	r2, #1073741824	; 0x40000000
-    3db8:	e2822866 	add	r2, r2, #6684672	; 0x660000
-    3dbc:	e2822902 	add	r2, r2, #32768	; 0x8000
-    3dc0:	e3a03000 	mov	r3, #0	; 0x0
-    3dc4:	eb0040e1 	bl	14150 <__aeabi_ddiv>
-    3dc8:	eb0041ca 	bl	144f8 <__aeabi_d2f>
-    3dcc:	e49de004 	ldr	lr, [sp], #4
-    3dd0:	e12fff1e 	bx	lr
-    3dd4:	400921fb 	strmid	r2, [r9], -fp
-    3dd8:	54442d18 	strplb	r2, [r4], #-3352
-
-00003ddc <radiansToDegrees>:
-    3ddc:	e52de004 	str	lr, [sp, #-4]!
-    3de0:	eb004006 	bl	13e00 <__aeabi_f2d>
-    3de4:	e3a02101 	mov	r2, #1073741824	; 0x40000000
-    3de8:	e2822866 	add	r2, r2, #6684672	; 0x660000
-    3dec:	e2822902 	add	r2, r2, #32768	; 0x8000
-    3df0:	e3a03000 	mov	r3, #0	; 0x0
-    3df4:	eb004031 	bl	13ec0 <__aeabi_dmul>
-    3df8:	e28f2010 	add	r2, pc, #16	; 0x10
-    3dfc:	e892000c 	ldmia	r2, {r2, r3}
-    3e00:	eb0040d2 	bl	14150 <__aeabi_ddiv>
-    3e04:	eb0041bb 	bl	144f8 <__aeabi_d2f>
-    3e08:	e49de004 	ldr	lr, [sp], #4
-    3e0c:	e12fff1e 	bx	lr
-    3e10:	400921fb 	strmid	r2, [r9], -fp
-    3e14:	54442d18 	strplb	r2, [r4], #-3352
-
-00003e18 <LLToSIClimb>:
-    3e18:	e1a00800 	mov	r0, r0, lsl #16
-    3e1c:	e52de004 	str	lr, [sp, #-4]!
-    3e20:	e1a00840 	mov	r0, r0, asr #16
-    3e24:	eb00424f 	bl	14768 <__aeabi_i2f>
-    3e28:	e3a01311 	mov	r1, #1140850688	; 0x44000000
-    3e2c:	e281187a 	add	r1, r1, #7995392	; 0x7a0000
-    3e30:	eb0042e9 	bl	149dc <__aeabi_fdiv>
-    3e34:	e49de004 	ldr	lr, [sp], #4
-    3e38:	e12fff1e 	bx	lr
-
-00003e3c <LLToSIAccX>:
-    3e3c:	e1a00800 	mov	r0, r0, lsl #16
-    3e40:	e52de004 	str	lr, [sp, #-4]!
-    3e44:	e1a00840 	mov	r0, r0, asr #16
-    3e48:	eb004246 	bl	14768 <__aeabi_i2f>
-    3e4c:	eb003feb 	bl	13e00 <__aeabi_f2d>
-    3e50:	e3a02101 	mov	r2, #1073741824	; 0x40000000
-    3e54:	e28228c3 	add	r2, r2, #12779520	; 0xc30000
-    3e58:	e2822b22 	add	r2, r2, #34816	; 0x8800
-    3e5c:	e3a03000 	mov	r3, #0	; 0x0
-    3e60:	eb0040ba 	bl	14150 <__aeabi_ddiv>
-    3e64:	e28f2010 	add	r2, pc, #16	; 0x10
-    3e68:	e892000c 	ldmia	r2, {r2, r3}
-    3e6c:	eb004013 	bl	13ec0 <__aeabi_dmul>
-    3e70:	eb0041a0 	bl	144f8 <__aeabi_d2f>
-    3e74:	e49de004 	ldr	lr, [sp], #4
-    3e78:	e12fff1e 	bx	lr
-    3e7c:	40239d01 	eormi	r9, r3, r1, lsl #26
-    3e80:	3a92a305 	bcc	fe4aca9c <VPBDIV+0x1e2b099c>
-
-00003e84 <LLToSIAccY>:
-    3e84:	e1a00800 	mov	r0, r0, lsl #16
-    3e88:	e52de004 	str	lr, [sp, #-4]!
-    3e8c:	e1a00840 	mov	r0, r0, asr #16
-    3e90:	eb004234 	bl	14768 <__aeabi_i2f>
-    3e94:	e2800102 	add	r0, r0, #-2147483648	; 0x80000000
-    3e98:	eb003fd8 	bl	13e00 <__aeabi_f2d>
-    3e9c:	e3a02101 	mov	r2, #1073741824	; 0x40000000
-    3ea0:	e28228c3 	add	r2, r2, #12779520	; 0xc30000
-    3ea4:	e2822b22 	add	r2, r2, #34816	; 0x8800
-    3ea8:	e3a03000 	mov	r3, #0	; 0x0
-    3eac:	eb0040a7 	bl	14150 <__aeabi_ddiv>
-    3eb0:	e28f2010 	add	r2, pc, #16	; 0x10
-    3eb4:	e892000c 	ldmia	r2, {r2, r3}
-    3eb8:	eb004000 	bl	13ec0 <__aeabi_dmul>
-    3ebc:	eb00418d 	bl	144f8 <__aeabi_d2f>
-    3ec0:	e49de004 	ldr	lr, [sp], #4
-    3ec4:	e12fff1e 	bx	lr
-    3ec8:	40239d01 	eormi	r9, r3, r1, lsl #26
-    3ecc:	3a92a305 	bcc	fe4acae8 <VPBDIV+0x1e2b09e8>
-
-00003ed0 <LLToSIAccZ>:
-    3ed0:	e1a00800 	mov	r0, r0, lsl #16
-    3ed4:	e52de004 	str	lr, [sp, #-4]!
-    3ed8:	e1a00840 	mov	r0, r0, asr #16
-    3edc:	eb004221 	bl	14768 <__aeabi_i2f>
-    3ee0:	e2800102 	add	r0, r0, #-2147483648	; 0x80000000
-    3ee4:	eb003fc5 	bl	13e00 <__aeabi_f2d>
-    3ee8:	e3a02101 	mov	r2, #1073741824	; 0x40000000
-    3eec:	e28228c3 	add	r2, r2, #12779520	; 0xc30000
-    3ef0:	e2822b22 	add	r2, r2, #34816	; 0x8800
-    3ef4:	e3a03000 	mov	r3, #0	; 0x0
-    3ef8:	eb004094 	bl	14150 <__aeabi_ddiv>
-    3efc:	e28f2010 	add	r2, pc, #16	; 0x10
-    3f00:	e892000c 	ldmia	r2, {r2, r3}
-    3f04:	eb003fed 	bl	13ec0 <__aeabi_dmul>
-    3f08:	eb00417a 	bl	144f8 <__aeabi_d2f>
-    3f0c:	e49de004 	ldr	lr, [sp], #4
-    3f10:	e12fff1e 	bx	lr
-    3f14:	40239d01 	eormi	r9, r3, r1, lsl #26
-    3f18:	3a92a305 	bcc	fe4acb34 <VPBDIV+0x1e2b0a34>
-
-00003f1c <SIToLLCmdRoll>:
-    3f1c:	e52de004 	str	lr, [sp, #-4]!
-    3f20:	eb003fb6 	bl	13e00 <__aeabi_f2d>
-    3f24:	e28f2018 	add	r2, pc, #24	; 0x18
-    3f28:	e892000c 	ldmia	r2, {r2, r3}
-    3f2c:	eb003fe3 	bl	13ec0 <__aeabi_dmul>
-    3f30:	eb004159 	bl	1449c <__aeabi_d2iz>
-    3f34:	e1a00800 	mov	r0, r0, lsl #16
-    3f38:	e1a00840 	mov	r0, r0, asr #16
-    3f3c:	e49de004 	ldr	lr, [sp], #4
-    3f40:	e12fff1e 	bx	lr
-    3f44:	40a1eb27 	adcmi	lr, r1, r7, lsr #22
-    3f48:	ef9db22d 	svc	0x009db22d
-
-00003f4c <SIToLLCmdPitch>:
-    3f4c:	e52de004 	str	lr, [sp, #-4]!
-    3f50:	eb003faa 	bl	13e00 <__aeabi_f2d>
-    3f54:	e28f201c 	add	r2, pc, #28	; 0x1c
-    3f58:	e892000c 	ldmia	r2, {r2, r3}
-    3f5c:	eb003fd7 	bl	13ec0 <__aeabi_dmul>
-    3f60:	eb00414d 	bl	1449c <__aeabi_d2iz>
-    3f64:	e2600000 	rsb	r0, r0, #0	; 0x0
-    3f68:	e1a00800 	mov	r0, r0, lsl #16
-    3f6c:	e1a00840 	mov	r0, r0, asr #16
-    3f70:	e49de004 	ldr	lr, [sp], #4
-    3f74:	e12fff1e 	bx	lr
-    3f78:	40a1eb27 	adcmi	lr, r1, r7, lsr #22
-    3f7c:	ef9db22d 	svc	0x009db22d
-
-00003f80 <SIToLLCmdYawRate>:
-    3f80:	e52de004 	str	lr, [sp, #-4]!
-    3f84:	eb003f9d 	bl	13e00 <__aeabi_f2d>
-    3f88:	e28f201c 	add	r2, pc, #28	; 0x1c
-    3f8c:	e892000c 	ldmia	r2, {r2, r3}
-    3f90:	eb003fca 	bl	13ec0 <__aeabi_dmul>
-    3f94:	eb004140 	bl	1449c <__aeabi_d2iz>
-    3f98:	e2600000 	rsb	r0, r0, #0	; 0x0
-    3f9c:	e1a00800 	mov	r0, r0, lsl #16
-    3fa0:	e1a00840 	mov	r0, r0, asr #16
-    3fa4:	e49de004 	ldr	lr, [sp], #4
-    3fa8:	e12fff1e 	bx	lr
-    3fac:	407cc5f5 	ldrmisht	ip, [ip], #-85
-    3fb0:	25460aa6 	strcsb	r0, [r6, #-2726]
-
-00003fb4 <SIToLLCmdThrust>:
-    3fb4:	e52de004 	str	lr, [sp, #-4]!
-    3fb8:	eb003f90 	bl	13e00 <__aeabi_f2d>
-    3fbc:	e28f2018 	add	r2, pc, #24	; 0x18
-    3fc0:	e892000c 	ldmia	r2, {r2, r3}
-    3fc4:	eb003fbd 	bl	13ec0 <__aeabi_dmul>
-    3fc8:	eb004133 	bl	1449c <__aeabi_d2iz>
-    3fcc:	e1a00800 	mov	r0, r0, lsl #16
-    3fd0:	e1a00840 	mov	r0, r0, asr #16
-    3fd4:	e49de004 	ldr	lr, [sp], #4
-    3fd8:	e12fff1e 	bx	lr
-    3fdc:	40447999 	umaalmi	r7, r4, r9, r9
-    3fe0:	9999999a 	ldmlsib	r9, {r1, r3, r4, r7, r8, fp, ip, pc}
-
-00003fe4 <LLToSIAngleRoll>:
-    3fe4:	e52de004 	str	lr, [sp, #-4]!
-    3fe8:	eb0041de 	bl	14768 <__aeabi_i2f>
-    3fec:	e3a01311 	mov	r1, #1140850688	; 0x44000000
-    3ff0:	e281187a 	add	r1, r1, #7995392	; 0x7a0000
-    3ff4:	eb004278 	bl	149dc <__aeabi_fdiv>
-    3ff8:	eb003f80 	bl	13e00 <__aeabi_f2d>
-    3ffc:	e28f2024 	add	r2, pc, #36	; 0x24
-    4000:	e892000c 	ldmia	r2, {r2, r3}
-    4004:	eb003fad 	bl	13ec0 <__aeabi_dmul>
-    4008:	e3a02101 	mov	r2, #1073741824	; 0x40000000
-    400c:	e2822866 	add	r2, r2, #6684672	; 0x660000
-    4010:	e2822902 	add	r2, r2, #32768	; 0x8000
-    4014:	e3a03000 	mov	r3, #0	; 0x0
-    4018:	eb00404c 	bl	14150 <__aeabi_ddiv>
-    401c:	eb004135 	bl	144f8 <__aeabi_d2f>
-    4020:	e49de004 	ldr	lr, [sp], #4
-    4024:	e12fff1e 	bx	lr
-    4028:	400921fb 	strmid	r2, [r9], -fp
-    402c:	54442d18 	strplb	r2, [r4], #-3352
-
-00004030 <LLToSIAngleRateYaw>:
-    4030:	e52de004 	str	lr, [sp, #-4]!
-    4034:	e2600000 	rsb	r0, r0, #0	; 0x0
-    4038:	eb0041ca 	bl	14768 <__aeabi_i2f>
-    403c:	eb003f6f 	bl	13e00 <__aeabi_f2d>
-    4040:	e28f2038 	add	r2, pc, #56	; 0x38
-    4044:	e892000c 	ldmia	r2, {r2, r3}
-    4048:	eb003f9c 	bl	13ec0 <__aeabi_dmul>
-    404c:	eb004129 	bl	144f8 <__aeabi_d2f>
-    4050:	eb003f6a 	bl	13e00 <__aeabi_f2d>
-    4054:	e28f202c 	add	r2, pc, #44	; 0x2c
-    4058:	e892000c 	ldmia	r2, {r2, r3}
-    405c:	eb003f97 	bl	13ec0 <__aeabi_dmul>
-    4060:	e3a02101 	mov	r2, #1073741824	; 0x40000000
-    4064:	e2822866 	add	r2, r2, #6684672	; 0x660000
-    4068:	e2822902 	add	r2, r2, #32768	; 0x8000
-    406c:	e3a03000 	mov	r3, #0	; 0x0
-    4070:	eb004036 	bl	14150 <__aeabi_ddiv>
-    4074:	eb00411f 	bl	144f8 <__aeabi_d2f>
-    4078:	e49de004 	ldr	lr, [sp], #4
-    407c:	e12fff1e 	bx	lr
-    4080:	3f8f8a09 	svccc	0x008f8a09
-    4084:	02de00d2 	sbceqs	r0, lr, #210	; 0xd2
-    4088:	400921fb 	strmid	r2, [r9], -fp
-    408c:	54442d18 	strplb	r2, [r4], #-3352
-
-00004090 <LLToSIAngleRatePitch>:
-    4090:	e52de004 	str	lr, [sp, #-4]!
-    4094:	e2600000 	rsb	r0, r0, #0	; 0x0
-    4098:	eb0041b2 	bl	14768 <__aeabi_i2f>
-    409c:	eb003f57 	bl	13e00 <__aeabi_f2d>
-    40a0:	e28f2038 	add	r2, pc, #56	; 0x38
-    40a4:	e892000c 	ldmia	r2, {r2, r3}
-    40a8:	eb003f84 	bl	13ec0 <__aeabi_dmul>
-    40ac:	eb004111 	bl	144f8 <__aeabi_d2f>
-    40b0:	eb003f52 	bl	13e00 <__aeabi_f2d>
-    40b4:	e28f202c 	add	r2, pc, #44	; 0x2c
-    40b8:	e892000c 	ldmia	r2, {r2, r3}
-    40bc:	eb003f7f 	bl	13ec0 <__aeabi_dmul>
-    40c0:	e3a02101 	mov	r2, #1073741824	; 0x40000000
-    40c4:	e2822866 	add	r2, r2, #6684672	; 0x660000
-    40c8:	e2822902 	add	r2, r2, #32768	; 0x8000
-    40cc:	e3a03000 	mov	r3, #0	; 0x0
-    40d0:	eb00401e 	bl	14150 <__aeabi_ddiv>
-    40d4:	eb004107 	bl	144f8 <__aeabi_d2f>
-    40d8:	e49de004 	ldr	lr, [sp], #4
-    40dc:	e12fff1e 	bx	lr
-    40e0:	3f8f8a09 	svccc	0x008f8a09
-    40e4:	02de00d2 	sbceqs	r0, lr, #210	; 0xd2
-    40e8:	400921fb 	strmid	r2, [r9], -fp
-    40ec:	54442d18 	strplb	r2, [r4], #-3352
-
-000040f0 <LLToSIAngleRateRoll>:
-    40f0:	e52de004 	str	lr, [sp, #-4]!
-    40f4:	eb00419b 	bl	14768 <__aeabi_i2f>
-    40f8:	eb003f40 	bl	13e00 <__aeabi_f2d>
-    40fc:	e28f2038 	add	r2, pc, #56	; 0x38
-    4100:	e892000c 	ldmia	r2, {r2, r3}
-    4104:	eb003f6d 	bl	13ec0 <__aeabi_dmul>
-    4108:	eb0040fa 	bl	144f8 <__aeabi_d2f>
-    410c:	eb003f3b 	bl	13e00 <__aeabi_f2d>
-    4110:	e28f202c 	add	r2, pc, #44	; 0x2c
-    4114:	e892000c 	ldmia	r2, {r2, r3}
-    4118:	eb003f68 	bl	13ec0 <__aeabi_dmul>
-    411c:	e3a02101 	mov	r2, #1073741824	; 0x40000000
-    4120:	e2822866 	add	r2, r2, #6684672	; 0x660000
-    4124:	e2822902 	add	r2, r2, #32768	; 0x8000
-    4128:	e3a03000 	mov	r3, #0	; 0x0
-    412c:	eb004007 	bl	14150 <__aeabi_ddiv>
-    4130:	eb0040f0 	bl	144f8 <__aeabi_d2f>
-    4134:	e49de004 	ldr	lr, [sp], #4
-    4138:	e12fff1e 	bx	lr
-    413c:	3f8f8a09 	svccc	0x008f8a09
-    4140:	02de00d2 	sbceqs	r0, lr, #210	; 0xd2
-    4144:	400921fb 	strmid	r2, [r9], -fp
-    4148:	54442d18 	strplb	r2, [r4], #-3352
-
-0000414c <LLToSIAngleYaw>:
-    414c:	e3a03a57 	mov	r3, #356352	; 0x57000
-    4150:	e2833d39 	add	r3, r3, #3648	; 0xe40
-    4154:	e52de004 	str	lr, [sp, #-4]!
-    4158:	e0600003 	rsb	r0, r0, r3
-    415c:	eb004181 	bl	14768 <__aeabi_i2f>
-    4160:	e3a01311 	mov	r1, #1140850688	; 0x44000000
-    4164:	e281187a 	add	r1, r1, #7995392	; 0x7a0000
-    4168:	eb00421b 	bl	149dc <__aeabi_fdiv>
-    416c:	eb003f23 	bl	13e00 <__aeabi_f2d>
-    4170:	e28f2024 	add	r2, pc, #36	; 0x24
-    4174:	e892000c 	ldmia	r2, {r2, r3}
-    4178:	eb003f50 	bl	13ec0 <__aeabi_dmul>
-    417c:	e3a02101 	mov	r2, #1073741824	; 0x40000000
-    4180:	e2822866 	add	r2, r2, #6684672	; 0x660000
-    4184:	e2822902 	add	r2, r2, #32768	; 0x8000
-    4188:	e3a03000 	mov	r3, #0	; 0x0
-    418c:	eb003fef 	bl	14150 <__aeabi_ddiv>
-    4190:	eb0040d8 	bl	144f8 <__aeabi_d2f>
-    4194:	e49de004 	ldr	lr, [sp], #4
-    4198:	e12fff1e 	bx	lr
-    419c:	400921fb 	strmid	r2, [r9], -fp
-    41a0:	54442d18 	strplb	r2, [r4], #-3352
-
-000041a4 <LLToSIAnglePitch>:
-    41a4:	e52de004 	str	lr, [sp, #-4]!
-    41a8:	e2600000 	rsb	r0, r0, #0	; 0x0
-    41ac:	eb00416d 	bl	14768 <__aeabi_i2f>
-    41b0:	e3a01311 	mov	r1, #1140850688	; 0x44000000
-    41b4:	e281187a 	add	r1, r1, #7995392	; 0x7a0000
-    41b8:	eb004207 	bl	149dc <__aeabi_fdiv>
-    41bc:	eb003f0f 	bl	13e00 <__aeabi_f2d>
-    41c0:	e28f2024 	add	r2, pc, #36	; 0x24
-    41c4:	e892000c 	ldmia	r2, {r2, r3}
-    41c8:	eb003f3c 	bl	13ec0 <__aeabi_dmul>
-    41cc:	e3a02101 	mov	r2, #1073741824	; 0x40000000
-    41d0:	e2822866 	add	r2, r2, #6684672	; 0x660000
-    41d4:	e2822902 	add	r2, r2, #32768	; 0x8000
-    41d8:	e3a03000 	mov	r3, #0	; 0x0
-    41dc:	eb003fdb 	bl	14150 <__aeabi_ddiv>
-    41e0:	eb0040c4 	bl	144f8 <__aeabi_d2f>
-    41e4:	e49de004 	ldr	lr, [sp], #4
-    41e8:	e12fff1e 	bx	lr
-    41ec:	400921fb 	strmid	r2, [r9], -fp
-    41f0:	54442d18 	strplb	r2, [r4], #-3352
-
-000041f4 <wait>:
-    41f4:	e92d0030 	stmdb	sp!, {r4, r5}
-    41f8:	e59fc044 	ldr	ip, [pc, #68]	; 4244 <.text+0x4244>
-    41fc:	e89c000c 	ldmia	ip, {r2, r3}
-    4200:	e24dd008 	sub	sp, sp, #8	; 0x8
-    4204:	e88d000c 	stmia	sp, {r2, r3}
-    4208:	e1a04000 	mov	r4, r0
-    420c:	e1a05fc4 	mov	r5, r4, asr #31
-    4210:	e89d000c 	ldmia	sp, {r2, r3}
-    4214:	e89c0003 	ldmia	ip, {r0, r1}
-    4218:	e0922004 	adds	r2, r2, r4
-    421c:	e0a33005 	adc	r3, r3, r5
-    4220:	e1530001 	cmp	r3, r1
-    4224:	cafffff9 	bgt	4210 <wait+0x1c>
-    4228:	0a000002 	beq	4238 <wait+0x44>
-    422c:	e28dd008 	add	sp, sp, #8	; 0x8
-    4230:	e8bd0030 	ldmia	sp!, {r4, r5}
-    4234:	e12fff1e 	bx	lr
-    4238:	e1520000 	cmp	r2, r0
-    423c:	8afffff3 	bhi	4210 <wait+0x1c>
-    4240:	eafffff9 	b	422c <wait+0x38>
-    4244:	40000870 	andmi	r0, r0, r0, ror r8
-
-00004248 <pidReset>:
-    4248:	e59f30d4 	ldr	r3, [pc, #212]	; 4324 <.text+0x4324>
-    424c:	e5932000 	ldr	r2, [r3]
-    4250:	e5d23008 	ldrb	r3, [r2, #8]
-    4254:	e3530000 	cmp	r3, #0	; 0x0
-    4258:	e3a00000 	mov	r0, #0	; 0x0
-    425c:	e59f10c4 	ldr	r1, [pc, #196]	; 4328 <.text+0x4328>
-    4260:	e59f20c4 	ldr	r2, [pc, #196]	; 432c <.text+0x432c>
-    4264:	1a00001f 	bne	42e8 <pidReset+0xa0>
-    4268:	e5c2300f 	strb	r3, [r2, #15]
-    426c:	e5c13000 	strb	r3, [r1]
-    4270:	e5c13001 	strb	r3, [r1, #1]
-    4274:	e5c13002 	strb	r3, [r1, #2]
-    4278:	e5c13003 	strb	r3, [r1, #3]
-    427c:	e5c13004 	strb	r3, [r1, #4]
-    4280:	e5c13005 	strb	r3, [r1, #5]
-    4284:	e5c13006 	strb	r3, [r1, #6]
-    4288:	e5c13007 	strb	r3, [r1, #7]
-    428c:	e5c13008 	strb	r3, [r1, #8]
-    4290:	e5c13009 	strb	r3, [r1, #9]
-    4294:	e5c1300a 	strb	r3, [r1, #10]
-    4298:	e5c1300b 	strb	r3, [r1, #11]
-    429c:	e5c23000 	strb	r3, [r2]
-    42a0:	e5c23001 	strb	r3, [r2, #1]
-    42a4:	e5c23002 	strb	r3, [r2, #2]
-    42a8:	e5c23003 	strb	r3, [r2, #3]
-    42ac:	e5c23004 	strb	r3, [r2, #4]
-    42b0:	e5c23005 	strb	r3, [r2, #5]
-    42b4:	e5c23006 	strb	r3, [r2, #6]
-    42b8:	e5c23007 	strb	r3, [r2, #7]
-    42bc:	e5c23008 	strb	r3, [r2, #8]
-    42c0:	e5c23009 	strb	r3, [r2, #9]
-    42c4:	e5c2300a 	strb	r3, [r2, #10]
-    42c8:	e5c2300b 	strb	r3, [r2, #11]
-    42cc:	e5c2300c 	strb	r3, [r2, #12]
-    42d0:	e5c2300d 	strb	r3, [r2, #13]
-    42d4:	e5c2300e 	strb	r3, [r2, #14]
-    42d8:	e5c1300c 	strb	r3, [r1, #12]
-    42dc:	e5c1300d 	strb	r3, [r1, #13]
-    42e0:	e5c1300e 	strb	r3, [r1, #14]
-    42e4:	e5c1300f 	strb	r3, [r1, #15]
-    42e8:	e59f3040 	ldr	r3, [pc, #64]	; 4330 <.text+0x4330>
-    42ec:	e59f2040 	ldr	r2, [pc, #64]	; 4334 <.text+0x4334>
-    42f0:	e5830018 	str	r0, [r3, #24]
-    42f4:	e59f303c 	ldr	r3, [pc, #60]	; 4338 <.text+0x4338>
-    42f8:	e5820018 	str	r0, [r2, #24]
-    42fc:	e5830018 	str	r0, [r3, #24]
-    4300:	e59f2034 	ldr	r2, [pc, #52]	; 433c <.text+0x433c>
-    4304:	e59f3034 	ldr	r3, [pc, #52]	; 4340 <.text+0x4340>
-    4308:	e5820018 	str	r0, [r2, #24]
-    430c:	e5830018 	str	r0, [r3, #24]
-    4310:	e59f202c 	ldr	r2, [pc, #44]	; 4344 <.text+0x4344>
-    4314:	e59f302c 	ldr	r3, [pc, #44]	; 4348 <.text+0x4348>
-    4318:	e5820018 	str	r0, [r2, #24]
-    431c:	e5830018 	str	r0, [r3, #24]
-    4320:	e12fff1e 	bx	lr
-    4324:	40001094 	mulmi	r0, r4, r0
-    4328:	40001142 	andmi	r1, r0, r2, asr #2
-    432c:	400010f2 	strmid	r1, [r0], -r2
-    4330:	400012ec 	andmi	r1, r0, ip, ror #5
-    4334:	40001310 	andmi	r1, r0, r0, lsl r3
-    4338:	4000137c 	andmi	r1, r0, ip, ror r3
-    433c:	40001334 	andmi	r1, r0, r4, lsr r3
-    4340:	40001358 	andmi	r1, r0, r8, asr r3
-    4344:	400012c8 	andmi	r1, r0, r8, asr #5
-    4348:	400013a0 	andmi	r1, r0, r0, lsr #7
-
-0000434c <pidParamUpdate>:
-    434c:	e92d4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
-    4350:	e59f396c 	ldr	r3, [pc, #2412]	; 4cc4 <.text+0x4cc4>
-    4354:	e5d30001 	ldrb	r0, [r3, #1]
-    4358:	e24dde1b 	sub	sp, sp, #432	; 0x1b0
-    435c:	e5d38000 	ldrb	r8, [r3]
-    4360:	e58d01ac 	str	r0, [sp, #428]
-    4364:	e5d31005 	ldrb	r1, [r3, #5]
-    4368:	e5d35004 	ldrb	r5, [r3, #4]
-    436c:	e58d11a4 	str	r1, [sp, #420]
-    4370:	e5d32009 	ldrb	r2, [r3, #9]
-    4374:	e5d34008 	ldrb	r4, [r3, #8]
-    4378:	e58d2194 	str	r2, [sp, #404]
-    437c:	e5d3101d 	ldrb	r1, [r3, #29]
-    4380:	e5d3a011 	ldrb	sl, [r3, #17]
-    4384:	e5d3b00d 	ldrb	fp, [r3, #13]
-    4388:	e5d36015 	ldrb	r6, [r3, #21]
-    438c:	e5d3e010 	ldrb	lr, [r3, #16]
-    4390:	e5d3c00c 	ldrb	ip, [r3, #12]
-    4394:	e5d30014 	ldrb	r0, [r3, #20]
-    4398:	e5d3201c 	ldrb	r2, [r3, #28]
-    439c:	e58d1180 	str	r1, [sp, #384]
-    43a0:	e5d31002 	ldrb	r1, [r3, #2]
-    43a4:	e58d11a8 	str	r1, [sp, #424]
-    43a8:	e5d31006 	ldrb	r1, [r3, #6]
-    43ac:	e58d11a0 	str	r1, [sp, #416]
-    43b0:	e5d3100a 	ldrb	r1, [r3, #10]
-    43b4:	e58d1190 	str	r1, [sp, #400]
-    43b8:	e5d31012 	ldrb	r1, [r3, #18]
-    43bc:	e58d118c 	str	r1, [sp, #396]
-    43c0:	e5d3100e 	ldrb	r1, [r3, #14]
-    43c4:	e58d1188 	str	r1, [sp, #392]
-    43c8:	e5d31016 	ldrb	r1, [r3, #22]
-    43cc:	e58d1184 	str	r1, [sp, #388]
-    43d0:	e5d3101e 	ldrb	r1, [r3, #30]
-    43d4:	e58d117c 	str	r1, [sp, #380]
-    43d8:	e59d11ac 	ldr	r1, [sp, #428]
-    43dc:	e1888401 	orr	r8, r8, r1, lsl #8
-    43e0:	e59d11a4 	ldr	r1, [sp, #420]
-    43e4:	e1855401 	orr	r5, r5, r1, lsl #8
-    43e8:	e59d1194 	ldr	r1, [sp, #404]
-    43ec:	e1800406 	orr	r0, r0, r6, lsl #8
-    43f0:	e1844401 	orr	r4, r4, r1, lsl #8
-    43f4:	e59d6180 	ldr	r6, [sp, #384]
-    43f8:	e5d31007 	ldrb	r1, [r3, #7]
-    43fc:	e18ee40a 	orr	lr, lr, sl, lsl #8
-    4400:	e1822406 	orr	r2, r2, r6, lsl #8
-    4404:	e5d3a003 	ldrb	sl, [r3, #3]
-    4408:	e58d119c 	str	r1, [sp, #412]
-    440c:	e5d3601f 	ldrb	r6, [r3, #31]
-    4410:	e5d3700f 	ldrb	r7, [r3, #15]
-    4414:	e5d31017 	ldrb	r1, [r3, #23]
-    4418:	e5d39013 	ldrb	r9, [r3, #19]
-    441c:	e18cc40b 	orr	ip, ip, fp, lsl #8
-    4420:	e5d3b00b 	ldrb	fp, [r3, #11]
-    4424:	e58d6178 	str	r6, [sp, #376]
-    4428:	e59d61a8 	ldr	r6, [sp, #424]
-    442c:	e1888806 	orr	r8, r8, r6, lsl #16
-    4430:	e59d61a0 	ldr	r6, [sp, #416]
-    4434:	e1855806 	orr	r5, r5, r6, lsl #16
-    4438:	e59d6190 	ldr	r6, [sp, #400]
-    443c:	e1844806 	orr	r4, r4, r6, lsl #16
-    4440:	e59d618c 	ldr	r6, [sp, #396]
-    4444:	e18ee806 	orr	lr, lr, r6, lsl #16
-    4448:	e59d6188 	ldr	r6, [sp, #392]
-    444c:	e18cc806 	orr	ip, ip, r6, lsl #16
-    4450:	e59d6184 	ldr	r6, [sp, #388]
-    4454:	e1800806 	orr	r0, r0, r6, lsl #16
-    4458:	e59d617c 	ldr	r6, [sp, #380]
-    445c:	e1822806 	orr	r2, r2, r6, lsl #16
-    4460:	e1886c0a 	orr	r6, r8, sl, lsl #24
-    4464:	e59d819c 	ldr	r8, [sp, #412]
-    4468:	e1855c08 	orr	r5, r5, r8, lsl #24
-    446c:	e58d5198 	str	r5, [sp, #408]
-    4470:	e18e5c09 	orr	r5, lr, r9, lsl #24
-    4474:	e180ec01 	orr	lr, r0, r1, lsl #24
-    4478:	e59d0178 	ldr	r0, [sp, #376]
-    447c:	e59f1844 	ldr	r1, [pc, #2116]	; 4cc8 <.text+0x4cc8>
-    4480:	e1848c0b 	orr	r8, r4, fp, lsl #24
-    4484:	e18c4c07 	orr	r4, ip, r7, lsl #24
-    4488:	e182cc00 	orr	ip, r2, r0, lsl #24
-    448c:	e59d2198 	ldr	r2, [sp, #408]
-    4490:	e581e014 	str	lr, [r1, #20]
-    4494:	e5812004 	str	r2, [r1, #4]
-    4498:	e581c020 	str	ip, [r1, #32]
-    449c:	e5816000 	str	r6, [r1]
-    44a0:	e5818008 	str	r8, [r1, #8]
-    44a4:	e5815010 	str	r5, [r1, #16]
-    44a8:	e581400c 	str	r4, [r1, #12]
-    44ac:	e5d34019 	ldrb	r4, [r3, #25]
-    44b0:	e5d3a018 	ldrb	sl, [r3, #24]
-    44b4:	e58d4174 	str	r4, [sp, #372]
-    44b8:	e5d38041 	ldrb	r8, [r3, #65]
-    44bc:	e5d36040 	ldrb	r6, [r3, #64]
-    44c0:	e58d8168 	str	r8, [sp, #360]
-    44c4:	e5d30045 	ldrb	r0, [r3, #69]
-    44c8:	e5d35044 	ldrb	r5, [r3, #68]
-    44cc:	e58d0160 	str	r0, [sp, #352]
-    44d0:	e5d31049 	ldrb	r1, [r3, #73]
-    44d4:	e5d34048 	ldrb	r4, [r3, #72]
-    44d8:	e58d1158 	str	r1, [sp, #344]
-    44dc:	e5d3101a 	ldrb	r1, [r3, #26]
-    44e0:	e5d3804d 	ldrb	r8, [r3, #77]
-    44e4:	e5d3b055 	ldrb	fp, [r3, #85]
-    44e8:	e5d32051 	ldrb	r2, [r3, #81]
-    44ec:	e5d3e04c 	ldrb	lr, [r3, #76]
-    44f0:	e5d3c054 	ldrb	ip, [r3, #84]
-    44f4:	e5d30050 	ldrb	r0, [r3, #80]
-    44f8:	e58d1170 	str	r1, [sp, #368]
-    44fc:	e5d31042 	ldrb	r1, [r3, #66]
-    4500:	e58d1164 	str	r1, [sp, #356]
-    4504:	e5d31046 	ldrb	r1, [r3, #70]
-    4508:	e58d115c 	str	r1, [sp, #348]
-    450c:	e5d3104a 	ldrb	r1, [r3, #74]
-    4510:	e58d1154 	str	r1, [sp, #340]
-    4514:	e5d3104e 	ldrb	r1, [r3, #78]
-    4518:	e58d114c 	str	r1, [sp, #332]
-    451c:	e5d31056 	ldrb	r1, [r3, #86]
-    4520:	e58d1144 	str	r1, [sp, #324]
-    4524:	e5d31052 	ldrb	r1, [r3, #82]
-    4528:	e58d113c 	str	r1, [sp, #316]
-    452c:	e59d1174 	ldr	r1, [sp, #372]
-    4530:	e18aa401 	orr	sl, sl, r1, lsl #8
-    4534:	e59d1168 	ldr	r1, [sp, #360]
-    4538:	e1800402 	orr	r0, r0, r2, lsl #8
-    453c:	e1866401 	orr	r6, r6, r1, lsl #8
-    4540:	e5d3204b 	ldrb	r2, [r3, #75]
-    4544:	e59d1160 	ldr	r1, [sp, #352]
-    4548:	e5d3701b 	ldrb	r7, [r3, #27]
-    454c:	e1855401 	orr	r5, r5, r1, lsl #8
-    4550:	e18ee408 	orr	lr, lr, r8, lsl #8
-    4554:	e59d1158 	ldr	r1, [sp, #344]
-    4558:	e5d38043 	ldrb	r8, [r3, #67]
-    455c:	e18cc40b 	orr	ip, ip, fp, lsl #8
-    4560:	e5d3b047 	ldrb	fp, [r3, #71]
-    4564:	e58d2150 	str	r2, [sp, #336]
-    4568:	e1844401 	orr	r4, r4, r1, lsl #8
-    456c:	e5d3104f 	ldrb	r1, [r3, #79]
-    4570:	e58d1148 	str	r1, [sp, #328]
-    4574:	e5d32057 	ldrb	r2, [r3, #87]
-    4578:	e58d2140 	str	r2, [sp, #320]
-    457c:	e5d31053 	ldrb	r1, [r3, #83]
-    4580:	e58d1138 	str	r1, [sp, #312]
-    4584:	e59d1164 	ldr	r1, [sp, #356]
-    4588:	e1866801 	orr	r6, r6, r1, lsl #16
-    458c:	e59d1154 	ldr	r1, [sp, #340]
-    4590:	e59d2170 	ldr	r2, [sp, #368]
-    4594:	e1844801 	orr	r4, r4, r1, lsl #16
-    4598:	e59d1144 	ldr	r1, [sp, #324]
-    459c:	e18aa802 	orr	sl, sl, r2, lsl #16
-    45a0:	e59d215c 	ldr	r2, [sp, #348]
-    45a4:	e18cc801 	orr	ip, ip, r1, lsl #16
-    45a8:	e59d1150 	ldr	r1, [sp, #336]
-    45ac:	e1855802 	orr	r5, r5, r2, lsl #16
-    45b0:	e59d214c 	ldr	r2, [sp, #332]
-    45b4:	e1868c08 	orr	r8, r6, r8, lsl #24
-    45b8:	e1846c01 	orr	r6, r4, r1, lsl #24
-    45bc:	e59d4148 	ldr	r4, [sp, #328]
-    45c0:	e59d1140 	ldr	r1, [sp, #320]
-    45c4:	e18ee802 	orr	lr, lr, r2, lsl #16
-    45c8:	e59d213c 	ldr	r2, [sp, #316]
-    45cc:	e18a7c07 	orr	r7, sl, r7, lsl #24
-    45d0:	e185ac0b 	orr	sl, r5, fp, lsl #24
-    45d4:	e18e5c04 	orr	r5, lr, r4, lsl #24
-    45d8:	e18c4c01 	orr	r4, ip, r1, lsl #24
-    45dc:	e59d1138 	ldr	r1, [sp, #312]
-    45e0:	e58d716c 	str	r7, [sp, #364]
-    45e4:	e1800802 	orr	r0, r0, r2, lsl #16
-    45e8:	e180ec01 	orr	lr, r0, r1, lsl #24
-    45ec:	e59f26d8 	ldr	r2, [pc, #1752]	; 4ccc <.text+0x4ccc>
-    45f0:	e59d116c 	ldr	r1, [sp, #364]
-    45f4:	e59f06cc 	ldr	r0, [pc, #1740]	; 4cc8 <.text+0x4cc8>
-    45f8:	e5828000 	str	r8, [r2]
-    45fc:	e580101c 	str	r1, [r0, #28]
-    4600:	e582a004 	str	sl, [r2, #4]
-    4604:	e5826008 	str	r6, [r2, #8]
-    4608:	e5825014 	str	r5, [r2, #20]
-    460c:	e5824020 	str	r4, [r2, #32]
-    4610:	e582e01c 	str	lr, [r2, #28]
-    4614:	e5d32021 	ldrb	r2, [r3, #33]
-    4618:	e5d38020 	ldrb	r8, [r3, #32]
-    461c:	e58d2134 	str	r2, [sp, #308]
-    4620:	e5d34025 	ldrb	r4, [r3, #37]
-    4624:	e5d35024 	ldrb	r5, [r3, #36]
-    4628:	e58d412c 	str	r4, [sp, #300]
-    462c:	e5d36029 	ldrb	r6, [r3, #41]
-    4630:	e5d34028 	ldrb	r4, [r3, #40]
-    4634:	e58d6120 	str	r6, [sp, #288]
-    4638:	e5d3103d 	ldrb	r1, [r3, #61]
-    463c:	e5d3a031 	ldrb	sl, [r3, #49]
-    4640:	e5d3b02d 	ldrb	fp, [r3, #45]
-    4644:	e5d36035 	ldrb	r6, [r3, #53]
-    4648:	e5d3e030 	ldrb	lr, [r3, #48]
-    464c:	e5d3c02c 	ldrb	ip, [r3, #44]
-    4650:	e5d30034 	ldrb	r0, [r3, #52]
-    4654:	e5d3203c 	ldrb	r2, [r3, #60]
-    4658:	e58d1100 	str	r1, [sp, #256]
-    465c:	e5d31022 	ldrb	r1, [r3, #34]
-    4660:	e58d1130 	str	r1, [sp, #304]
-    4664:	e5d31026 	ldrb	r1, [r3, #38]
-    4668:	e58d1128 	str	r1, [sp, #296]
-    466c:	e5d3102a 	ldrb	r1, [r3, #42]
-    4670:	e58d111c 	str	r1, [sp, #284]
-    4674:	e5d31032 	ldrb	r1, [r3, #50]
-    4678:	e58d1118 	str	r1, [sp, #280]
-    467c:	e5d3102e 	ldrb	r1, [r3, #46]
-    4680:	e58d1110 	str	r1, [sp, #272]
-    4684:	e5d31036 	ldrb	r1, [r3, #54]
-    4688:	e58d1108 	str	r1, [sp, #264]
-    468c:	e5d3103e 	ldrb	r1, [r3, #62]
-    4690:	e58d10fc 	str	r1, [sp, #252]
-    4694:	e59d1134 	ldr	r1, [sp, #308]
-    4698:	e1888401 	orr	r8, r8, r1, lsl #8
-    469c:	e59d112c 	ldr	r1, [sp, #300]
-    46a0:	e1855401 	orr	r5, r5, r1, lsl #8
-    46a4:	e59d1120 	ldr	r1, [sp, #288]
-    46a8:	e1844401 	orr	r4, r4, r1, lsl #8
-    46ac:	e5d31033 	ldrb	r1, [r3, #51]
-    46b0:	e5d37027 	ldrb	r7, [r3, #39]
-    46b4:	e18ee40a 	orr	lr, lr, sl, lsl #8
-    46b8:	e18cc40b 	orr	ip, ip, fp, lsl #8
-    46bc:	e5d3a023 	ldrb	sl, [r3, #35]
-    46c0:	e5d3b02b 	ldrb	fp, [r3, #43]
-    46c4:	e1800406 	orr	r0, r0, r6, lsl #8
-    46c8:	e58d1114 	str	r1, [sp, #276]
-    46cc:	e59d6100 	ldr	r6, [sp, #256]
-    46d0:	e1822406 	orr	r2, r2, r6, lsl #8
-    46d4:	e5d3602f 	ldrb	r6, [r3, #47]
-    46d8:	e58d610c 	str	r6, [sp, #268]
-    46dc:	e5d31037 	ldrb	r1, [r3, #55]
-    46e0:	e58d1104 	str	r1, [sp, #260]
-    46e4:	e59d1130 	ldr	r1, [sp, #304]
-    46e8:	e5d3603f 	ldrb	r6, [r3, #63]
-    46ec:	e1888801 	orr	r8, r8, r1, lsl #16
-    46f0:	e58d60f8 	str	r6, [sp, #248]
-    46f4:	e59d111c 	ldr	r1, [sp, #284]
-    46f8:	e59d6128 	ldr	r6, [sp, #296]
-    46fc:	e1844801 	orr	r4, r4, r1, lsl #16
-    4700:	e1855806 	orr	r5, r5, r6, lsl #16
-    4704:	e59d1110 	ldr	r1, [sp, #272]
-    4708:	e59d6118 	ldr	r6, [sp, #280]
-    470c:	e18cc801 	orr	ip, ip, r1, lsl #16
-    4710:	e18ee806 	orr	lr, lr, r6, lsl #16
-    4714:	e59d10fc 	ldr	r1, [sp, #252]
-    4718:	e59d6108 	ldr	r6, [sp, #264]
-    471c:	e1857c07 	orr	r7, r5, r7, lsl #24
-    4720:	e58d7124 	str	r7, [sp, #292]
-    4724:	e1800806 	orr	r0, r0, r6, lsl #16
-    4728:	e1822801 	orr	r2, r2, r1, lsl #16
-    472c:	e1886c0a 	orr	r6, r8, sl, lsl #24
-    4730:	e59d110c 	ldr	r1, [sp, #268]
-    4734:	e1848c0b 	orr	r8, r4, fp, lsl #24
-    4738:	e59d4114 	ldr	r4, [sp, #276]
-    473c:	e18e5c04 	orr	r5, lr, r4, lsl #24
-    4740:	e18c4c01 	orr	r4, ip, r1, lsl #24
-    4744:	e59d1104 	ldr	r1, [sp, #260]
-    4748:	e180ec01 	orr	lr, r0, r1, lsl #24
-    474c:	e59d00f8 	ldr	r0, [sp, #248]
-    4750:	e59f1578 	ldr	r1, [pc, #1400]	; 4cd0 <.text+0x4cd0>
-    4754:	e182cc00 	orr	ip, r2, r0, lsl #24
-    4758:	e59d2124 	ldr	r2, [sp, #292]
-    475c:	e5816000 	str	r6, [r1]
-    4760:	e5812004 	str	r2, [r1, #4]
-    4764:	e5818008 	str	r8, [r1, #8]
-    4768:	e5815010 	str	r5, [r1, #16]
-    476c:	e581400c 	str	r4, [r1, #12]
-    4770:	e581e014 	str	lr, [r1, #20]
-    4774:	e581c020 	str	ip, [r1, #32]
-    4778:	e5d34039 	ldrb	r4, [r3, #57]
-    477c:	e5d3a038 	ldrb	sl, [r3, #56]
-    4780:	e58d40f4 	str	r4, [sp, #244]
-    4784:	e5d38059 	ldrb	r8, [r3, #89]
-    4788:	e5d36058 	ldrb	r6, [r3, #88]
-    478c:	e58d80e8 	str	r8, [sp, #232]
-    4790:	e5d3005d 	ldrb	r0, [r3, #93]
-    4794:	e5d3505c 	ldrb	r5, [r3, #92]
-    4798:	e58d00e0 	str	r0, [sp, #224]
-    479c:	e5d31061 	ldrb	r1, [r3, #97]
-    47a0:	e5d34060 	ldrb	r4, [r3, #96]
-    47a4:	e58d10d8 	str	r1, [sp, #216]
-    47a8:	e5d3103a 	ldrb	r1, [r3, #58]
-    47ac:	e5d38065 	ldrb	r8, [r3, #101]
-    47b0:	e5d3b06d 	ldrb	fp, [r3, #109]
-    47b4:	e5d32069 	ldrb	r2, [r3, #105]
-    47b8:	e5d3e064 	ldrb	lr, [r3, #100]
-    47bc:	e5d3c06c 	ldrb	ip, [r3, #108]
-    47c0:	e5d30068 	ldrb	r0, [r3, #104]
-    47c4:	e58d10f0 	str	r1, [sp, #240]
-    47c8:	e5d3105a 	ldrb	r1, [r3, #90]
-    47cc:	e58d10e4 	str	r1, [sp, #228]
-    47d0:	e5d3105e 	ldrb	r1, [r3, #94]
-    47d4:	e58d10dc 	str	r1, [sp, #220]
-    47d8:	e5d31062 	ldrb	r1, [r3, #98]
-    47dc:	e58d10d4 	str	r1, [sp, #212]
-    47e0:	e5d31066 	ldrb	r1, [r3, #102]
-    47e4:	e58d10cc 	str	r1, [sp, #204]
-    47e8:	e5d3106e 	ldrb	r1, [r3, #110]
-    47ec:	e58d10c4 	str	r1, [sp, #196]
-    47f0:	e5d3106a 	ldrb	r1, [r3, #106]
-    47f4:	e58d10bc 	str	r1, [sp, #188]
-    47f8:	e59d10f4 	ldr	r1, [sp, #244]
-    47fc:	e18aa401 	orr	sl, sl, r1, lsl #8
-    4800:	e59d10e8 	ldr	r1, [sp, #232]
-    4804:	e1800402 	orr	r0, r0, r2, lsl #8
-    4808:	e1866401 	orr	r6, r6, r1, lsl #8
-    480c:	e5d32063 	ldrb	r2, [r3, #99]
-    4810:	e59d10e0 	ldr	r1, [sp, #224]
-    4814:	e5d3703b 	ldrb	r7, [r3, #59]
-    4818:	e1855401 	orr	r5, r5, r1, lsl #8
-    481c:	e18ee408 	orr	lr, lr, r8, lsl #8
-    4820:	e59d10d8 	ldr	r1, [sp, #216]
-    4824:	e5d3805b 	ldrb	r8, [r3, #91]
-    4828:	e18cc40b 	orr	ip, ip, fp, lsl #8
-    482c:	e5d3b05f 	ldrb	fp, [r3, #95]
-    4830:	e58d20d0 	str	r2, [sp, #208]
-    4834:	e1844401 	orr	r4, r4, r1, lsl #8
-    4838:	e5d31067 	ldrb	r1, [r3, #103]
-    483c:	e58d10c8 	str	r1, [sp, #200]
-    4840:	e5d3206f 	ldrb	r2, [r3, #111]
-    4844:	e58d20c0 	str	r2, [sp, #192]
-    4848:	e5d3106b 	ldrb	r1, [r3, #107]
-    484c:	e58d10b8 	str	r1, [sp, #184]
-    4850:	e59d10e4 	ldr	r1, [sp, #228]
-    4854:	e1866801 	orr	r6, r6, r1, lsl #16
-    4858:	e59d10d4 	ldr	r1, [sp, #212]
-    485c:	e59d20f0 	ldr	r2, [sp, #240]
-    4860:	e1844801 	orr	r4, r4, r1, lsl #16
-    4864:	e59d10c4 	ldr	r1, [sp, #196]
-    4868:	e18aa802 	orr	sl, sl, r2, lsl #16
-    486c:	e59d20dc 	ldr	r2, [sp, #220]
-    4870:	e18cc801 	orr	ip, ip, r1, lsl #16
-    4874:	e59d10d0 	ldr	r1, [sp, #208]
-    4878:	e1855802 	orr	r5, r5, r2, lsl #16
-    487c:	e59d20cc 	ldr	r2, [sp, #204]
-    4880:	e1868c08 	orr	r8, r6, r8, lsl #24
-    4884:	e1846c01 	orr	r6, r4, r1, lsl #24
-    4888:	e59d40c8 	ldr	r4, [sp, #200]
-    488c:	e59d10c0 	ldr	r1, [sp, #192]
-    4890:	e18ee802 	orr	lr, lr, r2, lsl #16
-    4894:	e59d20bc 	ldr	r2, [sp, #188]
-    4898:	e18a7c07 	orr	r7, sl, r7, lsl #24
-    489c:	e185ac0b 	orr	sl, r5, fp, lsl #24
-    48a0:	e18e5c04 	orr	r5, lr, r4, lsl #24
-    48a4:	e18c4c01 	orr	r4, ip, r1, lsl #24
-    48a8:	e59d10b8 	ldr	r1, [sp, #184]
-    48ac:	e1800802 	orr	r0, r0, r2, lsl #16
-    48b0:	e58d70ec 	str	r7, [sp, #236]
-    48b4:	e59f2418 	ldr	r2, [pc, #1048]	; 4cd4 <.text+0x4cd4>
-    48b8:	e180ec01 	orr	lr, r0, r1, lsl #24
-    48bc:	e59d10ec 	ldr	r1, [sp, #236]
-    48c0:	e59f0408 	ldr	r0, [pc, #1032]	; 4cd0 <.text+0x4cd0>
-    48c4:	e580101c 	str	r1, [r0, #28]
-    48c8:	e5828000 	str	r8, [r2]
-    48cc:	e582a004 	str	sl, [r2, #4]
-    48d0:	e5826008 	str	r6, [r2, #8]
-    48d4:	e5825014 	str	r5, [r2, #20]
-    48d8:	e5824020 	str	r4, [r2, #32]
-    48dc:	e582e01c 	str	lr, [r2, #28]
-    48e0:	e5d32089 	ldrb	r2, [r3, #137]
-    48e4:	e5d38088 	ldrb	r8, [r3, #136]
-    48e8:	e58d20b4 	str	r2, [sp, #180]
-    48ec:	e5d3408d 	ldrb	r4, [r3, #141]
-    48f0:	e5d3508c 	ldrb	r5, [r3, #140]
-    48f4:	e58d40ac 	str	r4, [sp, #172]
-    48f8:	e5d36091 	ldrb	r6, [r3, #145]
-    48fc:	e5d34090 	ldrb	r4, [r3, #144]
-    4900:	e58d60a0 	str	r6, [sp, #160]
-    4904:	e5d30099 	ldrb	r0, [r3, #153]
-    4908:	e5d3a095 	ldrb	sl, [r3, #149]
-    490c:	e5d3e094 	ldrb	lr, [r3, #148]
-    4910:	e5d3c098 	ldrb	ip, [r3, #152]
-    4914:	e58d0090 	str	r0, [sp, #144]
-    4918:	e5d3108a 	ldrb	r1, [r3, #138]
-    491c:	e5d360a1 	ldrb	r6, [r3, #161]
-    4920:	e5d3b09c 	ldrb	fp, [r3, #156]
-    4924:	e5d300a0 	ldrb	r0, [r3, #160]
-    4928:	e5d3209d 	ldrb	r2, [r3, #157]
-    492c:	e58d10b0 	str	r1, [sp, #176]
-    4930:	e5d3108e 	ldrb	r1, [r3, #142]
-    4934:	e58d10a8 	str	r1, [sp, #168]
-    4938:	e5d31092 	ldrb	r1, [r3, #146]
-    493c:	e58d109c 	str	r1, [sp, #156]
-    4940:	e5d31096 	ldrb	r1, [r3, #150]
-    4944:	e58d1098 	str	r1, [sp, #152]
-    4948:	e5d3109a 	ldrb	r1, [r3, #154]
-    494c:	e58d108c 	str	r1, [sp, #140]
-    4950:	e5d310a2 	ldrb	r1, [r3, #162]
-    4954:	e58d1084 	str	r1, [sp, #132]
-    4958:	e5d3109e 	ldrb	r1, [r3, #158]
-    495c:	e18b2402 	orr	r2, fp, r2, lsl #8
-    4960:	e58d1078 	str	r1, [sp, #120]
-    4964:	e58d207c 	str	r2, [sp, #124]
-    4968:	e59d10b4 	ldr	r1, [sp, #180]
-    496c:	e5d32097 	ldrb	r2, [r3, #151]
-    4970:	e5d3b093 	ldrb	fp, [r3, #147]
-    4974:	e5d3708f 	ldrb	r7, [r3, #143]
-    4978:	e1888401 	orr	r8, r8, r1, lsl #8
-    497c:	e18ee40a 	orr	lr, lr, sl, lsl #8
-    4980:	e59d10ac 	ldr	r1, [sp, #172]
-    4984:	e5d3a08b 	ldrb	sl, [r3, #139]
-    4988:	e58d2094 	str	r2, [sp, #148]
-    498c:	e1855401 	orr	r5, r5, r1, lsl #8
-    4990:	e1800406 	orr	r0, r0, r6, lsl #8
-    4994:	e59d10a0 	ldr	r1, [sp, #160]
-    4998:	e5d3609b 	ldrb	r6, [r3, #155]
-    499c:	e1844401 	orr	r4, r4, r1, lsl #8
-    49a0:	e58d6088 	str	r6, [sp, #136]
-    49a4:	e59d1090 	ldr	r1, [sp, #144]
-    49a8:	e18cc401 	orr	ip, ip, r1, lsl #8
-    49ac:	e5d310a3 	ldrb	r1, [r3, #163]
-    49b0:	e59d60b0 	ldr	r6, [sp, #176]
-    49b4:	e58d1080 	str	r1, [sp, #128]
-    49b8:	e59d10a8 	ldr	r1, [sp, #168]
-    49bc:	e5d3209f 	ldrb	r2, [r3, #159]
-    49c0:	e1888806 	orr	r8, r8, r6, lsl #16
-    49c4:	e1855801 	orr	r5, r5, r1, lsl #16
-    49c8:	e59d6098 	ldr	r6, [sp, #152]
-    49cc:	e59d108c 	ldr	r1, [sp, #140]
-    49d0:	e58d2070 	str	r2, [sp, #112]
-    49d4:	e18ee806 	orr	lr, lr, r6, lsl #16
-    49d8:	e59d209c 	ldr	r2, [sp, #156]
-    49dc:	e18cc801 	orr	ip, ip, r1, lsl #16
-    49e0:	e28d1078 	add	r1, sp, #120	; 0x78
-    49e4:	e8910042 	ldmia	r1, {r1, r6}
-    49e8:	e1844802 	orr	r4, r4, r2, lsl #16
-    49ec:	e1866801 	orr	r6, r6, r1, lsl #16
-    49f0:	e58d6074 	str	r6, [sp, #116]
-    49f4:	e59d1088 	ldr	r1, [sp, #136]
-    49f8:	e1886c0a 	orr	r6, r8, sl, lsl #24
-    49fc:	e1848c0b 	orr	r8, r4, fp, lsl #24
-    4a00:	e59d4094 	ldr	r4, [sp, #148]
-    4a04:	e59d2084 	ldr	r2, [sp, #132]
-    4a08:	e1857c07 	orr	r7, r5, r7, lsl #24
-    4a0c:	e18e5c04 	orr	r5, lr, r4, lsl #24
-    4a10:	e18c4c01 	orr	r4, ip, r1, lsl #24
-    4a14:	e59d1080 	ldr	r1, [sp, #128]
-    4a18:	e1800802 	orr	r0, r0, r2, lsl #16
-    4a1c:	e59f22b4 	ldr	r2, [pc, #692]	; 4cd8 <.text+0x4cd8>
-    4a20:	e180ec01 	orr	lr, r0, r1, lsl #24
-    4a24:	e59d0074 	ldr	r0, [sp, #116]
-    4a28:	e59d1070 	ldr	r1, [sp, #112]
-    4a2c:	e58d70a4 	str	r7, [sp, #164]
-    4a30:	e5826000 	str	r6, [r2]
-    4a34:	e59d60a4 	ldr	r6, [sp, #164]
-    4a38:	e180cc01 	orr	ip, r0, r1, lsl #24
-    4a3c:	e5826004 	str	r6, [r2, #4]
-    4a40:	e5828008 	str	r8, [r2, #8]
-    4a44:	e582500c 	str	r5, [r2, #12]
-    4a48:	e5824014 	str	r4, [r2, #20]
-    4a4c:	e582e020 	str	lr, [r2, #32]
-    4a50:	e582c01c 	str	ip, [r2, #28]
-    4a54:	e5d38071 	ldrb	r8, [r3, #113]
-    4a58:	e5d36070 	ldrb	r6, [r3, #112]
-    4a5c:	e58d806c 	str	r8, [sp, #108]
-    4a60:	e5d30075 	ldrb	r0, [r3, #117]
-    4a64:	e5d35074 	ldrb	r5, [r3, #116]
-    4a68:	e58d0064 	str	r0, [sp, #100]
-    4a6c:	e5d31079 	ldrb	r1, [r3, #121]
-    4a70:	e5d34078 	ldrb	r4, [r3, #120]
-    4a74:	e58d105c 	str	r1, [sp, #92]
-    4a78:	e5d3207c 	ldrb	r2, [r3, #124]
-    4a7c:	e58d2054 	str	r2, [sp, #84]
-    4a80:	e5d31072 	ldrb	r1, [r3, #114]
-    4a84:	e5d38085 	ldrb	r8, [r3, #133]
-    4a88:	e5d3b081 	ldrb	fp, [r3, #129]
-    4a8c:	e5d320a5 	ldrb	r2, [r3, #165]
-    4a90:	e5d3a07d 	ldrb	sl, [r3, #125]
-    4a94:	e5d3e084 	ldrb	lr, [r3, #132]
-    4a98:	e5d3c080 	ldrb	ip, [r3, #128]
-    4a9c:	e5d300a4 	ldrb	r0, [r3, #164]
-    4aa0:	e58d1068 	str	r1, [sp, #104]
-    4aa4:	e5d31076 	ldrb	r1, [r3, #118]
-    4aa8:	e58d1060 	str	r1, [sp, #96]
-    4aac:	e5d3107a 	ldrb	r1, [r3, #122]
-    4ab0:	e58d1058 	str	r1, [sp, #88]
-    4ab4:	e5d3107e 	ldrb	r1, [r3, #126]
-    4ab8:	e58d104c 	str	r1, [sp, #76]
-    4abc:	e5d31086 	ldrb	r1, [r3, #134]
-    4ac0:	e58d1040 	str	r1, [sp, #64]
-    4ac4:	e5d31082 	ldrb	r1, [r3, #130]
-    4ac8:	e58d1034 	str	r1, [sp, #52]
-    4acc:	e5d310a6 	ldrb	r1, [r3, #166]
-    4ad0:	e58d1028 	str	r1, [sp, #40]
-    4ad4:	e59d106c 	ldr	r1, [sp, #108]
-    4ad8:	e1866401 	orr	r6, r6, r1, lsl #8
-    4adc:	e59d1064 	ldr	r1, [sp, #100]
-    4ae0:	e1855401 	orr	r5, r5, r1, lsl #8
-    4ae4:	e59d105c 	ldr	r1, [sp, #92]
-    4ae8:	e1844401 	orr	r4, r4, r1, lsl #8
-    4aec:	e59d1054 	ldr	r1, [sp, #84]
-    4af0:	e181a40a 	orr	sl, r1, sl, lsl #8
-    4af4:	e58da050 	str	sl, [sp, #80]
-    4af8:	e1800402 	orr	r0, r0, r2, lsl #8
-    4afc:	e5d3207f 	ldrb	r2, [r3, #127]
-    4b00:	e5d3a077 	ldrb	sl, [r3, #119]
-    4b04:	e18ee408 	orr	lr, lr, r8, lsl #8
-    4b08:	e18cc40b 	orr	ip, ip, fp, lsl #8
-    4b0c:	e5d38073 	ldrb	r8, [r3, #115]
-    4b10:	e5d3b07b 	ldrb	fp, [r3, #123]
-    4b14:	e58d2044 	str	r2, [sp, #68]
-    4b18:	e5d31087 	ldrb	r1, [r3, #135]
-    4b1c:	e58d103c 	str	r1, [sp, #60]
-    4b20:	e5d32083 	ldrb	r2, [r3, #131]
-    4b24:	e58d2030 	str	r2, [sp, #48]
-    4b28:	e59d2068 	ldr	r2, [sp, #104]
-    4b2c:	e5d310a7 	ldrb	r1, [r3, #167]
-    4b30:	e1866802 	orr	r6, r6, r2, lsl #16
-    4b34:	e58d1024 	str	r1, [sp, #36]
-    4b38:	e59d2058 	ldr	r2, [sp, #88]
-    4b3c:	e59d1060 	ldr	r1, [sp, #96]
-    4b40:	e1844802 	orr	r4, r4, r2, lsl #16
-    4b44:	e1855801 	orr	r5, r5, r1, lsl #16
-    4b48:	e59d204c 	ldr	r2, [sp, #76]
-    4b4c:	e59d1050 	ldr	r1, [sp, #80]
-    4b50:	e1811802 	orr	r1, r1, r2, lsl #16
-    4b54:	e58d1048 	str	r1, [sp, #72]
-    4b58:	e59d1040 	ldr	r1, [sp, #64]
-    4b5c:	e18ee801 	orr	lr, lr, r1, lsl #16
-    4b60:	e59d1028 	ldr	r1, [sp, #40]
-    4b64:	e1868c08 	orr	r8, r6, r8, lsl #24
-    4b68:	e1800801 	orr	r0, r0, r1, lsl #16
-    4b6c:	e1846c0b 	orr	r6, r4, fp, lsl #24
-    4b70:	e28d1044 	add	r1, sp, #68	; 0x44
-    4b74:	e8910012 	ldmia	r1, {r1, r4}
-    4b78:	e59d2034 	ldr	r2, [sp, #52]
-    4b7c:	e185ac0a 	orr	sl, r5, sl, lsl #24
-    4b80:	e1845c01 	orr	r5, r4, r1, lsl #24
-    4b84:	e59d403c 	ldr	r4, [sp, #60]
-    4b88:	e59d1030 	ldr	r1, [sp, #48]
-    4b8c:	e18cc802 	orr	ip, ip, r2, lsl #16
-    4b90:	e18eec04 	orr	lr, lr, r4, lsl #24
-    4b94:	e18ccc01 	orr	ip, ip, r1, lsl #24
-    4b98:	e58de038 	str	lr, [sp, #56]
-    4b9c:	e58dc02c 	str	ip, [sp, #44]
-    4ba0:	e59d1024 	ldr	r1, [sp, #36]
-    4ba4:	e59f2130 	ldr	r2, [pc, #304]	; 4cdc <.text+0x4cdc>
-    4ba8:	e1804c01 	orr	r4, r0, r1, lsl #24
-    4bac:	e59d002c 	ldr	r0, [sp, #44]
-    4bb0:	e59d1038 	ldr	r1, [sp, #56]
-    4bb4:	e582001c 	str	r0, [r2, #28]
-    4bb8:	e5828000 	str	r8, [r2]
-    4bbc:	e582a004 	str	sl, [r2, #4]
-    4bc0:	e5826008 	str	r6, [r2, #8]
-    4bc4:	e5825014 	str	r5, [r2, #20]
-    4bc8:	e5821020 	str	r1, [r2, #32]
-    4bcc:	e59f210c 	ldr	r2, [pc, #268]	; 4ce0 <.text+0x4ce0>
-    4bd0:	e5824000 	str	r4, [r2]
-    4bd4:	e5d340b8 	ldrb	r4, [r3, #184]
-    4bd8:	e5d3a0a9 	ldrb	sl, [r3, #169]
-    4bdc:	e5d380ad 	ldrb	r8, [r3, #173]
-    4be0:	e5d360b1 	ldrb	r6, [r3, #177]
-    4be4:	e5d3e0a8 	ldrb	lr, [r3, #168]
-    4be8:	e5d3c0ac 	ldrb	ip, [r3, #172]
-    4bec:	e5d300b0 	ldrb	r0, [r3, #176]
-    4bf0:	e58d4014 	str	r4, [sp, #20]
-    4bf4:	e5d310aa 	ldrb	r1, [r3, #170]
-    4bf8:	e5d340b5 	ldrb	r4, [r3, #181]
-    4bfc:	e5d350b9 	ldrb	r5, [r3, #185]
-    4c00:	e5d320b4 	ldrb	r2, [r3, #180]
-    4c04:	e58d1020 	str	r1, [sp, #32]
-    4c08:	e5d310ae 	ldrb	r1, [r3, #174]
-    4c0c:	e58d101c 	str	r1, [sp, #28]
-    4c10:	e5d310b2 	ldrb	r1, [r3, #178]
-    4c14:	e58d1018 	str	r1, [sp, #24]
-    4c18:	e5d310ba 	ldrb	r1, [r3, #186]
-    4c1c:	e58d100c 	str	r1, [sp, #12]
-    4c20:	e1800406 	orr	r0, r0, r6, lsl #8
-    4c24:	e59d6014 	ldr	r6, [sp, #20]
-    4c28:	e5d310b6 	ldrb	r1, [r3, #182]
-    4c2c:	e1865405 	orr	r5, r6, r5, lsl #8
-    4c30:	e58d1000 	str	r1, [sp]
-    4c34:	e58d5010 	str	r5, [sp, #16]
-    4c38:	e18ee40a 	orr	lr, lr, sl, lsl #8
-    4c3c:	e5d360ab 	ldrb	r6, [r3, #171]
-    4c40:	e5d3b0b7 	ldrb	fp, [r3, #183]
-    4c44:	e5d3a0b3 	ldrb	sl, [r3, #179]
-    4c48:	e18cc408 	orr	ip, ip, r8, lsl #8
-    4c4c:	e5d380af 	ldrb	r8, [r3, #175]
-    4c50:	e5d330bb 	ldrb	r3, [r3, #187]
-    4c54:	e58d3004 	str	r3, [sp, #4]
-    4c58:	e59d1020 	ldr	r1, [sp, #32]
-    4c5c:	e59d301c 	ldr	r3, [sp, #28]
-    4c60:	e1822404 	orr	r2, r2, r4, lsl #8
-    4c64:	e59d4018 	ldr	r4, [sp, #24]
-    4c68:	e18ee801 	orr	lr, lr, r1, lsl #16
-    4c6c:	e18cc803 	orr	ip, ip, r3, lsl #16
-    4c70:	e59d100c 	ldr	r1, [sp, #12]
-    4c74:	e59d3000 	ldr	r3, [sp]
-    4c78:	e1800804 	orr	r0, r0, r4, lsl #16
-    4c7c:	e18e4c06 	orr	r4, lr, r6, lsl #24
-    4c80:	e59d6004 	ldr	r6, [sp, #4]
-    4c84:	e1851801 	orr	r1, r5, r1, lsl #16
-    4c88:	e1822803 	orr	r2, r2, r3, lsl #16
-    4c8c:	e18c5c08 	orr	r5, ip, r8, lsl #24
-    4c90:	e59f8048 	ldr	r8, [pc, #72]	; 4ce0 <.text+0x4ce0>
-    4c94:	e180ec0a 	orr	lr, r0, sl, lsl #24
-    4c98:	e181cc06 	orr	ip, r1, r6, lsl #24
-    4c9c:	e1823c0b 	orr	r3, r2, fp, lsl #24
-    4ca0:	e58d1008 	str	r1, [sp, #8]
-    4ca4:	e588301c 	str	r3, [r8, #28]
-    4ca8:	e5884004 	str	r4, [r8, #4]
-    4cac:	e5885008 	str	r5, [r8, #8]
-    4cb0:	e588e014 	str	lr, [r8, #20]
-    4cb4:	e588c020 	str	ip, [r8, #32]
-    4cb8:	e28dde1b 	add	sp, sp, #432	; 0x1b0
-    4cbc:	e8bd4ff0 	ldmia	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
-    4cc0:	e12fff1e 	bx	lr
-    4cc4:	40001188 	andmi	r1, r0, r8, lsl #3
-    4cc8:	40001310 	andmi	r1, r0, r0, lsl r3
-    4ccc:	40001358 	andmi	r1, r0, r8, asr r3
-    4cd0:	4000137c 	andmi	r1, r0, ip, ror r3
-    4cd4:	400012c8 	andmi	r1, r0, r8, asr #5
-    4cd8:	40001334 	andmi	r1, r0, r4, lsr r3
-    4cdc:	400013a0 	andmi	r1, r0, r0, lsr #7
-    4ce0:	400012ec 	andmi	r1, r0, ip, ror #5
-
-00004ce4 <pidCalc>:
-    4ce4:	e92d47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
-    4ce8:	e5908020 	ldr	r8, [r0, #32]
-    4cec:	e1a07000 	mov	r7, r0
-    4cf0:	e1a00008 	mov	r0, r8
-    4cf4:	e1a0a003 	mov	sl, r3
-    4cf8:	e1a04001 	mov	r4, r1
-    4cfc:	e1a09002 	mov	r9, r2
-    4d00:	eb003f8f 	bl	14b44 <__lesf2>
-    4d04:	e3500000 	cmp	r0, #0	; 0x0
-    4d08:	e2883102 	add	r3, r8, #-2147483648	; 0x80000000
-    4d0c:	e1a00004 	mov	r0, r4
-    4d10:	ba000004 	blt	4d28 <pidCalc+0x44>
-    4d14:	e1a01003 	mov	r1, r3
-    4d18:	e1a08003 	mov	r8, r3
-    4d1c:	eb003f88 	bl	14b44 <__lesf2>
-    4d20:	e3500000 	cmp	r0, #0	; 0x0
-    4d24:	a1a08004 	movge	r8, r4
-    4d28:	e59d1020 	ldr	r1, [sp, #32]
-    4d2c:	e1a00008 	mov	r0, r8
-    4d30:	eb003ec3 	bl	14844 <__aeabi_fmul>
-    4d34:	e5974018 	ldr	r4, [r7, #24]
-    4d38:	e1a01000 	mov	r1, r0
-    4d3c:	e1a00004 	mov	r0, r4
-    4d40:	eb003e17 	bl	145a4 <__addsf3>
-    4d44:	e597601c 	ldr	r6, [r7, #28]
-    4d48:	e5870018 	str	r0, [r7, #24]
-    4d4c:	e1a01006 	mov	r1, r6
-    4d50:	e1a04000 	mov	r4, r0
-    4d54:	eb003f78 	bl	14b3c <__gesf2>
-    4d58:	e2865102 	add	r5, r6, #-2147483648	; 0x80000000
-    4d5c:	e3500000 	cmp	r0, #0	; 0x0
-    4d60:	e1a01005 	mov	r1, r5
-    4d64:	e1a00004 	mov	r0, r4
-    4d68:	c5876018 	strgt	r6, [r7, #24]
-    4d6c:	ca000002 	bgt	4d7c <pidCalc+0x98>
-    4d70:	eb003f73 	bl	14b44 <__lesf2>
-    4d74:	e3500000 	cmp	r0, #0	; 0x0
-    4d78:	b5875018 	strlt	r5, [r7, #24]
-    4d7c:	e1a0000a 	mov	r0, sl
-    4d80:	eb003c1e 	bl	13e00 <__aeabi_f2d>
-    4d84:	e1a02000 	mov	r2, r0
-    4d88:	e3a005ff 	mov	r0, #1069547520	; 0x3fc00000
-    4d8c:	e1a03001 	mov	r3, r1
-    4d90:	e2800603 	add	r0, r0, #3145728	; 0x300000
-    4d94:	e3a01000 	mov	r1, #0	; 0x0
-    4d98:	eb003cec 	bl	14150 <__aeabi_ddiv>
-    4d9c:	e1a04000 	mov	r4, r0
-    4da0:	e1a00008 	mov	r0, r8
-    4da4:	e1a05001 	mov	r5, r1
-    4da8:	eb003fa7 	bl	14c4c <__aeabi_f2iz>
-    4dac:	e3500000 	cmp	r0, #0	; 0x0
-    4db0:	b2600000 	rsblt	r0, r0, #0	; 0x0
-    4db4:	eb003c06 	bl	13dd4 <__aeabi_i2d>
-    4db8:	e1a02000 	mov	r2, r0
-    4dbc:	e1a03001 	mov	r3, r1
-    4dc0:	e1a00004 	mov	r0, r4
-    4dc4:	e1a01005 	mov	r1, r5
-    4dc8:	eb0040d8 	bl	15130 <__pow_from_arm>
-    4dcc:	e1a04000 	mov	r4, r0
-    4dd0:	e1a05001 	mov	r5, r1
-    4dd4:	e1a00008 	mov	r0, r8
-    4dd8:	e5971000 	ldr	r1, [r7]
-    4ddc:	eb003e98 	bl	14844 <__aeabi_fmul>
-    4de0:	e5971014 	ldr	r1, [r7, #20]
-    4de4:	eb003dee 	bl	145a4 <__addsf3>
-    4de8:	e1a01005 	mov	r1, r5
-    4dec:	e1a06000 	mov	r6, r0
-    4df0:	e1a00004 	mov	r0, r4
-    4df4:	eb003dbf 	bl	144f8 <__aeabi_d2f>
-    4df8:	e5971008 	ldr	r1, [r7, #8]
-    4dfc:	eb003e90 	bl	14844 <__aeabi_fmul>
-    4e00:	e1a01009 	mov	r1, r9
-    4e04:	eb003e8e 	bl	14844 <__aeabi_fmul>
-    4e08:	e1a01000 	mov	r1, r0
-    4e0c:	e1a00006 	mov	r0, r6
-    4e10:	eb003de3 	bl	145a4 <__addsf3>
-    4e14:	e5971018 	ldr	r1, [r7, #24]
-    4e18:	e1a04000 	mov	r4, r0
-    4e1c:	e5970004 	ldr	r0, [r7, #4]
-    4e20:	eb003e87 	bl	14844 <__aeabi_fmul>
-    4e24:	e1a01000 	mov	r1, r0
-    4e28:	e1a00004 	mov	r0, r4
-    4e2c:	eb003ddc 	bl	145a4 <__addsf3>
-    4e30:	e8bd47f0 	ldmia	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
-    4e34:	e12fff1e 	bx	lr
-
-00004e38 <processCtrl>:
-    4e38:	e92d4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
-    4e3c:	e59f3c0c 	ldr	r3, [pc, #3084]	; 5a50 <.text+0x5a50>
-    4e40:	e5931000 	ldr	r1, [r3]
-    4e44:	e5d12008 	ldrb	r2, [r1, #8]
-    4e48:	e3520000 	cmp	r2, #0	; 0x0
-    4e4c:	e24dd060 	sub	sp, sp, #96	; 0x60
-    4e50:	1a00005f 	bne	4fd4 <processCtrl+0x19c>
-    4e54:	e59f3bf8 	ldr	r3, [pc, #3064]	; 5a54 <.text+0x5a54>
-    4e58:	e5d32000 	ldrb	r2, [r3]
-    4e5c:	e3520005 	cmp	r2, #5	; 0x5
-    4e60:	159fbbf0 	ldrne	fp, [pc, #3056]	; 5a58 <.text+0x5a58>
-    4e64:	159f9bf0 	ldrne	r9, [pc, #3056]	; 5a5c <.text+0x5a5c>
-    4e68:	0a000062 	beq	4ff8 <processCtrl+0x1c0>
-    4e6c:	e5db2005 	ldrb	r2, [fp, #5]
-    4e70:	e5db3004 	ldrb	r3, [fp, #4]
-    4e74:	e5db1006 	ldrb	r1, [fp, #6]
-    4e78:	e1833402 	orr	r3, r3, r2, lsl #8
-    4e7c:	e5db0007 	ldrb	r0, [fp, #7]
-    4e80:	e1833801 	orr	r3, r3, r1, lsl #16
-    4e84:	e5995000 	ldr	r5, [r9]
-    4e88:	e1834c00 	orr	r4, r3, r0, lsl #24
-    4e8c:	e1a01004 	mov	r1, r4
-    4e90:	e1a00005 	mov	r0, r5
-    4e94:	eb003f28 	bl	14b3c <__gesf2>
-    4e98:	e3500000 	cmp	r0, #0	; 0x0
-    4e9c:	e59f6bb8 	ldr	r6, [pc, #3000]	; 5a5c <.text+0x5a5c>
-    4ea0:	ca000049 	bgt	4fcc <processCtrl+0x194>
-    4ea4:	e2844102 	add	r4, r4, #-2147483648	; 0x80000000
-    4ea8:	e1a00005 	mov	r0, r5
-    4eac:	e1a01004 	mov	r1, r4
-    4eb0:	eb003f23 	bl	14b44 <__lesf2>
-    4eb4:	e3500000 	cmp	r0, #0	; 0x0
-    4eb8:	ba000043 	blt	4fcc <processCtrl+0x194>
-    4ebc:	e5db2009 	ldrb	r2, [fp, #9]
-    4ec0:	e5db3008 	ldrb	r3, [fp, #8]
-    4ec4:	e5db100a 	ldrb	r1, [fp, #10]
-    4ec8:	e1833402 	orr	r3, r3, r2, lsl #8
-    4ecc:	e5db000b 	ldrb	r0, [fp, #11]
-    4ed0:	e1833801 	orr	r3, r3, r1, lsl #16
-    4ed4:	e5995004 	ldr	r5, [r9, #4]
-    4ed8:	e1834c00 	orr	r4, r3, r0, lsl #24
-    4edc:	e1a01004 	mov	r1, r4
-    4ee0:	e1a00005 	mov	r0, r5
-    4ee4:	eb003f14 	bl	14b3c <__gesf2>
-    4ee8:	e3500000 	cmp	r0, #0	; 0x0
-    4eec:	e59f6b68 	ldr	r6, [pc, #2920]	; 5a5c <.text+0x5a5c>
-    4ef0:	ca000033 	bgt	4fc4 <processCtrl+0x18c>
-    4ef4:	e2844102 	add	r4, r4, #-2147483648	; 0x80000000
-    4ef8:	e1a00005 	mov	r0, r5
-    4efc:	e1a01004 	mov	r1, r4
-    4f00:	eb003f0f 	bl	14b44 <__lesf2>
-    4f04:	e3500000 	cmp	r0, #0	; 0x0
-    4f08:	ba00002d 	blt	4fc4 <processCtrl+0x18c>
-    4f0c:	e5db200d 	ldrb	r2, [fp, #13]
-    4f10:	e5db300c 	ldrb	r3, [fp, #12]
-    4f14:	e5db100e 	ldrb	r1, [fp, #14]
-    4f18:	e1833402 	orr	r3, r3, r2, lsl #8
-    4f1c:	e5db000f 	ldrb	r0, [fp, #15]
-    4f20:	e1833801 	orr	r3, r3, r1, lsl #16
-    4f24:	e5995008 	ldr	r5, [r9, #8]
-    4f28:	e1834c00 	orr	r4, r3, r0, lsl #24
-    4f2c:	e1a01004 	mov	r1, r4
-    4f30:	e1a00005 	mov	r0, r5
-    4f34:	eb003f00 	bl	14b3c <__gesf2>
-    4f38:	e3500000 	cmp	r0, #0	; 0x0
-    4f3c:	e59f6b18 	ldr	r6, [pc, #2840]	; 5a5c <.text+0x5a5c>
-    4f40:	ca00001d 	bgt	4fbc <processCtrl+0x184>
-    4f44:	e2844102 	add	r4, r4, #-2147483648	; 0x80000000
-    4f48:	e1a00005 	mov	r0, r5
-    4f4c:	e1a01004 	mov	r1, r4
-    4f50:	eb003efb 	bl	14b44 <__lesf2>
-    4f54:	e3500000 	cmp	r0, #0	; 0x0
-    4f58:	ba000017 	blt	4fbc <processCtrl+0x184>
-    4f5c:	e5db2011 	ldrb	r2, [fp, #17]
-    4f60:	e5db3010 	ldrb	r3, [fp, #16]
-    4f64:	e5db1012 	ldrb	r1, [fp, #18]
-    4f68:	e5db0013 	ldrb	r0, [fp, #19]
-    4f6c:	e1833402 	orr	r3, r3, r2, lsl #8
-    4f70:	e1833801 	orr	r3, r3, r1, lsl #16
-    4f74:	e599500c 	ldr	r5, [r9, #12]
-    4f78:	e1834c00 	orr	r4, r3, r0, lsl #24
-    4f7c:	e1a01004 	mov	r1, r4
-    4f80:	e1a00005 	mov	r0, r5
-    4f84:	eb003eec 	bl	14b3c <__gesf2>
-    4f88:	e59f6acc 	ldr	r6, [pc, #2764]	; 5a5c <.text+0x5a5c>
-    4f8c:	e3500000 	cmp	r0, #0	; 0x0
-    4f90:	c586400c 	strgt	r4, [r6, #12]
-    4f94:	ca000005 	bgt	4fb0 <processCtrl+0x178>
-    4f98:	e1a00005 	mov	r0, r5
-    4f9c:	e3a01000 	mov	r1, #0	; 0x0
-    4fa0:	eb003ee7 	bl	14b44 <__lesf2>
-    4fa4:	e3500000 	cmp	r0, #0	; 0x0
-    4fa8:	b3a03000 	movlt	r3, #0	; 0x0
-    4fac:	b586300c 	strlt	r3, [r6, #12]
-    4fb0:	e28dd060 	add	sp, sp, #96	; 0x60
-    4fb4:	e8bd4ff0 	ldmia	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
-    4fb8:	e12fff1e 	bx	lr
-    4fbc:	e5864008 	str	r4, [r6, #8]
-    4fc0:	eaffffe5 	b	4f5c <processCtrl+0x124>
-    4fc4:	e5864004 	str	r4, [r6, #4]
-    4fc8:	eaffffcf 	b	4f0c <processCtrl+0xd4>
-    4fcc:	e5864000 	str	r4, [r6]
-    4fd0:	eaffffb9 	b	4ebc <processCtrl+0x84>
-    4fd4:	e3a03000 	mov	r3, #0	; 0x0
-    4fd8:	e5c13008 	strb	r3, [r1, #8]
-    4fdc:	ebfffcda 	bl	434c <pidParamUpdate>
-    4fe0:	e59f3a6c 	ldr	r3, [pc, #2668]	; 5a54 <.text+0x5a54>
-    4fe4:	e5d32000 	ldrb	r2, [r3]
-    4fe8:	e3520005 	cmp	r2, #5	; 0x5
-    4fec:	159fba64 	ldrne	fp, [pc, #2660]	; 5a58 <.text+0x5a58>
-    4ff0:	159f9a64 	ldrne	r9, [pc, #2660]	; 5a5c <.text+0x5a5c>
-    4ff4:	1affff9c 	bne	4e6c <processCtrl+0x34>
-    4ff8:	e59f1a60 	ldr	r1, [pc, #2656]	; 5a60 <.text+0x5a60>
-    4ffc:	e5910014 	ldr	r0, [r1, #20]
-    5000:	ebfffbf7 	bl	3fe4 <LLToSIAngleRoll>
-    5004:	e59f2a54 	ldr	r2, [pc, #2644]	; 5a60 <.text+0x5a60>
-    5008:	e1a04000 	mov	r4, r0
-    500c:	e5920010 	ldr	r0, [r2, #16]
-    5010:	ebfffc63 	bl	41a4 <LLToSIAnglePitch>
-    5014:	eb003b79 	bl	13e00 <__aeabi_f2d>
-    5018:	e59f3a44 	ldr	r3, [pc, #2628]	; 5a64 <.text+0x5a64>
-    501c:	e1a06000 	mov	r6, r0
-    5020:	e5930000 	ldr	r0, [r3]
-    5024:	e1a07001 	mov	r7, r1
-    5028:	eb003b74 	bl	13e00 <__aeabi_f2d>
-    502c:	e58d001c 	str	r0, [sp, #28]
-    5030:	e58d1020 	str	r1, [sp, #32]
-    5034:	e1a00006 	mov	r0, r6
-    5038:	e1a01007 	mov	r1, r7
-    503c:	eb00403e 	bl	1513c <__sin_from_arm>
-    5040:	e1a0a000 	mov	sl, r0
-    5044:	e1a00004 	mov	r0, r4
-    5048:	e1a0b001 	mov	fp, r1
-    504c:	eb003b6b 	bl	13e00 <__aeabi_f2d>
-    5050:	e1a04000 	mov	r4, r0
-    5054:	e1a05001 	mov	r5, r1
-    5058:	eb004037 	bl	1513c <__sin_from_arm>
-    505c:	e59f3a04 	ldr	r3, [pc, #2564]	; 5a68 <.text+0x5a68>
-    5060:	e58d0024 	str	r0, [sp, #36]
-    5064:	e58d1028 	str	r1, [sp, #40]
-    5068:	e5930000 	ldr	r0, [r3]
-    506c:	eb003b63 	bl	13e00 <__aeabi_f2d>
-    5070:	e58d002c 	str	r0, [sp, #44]
-    5074:	e58d1030 	str	r1, [sp, #48]
-    5078:	e1a00004 	mov	r0, r4
-    507c:	e1a01005 	mov	r1, r5
-    5080:	eb004021 	bl	1510c <__cos_from_arm>
-    5084:	e59f39e0 	ldr	r3, [pc, #2528]	; 5a6c <.text+0x5a6c>
-    5088:	e58d0034 	str	r0, [sp, #52]
-    508c:	e58d1038 	str	r1, [sp, #56]
-    5090:	e5930000 	ldr	r0, [r3]
-    5094:	eb003b59 	bl	13e00 <__aeabi_f2d>
-    5098:	e1a04000 	mov	r4, r0
-    509c:	e1a05001 	mov	r5, r1
-    50a0:	e1a00006 	mov	r0, r6
-    50a4:	e1a01007 	mov	r1, r7
-    50a8:	eb004017 	bl	1510c <__cos_from_arm>
-    50ac:	e1a02000 	mov	r2, r0
-    50b0:	e1a03001 	mov	r3, r1
-    50b4:	e1a00004 	mov	r0, r4
-    50b8:	e1a01005 	mov	r1, r5
-    50bc:	eb003b7f 	bl	13ec0 <__aeabi_dmul>
-    50c0:	e1a0200a 	mov	r2, sl
-    50c4:	e1a04000 	mov	r4, r0
-    50c8:	e1a05001 	mov	r5, r1
-    50cc:	e1a0300b 	mov	r3, fp
-    50d0:	e28d001c 	add	r0, sp, #28	; 0x1c
-    50d4:	e8900003 	ldmia	r0, {r0, r1}
-    50d8:	eb003b78 	bl	13ec0 <__aeabi_dmul>
-    50dc:	e28d2024 	add	r2, sp, #36	; 0x24
-    50e0:	e892000c 	ldmia	r2, {r2, r3}
-    50e4:	eb003b75 	bl	13ec0 <__aeabi_dmul>
-    50e8:	e1a02000 	mov	r2, r0
-    50ec:	e1a03001 	mov	r3, r1
-    50f0:	e1a00004 	mov	r0, r4
-    50f4:	e1a01005 	mov	r1, r5
-    50f8:	eb003a67 	bl	13a9c <__adddf3>
-    50fc:	e28d202c 	add	r2, sp, #44	; 0x2c
-    5100:	e892000c 	ldmia	r2, {r2, r3}
-    5104:	e1a04000 	mov	r4, r0
-    5108:	e1a05001 	mov	r5, r1
-    510c:	e1a0000a 	mov	r0, sl
-    5110:	e1a0100b 	mov	r1, fp
-    5114:	eb003b69 	bl	13ec0 <__aeabi_dmul>
-    5118:	e28d2034 	add	r2, sp, #52	; 0x34
-    511c:	e892000c 	ldmia	r2, {r2, r3}
-    5120:	eb003b66 	bl	13ec0 <__aeabi_dmul>
-    5124:	e1a02000 	mov	r2, r0
-    5128:	e1a03001 	mov	r3, r1
-    512c:	e1a00004 	mov	r0, r4
-    5130:	e1a01005 	mov	r1, r5
-    5134:	eb003a58 	bl	13a9c <__adddf3>
-    5138:	eb003cee 	bl	144f8 <__aeabi_d2f>
-    513c:	e28d2034 	add	r2, sp, #52	; 0x34
-    5140:	e892000c 	ldmia	r2, {r2, r3}
-    5144:	e58d0048 	str	r0, [sp, #72]
-    5148:	e28d001c 	add	r0, sp, #28	; 0x1c
-    514c:	e8900003 	ldmia	r0, {r0, r1}
-    5150:	eb003b5a 	bl	13ec0 <__aeabi_dmul>
-    5154:	e28d202c 	add	r2, sp, #44	; 0x2c
-    5158:	e892000c 	ldmia	r2, {r2, r3}
-    515c:	e1a04000 	mov	r4, r0
-    5160:	e1a05001 	mov	r5, r1
-    5164:	e28d0024 	add	r0, sp, #36	; 0x24
-    5168:	e8900003 	ldmia	r0, {r0, r1}
-    516c:	eb003b53 	bl	13ec0 <__aeabi_dmul>
-    5170:	e1a02000 	mov	r2, r0
-    5174:	e1a03001 	mov	r3, r1
-    5178:	e1a00004 	mov	r0, r4
-    517c:	e1a01005 	mov	r1, r5
-    5180:	eb003a44 	bl	13a98 <__aeabi_dsub>
-    5184:	eb003cdb 	bl	144f8 <__aeabi_d2f>
-    5188:	e59f58e0 	ldr	r5, [pc, #2272]	; 5a70 <.text+0x5a70>
-    518c:	e58d004c 	str	r0, [sp, #76]
-    5190:	e59f48dc 	ldr	r4, [pc, #2268]	; 5a74 <.text+0x5a74>
-    5194:	e5955000 	ldr	r5, [r5]
-    5198:	e5d4100d 	ldrb	r1, [r4, #13]
-    519c:	e5d4200c 	ldrb	r2, [r4, #12]
-    51a0:	e5d4c00e 	ldrb	ip, [r4, #14]
-    51a4:	e5d4e00f 	ldrb	lr, [r4, #15]
-    51a8:	e5d40011 	ldrb	r0, [r4, #17]
-    51ac:	e5d43010 	ldrb	r3, [r4, #16]
-    51b0:	e59f68bc 	ldr	r6, [pc, #2236]	; 5a74 <.text+0x5a74>
-    51b4:	e5d44012 	ldrb	r4, [r4, #18]
-    51b8:	e58d503c 	str	r5, [sp, #60]
-    51bc:	e1822401 	orr	r2, r2, r1, lsl #8
-    51c0:	e59f78b0 	ldr	r7, [pc, #2224]	; 5a78 <.text+0x5a78>
-    51c4:	e5d61013 	ldrb	r1, [r6, #19]
-    51c8:	e182280c 	orr	r2, r2, ip, lsl #16
-    51cc:	e1833400 	orr	r3, r3, r0, lsl #8
-    51d0:	e5977000 	ldr	r7, [r7]
-    51d4:	e1826c0e 	orr	r6, r2, lr, lsl #24
-    51d8:	e1833804 	orr	r3, r3, r4, lsl #16
-    51dc:	e1835c01 	orr	r5, r3, r1, lsl #24
-    51e0:	e1a00006 	mov	r0, r6
-    51e4:	e59d103c 	ldr	r1, [sp, #60]
-    51e8:	e58d7040 	str	r7, [sp, #64]
-    51ec:	eb003d94 	bl	14844 <__aeabi_fmul>
-    51f0:	e59d1040 	ldr	r1, [sp, #64]
-    51f4:	e1a04000 	mov	r4, r0
-    51f8:	e1a00005 	mov	r0, r5
-    51fc:	eb003d90 	bl	14844 <__aeabi_fmul>
-    5200:	e1a01000 	mov	r1, r0
-    5204:	e1a00004 	mov	r0, r4
-    5208:	eb003ce5 	bl	145a4 <__addsf3>
-    520c:	e1a01005 	mov	r1, r5
-    5210:	e58d0050 	str	r0, [sp, #80]
-    5214:	e59d003c 	ldr	r0, [sp, #60]
-    5218:	eb003d89 	bl	14844 <__aeabi_fmul>
-    521c:	e59d1040 	ldr	r1, [sp, #64]
-    5220:	e1a04000 	mov	r4, r0
-    5224:	e1a00006 	mov	r0, r6
-    5228:	eb003d85 	bl	14844 <__aeabi_fmul>
-    522c:	e1a01000 	mov	r1, r0
-    5230:	e1a00004 	mov	r0, r4
-    5234:	eb003cd9 	bl	145a0 <__aeabi_fsub>
-    5238:	e59fa834 	ldr	sl, [pc, #2100]	; 5a74 <.text+0x5a74>
-    523c:	e58d0054 	str	r0, [sp, #84]
-    5240:	e59fb810 	ldr	fp, [pc, #2064]	; 5a58 <.text+0x5a58>
-    5244:	e5da3015 	ldrb	r3, [sl, #21]
-    5248:	e5da2014 	ldrb	r2, [sl, #20]
-    524c:	e5dbc001 	ldrb	ip, [fp, #1]
-    5250:	e5dae016 	ldrb	lr, [sl, #22]
-    5254:	e1a01000 	mov	r1, r0
-    5258:	e59d0048 	ldr	r0, [sp, #72]
-    525c:	e58dc044 	str	ip, [sp, #68]
-    5260:	e1822403 	orr	r2, r2, r3, lsl #8
-    5264:	e59dc04c 	ldr	ip, [sp, #76]
-    5268:	e182e80e 	orr	lr, r2, lr, lsl #16
-    526c:	e1a02c20 	mov	r2, r0, lsr #24
-    5270:	e5da9017 	ldrb	r9, [sl, #23]
-    5274:	e58de004 	str	lr, [sp, #4]
-    5278:	e58d2010 	str	r2, [sp, #16]
-    527c:	e1a0282c 	mov	r2, ip, lsr #16
-    5280:	e58d200c 	str	r2, [sp, #12]
-    5284:	e59d2004 	ldr	r2, [sp, #4]
-    5288:	e59d3050 	ldr	r3, [sp, #80]
-    528c:	e59d5044 	ldr	r5, [sp, #68]
-    5290:	e1a0ec21 	mov	lr, r1, lsr #24
-    5294:	e1a04c2c 	mov	r4, ip, lsr #24
-    5298:	e1829c09 	orr	r9, r2, r9, lsl #24
-    529c:	e59f27d8 	ldr	r2, [pc, #2008]	; 5a7c <.text+0x5a7c>
-    52a0:	e58de018 	str	lr, [sp, #24]
-    52a4:	e58d4008 	str	r4, [sp, #8]
-    52a8:	e1a06821 	mov	r6, r1, lsr #16
-    52ac:	e1a04823 	mov	r4, r3, lsr #16
-    52b0:	e1a0a820 	mov	sl, r0, lsr #16
-    52b4:	e1a08c23 	mov	r8, r3, lsr #24
-    52b8:	e3550002 	cmp	r5, #2	; 0x2
-    52bc:	e1a0e423 	mov	lr, r3, lsr #8
-    52c0:	e1a05421 	mov	r5, r1, lsr #8
-    52c4:	e58da014 	str	sl, [sp, #20]
-    52c8:	e58d9058 	str	r9, [sp, #88]
-    52cc:	e5c2e02f 	strb	lr, [r2, #47]
-    52d0:	e5c24030 	strb	r4, [r2, #48]
-    52d4:	e5c28031 	strb	r8, [r2, #49]
-    52d8:	e5c25033 	strb	r5, [r2, #51]
-    52dc:	e5c26034 	strb	r6, [r2, #52]
-    52e0:	e59d4018 	ldr	r4, [sp, #24]
-    52e4:	e1a07420 	mov	r7, r0, lsr #8
-    52e8:	e5c24035 	strb	r4, [r2, #53]
-    52ec:	e5c2703f 	strb	r7, [r2, #63]
-    52f0:	e59d5014 	ldr	r5, [sp, #20]
-    52f4:	e5c25040 	strb	r5, [r2, #64]
-    52f8:	e59d6010 	ldr	r6, [sp, #16]
-    52fc:	e1a0a42c 	mov	sl, ip, lsr #8
-    5300:	e5c2a043 	strb	sl, [r2, #67]
-    5304:	e5c26041 	strb	r6, [r2, #65]
-    5308:	e59d700c 	ldr	r7, [sp, #12]
-    530c:	e5c27044 	strb	r7, [r2, #68]
-    5310:	e59da008 	ldr	sl, [sp, #8]
-    5314:	e5c2302e 	strb	r3, [r2, #46]
-    5318:	e5c2a045 	strb	sl, [r2, #69]
-    531c:	e5c21032 	strb	r1, [r2, #50]
-    5320:	e5c2003e 	strb	r0, [r2, #62]
-    5324:	e5c2c042 	strb	ip, [r2, #66]
-    5328:	0a0000b6 	beq	5608 <processCtrl+0x7d0>
-    532c:	e59dc044 	ldr	ip, [sp, #68]
-    5330:	e35c0003 	cmp	ip, #3	; 0x3
-    5334:	0a00017b 	beq	5928 <processCtrl+0xaf0>
-    5338:	e59d7044 	ldr	r7, [sp, #68]
-    533c:	e3570001 	cmp	r7, #1	; 0x1
-    5340:	0a00009a 	beq	55b0 <processCtrl+0x778>
-    5344:	e59da044 	ldr	sl, [sp, #68]
-    5348:	e35a0000 	cmp	sl, #0	; 0x0
-    534c:	059f9708 	ldreq	r9, [pc, #1800]	; 5a5c <.text+0x5a5c>
-    5350:	03a03000 	moveq	r3, #0	; 0x0
-    5354:	059f6724 	ldreq	r6, [pc, #1828]	; 5a80 <.text+0x5a80>
-    5358:	05893004 	streq	r3, [r9, #4]
-    535c:	159f671c 	ldrne	r6, [pc, #1820]	; 5a80 <.text+0x5a80>
-    5360:	159f96f4 	ldrne	r9, [pc, #1780]	; 5a5c <.text+0x5a5c>
-    5364:	e5963018 	ldr	r3, [r6, #24]
-    5368:	e5dbc000 	ldrb	ip, [fp]
-    536c:	e59fe708 	ldr	lr, [pc, #1800]	; 5a7c <.text+0x5a7c>
-    5370:	e1a00c23 	mov	r0, r3, lsr #24
-    5374:	e1a02423 	mov	r2, r3, lsr #8
-    5378:	e1a01823 	mov	r1, r3, lsr #16
-    537c:	e35c0002 	cmp	ip, #2	; 0x2
-    5380:	e5ce205b 	strb	r2, [lr, #91]
-    5384:	e5ce105c 	strb	r1, [lr, #92]
-    5388:	e5ce005d 	strb	r0, [lr, #93]
-    538c:	e5ce305a 	strb	r3, [lr, #90]
-    5390:	e1a0600e 	mov	r6, lr
-    5394:	0a000106 	beq	57b4 <processCtrl+0x97c>
-    5398:	e35c0003 	cmp	ip, #3	; 0x3
-    539c:	0a000144 	beq	58b4 <processCtrl+0xa7c>
-    53a0:	e35c0001 	cmp	ip, #1	; 0x1
-    53a4:	0a000076 	beq	5584 <processCtrl+0x74c>
-    53a8:	e35c0000 	cmp	ip, #0	; 0x0
-    53ac:	03a03000 	moveq	r3, #0	; 0x0
-    53b0:	059f76cc 	ldreq	r7, [pc, #1740]	; 5a84 <.text+0x5a84>
-    53b4:	05893000 	streq	r3, [r9]
-    53b8:	159f76c4 	ldrne	r7, [pc, #1732]	; 5a84 <.text+0x5a84>
-    53bc:	e5dbc003 	ldrb	ip, [fp, #3]
-    53c0:	e5973018 	ldr	r3, [r7, #24]
-    53c4:	e59f46b0 	ldr	r4, [pc, #1712]	; 5a7c <.text+0x5a7c>
-    53c8:	e35c0000 	cmp	ip, #0	; 0x0
-    53cc:	e1a00c23 	mov	r0, r3, lsr #24
-    53d0:	e1a02423 	mov	r2, r3, lsr #8
-    53d4:	e1a01823 	mov	r1, r3, lsr #16
-    53d8:	e5c4305e 	strb	r3, [r4, #94]
-    53dc:	03a03000 	moveq	r3, #0	; 0x0
-    53e0:	e5c4205f 	strb	r2, [r4, #95]
-    53e4:	e5c41060 	strb	r1, [r4, #96]
-    53e8:	e5c40061 	strb	r0, [r4, #97]
-    53ec:	0589300c 	streq	r3, [r9, #12]
-    53f0:	0a00003b 	beq	54e4 <processCtrl+0x6ac>
-    53f4:	e35c0002 	cmp	ip, #2	; 0x2
-    53f8:	e599800c 	ldr	r8, [r9, #12]
-    53fc:	0a000167 	beq	59a0 <processCtrl+0xb68>
-    5400:	e35c0003 	cmp	ip, #3	; 0x3
-    5404:	0a000181 	beq	5a10 <processCtrl+0xbd8>
-    5408:	e35c0001 	cmp	ip, #1	; 0x1
-    540c:	0a000049 	beq	5538 <processCtrl+0x700>
-    5410:	e599700c 	ldr	r7, [r9, #12]
-    5414:	e1a00008 	mov	r0, r8
-    5418:	e1a01007 	mov	r1, r7
-    541c:	eb003c5f 	bl	145a0 <__aeabi_fsub>
-    5420:	eb003a76 	bl	13e00 <__aeabi_f2d>
-    5424:	e5db2021 	ldrb	r2, [fp, #33]
-    5428:	e5db3020 	ldrb	r3, [fp, #32]
-    542c:	e1a05000 	mov	r5, r0
-    5430:	e5db0022 	ldrb	r0, [fp, #34]
-    5434:	e1833402 	orr	r3, r3, r2, lsl #8
-    5438:	e1a06001 	mov	r6, r1
-    543c:	e5db1023 	ldrb	r1, [fp, #35]
-    5440:	e1833800 	orr	r3, r3, r0, lsl #16
-    5444:	e1834c01 	orr	r4, r3, r1, lsl #24
-    5448:	e1a00004 	mov	r0, r4
-    544c:	eb003a6b 	bl	13e00 <__aeabi_f2d>
-    5450:	e1a02000 	mov	r2, r0
-    5454:	e1a03001 	mov	r3, r1
-    5458:	e1a00005 	mov	r0, r5
-    545c:	e1a01006 	mov	r1, r6
-    5460:	eb003bbd 	bl	1435c <__gedf2>
-    5464:	e3500000 	cmp	r0, #0	; 0x0
-    5468:	e59fa5ec 	ldr	sl, [pc, #1516]	; 5a5c <.text+0x5a5c>
-    546c:	ca00000e 	bgt	54ac <processCtrl+0x674>
-    5470:	e2840102 	add	r0, r4, #-2147483648	; 0x80000000
-    5474:	eb003a61 	bl	13e00 <__aeabi_f2d>
-    5478:	e1a02000 	mov	r2, r0
-    547c:	e1a03001 	mov	r3, r1
-    5480:	e1a00005 	mov	r0, r5
-    5484:	e1a01006 	mov	r1, r6
-    5488:	eb003bb5 	bl	14364 <__ledf2>
-    548c:	e3500000 	cmp	r0, #0	; 0x0
-    5490:	a58a800c 	strge	r8, [sl, #12]
-    5494:	aa000008 	bge	54bc <processCtrl+0x684>
-    5498:	e1a00007 	mov	r0, r7
-    549c:	e1a01004 	mov	r1, r4
-    54a0:	eb003c3e 	bl	145a0 <__aeabi_fsub>
-    54a4:	e58a000c 	str	r0, [sl, #12]
-    54a8:	ea000003 	b	54bc <processCtrl+0x684>
-    54ac:	e1a00007 	mov	r0, r7
-    54b0:	e1a01004 	mov	r1, r4
-    54b4:	eb003c3a 	bl	145a4 <__addsf3>
-    54b8:	e58a000c 	str	r0, [sl, #12]
-    54bc:	e59fc5c4 	ldr	ip, [pc, #1476]	; 5a88 <.text+0x5a88>
-    54c0:	e59c3018 	ldr	r3, [ip, #24]
-    54c4:	e59fe5b0 	ldr	lr, [pc, #1456]	; 5a7c <.text+0x5a7c>
-    54c8:	e1a00c23 	mov	r0, r3, lsr #24
-    54cc:	e1a02423 	mov	r2, r3, lsr #8
-    54d0:	e1a01823 	mov	r1, r3, lsr #16
-    54d4:	e5ce2067 	strb	r2, [lr, #103]
-    54d8:	e5ce1068 	strb	r1, [lr, #104]
-    54dc:	e5ce0069 	strb	r0, [lr, #105]
-    54e0:	e5ce3066 	strb	r3, [lr, #102]
-    54e4:	e5db3002 	ldrb	r3, [fp, #2]
-    54e8:	e3530002 	cmp	r3, #2	; 0x2
-    54ec:	159f5598 	ldrne	r5, [pc, #1432]	; 5a8c <.text+0x5a8c>
-    54f0:	0a000085 	beq	570c <processCtrl+0x8d4>
-    54f4:	e3530003 	cmp	r3, #3	; 0x3
-    54f8:	0a000017 	beq	555c <processCtrl+0x724>
-    54fc:	e3530001 	cmp	r3, #1	; 0x1
-    5500:	0a000036 	beq	55e0 <processCtrl+0x7a8>
-    5504:	e3530000 	cmp	r3, #0	; 0x0
-    5508:	03a03000 	moveq	r3, #0	; 0x0
-    550c:	05893008 	streq	r3, [r9, #8]
-    5510:	e5953018 	ldr	r3, [r5, #24]
-    5514:	e59fa560 	ldr	sl, [pc, #1376]	; 5a7c <.text+0x5a7c>
-    5518:	e1a02c23 	mov	r2, r3, lsr #24
-    551c:	e1a01423 	mov	r1, r3, lsr #8
-    5520:	e1a00823 	mov	r0, r3, lsr #16
-    5524:	e5ca2065 	strb	r2, [sl, #101]
-    5528:	e5ca1063 	strb	r1, [sl, #99]
-    552c:	e5ca0064 	strb	r0, [sl, #100]
-    5530:	e5ca3062 	strb	r3, [sl, #98]
-    5534:	eafffe4c 	b	4e6c <processCtrl+0x34>
-    5538:	e59f3550 	ldr	r3, [pc, #1360]	; 5a90 <.text+0x5a90>
-    553c:	e5d3200c 	ldrb	r2, [r3, #12]
-    5540:	e5d3100d 	ldrb	r1, [r3, #13]
-    5544:	e5d3000e 	ldrb	r0, [r3, #14]
-    5548:	e1822401 	orr	r2, r2, r1, lsl #8
-    554c:	e5d3c00f 	ldrb	ip, [r3, #15]
-    5550:	e1822800 	orr	r2, r2, r0, lsl #16
-    5554:	e1828c0c 	orr	r8, r2, ip, lsl #24
-    5558:	eaffffac 	b	5410 <processCtrl+0x5d8>
-    555c:	e59f3530 	ldr	r3, [pc, #1328]	; 5a94 <.text+0x5a94>
-    5560:	e5d3200c 	ldrb	r2, [r3, #12]
-    5564:	e5d3100d 	ldrb	r1, [r3, #13]
-    5568:	e5d3c00e 	ldrb	ip, [r3, #14]
-    556c:	e5d3000f 	ldrb	r0, [r3, #15]
-    5570:	e1822401 	orr	r2, r2, r1, lsl #8
-    5574:	e182280c 	orr	r2, r2, ip, lsl #16
-    5578:	e1823c00 	orr	r3, r2, r0, lsl #24
-    557c:	e5893008 	str	r3, [r9, #8]
-    5580:	eaffffe2 	b	5510 <processCtrl+0x6d8>
-    5584:	e59f3504 	ldr	r3, [pc, #1284]	; 5a90 <.text+0x5a90>
-    5588:	e5d32000 	ldrb	r2, [r3]
-    558c:	e5d31001 	ldrb	r1, [r3, #1]
-    5590:	e5d30002 	ldrb	r0, [r3, #2]
-    5594:	e5d3c003 	ldrb	ip, [r3, #3]
-    5598:	e1822401 	orr	r2, r2, r1, lsl #8
-    559c:	e1822800 	orr	r2, r2, r0, lsl #16
-    55a0:	e59f74dc 	ldr	r7, [pc, #1244]	; 5a84 <.text+0x5a84>
-    55a4:	e1823c0c 	orr	r3, r2, ip, lsl #24
-    55a8:	e5893000 	str	r3, [r9]
-    55ac:	eaffff82 	b	53bc <processCtrl+0x584>
-    55b0:	e59f34d8 	ldr	r3, [pc, #1240]	; 5a90 <.text+0x5a90>
-    55b4:	e5d32004 	ldrb	r2, [r3, #4]
-    55b8:	e5d31005 	ldrb	r1, [r3, #5]
-    55bc:	e5d30006 	ldrb	r0, [r3, #6]
-    55c0:	e5d3c007 	ldrb	ip, [r3, #7]
-    55c4:	e1822401 	orr	r2, r2, r1, lsl #8
-    55c8:	e1822800 	orr	r2, r2, r0, lsl #16
-    55cc:	e59f9488 	ldr	r9, [pc, #1160]	; 5a5c <.text+0x5a5c>
-    55d0:	e59f64a8 	ldr	r6, [pc, #1192]	; 5a80 <.text+0x5a80>
-    55d4:	e1823c0c 	orr	r3, r2, ip, lsl #24
-    55d8:	e5893004 	str	r3, [r9, #4]
-    55dc:	eaffff60 	b	5364 <processCtrl+0x52c>
-    55e0:	e59f34a8 	ldr	r3, [pc, #1192]	; 5a90 <.text+0x5a90>
-    55e4:	e5d32008 	ldrb	r2, [r3, #8]
-    55e8:	e5d31009 	ldrb	r1, [r3, #9]
-    55ec:	e5d3c00a 	ldrb	ip, [r3, #10]
-    55f0:	e5d3000b 	ldrb	r0, [r3, #11]
-    55f4:	e1822401 	orr	r2, r2, r1, lsl #8
-    55f8:	e182280c 	orr	r2, r2, ip, lsl #16
-    55fc:	e1823c00 	orr	r3, r2, r0, lsl #24
-    5600:	e5893008 	str	r3, [r9, #8]
-    5604:	eaffffc1 	b	5510 <processCtrl+0x6d8>
-    5608:	e59f4488 	ldr	r4, [pc, #1160]	; 5a98 <.text+0x5a98>
-    560c:	e59fc460 	ldr	ip, [pc, #1120]	; 5a74 <.text+0x5a74>
-    5610:	e59f545c 	ldr	r5, [pc, #1116]	; 5a74 <.text+0x5a74>
-    5614:	e5d43001 	ldrb	r3, [r4, #1]
-    5618:	e5dc2001 	ldrb	r2, [ip, #1]
-    561c:	e5dc1000 	ldrb	r1, [ip]
-    5620:	e5d40000 	ldrb	r0, [r4]
-    5624:	e5d4c002 	ldrb	ip, [r4, #2]
-    5628:	e5d5e002 	ldrb	lr, [r5, #2]
-    562c:	e1800403 	orr	r0, r0, r3, lsl #8
-    5630:	e1811402 	orr	r1, r1, r2, lsl #8
-    5634:	e5d43003 	ldrb	r3, [r4, #3]
-    5638:	e5d52003 	ldrb	r2, [r5, #3]
-    563c:	e180080c 	orr	r0, r0, ip, lsl #16
-    5640:	e181180e 	orr	r1, r1, lr, lsl #16
-    5644:	e1811c02 	orr	r1, r1, r2, lsl #24
-    5648:	e1800c03 	orr	r0, r0, r3, lsl #24
-    564c:	eb003bd3 	bl	145a0 <__aeabi_fsub>
-    5650:	e1a01000 	mov	r1, r0
-    5654:	e59d003c 	ldr	r0, [sp, #60]
-    5658:	eb003c79 	bl	14844 <__aeabi_fmul>
-    565c:	e59f6410 	ldr	r6, [pc, #1040]	; 5a74 <.text+0x5a74>
-    5660:	e5d42005 	ldrb	r2, [r4, #5]
-    5664:	e5d63005 	ldrb	r3, [r6, #5]
-    5668:	e5d61004 	ldrb	r1, [r6, #4]
-    566c:	e1a05000 	mov	r5, r0
-    5670:	e5d40004 	ldrb	r0, [r4, #4]
-    5674:	e5d4c006 	ldrb	ip, [r4, #6]
-    5678:	e5d6e006 	ldrb	lr, [r6, #6]
-    567c:	e1800402 	orr	r0, r0, r2, lsl #8
-    5680:	e1811403 	orr	r1, r1, r3, lsl #8
-    5684:	e5d42007 	ldrb	r2, [r4, #7]
-    5688:	e5d63007 	ldrb	r3, [r6, #7]
-    568c:	e180080c 	orr	r0, r0, ip, lsl #16
-    5690:	e181180e 	orr	r1, r1, lr, lsl #16
-    5694:	e1811c03 	orr	r1, r1, r3, lsl #24
-    5698:	e1800c02 	orr	r0, r0, r2, lsl #24
-    569c:	eb003bbf 	bl	145a0 <__aeabi_fsub>
-    56a0:	e1a01000 	mov	r1, r0
-    56a4:	e59d0040 	ldr	r0, [sp, #64]
-    56a8:	eb003c65 	bl	14844 <__aeabi_fmul>
-    56ac:	e1a01000 	mov	r1, r0
-    56b0:	e1a00005 	mov	r0, r5
-    56b4:	eb003bba 	bl	145a4 <__addsf3>
-    56b8:	e59f63c0 	ldr	r6, [pc, #960]	; 5a80 <.text+0x5a80>
-    56bc:	e59d7050 	ldr	r7, [sp, #80]
-    56c0:	e1a04000 	mov	r4, r0
-    56c4:	e59fc3d0 	ldr	ip, [pc, #976]	; 5a9c <.text+0x5a9c>
-    56c8:	e5963010 	ldr	r3, [r6, #16]
-    56cc:	e2872102 	add	r2, r7, #-2147483648	; 0x80000000
-    56d0:	e1a01004 	mov	r1, r4
-    56d4:	e1a00006 	mov	r0, r6
-    56d8:	e58dc000 	str	ip, [sp]
-    56dc:	ebfffd80 	bl	4ce4 <pidCalc>
-    56e0:	e59fa394 	ldr	sl, [pc, #916]	; 5a7c <.text+0x5a7c>
-    56e4:	e59f9370 	ldr	r9, [pc, #880]	; 5a5c <.text+0x5a5c>
-    56e8:	e1a0cc24 	mov	ip, r4, lsr #24
-    56ec:	e1a02424 	mov	r2, r4, lsr #8
-    56f0:	e1a01824 	mov	r1, r4, lsr #16
-    56f4:	e5890004 	str	r0, [r9, #4]
-    56f8:	e5ca206b 	strb	r2, [sl, #107]
-    56fc:	e5ca106c 	strb	r1, [sl, #108]
-    5700:	e5cac06d 	strb	ip, [sl, #109]
-    5704:	e5ca406a 	strb	r4, [sl, #106]
-    5708:	eaffff15 	b	5364 <processCtrl+0x52c>
-    570c:	e59f3384 	ldr	r3, [pc, #900]	; 5a98 <.text+0x5a98>
-    5710:	e59f035c 	ldr	r0, [pc, #860]	; 5a74 <.text+0x5a74>
-    5714:	e59f4358 	ldr	r4, [pc, #856]	; 5a74 <.text+0x5a74>
-    5718:	e5d3200c 	ldrb	r2, [r3, #12]
-    571c:	e5d01020 	ldrb	r1, [r0, #32]
-    5720:	e5d3000d 	ldrb	r0, [r3, #13]
-    5724:	e5d3e00e 	ldrb	lr, [r3, #14]
-    5728:	e5d4c021 	ldrb	ip, [r4, #33]
-    572c:	e59f5340 	ldr	r5, [pc, #832]	; 5a74 <.text+0x5a74>
-    5730:	e5d44022 	ldrb	r4, [r4, #34]
-    5734:	e1822400 	orr	r2, r2, r0, lsl #8
-    5738:	e59f7320 	ldr	r7, [pc, #800]	; 5a60 <.text+0x5a60>
-    573c:	e5d3000f 	ldrb	r0, [r3, #15]
-    5740:	e182280e 	orr	r2, r2, lr, lsl #16
-    5744:	e181140c 	orr	r1, r1, ip, lsl #8
-    5748:	e5d5c023 	ldrb	ip, [r5, #35]
-    574c:	e1811804 	orr	r1, r1, r4, lsl #16
-    5750:	e1825c00 	orr	r5, r2, r0, lsl #24
-    5754:	e5970024 	ldr	r0, [r7, #36]
-    5758:	e1816c0c 	orr	r6, r1, ip, lsl #24
-    575c:	ebfffa33 	bl	4030 <LLToSIAngleRateYaw>
-    5760:	e1a01006 	mov	r1, r6
-    5764:	e1a04000 	mov	r4, r0
-    5768:	e1a00005 	mov	r0, r5
-    576c:	eb003b8b 	bl	145a0 <__aeabi_fsub>
-    5770:	e28d3060 	add	r3, sp, #96	; 0x60
-    5774:	e5230004 	str	r0, [r3, #-4]!
-    5778:	e59f530c 	ldr	r5, [pc, #780]	; 5a8c <.text+0x5a8c>
-    577c:	e1a00003 	mov	r0, r3
-    5780:	eb000764 	bl	7518 <normalizeSIAnglePi>
-    5784:	e2844102 	add	r4, r4, #-2147483648	; 0x80000000
-    5788:	e59fc30c 	ldr	ip, [pc, #780]	; 5a9c <.text+0x5a9c>
-    578c:	e3a035fe 	mov	r3, #1065353216	; 0x3f800000
-    5790:	e59d105c 	ldr	r1, [sp, #92]
-    5794:	e1a02004 	mov	r2, r4
-    5798:	e1a00005 	mov	r0, r5
-    579c:	e58dc000 	str	ip, [sp]
-    57a0:	ebfffd4f 	bl	4ce4 <pidCalc>
-    57a4:	e59f32ac 	ldr	r3, [pc, #684]	; 5a58 <.text+0x5a58>
-    57a8:	e5d33002 	ldrb	r3, [r3, #2]
-    57ac:	e5890008 	str	r0, [r9, #8]
-    57b0:	eaffff4f 	b	54f4 <processCtrl+0x6bc>
-    57b4:	e59f42dc 	ldr	r4, [pc, #732]	; 5a98 <.text+0x5a98>
-    57b8:	e59f02b4 	ldr	r0, [pc, #692]	; 5a74 <.text+0x5a74>
-    57bc:	e59f52b0 	ldr	r5, [pc, #688]	; 5a74 <.text+0x5a74>
-    57c0:	e59f72ac 	ldr	r7, [pc, #684]	; 5a74 <.text+0x5a74>
-    57c4:	e5d52005 	ldrb	r2, [r5, #5]
-    57c8:	e5d43005 	ldrb	r3, [r4, #5]
-    57cc:	e5d01004 	ldrb	r1, [r0, #4]
-    57d0:	e5d40004 	ldrb	r0, [r4, #4]
-    57d4:	e5d4e006 	ldrb	lr, [r4, #6]
-    57d8:	e5d55006 	ldrb	r5, [r5, #6]
-    57dc:	e5d4c007 	ldrb	ip, [r4, #7]
-    57e0:	e1811402 	orr	r1, r1, r2, lsl #8
-    57e4:	e1800403 	orr	r0, r0, r3, lsl #8
-    57e8:	e5d73007 	ldrb	r3, [r7, #7]
-    57ec:	e180080e 	orr	r0, r0, lr, lsl #16
-    57f0:	e1811805 	orr	r1, r1, r5, lsl #16
-    57f4:	e59fa274 	ldr	sl, [pc, #628]	; 5a70 <.text+0x5a70>
-    57f8:	e1811c03 	orr	r1, r1, r3, lsl #24
-    57fc:	e1800c0c 	orr	r0, r0, ip, lsl #24
-    5800:	eb003b66 	bl	145a0 <__aeabi_fsub>
-    5804:	e59a1000 	ldr	r1, [sl]
-    5808:	eb003c0d 	bl	14844 <__aeabi_fmul>
-    580c:	e5d42001 	ldrb	r2, [r4, #1]
-    5810:	e5d73001 	ldrb	r3, [r7, #1]
-    5814:	e5d71000 	ldrb	r1, [r7]
-    5818:	e1a05000 	mov	r5, r0
-    581c:	e5d40000 	ldrb	r0, [r4]
-    5820:	e5d7e002 	ldrb	lr, [r7, #2]
-    5824:	e5d4c002 	ldrb	ip, [r4, #2]
-    5828:	e1800402 	orr	r0, r0, r2, lsl #8
-    582c:	e1811403 	orr	r1, r1, r3, lsl #8
-    5830:	e5d42003 	ldrb	r2, [r4, #3]
-    5834:	e5d73003 	ldrb	r3, [r7, #3]
-    5838:	e181180e 	orr	r1, r1, lr, lsl #16
-    583c:	e180080c 	orr	r0, r0, ip, lsl #16
-    5840:	e1811c03 	orr	r1, r1, r3, lsl #24
-    5844:	e1800c02 	orr	r0, r0, r2, lsl #24
-    5848:	eb003b54 	bl	145a0 <__aeabi_fsub>
-    584c:	e59fc224 	ldr	ip, [pc, #548]	; 5a78 <.text+0x5a78>
-    5850:	e59c1000 	ldr	r1, [ip]
-    5854:	eb003bfa 	bl	14844 <__aeabi_fmul>
-    5858:	e1a01000 	mov	r1, r0
-    585c:	e1a00005 	mov	r0, r5
-    5860:	eb003b4e 	bl	145a0 <__aeabi_fsub>
-    5864:	e59f7218 	ldr	r7, [pc, #536]	; 5a84 <.text+0x5a84>
-    5868:	e59de054 	ldr	lr, [sp, #84]
-    586c:	e1a04000 	mov	r4, r0
-    5870:	e59fc224 	ldr	ip, [pc, #548]	; 5a9c <.text+0x5a9c>
-    5874:	e5973010 	ldr	r3, [r7, #16]
-    5878:	e28e2102 	add	r2, lr, #-2147483648	; 0x80000000
-    587c:	e1a01004 	mov	r1, r4
-    5880:	e1a00007 	mov	r0, r7
-    5884:	e58dc000 	str	ip, [sp]
-    5888:	ebfffd15 	bl	4ce4 <pidCalc>
-    588c:	e1a02c24 	mov	r2, r4, lsr #24
-    5890:	e280c102 	add	ip, r0, #-2147483648	; 0x80000000
-    5894:	e1a01424 	mov	r1, r4, lsr #8
-    5898:	e1a00824 	mov	r0, r4, lsr #16
-    589c:	e5c62071 	strb	r2, [r6, #113]
-    58a0:	e589c000 	str	ip, [r9]
-    58a4:	e5c6106f 	strb	r1, [r6, #111]
-    58a8:	e5c60070 	strb	r0, [r6, #112]
-    58ac:	e5c6406e 	strb	r4, [r6, #110]
-    58b0:	eafffec1 	b	53bc <processCtrl+0x584>
-    58b4:	e59f31d8 	ldr	r3, [pc, #472]	; 5a94 <.text+0x5a94>
-    58b8:	e5d32005 	ldrb	r2, [r3, #5]
-    58bc:	e5d30004 	ldrb	r0, [r3, #4]
-    58c0:	e5d3c006 	ldrb	ip, [r3, #6]
-    58c4:	e5d31007 	ldrb	r1, [r3, #7]
-    58c8:	e1800402 	orr	r0, r0, r2, lsl #8
-    58cc:	e180080c 	orr	r0, r0, ip, lsl #16
-    58d0:	e1800c01 	orr	r0, r0, r1, lsl #24
-    58d4:	e59d1054 	ldr	r1, [sp, #84]
-    58d8:	eb003b30 	bl	145a0 <__aeabi_fsub>
-    58dc:	e1a01000 	mov	r1, r0
-    58e0:	e1a0c421 	mov	ip, r1, lsr #8
-    58e4:	e59d004c 	ldr	r0, [sp, #76]
-    58e8:	e5c6c03b 	strb	ip, [r6, #59]
-    58ec:	e59fc1a8 	ldr	ip, [pc, #424]	; 5a9c <.text+0x5a9c>
-    58f0:	e1a05c21 	mov	r5, r1, lsr #24
-    58f4:	e1a0e821 	mov	lr, r1, lsr #16
-    58f8:	e2802102 	add	r2, r0, #-2147483648	; 0x80000000
-    58fc:	e3a035fe 	mov	r3, #1065353216	; 0x3f800000
-    5900:	e5c6503d 	strb	r5, [r6, #61]
-    5904:	e5c6e03c 	strb	lr, [r6, #60]
-    5908:	e59f0190 	ldr	r0, [pc, #400]	; 5aa0 <.text+0x5aa0>
-    590c:	e58dc000 	str	ip, [sp]
-    5910:	e5c6103a 	strb	r1, [r6, #58]
-    5914:	ebfffcf2 	bl	4ce4 <pidCalc>
-    5918:	e59f7164 	ldr	r7, [pc, #356]	; 5a84 <.text+0x5a84>
-    591c:	e2803102 	add	r3, r0, #-2147483648	; 0x80000000
-    5920:	e5893000 	str	r3, [r9]
-    5924:	eafffea4 	b	53bc <processCtrl+0x584>
-    5928:	e59f3164 	ldr	r3, [pc, #356]	; 5a94 <.text+0x5a94>
-    592c:	e5d32001 	ldrb	r2, [r3, #1]
-    5930:	e5d30000 	ldrb	r0, [r3]
-    5934:	e5d3c002 	ldrb	ip, [r3, #2]
-    5938:	e5d31003 	ldrb	r1, [r3, #3]
-    593c:	e1800402 	orr	r0, r0, r2, lsl #8
-    5940:	e180080c 	orr	r0, r0, ip, lsl #16
-    5944:	e1800c01 	orr	r0, r0, r1, lsl #24
-    5948:	e59d1050 	ldr	r1, [sp, #80]
-    594c:	eb003b13 	bl	145a0 <__aeabi_fsub>
-    5950:	e59f6124 	ldr	r6, [pc, #292]	; 5a7c <.text+0x5a7c>
-    5954:	e59de048 	ldr	lr, [sp, #72]
-    5958:	e1a0c420 	mov	ip, r0, lsr #8
-    595c:	e5c6c037 	strb	ip, [r6, #55]
-    5960:	e59fc134 	ldr	ip, [pc, #308]	; 5a9c <.text+0x5a9c>
-    5964:	e1a01000 	mov	r1, r0
-    5968:	e28e2102 	add	r2, lr, #-2147483648	; 0x80000000
-    596c:	e1a05c20 	mov	r5, r0, lsr #24
-    5970:	e1a0e820 	mov	lr, r0, lsr #16
-    5974:	e5c6e038 	strb	lr, [r6, #56]
-    5978:	e5c65039 	strb	r5, [r6, #57]
-    597c:	e59f0120 	ldr	r0, [pc, #288]	; 5aa4 <.text+0x5aa4>
-    5980:	e58dc000 	str	ip, [sp]
-    5984:	e3a035fe 	mov	r3, #1065353216	; 0x3f800000
-    5988:	e5c61036 	strb	r1, [r6, #54]
-    598c:	ebfffcd4 	bl	4ce4 <pidCalc>
-    5990:	e59f90c4 	ldr	r9, [pc, #196]	; 5a5c <.text+0x5a5c>
-    5994:	e59f60e4 	ldr	r6, [pc, #228]	; 5a80 <.text+0x5a80>
-    5998:	e5890004 	str	r0, [r9, #4]
-    599c:	eafffe70 	b	5364 <processCtrl+0x52c>
-    59a0:	e59f30f0 	ldr	r3, [pc, #240]	; 5a98 <.text+0x5a98>
-    59a4:	e59f50c8 	ldr	r5, [pc, #200]	; 5a74 <.text+0x5a74>
-    59a8:	e5d32009 	ldrb	r2, [r3, #9]
-    59ac:	e5d5c009 	ldrb	ip, [r5, #9]
-    59b0:	e5d51008 	ldrb	r1, [r5, #8]
-    59b4:	e5d30008 	ldrb	r0, [r3, #8]
-    59b8:	e59f60b4 	ldr	r6, [pc, #180]	; 5a74 <.text+0x5a74>
-    59bc:	e5d3400a 	ldrb	r4, [r3, #10]
-    59c0:	e5d5500a 	ldrb	r5, [r5, #10]
-    59c4:	e1800402 	orr	r0, r0, r2, lsl #8
-    59c8:	e181140c 	orr	r1, r1, ip, lsl #8
-    59cc:	e5d6200b 	ldrb	r2, [r6, #11]
-    59d0:	e5d3e00b 	ldrb	lr, [r3, #11]
-    59d4:	e1800804 	orr	r0, r0, r4, lsl #16
-    59d8:	e1811805 	orr	r1, r1, r5, lsl #16
-    59dc:	e1811c02 	orr	r1, r1, r2, lsl #24
-    59e0:	e1800c0e 	orr	r0, r0, lr, lsl #24
-    59e4:	eb003aed 	bl	145a0 <__aeabi_fsub>
-    59e8:	e59d7058 	ldr	r7, [sp, #88]
-    59ec:	e1a01000 	mov	r1, r0
-    59f0:	e59f0090 	ldr	r0, [pc, #144]	; 5a88 <.text+0x5a88>
-    59f4:	e2872102 	add	r2, r7, #-2147483648	; 0x80000000
-    59f8:	e59fc09c 	ldr	ip, [pc, #156]	; 5a9c <.text+0x5a9c>
-    59fc:	e3a035fe 	mov	r3, #1065353216	; 0x3f800000
-    5a00:	e58dc000 	str	ip, [sp]
-    5a04:	ebfffcb6 	bl	4ce4 <pidCalc>
-    5a08:	e1a08000 	mov	r8, r0
-    5a0c:	eafffe7f 	b	5410 <processCtrl+0x5d8>
-    5a10:	e59f307c 	ldr	r3, [pc, #124]	; 5a94 <.text+0x5a94>
-    5a14:	e5d32009 	ldrb	r2, [r3, #9]
-    5a18:	e5d30008 	ldrb	r0, [r3, #8]
-    5a1c:	e5d3c00a 	ldrb	ip, [r3, #10]
-    5a20:	e5d3100b 	ldrb	r1, [r3, #11]
-    5a24:	e1800402 	orr	r0, r0, r2, lsl #8
-    5a28:	e180080c 	orr	r0, r0, ip, lsl #16
-    5a2c:	e1800c01 	orr	r0, r0, r1, lsl #24
-    5a30:	e59d1058 	ldr	r1, [sp, #88]
-    5a34:	eb003ad9 	bl	145a0 <__aeabi_fsub>
-    5a38:	e59fa028 	ldr	sl, [pc, #40]	; 5a68 <.text+0x5a68>
-    5a3c:	e59a3000 	ldr	r3, [sl]
-    5a40:	e1a01000 	mov	r1, r0
-    5a44:	e59f005c 	ldr	r0, [pc, #92]	; 5aa8 <.text+0x5aa8>
-    5a48:	e2832102 	add	r2, r3, #-2147483648	; 0x80000000
-    5a4c:	eaffffe9 	b	59f8 <processCtrl+0xbc0>
-    5a50:	400012a4 	andmi	r1, r0, r4, lsr #5
-    5a54:	40001108 	andmi	r1, r0, r8, lsl #2
-    5a58:	4000110a 	andmi	r1, r0, sl, lsl #2
-    5a5c:	40001244 	andmi	r1, r0, r4, asr #4
-    5a60:	40000d50 	andmi	r0, r0, r0, asr sp
-    5a64:	400013d0 	ldrmid	r1, [r0], -r0
-    5a68:	400013c4 	andmi	r1, r0, r4, asr #7
-    5a6c:	400013c8 	andmi	r1, r0, r8, asr #7
-    5a70:	400013d4 	ldrmid	r1, [r0], -r4
-    5a74:	40001268 	andmi	r1, r0, r8, ror #4
-    5a78:	400013cc 	andmi	r1, r0, ip, asr #7
-    5a7c:	40000fcc 	andmi	r0, r0, ip, asr #31
-    5a80:	40001310 	andmi	r1, r0, r0, lsl r3
-    5a84:	4000137c 	andmi	r1, r0, ip, ror r3
-    5a88:	40001334 	andmi	r1, r0, r4, lsr r3
-    5a8c:	400012ec 	andmi	r1, r0, ip, ror #5
-    5a90:	400012ac 	andmi	r1, r0, ip, lsr #5
-    5a94:	400010f2 	strmid	r1, [r0], -r2
-    5a98:	40001142 	andmi	r1, r0, r2, asr #2
-    5a9c:	3a83126f 	bcc	fe0ca460 <VPBDIV+0x1dece360>
-    5aa0:	400012c8 	andmi	r1, r0, r8, asr #5
-    5aa4:	40001358 	andmi	r1, r0, r8, asr r3
-    5aa8:	400013a0 	andmi	r1, r0, r0, lsr #7
-
-00005aac <InitKalPos>:
-    5aac:	e3a03000 	mov	r3, #0	; 0x0
-    5ab0:	e58030a8 	str	r3, [r0, #168]
-    5ab4:	e52de004 	str	lr, [sp, #-4]!
-    5ab8:	e1a01000 	mov	r1, r0
-    5abc:	e1a0e000 	mov	lr, r0
-    5ac0:	e1a02000 	mov	r2, r0
-    5ac4:	e3a0c000 	mov	ip, #0	; 0x0
-    5ac8:	e35c0000 	cmp	ip, #0	; 0x0
-    5acc:	e3a03000 	mov	r3, #0	; 0x0
-    5ad0:	e3a005fe 	mov	r0, #1065353216	; 0x3f800000
-    5ad4:	0a000033 	beq	5ba8 <InitKalPos+0xfc>
-    5ad8:	e35c0001 	cmp	ip, #1	; 0x1
-    5adc:	e5823000 	str	r3, [r2]
-    5ae0:	e5823060 	str	r3, [r2, #96]
-    5ae4:	e5823040 	str	r3, [r2, #64]
-    5ae8:	e5823030 	str	r3, [r2, #48]
-    5aec:	e5823010 	str	r3, [r2, #16]
-    5af0:	0a000025 	beq	5b8c <InitKalPos+0xe0>
-    5af4:	e28cc001 	add	ip, ip, #1	; 0x1
-    5af8:	e3a03000 	mov	r3, #0	; 0x0
-    5afc:	e35c0002 	cmp	ip, #2	; 0x2
-    5b00:	e5823004 	str	r3, [r2, #4]
-    5b04:	e5823064 	str	r3, [r2, #100]
-    5b08:	e5823044 	str	r3, [r2, #68]
-    5b0c:	e5823034 	str	r3, [r2, #52]
-    5b10:	e5823014 	str	r3, [r2, #20]
-    5b14:	e281100c 	add	r1, r1, #12	; 0xc
-    5b18:	e2822008 	add	r2, r2, #8	; 0x8
-    5b1c:	1affffe9 	bne	5ac8 <InitKalPos+0x1c>
-    5b20:	e3a0c000 	mov	ip, #0	; 0x0
-    5b24:	e1a0300e 	mov	r3, lr
-    5b28:	e3a02000 	mov	r2, #0	; 0x0
-    5b2c:	e2822001 	add	r2, r2, #1	; 0x1
-    5b30:	e3520002 	cmp	r2, #2	; 0x2
-    5b34:	e583c080 	str	ip, [r3, #128]
-    5b38:	e583c070 	str	ip, [r3, #112]
-    5b3c:	e583c020 	str	ip, [r3, #32]
-    5b40:	e583c084 	str	ip, [r3, #132]
-    5b44:	e583c074 	str	ip, [r3, #116]
-    5b48:	e583c024 	str	ip, [r3, #36]
-    5b4c:	e2833008 	add	r3, r3, #8	; 0x8
-    5b50:	1afffff5 	bne	5b2c <InitKalPos+0x80>
-    5b54:	e59e2090 	ldr	r2, [lr, #144]
-    5b58:	e59e1094 	ldr	r1, [lr, #148]
-    5b5c:	e59e0098 	ldr	r0, [lr, #152]
-    5b60:	e59e309c 	ldr	r3, [lr, #156]
-    5b64:	e58ec0b8 	str	ip, [lr, #184]
-    5b68:	e58e308c 	str	r3, [lr, #140]
-    5b6c:	e58e2070 	str	r2, [lr, #112]
-    5b70:	e58e107c 	str	r1, [lr, #124]
-    5b74:	e58e0080 	str	r0, [lr, #128]
-    5b78:	e58ec0bc 	str	ip, [lr, #188]
-    5b7c:	e58ec0b4 	str	ip, [lr, #180]
-    5b80:	e58ec0c0 	str	ip, [lr, #192]
-    5b84:	e49de004 	ldr	lr, [sp], #4
-    5b88:	e12fff1e 	bx	lr
-    5b8c:	e3a035fe 	mov	r3, #1065353216	; 0x3f800000
-    5b90:	e5813000 	str	r3, [r1]
-    5b94:	e5813060 	str	r3, [r1, #96]
-    5b98:	e5813040 	str	r3, [r1, #64]
-    5b9c:	e5813030 	str	r3, [r1, #48]
-    5ba0:	e5813010 	str	r3, [r1, #16]
-    5ba4:	eaffffdd 	b	5b20 <InitKalPos+0x74>
-    5ba8:	e5810000 	str	r0, [r1]
-    5bac:	e5810060 	str	r0, [r1, #96]
-    5bb0:	e5810040 	str	r0, [r1, #64]
-    5bb4:	e5810030 	str	r0, [r1, #48]
-    5bb8:	e5810010 	str	r0, [r1, #16]
-    5bbc:	eaffffcc 	b	5af4 <InitKalPos+0x48>
-
-00005bc0 <InitKalYaw>:
-    5bc0:	e5902014 	ldr	r2, [r0, #20]
-    5bc4:	e5901018 	ldr	r1, [r0, #24]
-    5bc8:	e3a03000 	mov	r3, #0	; 0x0
-    5bcc:	e3a0c5fe 	mov	ip, #1065353216	; 0x3f800000
-    5bd0:	e580301c 	str	r3, [r0, #28]
-    5bd4:	e580200c 	str	r2, [r0, #12]
-    5bd8:	e5801010 	str	r1, [r0, #16]
-    5bdc:	e580c004 	str	ip, [r0, #4]
-    5be0:	e580c008 	str	ip, [r0, #8]
-    5be4:	e5803024 	str	r3, [r0, #36]
-    5be8:	e5803020 	str	r3, [r0, #32]
-    5bec:	e12fff1e 	bx	lr
-
-00005bf0 <resetKalmanFilter>:
-    5bf0:	e52de004 	str	lr, [sp, #-4]!
-    5bf4:	e59f001c 	ldr	r0, [pc, #28]	; 5c18 <.text+0x5c18>
-    5bf8:	ebffffab 	bl	5aac <InitKalPos>
-    5bfc:	e59f0018 	ldr	r0, [pc, #24]	; 5c1c <.text+0x5c1c>
-    5c00:	ebffffa9 	bl	5aac <InitKalPos>
-    5c04:	e59f0014 	ldr	r0, [pc, #20]	; 5c20 <.text+0x5c20>
-    5c08:	ebffffa7 	bl	5aac <InitKalPos>
-    5c0c:	e59f0010 	ldr	r0, [pc, #16]	; 5c24 <.text+0x5c24>
-    5c10:	e49de004 	ldr	lr, [sp], #4
-    5c14:	eaffffe9 	b	5bc0 <InitKalYaw>
-    5c18:	40000ddc 	ldrmid	r0, [r0], -ip
-    5c1c:	40000c18 	andmi	r0, r0, r8, lsl ip
-    5c20:	40000ea0 	andmi	r0, r0, r0, lsr #29
-    5c24:	40000be0 	andmi	r0, r0, r0, ror #23
-
-00005c28 <CorrectYaw>:
-    5c28:	e92d4030 	stmdb	sp!, {r4, r5, lr}
-    5c2c:	e5905004 	ldr	r5, [r0, #4]
-    5c30:	e24dd004 	sub	sp, sp, #4	; 0x4
-    5c34:	e1a04000 	mov	r4, r0
-    5c38:	e5901010 	ldr	r1, [r0, #16]
-    5c3c:	e1a00005 	mov	r0, r5
-    5c40:	eb003a57 	bl	145a4 <__addsf3>
-    5c44:	e1a01000 	mov	r1, r0
-    5c48:	e1a00005 	mov	r0, r5
-    5c4c:	eb003b62 	bl	149dc <__aeabi_fdiv>
-    5c50:	e5941020 	ldr	r1, [r4, #32]
-    5c54:	e5840000 	str	r0, [r4]
-    5c58:	e5940024 	ldr	r0, [r4, #36]
-    5c5c:	eb003a4f 	bl	145a0 <__aeabi_fsub>
-    5c60:	e28d3004 	add	r3, sp, #4	; 0x4
-    5c64:	e5230004 	str	r0, [r3, #-4]!
-    5c68:	e1a0000d 	mov	r0, sp
-    5c6c:	eb000629 	bl	7518 <normalizeSIAnglePi>
-    5c70:	e59d1000 	ldr	r1, [sp]
-    5c74:	e5940000 	ldr	r0, [r4]
-    5c78:	eb003af1 	bl	14844 <__aeabi_fmul>
-    5c7c:	e1a01000 	mov	r1, r0
-    5c80:	e5940020 	ldr	r0, [r4, #32]
-    5c84:	eb003a46 	bl	145a4 <__addsf3>
-    5c88:	e5840020 	str	r0, [r4, #32]
-    5c8c:	e2840020 	add	r0, r4, #32	; 0x20
-    5c90:	eb0005fc 	bl	7488 <normalizeSIAngle2Pi>
-    5c94:	e5941000 	ldr	r1, [r4]
-    5c98:	e3a005fe 	mov	r0, #1065353216	; 0x3f800000
-    5c9c:	eb003a3f 	bl	145a0 <__aeabi_fsub>
-    5ca0:	e5941004 	ldr	r1, [r4, #4]
-    5ca4:	eb003ae6 	bl	14844 <__aeabi_fmul>
-    5ca8:	e5840008 	str	r0, [r4, #8]
-    5cac:	e28dd004 	add	sp, sp, #4	; 0x4
-    5cb0:	e8bd4030 	ldmia	sp!, {r4, r5, lr}
-    5cb4:	e12fff1e 	bx	lr
-
-00005cb8 <PredictYaw>:
-    5cb8:	e92d4010 	stmdb	sp!, {r4, lr}
-    5cbc:	e1a04000 	mov	r4, r0
-    5cc0:	e1a00001 	mov	r0, r1
-    5cc4:	e594101c 	ldr	r1, [r4, #28]
-    5cc8:	eb003add 	bl	14844 <__aeabi_fmul>
-    5ccc:	e1a01000 	mov	r1, r0
-    5cd0:	e5940020 	ldr	r0, [r4, #32]
-    5cd4:	eb003a32 	bl	145a4 <__addsf3>
-    5cd8:	e5840020 	str	r0, [r4, #32]
-    5cdc:	e2840020 	add	r0, r4, #32	; 0x20
-    5ce0:	eb0005e8 	bl	7488 <normalizeSIAngle2Pi>
-    5ce4:	e5940008 	ldr	r0, [r4, #8]
-    5ce8:	e594100c 	ldr	r1, [r4, #12]
-    5cec:	eb003a2c 	bl	145a4 <__addsf3>
-    5cf0:	e5840004 	str	r0, [r4, #4]
-    5cf4:	e8bd4010 	ldmia	sp!, {r4, lr}
-    5cf8:	e12fff1e 	bx	lr
-
-00005cfc <CorrectPos>:
-    5cfc:	e92d41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
-    5d00:	e1a04000 	mov	r4, r0
-    5d04:	e24dd028 	sub	sp, sp, #40	; 0x28
-    5d08:	e2808030 	add	r8, r0, #48	; 0x30
-    5d0c:	e1a0200d 	mov	r2, sp
-    5d10:	e28d5010 	add	r5, sp, #16	; 0x10
-    5d14:	e1a00008 	mov	r0, r8
-    5d18:	e2841080 	add	r1, r4, #128	; 0x80
-    5d1c:	eb000296 	bl	677c <addMatrix2>
-    5d20:	e2846020 	add	r6, r4, #32	; 0x20
-    5d24:	e1a0000d 	mov	r0, sp
-    5d28:	e1a01005 	mov	r1, r5
-    5d2c:	eb0004c6 	bl	704c <invert2>
-    5d30:	e1a01005 	mov	r1, r5
-    5d34:	e1a00008 	mov	r0, r8
-    5d38:	e1a02006 	mov	r2, r6
-    5d3c:	e28450bc 	add	r5, r4, #188	; 0xbc
-    5d40:	eb000387 	bl	6b64 <multMatrix2>
-    5d44:	e1a02005 	mov	r2, r5
-    5d48:	e28400b4 	add	r0, r4, #180	; 0xb4
-    5d4c:	e28410ac 	add	r1, r4, #172	; 0xac
-    5d50:	eb000329 	bl	69fc <subVector2>
-    5d54:	e28d2020 	add	r2, sp, #32	; 0x20
-    5d58:	e1a00006 	mov	r0, r6
-    5d5c:	e1a01005 	mov	r1, r5
-    5d60:	eb0003c5 	bl	6c7c <multMatVec2>
-    5d64:	e59d1020 	ldr	r1, [sp, #32]
-    5d68:	e59400ac 	ldr	r0, [r4, #172]
-    5d6c:	eb003a0c 	bl	145a4 <__addsf3>
-    5d70:	e58400ac 	str	r0, [r4, #172]
-    5d74:	e59d1024 	ldr	r1, [sp, #36]
-    5d78:	e59400b0 	ldr	r0, [r4, #176]
-    5d7c:	eb003a08 	bl	145a4 <__addsf3>
-    5d80:	e1a01006 	mov	r1, r6
-    5d84:	e58400b0 	str	r0, [r4, #176]
-    5d88:	e1a0200d 	mov	r2, sp
-    5d8c:	e2840060 	add	r0, r4, #96	; 0x60
-    5d90:	eb0002d0 	bl	68d8 <subMatrix2>
-    5d94:	e1a0000d 	mov	r0, sp
-    5d98:	e1a01008 	mov	r1, r8
-    5d9c:	e2842040 	add	r2, r4, #64	; 0x40
-    5da0:	e1a0700d 	mov	r7, sp
-    5da4:	eb00036e 	bl	6b64 <multMatrix2>
-    5da8:	e28dd028 	add	sp, sp, #40	; 0x28
-    5dac:	e8bd41f0 	ldmia	sp!, {r4, r5, r6, r7, r8, lr}
-    5db0:	e12fff1e 	bx	lr
-
-00005db4 <PredictPos>:
-    5db4:	e92d40f0 	stmdb	sp!, {r4, r5, r6, r7, lr}
-    5db8:	e1a04000 	mov	r4, r0
-    5dbc:	e24dd030 	sub	sp, sp, #48	; 0x30
-    5dc0:	e5841004 	str	r1, [r4, #4]
-    5dc4:	e5841018 	str	r1, [r4, #24]
-    5dc8:	e1a00001 	mov	r0, r1
-    5dcc:	e1a05001 	mov	r5, r1
-    5dd0:	eb003a9b 	bl	14844 <__aeabi_fmul>
-    5dd4:	e3a0143f 	mov	r1, #1056964608	; 0x3f000000
-    5dd8:	eb003a99 	bl	14844 <__aeabi_fmul>
-    5ddc:	e28d7028 	add	r7, sp, #40	; 0x28
-    5de0:	e28460ac 	add	r6, r4, #172	; 0xac
-    5de4:	e58400a0 	str	r0, [r4, #160]
-    5de8:	e58450a4 	str	r5, [r4, #164]
-    5dec:	e28400a0 	add	r0, r4, #160	; 0xa0
-    5df0:	e28d5020 	add	r5, sp, #32	; 0x20
-    5df4:	e59410a8 	ldr	r1, [r4, #168]
-    5df8:	e1a02007 	mov	r2, r7
-    5dfc:	eb000594 	bl	7454 <VectmultSc2>
-    5e00:	e1a00004 	mov	r0, r4
-    5e04:	e1a01006 	mov	r1, r6
-    5e08:	e1a02005 	mov	r2, r5
-    5e0c:	eb00039a 	bl	6c7c <multMatVec2>
-    5e10:	e1a00005 	mov	r0, r5
-    5e14:	e1a01007 	mov	r1, r7
-    5e18:	e1a02006 	mov	r2, r6
-    5e1c:	eb00029f 	bl	68a0 <addVector2>
-    5e20:	e28d6010 	add	r6, sp, #16	; 0x10
-    5e24:	e1a00004 	mov	r0, r4
-    5e28:	e2841040 	add	r1, r4, #64	; 0x40
-    5e2c:	e1a0200d 	mov	r2, sp
-    5e30:	eb00034b 	bl	6b64 <multMatrix2>
-    5e34:	e1a0000d 	mov	r0, sp
-    5e38:	e2841010 	add	r1, r4, #16	; 0x10
-    5e3c:	e1a02006 	mov	r2, r6
-    5e40:	eb000347 	bl	6b64 <multMatrix2>
-    5e44:	e1a01006 	mov	r1, r6
-    5e48:	e2842030 	add	r2, r4, #48	; 0x30
-    5e4c:	e2840070 	add	r0, r4, #112	; 0x70
-    5e50:	e1a0500d 	mov	r5, sp
-    5e54:	eb000248 	bl	677c <addMatrix2>
-    5e58:	e28dd030 	add	sp, sp, #48	; 0x30
-    5e5c:	e8bd40f0 	ldmia	sp!, {r4, r5, r6, r7, lr}
-    5e60:	e12fff1e 	bx	lr
-
-00005e64 <KFilter>:
-    5e64:	e92d4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
-    5e68:	e59fa434 	ldr	sl, [pc, #1076]	; 62a4 <.text+0x62a4>
-    5e6c:	e59a007c 	ldr	r0, [sl, #124]
-    5e70:	e1a00800 	mov	r0, r0, lsl #16
-    5e74:	e24dd098 	sub	sp, sp, #152	; 0x98
-    5e78:	e1a00840 	mov	r0, r0, asr #16
-    5e7c:	ebfff7e5 	bl	3e18 <LLToSIClimb>
-    5e80:	e59f1454 	ldr	r1, [pc, #1108]	; 62dc <.text+0x62dc>
-    5e84:	e58d0084 	str	r0, [sp, #132]
-    5e88:	e5910000 	ldr	r0, [r1]
-    5e8c:	eb0037db 	bl	13e00 <__aeabi_f2d>
-    5e90:	e28f2ffd 	add	r2, pc, #1012	; 0x3f4
-    5e94:	e892000c 	ldmia	r2, {r2, r3}
-    5e98:	eb003808 	bl	13ec0 <__aeabi_dmul>
-    5e9c:	e1a04000 	mov	r4, r0
-    5ea0:	e59d0084 	ldr	r0, [sp, #132]
-    5ea4:	e1a05001 	mov	r5, r1
-    5ea8:	eb0037d4 	bl	13e00 <__aeabi_f2d>
-    5eac:	e28f2e3e 	add	r2, pc, #992	; 0x3e0
-    5eb0:	e892000c 	ldmia	r2, {r2, r3}
-    5eb4:	eb003801 	bl	13ec0 <__aeabi_dmul>
-    5eb8:	e1a03001 	mov	r3, r1
-    5ebc:	e1a02000 	mov	r2, r0
-    5ec0:	e1a01005 	mov	r1, r5
-    5ec4:	e1a00004 	mov	r0, r4
-    5ec8:	eb0036f3 	bl	13a9c <__adddf3>
-    5ecc:	eb003989 	bl	144f8 <__aeabi_d2f>
-    5ed0:	e59f2404 	ldr	r2, [pc, #1028]	; 62dc <.text+0x62dc>
-    5ed4:	e5820000 	str	r0, [r2]
-    5ed8:	e59a0014 	ldr	r0, [sl, #20]
-    5edc:	ebfff840 	bl	3fe4 <LLToSIAngleRoll>
-    5ee0:	e1a04000 	mov	r4, r0
-    5ee4:	e59a0010 	ldr	r0, [sl, #16]
-    5ee8:	ebfff8ad 	bl	41a4 <LLToSIAnglePitch>
-    5eec:	e1a06000 	mov	r6, r0
-    5ef0:	e59a0024 	ldr	r0, [sl, #36]
-    5ef4:	ebfff84d 	bl	4030 <LLToSIAngleRateYaw>
-    5ef8:	e59f23a8 	ldr	r2, [pc, #936]	; 62a8 <.text+0x62a8>
-    5efc:	e1d230b0 	ldrh	r3, [r2]
-    5f00:	e3530001 	cmp	r3, #1	; 0x1
-    5f04:	e58d0074 	str	r0, [sp, #116]
-    5f08:	0a0001a2 	beq	6598 <.text+0x6598>
-    5f0c:	e1a00004 	mov	r0, r4
-    5f10:	eb0037ba 	bl	13e00 <__aeabi_f2d>
-    5f14:	e1a04000 	mov	r4, r0
-    5f18:	e1a05001 	mov	r5, r1
-    5f1c:	eb003c7a 	bl	1510c <__cos_from_arm>
-    5f20:	eb003974 	bl	144f8 <__aeabi_d2f>
-    5f24:	e1a01005 	mov	r1, r5
-    5f28:	e58d0088 	str	r0, [sp, #136]
-    5f2c:	e1a00004 	mov	r0, r4
-    5f30:	eb003c81 	bl	1513c <__sin_from_arm>
-    5f34:	eb00396f 	bl	144f8 <__aeabi_d2f>
-    5f38:	e58d008c 	str	r0, [sp, #140]
-    5f3c:	e1a00006 	mov	r0, r6
-    5f40:	eb0037ae 	bl	13e00 <__aeabi_f2d>
-    5f44:	e1a04000 	mov	r4, r0
-    5f48:	e1a05001 	mov	r5, r1
-    5f4c:	eb003c6e 	bl	1510c <__cos_from_arm>
-    5f50:	eb003968 	bl	144f8 <__aeabi_d2f>
-    5f54:	e1a01005 	mov	r1, r5
-    5f58:	e58d0090 	str	r0, [sp, #144]
-    5f5c:	e1a00004 	mov	r0, r4
-    5f60:	eb003c75 	bl	1513c <__sin_from_arm>
-    5f64:	eb003963 	bl	144f8 <__aeabi_d2f>
-    5f68:	e59f433c 	ldr	r4, [pc, #828]	; 62ac <.text+0x62ac>
-    5f6c:	e5d43000 	ldrb	r3, [r4]
-    5f70:	e3530000 	cmp	r3, #0	; 0x0
-    5f74:	e58d0094 	str	r0, [sp, #148]
-    5f78:	0a000183 	beq	658c <.text+0x658c>
-    5f7c:	e59f336c 	ldr	r3, [pc, #876]	; 62f0 <.text+0x62f0>
-    5f80:	e5930020 	ldr	r0, [r3, #32]
-    5f84:	eb00379d 	bl	13e00 <__aeabi_f2d>
-    5f88:	e1a04000 	mov	r4, r0
-    5f8c:	e1a05001 	mov	r5, r1
-    5f90:	eb003c5d 	bl	1510c <__cos_from_arm>
-    5f94:	eb003957 	bl	144f8 <__aeabi_d2f>
-    5f98:	e59f6310 	ldr	r6, [pc, #784]	; 62b0 <.text+0x62b0>
-    5f9c:	e1a01005 	mov	r1, r5
-    5fa0:	e5860000 	str	r0, [r6]
-    5fa4:	e1a00004 	mov	r0, r4
-    5fa8:	eb003c63 	bl	1513c <__sin_from_arm>
-    5fac:	eb003951 	bl	144f8 <__aeabi_d2f>
-    5fb0:	e59f52fc 	ldr	r5, [pc, #764]	; 62b4 <.text+0x62b4>
-    5fb4:	e5850000 	str	r0, [r5]
-    5fb8:	e1da02f8 	ldrsh	r0, [sl, #40]
-    5fbc:	ebfff79e 	bl	3e3c <LLToSIAccX>
-    5fc0:	e59f42f0 	ldr	r4, [pc, #752]	; 62b8 <.text+0x62b8>
-    5fc4:	e5840000 	str	r0, [r4]
-    5fc8:	e1da02fa 	ldrsh	r0, [sl, #42]
-    5fcc:	ebfff7ac 	bl	3e84 <LLToSIAccY>
-    5fd0:	e59fc2e4 	ldr	ip, [pc, #740]	; 62bc <.text+0x62bc>
-    5fd4:	e58c0000 	str	r0, [ip]
-    5fd8:	e1da02fc 	ldrsh	r0, [sl, #44]
-    5fdc:	ebfff7bb 	bl	3ed0 <LLToSIAccZ>
-    5fe0:	e59f32d8 	ldr	r3, [pc, #728]	; 62c0 <.text+0x62c0>
-    5fe4:	e5944000 	ldr	r4, [r4]
-    5fe8:	e1a0a000 	mov	sl, r0
-    5fec:	e583a000 	str	sl, [r3]
-    5ff0:	e59d0090 	ldr	r0, [sp, #144]
-    5ff4:	e1a01004 	mov	r1, r4
-    5ff8:	e58d4068 	str	r4, [sp, #104]
-    5ffc:	eb003a10 	bl	14844 <__aeabi_fmul>
-    6000:	e59d1094 	ldr	r1, [sp, #148]
-    6004:	e58d0064 	str	r0, [sp, #100]
-    6008:	e59d008c 	ldr	r0, [sp, #140]
-    600c:	eb003a0c 	bl	14844 <__aeabi_fmul>
-    6010:	e59d1094 	ldr	r1, [sp, #148]
-    6014:	e58d0060 	str	r0, [sp, #96]
-    6018:	e59d0088 	ldr	r0, [sp, #136]
-    601c:	eb003a08 	bl	14844 <__aeabi_fmul>
-    6020:	e5966000 	ldr	r6, [r6]
-    6024:	e58d005c 	str	r0, [sp, #92]
-    6028:	e1a01006 	mov	r1, r6
-    602c:	e59d0064 	ldr	r0, [sp, #100]
-    6030:	e58d606c 	str	r6, [sp, #108]
-    6034:	eb003a02 	bl	14844 <__aeabi_fmul>
-    6038:	e59d106c 	ldr	r1, [sp, #108]
-    603c:	e1a0b000 	mov	fp, r0
-    6040:	e59d0060 	ldr	r0, [sp, #96]
-    6044:	eb0039fe 	bl	14844 <__aeabi_fmul>
-    6048:	e5955000 	ldr	r5, [r5]
-    604c:	e1a04000 	mov	r4, r0
-    6050:	e1a01005 	mov	r1, r5
-    6054:	e59d0088 	ldr	r0, [sp, #136]
-    6058:	eb0039f9 	bl	14844 <__aeabi_fmul>
-    605c:	e59f2258 	ldr	r2, [pc, #600]	; 62bc <.text+0x62bc>
-    6060:	e5922000 	ldr	r2, [r2]
-    6064:	e1a01000 	mov	r1, r0
-    6068:	e1a00004 	mov	r0, r4
-    606c:	e58d2070 	str	r2, [sp, #112]
-    6070:	eb00394a 	bl	145a0 <__aeabi_fsub>
-    6074:	e59d1070 	ldr	r1, [sp, #112]
-    6078:	eb0039f1 	bl	14844 <__aeabi_fmul>
-    607c:	e1a01000 	mov	r1, r0
-    6080:	e1a0000b 	mov	r0, fp
-    6084:	eb003946 	bl	145a4 <__addsf3>
-    6088:	e59d106c 	ldr	r1, [sp, #108]
-    608c:	e1a09000 	mov	r9, r0
-    6090:	e59d005c 	ldr	r0, [sp, #92]
-    6094:	eb0039ea 	bl	14844 <__aeabi_fmul>
-    6098:	e1a01005 	mov	r1, r5
-    609c:	e1a04000 	mov	r4, r0
-    60a0:	e59d008c 	ldr	r0, [sp, #140]
-    60a4:	eb0039e6 	bl	14844 <__aeabi_fmul>
-    60a8:	e1a01000 	mov	r1, r0
-    60ac:	e1a00004 	mov	r0, r4
-    60b0:	eb00393b 	bl	145a4 <__addsf3>
-    60b4:	e1a01000 	mov	r1, r0
-    60b8:	e1a0000a 	mov	r0, sl
-    60bc:	eb0039e0 	bl	14844 <__aeabi_fmul>
-    60c0:	e1a01000 	mov	r1, r0
-    60c4:	e1a00009 	mov	r0, r9
-    60c8:	eb003935 	bl	145a4 <__addsf3>
-    60cc:	e1a01005 	mov	r1, r5
-    60d0:	e58d0078 	str	r0, [sp, #120]
-    60d4:	e59d0064 	ldr	r0, [sp, #100]
-    60d8:	eb0039d9 	bl	14844 <__aeabi_fmul>
-    60dc:	e1a01005 	mov	r1, r5
-    60e0:	e1a09000 	mov	r9, r0
-    60e4:	e59d0060 	ldr	r0, [sp, #96]
-    60e8:	eb0039d5 	bl	14844 <__aeabi_fmul>
-    60ec:	e59d106c 	ldr	r1, [sp, #108]
-    60f0:	e1a04000 	mov	r4, r0
-    60f4:	e59d0088 	ldr	r0, [sp, #136]
-    60f8:	eb0039d1 	bl	14844 <__aeabi_fmul>
-    60fc:	e1a01000 	mov	r1, r0
-    6100:	e1a00004 	mov	r0, r4
-    6104:	eb003926 	bl	145a4 <__addsf3>
-    6108:	e1a01000 	mov	r1, r0
-    610c:	e59d0070 	ldr	r0, [sp, #112]
-    6110:	eb0039cb 	bl	14844 <__aeabi_fmul>
-    6114:	e1a01000 	mov	r1, r0
-    6118:	e1a00009 	mov	r0, r9
-    611c:	eb003920 	bl	145a4 <__addsf3>
-    6120:	e1a01005 	mov	r1, r5
-    6124:	e1a09000 	mov	r9, r0
-    6128:	e59d005c 	ldr	r0, [sp, #92]
-    612c:	eb0039c4 	bl	14844 <__aeabi_fmul>
-    6130:	e59d106c 	ldr	r1, [sp, #108]
-    6134:	e1a04000 	mov	r4, r0
-    6138:	e59d008c 	ldr	r0, [sp, #140]
-    613c:	eb0039c0 	bl	14844 <__aeabi_fmul>
-    6140:	e1a01000 	mov	r1, r0
-    6144:	e1a00004 	mov	r0, r4
-    6148:	eb003914 	bl	145a0 <__aeabi_fsub>
-    614c:	e1a01000 	mov	r1, r0
-    6150:	e1a0000a 	mov	r0, sl
-    6154:	eb0039ba 	bl	14844 <__aeabi_fmul>
-    6158:	e1a01000 	mov	r1, r0
-    615c:	e1a00009 	mov	r0, r9
-    6160:	eb00390f 	bl	145a4 <__addsf3>
-    6164:	e59d3068 	ldr	r3, [sp, #104]
-    6168:	e58d007c 	str	r0, [sp, #124]
-    616c:	e2831102 	add	r1, r3, #-2147483648	; 0x80000000
-    6170:	e59d0094 	ldr	r0, [sp, #148]
-    6174:	eb0039b2 	bl	14844 <__aeabi_fmul>
-    6178:	e59d1070 	ldr	r1, [sp, #112]
-    617c:	e1a04000 	mov	r4, r0
-    6180:	e59d008c 	ldr	r0, [sp, #140]
-    6184:	eb0039ae 	bl	14844 <__aeabi_fmul>
-    6188:	e1a01000 	mov	r1, r0
-    618c:	e59d0090 	ldr	r0, [sp, #144]
-    6190:	eb0039ab 	bl	14844 <__aeabi_fmul>
-    6194:	e1a01000 	mov	r1, r0
-    6198:	e1a00004 	mov	r0, r4
-    619c:	eb003900 	bl	145a4 <__addsf3>
-    61a0:	e1a0100a 	mov	r1, sl
-    61a4:	e1a04000 	mov	r4, r0
-    61a8:	e59d0088 	ldr	r0, [sp, #136]
-    61ac:	eb0039a4 	bl	14844 <__aeabi_fmul>
-    61b0:	e1a01000 	mov	r1, r0
-    61b4:	e59d0090 	ldr	r0, [sp, #144]
-    61b8:	eb0039a1 	bl	14844 <__aeabi_fmul>
-    61bc:	e1a01000 	mov	r1, r0
-    61c0:	e1a00004 	mov	r0, r4
-    61c4:	eb0038f6 	bl	145a4 <__addsf3>
-    61c8:	eb00370c 	bl	13e00 <__aeabi_f2d>
-    61cc:	e28f20c8 	add	r2, pc, #200	; 0xc8
-    61d0:	e892000c 	ldmia	r2, {r2, r3}
-    61d4:	eb00362f 	bl	13a98 <__aeabi_dsub>
-    61d8:	eb0038c6 	bl	144f8 <__aeabi_d2f>
-    61dc:	e59f40c8 	ldr	r4, [pc, #200]	; 62ac <.text+0x62ac>
-    61e0:	e5d4e000 	ldrb	lr, [r4]
-    61e4:	e59d4068 	ldr	r4, [sp, #104]
-    61e8:	e58da044 	str	sl, [sp, #68]
-    61ec:	e1a0cc24 	mov	ip, r4, lsr #24
-    61f0:	e58d0080 	str	r0, [sp, #128]
-    61f4:	e58dc050 	str	ip, [sp, #80]
-    61f8:	e59d007c 	ldr	r0, [sp, #124]
-    61fc:	e59dc044 	ldr	ip, [sp, #68]
-    6200:	e59d5070 	ldr	r5, [sp, #112]
-    6204:	e1a08c2c 	mov	r8, ip, lsr #24
-    6208:	e1a0cc20 	mov	ip, r0, lsr #24
-    620c:	e58dc038 	str	ip, [sp, #56]
-    6210:	e1a0c424 	mov	ip, r4, lsr #8
-    6214:	e59d6080 	ldr	r6, [sp, #128]
-    6218:	e58dc058 	str	ip, [sp, #88]
-    621c:	e1a0c825 	mov	ip, r5, lsr #16
-    6220:	e58dc04c 	str	ip, [sp, #76]
-    6224:	e1a0c420 	mov	ip, r0, lsr #8
-    6228:	e58d6034 	str	r6, [sp, #52]
-    622c:	e58dc000 	str	ip, [sp]
-    6230:	e1a0c820 	mov	ip, r0, lsr #16
-    6234:	e59d1078 	ldr	r1, [sp, #120]
-    6238:	e58dc03c 	str	ip, [sp, #60]
-    623c:	e59dc034 	ldr	ip, [sp, #52]
-    6240:	e1a06c25 	mov	r6, r5, lsr #24
-    6244:	e58d6048 	str	r6, [sp, #72]
-    6248:	e1a0c42c 	mov	ip, ip, lsr #8
-    624c:	e1a06c21 	mov	r6, r1, lsr #24
-    6250:	e58d6040 	str	r6, [sp, #64]
-    6254:	e58dc030 	str	ip, [sp, #48]
-    6258:	e59d6034 	ldr	r6, [sp, #52]
-    625c:	e59dc034 	ldr	ip, [sp, #52]
-    6260:	e59f305c 	ldr	r3, [pc, #92]	; 62c4 <.text+0x62c4>
-    6264:	e59f205c 	ldr	r2, [pc, #92]	; 62c8 <.text+0x62c8>
-    6268:	e1a0c82c 	mov	ip, ip, lsr #16
-    626c:	e35e0000 	cmp	lr, #0	; 0x0
-    6270:	e1a0ec26 	mov	lr, r6, lsr #24
-    6274:	e1a06824 	mov	r6, r4, lsr #16
-    6278:	e58d6054 	str	r6, [sp, #84]
-    627c:	e58dc02c 	str	ip, [sp, #44]
-    6280:	e59d6044 	ldr	r6, [sp, #68]
-    6284:	e5c38023 	strb	r8, [r3, #35]
-    6288:	ea000021 	b	6314 <.text+0x6314>
-    628c:	3fefd70a 	svccc	0x00efd70a
-    6290:	3d70a3d7 	ldcccl	3, cr10, [r0, #-860]!
-    6294:	3f747ae1 	svccc	0x00747ae1
-    6298:	47ae147b 	undefined
-    629c:	40239d01 	eormi	r9, r3, r1, lsl #26
-    62a0:	3a92a305 	bcc	fe4aeebc <VPBDIV+0x1e2b2dbc>
-    62a4:	40000d50 	andmi	r0, r0, r0, asr sp
-    62a8:	40000002 	andmi	r0, r0, r2
-    62ac:	400012c5 	andmi	r1, r0, r5, asr #5
-    62b0:	400013d4 	ldrmid	r1, [r0], -r4
-    62b4:	400013cc 	andmi	r1, r0, ip, asr #7
-    62b8:	400013c8 	andmi	r1, r0, r8, asr #7
-    62bc:	400013d0 	ldrmid	r1, [r0], -r0
-    62c0:	400013c4 	andmi	r1, r0, r4, asr #7
-    62c4:	40001044 	andmi	r1, r0, r4, asr #32
-    62c8:	40000fcc 	andmi	r0, r0, ip, asr #31
-    62cc:	40001109 	andmi	r1, r0, r9, lsl #2
-    62d0:	400012c4 	andmi	r1, r0, r4, asr #5
-    62d4:	40000fbc 	strmih	r0, [r0], -ip
-    62d8:	4000117c 	andmi	r1, r0, ip, ror r1
-    62dc:	40000894 	mulmi	r0, r4, r8
-    62e0:	4cbebc20 	ldcmi	12, cr11, [lr], #128
-    62e4:	40000ea0 	andmi	r0, r0, r0, lsr #29
-    62e8:	40000c18 	andmi	r0, r0, r8, lsl ip
-    62ec:	40000ddc 	ldrmid	r0, [r0], -ip
-    62f0:	40000be0 	andmi	r0, r0, r0, ror #23
-    62f4:	3a83126f 	bcc	fe0cacb8 <VPBDIV+0x1decebb8>
-    62f8:	40001264 	andmi	r1, r0, r4, ror #4
-    62fc:	40000d18 	andmi	r0, r0, r8, lsl sp
-    6300:	400010b1 	strmih	r1, [r0], -r1
-    6304:	400012bc 	strmih	r1, [r0], -ip
-    6308:	40000870 	andmi	r0, r0, r0, ror r8
-    630c:	4000088c 	andmi	r0, r0, ip, lsl #17
-    6310:	4000128d 	andmi	r1, r0, sp, lsl #5
-    6314:	e5c2e059 	strb	lr, [r2, #89]
-    6318:	e59dc058 	ldr	ip, [sp, #88]
-    631c:	e5c3c019 	strb	ip, [r3, #25]
-    6320:	e59dc054 	ldr	ip, [sp, #84]
-    6324:	e5c3c01a 	strb	ip, [r3, #26]
-    6328:	e59dc050 	ldr	ip, [sp, #80]
-    632c:	e1a0a425 	mov	sl, r5, lsr #8
-    6330:	e5c3c01b 	strb	ip, [r3, #27]
-    6334:	e5c3a01d 	strb	sl, [r3, #29]
-    6338:	e59dc04c 	ldr	ip, [sp, #76]
-    633c:	e5c3c01e 	strb	ip, [r3, #30]
-    6340:	e59dc048 	ldr	ip, [sp, #72]
-    6344:	e1a0b426 	mov	fp, r6, lsr #8
-    6348:	e1a09826 	mov	r9, r6, lsr #16
-    634c:	e1a07421 	mov	r7, r1, lsr #8
-    6350:	e1a06821 	mov	r6, r1, lsr #16
-    6354:	e5c3c01f 	strb	ip, [r3, #31]
-    6358:	e5c3b021 	strb	fp, [r3, #33]
-    635c:	e5c39022 	strb	r9, [r3, #34]
-    6360:	e5c2704f 	strb	r7, [r2, #79]
-    6364:	e5c26050 	strb	r6, [r2, #80]
-    6368:	e59d6040 	ldr	r6, [sp, #64]
-    636c:	e5c26051 	strb	r6, [r2, #81]
-    6370:	e59dc000 	ldr	ip, [sp]
-    6374:	e5c2c053 	strb	ip, [r2, #83]
-    6378:	e59d603c 	ldr	r6, [sp, #60]
-    637c:	e5c26054 	strb	r6, [r2, #84]
-    6380:	e59dc038 	ldr	ip, [sp, #56]
-    6384:	e5c2c055 	strb	ip, [r2, #85]
-    6388:	e59d6030 	ldr	r6, [sp, #48]
-    638c:	e5c26057 	strb	r6, [r2, #87]
-    6390:	e59dc02c 	ldr	ip, [sp, #44]
-    6394:	e5c2c058 	strb	ip, [r2, #88]
-    6398:	e5c34018 	strb	r4, [r3, #24]
-    639c:	e5c3501c 	strb	r5, [r3, #28]
-    63a0:	e59d4044 	ldr	r4, [sp, #68]
-    63a4:	e5c34020 	strb	r4, [r3, #32]
-    63a8:	e5c2104e 	strb	r1, [r2, #78]
-    63ac:	e5c20052 	strb	r0, [r2, #82]
-    63b0:	e59d6034 	ldr	r6, [sp, #52]
-    63b4:	e5c26056 	strb	r6, [r2, #86]
-    63b8:	1a000064 	bne	6550 <.text+0x6550>
-    63bc:	e51f30f8 	ldr	r3, [pc, #-248]	; 62cc <.text+0x62cc>
-    63c0:	e5d32000 	ldrb	r2, [r3]
-    63c4:	e3520000 	cmp	r2, #0	; 0x0
-    63c8:	1a00004f 	bne	650c <.text+0x650c>
-    63cc:	e51f3104 	ldr	r3, [pc, #-260]	; 62d0 <.text+0x62d0>
-    63d0:	e5d32000 	ldrb	r2, [r3]
-    63d4:	e3520000 	cmp	r2, #0	; 0x0
-    63d8:	1a00003a 	bne	64c8 <.text+0x64c8>
-    63dc:	e51f3110 	ldr	r3, [pc, #-272]	; 62d4 <.text+0x62d4>
-    63e0:	e5d32000 	ldrb	r2, [r3]
-    63e4:	e3520000 	cmp	r2, #0	; 0x0
-    63e8:	1a000009 	bne	6414 <.text+0x6414>
-    63ec:	e51fc0fc 	ldr	ip, [pc, #-252]	; 62f8 <.text+0x62f8>
-    63f0:	e59c3000 	ldr	r3, [ip]
-    63f4:	e3a01000 	mov	r1, #0	; 0x0
-    63f8:	e5c31008 	strb	r1, [r3, #8]
-    63fc:	e51f012c 	ldr	r0, [pc, #-300]	; 62d8 <.text+0x62d8>
-    6400:	e5902000 	ldr	r2, [r0]
-    6404:	e5c21008 	strb	r1, [r2, #8]
-    6408:	e28dd098 	add	sp, sp, #152	; 0x98
-    640c:	e8bd4ff0 	ldmia	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
-    6410:	e12fff1e 	bx	lr
-    6414:	e59d2080 	ldr	r2, [sp, #128]
-    6418:	e51fb13c 	ldr	fp, [pc, #-316]	; 62e4 <.text+0x62e4>
-    641c:	e51f414c 	ldr	r4, [pc, #-332]	; 62d8 <.text+0x62d8>
-    6420:	e58b20a8 	str	r2, [fp, #168]
-    6424:	e1a0000b 	mov	r0, fp
-    6428:	e51f113c 	ldr	r1, [pc, #-316]	; 62f4 <.text+0x62f4>
-    642c:	ebfffe60 	bl	5db4 <PredictPos>
-    6430:	e5943000 	ldr	r3, [r4]
-    6434:	e5d32008 	ldrb	r2, [r3, #8]
-    6438:	e3520001 	cmp	r2, #1	; 0x1
-    643c:	151fa13c 	ldrne	sl, [pc, #-316]	; 6308 <.text+0x6308>
-    6440:	151f813c 	ldrne	r8, [pc, #-316]	; 630c <.text+0x630c>
-    6444:	0a00005d 	beq	65c0 <.text+0x65c0>
-    6448:	e8980006 	ldmia	r8, {r1, r2}
-    644c:	e89a0018 	ldmia	sl, {r3, r4}
-    6450:	e0511003 	subs	r1, r1, r3
-    6454:	e0c22004 	sbc	r2, r2, r4
-    6458:	e3520000 	cmp	r2, #0	; 0x0
-    645c:	da000051 	ble	65a8 <.text+0x65a8>
-    6460:	e51f3168 	ldr	r3, [pc, #-360]	; 6300 <.text+0x6300>
-    6464:	e5d31032 	ldrb	r1, [r3, #50]
-    6468:	e5d30033 	ldrb	r0, [r3, #51]
-    646c:	e5d32031 	ldrb	r2, [r3, #49]
-    6470:	e5d33034 	ldrb	r3, [r3, #52]
-    6474:	e58d3004 	str	r3, [sp, #4]
-    6478:	e51f31a4 	ldr	r3, [pc, #-420]	; 62dc <.text+0x62dc>
-    647c:	e1822401 	orr	r2, r2, r1, lsl #8
-    6480:	e59d6004 	ldr	r6, [sp, #4]
-    6484:	e1822800 	orr	r2, r2, r0, lsl #16
-    6488:	e5934000 	ldr	r4, [r3]
-    648c:	e59be0ac 	ldr	lr, [fp, #172]
-    6490:	e51f31b8 	ldr	r3, [pc, #-440]	; 62e0 <.text+0x62e0>
-    6494:	e1821c06 	orr	r1, r2, r6, lsl #24
-    6498:	e51f01bc 	ldr	r0, [pc, #-444]	; 62e4 <.text+0x62e4>
-    649c:	e58b3098 	str	r3, [fp, #152]
-    64a0:	e58b109c 	str	r1, [fp, #156]
-    64a4:	e58be0b4 	str	lr, [fp, #180]
-    64a8:	e58b40b8 	str	r4, [fp, #184]
-    64ac:	ebfffe12 	bl	5cfc <CorrectPos>
-    64b0:	e51f21bc 	ldr	r2, [pc, #-444]	; 62fc <.text+0x62fc>
-    64b4:	e59b30b0 	ldr	r3, [fp, #176]
-    64b8:	e59b10ac 	ldr	r1, [fp, #172]
-    64bc:	e5823014 	str	r3, [r2, #20]
-    64c0:	e5821008 	str	r1, [r2, #8]
-    64c4:	eaffffc8 	b	63ec <.text+0x63ec>
-    64c8:	e51f61e8 	ldr	r6, [pc, #-488]	; 62e8 <.text+0x62e8>
-    64cc:	e59dc07c 	ldr	ip, [sp, #124]
-    64d0:	e1a00006 	mov	r0, r6
-    64d4:	e51f11e8 	ldr	r1, [pc, #-488]	; 62f4 <.text+0x62f4>
-    64d8:	e586c0a8 	str	ip, [r6, #168]
-    64dc:	ebfffe34 	bl	5db4 <PredictPos>
-    64e0:	e51f01f0 	ldr	r0, [pc, #-496]	; 62f8 <.text+0x62f8>
-    64e4:	e5903000 	ldr	r3, [r0]
-    64e8:	e5d32008 	ldrb	r2, [r3, #8]
-    64ec:	e3520001 	cmp	r2, #1	; 0x1
-    64f0:	0a00006d 	beq	66ac <.text+0x66ac>
-    64f4:	e51f2200 	ldr	r2, [pc, #-512]	; 62fc <.text+0x62fc>
-    64f8:	e59630b0 	ldr	r3, [r6, #176]
-    64fc:	e59610ac 	ldr	r1, [r6, #172]
-    6500:	e5823010 	str	r3, [r2, #16]
-    6504:	e5821004 	str	r1, [r2, #4]
-    6508:	eaffffb3 	b	63dc <.text+0x63dc>
-    650c:	e59d2078 	ldr	r2, [sp, #120]
-    6510:	e51f622c 	ldr	r6, [pc, #-556]	; 62ec <.text+0x62ec>
-    6514:	e51f4224 	ldr	r4, [pc, #-548]	; 62f8 <.text+0x62f8>
-    6518:	e58620a8 	str	r2, [r6, #168]
-    651c:	e51f1230 	ldr	r1, [pc, #-560]	; 62f4 <.text+0x62f4>
-    6520:	e1a00006 	mov	r0, r6
-    6524:	ebfffe22 	bl	5db4 <PredictPos>
-    6528:	e5943000 	ldr	r3, [r4]
-    652c:	e5d32008 	ldrb	r2, [r3, #8]
-    6530:	e3520001 	cmp	r2, #1	; 0x1
-    6534:	0a000070 	beq	66fc <.text+0x66fc>
-    6538:	e51f2244 	ldr	r2, [pc, #-580]	; 62fc <.text+0x62fc>
-    653c:	e59630b0 	ldr	r3, [r6, #176]
-    6540:	e59610ac 	ldr	r1, [r6, #172]
-    6544:	e582300c 	str	r3, [r2, #12]
-    6548:	e5821000 	str	r1, [r2]
-    654c:	eaffff9e 	b	63cc <.text+0x63cc>
-    6550:	e51f4268 	ldr	r4, [pc, #-616]	; 62f0 <.text+0x62f0>
-    6554:	e59dc074 	ldr	ip, [sp, #116]
-    6558:	e1a00004 	mov	r0, r4
-    655c:	e51f1270 	ldr	r1, [pc, #-624]	; 62f4 <.text+0x62f4>
-    6560:	e584c01c 	str	ip, [r4, #28]
-    6564:	ebfffdd3 	bl	5cb8 <PredictYaw>
-    6568:	e51f0278 	ldr	r0, [pc, #-632]	; 62f8 <.text+0x62f8>
-    656c:	e5903000 	ldr	r3, [r0]
-    6570:	e5d32008 	ldrb	r2, [r3, #8]
-    6574:	e3520001 	cmp	r2, #1	; 0x1
-    6578:	0a000073 	beq	674c <.text+0x674c>
-    657c:	e5942020 	ldr	r2, [r4, #32]
-    6580:	e51f328c 	ldr	r3, [pc, #-652]	; 62fc <.text+0x62fc>
-    6584:	e5832018 	str	r2, [r3, #24]
-    6588:	eaffff8b 	b	63bc <.text+0x63bc>
-    658c:	e59a0018 	ldr	r0, [sl, #24]
-    6590:	ebfff6ed 	bl	414c <LLToSIAngleYaw>
-    6594:	eafffe7a 	b	5f84 <KFilter+0x120>
-    6598:	e3a03000 	mov	r3, #0	; 0x0
-    659c:	e1c230b0 	strh	r3, [r2]
-    65a0:	ebfffd92 	bl	5bf0 <resetKalmanFilter>
-    65a4:	eafffe58 	b	5f0c <KFilter+0xa8>
-    65a8:	1affffc0 	bne	64b0 <.text+0x64b0>
-    65ac:	e3a03bc3 	mov	r3, #199680	; 0x30c00
-    65b0:	e2833d05 	add	r3, r3, #320	; 0x140
-    65b4:	e1510003 	cmp	r1, r3
-    65b8:	9affffbc 	bls	64b0 <.text+0x64b0>
-    65bc:	eaffffa7 	b	6460 <.text+0x6460>
-    65c0:	e51f32c8 	ldr	r3, [pc, #-712]	; 6300 <.text+0x6300>
-    65c4:	e5d3602a 	ldrb	r6, [r3, #42]
-    65c8:	e5d3e029 	ldrb	lr, [r3, #41]
-    65cc:	e58d6028 	str	r6, [sp, #40]
-    65d0:	e5d3c02d 	ldrb	ip, [r3, #45]
-    65d4:	e58dc020 	str	ip, [sp, #32]
-    65d8:	e5d3002e 	ldrb	r0, [r3, #46]
-    65dc:	e58d001c 	str	r0, [sp, #28]
-    65e0:	e51f22e4 	ldr	r2, [pc, #-740]	; 6304 <.text+0x6304>
-    65e4:	e5d3602b 	ldrb	r6, [r3, #43]
-    65e8:	e5d25001 	ldrb	r5, [r2, #1]
-    65ec:	e5d24005 	ldrb	r4, [r2, #5]
-    65f0:	e5d20000 	ldrb	r0, [r2]
-    65f4:	e5d21004 	ldrb	r1, [r2, #4]
-    65f8:	e58d6024 	str	r6, [sp, #36]
-    65fc:	e5d2c002 	ldrb	ip, [r2, #2]
-    6600:	e5d3a02f 	ldrb	sl, [r3, #47]
-    6604:	e58dc010 	str	ip, [sp, #16]
-    6608:	e59dc028 	ldr	ip, [sp, #40]
-    660c:	e5d26006 	ldrb	r6, [r2, #6]
-    6610:	e18ee40c 	orr	lr, lr, ip, lsl #8
-    6614:	e58d600c 	str	r6, [sp, #12]
-    6618:	e59dc01c 	ldr	ip, [sp, #28]
-    661c:	e59d6020 	ldr	r6, [sp, #32]
-    6620:	e186640c 	orr	r6, r6, ip, lsl #8
-    6624:	e58d6018 	str	r6, [sp, #24]
-    6628:	e1811404 	orr	r1, r1, r4, lsl #8
-    662c:	e5d34030 	ldrb	r4, [r3, #48]
-    6630:	e58d4014 	str	r4, [sp, #20]
-    6634:	e5d26007 	ldrb	r6, [r2, #7]
-    6638:	e58d6008 	str	r6, [sp, #8]
-    663c:	e59dc024 	ldr	ip, [sp, #36]
-    6640:	e5d3402c 	ldrb	r4, [r3, #44]
-    6644:	e59d6010 	ldr	r6, [sp, #16]
-    6648:	e59d3018 	ldr	r3, [sp, #24]
-    664c:	e18ee80c 	orr	lr, lr, ip, lsl #16
-    6650:	e1800405 	orr	r0, r0, r5, lsl #8
-    6654:	e59dc00c 	ldr	ip, [sp, #12]
-    6658:	e5d25003 	ldrb	r5, [r2, #3]
-    665c:	e1800806 	orr	r0, r0, r6, lsl #16
-    6660:	e183280a 	orr	r2, r3, sl, lsl #16
-    6664:	e59d6008 	ldr	r6, [sp, #8]
-    6668:	e18e3c04 	orr	r3, lr, r4, lsl #24
-    666c:	e59d4014 	ldr	r4, [sp, #20]
-    6670:	e181180c 	orr	r1, r1, ip, lsl #16
-    6674:	e51fa374 	ldr	sl, [pc, #-884]	; 6308 <.text+0x6308>
-    6678:	e1822c04 	orr	r2, r2, r4, lsl #24
-    667c:	e1811c06 	orr	r1, r1, r6, lsl #24
-    6680:	e58b3098 	str	r3, [fp, #152]
-    6684:	e51f8380 	ldr	r8, [pc, #-896]	; 630c <.text+0x630c>
-    6688:	e58b209c 	str	r2, [fp, #156]
-    668c:	e58b10b8 	str	r1, [fp, #184]
-    6690:	e89a0006 	ldmia	sl, {r1, r2}
-    6694:	e180ec05 	orr	lr, r0, r5, lsl #24
-    6698:	e58be0b4 	str	lr, [fp, #180]
-    669c:	e1a0000b 	mov	r0, fp
-    66a0:	e8880006 	stmia	r8, {r1, r2}
-    66a4:	ebfffd94 	bl	5cfc <CorrectPos>
-    66a8:	eaffff66 	b	6448 <.text+0x6448>
-    66ac:	e51f33a4 	ldr	r3, [pc, #-932]	; 6310 <.text+0x6310>
-    66b0:	e5d3e005 	ldrb	lr, [r3, #5]
-    66b4:	e5d3000d 	ldrb	r0, [r3, #13]
-    66b8:	e5d31004 	ldrb	r1, [r3, #4]
-    66bc:	e5d3200c 	ldrb	r2, [r3, #12]
-    66c0:	e5d34006 	ldrb	r4, [r3, #6]
-    66c4:	e5d3500e 	ldrb	r5, [r3, #14]
-    66c8:	e181140e 	orr	r1, r1, lr, lsl #8
-    66cc:	e1822400 	orr	r2, r2, r0, lsl #8
-    66d0:	e5d3e00f 	ldrb	lr, [r3, #15]
-    66d4:	e5d30007 	ldrb	r0, [r3, #7]
-    66d8:	e1811804 	orr	r1, r1, r4, lsl #16
-    66dc:	e1822805 	orr	r2, r2, r5, lsl #16
-    66e0:	e1813c00 	orr	r3, r1, r0, lsl #24
-    66e4:	e1822c0e 	orr	r2, r2, lr, lsl #24
-    66e8:	e1a00006 	mov	r0, r6
-    66ec:	e58630b4 	str	r3, [r6, #180]
-    66f0:	e58620b8 	str	r2, [r6, #184]
-    66f4:	ebfffd80 	bl	5cfc <CorrectPos>
-    66f8:	eaffff7d 	b	64f4 <.text+0x64f4>
-    66fc:	e51f33f4 	ldr	r3, [pc, #-1012]	; 6310 <.text+0x6310>
-    6700:	e5d3e001 	ldrb	lr, [r3, #1]
-    6704:	e5d30009 	ldrb	r0, [r3, #9]
-    6708:	e5d31000 	ldrb	r1, [r3]
-    670c:	e5d32008 	ldrb	r2, [r3, #8]
-    6710:	e5d34002 	ldrb	r4, [r3, #2]
-    6714:	e5d3500a 	ldrb	r5, [r3, #10]
-    6718:	e181140e 	orr	r1, r1, lr, lsl #8
-    671c:	e1822400 	orr	r2, r2, r0, lsl #8
-    6720:	e5d3e00b 	ldrb	lr, [r3, #11]
-    6724:	e5d30003 	ldrb	r0, [r3, #3]
-    6728:	e1811804 	orr	r1, r1, r4, lsl #16
-    672c:	e1822805 	orr	r2, r2, r5, lsl #16
-    6730:	e1813c00 	orr	r3, r1, r0, lsl #24
-    6734:	e1822c0e 	orr	r2, r2, lr, lsl #24
-    6738:	e1a00006 	mov	r0, r6
-    673c:	e58630b4 	str	r3, [r6, #180]
-    6740:	e58620b8 	str	r2, [r6, #184]
-    6744:	ebfffd6c 	bl	5cfc <CorrectPos>
-    6748:	eaffff7a 	b	6538 <.text+0x6538>
-    674c:	e51f3444 	ldr	r3, [pc, #-1092]	; 6310 <.text+0x6310>
-    6750:	e5d31011 	ldrb	r1, [r3, #17]
-    6754:	e5d32010 	ldrb	r2, [r3, #16]
-    6758:	e5d3e012 	ldrb	lr, [r3, #18]
-    675c:	e5d30013 	ldrb	r0, [r3, #19]
-    6760:	e1822401 	orr	r2, r2, r1, lsl #8
-    6764:	e182280e 	orr	r2, r2, lr, lsl #16
-    6768:	e1823c00 	orr	r3, r2, r0, lsl #24
-    676c:	e5843024 	str	r3, [r4, #36]
-    6770:	e1a00004 	mov	r0, r4
-    6774:	ebfffd2b 	bl	5c28 <CorrectYaw>
-    6778:	eaffff7f 	b	657c <.text+0x657c>
-
-0000677c <addMatrix2>:
-    677c:	e92d40f0 	stmdb	sp!, {r4, r5, r6, r7, lr}
-    6780:	e1a06000 	mov	r6, r0
-    6784:	e1a05001 	mov	r5, r1
-    6788:	e1a04002 	mov	r4, r2
-    678c:	e3a07000 	mov	r7, #0	; 0x0
-    6790:	e5951000 	ldr	r1, [r5]
-    6794:	e5960000 	ldr	r0, [r6]
-    6798:	eb003781 	bl	145a4 <__addsf3>
-    679c:	e5840000 	str	r0, [r4]
-    67a0:	e5960004 	ldr	r0, [r6, #4]
-    67a4:	e5951004 	ldr	r1, [r5, #4]
-    67a8:	eb00377d 	bl	145a4 <__addsf3>
-    67ac:	e2877001 	add	r7, r7, #1	; 0x1
-    67b0:	e3570002 	cmp	r7, #2	; 0x2
-    67b4:	e5840004 	str	r0, [r4, #4]
-    67b8:	e2866008 	add	r6, r6, #8	; 0x8
-    67bc:	e2855008 	add	r5, r5, #8	; 0x8
-    67c0:	e2844008 	add	r4, r4, #8	; 0x8
-    67c4:	1afffff1 	bne	6790 <addMatrix2+0x14>
-    67c8:	e8bd40f0 	ldmia	sp!, {r4, r5, r6, r7, lr}
-    67cc:	e12fff1e 	bx	lr
-
-000067d0 <addMatrix>:
-    67d0:	e92d4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
-    67d4:	e3530000 	cmp	r3, #0	; 0x0
-    67d8:	e24dd00c 	sub	sp, sp, #12	; 0xc
-    67dc:	c3a08000 	movgt	r8, #0	; 0x0
-    67e0:	e58d3000 	str	r3, [sp]
-    67e4:	e58d0008 	str	r0, [sp, #8]
-    67e8:	e58d1004 	str	r1, [sp, #4]
-    67ec:	e1a0b002 	mov	fp, r2
-    67f0:	e59da030 	ldr	sl, [sp, #48]
-    67f4:	c1a09008 	movgt	r9, r8
-    67f8:	da000013 	ble	684c <addMatrix+0x7c>
-    67fc:	e35a0000 	cmp	sl, #0	; 0x0
-    6800:	da00000c 	ble	6838 <addMatrix+0x68>
-    6804:	e59d3008 	ldr	r3, [sp, #8]
-    6808:	e7986003 	ldr	r6, [r8, r3]
-    680c:	e59d3004 	ldr	r3, [sp, #4]
-    6810:	e798700b 	ldr	r7, [r8, fp]
-    6814:	e7985003 	ldr	r5, [r8, r3]
-    6818:	e3a04000 	mov	r4, #0	; 0x0
-    681c:	e7960104 	ldr	r0, [r6, r4, lsl #2]
-    6820:	e7951104 	ldr	r1, [r5, r4, lsl #2]
-    6824:	eb00375e 	bl	145a4 <__addsf3>
-    6828:	e7870104 	str	r0, [r7, r4, lsl #2]
-    682c:	e2844001 	add	r4, r4, #1	; 0x1
-    6830:	e15a0004 	cmp	sl, r4
-    6834:	1afffff8 	bne	681c <addMatrix+0x4c>
-    6838:	e59d3000 	ldr	r3, [sp]
-    683c:	e2899001 	add	r9, r9, #1	; 0x1
-    6840:	e1530009 	cmp	r3, r9
-    6844:	e2888004 	add	r8, r8, #4	; 0x4
-    6848:	1affffeb 	bne	67fc <addMatrix+0x2c>
-    684c:	e28dd00c 	add	sp, sp, #12	; 0xc
-    6850:	e8bd4ff0 	ldmia	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
-    6854:	e12fff1e 	bx	lr
-
-00006858 <addVector>:
-    6858:	e92d45f0 	stmdb	sp!, {r4, r5, r6, r7, r8, sl, lr}
-    685c:	e253a000 	subs	sl, r3, #0	; 0x0
-    6860:	e1a08000 	mov	r8, r0
-    6864:	e1a07001 	mov	r7, r1
-    6868:	e1a06002 	mov	r6, r2
-    686c:	da000009 	ble	6898 <addVector+0x40>
-    6870:	e3a05000 	mov	r5, #0	; 0x0
-    6874:	e1a04005 	mov	r4, r5
-    6878:	e7940008 	ldr	r0, [r4, r8]
-    687c:	e7941007 	ldr	r1, [r4, r7]
-    6880:	eb003747 	bl	145a4 <__addsf3>
-    6884:	e2855001 	add	r5, r5, #1	; 0x1
-    6888:	e15a0005 	cmp	sl, r5
-    688c:	e7840006 	str	r0, [r4, r6]
-    6890:	e2844004 	add	r4, r4, #4	; 0x4
-    6894:	1afffff7 	bne	6878 <addVector+0x20>
-    6898:	e8bd45f0 	ldmia	sp!, {r4, r5, r6, r7, r8, sl, lr}
-    689c:	e12fff1e 	bx	lr
-
-000068a0 <addVector2>:
-    68a0:	e92d4070 	stmdb	sp!, {r4, r5, r6, lr}
-    68a4:	e1a04000 	mov	r4, r0
-    68a8:	e1a06001 	mov	r6, r1
-    68ac:	e5900000 	ldr	r0, [r0]
-    68b0:	e5911000 	ldr	r1, [r1]
-    68b4:	e1a05002 	mov	r5, r2
-    68b8:	eb003739 	bl	145a4 <__addsf3>
-    68bc:	e5850000 	str	r0, [r5]
-    68c0:	e5940004 	ldr	r0, [r4, #4]
-    68c4:	e5961004 	ldr	r1, [r6, #4]
-    68c8:	eb003735 	bl	145a4 <__addsf3>
-    68cc:	e5850004 	str	r0, [r5, #4]
-    68d0:	e8bd4070 	ldmia	sp!, {r4, r5, r6, lr}
-    68d4:	e12fff1e 	bx	lr
-
-000068d8 <subMatrix2>:
-    68d8:	e92d40f0 	stmdb	sp!, {r4, r5, r6, r7, lr}
-    68dc:	e1a06000 	mov	r6, r0
-    68e0:	e1a05001 	mov	r5, r1
-    68e4:	e1a04002 	mov	r4, r2
-    68e8:	e3a07000 	mov	r7, #0	; 0x0
-    68ec:	e5951000 	ldr	r1, [r5]
-    68f0:	e5960000 	ldr	r0, [r6]
-    68f4:	eb003729 	bl	145a0 <__aeabi_fsub>
-    68f8:	e5840000 	str	r0, [r4]
-    68fc:	e5960004 	ldr	r0, [r6, #4]
-    6900:	e5951004 	ldr	r1, [r5, #4]
-    6904:	eb003725 	bl	145a0 <__aeabi_fsub>
-    6908:	e2877001 	add	r7, r7, #1	; 0x1
-    690c:	e3570002 	cmp	r7, #2	; 0x2
-    6910:	e5840004 	str	r0, [r4, #4]
-    6914:	e2866008 	add	r6, r6, #8	; 0x8
-    6918:	e2855008 	add	r5, r5, #8	; 0x8
-    691c:	e2844008 	add	r4, r4, #8	; 0x8
-    6920:	1afffff1 	bne	68ec <subMatrix2+0x14>
-    6924:	e8bd40f0 	ldmia	sp!, {r4, r5, r6, r7, lr}
-    6928:	e12fff1e 	bx	lr
-
-0000692c <subMatrix>:
-    692c:	e92d4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
-    6930:	e3530000 	cmp	r3, #0	; 0x0
-    6934:	e24dd00c 	sub	sp, sp, #12	; 0xc
-    6938:	c3a08000 	movgt	r8, #0	; 0x0
-    693c:	e58d3000 	str	r3, [sp]
-    6940:	e58d0008 	str	r0, [sp, #8]
-    6944:	e58d1004 	str	r1, [sp, #4]
-    6948:	e1a0b002 	mov	fp, r2
-    694c:	e59da030 	ldr	sl, [sp, #48]
-    6950:	c1a09008 	movgt	r9, r8
-    6954:	da000013 	ble	69a8 <subMatrix+0x7c>
-    6958:	e35a0000 	cmp	sl, #0	; 0x0
-    695c:	da00000c 	ble	6994 <subMatrix+0x68>
-    6960:	e59d3008 	ldr	r3, [sp, #8]
-    6964:	e7986003 	ldr	r6, [r8, r3]
-    6968:	e59d3004 	ldr	r3, [sp, #4]
-    696c:	e798700b 	ldr	r7, [r8, fp]
-    6970:	e7985003 	ldr	r5, [r8, r3]
-    6974:	e3a04000 	mov	r4, #0	; 0x0
-    6978:	e7960104 	ldr	r0, [r6, r4, lsl #2]
-    697c:	e7951104 	ldr	r1, [r5, r4, lsl #2]
-    6980:	eb003706 	bl	145a0 <__aeabi_fsub>
-    6984:	e7870104 	str	r0, [r7, r4, lsl #2]
-    6988:	e2844001 	add	r4, r4, #1	; 0x1
-    698c:	e15a0004 	cmp	sl, r4
-    6990:	1afffff8 	bne	6978 <subMatrix+0x4c>
-    6994:	e59d3000 	ldr	r3, [sp]
-    6998:	e2899001 	add	r9, r9, #1	; 0x1
-    699c:	e1530009 	cmp	r3, r9
-    69a0:	e2888004 	add	r8, r8, #4	; 0x4
-    69a4:	1affffeb 	bne	6958 <subMatrix+0x2c>
-    69a8:	e28dd00c 	add	sp, sp, #12	; 0xc
-    69ac:	e8bd4ff0 	ldmia	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
-    69b0:	e12fff1e 	bx	lr
-
-000069b4 <subVector>:
-    69b4:	e92d45f0 	stmdb	sp!, {r4, r5, r6, r7, r8, sl, lr}
-    69b8:	e253a000 	subs	sl, r3, #0	; 0x0
-    69bc:	e1a08000 	mov	r8, r0
-    69c0:	e1a07001 	mov	r7, r1
-    69c4:	e1a06002 	mov	r6, r2
-    69c8:	da000009 	ble	69f4 <subVector+0x40>
-    69cc:	e3a05000 	mov	r5, #0	; 0x0
-    69d0:	e1a04005 	mov	r4, r5
-    69d4:	e7940008 	ldr	r0, [r4, r8]
-    69d8:	e7941007 	ldr	r1, [r4, r7]
-    69dc:	eb0036ef 	bl	145a0 <__aeabi_fsub>
-    69e0:	e2855001 	add	r5, r5, #1	; 0x1
-    69e4:	e15a0005 	cmp	sl, r5
-    69e8:	e7840006 	str	r0, [r4, r6]
-    69ec:	e2844004 	add	r4, r4, #4	; 0x4
-    69f0:	1afffff7 	bne	69d4 <subVector+0x20>
-    69f4:	e8bd45f0 	ldmia	sp!, {r4, r5, r6, r7, r8, sl, lr}
-    69f8:	e12fff1e 	bx	lr
-
-000069fc <subVector2>:
-    69fc:	e92d4070 	stmdb	sp!, {r4, r5, r6, lr}
-    6a00:	e1a04000 	mov	r4, r0
-    6a04:	e1a06001 	mov	r6, r1
-    6a08:	e5900000 	ldr	r0, [r0]
-    6a0c:	e5911000 	ldr	r1, [r1]
-    6a10:	e1a05002 	mov	r5, r2
-    6a14:	eb0036e1 	bl	145a0 <__aeabi_fsub>
-    6a18:	e5850000 	str	r0, [r5]
-    6a1c:	e5940004 	ldr	r0, [r4, #4]
-    6a20:	e5961004 	ldr	r1, [r6, #4]
-    6a24:	eb0036dd 	bl	145a0 <__aeabi_fsub>
-    6a28:	e5850004 	str	r0, [r5, #4]
-    6a2c:	e8bd4070 	ldmia	sp!, {r4, r5, r6, lr}
-    6a30:	e12fff1e 	bx	lr
-
-00006a34 <negMatrix>:
-    6a34:	e92d4070 	stmdb	sp!, {r4, r5, r6, lr}
-    6a38:	e2515000 	subs	r5, r1, #0	; 0x0
-    6a3c:	e1a06000 	mov	r6, r0
-    6a40:	c3a04000 	movgt	r4, #0	; 0x0
-    6a44:	e1a00002 	mov	r0, r2
-    6a48:	da00000e 	ble	6a88 <negMatrix+0x54>
-    6a4c:	e3500000 	cmp	r0, #0	; 0x0
-    6a50:	da000009 	ble	6a7c <negMatrix+0x48>
-    6a54:	e3a0c000 	mov	ip, #0	; 0x0
-    6a58:	e7961104 	ldr	r1, [r6, r4, lsl #2]
-    6a5c:	e1a0e00c 	mov	lr, ip
-    6a60:	e79c3001 	ldr	r3, [ip, r1]
-    6a64:	e28ee001 	add	lr, lr, #1	; 0x1
-    6a68:	e2832102 	add	r2, r3, #-2147483648	; 0x80000000
-    6a6c:	e150000e 	cmp	r0, lr
-    6a70:	e78c2001 	str	r2, [ip, r1]
-    6a74:	e28cc004 	add	ip, ip, #4	; 0x4
-    6a78:	1afffff8 	bne	6a60 <negMatrix+0x2c>
-    6a7c:	e2844001 	add	r4, r4, #1	; 0x1
-    6a80:	e1550004 	cmp	r5, r4
-    6a84:	1afffff0 	bne	6a4c <negMatrix+0x18>
-    6a88:	e8bd4070 	ldmia	sp!, {r4, r5, r6, lr}
-    6a8c:	e12fff1e 	bx	lr
-
-00006a90 <multMatrix>:
-    6a90:	e92d4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
-    6a94:	e24dd010 	sub	sp, sp, #16	; 0x10
-    6a98:	e59dc038 	ldr	ip, [sp, #56]
-    6a9c:	e35c0000 	cmp	ip, #0	; 0x0
-    6aa0:	e58d2004 	str	r2, [sp, #4]
-    6aa4:	c3a02000 	movgt	r2, #0	; 0x0
-    6aa8:	e58d0008 	str	r0, [sp, #8]
-    6aac:	e1a0a001 	mov	sl, r1
-    6ab0:	e58d3000 	str	r3, [sp]
-    6ab4:	e59db034 	ldr	fp, [sp, #52]
-    6ab8:	c58d200c 	strgt	r2, [sp, #12]
-    6abc:	da000025 	ble	6b58 <multMatrix+0xc8>
-    6ac0:	e59d3000 	ldr	r3, [sp]
-    6ac4:	e3530000 	cmp	r3, #0	; 0x0
-    6ac8:	da00001c 	ble	6b40 <multMatrix+0xb0>
-    6acc:	e59dc00c 	ldr	ip, [sp, #12]
-    6ad0:	e3a08000 	mov	r8, #0	; 0x0
-    6ad4:	e1a0710c 	mov	r7, ip, lsl #2
-    6ad8:	e1a09008 	mov	r9, r8
-    6adc:	e35b0000 	cmp	fp, #0	; 0x0
-    6ae0:	d3a05000 	movle	r5, #0	; 0x0
-    6ae4:	da00000e 	ble	6b24 <multMatrix+0x94>
-    6ae8:	e59d3008 	ldr	r3, [sp, #8]
-    6aec:	e7986003 	ldr	r6, [r8, r3]
-    6af0:	e3a05000 	mov	r5, #0	; 0x0
-    6af4:	e3a04000 	mov	r4, #0	; 0x0
-    6af8:	e79a3104 	ldr	r3, [sl, r4, lsl #2]
-    6afc:	e7960104 	ldr	r0, [r6, r4, lsl #2]
-    6b00:	e7931007 	ldr	r1, [r3, r7]
-    6b04:	eb00374e 	bl	14844 <__aeabi_fmul>
-    6b08:	e1a01000 	mov	r1, r0
-    6b0c:	e1a00005 	mov	r0, r5
-    6b10:	eb0036a3 	bl	145a4 <__addsf3>
-    6b14:	e2844001 	add	r4, r4, #1	; 0x1
-    6b18:	e15b0004 	cmp	fp, r4
-    6b1c:	e1a05000 	mov	r5, r0
-    6b20:	1afffff4 	bne	6af8 <multMatrix+0x68>
-    6b24:	e89d1004 	ldmia	sp, {r2, ip}
-    6b28:	e79c3008 	ldr	r3, [ip, r8]
-    6b2c:	e2899001 	add	r9, r9, #1	; 0x1
-    6b30:	e1520009 	cmp	r2, r9
-    6b34:	e7835007 	str	r5, [r3, r7]
-    6b38:	e2888004 	add	r8, r8, #4	; 0x4
-    6b3c:	1affffe6 	bne	6adc <multMatrix+0x4c>
-    6b40:	e59dc00c 	ldr	ip, [sp, #12]
-    6b44:	e59d2038 	ldr	r2, [sp, #56]
-    6b48:	e28cc001 	add	ip, ip, #1	; 0x1
-    6b4c:	e152000c 	cmp	r2, ip
-    6b50:	e58dc00c 	str	ip, [sp, #12]
-    6b54:	1affffd9 	bne	6ac0 <multMatrix+0x30>
-    6b58:	e28dd010 	add	sp, sp, #16	; 0x10
-    6b5c:	e8bd4ff0 	ldmia	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
-    6b60:	e12fff1e 	bx	lr
-
-00006b64 <multMatrix2>:
-    6b64:	e92d4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
-    6b68:	e1a0b000 	mov	fp, r0
-    6b6c:	e1a09002 	mov	r9, r2
-    6b70:	e1a08001 	mov	r8, r1
-    6b74:	e3a0a000 	mov	sl, #0	; 0x0
-    6b78:	e1a0500b 	mov	r5, fp
-    6b7c:	e089710a 	add	r7, r9, sl, lsl #2
-    6b80:	e3a06000 	mov	r6, #0	; 0x0
-    6b84:	e5950000 	ldr	r0, [r5]
-    6b88:	e5981000 	ldr	r1, [r8]
-    6b8c:	eb00372c 	bl	14844 <__aeabi_fmul>
-    6b90:	e3a01000 	mov	r1, #0	; 0x0
-    6b94:	eb003682 	bl	145a4 <__addsf3>
-    6b98:	e5981008 	ldr	r1, [r8, #8]
-    6b9c:	e1a04000 	mov	r4, r0
-    6ba0:	e5950004 	ldr	r0, [r5, #4]
-    6ba4:	eb003726 	bl	14844 <__aeabi_fmul>
-    6ba8:	e1a01004 	mov	r1, r4
-    6bac:	eb00367c 	bl	145a4 <__addsf3>
-    6bb0:	e2866001 	add	r6, r6, #1	; 0x1
-    6bb4:	e3560002 	cmp	r6, #2	; 0x2
-    6bb8:	e4870008 	str	r0, [r7], #8
-    6bbc:	e2855008 	add	r5, r5, #8	; 0x8
-    6bc0:	1affffef 	bne	6b84 <multMatrix2+0x20>
-    6bc4:	e28aa001 	add	sl, sl, #1	; 0x1
-    6bc8:	e35a0002 	cmp	sl, #2	; 0x2
-    6bcc:	e2888004 	add	r8, r8, #4	; 0x4
-    6bd0:	1affffe8 	bne	6b78 <multMatrix2+0x14>
-    6bd4:	e8bd4ff0 	ldmia	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
-    6bd8:	e12fff1e 	bx	lr
-
-00006bdc <multMatVec>:
-    6bdc:	e92d4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
-    6be0:	e3530000 	cmp	r3, #0	; 0x0
-    6be4:	e24dd00c 	sub	sp, sp, #12	; 0xc
-    6be8:	c3a09000 	movgt	r9, #0	; 0x0
-    6bec:	e58d3000 	str	r3, [sp]
-    6bf0:	e58d0008 	str	r0, [sp, #8]
-    6bf4:	e1a08001 	mov	r8, r1
-    6bf8:	e58d2004 	str	r2, [sp, #4]
-    6bfc:	e59da030 	ldr	sl, [sp, #48]
-    6c00:	c1a0b009 	movgt	fp, r9
-    6c04:	da000019 	ble	6c70 <multMatVec+0x94>
-    6c08:	e35a0000 	cmp	sl, #0	; 0x0
-    6c0c:	d3a06000 	movle	r6, #0	; 0x0
-    6c10:	da00000f 	ble	6c54 <multMatVec+0x78>
-    6c14:	e59d3008 	ldr	r3, [sp, #8]
-    6c18:	e3a05000 	mov	r5, #0	; 0x0
-    6c1c:	e7997003 	ldr	r7, [r9, r3]
-    6c20:	e3a06000 	mov	r6, #0	; 0x0
-    6c24:	e1a04005 	mov	r4, r5
-    6c28:	e7941008 	ldr	r1, [r4, r8]
-    6c2c:	e7940007 	ldr	r0, [r4, r7]
-    6c30:	eb003703 	bl	14844 <__aeabi_fmul>
-    6c34:	e1a01000 	mov	r1, r0
-    6c38:	e1a00006 	mov	r0, r6
-    6c3c:	eb003658 	bl	145a4 <__addsf3>
-    6c40:	e2855001 	add	r5, r5, #1	; 0x1
-    6c44:	e15a0005 	cmp	sl, r5
-    6c48:	e1a06000 	mov	r6, r0
-    6c4c:	e2844004 	add	r4, r4, #4	; 0x4
-    6c50:	1afffff4 	bne	6c28 <multMatVec+0x4c>
-    6c54:	e59d3000 	ldr	r3, [sp]
-    6c58:	e28bb001 	add	fp, fp, #1	; 0x1
-    6c5c:	e153000b 	cmp	r3, fp
-    6c60:	e59d3004 	ldr	r3, [sp, #4]
-    6c64:	e7896003 	str	r6, [r9, r3]
-    6c68:	e2899004 	add	r9, r9, #4	; 0x4
-    6c6c:	1affffe5 	bne	6c08 <multMatVec+0x2c>
-    6c70:	e28dd00c 	add	sp, sp, #12	; 0xc
-    6c74:	e8bd4ff0 	ldmia	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
-    6c78:	e12fff1e 	bx	lr
-
-00006c7c <multMatVec2>:
-    6c7c:	e92d41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
-    6c80:	e1a07001 	mov	r7, r1
-    6c84:	e1a08002 	mov	r8, r2
-    6c88:	e1a05000 	mov	r5, r0
-    6c8c:	e3a06000 	mov	r6, #0	; 0x0
-    6c90:	e5950000 	ldr	r0, [r5]
-    6c94:	e5971000 	ldr	r1, [r7]
-    6c98:	eb0036e9 	bl	14844 <__aeabi_fmul>
-    6c9c:	e3a01000 	mov	r1, #0	; 0x0
-    6ca0:	eb00363f 	bl	145a4 <__addsf3>
-    6ca4:	e5971004 	ldr	r1, [r7, #4]
-    6ca8:	e1a04000 	mov	r4, r0
-    6cac:	e5950004 	ldr	r0, [r5, #4]
-    6cb0:	eb0036e3 	bl	14844 <__aeabi_fmul>
-    6cb4:	e1a01004 	mov	r1, r4
-    6cb8:	eb003639 	bl	145a4 <__addsf3>
-    6cbc:	e7860008 	str	r0, [r6, r8]
-    6cc0:	e2866004 	add	r6, r6, #4	; 0x4
-    6cc4:	e3560008 	cmp	r6, #8	; 0x8
-    6cc8:	e2855008 	add	r5, r5, #8	; 0x8
-    6ccc:	1affffef 	bne	6c90 <multMatVec2+0x14>
-    6cd0:	e8bd41f0 	ldmia	sp!, {r4, r5, r6, r7, r8, lr}
-    6cd4:	e12fff1e 	bx	lr
-
-00006cd8 <transpose>:
-    6cd8:	e92d41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
-    6cdc:	e2527000 	subs	r7, r2, #0	; 0x0
-    6ce0:	e1a08000 	mov	r8, r0
-    6ce4:	e1a05001 	mov	r5, r1
-    6ce8:	e1a04003 	mov	r4, r3
-    6cec:	c3a06000 	movgt	r6, #0	; 0x0
-    6cf0:	da00000f 	ble	6d34 <transpose+0x5c>
-    6cf4:	e3540000 	cmp	r4, #0	; 0x0
-    6cf8:	da00000a 	ble	6d28 <transpose+0x50>
-    6cfc:	e3a0c000 	mov	ip, #0	; 0x0
-    6d00:	e7980106 	ldr	r0, [r8, r6, lsl #2]
-    6d04:	e1a01106 	mov	r1, r6, lsl #2
-    6d08:	e1a0e00c 	mov	lr, ip
-    6d0c:	e79c2005 	ldr	r2, [ip, r5]
-    6d10:	e79c3000 	ldr	r3, [ip, r0]
-    6d14:	e28ee001 	add	lr, lr, #1	; 0x1
-    6d18:	e154000e 	cmp	r4, lr
-    6d1c:	e7823001 	str	r3, [r2, r1]
-    6d20:	e28cc004 	add	ip, ip, #4	; 0x4
-    6d24:	1afffff8 	bne	6d0c <transpose+0x34>
-    6d28:	e2866001 	add	r6, r6, #1	; 0x1
-    6d2c:	e1570006 	cmp	r7, r6
-    6d30:	1affffef 	bne	6cf4 <transpose+0x1c>
-    6d34:	e8bd41f0 	ldmia	sp!, {r4, r5, r6, r7, r8, lr}
-    6d38:	e12fff1e 	bx	lr
-
-00006d3c <invert3>:
-    6d3c:	e92d4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
-    6d40:	e8900420 	ldmia	r0, {r5, sl}
-    6d44:	e5954000 	ldr	r4, [r5]
-    6d48:	e24dd004 	sub	sp, sp, #4	; 0x4
-    6d4c:	e5907008 	ldr	r7, [r0, #8]
-    6d50:	e58d1000 	str	r1, [sp]
-    6d54:	e1a00004 	mov	r0, r4
-    6d58:	e59a1004 	ldr	r1, [sl, #4]
-    6d5c:	eb0036b8 	bl	14844 <__aeabi_fmul>
-    6d60:	e5971008 	ldr	r1, [r7, #8]
-    6d64:	eb0036b6 	bl	14844 <__aeabi_fmul>
-    6d68:	e59ab008 	ldr	fp, [sl, #8]
-    6d6c:	e1a06000 	mov	r6, r0
-    6d70:	e1a0100b 	mov	r1, fp
-    6d74:	e1a00004 	mov	r0, r4
-    6d78:	eb0036b1 	bl	14844 <__aeabi_fmul>
-    6d7c:	e5971004 	ldr	r1, [r7, #4]
-    6d80:	eb0036af 	bl	14844 <__aeabi_fmul>
-    6d84:	e1a01000 	mov	r1, r0
-    6d88:	e1a00006 	mov	r0, r6
-    6d8c:	eb003603 	bl	145a0 <__aeabi_fsub>
-    6d90:	e59a6000 	ldr	r6, [sl]
-    6d94:	e5959004 	ldr	r9, [r5, #4]
-    6d98:	e1a04000 	mov	r4, r0
-    6d9c:	e1a01009 	mov	r1, r9
-    6da0:	e1a00006 	mov	r0, r6
-    6da4:	eb0036a6 	bl	14844 <__aeabi_fmul>
-    6da8:	e1a01000 	mov	r1, r0
-    6dac:	e5970008 	ldr	r0, [r7, #8]
-    6db0:	eb0036a3 	bl	14844 <__aeabi_fmul>
-    6db4:	e1a01000 	mov	r1, r0
-    6db8:	e1a00004 	mov	r0, r4
-    6dbc:	eb0035f7 	bl	145a0 <__aeabi_fsub>
-    6dc0:	e5958008 	ldr	r8, [r5, #8]
-    6dc4:	e1a04000 	mov	r4, r0
-    6dc8:	e1a01008 	mov	r1, r8
-    6dcc:	e1a00006 	mov	r0, r6
-    6dd0:	eb00369b 	bl	14844 <__aeabi_fmul>
-    6dd4:	e1a01000 	mov	r1, r0
-    6dd8:	e5970004 	ldr	r0, [r7, #4]
-    6ddc:	eb003698 	bl	14844 <__aeabi_fmul>
-    6de0:	e1a01000 	mov	r1, r0
-    6de4:	e1a00004 	mov	r0, r4
-    6de8:	eb0035ed 	bl	145a4 <__addsf3>
-    6dec:	e5976000 	ldr	r6, [r7]
-    6df0:	e1a04000 	mov	r4, r0
-    6df4:	e1a01006 	mov	r1, r6
-    6df8:	e1a00009 	mov	r0, r9
-    6dfc:	eb003690 	bl	14844 <__aeabi_fmul>
-    6e00:	e1a01000 	mov	r1, r0
-    6e04:	e1a0000b 	mov	r0, fp
-    6e08:	eb00368d 	bl	14844 <__aeabi_fmul>
-    6e0c:	e1a01000 	mov	r1, r0
-    6e10:	e1a00004 	mov	r0, r4
-    6e14:	eb0035e2 	bl	145a4 <__addsf3>
-    6e18:	e1a01006 	mov	r1, r6
-    6e1c:	e1a04000 	mov	r4, r0
-    6e20:	e1a00008 	mov	r0, r8
-    6e24:	eb003686 	bl	14844 <__aeabi_fmul>
-    6e28:	e1a01000 	mov	r1, r0
-    6e2c:	e59a0004 	ldr	r0, [sl, #4]
-    6e30:	eb003683 	bl	14844 <__aeabi_fmul>
-    6e34:	e1a01000 	mov	r1, r0
-    6e38:	e1a00004 	mov	r0, r4
-    6e3c:	eb0035d7 	bl	145a0 <__aeabi_fsub>
-    6e40:	e5971008 	ldr	r1, [r7, #8]
-    6e44:	e1a08000 	mov	r8, r0
-    6e48:	e59a0004 	ldr	r0, [sl, #4]
-    6e4c:	eb00367c 	bl	14844 <__aeabi_fmul>
-    6e50:	e5971004 	ldr	r1, [r7, #4]
-    6e54:	e1a04000 	mov	r4, r0
-    6e58:	e1a0000b 	mov	r0, fp
-    6e5c:	eb003678 	bl	14844 <__aeabi_fmul>
-    6e60:	e1a01000 	mov	r1, r0
-    6e64:	e1a00004 	mov	r0, r4
-    6e68:	eb0035cc 	bl	145a0 <__aeabi_fsub>
-    6e6c:	e1a01008 	mov	r1, r8
-    6e70:	eb0036d9 	bl	149dc <__aeabi_fdiv>
-    6e74:	e59d3000 	ldr	r3, [sp]
-    6e78:	e5936000 	ldr	r6, [r3]
-    6e7c:	e5860000 	str	r0, [r6]
-    6e80:	e5953004 	ldr	r3, [r5, #4]
-    6e84:	e5971008 	ldr	r1, [r7, #8]
-    6e88:	e2830102 	add	r0, r3, #-2147483648	; 0x80000000
-    6e8c:	eb00366c 	bl	14844 <__aeabi_fmul>
-    6e90:	e5971004 	ldr	r1, [r7, #4]
-    6e94:	e1a04000 	mov	r4, r0
-    6e98:	e5950008 	ldr	r0, [r5, #8]
-    6e9c:	eb003668 	bl	14844 <__aeabi_fmul>
-    6ea0:	e1a01000 	mov	r1, r0
-    6ea4:	e1a00004 	mov	r0, r4
-    6ea8:	eb0035bd 	bl	145a4 <__addsf3>
-    6eac:	e1a01008 	mov	r1, r8
-    6eb0:	eb0036c9 	bl	149dc <__aeabi_fdiv>
-    6eb4:	e5860004 	str	r0, [r6, #4]
-    6eb8:	e59a1008 	ldr	r1, [sl, #8]
-    6ebc:	e5950004 	ldr	r0, [r5, #4]
-    6ec0:	eb00365f 	bl	14844 <__aeabi_fmul>
-    6ec4:	e59a1004 	ldr	r1, [sl, #4]
-    6ec8:	e1a04000 	mov	r4, r0
-    6ecc:	e5950008 	ldr	r0, [r5, #8]
-    6ed0:	eb00365b 	bl	14844 <__aeabi_fmul>
-    6ed4:	e1a01000 	mov	r1, r0
-    6ed8:	e1a00004 	mov	r0, r4
-    6edc:	eb0035af 	bl	145a0 <__aeabi_fsub>
-    6ee0:	e1a01008 	mov	r1, r8
-    6ee4:	eb0036bc 	bl	149dc <__aeabi_fdiv>
-    6ee8:	e5860008 	str	r0, [r6, #8]
-    6eec:	e59a3000 	ldr	r3, [sl]
-    6ef0:	e5971008 	ldr	r1, [r7, #8]
-    6ef4:	e2830102 	add	r0, r3, #-2147483648	; 0x80000000
-    6ef8:	eb003651 	bl	14844 <__aeabi_fmul>
-    6efc:	e5971000 	ldr	r1, [r7]
-    6f00:	e1a04000 	mov	r4, r0
-    6f04:	e59a0008 	ldr	r0, [sl, #8]
-    6f08:	eb00364d 	bl	14844 <__aeabi_fmul>
-    6f0c:	e1a01000 	mov	r1, r0
-    6f10:	e1a00004 	mov	r0, r4
-    6f14:	eb0035a2 	bl	145a4 <__addsf3>
-    6f18:	e1a01008 	mov	r1, r8
-    6f1c:	eb0036ae 	bl	149dc <__aeabi_fdiv>
-    6f20:	e59d3000 	ldr	r3, [sp]
-    6f24:	e5936004 	ldr	r6, [r3, #4]
-    6f28:	e5860000 	str	r0, [r6]
-    6f2c:	e5971008 	ldr	r1, [r7, #8]
-    6f30:	e5950000 	ldr	r0, [r5]
-    6f34:	eb003642 	bl	14844 <__aeabi_fmul>
-    6f38:	e5971000 	ldr	r1, [r7]
-    6f3c:	e1a04000 	mov	r4, r0
-    6f40:	e5950008 	ldr	r0, [r5, #8]
-    6f44:	eb00363e 	bl	14844 <__aeabi_fmul>
-    6f48:	e1a01000 	mov	r1, r0
-    6f4c:	e1a00004 	mov	r0, r4
-    6f50:	eb003592 	bl	145a0 <__aeabi_fsub>
-    6f54:	e1a01008 	mov	r1, r8
-    6f58:	eb00369f 	bl	149dc <__aeabi_fdiv>
-    6f5c:	e5860004 	str	r0, [r6, #4]
-    6f60:	e5953000 	ldr	r3, [r5]
-    6f64:	e59a1008 	ldr	r1, [sl, #8]
-    6f68:	e2830102 	add	r0, r3, #-2147483648	; 0x80000000
-    6f6c:	eb003634 	bl	14844 <__aeabi_fmul>
-    6f70:	e59a1000 	ldr	r1, [sl]
-    6f74:	e1a04000 	mov	r4, r0
-    6f78:	e5950008 	ldr	r0, [r5, #8]
-    6f7c:	eb003630 	bl	14844 <__aeabi_fmul>
-    6f80:	e1a01000 	mov	r1, r0
-    6f84:	e1a00004 	mov	r0, r4
-    6f88:	eb003585 	bl	145a4 <__addsf3>
-    6f8c:	e1a01008 	mov	r1, r8
-    6f90:	eb003691 	bl	149dc <__aeabi_fdiv>
-    6f94:	e5860008 	str	r0, [r6, #8]
-    6f98:	e5971004 	ldr	r1, [r7, #4]
-    6f9c:	e59a0000 	ldr	r0, [sl]
-    6fa0:	eb003627 	bl	14844 <__aeabi_fmul>
-    6fa4:	e5971000 	ldr	r1, [r7]
-    6fa8:	e1a04000 	mov	r4, r0
-    6fac:	e59a0004 	ldr	r0, [sl, #4]
-    6fb0:	eb003623 	bl	14844 <__aeabi_fmul>
-    6fb4:	e1a01000 	mov	r1, r0
-    6fb8:	e1a00004 	mov	r0, r4
-    6fbc:	eb003577 	bl	145a0 <__aeabi_fsub>
-    6fc0:	e1a01008 	mov	r1, r8
-    6fc4:	eb003684 	bl	149dc <__aeabi_fdiv>
-    6fc8:	e59d3000 	ldr	r3, [sp]
-    6fcc:	e5936008 	ldr	r6, [r3, #8]
-    6fd0:	e5860000 	str	r0, [r6]
-    6fd4:	e5953000 	ldr	r3, [r5]
-    6fd8:	e5971004 	ldr	r1, [r7, #4]
-    6fdc:	e2830102 	add	r0, r3, #-2147483648	; 0x80000000
-    6fe0:	eb003617 	bl	14844 <__aeabi_fmul>
-    6fe4:	e5971000 	ldr	r1, [r7]
-    6fe8:	e1a04000 	mov	r4, r0
-    6fec:	e5950004 	ldr	r0, [r5, #4]
-    6ff0:	eb003613 	bl	14844 <__aeabi_fmul>
-    6ff4:	e1a01000 	mov	r1, r0
-    6ff8:	e1a00004 	mov	r0, r4
-    6ffc:	eb003568 	bl	145a4 <__addsf3>
-    7000:	e1a01008 	mov	r1, r8
-    7004:	eb003674 	bl	149dc <__aeabi_fdiv>
-    7008:	e5860004 	str	r0, [r6, #4]
-    700c:	e59a1004 	ldr	r1, [sl, #4]
-    7010:	e5950000 	ldr	r0, [r5]
-    7014:	eb00360a 	bl	14844 <__aeabi_fmul>
-    7018:	e59a1000 	ldr	r1, [sl]
-    701c:	e1a04000 	mov	r4, r0
-    7020:	e5950004 	ldr	r0, [r5, #4]
-    7024:	eb003606 	bl	14844 <__aeabi_fmul>
-    7028:	e1a01000 	mov	r1, r0
-    702c:	e1a00004 	mov	r0, r4
-    7030:	eb00355a 	bl	145a0 <__aeabi_fsub>
-    7034:	e1a01008 	mov	r1, r8
-    7038:	eb003667 	bl	149dc <__aeabi_fdiv>
-    703c:	e5860008 	str	r0, [r6, #8]
-    7040:	e28dd004 	add	sp, sp, #4	; 0x4
-    7044:	e8bd4ff0 	ldmia	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
-    7048:	e12fff1e 	bx	lr
-
-0000704c <invert2>:
-    704c:	e92d40f0 	stmdb	sp!, {r4, r5, r6, r7, lr}
-    7050:	e590700c 	ldr	r7, [r0, #12]
-    7054:	e1a04000 	mov	r4, r0
-    7058:	e1a06001 	mov	r6, r1
-    705c:	e1a00007 	mov	r0, r7
-    7060:	e5941000 	ldr	r1, [r4]
-    7064:	eb0035f6 	bl	14844 <__aeabi_fmul>
-    7068:	e5941008 	ldr	r1, [r4, #8]
-    706c:	e1a05000 	mov	r5, r0
-    7070:	e5940004 	ldr	r0, [r4, #4]
-    7074:	eb0035f2 	bl	14844 <__aeabi_fmul>
-    7078:	e1a01000 	mov	r1, r0
-    707c:	e1a00005 	mov	r0, r5
-    7080:	eb003546 	bl	145a0 <__aeabi_fsub>
-    7084:	e1a05000 	mov	r5, r0
-    7088:	e1a01005 	mov	r1, r5
-    708c:	e1a00007 	mov	r0, r7
-    7090:	eb003651 	bl	149dc <__aeabi_fdiv>
-    7094:	e5860000 	str	r0, [r6]
-    7098:	e5943004 	ldr	r3, [r4, #4]
-    709c:	e1a01005 	mov	r1, r5
-    70a0:	e2830102 	add	r0, r3, #-2147483648	; 0x80000000
-    70a4:	eb00364c 	bl	149dc <__aeabi_fdiv>
-    70a8:	e5860004 	str	r0, [r6, #4]
-    70ac:	e5943008 	ldr	r3, [r4, #8]
-    70b0:	e1a01005 	mov	r1, r5
-    70b4:	e2830102 	add	r0, r3, #-2147483648	; 0x80000000
-    70b8:	eb003647 	bl	149dc <__aeabi_fdiv>
-    70bc:	e5860008 	str	r0, [r6, #8]
-    70c0:	e1a01005 	mov	r1, r5
-    70c4:	e5940000 	ldr	r0, [r4]
-    70c8:	eb003643 	bl	149dc <__aeabi_fdiv>
-    70cc:	e2866008 	add	r6, r6, #8	; 0x8
-    70d0:	e5860004 	str	r0, [r6, #4]
-    70d4:	e8bd40f0 	ldmia	sp!, {r4, r5, r6, r7, lr}
-    70d8:	e12fff1e 	bx	lr
-
-000070dc <determinant>:
-    70dc:	e92d4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
-    70e0:	e252a000 	subs	sl, r2, #0	; 0x0
-    70e4:	e24dd00c 	sub	sp, sp, #12	; 0xc
-    70e8:	c3a04000 	movgt	r4, #0	; 0x0
-    70ec:	e58d1000 	str	r1, [sp]
-    70f0:	d3a005fe 	movle	r0, #1065353216	; 0x3f800000
-    70f4:	c1a05004 	movgt	r5, r4
-    70f8:	da00003f 	ble	71fc <determinant+0x120>
-    70fc:	e59d3000 	ldr	r3, [sp]
-    7100:	e3a01000 	mov	r1, #0	; 0x0
-    7104:	e794e003 	ldr	lr, [r4, r3]
-    7108:	e1a0c001 	mov	ip, r1
-    710c:	e7913000 	ldr	r3, [r1, r0]
-    7110:	e28cc001 	add	ip, ip, #1	; 0x1
-    7114:	e7932004 	ldr	r2, [r3, r4]
-    7118:	e15a000c 	cmp	sl, ip
-    711c:	e781200e 	str	r2, [r1, lr]
-    7120:	e2811004 	add	r1, r1, #4	; 0x4
-    7124:	1afffff8 	bne	710c <determinant+0x30>
-    7128:	e2855001 	add	r5, r5, #1	; 0x1
-    712c:	e15a0005 	cmp	sl, r5
-    7130:	e2844004 	add	r4, r4, #4	; 0x4
-    7134:	1afffff0 	bne	70fc <determinant+0x20>
-    7138:	e3a02000 	mov	r2, #0	; 0x0
-    713c:	e58d2004 	str	r2, [sp, #4]
-    7140:	e58d2008 	str	r2, [sp, #8]
-    7144:	e89d000c 	ldmia	sp, {r2, r3}
-    7148:	e7938002 	ldr	r8, [r3, r2]
-    714c:	e3a09000 	mov	r9, #0	; 0x0
-    7150:	e088b003 	add	fp, r8, r3
-    7154:	e89d000c 	ldmia	sp, {r2, r3}
-    7158:	e7926109 	ldr	r6, [r2, r9, lsl #2]
-    715c:	e59b1000 	ldr	r1, [fp]
-    7160:	e7960003 	ldr	r0, [r6, r3]
-    7164:	eb00361c 	bl	149dc <__aeabi_fdiv>
-    7168:	e59d2008 	ldr	r2, [sp, #8]
-    716c:	e1520009 	cmp	r2, r9
-    7170:	e1a07000 	mov	r7, r0
-    7174:	0a00000c 	beq	71ac <determinant+0xd0>
-    7178:	e3a05000 	mov	r5, #0	; 0x0
-    717c:	e1a04005 	mov	r4, r5
-    7180:	e7941008 	ldr	r1, [r4, r8]
-    7184:	e7940006 	ldr	r0, [r4, r6]
-    7188:	eb003504 	bl	145a0 <__aeabi_fsub>
-    718c:	e1a01000 	mov	r1, r0
-    7190:	e1a00007 	mov	r0, r7
-    7194:	eb0035aa 	bl	14844 <__aeabi_fmul>
-    7198:	e2855001 	add	r5, r5, #1	; 0x1
-    719c:	e15a0005 	cmp	sl, r5
-    71a0:	e7840006 	str	r0, [r4, r6]
-    71a4:	e2844004 	add	r4, r4, #4	; 0x4
-    71a8:	1afffff4 	bne	7180 <determinant+0xa4>
-    71ac:	e2899001 	add	r9, r9, #1	; 0x1
-    71b0:	e15a0009 	cmp	sl, r9
-    71b4:	1affffe6 	bne	7154 <determinant+0x78>
-    71b8:	e99d000c 	ldmib	sp, {r2, r3}
-    71bc:	e2833001 	add	r3, r3, #1	; 0x1
-    71c0:	e2822004 	add	r2, r2, #4	; 0x4
-    71c4:	e15a0003 	cmp	sl, r3
-    71c8:	e98d000c 	stmib	sp, {r2, r3}
-    71cc:	1affffdc 	bne	7144 <determinant+0x68>
-    71d0:	e3a05000 	mov	r5, #0	; 0x0
-    71d4:	e3a005fe 	mov	r0, #1065353216	; 0x3f800000
-    71d8:	e1a04005 	mov	r4, r5
-    71dc:	e59d2000 	ldr	r2, [sp]
-    71e0:	e7943002 	ldr	r3, [r4, r2]
-    71e4:	e2855001 	add	r5, r5, #1	; 0x1
-    71e8:	e7931004 	ldr	r1, [r3, r4]
-    71ec:	eb003594 	bl	14844 <__aeabi_fmul>
-    71f0:	e15a0005 	cmp	sl, r5
-    71f4:	e2844004 	add	r4, r4, #4	; 0x4
-    71f8:	1afffff7 	bne	71dc <determinant+0x100>
-    71fc:	e28dd00c 	add	sp, sp, #12	; 0xc
-    7200:	e8bd4ff0 	ldmia	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
-    7204:	e12fff1e 	bx	lr
-
-00007208 <getMinor>:
-    7208:	e92d47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
-    720c:	e252a000 	subs	sl, r2, #0	; 0x0
-    7210:	e1a09001 	mov	r9, r1
-    7214:	da00001d 	ble	7290 <getMinor+0x88>
-    7218:	e2438001 	sub	r8, r3, #1	; 0x1
-    721c:	e59d3020 	ldr	r3, [sp, #32]
-    7220:	e3a06000 	mov	r6, #0	; 0x0
-    7224:	e1a05000 	mov	r5, r0
-    7228:	e2434001 	sub	r4, r3, #1	; 0x1
-    722c:	e1a07006 	mov	r7, r6
-    7230:	e24a0001 	sub	r0, sl, #1	; 0x1
-    7234:	e1580006 	cmp	r8, r6
-    7238:	0a000010 	beq	7280 <getMinor+0x78>
-    723c:	e3500000 	cmp	r0, #0	; 0x0
-    7240:	da00000d 	ble	727c <getMinor+0x74>
-    7244:	e3a0e000 	mov	lr, #0	; 0x0
-    7248:	e7991107 	ldr	r1, [r9, r7, lsl #2]
-    724c:	e5952000 	ldr	r2, [r5]
-    7250:	e1a0c00e 	mov	ip, lr
-    7254:	e154000e 	cmp	r4, lr
-    7258:	e082300c 	add	r3, r2, ip
-    725c:	d5933004 	ldrle	r3, [r3, #4]
-    7260:	c792300c 	ldrgt	r3, [r2, ip]
-    7264:	e28ee001 	add	lr, lr, #1	; 0x1
-    7268:	c781300c 	strgt	r3, [r1, ip]
-    726c:	d781300c 	strle	r3, [r1, ip]
-    7270:	e15e0000 	cmp	lr, r0
-    7274:	e28cc004 	add	ip, ip, #4	; 0x4
-    7278:	1afffff5 	bne	7254 <getMinor+0x4c>
-    727c:	e2877001 	add	r7, r7, #1	; 0x1
-    7280:	e2866001 	add	r6, r6, #1	; 0x1
-    7284:	e15a0006 	cmp	sl, r6
-    7288:	e2855004 	add	r5, r5, #4	; 0x4
-    728c:	1affffe8 	bne	7234 <getMinor+0x2c>
-    7290:	e8bd47f0 	ldmia	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
-    7294:	e12fff1e 	bx	lr
-
-00007298 <invt>:
-    7298:	e92d4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
-    729c:	e24dd018 	sub	sp, sp, #24	; 0x18
-    72a0:	e59db03c 	ldr	fp, [sp, #60]
-    72a4:	e58d1008 	str	r1, [sp, #8]
-    72a8:	e1a08002 	mov	r8, r2
-    72ac:	e1a01003 	mov	r1, r3
-    72b0:	e1a0200b 	mov	r2, fp
-    72b4:	e1a09003 	mov	r9, r3
-    72b8:	e58d000c 	str	r0, [sp, #12]
-    72bc:	ebffff86 	bl	70dc <determinant>
-    72c0:	e35b0000 	cmp	fp, #0	; 0x0
-    72c4:	c24b2001 	subgt	r2, fp, #1	; 0x1
-    72c8:	e58d0014 	str	r0, [sp, #20]
-    72cc:	c3a03000 	movgt	r3, #0	; 0x0
-    72d0:	c58d2004 	strgt	r2, [sp, #4]
-    72d4:	da00002a 	ble	7384 <invt+0xec>
-    72d8:	e59d6008 	ldr	r6, [sp, #8]
-    72dc:	e1a07003 	mov	r7, r3
-    72e0:	e283a001 	add	sl, r3, #1	; 0x1
-    72e4:	e3a05000 	mov	r5, #0	; 0x0
-    72e8:	e1a03103 	mov	r3, r3, lsl #2
-    72ec:	e58d3010 	str	r3, [sp, #16]
-    72f0:	ea000009 	b	731c <invt+0x84>
-    72f4:	e5964000 	ldr	r4, [r6]
-    72f8:	ebffff77 	bl	70dc <determinant>
-    72fc:	e59d1014 	ldr	r1, [sp, #20]
-    7300:	eb0035b5 	bl	149dc <__aeabi_fdiv>
-    7304:	e59d3010 	ldr	r3, [sp, #16]
-    7308:	e15b0005 	cmp	fp, r5
-    730c:	e7830004 	str	r0, [r3, r4]
-    7310:	e2877001 	add	r7, r7, #1	; 0x1
-    7314:	e2866004 	add	r6, r6, #4	; 0x4
-    7318:	0a000016 	beq	7378 <invt+0xe0>
-    731c:	e59d000c 	ldr	r0, [sp, #12]
-    7320:	e1a01008 	mov	r1, r8
-    7324:	e1a0200b 	mov	r2, fp
-    7328:	e2855001 	add	r5, r5, #1	; 0x1
-    732c:	e1a0300a 	mov	r3, sl
-    7330:	e58d5000 	str	r5, [sp]
-    7334:	ebffffb3 	bl	7208 <getMinor>
-    7338:	e3170001 	tst	r7, #1	; 0x1
-    733c:	e1a01009 	mov	r1, r9
-    7340:	e59d2004 	ldr	r2, [sp, #4]
-    7344:	e1a00008 	mov	r0, r8
-    7348:	0affffe9 	beq	72f4 <invt+0x5c>
-    734c:	e5964000 	ldr	r4, [r6]
-    7350:	ebffff61 	bl	70dc <determinant>
-    7354:	e59d1014 	ldr	r1, [sp, #20]
-    7358:	e2800102 	add	r0, r0, #-2147483648	; 0x80000000
-    735c:	eb00359e 	bl	149dc <__aeabi_fdiv>
-    7360:	e59d2010 	ldr	r2, [sp, #16]
-    7364:	e15b0005 	cmp	fp, r5
-    7368:	e7820004 	str	r0, [r2, r4]
-    736c:	e2877001 	add	r7, r7, #1	; 0x1
-    7370:	e2866004 	add	r6, r6, #4	; 0x4
-    7374:	1affffe8 	bne	731c <invt+0x84>
-    7378:	e155000a 	cmp	r5, sl
-    737c:	11a0300a 	movne	r3, sl
-    7380:	1affffd4 	bne	72d8 <invt+0x40>
-    7384:	e28dd018 	add	sp, sp, #24	; 0x18
-    7388:	e8bd4ff0 	ldmia	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
-    738c:	e12fff1e 	bx	lr
-
-00007390 <BhQhBhT>:
-    7390:	e92d45f0 	stmdb	sp!, {r4, r5, r6, r7, r8, sl, lr}
-    7394:	e1a07000 	mov	r7, r0
-    7398:	e1a08001 	mov	r8, r1
-    739c:	e1a0a002 	mov	sl, r2
-    73a0:	e3a06000 	mov	r6, #0	; 0x0
-    73a4:	e3a05000 	mov	r5, #0	; 0x0
-    73a8:	e3a04000 	mov	r4, #0	; 0x0
-    73ac:	e7943007 	ldr	r3, [r4, r7]
-    73b0:	e7940008 	ldr	r0, [r4, r8]
-    73b4:	e7931006 	ldr	r1, [r3, r6]
-    73b8:	eb003521 	bl	14844 <__aeabi_fmul>
-    73bc:	e1a01000 	mov	r1, r0
-    73c0:	e1a00005 	mov	r0, r5
-    73c4:	eb003476 	bl	145a4 <__addsf3>
-    73c8:	e2844004 	add	r4, r4, #4	; 0x4
-    73cc:	e354000c 	cmp	r4, #12	; 0xc
-    73d0:	e1a05000 	mov	r5, r0
-    73d4:	1afffff4 	bne	73ac <BhQhBhT+0x1c>
-    73d8:	e786000a 	str	r0, [r6, sl]
-    73dc:	e2866004 	add	r6, r6, #4	; 0x4
-    73e0:	e356000c 	cmp	r6, #12	; 0xc
-    73e4:	1affffee 	bne	73a4 <BhQhBhT+0x14>
-    73e8:	e3a05000 	mov	r5, #0	; 0x0
-    73ec:	e244400c 	sub	r4, r4, #12	; 0xc
-    73f0:	e7941008 	ldr	r1, [r4, r8]
-    73f4:	e794000a 	ldr	r0, [r4, sl]
-    73f8:	eb003511 	bl	14844 <__aeabi_fmul>
-    73fc:	e1a01000 	mov	r1, r0
-    7400:	e1a00005 	mov	r0, r5
-    7404:	eb003466 	bl	145a4 <__addsf3>
-    7408:	e2844004 	add	r4, r4, #4	; 0x4
-    740c:	e354000c 	cmp	r4, #12	; 0xc
-    7410:	e1a05000 	mov	r5, r0
-    7414:	1afffff5 	bne	73f0 <BhQhBhT+0x60>
-    7418:	e8bd45f0 	ldmia	sp!, {r4, r5, r6, r7, r8, sl, lr}
-    741c:	e12fff1e 	bx	lr
-
-00007420 <VectdivSc>:
-    7420:	e92d4070 	stmdb	sp!, {r4, r5, r6, lr}
-    7424:	e1a05000 	mov	r5, r0
-    7428:	e1a06001 	mov	r6, r1
-    742c:	e3a04000 	mov	r4, #0	; 0x0
-    7430:	e7940005 	ldr	r0, [r4, r5]
-    7434:	e1a01006 	mov	r1, r6
-    7438:	eb003567 	bl	149dc <__aeabi_fdiv>
-    743c:	e7840005 	str	r0, [r4, r5]
-    7440:	e2844004 	add	r4, r4, #4	; 0x4
-    7444:	e354000c 	cmp	r4, #12	; 0xc
-    7448:	1afffff8 	bne	7430 <VectdivSc+0x10>
-    744c:	e8bd4070 	ldmia	sp!, {r4, r5, r6, lr}
-    7450:	e12fff1e 	bx	lr
-
-00007454 <VectmultSc2>:
-    7454:	e92d4070 	stmdb	sp!, {r4, r5, r6, lr}
-    7458:	e1a04000 	mov	r4, r0
-    745c:	e5900000 	ldr	r0, [r0]
-    7460:	e1a06002 	mov	r6, r2
-    7464:	e1a05001 	mov	r5, r1
-    7468:	eb0034f5 	bl	14844 <__aeabi_fmul>
-    746c:	e5860000 	str	r0, [r6]
-    7470:	e1a00005 	mov	r0, r5
-    7474:	e5941004 	ldr	r1, [r4, #4]
-    7478:	eb0034f1 	bl	14844 <__aeabi_fmul>
-    747c:	e5860004 	str	r0, [r6, #4]
-    7480:	e8bd4070 	ldmia	sp!, {r4, r5, r6, lr}
-    7484:	e12fff1e 	bx	lr
-
-00007488 <normalizeSIAngle2Pi>:
-    7488:	e92d4070 	stmdb	sp!, {r4, r5, r6, lr}
-    748c:	e5904000 	ldr	r4, [r0]
-    7490:	e1a06000 	mov	r6, r0
-    7494:	e3a01000 	mov	r1, #0	; 0x0
-    7498:	e1a00004 	mov	r0, r4
-    749c:	eb0035a8 	bl	14b44 <__lesf2>
-    74a0:	e3500000 	cmp	r0, #0	; 0x0
-    74a4:	e1a00004 	mov	r0, r4
-    74a8:	ba000011 	blt	74f4 <normalizeSIAngle2Pi+0x6c>
-    74ac:	e1a00004 	mov	r0, r4
-    74b0:	eb003252 	bl	13e00 <__aeabi_f2d>
-    74b4:	e28f2054 	add	r2, pc, #84	; 0x54
-    74b8:	e892000c 	ldmia	r2, {r2, r3}
-    74bc:	e1a04000 	mov	r4, r0
-    74c0:	e1a05001 	mov	r5, r1
-    74c4:	eb0033a4 	bl	1435c <__gedf2>
-    74c8:	e3500000 	cmp	r0, #0	; 0x0
-    74cc:	e28f203c 	add	r2, pc, #60	; 0x3c
-    74d0:	e892000c 	ldmia	r2, {r2, r3}
-    74d4:	e1a00004 	mov	r0, r4
-    74d8:	e1a01005 	mov	r1, r5
-    74dc:	ba000002 	blt	74ec <normalizeSIAngle2Pi+0x64>
-    74e0:	eb00316c 	bl	13a98 <__aeabi_dsub>
-    74e4:	eb003403 	bl	144f8 <__aeabi_d2f>
-    74e8:	e5860000 	str	r0, [r6]
-    74ec:	e8bd4070 	ldmia	sp!, {r4, r5, r6, lr}
-    74f0:	e12fff1e 	bx	lr
-    74f4:	eb003241 	bl	13e00 <__aeabi_f2d>
-    74f8:	e28f2010 	add	r2, pc, #16	; 0x10
-    74fc:	e892000c 	ldmia	r2, {r2, r3}
-    7500:	eb003165 	bl	13a9c <__adddf3>
-    7504:	eb0033fb 	bl	144f8 <__aeabi_d2f>
-    7508:	e5860000 	str	r0, [r6]
-    750c:	eafffff6 	b	74ec <normalizeSIAngle2Pi+0x64>
-    7510:	401921fb 	ldrmish	r2, [r9], -fp
-    7514:	54442d18 	strplb	r2, [r4], #-3352
-
-00007518 <normalizeSIAnglePi>:
-    7518:	e92d4070 	stmdb	sp!, {r4, r5, r6, lr}
-    751c:	e1a06000 	mov	r6, r0
-    7520:	e5900000 	ldr	r0, [r0]
-    7524:	eb003235 	bl	13e00 <__aeabi_f2d>
-    7528:	e28f2074 	add	r2, pc, #116	; 0x74
-    752c:	e892000c 	ldmia	r2, {r2, r3}
-    7530:	e1a04000 	mov	r4, r0
-    7534:	e1a05001 	mov	r5, r1
-    7538:	eb003389 	bl	14364 <__ledf2>
-    753c:	e3500000 	cmp	r0, #0	; 0x0
-    7540:	e28f2064 	add	r2, pc, #100	; 0x64
-    7544:	e892000c 	ldmia	r2, {r2, r3}
-    7548:	e1a00004 	mov	r0, r4
-    754c:	e1a01005 	mov	r1, r5
-    7550:	aa000004 	bge	7568 <normalizeSIAnglePi+0x50>
-    7554:	eb003150 	bl	13a9c <__adddf3>
-    7558:	eb0033e6 	bl	144f8 <__aeabi_d2f>
-    755c:	e5860000 	str	r0, [r6]
-    7560:	e8bd4070 	ldmia	sp!, {r4, r5, r6, lr}
-    7564:	e12fff1e 	bx	lr
-    7568:	e1a01005 	mov	r1, r5
-    756c:	e28f2040 	add	r2, pc, #64	; 0x40
-    7570:	e892000c 	ldmia	r2, {r2, r3}
-    7574:	e1a00004 	mov	r0, r4
-    7578:	eb003377 	bl	1435c <__gedf2>
-    757c:	e3500000 	cmp	r0, #0	; 0x0
-    7580:	e28f2024 	add	r2, pc, #36	; 0x24
-    7584:	e892000c 	ldmia	r2, {r2, r3}
-    7588:	e1a00004 	mov	r0, r4
-    758c:	e1a01005 	mov	r1, r5
-    7590:	bafffff2 	blt	7560 <normalizeSIAnglePi+0x48>
-    7594:	eb00313f 	bl	13a98 <__aeabi_dsub>
-    7598:	eb0033d6 	bl	144f8 <__aeabi_d2f>
-    759c:	e5860000 	str	r0, [r6]
-    75a0:	eaffffee 	b	7560 <normalizeSIAnglePi+0x48>
-    75a4:	c00921fb 	strgtd	r2, [r9], -fp
-    75a8:	54442d18 	strplb	r2, [r4], #-3352
-    75ac:	401921fb 	ldrmish	r2, [r9], -fp
-    75b0:	54442d18 	strplb	r2, [r4], #-3352
-    75b4:	400921fb 	strmid	r2, [r9], -fp
-    75b8:	54442d18 	strplb	r2, [r4], #-3352
-
-000075bc <timer0ISR>:
-    75bc:	e1a0c00d 	mov	ip, sp
-    75c0:	e92dd810 	stmdb	sp!, {r4, fp, ip, lr, pc}
-    75c4:	e24cb004 	sub	fp, ip, #4	; 0x4
-    75c8:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    75cc:	e2833901 	add	r3, r3, #16384	; 0x4000
-    75d0:	e3a02001 	mov	r2, #1	; 0x1
-    75d4:	e5832000 	str	r2, [r3]
-    75d8:	e59f30d4 	ldr	r3, [pc, #212]	; 76b4 <.text+0x76b4>
-    75dc:	e5933000 	ldr	r3, [r3]
-    75e0:	e2832001 	add	r2, r3, #1	; 0x1
-    75e4:	e59f30c8 	ldr	r3, [pc, #200]	; 76b4 <.text+0x76b4>
-    75e8:	e5832000 	str	r2, [r3]
-    75ec:	e59f30c0 	ldr	r3, [pc, #192]	; 76b4 <.text+0x76b4>
-    75f0:	e5933000 	ldr	r3, [r3]
-    75f4:	e3530ffa 	cmp	r3, #1000	; 0x3e8
-    75f8:	1a000012 	bne	7648 <timer0ISR+0x8c>
-    75fc:	e59f20b0 	ldr	r2, [pc, #176]	; 76b4 <.text+0x76b4>
-    7600:	e3a03000 	mov	r3, #0	; 0x0
-    7604:	e5823000 	str	r3, [r2]
-    7608:	e59f30a8 	ldr	r3, [pc, #168]	; 76b8 <.text+0x76b8>
-    760c:	e1d330b4 	ldrh	r3, [r3, #4]
-    7610:	e2833001 	add	r3, r3, #1	; 0x1
-    7614:	e1a03803 	mov	r3, r3, lsl #16
-    7618:	e1a02823 	mov	r2, r3, lsr #16
-    761c:	e59f3094 	ldr	r3, [pc, #148]	; 76b8 <.text+0x76b8>
-    7620:	e1c320b4 	strh	r2, [r3, #4]
-    7624:	e59f3090 	ldr	r3, [pc, #144]	; 76bc <.text+0x76bc>
-    7628:	e5933000 	ldr	r3, [r3]
-    762c:	e1a03803 	mov	r3, r3, lsl #16
-    7630:	e1a02823 	mov	r2, r3, lsr #16
-    7634:	e59f307c 	ldr	r3, [pc, #124]	; 76b8 <.text+0x76b8>
-    7638:	e1c321b2 	strh	r2, [r3, #18]
-    763c:	e59f2078 	ldr	r2, [pc, #120]	; 76bc <.text+0x76bc>
-    7640:	e3a03000 	mov	r3, #0	; 0x0
-    7644:	e5823000 	str	r3, [r2]
-    7648:	e59f3070 	ldr	r3, [pc, #112]	; 76c0 <.text+0x76c0>
-    764c:	e5d33000 	ldrb	r3, [r3]
-    7650:	e20330ff 	and	r3, r3, #255	; 0xff
-    7654:	e3530009 	cmp	r3, #9	; 0x9
-    7658:	8a000006 	bhi	7678 <timer0ISR+0xbc>
-    765c:	e59f305c 	ldr	r3, [pc, #92]	; 76c0 <.text+0x76c0>
-    7660:	e5d33000 	ldrb	r3, [r3]
-    7664:	e20330ff 	and	r3, r3, #255	; 0xff
-    7668:	e2833001 	add	r3, r3, #1	; 0x1
-    766c:	e20330ff 	and	r3, r3, #255	; 0xff
-    7670:	e59f2048 	ldr	r2, [pc, #72]	; 76c0 <.text+0x76c0>
-    7674:	e5c23000 	strb	r3, [r2]
-    7678:	e59f3044 	ldr	r3, [pc, #68]	; 76c4 <.text+0x76c4>
-    767c:	e8930006 	ldmia	r3, {r1, r2}
-    7680:	e3a03ffa 	mov	r3, #1000	; 0x3e8
-    7684:	e3a04000 	mov	r4, #0	; 0x0
-    7688:	e0933001 	adds	r3, r3, r1
-    768c:	e0a44002 	adc	r4, r4, r2
-    7690:	e59f202c 	ldr	r2, [pc, #44]	; 76c4 <.text+0x76c4>
-    7694:	e8820018 	stmia	r2, {r3, r4}
-    7698:	e3a03000 	mov	r3, #0	; 0x0
-    769c:	e2433efd 	sub	r3, r3, #4048	; 0xfd0
-    76a0:	e3a02000 	mov	r2, #0	; 0x0
-    76a4:	e5832000 	str	r2, [r3]
-    76a8:	e24bd010 	sub	sp, fp, #16	; 0x10
-    76ac:	e89d6810 	ldmia	sp, {r4, fp, sp, lr}
-    76b0:	e12fff1e 	bx	lr
-    76b4:	400008b0 	strmih	r0, [r0], -r0
-    76b8:	40001474 	andmi	r1, r0, r4, ror r4
-    76bc:	400008a0 	andmi	r0, r0, r0, lsr #17
-    76c0:	400008a4 	andmi	r0, r0, r4, lsr #17
-    76c4:	40000870 	andmi	r0, r0, r0, ror r8
-
-000076c8 <timer1ISR>:
-    76c8:	e1a0c00d 	mov	ip, sp
-    76cc:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    76d0:	e24cb004 	sub	fp, ip, #4	; 0x4
-    76d4:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    76d8:	e2833902 	add	r3, r3, #32768	; 0x8000
-    76dc:	e3a02001 	mov	r2, #1	; 0x1
-    76e0:	e5832000 	str	r2, [r3]
-    76e4:	e3a03000 	mov	r3, #0	; 0x0
-    76e8:	e2433efd 	sub	r3, r3, #4048	; 0xfd0
-    76ec:	e3a02000 	mov	r2, #0	; 0x0
-    76f0:	e5832000 	str	r2, [r3]
-    76f4:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    76f8:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    76fc:	e12fff1e 	bx	lr
-
-00007700 <main>:
-    7700:	e1a0c00d 	mov	ip, sp
-    7704:	e92dd810 	stmdb	sp!, {r4, fp, ip, lr, pc}
-    7708:	e24cb004 	sub	fp, ip, #4	; 0x4
-    770c:	e24dd004 	sub	sp, sp, #4	; 0x4
-    7710:	eb000302 	bl	8320 <init>
-    7714:	eb00148b 	bl	c948 <LL_write_init>
-    7718:	e59f22ac 	ldr	r2, [pc, #684]	; 79cc <.text+0x79cc>
-    771c:	e3a03000 	mov	r3, #0	; 0x0
-    7720:	e1c230b4 	strh	r3, [r2, #4]
-    7724:	e59f02a4 	ldr	r0, [pc, #676]	; 79d0 <.text+0x79d0>
-    7728:	eb003686 	bl	15148 <__puts_from_arm>
-    772c:	eb00044d 	bl	8868 <processorClockFrequency>
-    7730:	e1a03000 	mov	r3, r0
-    7734:	e59f0298 	ldr	r0, [pc, #664]	; 79d4 <.text+0x79d4>
-    7738:	e1a01003 	mov	r1, r3
-    773c:	eb003684 	bl	15154 <__printf_from_arm>
-    7740:	eb000450 	bl	8888 <peripheralClockFrequency>
-    7744:	e1a03000 	mov	r3, r0
-    7748:	e59f0288 	ldr	r0, [pc, #648]	; 79d8 <.text+0x79d8>
-    774c:	e1a01003 	mov	r1, r3
-    7750:	eb00367f 	bl	15154 <__printf_from_arm>
-    7754:	e59f3280 	ldr	r3, [pc, #640]	; 79dc <.text+0x79dc>
-    7758:	e5d33000 	ldrb	r3, [r3]
-    775c:	e59f227c 	ldr	r2, [pc, #636]	; 79e0 <.text+0x79e0>
-    7760:	e5c23000 	strb	r3, [r2]
-    7764:	e3a00001 	mov	r0, #1	; 0x1
-    7768:	e3a01001 	mov	r1, #1	; 0x1
-    776c:	eb00012c 	bl	7c24 <LED>
-    7770:	ebffeb75 	bl	254c <sdkInit>
-    7774:	e3a00000 	mov	r0, #0	; 0x0
-    7778:	eb00014c 	bl	7cb0 <beeper>
-    777c:	e3a00713 	mov	r0, #4980736	; 0x4c0000
-    7780:	e2800c4b 	add	r0, r0, #19200	; 0x4b00
-    7784:	e2800040 	add	r0, r0, #64	; 0x40
-    7788:	ebfff299 	bl	41f4 <wait>
-    778c:	eb0000a5 	bl	7a28 <calibrate>
-    7790:	eaffffff 	b	7794 <main+0x94>
-    7794:	e59f3248 	ldr	r3, [pc, #584]	; 79e4 <.text+0x79e4>
-    7798:	e5d33000 	ldrb	r3, [r3]
-    779c:	e20330ff 	and	r3, r3, #255	; 0xff
-    77a0:	e3530000 	cmp	r3, #0	; 0x0
-    77a4:	0afffffa 	beq	7794 <main+0x94>
-    77a8:	e59f3238 	ldr	r3, [pc, #568]	; 79e8 <.text+0x79e8>
-    77ac:	e5933000 	ldr	r3, [r3]
-    77b0:	e2832001 	add	r2, r3, #1	; 0x1
-    77b4:	e59f322c 	ldr	r3, [pc, #556]	; 79e8 <.text+0x79e8>
-    77b8:	e5832000 	str	r2, [r3]
-    77bc:	e59f3228 	ldr	r3, [pc, #552]	; 79ec <.text+0x79ec>
-    77c0:	e5933000 	ldr	r3, [r3]
-    77c4:	e2832001 	add	r2, r3, #1	; 0x1
-    77c8:	e59f321c 	ldr	r3, [pc, #540]	; 79ec <.text+0x79ec>
-    77cc:	e5832000 	str	r2, [r3]
-    77d0:	e59f3214 	ldr	r3, [pc, #532]	; 79ec <.text+0x79ec>
-    77d4:	e5933000 	ldr	r3, [r3]
-    77d8:	e3530064 	cmp	r3, #100	; 0x64
-    77dc:	1a000002 	bne	77ec <main+0xec>
-    77e0:	e59f2204 	ldr	r2, [pc, #516]	; 79ec <.text+0x79ec>
-    77e4:	e3a03000 	mov	r3, #0	; 0x0
-    77e8:	e5823000 	str	r3, [r2]
-    77ec:	e59f31fc 	ldr	r3, [pc, #508]	; 79f0 <.text+0x79f0>
-    77f0:	e5932000 	ldr	r2, [r3]
-    77f4:	e1a03002 	mov	r3, r2
-    77f8:	e1a03183 	mov	r3, r3, lsl #3
-    77fc:	e0623003 	rsb	r3, r2, r3
-    7800:	e1a03103 	mov	r3, r3, lsl #2
-    7804:	e0833002 	add	r3, r3, r2
-    7808:	e1a04003 	mov	r4, r3
-    780c:	e3a00002 	mov	r0, #2	; 0x2
-    7810:	eb001345 	bl	c52c <ADC0Read>
-    7814:	e1a01000 	mov	r1, r0
-    7818:	e1a02001 	mov	r2, r1
-    781c:	e1a02102 	mov	r2, r2, lsl #2
-    7820:	e0822001 	add	r2, r2, r1
-    7824:	e1a02082 	mov	r2, r2, lsl #1
-    7828:	e0822001 	add	r2, r2, r1
-    782c:	e1a03182 	mov	r3, r2, lsl #3
-    7830:	e0623003 	rsb	r3, r2, r3
-    7834:	e1a03183 	mov	r3, r3, lsl #3
-    7838:	e0833001 	add	r3, r3, r1
-    783c:	e1a03203 	mov	r3, r3, lsl #4
-    7840:	e1a02003 	mov	r2, r3
-    7844:	e3a032be 	mov	r3, #-536870901	; 0xe000000b
-    7848:	e2833626 	add	r3, r3, #39845888	; 0x2600000
-    784c:	e2833c63 	add	r3, r3, #25344	; 0x6300
-    7850:	e0831392 	umull	r1, r3, r2, r3
-    7854:	e1a034a3 	mov	r3, r3, lsr #9
-    7858:	e0842003 	add	r2, r4, r3
-    785c:	e59f3190 	ldr	r3, [pc, #400]	; 79f4 <.text+0x79f4>
-    7860:	e0831392 	umull	r1, r3, r2, r3
-    7864:	e1a03223 	mov	r3, r3, lsr #4
-    7868:	e1a02003 	mov	r2, r3
-    786c:	e59f317c 	ldr	r3, [pc, #380]	; 79f0 <.text+0x79f0>
-    7870:	e5832000 	str	r2, [r3]
-    7874:	e59f3174 	ldr	r3, [pc, #372]	; 79f0 <.text+0x79f0>
-    7878:	e5933000 	ldr	r3, [r3]
-    787c:	e1a03803 	mov	r3, r3, lsl #16
-    7880:	e1a02823 	mov	r2, r3, lsr #16
-    7884:	e59f3140 	ldr	r3, [pc, #320]	; 79cc <.text+0x79cc>
-    7888:	e1c320b0 	strh	r2, [r3]
-    788c:	e59f3164 	ldr	r3, [pc, #356]	; 79f8 <.text+0x79f8>
-    7890:	e5933000 	ldr	r3, [r3]
-    7894:	e1a03803 	mov	r3, r3, lsl #16
-    7898:	e1a02823 	mov	r2, r3, lsr #16
-    789c:	e59f3128 	ldr	r3, [pc, #296]	; 79cc <.text+0x79cc>
-    78a0:	e1c320b2 	strh	r2, [r3, #2]
-    78a4:	e59f3144 	ldr	r3, [pc, #324]	; 79f0 <.text+0x79f0>
-    78a8:	e5933000 	ldr	r3, [r3]
-    78ac:	e50b3014 	str	r3, [fp, #-20]
-    78b0:	e51b2014 	ldr	r2, [fp, #-20]
-    78b4:	e3a03c27 	mov	r3, #9984	; 0x2700
-    78b8:	e283300f 	add	r3, r3, #15	; 0xf
-    78bc:	e1520003 	cmp	r2, r3
-    78c0:	ca00000f 	bgt	7904 <main+0x204>
-    78c4:	e59f3130 	ldr	r3, [pc, #304]	; 79fc <.text+0x79fc>
-    78c8:	e5932000 	ldr	r2, [r3]
-    78cc:	e3a03d1f 	mov	r3, #1984	; 0x7c0
-    78d0:	e283300f 	add	r3, r3, #15	; 0xf
-    78d4:	e1520003 	cmp	r2, r3
-    78d8:	ca000005 	bgt	78f4 <main+0x1f4>
-    78dc:	e59f3118 	ldr	r3, [pc, #280]	; 79fc <.text+0x79fc>
-    78e0:	e5933000 	ldr	r3, [r3]
-    78e4:	e2832001 	add	r2, r3, #1	; 0x1
-    78e8:	e59f310c 	ldr	r3, [pc, #268]	; 79fc <.text+0x79fc>
-    78ec:	e5832000 	str	r2, [r3]
-    78f0:	ea000012 	b	7940 <main+0x240>
-    78f4:	e59f3104 	ldr	r3, [pc, #260]	; 7a00 <.text+0x7a00>
-    78f8:	e3a02001 	mov	r2, #1	; 0x1
-    78fc:	e5c32000 	strb	r2, [r3]
-    7900:	ea00000e 	b	7940 <main+0x240>
-    7904:	e59f30f0 	ldr	r3, [pc, #240]	; 79fc <.text+0x79fc>
-    7908:	e5933000 	ldr	r3, [r3]
-    790c:	e353000a 	cmp	r3, #10	; 0xa
-    7910:	da000005 	ble	792c <main+0x22c>
-    7914:	e59f30e0 	ldr	r3, [pc, #224]	; 79fc <.text+0x79fc>
-    7918:	e5933000 	ldr	r3, [r3]
-    791c:	e2432005 	sub	r2, r3, #5	; 0x5
-    7920:	e59f30d4 	ldr	r3, [pc, #212]	; 79fc <.text+0x79fc>
-    7924:	e5832000 	str	r2, [r3]
-    7928:	ea000004 	b	7940 <main+0x240>
-    792c:	e59f30cc 	ldr	r3, [pc, #204]	; 7a00 <.text+0x7a00>
-    7930:	e3a02000 	mov	r2, #0	; 0x0
-    7934:	e5c32000 	strb	r2, [r3]
-    7938:	e3a00000 	mov	r0, #0	; 0x0
-    793c:	eb0000db 	bl	7cb0 <beeper>
-    7940:	e59f30b8 	ldr	r3, [pc, #184]	; 7a00 <.text+0x7a00>
-    7944:	e5d33000 	ldrb	r3, [r3]
-    7948:	e3530000 	cmp	r3, #0	; 0x0
-    794c:	0a000010 	beq	7994 <main+0x294>
-    7950:	e51b3014 	ldr	r3, [fp, #-20]
-    7954:	e2433c23 	sub	r3, r3, #8960	; 0x2300
-    7958:	e2433028 	sub	r3, r3, #40	; 0x28
-    795c:	e59f20a0 	ldr	r2, [pc, #160]	; 7a04 <.text+0x7a04>
-    7960:	e0c21293 	smull	r1, r2, r3, r2
-    7964:	e1a02142 	mov	r2, r2, asr #2
-    7968:	e1a03fc3 	mov	r3, r3, asr #31
-    796c:	e0632002 	rsb	r2, r3, r2
-    7970:	e59f3074 	ldr	r3, [pc, #116]	; 79ec <.text+0x79ec>
-    7974:	e5933000 	ldr	r3, [r3]
-    7978:	e1520003 	cmp	r2, r3
-    797c:	aa000002 	bge	798c <main+0x28c>
-    7980:	e3a00001 	mov	r0, #1	; 0x1
-    7984:	eb0000c9 	bl	7cb0 <beeper>
-    7988:	ea000001 	b	7994 <main+0x294>
-    798c:	e3a00000 	mov	r0, #0	; 0x0
-    7990:	eb0000c6 	bl	7cb0 <beeper>
-    7994:	e59f3048 	ldr	r3, [pc, #72]	; 79e4 <.text+0x79e4>
-    7998:	e5d33000 	ldrb	r3, [r3]
-    799c:	e20330ff 	and	r3, r3, #255	; 0xff
-    79a0:	e3530000 	cmp	r3, #0	; 0x0
-    79a4:	0a000006 	beq	79c4 <main+0x2c4>
-    79a8:	e59f3034 	ldr	r3, [pc, #52]	; 79e4 <.text+0x79e4>
-    79ac:	e5d33000 	ldrb	r3, [r3]
-    79b0:	e20330ff 	and	r3, r3, #255	; 0xff
-    79b4:	e2433001 	sub	r3, r3, #1	; 0x1
-    79b8:	e20330ff 	and	r3, r3, #255	; 0xff
-    79bc:	e59f2020 	ldr	r2, [pc, #32]	; 79e4 <.text+0x79e4>
-    79c0:	e5c23000 	strb	r3, [r2]
-    79c4:	eb00000f 	bl	7a08 <mainloop>
-    79c8:	eaffff71 	b	7794 <main+0x94>
-    79cc:	40001474 	andmi	r1, r0, r4, ror r4
-    79d0:	0001521c 	andeq	r5, r1, ip, lsl r2
-    79d4:	00015238 	andeq	r5, r1, r8, lsr r2
-    79d8:	0001525c 	andeq	r5, r1, ip, asr r2
-    79dc:	400008bc 	strmih	r0, [r0], -ip
-    79e0:	40001470 	andmi	r1, r0, r0, ror r4
-    79e4:	400008a4 	andmi	r0, r0, r4, lsr #17
-    79e8:	400008a0 	andmi	r0, r0, r0, lsr #17
-    79ec:	400008c0 	andmi	r0, r0, r0, asr #17
-    79f0:	400008c8 	andmi	r0, r0, r8, asr #17
-    79f4:	88888889 	stmhiia	r8, {r0, r3, r7, fp, pc}
-    79f8:	400008c4 	andmi	r0, r0, r4, asr #17
-    79fc:	40000008 	andmi	r0, r0, r8
-    7a00:	40000005 	andmi	r0, r0, r5
-    7a04:	66666667 	strvsbt	r6, [r6], -r7, ror #12
-
-00007a08 <mainloop>:
-    7a08:	e1a0c00d 	mov	ip, sp
-    7a0c:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    7a10:	e24cb004 	sub	fp, ip, #4	; 0x4
-    7a14:	ebffec53 	bl	2b68 <SDK_mainloop>
-    7a18:	ebffe322 	bl	6a8 <HL2LL_write_cycle>
-    7a1c:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    7a20:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    7a24:	e12fff1e 	bx	lr
-
-00007a28 <calibrate>:
-    7a28:	e1a0c00d 	mov	ip, sp
-    7a2c:	e92dd870 	stmdb	sp!, {r4, r5, r6, fp, ip, lr, pc}
-    7a30:	e24cb004 	sub	fp, ip, #4	; 0x4
-    7a34:	e24dd02c 	sub	sp, sp, #44	; 0x2c
-    7a38:	e3a03000 	mov	r3, #0	; 0x0
-    7a3c:	e3a04000 	mov	r4, #0	; 0x0
-    7a40:	e50b3044 	str	r3, [fp, #-68]
-    7a44:	e50b4040 	str	r4, [fp, #-64]
-    7a48:	e3a03000 	mov	r3, #0	; 0x0
-    7a4c:	e50b303c 	str	r3, [fp, #-60]
-    7a50:	ea00005a 	b	7bc0 <calibrate+0x198>
-    7a54:	e3a00e4b 	mov	r0, #1200	; 0x4b0
-    7a58:	ebfff1e5 	bl	41f4 <wait>
-    7a5c:	ebffe311 	bl	6a8 <HL2LL_write_cycle>
-    7a60:	e59f31b4 	ldr	r3, [pc, #436]	; 7c1c <.text+0x7c1c>
-    7a64:	e1d332b8 	ldrh	r3, [r3, #40]
-    7a68:	e1a03803 	mov	r3, r3, lsl #16
-    7a6c:	e1a03843 	mov	r3, r3, asr #16
-    7a70:	e1a00003 	mov	r0, r3
-    7a74:	eb0030d6 	bl	13dd4 <__aeabi_i2d>
-    7a78:	e1a03000 	mov	r3, r0
-    7a7c:	e1a04001 	mov	r4, r1
-    7a80:	e50b3038 	str	r3, [fp, #-56]
-    7a84:	e50b4034 	str	r4, [fp, #-52]
-    7a88:	e59f318c 	ldr	r3, [pc, #396]	; 7c1c <.text+0x7c1c>
-    7a8c:	e1d332ba 	ldrh	r3, [r3, #42]
-    7a90:	e1a03803 	mov	r3, r3, lsl #16
-    7a94:	e1a03843 	mov	r3, r3, asr #16
-    7a98:	e1a00003 	mov	r0, r3
-    7a9c:	eb0030cc 	bl	13dd4 <__aeabi_i2d>
-    7aa0:	e1a03000 	mov	r3, r0
-    7aa4:	e1a04001 	mov	r4, r1
-    7aa8:	e50b3030 	str	r3, [fp, #-48]
-    7aac:	e50b402c 	str	r4, [fp, #-44]
-    7ab0:	e59f3164 	ldr	r3, [pc, #356]	; 7c1c <.text+0x7c1c>
-    7ab4:	e1d332bc 	ldrh	r3, [r3, #44]
-    7ab8:	e1a03803 	mov	r3, r3, lsl #16
-    7abc:	e1a03843 	mov	r3, r3, asr #16
-    7ac0:	e1a00003 	mov	r0, r3
-    7ac4:	eb0030c2 	bl	13dd4 <__aeabi_i2d>
-    7ac8:	e1a03000 	mov	r3, r0
-    7acc:	e1a04001 	mov	r4, r1
-    7ad0:	e50b3028 	str	r3, [fp, #-40]
-    7ad4:	e50b4024 	str	r4, [fp, #-36]
-    7ad8:	e24b0038 	sub	r0, fp, #56	; 0x38
-    7adc:	e8900003 	ldmia	r0, {r0, r1}
-    7ae0:	e24b2038 	sub	r2, fp, #56	; 0x38
-    7ae4:	e892000c 	ldmia	r2, {r2, r3}
-    7ae8:	eb0030f4 	bl	13ec0 <__aeabi_dmul>
-    7aec:	e1a03000 	mov	r3, r0
-    7af0:	e1a04001 	mov	r4, r1
-    7af4:	e1a05003 	mov	r5, r3
-    7af8:	e1a06004 	mov	r6, r4
-    7afc:	e24b0030 	sub	r0, fp, #48	; 0x30
-    7b00:	e8900003 	ldmia	r0, {r0, r1}
-    7b04:	e24b2030 	sub	r2, fp, #48	; 0x30
-    7b08:	e892000c 	ldmia	r2, {r2, r3}
-    7b0c:	eb0030eb 	bl	13ec0 <__aeabi_dmul>
-    7b10:	e1a03000 	mov	r3, r0
-    7b14:	e1a04001 	mov	r4, r1
-    7b18:	e1a00005 	mov	r0, r5
-    7b1c:	e1a01006 	mov	r1, r6
-    7b20:	e1a02003 	mov	r2, r3
-    7b24:	e1a03004 	mov	r3, r4
-    7b28:	eb002fdb 	bl	13a9c <__adddf3>
-    7b2c:	e1a03000 	mov	r3, r0
-    7b30:	e1a04001 	mov	r4, r1
-    7b34:	e1a05003 	mov	r5, r3
-    7b38:	e1a06004 	mov	r6, r4
-    7b3c:	e24b0028 	sub	r0, fp, #40	; 0x28
-    7b40:	e8900003 	ldmia	r0, {r0, r1}
-    7b44:	e24b2028 	sub	r2, fp, #40	; 0x28
-    7b48:	e892000c 	ldmia	r2, {r2, r3}
-    7b4c:	eb0030db 	bl	13ec0 <__aeabi_dmul>
-    7b50:	e1a03000 	mov	r3, r0
-    7b54:	e1a04001 	mov	r4, r1
-    7b58:	e1a00005 	mov	r0, r5
-    7b5c:	e1a01006 	mov	r1, r6
-    7b60:	e1a02003 	mov	r2, r3
-    7b64:	e1a03004 	mov	r3, r4
-    7b68:	eb002fcb 	bl	13a9c <__adddf3>
-    7b6c:	e1a03000 	mov	r3, r0
-    7b70:	e1a04001 	mov	r4, r1
-    7b74:	e1a00003 	mov	r0, r3
-    7b78:	e1a01004 	mov	r1, r4
-    7b7c:	eb003577 	bl	15160 <__sqrt_from_arm>
-    7b80:	e1a03000 	mov	r3, r0
-    7b84:	e1a04001 	mov	r4, r1
-    7b88:	e50b3020 	str	r3, [fp, #-32]
-    7b8c:	e50b401c 	str	r4, [fp, #-28]
-    7b90:	e24b0044 	sub	r0, fp, #68	; 0x44
-    7b94:	e8900003 	ldmia	r0, {r0, r1}
-    7b98:	e24b2020 	sub	r2, fp, #32	; 0x20
-    7b9c:	e892000c 	ldmia	r2, {r2, r3}
-    7ba0:	eb002fbd 	bl	13a9c <__adddf3>
-    7ba4:	e1a03000 	mov	r3, r0
-    7ba8:	e1a04001 	mov	r4, r1
-    7bac:	e50b3044 	str	r3, [fp, #-68]
-    7bb0:	e50b4040 	str	r4, [fp, #-64]
-    7bb4:	e51b303c 	ldr	r3, [fp, #-60]
-    7bb8:	e2833001 	add	r3, r3, #1	; 0x1
-    7bbc:	e50b303c 	str	r3, [fp, #-60]
-    7bc0:	e51b203c 	ldr	r2, [fp, #-60]
-    7bc4:	e3a03d1f 	mov	r3, #1984	; 0x7c0
-    7bc8:	e283300f 	add	r3, r3, #15	; 0xf
-    7bcc:	e1520003 	cmp	r2, r3
-    7bd0:	9affff9f 	bls	7a54 <calibrate+0x2c>
-    7bd4:	e24b0044 	sub	r0, fp, #68	; 0x44
-    7bd8:	e8900003 	ldmia	r0, {r0, r1}
-    7bdc:	e3a02101 	mov	r2, #1073741824	; 0x40000000
-    7be0:	e282289f 	add	r2, r2, #10420224	; 0x9f0000
-    7be4:	e2822901 	add	r2, r2, #16384	; 0x4000
-    7be8:	e3a03000 	mov	r3, #0	; 0x0
-    7bec:	eb003157 	bl	14150 <__aeabi_ddiv>
-    7bf0:	e1a03000 	mov	r3, r0
-    7bf4:	e1a04001 	mov	r4, r1
-    7bf8:	e1a00003 	mov	r0, r3
-    7bfc:	e1a01004 	mov	r1, r4
-    7c00:	eb00323c 	bl	144f8 <__aeabi_d2f>
-    7c04:	e1a02000 	mov	r2, r0
-    7c08:	e59f3010 	ldr	r3, [pc, #16]	; 7c20 <.text+0x7c20>
-    7c0c:	e5832000 	str	r2, [r3]
-    7c10:	e24bd018 	sub	sp, fp, #24	; 0x18
-    7c14:	e89d6870 	ldmia	sp, {r4, r5, r6, fp, sp, lr}
-    7c18:	e12fff1e 	bx	lr
-    7c1c:	40000d50 	andmi	r0, r0, r0, asr sp
-    7c20:	4000143c 	andmi	r1, r0, ip, lsr r4
-
-00007c24 <LED>:
-    7c24:	e1a0c00d 	mov	ip, sp
-    7c28:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    7c2c:	e24cb004 	sub	fp, ip, #4	; 0x4
-    7c30:	e24dd008 	sub	sp, sp, #8	; 0x8
-    7c34:	e1a03000 	mov	r3, r0
-    7c38:	e1a02001 	mov	r2, r1
-    7c3c:	e54b3010 	strb	r3, [fp, #-16]
-    7c40:	e1a03002 	mov	r3, r2
-    7c44:	e54b3014 	strb	r3, [fp, #-20]
-    7c48:	e55b3010 	ldrb	r3, [fp, #-16]
-    7c4c:	e3530001 	cmp	r3, #1	; 0x1
-    7c50:	8a000013 	bhi	7ca4 <LED+0x80>
-    7c54:	e55b3014 	ldrb	r3, [fp, #-20]
-    7c58:	e3530000 	cmp	r3, #0	; 0x0
-    7c5c:	1a000008 	bne	7c84 <LED+0x60>
-    7c60:	e3a0220e 	mov	r2, #-536870912	; 0xe0000000
-    7c64:	e282290a 	add	r2, r2, #163840	; 0x28000
-    7c68:	e2822014 	add	r2, r2, #20	; 0x14
-    7c6c:	e55b3010 	ldrb	r3, [fp, #-16]
-    7c70:	e2831018 	add	r1, r3, #24	; 0x18
-    7c74:	e3a03001 	mov	r3, #1	; 0x1
-    7c78:	e1a03113 	mov	r3, r3, lsl r1
-    7c7c:	e5823000 	str	r3, [r2]
-    7c80:	ea000007 	b	7ca4 <LED+0x80>
-    7c84:	e3a0220e 	mov	r2, #-536870912	; 0xe0000000
-    7c88:	e282290a 	add	r2, r2, #163840	; 0x28000
-    7c8c:	e282201c 	add	r2, r2, #28	; 0x1c
-    7c90:	e55b3010 	ldrb	r3, [fp, #-16]
-    7c94:	e2831018 	add	r1, r3, #24	; 0x18
-    7c98:	e3a03001 	mov	r3, #1	; 0x1
-    7c9c:	e1a03113 	mov	r3, r3, lsl r1
-    7ca0:	e5823000 	str	r3, [r2]
-    7ca4:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    7ca8:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    7cac:	e12fff1e 	bx	lr
-
-00007cb0 <beeper>:
-    7cb0:	e1a0c00d 	mov	ip, sp
-    7cb4:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    7cb8:	e24cb004 	sub	fp, ip, #4	; 0x4
-    7cbc:	e24dd004 	sub	sp, sp, #4	; 0x4
-    7cc0:	e1a03000 	mov	r3, r0
-    7cc4:	e54b3010 	strb	r3, [fp, #-16]
-    7cc8:	e55b3010 	ldrb	r3, [fp, #-16]
-    7ccc:	e3530000 	cmp	r3, #0	; 0x0
-    7cd0:	0a000005 	beq	7cec <beeper+0x3c>
-    7cd4:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    7cd8:	e283390a 	add	r3, r3, #163840	; 0x28000
-    7cdc:	e2833014 	add	r3, r3, #20	; 0x14
-    7ce0:	e3a02802 	mov	r2, #131072	; 0x20000
-    7ce4:	e5832000 	str	r2, [r3]
-    7ce8:	ea000004 	b	7d00 <beeper+0x50>
-    7cec:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    7cf0:	e283390a 	add	r3, r3, #163840	; 0x28000
-    7cf4:	e283301c 	add	r3, r3, #28	; 0x1c
-    7cf8:	e3a02802 	mov	r2, #131072	; 0x20000
-    7cfc:	e5832000 	str	r2, [r3]
-    7d00:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    7d04:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    7d08:	e12fff1e 	bx	lr
-
-00007d0c <ee_erase>:
-    7d0c:	e1a0c00d 	mov	ip, sp
-    7d10:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    7d14:	e24cb004 	sub	fp, ip, #4	; 0x4
-    7d18:	e24dd02c 	sub	sp, sp, #44	; 0x2c
-    7d1c:	e50b0034 	str	r0, [fp, #-52]
-    7d20:	e50b1038 	str	r1, [fp, #-56]
-    7d24:	e3a03000 	mov	r3, #0	; 0x0
-    7d28:	e2433eff 	sub	r3, r3, #4080	; 0xff0
-    7d2c:	e5933000 	ldr	r3, [r3]
-    7d30:	e50b3010 	str	r3, [fp, #-16]
-    7d34:	e3e03efe 	mvn	r3, #4064	; 0xfe0
-    7d38:	e243300b 	sub	r3, r3, #11	; 0xb
-    7d3c:	e51b2010 	ldr	r2, [fp, #-16]
-    7d40:	e5832000 	str	r2, [r3]
-    7d44:	e3a03032 	mov	r3, #50	; 0x32
-    7d48:	e50b3024 	str	r3, [fp, #-36]
-    7d4c:	e3a0300e 	mov	r3, #14	; 0xe
-    7d50:	e50b3020 	str	r3, [fp, #-32]
-    7d54:	e3a0300e 	mov	r3, #14	; 0xe
-    7d58:	e50b301c 	str	r3, [fp, #-28]
-    7d5c:	e59f20e0 	ldr	r2, [pc, #224]	; 7e44 <.text+0x7e44>
-    7d60:	e3e0313a 	mvn	r3, #-2147483634	; 0x8000000e
-    7d64:	e5823000 	str	r3, [r2]
-    7d68:	e59f30d4 	ldr	r3, [pc, #212]	; 7e44 <.text+0x7e44>
-    7d6c:	e593c000 	ldr	ip, [r3]
-    7d70:	e24b3024 	sub	r3, fp, #36	; 0x24
-    7d74:	e24b2030 	sub	r2, fp, #48	; 0x30
-    7d78:	e1a00003 	mov	r0, r3
-    7d7c:	e1a01002 	mov	r1, r2
-    7d80:	e1a0e00f 	mov	lr, pc
-    7d84:	e12fff1c 	bx	ip
-    7d88:	e3a03034 	mov	r3, #52	; 0x34
-    7d8c:	e50b3024 	str	r3, [fp, #-36]
-    7d90:	e3a0300e 	mov	r3, #14	; 0xe
-    7d94:	e50b3020 	str	r3, [fp, #-32]
-    7d98:	e3a0300e 	mov	r3, #14	; 0xe
-    7d9c:	e50b301c 	str	r3, [fp, #-28]
-    7da0:	e3a03cea 	mov	r3, #59904	; 0xea00
-    7da4:	e2833060 	add	r3, r3, #96	; 0x60
-    7da8:	e50b3018 	str	r3, [fp, #-24]
-    7dac:	e59f2090 	ldr	r2, [pc, #144]	; 7e44 <.text+0x7e44>
-    7db0:	e3e0313a 	mvn	r3, #-2147483634	; 0x8000000e
-    7db4:	e5823000 	str	r3, [r2]
-    7db8:	e59f3084 	ldr	r3, [pc, #132]	; 7e44 <.text+0x7e44>
-    7dbc:	e593c000 	ldr	ip, [r3]
-    7dc0:	e24b3024 	sub	r3, fp, #36	; 0x24
-    7dc4:	e24b2030 	sub	r2, fp, #48	; 0x30
-    7dc8:	e1a00003 	mov	r0, r3
-    7dcc:	e1a01002 	mov	r1, r2
-    7dd0:	e1a0e00f 	mov	lr, pc
-    7dd4:	e12fff1c 	bx	ip
-    7dd8:	e3a03035 	mov	r3, #53	; 0x35
-    7ddc:	e50b3024 	str	r3, [fp, #-36]
-    7de0:	e3a0300e 	mov	r3, #14	; 0xe
-    7de4:	e50b3020 	str	r3, [fp, #-32]
-    7de8:	e3a0300e 	mov	r3, #14	; 0xe
-    7dec:	e50b301c 	str	r3, [fp, #-28]
-    7df0:	e59f204c 	ldr	r2, [pc, #76]	; 7e44 <.text+0x7e44>
-    7df4:	e3e0313a 	mvn	r3, #-2147483634	; 0x8000000e
-    7df8:	e5823000 	str	r3, [r2]
-    7dfc:	e59f3040 	ldr	r3, [pc, #64]	; 7e44 <.text+0x7e44>
-    7e00:	e593c000 	ldr	ip, [r3]
-    7e04:	e24b3024 	sub	r3, fp, #36	; 0x24
-    7e08:	e24b2030 	sub	r2, fp, #48	; 0x30
-    7e0c:	e1a00003 	mov	r0, r3
-    7e10:	e1a01002 	mov	r1, r2
-    7e14:	e1a0e00f 	mov	lr, pc
-    7e18:	e12fff1c 	bx	ip
-    7e1c:	e3a03000 	mov	r3, #0	; 0x0
-    7e20:	e2433eff 	sub	r3, r3, #4080	; 0xff0
-    7e24:	e51b2010 	ldr	r2, [fp, #-16]
-    7e28:	e5832000 	str	r2, [r3]
-    7e2c:	e51b2030 	ldr	r2, [fp, #-48]
-    7e30:	e51b3038 	ldr	r3, [fp, #-56]
-    7e34:	e5832000 	str	r2, [r3]
-    7e38:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    7e3c:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    7e40:	e12fff1e 	bx	lr
-    7e44:	400014ec 	andmi	r1, r0, ip, ror #9
-
-00007e48 <ee_write>:
-    7e48:	e1a0c00d 	mov	ip, sp
-    7e4c:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    7e50:	e24cb004 	sub	fp, ip, #4	; 0x4
-    7e54:	e24ddf4f 	sub	sp, sp, #316	; 0x13c
-    7e58:	e50b0144 	str	r0, [fp, #-324]
-    7e5c:	e50b1148 	str	r1, [fp, #-328]
-    7e60:	eb0000dc 	bl	81d8 <ee_locate>
-    7e64:	e1a03000 	mov	r3, r0
-    7e68:	e50b3020 	str	r3, [fp, #-32]
-    7e6c:	e51b3020 	ldr	r3, [fp, #-32]
-    7e70:	e3730001 	cmn	r3, #1	; 0x1
-    7e74:	1a000004 	bne	7e8c <ee_write+0x44>
-    7e78:	e51b2148 	ldr	r2, [fp, #-328]
-    7e7c:	e3a03f7d 	mov	r3, #500	; 0x1f4
-    7e80:	e2833001 	add	r3, r3, #1	; 0x1
-    7e84:	e5823000 	str	r3, [r2]
-    7e88:	ea000073 	b	805c <ee_write+0x214>
-    7e8c:	e3a03000 	mov	r3, #0	; 0x0
-    7e90:	e50b3014 	str	r3, [fp, #-20]
-    7e94:	ea00000a 	b	7ec4 <ee_write+0x7c>
-    7e98:	e51b2014 	ldr	r2, [fp, #-20]
-    7e9c:	e3a034bb 	mov	r3, #-1157627904	; 0xbb000000
-    7ea0:	e1a03b43 	mov	r3, r3, asr #22
-    7ea4:	e24b100c 	sub	r1, fp, #12	; 0xc
-    7ea8:	e0812002 	add	r2, r1, r2
-    7eac:	e0822003 	add	r2, r2, r3
-    7eb0:	e3e03000 	mvn	r3, #0	; 0x0
-    7eb4:	e5c23000 	strb	r3, [r2]
-    7eb8:	e51b3014 	ldr	r3, [fp, #-20]
-    7ebc:	e2833001 	add	r3, r3, #1	; 0x1
-    7ec0:	e50b3014 	str	r3, [fp, #-20]
-    7ec4:	e51b3014 	ldr	r3, [fp, #-20]
-    7ec8:	e35300ff 	cmp	r3, #255	; 0xff
-    7ecc:	9afffff1 	bls	7e98 <ee_write+0x50>
-    7ed0:	e24b3e12 	sub	r3, fp, #288	; 0x120
-    7ed4:	e50b3018 	str	r3, [fp, #-24]
-    7ed8:	e51b3144 	ldr	r3, [fp, #-324]
-    7edc:	e50b301c 	str	r3, [fp, #-28]
-    7ee0:	e3a03000 	mov	r3, #0	; 0x0
-    7ee4:	e50b3014 	str	r3, [fp, #-20]
-    7ee8:	ea00000e 	b	7f28 <ee_write+0xe0>
-    7eec:	e51b3014 	ldr	r3, [fp, #-20]
-    7ef0:	e1a03103 	mov	r3, r3, lsl #2
-    7ef4:	e1a02003 	mov	r2, r3
-    7ef8:	e51b3018 	ldr	r3, [fp, #-24]
-    7efc:	e0821003 	add	r1, r2, r3
-    7f00:	e51b3014 	ldr	r3, [fp, #-20]
-    7f04:	e1a03103 	mov	r3, r3, lsl #2
-    7f08:	e1a02003 	mov	r2, r3
-    7f0c:	e51b301c 	ldr	r3, [fp, #-28]
-    7f10:	e0823003 	add	r3, r2, r3
-    7f14:	e5933000 	ldr	r3, [r3]
-    7f18:	e5813000 	str	r3, [r1]
-    7f1c:	e51b3014 	ldr	r3, [fp, #-20]
-    7f20:	e2833001 	add	r3, r3, #1	; 0x1
-    7f24:	e50b3014 	str	r3, [fp, #-20]
-    7f28:	e51b3014 	ldr	r3, [fp, #-20]
-    7f2c:	e3530040 	cmp	r3, #64	; 0x40
-    7f30:	1affffed 	bne	7eec <ee_write+0xa4>
-    7f34:	e3a03000 	mov	r3, #0	; 0x0
-    7f38:	e2433eff 	sub	r3, r3, #4080	; 0xff0
-    7f3c:	e5933000 	ldr	r3, [r3]
-    7f40:	e50b3010 	str	r3, [fp, #-16]
-    7f44:	e3e03efe 	mvn	r3, #4064	; 0xfe0
-    7f48:	e243300b 	sub	r3, r3, #11	; 0xb
-    7f4c:	e51b2010 	ldr	r2, [fp, #-16]
-    7f50:	e5832000 	str	r2, [r3]
-    7f54:	e3a03032 	mov	r3, #50	; 0x32
-    7f58:	e50b3134 	str	r3, [fp, #-308]
-    7f5c:	e3a0300e 	mov	r3, #14	; 0xe
-    7f60:	e50b3130 	str	r3, [fp, #-304]
-    7f64:	e3a0300e 	mov	r3, #14	; 0xe
-    7f68:	e50b312c 	str	r3, [fp, #-300]
-    7f6c:	e59f20f4 	ldr	r2, [pc, #244]	; 8068 <.text+0x8068>
-    7f70:	e3e0313a 	mvn	r3, #-2147483634	; 0x8000000e
-    7f74:	e5823000 	str	r3, [r2]
-    7f78:	e59f30e8 	ldr	r3, [pc, #232]	; 8068 <.text+0x8068>
-    7f7c:	e593c000 	ldr	ip, [r3]
-    7f80:	e24b3f4d 	sub	r3, fp, #308	; 0x134
-    7f84:	e24b2d05 	sub	r2, fp, #320	; 0x140
-    7f88:	e1a00003 	mov	r0, r3
-    7f8c:	e1a01002 	mov	r1, r2
-    7f90:	e1a0e00f 	mov	lr, pc
-    7f94:	e12fff1c 	bx	ip
-    7f98:	e3a03033 	mov	r3, #51	; 0x33
-    7f9c:	e50b3134 	str	r3, [fp, #-308]
-    7fa0:	e51b3020 	ldr	r3, [fp, #-32]
-    7fa4:	e3c330ff 	bic	r3, r3, #255	; 0xff
-    7fa8:	e50b3130 	str	r3, [fp, #-304]
-    7fac:	e24b3e12 	sub	r3, fp, #288	; 0x120
-    7fb0:	e50b312c 	str	r3, [fp, #-300]
-    7fb4:	e3a03c01 	mov	r3, #256	; 0x100
-    7fb8:	e50b3128 	str	r3, [fp, #-296]
-    7fbc:	e3a03cea 	mov	r3, #59904	; 0xea00
-    7fc0:	e2833060 	add	r3, r3, #96	; 0x60
-    7fc4:	e50b3124 	str	r3, [fp, #-292]
-    7fc8:	e59f2098 	ldr	r2, [pc, #152]	; 8068 <.text+0x8068>
-    7fcc:	e3e0313a 	mvn	r3, #-2147483634	; 0x8000000e
-    7fd0:	e5823000 	str	r3, [r2]
-    7fd4:	e59f308c 	ldr	r3, [pc, #140]	; 8068 <.text+0x8068>
-    7fd8:	e593c000 	ldr	ip, [r3]
-    7fdc:	e24b3f4d 	sub	r3, fp, #308	; 0x134
-    7fe0:	e24b2d05 	sub	r2, fp, #320	; 0x140
-    7fe4:	e1a00003 	mov	r0, r3
-    7fe8:	e1a01002 	mov	r1, r2
-    7fec:	e1a0e00f 	mov	lr, pc
-    7ff0:	e12fff1c 	bx	ip
-    7ff4:	e3a03038 	mov	r3, #56	; 0x38
-    7ff8:	e50b3134 	str	r3, [fp, #-308]
-    7ffc:	e51b301c 	ldr	r3, [fp, #-28]
-    8000:	e50b3130 	str	r3, [fp, #-304]
-    8004:	e51b3020 	ldr	r3, [fp, #-32]
-    8008:	e50b312c 	str	r3, [fp, #-300]
-    800c:	e3a03c01 	mov	r3, #256	; 0x100
-    8010:	e50b3128 	str	r3, [fp, #-296]
-    8014:	e59f204c 	ldr	r2, [pc, #76]	; 8068 <.text+0x8068>
-    8018:	e3e0313a 	mvn	r3, #-2147483634	; 0x8000000e
-    801c:	e5823000 	str	r3, [r2]
-    8020:	e59f3040 	ldr	r3, [pc, #64]	; 8068 <.text+0x8068>
-    8024:	e593c000 	ldr	ip, [r3]
-    8028:	e24b3f4d 	sub	r3, fp, #308	; 0x134
-    802c:	e24b2d05 	sub	r2, fp, #320	; 0x140
-    8030:	e1a00003 	mov	r0, r3
-    8034:	e1a01002 	mov	r1, r2
-    8038:	e1a0e00f 	mov	lr, pc
-    803c:	e12fff1c 	bx	ip
-    8040:	e3a03000 	mov	r3, #0	; 0x0
-    8044:	e2433eff 	sub	r3, r3, #4080	; 0xff0
-    8048:	e51b2010 	ldr	r2, [fp, #-16]
-    804c:	e5832000 	str	r2, [r3]
-    8050:	e51b2140 	ldr	r2, [fp, #-320]
-    8054:	e51b3148 	ldr	r3, [fp, #-328]
-    8058:	e5832000 	str	r2, [r3]
-    805c:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    8060:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    8064:	e12fff1e 	bx	lr
-    8068:	400014ec 	andmi	r1, r0, ip, ror #9
-
-0000806c <ee_read>:
-    806c:	e1a0c00d 	mov	ip, sp
-    8070:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    8074:	e24cb004 	sub	fp, ip, #4	; 0x4
-    8078:	e24dd00c 	sub	sp, sp, #12	; 0xc
-    807c:	e50b0014 	str	r0, [fp, #-20]
-    8080:	e50b1018 	str	r1, [fp, #-24]
-    8084:	eb000053 	bl	81d8 <ee_locate>
-    8088:	e1a03000 	mov	r3, r0
-    808c:	e50b3010 	str	r3, [fp, #-16]
-    8090:	e51b3010 	ldr	r3, [fp, #-16]
-    8094:	e353090e 	cmp	r3, #229376	; 0x38000
-    8098:	1a000003 	bne	80ac <ee_read+0x40>
-    809c:	e51b2018 	ldr	r2, [fp, #-24]
-    80a0:	e3a03f7d 	mov	r3, #500	; 0x1f4
-    80a4:	e5823000 	str	r3, [r2]
-    80a8:	ea000010 	b	80f0 <ee_read+0x84>
-    80ac:	e51b3018 	ldr	r3, [fp, #-24]
-    80b0:	e3a02000 	mov	r2, #0	; 0x0
-    80b4:	e5832000 	str	r2, [r3]
-    80b8:	e51b3010 	ldr	r3, [fp, #-16]
-    80bc:	e3730001 	cmn	r3, #1	; 0x1
-    80c0:	1a000005 	bne	80dc <ee_read+0x70>
-    80c4:	e51b3018 	ldr	r3, [fp, #-24]
-    80c8:	e2832004 	add	r2, r3, #4	; 0x4
-    80cc:	e3a03bff 	mov	r3, #261120	; 0x3fc00
-    80d0:	e2833c03 	add	r3, r3, #768	; 0x300
-    80d4:	e5823000 	str	r3, [r2]
-    80d8:	ea000004 	b	80f0 <ee_read+0x84>
-    80dc:	e51b3018 	ldr	r3, [fp, #-24]
-    80e0:	e2832004 	add	r2, r3, #4	; 0x4
-    80e4:	e51b3010 	ldr	r3, [fp, #-16]
-    80e8:	e2433c01 	sub	r3, r3, #256	; 0x100
-    80ec:	e5823000 	str	r3, [r2]
-    80f0:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    80f4:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    80f8:	e12fff1e 	bx	lr
-
-000080fc <ee_readn>:
-    80fc:	e1a0c00d 	mov	ip, sp
-    8100:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    8104:	e24cb004 	sub	fp, ip, #4	; 0x4
-    8108:	e24dd008 	sub	sp, sp, #8	; 0x8
-    810c:	e50b0010 	str	r0, [fp, #-16]
-    8110:	e50b1014 	str	r1, [fp, #-20]
-    8114:	e51b3010 	ldr	r3, [fp, #-16]
-    8118:	e3530080 	cmp	r3, #128	; 0x80
-    811c:	9a000004 	bls	8134 <ee_readn+0x38>
-    8120:	e51b2014 	ldr	r2, [fp, #-20]
-    8124:	e3a03f7d 	mov	r3, #500	; 0x1f4
-    8128:	e2833002 	add	r3, r3, #2	; 0x2
-    812c:	e5823000 	str	r3, [r2]
-    8130:	ea000008 	b	8158 <ee_readn+0x5c>
-    8134:	e51b2014 	ldr	r2, [fp, #-20]
-    8138:	e3a03000 	mov	r3, #0	; 0x0
-    813c:	e5823000 	str	r3, [r2]
-    8140:	e51b3014 	ldr	r3, [fp, #-20]
-    8144:	e2832004 	add	r2, r3, #4	; 0x4
-    8148:	e51b3010 	ldr	r3, [fp, #-16]
-    814c:	e1a03403 	mov	r3, r3, lsl #8
-    8150:	e283390e 	add	r3, r3, #229376	; 0x38000
-    8154:	e5823000 	str	r3, [r2]
-    8158:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    815c:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    8160:	e12fff1e 	bx	lr
-
-00008164 <ee_count>:
-    8164:	e1a0c00d 	mov	ip, sp
-    8168:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    816c:	e24cb004 	sub	fp, ip, #4	; 0x4
-    8170:	e24dd00c 	sub	sp, sp, #12	; 0xc
-    8174:	e50b0014 	str	r0, [fp, #-20]
-    8178:	e50b1018 	str	r1, [fp, #-24]
-    817c:	e51b2018 	ldr	r2, [fp, #-24]
-    8180:	e3a03000 	mov	r3, #0	; 0x0
-    8184:	e5823000 	str	r3, [r2]
-    8188:	eb000012 	bl	81d8 <ee_locate>
-    818c:	e1a03000 	mov	r3, r0
-    8190:	e50b3010 	str	r3, [fp, #-16]
-    8194:	e51b3010 	ldr	r3, [fp, #-16]
-    8198:	e3730001 	cmn	r3, #1	; 0x1
-    819c:	1a000001 	bne	81a8 <ee_count+0x44>
-    81a0:	e3a03701 	mov	r3, #262144	; 0x40000
-    81a4:	e50b3010 	str	r3, [fp, #-16]
-    81a8:	e51b3018 	ldr	r3, [fp, #-24]
-    81ac:	e2831004 	add	r1, r3, #4	; 0x4
-    81b0:	e51b3010 	ldr	r3, [fp, #-16]
-    81b4:	e243390e 	sub	r3, r3, #229376	; 0x38000
-    81b8:	e28320ff 	add	r2, r3, #255	; 0xff
-    81bc:	e3530000 	cmp	r3, #0	; 0x0
-    81c0:	b1a03002 	movlt	r3, r2
-    81c4:	e1a03443 	mov	r3, r3, asr #8
-    81c8:	e5813000 	str	r3, [r1]
-    81cc:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    81d0:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    81d4:	e12fff1e 	bx	lr
-
-000081d8 <ee_locate>:
-    81d8:	e1a0c00d 	mov	ip, sp
-    81dc:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    81e0:	e24cb004 	sub	fp, ip, #4	; 0x4
-    81e4:	e24dd018 	sub	sp, sp, #24	; 0x18
-    81e8:	e3a0390e 	mov	r3, #229376	; 0x38000
-    81ec:	e50b3020 	str	r3, [fp, #-32]
-    81f0:	e51b3020 	ldr	r3, [fp, #-32]
-    81f4:	e5d33000 	ldrb	r3, [r3]
-    81f8:	e35300ff 	cmp	r3, #255	; 0xff
-    81fc:	1a000002 	bne	820c <ee_locate+0x34>
-    8200:	e51b3020 	ldr	r3, [fp, #-32]
-    8204:	e50b3024 	str	r3, [fp, #-36]
-    8208:	ea00003f 	b	830c <ee_locate+0x134>
-    820c:	e3a03701 	mov	r3, #262144	; 0x40000
-    8210:	e50b3018 	str	r3, [fp, #-24]
-    8214:	e51b3018 	ldr	r3, [fp, #-24]
-    8218:	e2433c01 	sub	r3, r3, #256	; 0x100
-    821c:	e5d33000 	ldrb	r3, [r3]
-    8220:	e35300aa 	cmp	r3, #170	; 0xaa
-    8224:	1a000002 	bne	8234 <ee_locate+0x5c>
-    8228:	e3e03000 	mvn	r3, #0	; 0x0
-    822c:	e50b3024 	str	r3, [fp, #-36]
-    8230:	ea000035 	b	830c <ee_locate+0x134>
-    8234:	e51b2018 	ldr	r2, [fp, #-24]
-    8238:	e51b3020 	ldr	r3, [fp, #-32]
-    823c:	e0633002 	rsb	r3, r3, r2
-    8240:	e50b3014 	str	r3, [fp, #-20]
-    8244:	e3a030ff 	mov	r3, #255	; 0xff
-    8248:	e50b3010 	str	r3, [fp, #-16]
-    824c:	ea000029 	b	82f8 <ee_locate+0x120>
-    8250:	e51b2018 	ldr	r2, [fp, #-24]
-    8254:	e51b3020 	ldr	r3, [fp, #-32]
-    8258:	e0823003 	add	r3, r2, r3
-    825c:	e1a030a3 	mov	r3, r3, lsr #1
-    8260:	e50b301c 	str	r3, [fp, #-28]
-    8264:	e51b201c 	ldr	r2, [fp, #-28]
-    8268:	e51b3010 	ldr	r3, [fp, #-16]
-    826c:	e0023003 	and	r3, r2, r3
-    8270:	e3530000 	cmp	r3, #0	; 0x0
-    8274:	0a000013 	beq	82c8 <ee_locate+0xf0>
-    8278:	e51b3018 	ldr	r3, [fp, #-24]
-    827c:	e2433c01 	sub	r3, r3, #256	; 0x100
-    8280:	e5d33000 	ldrb	r3, [r3]
-    8284:	e35300ff 	cmp	r3, #255	; 0xff
-    8288:	1a000003 	bne	829c <ee_locate+0xc4>
-    828c:	e51b3018 	ldr	r3, [fp, #-24]
-    8290:	e2433c01 	sub	r3, r3, #256	; 0x100
-    8294:	e50b3018 	str	r3, [fp, #-24]
-    8298:	ea000002 	b	82a8 <ee_locate+0xd0>
-    829c:	e51b3020 	ldr	r3, [fp, #-32]
-    82a0:	e2833c01 	add	r3, r3, #256	; 0x100
-    82a4:	e50b3020 	str	r3, [fp, #-32]
-    82a8:	e51b2018 	ldr	r2, [fp, #-24]
-    82ac:	e51b3020 	ldr	r3, [fp, #-32]
-    82b0:	e0823003 	add	r3, r2, r3
-    82b4:	e1a030a3 	mov	r3, r3, lsr #1
-    82b8:	e50b301c 	str	r3, [fp, #-28]
-    82bc:	e51b3014 	ldr	r3, [fp, #-20]
-    82c0:	e2433c01 	sub	r3, r3, #256	; 0x100
-    82c4:	e50b3014 	str	r3, [fp, #-20]
-    82c8:	e51b301c 	ldr	r3, [fp, #-28]
-    82cc:	e5d33000 	ldrb	r3, [r3]
-    82d0:	e35300ff 	cmp	r3, #255	; 0xff
-    82d4:	1a000002 	bne	82e4 <ee_locate+0x10c>
-    82d8:	e51b301c 	ldr	r3, [fp, #-28]
-    82dc:	e50b3018 	str	r3, [fp, #-24]
-    82e0:	ea000001 	b	82ec <ee_locate+0x114>
-    82e4:	e51b301c 	ldr	r3, [fp, #-28]
-    82e8:	e50b3020 	str	r3, [fp, #-32]
-    82ec:	e51b3014 	ldr	r3, [fp, #-20]
-    82f0:	e1a030a3 	mov	r3, r3, lsr #1
-    82f4:	e50b3014 	str	r3, [fp, #-20]
-    82f8:	e51b3014 	ldr	r3, [fp, #-20]
-    82fc:	e3530c01 	cmp	r3, #256	; 0x100
-    8300:	1affffd2 	bne	8250 <ee_locate+0x78>
-    8304:	e51b3018 	ldr	r3, [fp, #-24]
-    8308:	e50b3024 	str	r3, [fp, #-36]
-    830c:	e51b3024 	ldr	r3, [fp, #-36]
-    8310:	e1a00003 	mov	r0, r3
-    8314:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    8318:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    831c:	e12fff1e 	bx	lr
-
-00008320 <init>:
-    8320:	e1a0c00d 	mov	ip, sp
-    8324:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    8328:	e24cb004 	sub	fp, ip, #4	; 0x4
-    832c:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    8330:	e283397f 	add	r3, r3, #2080768	; 0x1fc000
-    8334:	e3a02000 	mov	r2, #0	; 0x0
-    8338:	e5832000 	str	r2, [r3]
-    833c:	e3a0324e 	mov	r3, #-536870908	; 0xe0000004
-    8340:	e283397f 	add	r3, r3, #2080768	; 0x1fc000
-    8344:	e3a02003 	mov	r2, #3	; 0x3
-    8348:	e5832000 	str	r2, [r3]
-    834c:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    8350:	e283397f 	add	r3, r3, #2080768	; 0x1fc000
-    8354:	e3a02002 	mov	r2, #2	; 0x2
-    8358:	e5832000 	str	r2, [r3]
-    835c:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    8360:	e283397f 	add	r3, r3, #2080768	; 0x1fc000
-    8364:	e2833c01 	add	r3, r3, #256	; 0x100
-    8368:	e3a02001 	mov	r2, #1	; 0x1
-    836c:	e5832000 	str	r2, [r3]
-    8370:	eb00011c 	bl	87e8 <pll_init>
-    8374:	eb00012b 	bl	8828 <pll_feed>
-    8378:	eb00003e 	bl	8478 <init_ports>
-    837c:	e3a00ce1 	mov	r0, #57600	; 0xe100
-    8380:	eb0004fc 	bl	9778 <UARTInitialize>
-    8384:	e3a00ce1 	mov	r0, #57600	; 0xe100
-    8388:	eb000b22 	bl	b018 <UART1Initialize>
-    838c:	eb0000e0 	bl	8714 <init_spi>
-    8390:	eb0000ed 	bl	874c <init_spi1>
-    8394:	eb000061 	bl	8520 <init_timer0>
-    8398:	eb00008a 	bl	85c8 <init_timer1>
-    839c:	eb0000af 	bl	8660 <PWM_Init>
-    83a0:	e3a0093d 	mov	r0, #999424	; 0xf4000
-    83a4:	e2800d09 	add	r0, r0, #576	; 0x240
-    83a8:	eb00103d 	bl	c4a4 <ADCInit>
-    83ac:	eb000002 	bl	83bc <init_interrupts>
-    83b0:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    83b4:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    83b8:	e12fff1e 	bx	lr
-
-000083bc <init_interrupts>:
-    83bc:	e1a0c00d 	mov	ip, sp
-    83c0:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    83c4:	e24cb004 	sub	fp, ip, #4	; 0x4
-    83c8:	eb0011f8 	bl	cbb0 <init_VIC>
-    83cc:	e3a00004 	mov	r0, #4	; 0x4
-    83d0:	e59f108c 	ldr	r1, [pc, #140]	; 8464 <.text+0x8464>
-    83d4:	eb001226 	bl	cc74 <install_irq>
-    83d8:	e3a00005 	mov	r0, #5	; 0x5
-    83dc:	e59f1084 	ldr	r1, [pc, #132]	; 8468 <.text+0x8468>
-    83e0:	eb001223 	bl	cc74 <install_irq>
-    83e4:	e3a00007 	mov	r0, #7	; 0x7
-    83e8:	e59f107c 	ldr	r1, [pc, #124]	; 846c <.text+0x846c>
-    83ec:	eb001220 	bl	cc74 <install_irq>
-    83f0:	e3a0324e 	mov	r3, #-536870908	; 0xe0000004
-    83f4:	e2833801 	add	r3, r3, #65536	; 0x10000
-    83f8:	e3a02003 	mov	r2, #3	; 0x3
-    83fc:	e5832000 	str	r2, [r3]
-    8400:	e3a00006 	mov	r0, #6	; 0x6
-    8404:	e59f1064 	ldr	r1, [pc, #100]	; 8470 <.text+0x8470>
-    8408:	eb001219 	bl	cc74 <install_irq>
-    840c:	e3a03903 	mov	r3, #49152	; 0xc000
-    8410:	e283324e 	add	r3, r3, #-536870908	; 0xe0000004
-    8414:	e3a02003 	mov	r2, #3	; 0x3
-    8418:	e5832000 	str	r2, [r3]
-    841c:	e3a0000b 	mov	r0, #11	; 0xb
-    8420:	e59f104c 	ldr	r1, [pc, #76]	; 8474 <.text+0x8474>
-    8424:	eb001212 	bl	cc74 <install_irq>
-    8428:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    842c:	e283391a 	add	r3, r3, #425984	; 0x68000
-    8430:	e2833014 	add	r3, r3, #20	; 0x14
-    8434:	e3a0200d 	mov	r2, #13	; 0xd
-    8438:	e5832000 	str	r2, [r3]
-    843c:	e3a0224e 	mov	r2, #-536870908	; 0xe0000004
-    8440:	e282291a 	add	r2, r2, #425984	; 0x68000
-    8444:	e3a0324e 	mov	r3, #-536870908	; 0xe0000004
-    8448:	e283391a 	add	r3, r3, #425984	; 0x68000
-    844c:	e5933000 	ldr	r3, [r3]
-    8450:	e3833002 	orr	r3, r3, #2	; 0x2
-    8454:	e5823000 	str	r3, [r2]
-    8458:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    845c:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    8460:	e12fff1e 	bx	lr
-    8464:	000075bc 	streqh	r7, [r0], -ip
-    8468:	000076c8 	andeq	r7, r0, r8, asr #13
-    846c:	0000aac8 	andeq	sl, r0, r8, asr #21
-    8470:	00008968 	andeq	r8, r0, r8, ror #18
-    8474:	0000c770 	andeq	ip, r0, r0, ror r7
-
-00008478 <init_ports>:
-    8478:	e1a0c00d 	mov	ip, sp
-    847c:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    8480:	e24cb004 	sub	fp, ip, #4	; 0x4
-    8484:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    8488:	e283390b 	add	r3, r3, #180224	; 0x2c000
-    848c:	e59f2084 	ldr	r2, [pc, #132]	; 8518 <.text+0x8518>
-    8490:	e5832000 	str	r2, [r3]
-    8494:	e3a0324e 	mov	r3, #-536870908	; 0xe0000004
-    8498:	e283390b 	add	r3, r3, #180224	; 0x2c000
-    849c:	e59f2078 	ldr	r2, [pc, #120]	; 851c <.text+0x851c>
-    84a0:	e5832000 	str	r2, [r3]
-    84a4:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    84a8:	e283390b 	add	r3, r3, #180224	; 0x2c000
-    84ac:	e2833014 	add	r3, r3, #20	; 0x14
-    84b0:	e3a02004 	mov	r2, #4	; 0x4
-    84b4:	e5832000 	str	r2, [r3]
-    84b8:	e3a0228e 	mov	r2, #-536870904	; 0xe0000008
-    84bc:	e282290a 	add	r2, r2, #163840	; 0x28000
-    84c0:	e3a039c2 	mov	r3, #3178496	; 0x308000
-    84c4:	e2833dd2 	add	r3, r3, #13440	; 0x3480
-    84c8:	e5823000 	str	r3, [r2]
-    84cc:	e3a0324e 	mov	r3, #-536870908	; 0xe0000004
-    84d0:	e283390a 	add	r3, r3, #163840	; 0x28000
-    84d4:	e3a02d22 	mov	r2, #2176	; 0x880
-    84d8:	e5832000 	str	r2, [r3]
-    84dc:	e3a0220e 	mov	r2, #-536870912	; 0xe0000000
-    84e0:	e282290a 	add	r2, r2, #163840	; 0x28000
-    84e4:	e2822018 	add	r2, r2, #24	; 0x18
-    84e8:	e3a03403 	mov	r3, #50331648	; 0x3000000
-    84ec:	e2833803 	add	r3, r3, #196608	; 0x30000
-    84f0:	e5823000 	str	r3, [r2]
-    84f4:	e3a0220e 	mov	r2, #-536870912	; 0xe0000000
-    84f8:	e282290a 	add	r2, r2, #163840	; 0x28000
-    84fc:	e2822014 	add	r2, r2, #20	; 0x14
-    8500:	e3a03401 	mov	r3, #16777216	; 0x1000000
-    8504:	e2833801 	add	r3, r3, #65536	; 0x10000
-    8508:	e5823000 	str	r3, [r2]
-    850c:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    8510:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    8514:	e12fff1e 	bx	lr
-    8518:	30c51555 	sbccc	r1, r5, r5, asr r5
-    851c:	150406a8 	strne	r0, [r4, #-1704]
-
-00008520 <init_timer0>:
-    8520:	e1a0c00d 	mov	ip, sp
-    8524:	e92dd810 	stmdb	sp!, {r4, fp, ip, lr, pc}
-    8528:	e24cb004 	sub	fp, ip, #4	; 0x4
-    852c:	e3a03901 	mov	r3, #16384	; 0x4000
-    8530:	e283328e 	add	r3, r3, #-536870904	; 0xe0000008
-    8534:	e3a02000 	mov	r2, #0	; 0x0
-    8538:	e5832000 	str	r2, [r3]
-    853c:	e3a03901 	mov	r3, #16384	; 0x4000
-    8540:	e283324e 	add	r3, r3, #-536870908	; 0xe0000004
-    8544:	e3a02000 	mov	r2, #0	; 0x0
-    8548:	e5832000 	str	r2, [r3]
-    854c:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    8550:	e2833901 	add	r3, r3, #16384	; 0x4000
-    8554:	e2833014 	add	r3, r3, #20	; 0x14
-    8558:	e3a02003 	mov	r2, #3	; 0x3
-    855c:	e5832000 	str	r2, [r3]
-    8560:	e3a03901 	mov	r3, #16384	; 0x4000
-    8564:	e28332ce 	add	r3, r3, #-536870900	; 0xe000000c
-    8568:	e3a02000 	mov	r2, #0	; 0x0
-    856c:	e5832000 	str	r2, [r3]
-    8570:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    8574:	e2833901 	add	r3, r3, #16384	; 0x4000
-    8578:	e2833010 	add	r3, r3, #16	; 0x10
-    857c:	e3a02000 	mov	r2, #0	; 0x0
-    8580:	e5832000 	str	r2, [r3]
-    8584:	e3a0420e 	mov	r4, #-536870912	; 0xe0000000
-    8588:	e2844901 	add	r4, r4, #16384	; 0x4000
-    858c:	e2844018 	add	r4, r4, #24	; 0x18
-    8590:	eb0000bc 	bl	8888 <peripheralClockFrequency>
-    8594:	e1a02000 	mov	r2, r0
-    8598:	e59f3024 	ldr	r3, [pc, #36]	; 85c4 <.text+0x85c4>
-    859c:	e0831392 	umull	r1, r3, r2, r3
-    85a0:	e1a03323 	mov	r3, r3, lsr #6
-    85a4:	e5843000 	str	r3, [r4]
-    85a8:	e3a03901 	mov	r3, #16384	; 0x4000
-    85ac:	e283324e 	add	r3, r3, #-536870908	; 0xe0000004
-    85b0:	e3a02001 	mov	r2, #1	; 0x1
-    85b4:	e5832000 	str	r2, [r3]
-    85b8:	e24bd010 	sub	sp, fp, #16	; 0x10
-    85bc:	e89d6810 	ldmia	sp, {r4, fp, sp, lr}
-    85c0:	e12fff1e 	bx	lr
-    85c4:	10624dd3 	ldrned	r4, [r2], #-211
-
-000085c8 <init_timer1>:
-    85c8:	e1a0c00d 	mov	ip, sp
-    85cc:	e92dd810 	stmdb	sp!, {r4, fp, ip, lr, pc}
-    85d0:	e24cb004 	sub	fp, ip, #4	; 0x4
-    85d4:	e3a03902 	mov	r3, #32768	; 0x8000
-    85d8:	e283328e 	add	r3, r3, #-536870904	; 0xe0000008
-    85dc:	e3a02000 	mov	r2, #0	; 0x0
-    85e0:	e5832000 	str	r2, [r3]
-    85e4:	e3a03902 	mov	r3, #32768	; 0x8000
-    85e8:	e283324e 	add	r3, r3, #-536870908	; 0xe0000004
-    85ec:	e3a02000 	mov	r2, #0	; 0x0
-    85f0:	e5832000 	str	r2, [r3]
-    85f4:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    85f8:	e2833902 	add	r3, r3, #32768	; 0x8000
-    85fc:	e2833014 	add	r3, r3, #20	; 0x14
-    8600:	e3a02003 	mov	r2, #3	; 0x3
-    8604:	e5832000 	str	r2, [r3]
-    8608:	e3a03902 	mov	r3, #32768	; 0x8000
-    860c:	e28332ce 	add	r3, r3, #-536870900	; 0xe000000c
-    8610:	e3a02000 	mov	r2, #0	; 0x0
-    8614:	e5832000 	str	r2, [r3]
-    8618:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    861c:	e2833902 	add	r3, r3, #32768	; 0x8000
-    8620:	e2833010 	add	r3, r3, #16	; 0x10
-    8624:	e3a02000 	mov	r2, #0	; 0x0
-    8628:	e5832000 	str	r2, [r3]
-    862c:	e3a0420e 	mov	r4, #-536870912	; 0xe0000000
-    8630:	e2844902 	add	r4, r4, #32768	; 0x8000
-    8634:	e2844018 	add	r4, r4, #24	; 0x18
-    8638:	eb00008a 	bl	8868 <processorClockFrequency>
-    863c:	e1a03000 	mov	r3, r0
-    8640:	e5843000 	str	r3, [r4]
-    8644:	e3a03902 	mov	r3, #32768	; 0x8000
-    8648:	e283324e 	add	r3, r3, #-536870908	; 0xe0000004
-    864c:	e3a02001 	mov	r2, #1	; 0x1
-    8650:	e5832000 	str	r2, [r3]
-    8654:	e24bd010 	sub	sp, fp, #16	; 0x10
-    8658:	e89d6810 	ldmia	sp, {r4, fp, sp, lr}
-    865c:	e12fff1e 	bx	lr
-
-00008660 <PWM_Init>:
-    8660:	e1a0c00d 	mov	ip, sp
-    8664:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    8668:	e24cb004 	sub	fp, ip, #4	; 0x4
-    866c:	e3a0324e 	mov	r3, #-536870908	; 0xe0000004
-    8670:	e2833905 	add	r3, r3, #81920	; 0x14000
-    8674:	e3a02002 	mov	r2, #2	; 0x2
-    8678:	e5832000 	str	r2, [r3]
-    867c:	e3a032ce 	mov	r3, #-536870900	; 0xe000000c
-    8680:	e2833905 	add	r3, r3, #81920	; 0x14000
-    8684:	e3a02000 	mov	r2, #0	; 0x0
-    8688:	e5832000 	str	r2, [r3]
-    868c:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    8690:	e2833905 	add	r3, r3, #81920	; 0x14000
-    8694:	e2833014 	add	r3, r3, #20	; 0x14
-    8698:	e3a02002 	mov	r2, #2	; 0x2
-    869c:	e5832000 	str	r2, [r3]
-    86a0:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    86a4:	e2833905 	add	r3, r3, #81920	; 0x14000
-    86a8:	e2833018 	add	r3, r3, #24	; 0x18
-    86ac:	e3a02812 	mov	r2, #1179648	; 0x120000
-    86b0:	e5832000 	str	r2, [r3]
-    86b4:	e3a0220e 	mov	r2, #-536870912	; 0xe0000000
-    86b8:	e2822905 	add	r2, r2, #81920	; 0x14000
-    86bc:	e2822044 	add	r2, r2, #68	; 0x44
-    86c0:	e3a03b56 	mov	r3, #88064	; 0x15800
-    86c4:	e2833f65 	add	r3, r3, #404	; 0x194
-    86c8:	e2833002 	add	r3, r3, #2	; 0x2
-    86cc:	e5823000 	str	r3, [r2]
-    86d0:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    86d4:	e2833905 	add	r3, r3, #81920	; 0x14000
-    86d8:	e2833050 	add	r3, r3, #80	; 0x50
-    86dc:	e3a02020 	mov	r2, #32	; 0x20
-    86e0:	e5832000 	str	r2, [r3]
-    86e4:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    86e8:	e2833905 	add	r3, r3, #81920	; 0x14000
-    86ec:	e283304c 	add	r3, r3, #76	; 0x4c
-    86f0:	e3a02c7e 	mov	r2, #32256	; 0x7e00
-    86f4:	e5832000 	str	r2, [r3]
-    86f8:	e3a0324e 	mov	r3, #-536870908	; 0xe0000004
-    86fc:	e2833905 	add	r3, r3, #81920	; 0x14000
-    8700:	e3a02009 	mov	r2, #9	; 0x9
-    8704:	e5832000 	str	r2, [r3]
-    8708:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    870c:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    8710:	e12fff1e 	bx	lr
-
-00008714 <init_spi>:
-    8714:	e1a0c00d 	mov	ip, sp
-    8718:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    871c:	e24cb004 	sub	fp, ip, #4	; 0x4
-    8720:	e3a032ce 	mov	r3, #-536870900	; 0xe000000c
-    8724:	e2833802 	add	r3, r3, #131072	; 0x20000
-    8728:	e3a02004 	mov	r2, #4	; 0x4
-    872c:	e5832000 	str	r2, [r3]
-    8730:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    8734:	e2833802 	add	r3, r3, #131072	; 0x20000
-    8738:	e3a02020 	mov	r2, #32	; 0x20
-    873c:	e5832000 	str	r2, [r3]
-    8740:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    8744:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    8748:	e12fff1e 	bx	lr
-
-0000874c <init_spi1>:
-    874c:	e1a0c00d 	mov	ip, sp
-    8750:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    8754:	e24cb004 	sub	fp, ip, #4	; 0x4
-    8758:	e24dd004 	sub	sp, sp, #4	; 0x4
-    875c:	e3a0220e 	mov	r2, #-536870912	; 0xe0000000
-    8760:	e282291a 	add	r2, r2, #425984	; 0x68000
-    8764:	e3a03b01 	mov	r3, #1024	; 0x400
-    8768:	e283300f 	add	r3, r3, #15	; 0xf
-    876c:	e5823000 	str	r3, [r2]
-    8770:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    8774:	e283391a 	add	r3, r3, #425984	; 0x68000
-    8778:	e2833010 	add	r3, r3, #16	; 0x10
-    877c:	e3a0201b 	mov	r2, #27	; 0x1b
-    8780:	e5832000 	str	r2, [r3]
-    8784:	e3a03000 	mov	r3, #0	; 0x0
-    8788:	e54b300e 	strb	r3, [fp, #-14]
-    878c:	ea000006 	b	87ac <init_spi1+0x60>
-    8790:	e3a0328e 	mov	r3, #-536870904	; 0xe0000008
-    8794:	e283391a 	add	r3, r3, #425984	; 0x68000
-    8798:	e5933000 	ldr	r3, [r3]
-    879c:	e54b300d 	strb	r3, [fp, #-13]
-    87a0:	e55b300e 	ldrb	r3, [fp, #-14]
-    87a4:	e2833001 	add	r3, r3, #1	; 0x1
-    87a8:	e54b300e 	strb	r3, [fp, #-14]
-    87ac:	e55b300e 	ldrb	r3, [fp, #-14]
-    87b0:	e3530007 	cmp	r3, #7	; 0x7
-    87b4:	9afffff5 	bls	8790 <init_spi1+0x44>
-    87b8:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    87bc:	e283391a 	add	r3, r3, #425984	; 0x68000
-    87c0:	e2833014 	add	r3, r3, #20	; 0x14
-    87c4:	e3a02000 	mov	r2, #0	; 0x0
-    87c8:	e5832000 	str	r2, [r3]
-    87cc:	e3a0324e 	mov	r3, #-536870908	; 0xe0000004
-    87d0:	e283391a 	add	r3, r3, #425984	; 0x68000
-    87d4:	e3a02000 	mov	r2, #0	; 0x0
-    87d8:	e5832000 	str	r2, [r3]
-    87dc:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    87e0:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    87e4:	e12fff1e 	bx	lr
-
-000087e8 <pll_init>:
-    87e8:	e1a0c00d 	mov	ip, sp
-    87ec:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    87f0:	e24cb004 	sub	fp, ip, #4	; 0x4
-    87f4:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    87f8:	e283397f 	add	r3, r3, #2080768	; 0x1fc000
-    87fc:	e2833084 	add	r3, r3, #132	; 0x84
-    8800:	e3a02023 	mov	r2, #35	; 0x23
-    8804:	e5832000 	str	r2, [r3]
-    8808:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    880c:	e283397f 	add	r3, r3, #2080768	; 0x1fc000
-    8810:	e2833080 	add	r3, r3, #128	; 0x80
-    8814:	e3a02003 	mov	r2, #3	; 0x3
-    8818:	e5832000 	str	r2, [r3]
-    881c:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    8820:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    8824:	e12fff1e 	bx	lr
-
-00008828 <pll_feed>:
-    8828:	e1a0c00d 	mov	ip, sp
-    882c:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    8830:	e24cb004 	sub	fp, ip, #4	; 0x4
-    8834:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    8838:	e283397f 	add	r3, r3, #2080768	; 0x1fc000
-    883c:	e283308c 	add	r3, r3, #140	; 0x8c
-    8840:	e3a020aa 	mov	r2, #170	; 0xaa
-    8844:	e5832000 	str	r2, [r3]
-    8848:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    884c:	e283397f 	add	r3, r3, #2080768	; 0x1fc000
-    8850:	e283308c 	add	r3, r3, #140	; 0x8c
-    8854:	e3a02055 	mov	r2, #85	; 0x55
-    8858:	e5832000 	str	r2, [r3]
-    885c:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    8860:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    8864:	e12fff1e 	bx	lr
-
-00008868 <processorClockFrequency>:
-    8868:	e1a0c00d 	mov	ip, sp
-    886c:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    8870:	e24cb004 	sub	fp, ip, #4	; 0x4
-    8874:	e3a037e1 	mov	r3, #58982400	; 0x3840000
-    8878:	e1a00003 	mov	r0, r3
-    887c:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    8880:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    8884:	e12fff1e 	bx	lr
-
-00008888 <peripheralClockFrequency>:
-    8888:	e1a0c00d 	mov	ip, sp
-    888c:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    8890:	e24cb004 	sub	fp, ip, #4	; 0x4
-    8894:	e24dd008 	sub	sp, sp, #8	; 0x8
-    8898:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    889c:	e283397f 	add	r3, r3, #2080768	; 0x1fc000
-    88a0:	e2833c01 	add	r3, r3, #256	; 0x100
-    88a4:	e5933000 	ldr	r3, [r3]
-    88a8:	e2033003 	and	r3, r3, #3	; 0x3
-    88ac:	e50b3014 	str	r3, [fp, #-20]
-    88b0:	e51b3014 	ldr	r3, [fp, #-20]
-    88b4:	e3530001 	cmp	r3, #1	; 0x1
-    88b8:	0a000009 	beq	88e4 <peripheralClockFrequency+0x5c>
-    88bc:	e51b3014 	ldr	r3, [fp, #-20]
-    88c0:	e3530001 	cmp	r3, #1	; 0x1
-    88c4:	3a000003 	bcc	88d8 <peripheralClockFrequency+0x50>
-    88c8:	e51b3014 	ldr	r3, [fp, #-20]
-    88cc:	e3530002 	cmp	r3, #2	; 0x2
-    88d0:	0a000006 	beq	88f0 <peripheralClockFrequency+0x68>
-    88d4:	ea000007 	b	88f8 <peripheralClockFrequency+0x70>
-    88d8:	e3a03004 	mov	r3, #4	; 0x4
-    88dc:	e50b3010 	str	r3, [fp, #-16]
-    88e0:	ea000004 	b	88f8 <peripheralClockFrequency+0x70>
-    88e4:	e3a03001 	mov	r3, #1	; 0x1
-    88e8:	e50b3010 	str	r3, [fp, #-16]
-    88ec:	ea000001 	b	88f8 <peripheralClockFrequency+0x70>
-    88f0:	e3a03002 	mov	r3, #2	; 0x2
-    88f4:	e50b3010 	str	r3, [fp, #-16]
-    88f8:	ebffffda 	bl	8868 <processorClockFrequency>
-    88fc:	e1a03000 	mov	r3, r0
-    8900:	e1a00003 	mov	r0, r3
-    8904:	e51b1010 	ldr	r1, [fp, #-16]
-    8908:	eb003217 	bl	1516c <____udivsi3_from_arm>
-    890c:	e1a03000 	mov	r3, r0
-    8910:	e1a00003 	mov	r0, r3
-    8914:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    8918:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    891c:	e12fff1e 	bx	lr
-
-00008920 <delay>:
-    8920:	e1a0c00d 	mov	ip, sp
-    8924:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    8928:	e24cb004 	sub	fp, ip, #4	; 0x4
-    892c:	e24dd008 	sub	sp, sp, #8	; 0x8
-    8930:	e50b0014 	str	r0, [fp, #-20]
-    8934:	e3a03000 	mov	r3, #0	; 0x0
-    8938:	e50b3010 	str	r3, [fp, #-16]
-    893c:	ea000002 	b	894c <delay+0x2c>
-    8940:	e51b3010 	ldr	r3, [fp, #-16]
-    8944:	e2833001 	add	r3, r3, #1	; 0x1
-    8948:	e50b3010 	str	r3, [fp, #-16]
-    894c:	e51b2010 	ldr	r2, [fp, #-16]
-    8950:	e51b3014 	ldr	r3, [fp, #-20]
-    8954:	e1520003 	cmp	r2, r3
-    8958:	bafffff8 	blt	8940 <delay+0x20>
-    895c:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    8960:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    8964:	e12fff1e 	bx	lr
-
-00008968 <uart0ISR>:
-    8968:	e1a0c00d 	mov	ip, sp
-    896c:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    8970:	e24cb004 	sub	fp, ip, #4	; 0x4
-    8974:	e24dd008 	sub	sp, sp, #8	; 0x8
-    8978:	e3a03000 	mov	r3, #0	; 0x0
-    897c:	e14b30be 	strh	r3, [fp, #-14]
-    8980:	ea0000a0 	b	8c08 <.text+0x8c08>
-    8984:	e15b31b0 	ldrh	r3, [fp, #-16]
-    8988:	e2033c01 	and	r3, r3, #256	; 0x100
-    898c:	e3530000 	cmp	r3, #0	; 0x0
-    8990:	0a00001e 	beq	8a10 <uart0ISR+0xa8>
-    8994:	e59f22a8 	ldr	r2, [pc, #680]	; 8c44 <.text+0x8c44>
-    8998:	e3a03001 	mov	r3, #1	; 0x1
-    899c:	e5c23000 	strb	r3, [r2]
-    89a0:	e3a0220e 	mov	r2, #-536870912	; 0xe0000000
-    89a4:	e2822903 	add	r2, r2, #49152	; 0xc000
-    89a8:	e2822020 	add	r2, r2, #32	; 0x20
-    89ac:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    89b0:	e2833903 	add	r3, r3, #49152	; 0xc000
-    89b4:	e2833020 	add	r3, r3, #32	; 0x20
-    89b8:	e5933000 	ldr	r3, [r3]
-    89bc:	e3833c01 	orr	r3, r3, #256	; 0x100
-    89c0:	e5823000 	str	r3, [r2]
-    89c4:	e3a0220e 	mov	r2, #-536870912	; 0xe0000000
-    89c8:	e2822903 	add	r2, r2, #49152	; 0xc000
-    89cc:	e2822020 	add	r2, r2, #32	; 0x20
-    89d0:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    89d4:	e2833903 	add	r3, r3, #49152	; 0xc000
-    89d8:	e2833020 	add	r3, r3, #32	; 0x20
-    89dc:	e5933000 	ldr	r3, [r3]
-    89e0:	e3c33001 	bic	r3, r3, #1	; 0x1
-    89e4:	e5823000 	str	r3, [r2]
-    89e8:	e3a02903 	mov	r2, #49152	; 0xc000
-    89ec:	e282224e 	add	r2, r2, #-536870908	; 0xe0000004
-    89f0:	e3a03903 	mov	r3, #49152	; 0xc000
-    89f4:	e283324e 	add	r3, r3, #-536870908	; 0xe0000004
-    89f8:	e5933000 	ldr	r3, [r3]
-    89fc:	e3c33c03 	bic	r3, r3, #768	; 0x300
-    8a00:	e5823000 	str	r3, [r2]
-    8a04:	e59f2238 	ldr	r2, [pc, #568]	; 8c44 <.text+0x8c44>
-    8a08:	e3a03000 	mov	r3, #0	; 0x0
-    8a0c:	e5c23000 	strb	r3, [r2]
-    8a10:	e15b31b0 	ldrh	r3, [fp, #-16]
-    8a14:	e2033c02 	and	r3, r3, #512	; 0x200
-    8a18:	e3530000 	cmp	r3, #0	; 0x0
-    8a1c:	0a00000e 	beq	8a5c <uart0ISR+0xf4>
-    8a20:	e59f221c 	ldr	r2, [pc, #540]	; 8c44 <.text+0x8c44>
-    8a24:	e3a03001 	mov	r3, #1	; 0x1
-    8a28:	e5c23000 	strb	r3, [r2]
-    8a2c:	e3a0220e 	mov	r2, #-536870912	; 0xe0000000
-    8a30:	e2822903 	add	r2, r2, #49152	; 0xc000
-    8a34:	e2822020 	add	r2, r2, #32	; 0x20
-    8a38:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    8a3c:	e2833903 	add	r3, r3, #49152	; 0xc000
-    8a40:	e2833020 	add	r3, r3, #32	; 0x20
-    8a44:	e5933000 	ldr	r3, [r3]
-    8a48:	e3833c02 	orr	r3, r3, #512	; 0x200
-    8a4c:	e5823000 	str	r3, [r2]
-    8a50:	e59f21ec 	ldr	r2, [pc, #492]	; 8c44 <.text+0x8c44>
-    8a54:	e3a03000 	mov	r3, #0	; 0x0
-    8a58:	e5c23000 	strb	r3, [r2]
-    8a5c:	e15b31b0 	ldrh	r3, [fp, #-16]
-    8a60:	e203300e 	and	r3, r3, #14	; 0xe
-    8a64:	e2433002 	sub	r3, r3, #2	; 0x2
-    8a68:	e353000a 	cmp	r3, #10	; 0xa
-    8a6c:	979ff103 	ldrls	pc, [pc, r3, lsl #2]
-    8a70:	ea00005d 	b	8bec <.text+0x8bec>
-    8a74:	00008b58 	andeq	r8, r0, r8, asr fp
-    8a78:	00008bec 	andeq	r8, r0, ip, ror #23
-    8a7c:	00008ab4 	streqh	r8, [r0], -r4
-    8a80:	00008bec 	andeq	r8, r0, ip, ror #23
-    8a84:	00008aa0 	andeq	r8, r0, r0, lsr #21
-    8a88:	00008bec 	andeq	r8, r0, ip, ror #23
-    8a8c:	00008bec 	andeq	r8, r0, ip, ror #23
-    8a90:	00008bec 	andeq	r8, r0, ip, ror #23
-    8a94:	00008bec 	andeq	r8, r0, ip, ror #23
-    8a98:	00008bec 	andeq	r8, r0, ip, ror #23
-    8a9c:	00008ab4 	streqh	r8, [r0], -r4
-    8aa0:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    8aa4:	e2833903 	add	r3, r3, #49152	; 0xc000
-    8aa8:	e2833014 	add	r3, r3, #20	; 0x14
-    8aac:	e5933000 	ldr	r3, [r3]
-    8ab0:	ea000054 	b	8c08 <.text+0x8c08>
-    8ab4:	e59f318c 	ldr	r3, [pc, #396]	; 8c48 <.text+0x8c48>
-    8ab8:	e3a02001 	mov	r2, #1	; 0x1
-    8abc:	e5c32004 	strb	r2, [r3, #4]
-    8ac0:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    8ac4:	e2833903 	add	r3, r3, #49152	; 0xc000
-    8ac8:	e5933000 	ldr	r3, [r3]
-    8acc:	e20330ff 	and	r3, r3, #255	; 0xff
-    8ad0:	e54b3011 	strb	r3, [fp, #-17]
-    8ad4:	e59f016c 	ldr	r0, [pc, #364]	; 8c48 <.text+0x8c48>
-    8ad8:	eb000102 	bl	8ee8 <Fifo_availableMemory>
-    8adc:	e1a03000 	mov	r3, r0
-    8ae0:	e14b30be 	strh	r3, [fp, #-14]
-    8ae4:	e59f3160 	ldr	r3, [pc, #352]	; 8c4c <.text+0x8c4c>
-    8ae8:	e1d330b0 	ldrh	r3, [r3]
-    8aec:	e15b20fe 	ldrsh	r2, [fp, #-14]
-    8af0:	e1a03803 	mov	r3, r3, lsl #16
-    8af4:	e1a03843 	mov	r3, r3, asr #16
-    8af8:	e1520003 	cmp	r2, r3
-    8afc:	aa000002 	bge	8b0c <.text+0x8b0c>
-    8b00:	e59f2144 	ldr	r2, [pc, #324]	; 8c4c <.text+0x8c4c>
-    8b04:	e15b30be 	ldrh	r3, [fp, #-14]
-    8b08:	e1c230b0 	strh	r3, [r2]
-    8b0c:	e55b3011 	ldrb	r3, [fp, #-17]
-    8b10:	e59f0130 	ldr	r0, [pc, #304]	; 8c48 <.text+0x8c48>
-    8b14:	e1a01003 	mov	r1, r3
-    8b18:	eb00006e 	bl	8cd8 <Fifo_writeByte>
-    8b1c:	e1a03000 	mov	r3, r0
-    8b20:	e3530000 	cmp	r3, #0	; 0x0
-    8b24:	0a000007 	beq	8b48 <.text+0x8b48>
-    8b28:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    8b2c:	e2833903 	add	r3, r3, #49152	; 0xc000
-    8b30:	e2833014 	add	r3, r3, #20	; 0x14
-    8b34:	e5933000 	ldr	r3, [r3]
-    8b38:	e2033001 	and	r3, r3, #1	; 0x1
-    8b3c:	e20330ff 	and	r3, r3, #255	; 0xff
-    8b40:	e3530000 	cmp	r3, #0	; 0x0
-    8b44:	1affffdd 	bne	8ac0 <.text+0x8ac0>
-    8b48:	e59f30f8 	ldr	r3, [pc, #248]	; 8c48 <.text+0x8c48>
-    8b4c:	e3a02000 	mov	r2, #0	; 0x0
-    8b50:	e5c32004 	strb	r2, [r3, #4]
-    8b54:	ea00002b 	b	8c08 <.text+0x8c08>
-    8b58:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    8b5c:	e283390a 	add	r3, r3, #163840	; 0x28000
-    8b60:	e5933000 	ldr	r3, [r3]
-    8b64:	e2033501 	and	r3, r3, #4194304	; 0x400000
-    8b68:	e3530000 	cmp	r3, #0	; 0x0
-    8b6c:	1a000025 	bne	8c08 <.text+0x8c08>
-    8b70:	e59f30d8 	ldr	r3, [pc, #216]	; 8c50 <.text+0x8c50>
-    8b74:	e3a02001 	mov	r2, #1	; 0x1
-    8b78:	e5c32004 	strb	r2, [r3, #4]
-    8b7c:	ea00000f 	b	8bc0 <.text+0x8bc0>
-    8b80:	e24b3011 	sub	r3, fp, #17	; 0x11
-    8b84:	e59f00c4 	ldr	r0, [pc, #196]	; 8c50 <.text+0x8c50>
-    8b88:	e1a01003 	mov	r1, r3
-    8b8c:	eb0000af 	bl	8e50 <Fifo_readByte>
-    8b90:	e1a03000 	mov	r3, r0
-    8b94:	e3530000 	cmp	r3, #0	; 0x0
-    8b98:	0a000004 	beq	8bb0 <.text+0x8bb0>
-    8b9c:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    8ba0:	e2833903 	add	r3, r3, #49152	; 0xc000
-    8ba4:	e55b2011 	ldrb	r2, [fp, #-17]
-    8ba8:	e5832000 	str	r2, [r3]
-    8bac:	ea000003 	b	8bc0 <.text+0x8bc0>
-    8bb0:	e59f309c 	ldr	r3, [pc, #156]	; 8c54 <.text+0x8c54>
-    8bb4:	e3a02000 	mov	r2, #0	; 0x0
-    8bb8:	e5c32000 	strb	r2, [r3]
-    8bbc:	ea000006 	b	8bdc <.text+0x8bdc>
-    8bc0:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    8bc4:	e2833903 	add	r3, r3, #49152	; 0xc000
-    8bc8:	e2833014 	add	r3, r3, #20	; 0x14
-    8bcc:	e5933000 	ldr	r3, [r3]
-    8bd0:	e2033020 	and	r3, r3, #32	; 0x20
-    8bd4:	e3530000 	cmp	r3, #0	; 0x0
-    8bd8:	1affffe8 	bne	8b80 <.text+0x8b80>
-    8bdc:	e59f306c 	ldr	r3, [pc, #108]	; 8c50 <.text+0x8c50>
-    8be0:	e3a02000 	mov	r2, #0	; 0x0
-    8be4:	e5c32004 	strb	r2, [r3, #4]
-    8be8:	ea000006 	b	8c08 <.text+0x8c08>
-    8bec:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    8bf0:	e2833903 	add	r3, r3, #49152	; 0xc000
-    8bf4:	e2833014 	add	r3, r3, #20	; 0x14
-    8bf8:	e5933000 	ldr	r3, [r3]
-    8bfc:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    8c00:	e2833903 	add	r3, r3, #49152	; 0xc000
-    8c04:	e5933000 	ldr	r3, [r3]
-    8c08:	e3a03903 	mov	r3, #49152	; 0xc000
-    8c0c:	e283328e 	add	r3, r3, #-536870904	; 0xe0000008
-    8c10:	e5933000 	ldr	r3, [r3]
-    8c14:	e14b31b0 	strh	r3, [fp, #-16]
-    8c18:	e15b31b0 	ldrh	r3, [fp, #-16]
-    8c1c:	e2033001 	and	r3, r3, #1	; 0x1
-    8c20:	e3530000 	cmp	r3, #0	; 0x0
-    8c24:	0affff56 	beq	8984 <uart0ISR+0x1c>
-    8c28:	e3a03000 	mov	r3, #0	; 0x0
-    8c2c:	e2433efd 	sub	r3, r3, #4048	; 0xfd0
-    8c30:	e3a02000 	mov	r2, #0	; 0x0
-    8c34:	e5832000 	str	r2, [r3]
-    8c38:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    8c3c:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    8c40:	e12fff1e 	bx	lr
-    8c44:	400008e0 	andmi	r0, r0, r0, ror #17
-    8c48:	40001c18 	andmi	r1, r0, r8, lsl ip
-    8c4c:	4000000e 	andmi	r0, r0, lr
-    8c50:	400019fc 	strmid	r1, [r0], -ip
-    8c54:	400008cc 	andmi	r0, r0, ip, asr #17
-
-00008c58 <Fifo_initialize>:
-    8c58:	e1a0c00d 	mov	ip, sp
-    8c5c:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    8c60:	e24cb004 	sub	fp, ip, #4	; 0x4
-    8c64:	e24dd00c 	sub	sp, sp, #12	; 0xc
-    8c68:	e50b0010 	str	r0, [fp, #-16]
-    8c6c:	e50b1014 	str	r1, [fp, #-20]
-    8c70:	e50b2018 	str	r2, [fp, #-24]
-    8c74:	e51b2010 	ldr	r2, [fp, #-16]
-    8c78:	e51b3014 	ldr	r3, [fp, #-20]
-    8c7c:	e5823000 	str	r3, [r2]
-    8c80:	e51b2010 	ldr	r2, [fp, #-16]
-    8c84:	e51b3018 	ldr	r3, [fp, #-24]
-    8c88:	e5823008 	str	r3, [r2, #8]
-    8c8c:	e51b2010 	ldr	r2, [fp, #-16]
-    8c90:	e3a03000 	mov	r3, #0	; 0x0
-    8c94:	e582300c 	str	r3, [r2, #12]
-    8c98:	e51b2010 	ldr	r2, [fp, #-16]
-    8c9c:	e3a03000 	mov	r3, #0	; 0x0
-    8ca0:	e5823010 	str	r3, [r2, #16]
-    8ca4:	e51b2010 	ldr	r2, [fp, #-16]
-    8ca8:	e3a03000 	mov	r3, #0	; 0x0
-    8cac:	e5823014 	str	r3, [r2, #20]
-    8cb0:	e51b3018 	ldr	r3, [fp, #-24]
-    8cb4:	e2432001 	sub	r2, r3, #1	; 0x1
-    8cb8:	e51b3010 	ldr	r3, [fp, #-16]
-    8cbc:	e5832018 	str	r2, [r3, #24]
-    8cc0:	e51b2010 	ldr	r2, [fp, #-16]
-    8cc4:	e3a03000 	mov	r3, #0	; 0x0
-    8cc8:	e5c23004 	strb	r3, [r2, #4]
-    8ccc:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    8cd0:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    8cd4:	e12fff1e 	bx	lr
-
-00008cd8 <Fifo_writeByte>:
-    8cd8:	e1a0c00d 	mov	ip, sp
-    8cdc:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    8ce0:	e24cb004 	sub	fp, ip, #4	; 0x4
-    8ce4:	e24dd00c 	sub	sp, sp, #12	; 0xc
-    8ce8:	e50b0010 	str	r0, [fp, #-16]
-    8cec:	e1a03001 	mov	r3, r1
-    8cf0:	e54b3014 	strb	r3, [fp, #-20]
-    8cf4:	e51b3010 	ldr	r3, [fp, #-16]
-    8cf8:	e5933010 	ldr	r3, [r3, #16]
-    8cfc:	e2832001 	add	r2, r3, #1	; 0x1
-    8d00:	e51b3010 	ldr	r3, [fp, #-16]
-    8d04:	e5933018 	ldr	r3, [r3, #24]
-    8d08:	e0022003 	and	r2, r2, r3
-    8d0c:	e51b3010 	ldr	r3, [fp, #-16]
-    8d10:	e5832014 	str	r2, [r3, #20]
-    8d14:	e51b3010 	ldr	r3, [fp, #-16]
-    8d18:	e593200c 	ldr	r2, [r3, #12]
-    8d1c:	e51b3010 	ldr	r3, [fp, #-16]
-    8d20:	e5933014 	ldr	r3, [r3, #20]
-    8d24:	e1520003 	cmp	r2, r3
-    8d28:	1a000002 	bne	8d38 <Fifo_writeByte+0x60>
-    8d2c:	e3a03000 	mov	r3, #0	; 0x0
-    8d30:	e50b3018 	str	r3, [fp, #-24]
-    8d34:	ea00000c 	b	8d6c <Fifo_writeByte+0x94>
-    8d38:	e51b3010 	ldr	r3, [fp, #-16]
-    8d3c:	e5932000 	ldr	r2, [r3]
-    8d40:	e51b3010 	ldr	r3, [fp, #-16]
-    8d44:	e5933010 	ldr	r3, [r3, #16]
-    8d48:	e0822003 	add	r2, r2, r3
-    8d4c:	e55b3014 	ldrb	r3, [fp, #-20]
-    8d50:	e5c23000 	strb	r3, [r2]
-    8d54:	e51b3010 	ldr	r3, [fp, #-16]
-    8d58:	e5932014 	ldr	r2, [r3, #20]
-    8d5c:	e51b3010 	ldr	r3, [fp, #-16]
-    8d60:	e5832010 	str	r2, [r3, #16]
-    8d64:	e3a03001 	mov	r3, #1	; 0x1
-    8d68:	e50b3018 	str	r3, [fp, #-24]
-    8d6c:	e51b3018 	ldr	r3, [fp, #-24]
-    8d70:	e1a00003 	mov	r0, r3
-    8d74:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    8d78:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    8d7c:	e12fff1e 	bx	lr
-
-00008d80 <Fifo_writeBlock>:
-    8d80:	e1a0c00d 	mov	ip, sp
-    8d84:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    8d88:	e24cb004 	sub	fp, ip, #4	; 0x4
-    8d8c:	e24dd014 	sub	sp, sp, #20	; 0x14
-    8d90:	e50b0014 	str	r0, [fp, #-20]
-    8d94:	e50b1018 	str	r1, [fp, #-24]
-    8d98:	e50b201c 	str	r2, [fp, #-28]
-    8d9c:	e51b0014 	ldr	r0, [fp, #-20]
-    8da0:	eb000050 	bl	8ee8 <Fifo_availableMemory>
-    8da4:	e1a03000 	mov	r3, r0
-    8da8:	e1a02003 	mov	r2, r3
-    8dac:	e51b301c 	ldr	r3, [fp, #-28]
-    8db0:	e1520003 	cmp	r2, r3
-    8db4:	8a000002 	bhi	8dc4 <Fifo_writeBlock+0x44>
-    8db8:	e3a03000 	mov	r3, #0	; 0x0
-    8dbc:	e50b3020 	str	r3, [fp, #-32]
-    8dc0:	ea00001d 	b	8e3c <Fifo_writeBlock+0xbc>
-    8dc4:	e51b3018 	ldr	r3, [fp, #-24]
-    8dc8:	e50b3010 	str	r3, [fp, #-16]
-    8dcc:	ea000012 	b	8e1c <Fifo_writeBlock+0x9c>
-    8dd0:	e51b3014 	ldr	r3, [fp, #-20]
-    8dd4:	e5932000 	ldr	r2, [r3]
-    8dd8:	e51b3014 	ldr	r3, [fp, #-20]
-    8ddc:	e5933010 	ldr	r3, [r3, #16]
-    8de0:	e0822003 	add	r2, r2, r3
-    8de4:	e51b3010 	ldr	r3, [fp, #-16]
-    8de8:	e5d33000 	ldrb	r3, [r3]
-    8dec:	e5c23000 	strb	r3, [r2]
-    8df0:	e51b3010 	ldr	r3, [fp, #-16]
-    8df4:	e2833001 	add	r3, r3, #1	; 0x1
-    8df8:	e50b3010 	str	r3, [fp, #-16]
-    8dfc:	e51b3014 	ldr	r3, [fp, #-20]
-    8e00:	e5933010 	ldr	r3, [r3, #16]
-    8e04:	e2832001 	add	r2, r3, #1	; 0x1
-    8e08:	e51b3014 	ldr	r3, [fp, #-20]
-    8e0c:	e5933018 	ldr	r3, [r3, #24]
-    8e10:	e0022003 	and	r2, r2, r3
-    8e14:	e51b3014 	ldr	r3, [fp, #-20]
-    8e18:	e5832010 	str	r2, [r3, #16]
-    8e1c:	e51b301c 	ldr	r3, [fp, #-28]
-    8e20:	e2433001 	sub	r3, r3, #1	; 0x1
-    8e24:	e50b301c 	str	r3, [fp, #-28]
-    8e28:	e51b301c 	ldr	r3, [fp, #-28]
-    8e2c:	e3730001 	cmn	r3, #1	; 0x1
-    8e30:	1affffe6 	bne	8dd0 <Fifo_writeBlock+0x50>
-    8e34:	e3a03001 	mov	r3, #1	; 0x1
-    8e38:	e50b3020 	str	r3, [fp, #-32]
-    8e3c:	e51b3020 	ldr	r3, [fp, #-32]
-    8e40:	e1a00003 	mov	r0, r3
-    8e44:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    8e48:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    8e4c:	e12fff1e 	bx	lr
-
-00008e50 <Fifo_readByte>:
-    8e50:	e1a0c00d 	mov	ip, sp
-    8e54:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    8e58:	e24cb004 	sub	fp, ip, #4	; 0x4
-    8e5c:	e24dd00c 	sub	sp, sp, #12	; 0xc
-    8e60:	e50b0010 	str	r0, [fp, #-16]
-    8e64:	e50b1014 	str	r1, [fp, #-20]
-    8e68:	e51b3010 	ldr	r3, [fp, #-16]
-    8e6c:	e593200c 	ldr	r2, [r3, #12]
-    8e70:	e51b3010 	ldr	r3, [fp, #-16]
-    8e74:	e5933010 	ldr	r3, [r3, #16]
-    8e78:	e1520003 	cmp	r2, r3
-    8e7c:	1a000002 	bne	8e8c <Fifo_readByte+0x3c>
-    8e80:	e3a03000 	mov	r3, #0	; 0x0
-    8e84:	e50b3018 	str	r3, [fp, #-24]
-    8e88:	ea000011 	b	8ed4 <Fifo_readByte+0x84>
-    8e8c:	e51b3010 	ldr	r3, [fp, #-16]
-    8e90:	e5932000 	ldr	r2, [r3]
-    8e94:	e51b3010 	ldr	r3, [fp, #-16]
-    8e98:	e593300c 	ldr	r3, [r3, #12]
-    8e9c:	e0823003 	add	r3, r2, r3
-    8ea0:	e5d33000 	ldrb	r3, [r3]
-    8ea4:	e51b2014 	ldr	r2, [fp, #-20]
-    8ea8:	e5c23000 	strb	r3, [r2]
-    8eac:	e51b3010 	ldr	r3, [fp, #-16]
-    8eb0:	e593300c 	ldr	r3, [r3, #12]
-    8eb4:	e2832001 	add	r2, r3, #1	; 0x1
-    8eb8:	e51b3010 	ldr	r3, [fp, #-16]
-    8ebc:	e5933018 	ldr	r3, [r3, #24]
-    8ec0:	e0022003 	and	r2, r2, r3
-    8ec4:	e51b3010 	ldr	r3, [fp, #-16]
-    8ec8:	e583200c 	str	r2, [r3, #12]
-    8ecc:	e3a03001 	mov	r3, #1	; 0x1
-    8ed0:	e50b3018 	str	r3, [fp, #-24]
-    8ed4:	e51b3018 	ldr	r3, [fp, #-24]
-    8ed8:	e1a00003 	mov	r0, r3
-    8edc:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    8ee0:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    8ee4:	e12fff1e 	bx	lr
-
-00008ee8 <Fifo_availableMemory>:
-    8ee8:	e1a0c00d 	mov	ip, sp
-    8eec:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    8ef0:	e24cb004 	sub	fp, ip, #4	; 0x4
-    8ef4:	e24dd004 	sub	sp, sp, #4	; 0x4
-    8ef8:	e50b0010 	str	r0, [fp, #-16]
-    8efc:	e51b3010 	ldr	r3, [fp, #-16]
-    8f00:	e593300c 	ldr	r3, [r3, #12]
-    8f04:	e1a03803 	mov	r3, r3, lsl #16
-    8f08:	e1a02823 	mov	r2, r3, lsr #16
-    8f0c:	e51b3010 	ldr	r3, [fp, #-16]
-    8f10:	e5933010 	ldr	r3, [r3, #16]
-    8f14:	e1a03803 	mov	r3, r3, lsl #16
-    8f18:	e1a03823 	mov	r3, r3, lsr #16
-    8f1c:	e0633002 	rsb	r3, r3, r2
-    8f20:	e1a03803 	mov	r3, r3, lsl #16
-    8f24:	e1a03823 	mov	r3, r3, lsr #16
-    8f28:	e2433001 	sub	r3, r3, #1	; 0x1
-    8f2c:	e1a03803 	mov	r3, r3, lsl #16
-    8f30:	e1a02823 	mov	r2, r3, lsr #16
-    8f34:	e51b3010 	ldr	r3, [fp, #-16]
-    8f38:	e5933018 	ldr	r3, [r3, #24]
-    8f3c:	e1a03803 	mov	r3, r3, lsl #16
-    8f40:	e1a03823 	mov	r3, r3, lsr #16
-    8f44:	e0023003 	and	r3, r2, r3
-    8f48:	e1a03803 	mov	r3, r3, lsl #16
-    8f4c:	e1a03823 	mov	r3, r3, lsr #16
-    8f50:	e1a00003 	mov	r0, r3
-    8f54:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    8f58:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    8f5c:	e12fff1e 	bx	lr
-
-00008f60 <Fifo_reset>:
-    8f60:	e1a0c00d 	mov	ip, sp
-    8f64:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    8f68:	e24cb004 	sub	fp, ip, #4	; 0x4
-    8f6c:	e24dd004 	sub	sp, sp, #4	; 0x4
-    8f70:	e50b0010 	str	r0, [fp, #-16]
-    8f74:	e51b2010 	ldr	r2, [fp, #-16]
-    8f78:	e3a03000 	mov	r3, #0	; 0x0
-    8f7c:	e5823010 	str	r3, [r2, #16]
-    8f80:	e51b2010 	ldr	r2, [fp, #-16]
-    8f84:	e3a03000 	mov	r3, #0	; 0x0
-    8f88:	e582300c 	str	r3, [r2, #12]
-    8f8c:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    8f90:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    8f94:	e12fff1e 	bx	lr
-
-00008f98 <registerPacket>:
-    8f98:	e1a0c00d 	mov	ip, sp
-    8f9c:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    8fa0:	e24cb004 	sub	fp, ip, #4	; 0x4
-    8fa4:	e24dd008 	sub	sp, sp, #8	; 0x8
-    8fa8:	e1a03000 	mov	r3, r0
-    8fac:	e50b1014 	str	r1, [fp, #-20]
-    8fb0:	e54b3010 	strb	r3, [fp, #-16]
-    8fb4:	e59f30cc 	ldr	r3, [pc, #204]	; 9088 <.text+0x9088>
-    8fb8:	e5932000 	ldr	r2, [r3]
-    8fbc:	e59f10c8 	ldr	r1, [pc, #200]	; 908c <.text+0x908c>
-    8fc0:	e3a00004 	mov	r0, #4	; 0x4
-    8fc4:	e1a03002 	mov	r3, r2
-    8fc8:	e1a03083 	mov	r3, r3, lsl #1
-    8fcc:	e0833002 	add	r3, r3, r2
-    8fd0:	e1a03103 	mov	r3, r3, lsl #2
-    8fd4:	e0833001 	add	r3, r3, r1
-    8fd8:	e0832000 	add	r2, r3, r0
-    8fdc:	e51b3014 	ldr	r3, [fp, #-20]
-    8fe0:	e5823000 	str	r3, [r2]
-    8fe4:	e59f309c 	ldr	r3, [pc, #156]	; 9088 <.text+0x9088>
-    8fe8:	e5932000 	ldr	r2, [r3]
-    8fec:	e59f1098 	ldr	r1, [pc, #152]	; 908c <.text+0x908c>
-    8ff0:	e1a03002 	mov	r3, r2
-    8ff4:	e1a03083 	mov	r3, r3, lsl #1
-    8ff8:	e0833002 	add	r3, r3, r2
-    8ffc:	e1a03103 	mov	r3, r3, lsl #2
-    9000:	e0832001 	add	r2, r3, r1
-    9004:	e55b3010 	ldrb	r3, [fp, #-16]
-    9008:	e5c23000 	strb	r3, [r2]
-    900c:	e59f3074 	ldr	r3, [pc, #116]	; 9088 <.text+0x9088>
-    9010:	e5932000 	ldr	r2, [r3]
-    9014:	e59f1070 	ldr	r1, [pc, #112]	; 908c <.text+0x908c>
-    9018:	e3a00008 	mov	r0, #8	; 0x8
-    901c:	e1a03002 	mov	r3, r2
-    9020:	e1a03083 	mov	r3, r3, lsl #1
-    9024:	e0833002 	add	r3, r3, r2
-    9028:	e1a03103 	mov	r3, r3, lsl #2
-    902c:	e0833001 	add	r3, r3, r1
-    9030:	e0832000 	add	r2, r3, r0
-    9034:	e3a03000 	mov	r3, #0	; 0x0
-    9038:	e5c23000 	strb	r3, [r2]
-    903c:	e59f3044 	ldr	r3, [pc, #68]	; 9088 <.text+0x9088>
-    9040:	e5933000 	ldr	r3, [r3]
-    9044:	e2832001 	add	r2, r3, #1	; 0x1
-    9048:	e59f3038 	ldr	r3, [pc, #56]	; 9088 <.text+0x9088>
-    904c:	e5832000 	str	r2, [r3]
-    9050:	e59f3030 	ldr	r3, [pc, #48]	; 9088 <.text+0x9088>
-    9054:	e5932000 	ldr	r2, [r3]
-    9058:	e1a03002 	mov	r3, r2
-    905c:	e1a03083 	mov	r3, r3, lsl #1
-    9060:	e0833002 	add	r3, r3, r2
-    9064:	e1a03103 	mov	r3, r3, lsl #2
-    9068:	e1a02003 	mov	r2, r3
-    906c:	e59f3018 	ldr	r3, [pc, #24]	; 908c <.text+0x908c>
-    9070:	e243300c 	sub	r3, r3, #12	; 0xc
-    9074:	e0823003 	add	r3, r2, r3
-    9078:	e1a00003 	mov	r0, r3
-    907c:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    9080:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    9084:	e12fff1e 	bx	lr
-    9088:	400008dc 	ldrmid	r0, [r0], -ip
-    908c:	400014f4 	strmid	r1, [r0], -r4
-
-00009090 <parseRxFifo>:
-    9090:	e1a0c00d 	mov	ip, sp
-    9094:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    9098:	e24cb004 	sub	fp, ip, #4	; 0x4
-    909c:	e24dd008 	sub	sp, sp, #8	; 0x8
-    90a0:	e3a03000 	mov	r3, #0	; 0x0
-    90a4:	e50b3010 	str	r3, [fp, #-16]
-    90a8:	e3a03000 	mov	r3, #0	; 0x0
-    90ac:	e54b3011 	strb	r3, [fp, #-17]
-    90b0:	e59f34e8 	ldr	r3, [pc, #1256]	; 95a0 <.text+0x95a0>
-    90b4:	e5d33004 	ldrb	r3, [r3, #4]
-    90b8:	e20330ff 	and	r3, r3, #255	; 0xff
-    90bc:	e3530001 	cmp	r3, #1	; 0x1
-    90c0:	0a000133 	beq	9594 <parseRxFifo+0x504>
-    90c4:	ea00012b 	b	9578 <parseRxFifo+0x4e8>
-    90c8:	e59f34d4 	ldr	r3, [pc, #1236]	; 95a4 <.text+0x95a4>
-    90cc:	e5933000 	ldr	r3, [r3]
-    90d0:	e3530000 	cmp	r3, #0	; 0x0
-    90d4:	1a00001b 	bne	9148 <parseRxFifo+0xb8>
-    90d8:	e55b3011 	ldrb	r3, [fp, #-17]
-    90dc:	e353003e 	cmp	r3, #62	; 0x3e
-    90e0:	1a000005 	bne	90fc <parseRxFifo+0x6c>
-    90e4:	e59f34b8 	ldr	r3, [pc, #1208]	; 95a4 <.text+0x95a4>
-    90e8:	e5933000 	ldr	r3, [r3]
-    90ec:	e2832001 	add	r2, r3, #1	; 0x1
-    90f0:	e59f34ac 	ldr	r3, [pc, #1196]	; 95a4 <.text+0x95a4>
-    90f4:	e5832000 	str	r2, [r3]
-    90f8:	ea000002 	b	9108 <parseRxFifo+0x78>
-    90fc:	e59f24a0 	ldr	r2, [pc, #1184]	; 95a4 <.text+0x95a4>
-    9100:	e3a03000 	mov	r3, #0	; 0x0
-    9104:	e5823000 	str	r3, [r2]
-    9108:	e59f2498 	ldr	r2, [pc, #1176]	; 95a8 <.text+0x95a8>
-    910c:	e3a03000 	mov	r3, #0	; 0x0
-    9110:	e5823000 	str	r3, [r2]
-    9114:	e59f2490 	ldr	r2, [pc, #1168]	; 95ac <.text+0x95ac>
-    9118:	e3a03000 	mov	r3, #0	; 0x0
-    911c:	e1c230b0 	strh	r3, [r2]
-    9120:	e59f2488 	ldr	r2, [pc, #1160]	; 95b0 <.text+0x95b0>
-    9124:	e59f3488 	ldr	r3, [pc, #1160]	; 95b4 <.text+0x95b4>
-    9128:	e5823000 	str	r3, [r2]
-    912c:	e59f2484 	ldr	r2, [pc, #1156]	; 95b8 <.text+0x95b8>
-    9130:	e3a03000 	mov	r3, #0	; 0x0
-    9134:	e5823000 	str	r3, [r2]
-    9138:	e59f247c 	ldr	r2, [pc, #1148]	; 95bc <.text+0x95bc>
-    913c:	e3a03000 	mov	r3, #0	; 0x0
-    9140:	e5c23000 	strb	r3, [r2]
-    9144:	ea00010b 	b	9578 <parseRxFifo+0x4e8>
-    9148:	e59f3454 	ldr	r3, [pc, #1108]	; 95a4 <.text+0x95a4>
-    914c:	e5933000 	ldr	r3, [r3]
-    9150:	e3530001 	cmp	r3, #1	; 0x1
-    9154:	1a00000c 	bne	918c <parseRxFifo+0xfc>
-    9158:	e55b3011 	ldrb	r3, [fp, #-17]
-    915c:	e353002a 	cmp	r3, #42	; 0x2a
-    9160:	1a000005 	bne	917c <parseRxFifo+0xec>
-    9164:	e59f3438 	ldr	r3, [pc, #1080]	; 95a4 <.text+0x95a4>
-    9168:	e5933000 	ldr	r3, [r3]
-    916c:	e2832001 	add	r2, r3, #1	; 0x1
-    9170:	e59f342c 	ldr	r3, [pc, #1068]	; 95a4 <.text+0x95a4>
-    9174:	e5832000 	str	r2, [r3]
-    9178:	ea0000fe 	b	9578 <parseRxFifo+0x4e8>
-    917c:	e59f2420 	ldr	r2, [pc, #1056]	; 95a4 <.text+0x95a4>
-    9180:	e3a03000 	mov	r3, #0	; 0x0
-    9184:	e5823000 	str	r3, [r2]
-    9188:	ea0000fa 	b	9578 <parseRxFifo+0x4e8>
-    918c:	e59f3410 	ldr	r3, [pc, #1040]	; 95a4 <.text+0x95a4>
-    9190:	e5933000 	ldr	r3, [r3]
-    9194:	e3530002 	cmp	r3, #2	; 0x2
-    9198:	1a00000c 	bne	91d0 <parseRxFifo+0x140>
-    919c:	e55b3011 	ldrb	r3, [fp, #-17]
-    91a0:	e353003e 	cmp	r3, #62	; 0x3e
-    91a4:	1a000005 	bne	91c0 <parseRxFifo+0x130>
-    91a8:	e59f33f4 	ldr	r3, [pc, #1012]	; 95a4 <.text+0x95a4>
-    91ac:	e5933000 	ldr	r3, [r3]
-    91b0:	e2832001 	add	r2, r3, #1	; 0x1
-    91b4:	e59f33e8 	ldr	r3, [pc, #1000]	; 95a4 <.text+0x95a4>
-    91b8:	e5832000 	str	r2, [r3]
-    91bc:	ea0000ed 	b	9578 <parseRxFifo+0x4e8>
-    91c0:	e59f23dc 	ldr	r2, [pc, #988]	; 95a4 <.text+0x95a4>
-    91c4:	e3a03000 	mov	r3, #0	; 0x0
-    91c8:	e5823000 	str	r3, [r2]
-    91cc:	ea0000e9 	b	9578 <parseRxFifo+0x4e8>
-    91d0:	e59f33cc 	ldr	r3, [pc, #972]	; 95a4 <.text+0x95a4>
-    91d4:	e5933000 	ldr	r3, [r3]
-    91d8:	e3530003 	cmp	r3, #3	; 0x3
-    91dc:	1a000009 	bne	9208 <parseRxFifo+0x178>
-    91e0:	e55b3011 	ldrb	r3, [fp, #-17]
-    91e4:	e1a02003 	mov	r2, r3
-    91e8:	e59f33c8 	ldr	r3, [pc, #968]	; 95b8 <.text+0x95b8>
-    91ec:	e5832000 	str	r2, [r3]
-    91f0:	e59f33ac 	ldr	r3, [pc, #940]	; 95a4 <.text+0x95a4>
-    91f4:	e5933000 	ldr	r3, [r3]
-    91f8:	e2832001 	add	r2, r3, #1	; 0x1
-    91fc:	e59f33a0 	ldr	r3, [pc, #928]	; 95a4 <.text+0x95a4>
-    9200:	e5832000 	str	r2, [r3]
-    9204:	ea0000db 	b	9578 <parseRxFifo+0x4e8>
-    9208:	e59f3394 	ldr	r3, [pc, #916]	; 95a4 <.text+0x95a4>
-    920c:	e5933000 	ldr	r3, [r3]
-    9210:	e3530004 	cmp	r3, #4	; 0x4
-    9214:	1a000014 	bne	926c <parseRxFifo+0x1dc>
-    9218:	e55b3011 	ldrb	r3, [fp, #-17]
-    921c:	e59f239c 	ldr	r2, [pc, #924]	; 95c0 <.text+0x95c0>
-    9220:	e5c23000 	strb	r3, [r2]
-    9224:	e59f338c 	ldr	r3, [pc, #908]	; 95b8 <.text+0x95b8>
-    9228:	e5933000 	ldr	r3, [r3]
-    922c:	e3530000 	cmp	r3, #0	; 0x0
-    9230:	ca000003 	bgt	9244 <parseRxFifo+0x1b4>
-    9234:	e59f2368 	ldr	r2, [pc, #872]	; 95a4 <.text+0x95a4>
-    9238:	e3a03000 	mov	r3, #0	; 0x0
-    923c:	e5823000 	str	r3, [r2]
-    9240:	ea0000cc 	b	9578 <parseRxFifo+0x4e8>
-    9244:	e59f336c 	ldr	r3, [pc, #876]	; 95b8 <.text+0x95b8>
-    9248:	e5932000 	ldr	r2, [r3]
-    924c:	e59f3354 	ldr	r3, [pc, #852]	; 95a8 <.text+0x95a8>
-    9250:	e5832000 	str	r2, [r3]
-    9254:	e59f3348 	ldr	r3, [pc, #840]	; 95a4 <.text+0x95a4>
-    9258:	e5933000 	ldr	r3, [r3]
-    925c:	e2832001 	add	r2, r3, #1	; 0x1
-    9260:	e59f333c 	ldr	r3, [pc, #828]	; 95a4 <.text+0x95a4>
-    9264:	e5832000 	str	r2, [r3]
-    9268:	ea0000c2 	b	9578 <parseRxFifo+0x4e8>
-    926c:	e59f3330 	ldr	r3, [pc, #816]	; 95a4 <.text+0x95a4>
-    9270:	e5933000 	ldr	r3, [r3]
-    9274:	e3530005 	cmp	r3, #5	; 0x5
-    9278:	1a000008 	bne	92a0 <parseRxFifo+0x210>
-    927c:	e55b3011 	ldrb	r3, [fp, #-17]
-    9280:	e59f2334 	ldr	r2, [pc, #820]	; 95bc <.text+0x95bc>
-    9284:	e5c23000 	strb	r3, [r2]
-    9288:	e59f3314 	ldr	r3, [pc, #788]	; 95a4 <.text+0x95a4>
-    928c:	e5933000 	ldr	r3, [r3]
-    9290:	e2832001 	add	r2, r3, #1	; 0x1
-    9294:	e59f3308 	ldr	r3, [pc, #776]	; 95a4 <.text+0x95a4>
-    9298:	e5832000 	str	r2, [r3]
-    929c:	ea0000b5 	b	9578 <parseRxFifo+0x4e8>
-    92a0:	e59f32fc 	ldr	r3, [pc, #764]	; 95a4 <.text+0x95a4>
-    92a4:	e5933000 	ldr	r3, [r3]
-    92a8:	e3530006 	cmp	r3, #6	; 0x6
-    92ac:	1a000016 	bne	930c <parseRxFifo+0x27c>
-    92b0:	e59f3300 	ldr	r3, [pc, #768]	; 95b8 <.text+0x95b8>
-    92b4:	e5932000 	ldr	r2, [r3]
-    92b8:	e59f32e8 	ldr	r3, [pc, #744]	; 95a8 <.text+0x95a8>
-    92bc:	e5933000 	ldr	r3, [r3]
-    92c0:	e0631002 	rsb	r1, r3, r2
-    92c4:	e55b3011 	ldrb	r3, [fp, #-17]
-    92c8:	e59f22e4 	ldr	r2, [pc, #740]	; 95b4 <.text+0x95b4>
-    92cc:	e7c23001 	strb	r3, [r2, r1]
-    92d0:	e59f32d0 	ldr	r3, [pc, #720]	; 95a8 <.text+0x95a8>
-    92d4:	e5933000 	ldr	r3, [r3]
-    92d8:	e2432001 	sub	r2, r3, #1	; 0x1
-    92dc:	e59f32c4 	ldr	r3, [pc, #708]	; 95a8 <.text+0x95a8>
-    92e0:	e5832000 	str	r2, [r3]
-    92e4:	e59f32bc 	ldr	r3, [pc, #700]	; 95a8 <.text+0x95a8>
-    92e8:	e5933000 	ldr	r3, [r3]
-    92ec:	e3530000 	cmp	r3, #0	; 0x0
-    92f0:	1a0000a0 	bne	9578 <parseRxFifo+0x4e8>
-    92f4:	e59f32a8 	ldr	r3, [pc, #680]	; 95a4 <.text+0x95a4>
-    92f8:	e5933000 	ldr	r3, [r3]
-    92fc:	e2832001 	add	r2, r3, #1	; 0x1
-    9300:	e59f329c 	ldr	r3, [pc, #668]	; 95a4 <.text+0x95a4>
-    9304:	e5832000 	str	r2, [r3]
-    9308:	ea00009a 	b	9578 <parseRxFifo+0x4e8>
-    930c:	e59f3290 	ldr	r3, [pc, #656]	; 95a4 <.text+0x95a4>
-    9310:	e5933000 	ldr	r3, [r3]
-    9314:	e3530007 	cmp	r3, #7	; 0x7
-    9318:	1a000009 	bne	9344 <parseRxFifo+0x2b4>
-    931c:	e55b3011 	ldrb	r3, [fp, #-17]
-    9320:	e1a02003 	mov	r2, r3
-    9324:	e59f3280 	ldr	r3, [pc, #640]	; 95ac <.text+0x95ac>
-    9328:	e1c320b0 	strh	r2, [r3]
-    932c:	e59f3270 	ldr	r3, [pc, #624]	; 95a4 <.text+0x95a4>
-    9330:	e5933000 	ldr	r3, [r3]
-    9334:	e2832001 	add	r2, r3, #1	; 0x1
-    9338:	e59f3264 	ldr	r3, [pc, #612]	; 95a4 <.text+0x95a4>
-    933c:	e5832000 	str	r2, [r3]
-    9340:	ea00008c 	b	9578 <parseRxFifo+0x4e8>
-    9344:	e59f3258 	ldr	r3, [pc, #600]	; 95a4 <.text+0x95a4>
-    9348:	e5933000 	ldr	r3, [r3]
-    934c:	e3530008 	cmp	r3, #8	; 0x8
-    9350:	1a000085 	bne	956c <parseRxFifo+0x4dc>
-    9354:	e55b3011 	ldrb	r3, [fp, #-17]
-    9358:	e1a03403 	mov	r3, r3, lsl #8
-    935c:	e1a03803 	mov	r3, r3, lsl #16
-    9360:	e1a02823 	mov	r2, r3, lsr #16
-    9364:	e59f3240 	ldr	r3, [pc, #576]	; 95ac <.text+0x95ac>
-    9368:	e1d330b0 	ldrh	r3, [r3]
-    936c:	e1823003 	orr	r3, r2, r3
-    9370:	e1a03803 	mov	r3, r3, lsl #16
-    9374:	e1a03823 	mov	r3, r3, lsr #16
-    9378:	e1a03803 	mov	r3, r3, lsl #16
-    937c:	e1a02823 	mov	r2, r3, lsr #16
-    9380:	e59f3224 	ldr	r3, [pc, #548]	; 95ac <.text+0x95ac>
-    9384:	e1c320b0 	strh	r2, [r3]
-    9388:	e59f3234 	ldr	r3, [pc, #564]	; 95c4 <.text+0x95c4>
-    938c:	e5933000 	ldr	r3, [r3]
-    9390:	e2832001 	add	r2, r3, #1	; 0x1
-    9394:	e59f3228 	ldr	r3, [pc, #552]	; 95c4 <.text+0x95c4>
-    9398:	e5832000 	str	r2, [r3]
-    939c:	e59f021c 	ldr	r0, [pc, #540]	; 95c0 <.text+0x95c0>
-    93a0:	e3a01001 	mov	r1, #1	; 0x1
-    93a4:	e3a020ff 	mov	r2, #255	; 0xff
-    93a8:	eb00026a 	bl	9d58 <crc16>
-    93ac:	e1a03000 	mov	r3, r0
-    93b0:	e1a02003 	mov	r2, r3
-    93b4:	e59f320c 	ldr	r3, [pc, #524]	; 95c8 <.text+0x95c8>
-    93b8:	e1c320b0 	strh	r2, [r3]
-    93bc:	e59f3204 	ldr	r3, [pc, #516]	; 95c8 <.text+0x95c8>
-    93c0:	e1d330b0 	ldrh	r3, [r3]
-    93c4:	e59f01f0 	ldr	r0, [pc, #496]	; 95bc <.text+0x95bc>
-    93c8:	e3a01001 	mov	r1, #1	; 0x1
-    93cc:	e1a02003 	mov	r2, r3
-    93d0:	eb000260 	bl	9d58 <crc16>
-    93d4:	e1a03000 	mov	r3, r0
-    93d8:	e1a02003 	mov	r2, r3
-    93dc:	e59f31e4 	ldr	r3, [pc, #484]	; 95c8 <.text+0x95c8>
-    93e0:	e1c320b0 	strh	r2, [r3]
-    93e4:	e59f31cc 	ldr	r3, [pc, #460]	; 95b8 <.text+0x95b8>
-    93e8:	e5933000 	ldr	r3, [r3]
-    93ec:	e1a03803 	mov	r3, r3, lsl #16
-    93f0:	e1a03823 	mov	r3, r3, lsr #16
-    93f4:	e1a02003 	mov	r2, r3
-    93f8:	e59f31c8 	ldr	r3, [pc, #456]	; 95c8 <.text+0x95c8>
-    93fc:	e1d330b0 	ldrh	r3, [r3]
-    9400:	e59f01ac 	ldr	r0, [pc, #428]	; 95b4 <.text+0x95b4>
-    9404:	e1a01002 	mov	r1, r2
-    9408:	e1a02003 	mov	r2, r3
-    940c:	eb000251 	bl	9d58 <crc16>
-    9410:	e1a03000 	mov	r3, r0
-    9414:	e1a02003 	mov	r2, r3
-    9418:	e59f31a8 	ldr	r3, [pc, #424]	; 95c8 <.text+0x95c8>
-    941c:	e1c320b0 	strh	r2, [r3]
-    9420:	e59f3184 	ldr	r3, [pc, #388]	; 95ac <.text+0x95ac>
-    9424:	e1d320b0 	ldrh	r2, [r3]
-    9428:	e59f3198 	ldr	r3, [pc, #408]	; 95c8 <.text+0x95c8>
-    942c:	e1d330b0 	ldrh	r3, [r3]
-    9430:	e1520003 	cmp	r2, r3
-    9434:	1a000048 	bne	955c <parseRxFifo+0x4cc>
-    9438:	e59f318c 	ldr	r3, [pc, #396]	; 95cc <.text+0x95cc>
-    943c:	e5933000 	ldr	r3, [r3]
-    9440:	e2832001 	add	r2, r3, #1	; 0x1
-    9444:	e59f3180 	ldr	r3, [pc, #384]	; 95cc <.text+0x95cc>
-    9448:	e5832000 	str	r2, [r3]
-    944c:	e3a03000 	mov	r3, #0	; 0x0
-    9450:	e50b3010 	str	r3, [fp, #-16]
-    9454:	ea00003b 	b	9548 <parseRxFifo+0x4b8>
-    9458:	e51b2010 	ldr	r2, [fp, #-16]
-    945c:	e59f116c 	ldr	r1, [pc, #364]	; 95d0 <.text+0x95d0>
-    9460:	e1a03002 	mov	r3, r2
-    9464:	e1a03083 	mov	r3, r3, lsl #1
-    9468:	e0833002 	add	r3, r3, r2
-    946c:	e1a03103 	mov	r3, r3, lsl #2
-    9470:	e0833001 	add	r3, r3, r1
-    9474:	e5d32000 	ldrb	r2, [r3]
-    9478:	e59f3140 	ldr	r3, [pc, #320]	; 95c0 <.text+0x95c0>
-    947c:	e5d33000 	ldrb	r3, [r3]
-    9480:	e1520003 	cmp	r2, r3
-    9484:	1a00002c 	bne	953c <parseRxFifo+0x4ac>
-    9488:	e51b2010 	ldr	r2, [fp, #-16]
-    948c:	e59f113c 	ldr	r1, [pc, #316]	; 95d0 <.text+0x95d0>
-    9490:	e3a00004 	mov	r0, #4	; 0x4
-    9494:	e1a03002 	mov	r3, r2
-    9498:	e1a03083 	mov	r3, r3, lsl #1
-    949c:	e0833002 	add	r3, r3, r2
-    94a0:	e1a03103 	mov	r3, r3, lsl #2
-    94a4:	e0833001 	add	r3, r3, r1
-    94a8:	e0833000 	add	r3, r3, r0
-    94ac:	e5932000 	ldr	r2, [r3]
-    94b0:	e59f3100 	ldr	r3, [pc, #256]	; 95b8 <.text+0x95b8>
-    94b4:	e5933000 	ldr	r3, [r3]
-    94b8:	e1a01003 	mov	r1, r3
-    94bc:	e59f30f0 	ldr	r3, [pc, #240]	; 95b4 <.text+0x95b4>
-    94c0:	e1a0c001 	mov	ip, r1
-    94c4:	e1a00002 	mov	r0, r2
-    94c8:	e1a01003 	mov	r1, r3
-    94cc:	e1a0200c 	mov	r2, ip
-    94d0:	eb002f28 	bl	15178 <__memcpy_from_arm>
-    94d4:	e51b2010 	ldr	r2, [fp, #-16]
-    94d8:	e59f10f0 	ldr	r1, [pc, #240]	; 95d0 <.text+0x95d0>
-    94dc:	e3a00008 	mov	r0, #8	; 0x8
-    94e0:	e1a03002 	mov	r3, r2
-    94e4:	e1a03083 	mov	r3, r3, lsl #1
-    94e8:	e0833002 	add	r3, r3, r2
-    94ec:	e1a03103 	mov	r3, r3, lsl #2
-    94f0:	e0833001 	add	r3, r3, r1
-    94f4:	e0832000 	add	r2, r3, r0
-    94f8:	e3a03001 	mov	r3, #1	; 0x1
-    94fc:	e5c23000 	strb	r3, [r2]
-    9500:	e59f30b4 	ldr	r3, [pc, #180]	; 95bc <.text+0x95bc>
-    9504:	e5d33000 	ldrb	r3, [r3]
-    9508:	e2033001 	and	r3, r3, #1	; 0x1
-    950c:	e20330ff 	and	r3, r3, #255	; 0xff
-    9510:	e3530000 	cmp	r3, #0	; 0x0
-    9514:	0a000010 	beq	955c <parseRxFifo+0x4cc>
-    9518:	e59f309c 	ldr	r3, [pc, #156]	; 95bc <.text+0x95bc>
-    951c:	e5d33000 	ldrb	r3, [r3]
-    9520:	e59f20ac 	ldr	r2, [pc, #172]	; 95d4 <.text+0x95d4>
-    9524:	e5c23000 	strb	r3, [r2]
-    9528:	e3a00000 	mov	r0, #0	; 0x0
-    952c:	e59f10a0 	ldr	r1, [pc, #160]	; 95d4 <.text+0x95d4>
-    9530:	e3a02001 	mov	r2, #1	; 0x1
-    9534:	eb000028 	bl	95dc <writePacket2Ringbuffer>
-    9538:	ea000007 	b	955c <parseRxFifo+0x4cc>
-    953c:	e51b3010 	ldr	r3, [fp, #-16]
-    9540:	e2833001 	add	r3, r3, #1	; 0x1
-    9544:	e50b3010 	str	r3, [fp, #-16]
-    9548:	e59f3088 	ldr	r3, [pc, #136]	; 95d8 <.text+0x95d8>
-    954c:	e5932000 	ldr	r2, [r3]
-    9550:	e51b3010 	ldr	r3, [fp, #-16]
-    9554:	e1530002 	cmp	r3, r2
-    9558:	3affffbe 	bcc	9458 <parseRxFifo+0x3c8>
-    955c:	e59f2040 	ldr	r2, [pc, #64]	; 95a4 <.text+0x95a4>
-    9560:	e3a03000 	mov	r3, #0	; 0x0
-    9564:	e5823000 	str	r3, [r2]
-    9568:	ea000002 	b	9578 <parseRxFifo+0x4e8>
-    956c:	e59f2030 	ldr	r2, [pc, #48]	; 95a4 <.text+0x95a4>
-    9570:	e3a03000 	mov	r3, #0	; 0x0
-    9574:	e5823000 	str	r3, [r2]
-    9578:	e24b3011 	sub	r3, fp, #17	; 0x11
-    957c:	e59f001c 	ldr	r0, [pc, #28]	; 95a0 <.text+0x95a0>
-    9580:	e1a01003 	mov	r1, r3
-    9584:	ebfffe31 	bl	8e50 <Fifo_readByte>
-    9588:	e1a03000 	mov	r3, r0
-    958c:	e3530000 	cmp	r3, #0	; 0x0
-    9590:	1afffecc 	bne	90c8 <parseRxFifo+0x38>
-    9594:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    9598:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    959c:	e12fff1e 	bx	lr
-    95a0:	40001c18 	andmi	r1, r0, r8, lsl ip
-    95a4:	400008e4 	andmi	r0, r0, r4, ror #17
-    95a8:	400008ec 	andmi	r0, r0, ip, ror #17
-    95ac:	400008e8 	andmi	r0, r0, r8, ror #17
-    95b0:	400019f8 	strmid	r1, [r0], -r8
-    95b4:	400017f4 	strmid	r1, [r0], -r4
-    95b8:	400008f0 	strmid	r0, [r0], -r0
-    95bc:	400008f4 	strmid	r0, [r0], -r4
-    95c0:	400008f5 	strmid	r0, [r0], -r5
-    95c4:	400008d4 	ldrmid	r0, [r0], -r4
-    95c8:	400008ea 	andmi	r0, r0, sl, ror #17
-    95cc:	400008d8 	ldrmid	r0, [r0], -r8
-    95d0:	400014f4 	strmid	r1, [r0], -r4
-    95d4:	400008e1 	andmi	r0, r0, r1, ror #17
-    95d8:	400008dc 	ldrmid	r0, [r0], -ip
-
-000095dc <writePacket2Ringbuffer>:
-    95dc:	e1a0c00d 	mov	ip, sp
-    95e0:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    95e4:	e24cb004 	sub	fp, ip, #4	; 0x4
-    95e8:	e24dd014 	sub	sp, sp, #20	; 0x14
-    95ec:	e1a03000 	mov	r3, r0
-    95f0:	e50b101c 	str	r1, [fp, #-28]
-    95f4:	e54b3018 	strb	r3, [fp, #-24]
-    95f8:	e1a03002 	mov	r3, r2
-    95fc:	e54b3020 	strb	r3, [fp, #-32]
-    9600:	e3a03000 	mov	r3, #0	; 0x0
-    9604:	e14b31b2 	strh	r3, [fp, #-18]
-    9608:	e3a03000 	mov	r3, #0	; 0x0
-    960c:	e50b3010 	str	r3, [fp, #-16]
-    9610:	e59f20d0 	ldr	r2, [pc, #208]	; 96e8 <.text+0x96e8>
-    9614:	e55b3020 	ldrb	r3, [fp, #-32]
-    9618:	e5c23002 	strb	r3, [r2, #2]
-    961c:	e55b3018 	ldrb	r3, [fp, #-24]
-    9620:	e59f20c0 	ldr	r2, [pc, #192]	; 96e8 <.text+0x96e8>
-    9624:	e5c23003 	strb	r3, [r2, #3]
-    9628:	e24b3018 	sub	r3, fp, #24	; 0x18
-    962c:	e1a00003 	mov	r0, r3
-    9630:	e3a01001 	mov	r1, #1	; 0x1
-    9634:	e3a020ff 	mov	r2, #255	; 0xff
-    9638:	eb0001c6 	bl	9d58 <crc16>
-    963c:	e1a03000 	mov	r3, r0
-    9640:	e14b31b2 	strh	r3, [fp, #-18]
-    9644:	e55b2020 	ldrb	r2, [fp, #-32]
-    9648:	e15b31b2 	ldrh	r3, [fp, #-18]
-    964c:	e51b001c 	ldr	r0, [fp, #-28]
-    9650:	e1a01002 	mov	r1, r2
-    9654:	e1a02003 	mov	r2, r3
-    9658:	eb0001be 	bl	9d58 <crc16>
-    965c:	e1a03000 	mov	r3, r0
-    9660:	e14b31b2 	strh	r3, [fp, #-18]
-    9664:	e3a03001 	mov	r3, #1	; 0x1
-    9668:	e50b3010 	str	r3, [fp, #-16]
-    966c:	e59f0074 	ldr	r0, [pc, #116]	; 96e8 <.text+0x96e8>
-    9670:	e3a01004 	mov	r1, #4	; 0x4
-    9674:	eb00001c 	bl	96ec <UART0_writeFifo>
-    9678:	e1a03000 	mov	r3, r0
-    967c:	e1a02003 	mov	r2, r3
-    9680:	e51b3010 	ldr	r3, [fp, #-16]
-    9684:	e0033002 	and	r3, r3, r2
-    9688:	e50b3010 	str	r3, [fp, #-16]
-    968c:	e55b3020 	ldrb	r3, [fp, #-32]
-    9690:	e51b001c 	ldr	r0, [fp, #-28]
-    9694:	e1a01003 	mov	r1, r3
-    9698:	eb000013 	bl	96ec <UART0_writeFifo>
-    969c:	e1a03000 	mov	r3, r0
-    96a0:	e1a02003 	mov	r2, r3
-    96a4:	e51b3010 	ldr	r3, [fp, #-16]
-    96a8:	e0033002 	and	r3, r3, r2
-    96ac:	e50b3010 	str	r3, [fp, #-16]
-    96b0:	e24b3012 	sub	r3, fp, #18	; 0x12
-    96b4:	e1a00003 	mov	r0, r3
-    96b8:	e3a01002 	mov	r1, #2	; 0x2
-    96bc:	eb00000a 	bl	96ec <UART0_writeFifo>
-    96c0:	e1a03000 	mov	r3, r0
-    96c4:	e1a02003 	mov	r2, r3
-    96c8:	e51b3010 	ldr	r3, [fp, #-16]
-    96cc:	e0033002 	and	r3, r3, r2
-    96d0:	e50b3010 	str	r3, [fp, #-16]
-    96d4:	e51b3010 	ldr	r3, [fp, #-16]
-    96d8:	e1a00003 	mov	r0, r3
-    96dc:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    96e0:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    96e4:	e12fff1e 	bx	lr
-    96e8:	40000010 	andmi	r0, r0, r0, lsl r0
-
-000096ec <UART0_writeFifo>:
-    96ec:	e1a0c00d 	mov	ip, sp
-    96f0:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    96f4:	e24cb004 	sub	fp, ip, #4	; 0x4
-    96f8:	e24dd00c 	sub	sp, sp, #12	; 0xc
-    96fc:	e50b0014 	str	r0, [fp, #-20]
-    9700:	e50b1018 	str	r1, [fp, #-24]
-    9704:	e3a03000 	mov	r3, #0	; 0x0
-    9708:	e54b300f 	strb	r3, [fp, #-15]
-    970c:	e59f005c 	ldr	r0, [pc, #92]	; 9770 <.text+0x9770>
-    9710:	e51b1014 	ldr	r1, [fp, #-20]
-    9714:	e51b2018 	ldr	r2, [fp, #-24]
-    9718:	ebfffd98 	bl	8d80 <Fifo_writeBlock>
-    971c:	e1a03000 	mov	r3, r0
-    9720:	e54b300f 	strb	r3, [fp, #-15]
-    9724:	e59f0044 	ldr	r0, [pc, #68]	; 9770 <.text+0x9770>
-    9728:	ebfffdee 	bl	8ee8 <Fifo_availableMemory>
-    972c:	e1a03000 	mov	r3, r0
-    9730:	e14b30be 	strh	r3, [fp, #-14]
-    9734:	e59f3038 	ldr	r3, [pc, #56]	; 9774 <.text+0x9774>
-    9738:	e1d330b0 	ldrh	r3, [r3]
-    973c:	e15b20fe 	ldrsh	r2, [fp, #-14]
-    9740:	e1a03803 	mov	r3, r3, lsl #16
-    9744:	e1a03843 	mov	r3, r3, asr #16
-    9748:	e1520003 	cmp	r2, r3
-    974c:	aa000002 	bge	975c <UART0_writeFifo+0x70>
-    9750:	e59f201c 	ldr	r2, [pc, #28]	; 9774 <.text+0x9774>
-    9754:	e15b30be 	ldrh	r3, [fp, #-14]
-    9758:	e1c230b0 	strh	r3, [r2]
-    975c:	e55b300f 	ldrb	r3, [fp, #-15]
-    9760:	e1a00003 	mov	r0, r3
-    9764:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    9768:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    976c:	e12fff1e 	bx	lr
-    9770:	400019fc 	strmid	r1, [r0], -ip
-    9774:	4000000c 	andmi	r0, r0, ip
-
-00009778 <UARTInitialize>:
-    9778:	e1a0c00d 	mov	ip, sp
-    977c:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    9780:	e24cb004 	sub	fp, ip, #4	; 0x4
-    9784:	e24dd008 	sub	sp, sp, #8	; 0x8
-    9788:	e50b0014 	str	r0, [fp, #-20]
-    978c:	eb000db3 	bl	ce60 <disableIRQ>
-    9790:	e1a02000 	mov	r2, r0
-    9794:	e59f3198 	ldr	r3, [pc, #408]	; 9934 <.text+0x9934>
-    9798:	e5832000 	str	r2, [r3]
-    979c:	e3a02903 	mov	r2, #49152	; 0xc000
-    97a0:	e282224e 	add	r2, r2, #-536870908	; 0xe0000004
-    97a4:	e3a03903 	mov	r3, #49152	; 0xc000
-    97a8:	e283324e 	add	r3, r3, #-536870908	; 0xe0000004
-    97ac:	e5933000 	ldr	r3, [r3]
-    97b0:	e3c33001 	bic	r3, r3, #1	; 0x1
-    97b4:	e5823000 	str	r3, [r2]
-    97b8:	e59f3174 	ldr	r3, [pc, #372]	; 9934 <.text+0x9934>
-    97bc:	e5933000 	ldr	r3, [r3]
-    97c0:	e1a00003 	mov	r0, r3
-    97c4:	eb000dca 	bl	cef4 <restoreIRQ>
-    97c8:	eb000da4 	bl	ce60 <disableIRQ>
-    97cc:	e1a02000 	mov	r2, r0
-    97d0:	e59f3160 	ldr	r3, [pc, #352]	; 9938 <.text+0x9938>
-    97d4:	e5832000 	str	r2, [r3]
-    97d8:	e3a02903 	mov	r2, #49152	; 0xc000
-    97dc:	e282224e 	add	r2, r2, #-536870908	; 0xe0000004
-    97e0:	e3a03903 	mov	r3, #49152	; 0xc000
-    97e4:	e283324e 	add	r3, r3, #-536870908	; 0xe0000004
-    97e8:	e5933000 	ldr	r3, [r3]
-    97ec:	e3c33002 	bic	r3, r3, #2	; 0x2
-    97f0:	e5823000 	str	r3, [r2]
-    97f4:	e59f313c 	ldr	r3, [pc, #316]	; 9938 <.text+0x9938>
-    97f8:	e5933000 	ldr	r3, [r3]
-    97fc:	e1a00003 	mov	r0, r3
-    9800:	eb000dbb 	bl	cef4 <restoreIRQ>
-    9804:	ebfffc1f 	bl	8888 <peripheralClockFrequency>
-    9808:	e1a02000 	mov	r2, r0
-    980c:	e51b3014 	ldr	r3, [fp, #-20]
-    9810:	e1a03203 	mov	r3, r3, lsl #4
-    9814:	e1a00002 	mov	r0, r2
-    9818:	e1a01003 	mov	r1, r3
-    981c:	eb002e52 	bl	1516c <____udivsi3_from_arm>
-    9820:	e1a03000 	mov	r3, r0
-    9824:	e50b3010 	str	r3, [fp, #-16]
-    9828:	e3a03903 	mov	r3, #49152	; 0xc000
-    982c:	e28332ce 	add	r3, r3, #-536870900	; 0xe000000c
-    9830:	e3a02083 	mov	r2, #131	; 0x83
-    9834:	e5832000 	str	r2, [r3]
-    9838:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    983c:	e2833903 	add	r3, r3, #49152	; 0xc000
-    9840:	e51b2010 	ldr	r2, [fp, #-16]
-    9844:	e20220ff 	and	r2, r2, #255	; 0xff
-    9848:	e5832000 	str	r2, [r3]
-    984c:	e3a02903 	mov	r2, #49152	; 0xc000
-    9850:	e282224e 	add	r2, r2, #-536870908	; 0xe0000004
-    9854:	e51b3010 	ldr	r3, [fp, #-16]
-    9858:	e1a03423 	mov	r3, r3, lsr #8
-    985c:	e20330ff 	and	r3, r3, #255	; 0xff
-    9860:	e5823000 	str	r3, [r2]
-    9864:	e3a02903 	mov	r2, #49152	; 0xc000
-    9868:	e28222ce 	add	r2, r2, #-536870900	; 0xe000000c
-    986c:	e3a03903 	mov	r3, #49152	; 0xc000
-    9870:	e28332ce 	add	r3, r3, #-536870900	; 0xe000000c
-    9874:	e5933000 	ldr	r3, [r3]
-    9878:	e3c33080 	bic	r3, r3, #128	; 0x80
-    987c:	e5823000 	str	r3, [r2]
-    9880:	e3a03903 	mov	r3, #49152	; 0xc000
-    9884:	e283328e 	add	r3, r3, #-536870904	; 0xe0000008
-    9888:	e3a02087 	mov	r2, #135	; 0x87
-    988c:	e5832000 	str	r2, [r3]
-    9890:	e59f00a4 	ldr	r0, [pc, #164]	; 993c <.text+0x993c>
-    9894:	e59f10a4 	ldr	r1, [pc, #164]	; 9940 <.text+0x9940>
-    9898:	e3a02c02 	mov	r2, #512	; 0x200
-    989c:	ebfffced 	bl	8c58 <Fifo_initialize>
-    98a0:	e59f009c 	ldr	r0, [pc, #156]	; 9944 <.text+0x9944>
-    98a4:	e59f109c 	ldr	r1, [pc, #156]	; 9948 <.text+0x9948>
-    98a8:	e3a02c02 	mov	r2, #512	; 0x200
-    98ac:	ebfffce9 	bl	8c58 <Fifo_initialize>
-    98b0:	eb000d6a 	bl	ce60 <disableIRQ>
-    98b4:	e1a02000 	mov	r2, r0
-    98b8:	e59f3074 	ldr	r3, [pc, #116]	; 9934 <.text+0x9934>
-    98bc:	e5832000 	str	r2, [r3]
-    98c0:	e3a02903 	mov	r2, #49152	; 0xc000
-    98c4:	e282224e 	add	r2, r2, #-536870908	; 0xe0000004
-    98c8:	e3a03903 	mov	r3, #49152	; 0xc000
-    98cc:	e283324e 	add	r3, r3, #-536870908	; 0xe0000004
-    98d0:	e5933000 	ldr	r3, [r3]
-    98d4:	e3833001 	orr	r3, r3, #1	; 0x1
-    98d8:	e5823000 	str	r3, [r2]
-    98dc:	e59f3050 	ldr	r3, [pc, #80]	; 9934 <.text+0x9934>
-    98e0:	e5933000 	ldr	r3, [r3]
-    98e4:	e1a00003 	mov	r0, r3
-    98e8:	eb000d81 	bl	cef4 <restoreIRQ>
-    98ec:	eb000d5b 	bl	ce60 <disableIRQ>
-    98f0:	e1a02000 	mov	r2, r0
-    98f4:	e59f303c 	ldr	r3, [pc, #60]	; 9938 <.text+0x9938>
-    98f8:	e5832000 	str	r2, [r3]
-    98fc:	e3a02903 	mov	r2, #49152	; 0xc000
-    9900:	e282224e 	add	r2, r2, #-536870908	; 0xe0000004
-    9904:	e3a03903 	mov	r3, #49152	; 0xc000
-    9908:	e283324e 	add	r3, r3, #-536870908	; 0xe0000004
-    990c:	e5933000 	ldr	r3, [r3]
-    9910:	e3833002 	orr	r3, r3, #2	; 0x2
-    9914:	e5823000 	str	r3, [r2]
-    9918:	e59f3018 	ldr	r3, [pc, #24]	; 9938 <.text+0x9938>
-    991c:	e5933000 	ldr	r3, [r3]
-    9920:	e1a00003 	mov	r0, r3
-    9924:	eb000d72 	bl	cef4 <restoreIRQ>
-    9928:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    992c:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    9930:	e12fff1e 	bx	lr
-    9934:	400019f4 	strmid	r1, [r0], -r4
-    9938:	400014f0 	strmid	r1, [r0], -r0
-    993c:	40001c18 	andmi	r1, r0, r8, lsl ip
-    9940:	40001a18 	andmi	r1, r0, r8, lsl sl
-    9944:	400019fc 	strmid	r1, [r0], -ip
-    9948:	40001c34 	andmi	r1, r0, r4, lsr ip
-
-0000994c <startAutoBaud>:
-    994c:	e1a0c00d 	mov	ip, sp
-    9950:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    9954:	e24cb004 	sub	fp, ip, #4	; 0x4
-    9958:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    995c:	e2833903 	add	r3, r3, #49152	; 0xc000
-    9960:	e2833020 	add	r3, r3, #32	; 0x20
-    9964:	e5933000 	ldr	r3, [r3]
-    9968:	e2033001 	and	r3, r3, #1	; 0x1
-    996c:	e20330ff 	and	r3, r3, #255	; 0xff
-    9970:	e3530000 	cmp	r3, #0	; 0x0
-    9974:	1a00000b 	bne	99a8 <startAutoBaud+0x5c>
-    9978:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    997c:	e2833903 	add	r3, r3, #49152	; 0xc000
-    9980:	e2833020 	add	r3, r3, #32	; 0x20
-    9984:	e3a02005 	mov	r2, #5	; 0x5
-    9988:	e5832000 	str	r2, [r3]
-    998c:	e3a02903 	mov	r2, #49152	; 0xc000
-    9990:	e282224e 	add	r2, r2, #-536870908	; 0xe0000004
-    9994:	e3a03903 	mov	r3, #49152	; 0xc000
-    9998:	e283324e 	add	r3, r3, #-536870908	; 0xe0000004
-    999c:	e5933000 	ldr	r3, [r3]
-    99a0:	e3833c03 	orr	r3, r3, #768	; 0x300
-    99a4:	e5823000 	str	r3, [r2]
-    99a8:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    99ac:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    99b0:	e12fff1e 	bx	lr
-
-000099b4 <UART0_rxFlush>:
-    99b4:	e1a0c00d 	mov	ip, sp
-    99b8:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    99bc:	e24cb004 	sub	fp, ip, #4	; 0x4
-    99c0:	e3a02903 	mov	r2, #49152	; 0xc000
-    99c4:	e282228e 	add	r2, r2, #-536870904	; 0xe0000008
-    99c8:	e3a03903 	mov	r3, #49152	; 0xc000
-    99cc:	e283328e 	add	r3, r3, #-536870904	; 0xe0000008
-    99d0:	e5933000 	ldr	r3, [r3]
-    99d4:	e3833002 	orr	r3, r3, #2	; 0x2
-    99d8:	e5823000 	str	r3, [r2]
-    99dc:	e59f000c 	ldr	r0, [pc, #12]	; 99f0 <.text+0x99f0>
-    99e0:	ebfffd5e 	bl	8f60 <Fifo_reset>
-    99e4:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    99e8:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    99ec:	e12fff1e 	bx	lr
-    99f0:	40001c18 	andmi	r1, r0, r8, lsl ip
-
-000099f4 <UART0_txFlush>:
-    99f4:	e1a0c00d 	mov	ip, sp
-    99f8:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    99fc:	e24cb004 	sub	fp, ip, #4	; 0x4
-    9a00:	e3a02903 	mov	r2, #49152	; 0xc000
-    9a04:	e282228e 	add	r2, r2, #-536870904	; 0xe0000008
-    9a08:	e3a03903 	mov	r3, #49152	; 0xc000
-    9a0c:	e283328e 	add	r3, r3, #-536870904	; 0xe0000008
-    9a10:	e5933000 	ldr	r3, [r3]
-    9a14:	e3833004 	orr	r3, r3, #4	; 0x4
-    9a18:	e5823000 	str	r3, [r2]
-    9a1c:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    9a20:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    9a24:	e12fff1e 	bx	lr
-
-00009a28 <UART0_txEmpty>:
-    9a28:	e1a0c00d 	mov	ip, sp
-    9a2c:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    9a30:	e24cb004 	sub	fp, ip, #4	; 0x4
-    9a34:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    9a38:	e2833903 	add	r3, r3, #49152	; 0xc000
-    9a3c:	e2833014 	add	r3, r3, #20	; 0x14
-    9a40:	e5933000 	ldr	r3, [r3]
-    9a44:	e2033060 	and	r3, r3, #96	; 0x60
-    9a48:	e3530060 	cmp	r3, #96	; 0x60
-    9a4c:	13a03000 	movne	r3, #0	; 0x0
-    9a50:	03a03001 	moveq	r3, #1	; 0x1
-    9a54:	e1a00003 	mov	r0, r3
-    9a58:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    9a5c:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    9a60:	e12fff1e 	bx	lr
-
-00009a64 <UARTWriteChar>:
-    9a64:	e1a0c00d 	mov	ip, sp
-    9a68:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    9a6c:	e24cb004 	sub	fp, ip, #4	; 0x4
-    9a70:	e24dd004 	sub	sp, sp, #4	; 0x4
-    9a74:	e1a03000 	mov	r3, r0
-    9a78:	e54b3010 	strb	r3, [fp, #-16]
-    9a7c:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    9a80:	e2833903 	add	r3, r3, #49152	; 0xc000
-    9a84:	e2833014 	add	r3, r3, #20	; 0x14
-    9a88:	e5933000 	ldr	r3, [r3]
-    9a8c:	e2033020 	and	r3, r3, #32	; 0x20
-    9a90:	e3530000 	cmp	r3, #0	; 0x0
-    9a94:	0afffff8 	beq	9a7c <UARTWriteChar+0x18>
-    9a98:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    9a9c:	e2833903 	add	r3, r3, #49152	; 0xc000
-    9aa0:	e55b2010 	ldrb	r2, [fp, #-16]
-    9aa4:	e5832000 	str	r2, [r3]
-    9aa8:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    9aac:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    9ab0:	e12fff1e 	bx	lr
-
-00009ab4 <UARTReadChar>:
-    9ab4:	e1a0c00d 	mov	ip, sp
-    9ab8:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    9abc:	e24cb004 	sub	fp, ip, #4	; 0x4
-    9ac0:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    9ac4:	e2833903 	add	r3, r3, #49152	; 0xc000
-    9ac8:	e2833014 	add	r3, r3, #20	; 0x14
-    9acc:	e5933000 	ldr	r3, [r3]
-    9ad0:	e2033001 	and	r3, r3, #1	; 0x1
-    9ad4:	e3530000 	cmp	r3, #0	; 0x0
-    9ad8:	0afffff8 	beq	9ac0 <UARTReadChar+0xc>
-    9adc:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    9ae0:	e2833903 	add	r3, r3, #49152	; 0xc000
-    9ae4:	e5933000 	ldr	r3, [r3]
-    9ae8:	e20330ff 	and	r3, r3, #255	; 0xff
-    9aec:	e1a00003 	mov	r0, r3
-    9af0:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    9af4:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    9af8:	e12fff1e 	bx	lr
-
-00009afc <__putchar>:
-    9afc:	e1a0c00d 	mov	ip, sp
-    9b00:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    9b04:	e24cb004 	sub	fp, ip, #4	; 0x4
-    9b08:	e24dd004 	sub	sp, sp, #4	; 0x4
-    9b0c:	e50b0010 	str	r0, [fp, #-16]
-    9b10:	e51b3010 	ldr	r3, [fp, #-16]
-    9b14:	e353000a 	cmp	r3, #10	; 0xa
-    9b18:	1a000001 	bne	9b24 <__putchar+0x28>
-    9b1c:	e3a0000d 	mov	r0, #13	; 0xd
-    9b20:	ebffffcf 	bl	9a64 <UARTWriteChar>
-    9b24:	e51b3010 	ldr	r3, [fp, #-16]
-    9b28:	e20330ff 	and	r3, r3, #255	; 0xff
-    9b2c:	e1a00003 	mov	r0, r3
-    9b30:	ebffffcb 	bl	9a64 <UARTWriteChar>
-    9b34:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    9b38:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    9b3c:	e12fff1e 	bx	lr
-
-00009b40 <UART_send>:
-    9b40:	e1a0c00d 	mov	ip, sp
-    9b44:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    9b48:	e24cb004 	sub	fp, ip, #4	; 0x4
-    9b4c:	e24dd00c 	sub	sp, sp, #12	; 0xc
-    9b50:	e50b0014 	str	r0, [fp, #-20]
-    9b54:	e1a03001 	mov	r3, r1
-    9b58:	e54b3018 	strb	r3, [fp, #-24]
-    9b5c:	e3a03000 	mov	r3, #0	; 0x0
-    9b60:	e54b300d 	strb	r3, [fp, #-13]
-    9b64:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    9b68:	e2833903 	add	r3, r3, #49152	; 0xc000
-    9b6c:	e2833014 	add	r3, r3, #20	; 0x14
-    9b70:	e5933000 	ldr	r3, [r3]
-    9b74:	e2033020 	and	r3, r3, #32	; 0x20
-    9b78:	e3530000 	cmp	r3, #0	; 0x0
-    9b7c:	0afffff8 	beq	9b64 <UART_send+0x24>
-    9b80:	ea000014 	b	9bd8 <UART_send+0x98>
-    9b84:	e3a0220e 	mov	r2, #-536870912	; 0xe0000000
-    9b88:	e2822903 	add	r2, r2, #49152	; 0xc000
-    9b8c:	e55b300d 	ldrb	r3, [fp, #-13]
-    9b90:	e1a01003 	mov	r1, r3
-    9b94:	e51b3014 	ldr	r3, [fp, #-20]
-    9b98:	e0813003 	add	r3, r1, r3
-    9b9c:	e5d33000 	ldrb	r3, [r3]
-    9ba0:	e5823000 	str	r3, [r2]
-    9ba4:	e55b300d 	ldrb	r3, [fp, #-13]
-    9ba8:	e2833001 	add	r3, r3, #1	; 0x1
-    9bac:	e54b300d 	strb	r3, [fp, #-13]
-    9bb0:	e55b300d 	ldrb	r3, [fp, #-13]
-    9bb4:	e353000f 	cmp	r3, #15	; 0xf
-    9bb8:	9a000006 	bls	9bd8 <UART_send+0x98>
-    9bbc:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    9bc0:	e2833903 	add	r3, r3, #49152	; 0xc000
-    9bc4:	e2833014 	add	r3, r3, #20	; 0x14
-    9bc8:	e5933000 	ldr	r3, [r3]
-    9bcc:	e2033020 	and	r3, r3, #32	; 0x20
-    9bd0:	e3530000 	cmp	r3, #0	; 0x0
-    9bd4:	0afffff8 	beq	9bbc <UART_send+0x7c>
-    9bd8:	e55b3018 	ldrb	r3, [fp, #-24]
-    9bdc:	e2433001 	sub	r3, r3, #1	; 0x1
-    9be0:	e54b3018 	strb	r3, [fp, #-24]
-    9be4:	e55b3018 	ldrb	r3, [fp, #-24]
-    9be8:	e35300ff 	cmp	r3, #255	; 0xff
-    9bec:	1affffe4 	bne	9b84 <UART_send+0x44>
-    9bf0:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    9bf4:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    9bf8:	e12fff1e 	bx	lr
-
-00009bfc <UART_send_ringbuffer>:
-    9bfc:	e1a0c00d 	mov	ip, sp
-    9c00:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    9c04:	e24cb004 	sub	fp, ip, #4	; 0x4
-    9c08:	e24dd004 	sub	sp, sp, #4	; 0x4
-    9c0c:	e59f304c 	ldr	r3, [pc, #76]	; 9c60 <.text+0x9c60>
-    9c10:	e5d33000 	ldrb	r3, [r3]
-    9c14:	e20330ff 	and	r3, r3, #255	; 0xff
-    9c18:	e3530000 	cmp	r3, #0	; 0x0
-    9c1c:	1a00000c 	bne	9c54 <UART_send_ringbuffer+0x58>
-    9c20:	e24b300d 	sub	r3, fp, #13	; 0xd
-    9c24:	e59f0038 	ldr	r0, [pc, #56]	; 9c64 <.text+0x9c64>
-    9c28:	e1a01003 	mov	r1, r3
-    9c2c:	ebfffc87 	bl	8e50 <Fifo_readByte>
-    9c30:	e1a03000 	mov	r3, r0
-    9c34:	e3530000 	cmp	r3, #0	; 0x0
-    9c38:	0a000005 	beq	9c54 <UART_send_ringbuffer+0x58>
-    9c3c:	e59f201c 	ldr	r2, [pc, #28]	; 9c60 <.text+0x9c60>
-    9c40:	e3a03001 	mov	r3, #1	; 0x1
-    9c44:	e5c23000 	strb	r3, [r2]
-    9c48:	e55b300d 	ldrb	r3, [fp, #-13]
-    9c4c:	e1a00003 	mov	r0, r3
-    9c50:	ebffff83 	bl	9a64 <UARTWriteChar>
-    9c54:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    9c58:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    9c5c:	e12fff1e 	bx	lr
-    9c60:	400008cc 	andmi	r0, r0, ip, asr #17
-    9c64:	400019fc 	strmid	r1, [r0], -ip
-
-00009c68 <crc_update>:
-    9c68:	e1a0c00d 	mov	ip, sp
-    9c6c:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    9c70:	e24cb004 	sub	fp, ip, #4	; 0x4
-    9c74:	e24dd008 	sub	sp, sp, #8	; 0x8
-    9c78:	e1a03000 	mov	r3, r0
-    9c7c:	e1a02001 	mov	r2, r1
-    9c80:	e14b31b0 	strh	r3, [fp, #-16]
-    9c84:	e1a03002 	mov	r3, r2
-    9c88:	e54b3014 	strb	r3, [fp, #-20]
-    9c8c:	e15b31b0 	ldrh	r3, [fp, #-16]
-    9c90:	e20330ff 	and	r3, r3, #255	; 0xff
-    9c94:	e20330ff 	and	r3, r3, #255	; 0xff
-    9c98:	e55b2014 	ldrb	r2, [fp, #-20]
-    9c9c:	e1a01003 	mov	r1, r3
-    9ca0:	e1a03002 	mov	r3, r2
-    9ca4:	e0213003 	eor	r3, r1, r3
-    9ca8:	e20330ff 	and	r3, r3, #255	; 0xff
-    9cac:	e54b3014 	strb	r3, [fp, #-20]
-    9cb0:	e55b3014 	ldrb	r3, [fp, #-20]
-    9cb4:	e1a03203 	mov	r3, r3, lsl #4
-    9cb8:	e20330ff 	and	r3, r3, #255	; 0xff
-    9cbc:	e55b2014 	ldrb	r2, [fp, #-20]
-    9cc0:	e1a01003 	mov	r1, r3
-    9cc4:	e1a03002 	mov	r3, r2
-    9cc8:	e0213003 	eor	r3, r1, r3
-    9ccc:	e20330ff 	and	r3, r3, #255	; 0xff
-    9cd0:	e54b3014 	strb	r3, [fp, #-20]
-    9cd4:	e55b3014 	ldrb	r3, [fp, #-20]
-    9cd8:	e1a03403 	mov	r3, r3, lsl #8
-    9cdc:	e1a03803 	mov	r3, r3, lsl #16
-    9ce0:	e1a02823 	mov	r2, r3, lsr #16
-    9ce4:	e15b31b0 	ldrh	r3, [fp, #-16]
-    9ce8:	e1a03423 	mov	r3, r3, lsr #8
-    9cec:	e1a03803 	mov	r3, r3, lsl #16
-    9cf0:	e1a03823 	mov	r3, r3, lsr #16
-    9cf4:	e1a03803 	mov	r3, r3, lsl #16
-    9cf8:	e1a03823 	mov	r3, r3, lsr #16
-    9cfc:	e20330ff 	and	r3, r3, #255	; 0xff
-    9d00:	e1823003 	orr	r3, r2, r3
-    9d04:	e1a03803 	mov	r3, r3, lsl #16
-    9d08:	e1a02823 	mov	r2, r3, lsr #16
-    9d0c:	e55b3014 	ldrb	r3, [fp, #-20]
-    9d10:	e1a03223 	mov	r3, r3, lsr #4
-    9d14:	e20330ff 	and	r3, r3, #255	; 0xff
-    9d18:	e0223003 	eor	r3, r2, r3
-    9d1c:	e1a03803 	mov	r3, r3, lsl #16
-    9d20:	e1a02823 	mov	r2, r3, lsr #16
-    9d24:	e55b3014 	ldrb	r3, [fp, #-20]
-    9d28:	e1a03183 	mov	r3, r3, lsl #3
-    9d2c:	e1a03803 	mov	r3, r3, lsl #16
-    9d30:	e1a03823 	mov	r3, r3, lsr #16
-    9d34:	e0223003 	eor	r3, r2, r3
-    9d38:	e1a03803 	mov	r3, r3, lsl #16
-    9d3c:	e1a03823 	mov	r3, r3, lsr #16
-    9d40:	e1a03803 	mov	r3, r3, lsl #16
-    9d44:	e1a03823 	mov	r3, r3, lsr #16
-    9d48:	e1a00003 	mov	r0, r3
-    9d4c:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    9d50:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    9d54:	e12fff1e 	bx	lr
-
-00009d58 <crc16>:
-    9d58:	e1a0c00d 	mov	ip, sp
-    9d5c:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    9d60:	e24cb004 	sub	fp, ip, #4	; 0x4
-    9d64:	e24dd014 	sub	sp, sp, #20	; 0x14
-    9d68:	e50b0018 	str	r0, [fp, #-24]
-    9d6c:	e1a03001 	mov	r3, r1
-    9d70:	e14b31bc 	strh	r3, [fp, #-28]
-    9d74:	e14b22b0 	strh	r2, [fp, #-32]
-    9d78:	e51b3018 	ldr	r3, [fp, #-24]
-    9d7c:	e50b3014 	str	r3, [fp, #-20]
-    9d80:	e3a03000 	mov	r3, #0	; 0x0
-    9d84:	e50b3010 	str	r3, [fp, #-16]
-    9d88:	ea00000d 	b	9dc4 <crc16+0x6c>
-    9d8c:	e15b22b0 	ldrh	r2, [fp, #-32]
-    9d90:	e51b3014 	ldr	r3, [fp, #-20]
-    9d94:	e5d33000 	ldrb	r3, [r3]
-    9d98:	e1a00002 	mov	r0, r2
-    9d9c:	e1a01003 	mov	r1, r3
-    9da0:	ebffffb0 	bl	9c68 <crc_update>
-    9da4:	e1a03000 	mov	r3, r0
-    9da8:	e14b32b0 	strh	r3, [fp, #-32]
-    9dac:	e51b3014 	ldr	r3, [fp, #-20]
-    9db0:	e2833001 	add	r3, r3, #1	; 0x1
-    9db4:	e50b3014 	str	r3, [fp, #-20]
-    9db8:	e51b3010 	ldr	r3, [fp, #-16]
-    9dbc:	e2833001 	add	r3, r3, #1	; 0x1
-    9dc0:	e50b3010 	str	r3, [fp, #-16]
-    9dc4:	e15b21bc 	ldrh	r2, [fp, #-28]
-    9dc8:	e51b3010 	ldr	r3, [fp, #-16]
-    9dcc:	e1520003 	cmp	r2, r3
-    9dd0:	caffffed 	bgt	9d8c <crc16+0x34>
-    9dd4:	e15b32b0 	ldrh	r3, [fp, #-32]
-    9dd8:	e1a00003 	mov	r0, r3
-    9ddc:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    9de0:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    9de4:	e12fff1e 	bx	lr
-
-00009de8 <parse_VELNED>:
-    9de8:	e1a0c00d 	mov	ip, sp
-    9dec:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    9df0:	e24cb004 	sub	fp, ip, #4	; 0x4
-    9df4:	e24dd008 	sub	sp, sp, #8	; 0x8
-    9df8:	e1a03000 	mov	r3, r0
-    9dfc:	e1a02001 	mov	r2, r1
-    9e00:	e54b3010 	strb	r3, [fp, #-16]
-    9e04:	e1a03002 	mov	r3, r2
-    9e08:	e54b3014 	strb	r3, [fp, #-20]
-    9e0c:	e55b3014 	ldrb	r3, [fp, #-20]
-    9e10:	e3530000 	cmp	r3, #0	; 0x0
-    9e14:	0a000003 	beq	9e28 <parse_VELNED+0x40>
-    9e18:	e59f3390 	ldr	r3, [pc, #912]	; a1b0 <.text+0xa1b0>
-    9e1c:	e3a02000 	mov	r2, #0	; 0x0
-    9e20:	e5c32000 	strb	r2, [r3]
-    9e24:	ea0000de 	b	a1a4 <parse_VELNED+0x3bc>
-    9e28:	e59f3380 	ldr	r3, [pc, #896]	; a1b0 <.text+0xa1b0>
-    9e2c:	e5d33000 	ldrb	r3, [r3]
-    9e30:	e3530000 	cmp	r3, #0	; 0x0
-    9e34:	1a000003 	bne	9e48 <parse_VELNED+0x60>
-    9e38:	e55b2010 	ldrb	r2, [fp, #-16]
-    9e3c:	e59f3370 	ldr	r3, [pc, #880]	; a1b4 <.text+0xa1b4>
-    9e40:	e5832000 	str	r2, [r3]
-    9e44:	ea0000d0 	b	a18c <parse_VELNED+0x3a4>
-    9e48:	e59f3360 	ldr	r3, [pc, #864]	; a1b0 <.text+0xa1b0>
-    9e4c:	e5d33000 	ldrb	r3, [r3]
-    9e50:	e3530001 	cmp	r3, #1	; 0x1
-    9e54:	1a000007 	bne	9e78 <parse_VELNED+0x90>
-    9e58:	e55b3010 	ldrb	r3, [fp, #-16]
-    9e5c:	e1a02403 	mov	r2, r3, lsl #8
-    9e60:	e59f334c 	ldr	r3, [pc, #844]	; a1b4 <.text+0xa1b4>
-    9e64:	e5933000 	ldr	r3, [r3]
-    9e68:	e0822003 	add	r2, r2, r3
-    9e6c:	e59f3340 	ldr	r3, [pc, #832]	; a1b4 <.text+0xa1b4>
-    9e70:	e5832000 	str	r2, [r3]
-    9e74:	ea0000c4 	b	a18c <parse_VELNED+0x3a4>
-    9e78:	e59f3330 	ldr	r3, [pc, #816]	; a1b0 <.text+0xa1b0>
-    9e7c:	e5d33000 	ldrb	r3, [r3]
-    9e80:	e3530002 	cmp	r3, #2	; 0x2
-    9e84:	1a000007 	bne	9ea8 <parse_VELNED+0xc0>
-    9e88:	e55b3010 	ldrb	r3, [fp, #-16]
-    9e8c:	e1a02803 	mov	r2, r3, lsl #16
-    9e90:	e59f331c 	ldr	r3, [pc, #796]	; a1b4 <.text+0xa1b4>
-    9e94:	e5933000 	ldr	r3, [r3]
-    9e98:	e0822003 	add	r2, r2, r3
-    9e9c:	e59f3310 	ldr	r3, [pc, #784]	; a1b4 <.text+0xa1b4>
-    9ea0:	e5832000 	str	r2, [r3]
-    9ea4:	ea0000b8 	b	a18c <parse_VELNED+0x3a4>
-    9ea8:	e59f3300 	ldr	r3, [pc, #768]	; a1b0 <.text+0xa1b0>
-    9eac:	e5d33000 	ldrb	r3, [r3]
-    9eb0:	e3530003 	cmp	r3, #3	; 0x3
-    9eb4:	1a000007 	bne	9ed8 <parse_VELNED+0xf0>
-    9eb8:	e55b3010 	ldrb	r3, [fp, #-16]
-    9ebc:	e1a02c03 	mov	r2, r3, lsl #24
-    9ec0:	e59f32ec 	ldr	r3, [pc, #748]	; a1b4 <.text+0xa1b4>
-    9ec4:	e5933000 	ldr	r3, [r3]
-    9ec8:	e0822003 	add	r2, r2, r3
-    9ecc:	e59f32e0 	ldr	r3, [pc, #736]	; a1b4 <.text+0xa1b4>
-    9ed0:	e5832000 	str	r2, [r3]
-    9ed4:	ea0000ac 	b	a18c <parse_VELNED+0x3a4>
-    9ed8:	e59f32d0 	ldr	r3, [pc, #720]	; a1b0 <.text+0xa1b0>
-    9edc:	e5d33000 	ldrb	r3, [r3]
-    9ee0:	e3530004 	cmp	r3, #4	; 0x4
-    9ee4:	1a000003 	bne	9ef8 <parse_VELNED+0x110>
-    9ee8:	e55b2010 	ldrb	r2, [fp, #-16]
-    9eec:	e59f32c4 	ldr	r3, [pc, #708]	; a1b8 <.text+0xa1b8>
-    9ef0:	e5832000 	str	r2, [r3]
-    9ef4:	ea0000a4 	b	a18c <parse_VELNED+0x3a4>
-    9ef8:	e59f32b0 	ldr	r3, [pc, #688]	; a1b0 <.text+0xa1b0>
-    9efc:	e5d33000 	ldrb	r3, [r3]
-    9f00:	e3530005 	cmp	r3, #5	; 0x5
-    9f04:	1a000007 	bne	9f28 <parse_VELNED+0x140>
-    9f08:	e55b3010 	ldrb	r3, [fp, #-16]
-    9f0c:	e1a02403 	mov	r2, r3, lsl #8
-    9f10:	e59f32a0 	ldr	r3, [pc, #672]	; a1b8 <.text+0xa1b8>
-    9f14:	e5933000 	ldr	r3, [r3]
-    9f18:	e0822003 	add	r2, r2, r3
-    9f1c:	e59f3294 	ldr	r3, [pc, #660]	; a1b8 <.text+0xa1b8>
-    9f20:	e5832000 	str	r2, [r3]
-    9f24:	ea000098 	b	a18c <parse_VELNED+0x3a4>
-    9f28:	e59f3280 	ldr	r3, [pc, #640]	; a1b0 <.text+0xa1b0>
-    9f2c:	e5d33000 	ldrb	r3, [r3]
-    9f30:	e3530006 	cmp	r3, #6	; 0x6
-    9f34:	1a000007 	bne	9f58 <parse_VELNED+0x170>
-    9f38:	e55b3010 	ldrb	r3, [fp, #-16]
-    9f3c:	e1a02803 	mov	r2, r3, lsl #16
-    9f40:	e59f3270 	ldr	r3, [pc, #624]	; a1b8 <.text+0xa1b8>
-    9f44:	e5933000 	ldr	r3, [r3]
-    9f48:	e0822003 	add	r2, r2, r3
-    9f4c:	e59f3264 	ldr	r3, [pc, #612]	; a1b8 <.text+0xa1b8>
-    9f50:	e5832000 	str	r2, [r3]
-    9f54:	ea00008c 	b	a18c <parse_VELNED+0x3a4>
-    9f58:	e59f3250 	ldr	r3, [pc, #592]	; a1b0 <.text+0xa1b0>
-    9f5c:	e5d33000 	ldrb	r3, [r3]
-    9f60:	e3530007 	cmp	r3, #7	; 0x7
-    9f64:	1a000007 	bne	9f88 <parse_VELNED+0x1a0>
-    9f68:	e55b3010 	ldrb	r3, [fp, #-16]
-    9f6c:	e1a02c03 	mov	r2, r3, lsl #24
-    9f70:	e59f3240 	ldr	r3, [pc, #576]	; a1b8 <.text+0xa1b8>
-    9f74:	e5933000 	ldr	r3, [r3]
-    9f78:	e0822003 	add	r2, r2, r3
-    9f7c:	e59f3234 	ldr	r3, [pc, #564]	; a1b8 <.text+0xa1b8>
-    9f80:	e5832000 	str	r2, [r3]
-    9f84:	ea000080 	b	a18c <parse_VELNED+0x3a4>
-    9f88:	e59f3220 	ldr	r3, [pc, #544]	; a1b0 <.text+0xa1b0>
-    9f8c:	e5d33000 	ldrb	r3, [r3]
-    9f90:	e3530014 	cmp	r3, #20	; 0x14
-    9f94:	1a000003 	bne	9fa8 <parse_VELNED+0x1c0>
-    9f98:	e55b2010 	ldrb	r2, [fp, #-16]
-    9f9c:	e59f3218 	ldr	r3, [pc, #536]	; a1bc <.text+0xa1bc>
-    9fa0:	e5832000 	str	r2, [r3]
-    9fa4:	ea000078 	b	a18c <parse_VELNED+0x3a4>
-    9fa8:	e59f3200 	ldr	r3, [pc, #512]	; a1b0 <.text+0xa1b0>
-    9fac:	e5d33000 	ldrb	r3, [r3]
-    9fb0:	e3530015 	cmp	r3, #21	; 0x15
-    9fb4:	1a000007 	bne	9fd8 <parse_VELNED+0x1f0>
-    9fb8:	e55b3010 	ldrb	r3, [fp, #-16]
-    9fbc:	e1a02403 	mov	r2, r3, lsl #8
-    9fc0:	e59f31f4 	ldr	r3, [pc, #500]	; a1bc <.text+0xa1bc>
-    9fc4:	e5933000 	ldr	r3, [r3]
-    9fc8:	e0822003 	add	r2, r2, r3
-    9fcc:	e59f31e8 	ldr	r3, [pc, #488]	; a1bc <.text+0xa1bc>
-    9fd0:	e5832000 	str	r2, [r3]
-    9fd4:	ea00006c 	b	a18c <parse_VELNED+0x3a4>
-    9fd8:	e59f31d0 	ldr	r3, [pc, #464]	; a1b0 <.text+0xa1b0>
-    9fdc:	e5d33000 	ldrb	r3, [r3]
-    9fe0:	e3530016 	cmp	r3, #22	; 0x16
-    9fe4:	1a000007 	bne	a008 <parse_VELNED+0x220>
-    9fe8:	e55b3010 	ldrb	r3, [fp, #-16]
-    9fec:	e1a02803 	mov	r2, r3, lsl #16
-    9ff0:	e59f31c4 	ldr	r3, [pc, #452]	; a1bc <.text+0xa1bc>
-    9ff4:	e5933000 	ldr	r3, [r3]
-    9ff8:	e0822003 	add	r2, r2, r3
-    9ffc:	e59f31b8 	ldr	r3, [pc, #440]	; a1bc <.text+0xa1bc>
-    a000:	e5832000 	str	r2, [r3]
-    a004:	ea000060 	b	a18c <parse_VELNED+0x3a4>
-    a008:	e59f31a0 	ldr	r3, [pc, #416]	; a1b0 <.text+0xa1b0>
-    a00c:	e5d33000 	ldrb	r3, [r3]
-    a010:	e3530017 	cmp	r3, #23	; 0x17
-    a014:	1a000007 	bne	a038 <parse_VELNED+0x250>
-    a018:	e55b3010 	ldrb	r3, [fp, #-16]
-    a01c:	e1a02c03 	mov	r2, r3, lsl #24
-    a020:	e59f3194 	ldr	r3, [pc, #404]	; a1bc <.text+0xa1bc>
-    a024:	e5933000 	ldr	r3, [r3]
-    a028:	e0822003 	add	r2, r2, r3
-    a02c:	e59f3188 	ldr	r3, [pc, #392]	; a1bc <.text+0xa1bc>
-    a030:	e5832000 	str	r2, [r3]
-    a034:	ea000054 	b	a18c <parse_VELNED+0x3a4>
-    a038:	e59f3170 	ldr	r3, [pc, #368]	; a1b0 <.text+0xa1b0>
-    a03c:	e5d33000 	ldrb	r3, [r3]
-    a040:	e3530018 	cmp	r3, #24	; 0x18
-    a044:	1a000003 	bne	a058 <parse_VELNED+0x270>
-    a048:	e55b2010 	ldrb	r2, [fp, #-16]
-    a04c:	e59f316c 	ldr	r3, [pc, #364]	; a1c0 <.text+0xa1c0>
-    a050:	e5832000 	str	r2, [r3]
-    a054:	ea00004c 	b	a18c <parse_VELNED+0x3a4>
-    a058:	e59f3150 	ldr	r3, [pc, #336]	; a1b0 <.text+0xa1b0>
-    a05c:	e5d33000 	ldrb	r3, [r3]
-    a060:	e3530019 	cmp	r3, #25	; 0x19
-    a064:	1a000008 	bne	a08c <parse_VELNED+0x2a4>
-    a068:	e55b3010 	ldrb	r3, [fp, #-16]
-    a06c:	e1a03403 	mov	r3, r3, lsl #8
-    a070:	e1a02003 	mov	r2, r3
-    a074:	e59f3144 	ldr	r3, [pc, #324]	; a1c0 <.text+0xa1c0>
-    a078:	e5933000 	ldr	r3, [r3]
-    a07c:	e0822003 	add	r2, r2, r3
-    a080:	e59f3138 	ldr	r3, [pc, #312]	; a1c0 <.text+0xa1c0>
-    a084:	e5832000 	str	r2, [r3]
-    a088:	ea00003f 	b	a18c <parse_VELNED+0x3a4>
-    a08c:	e59f311c 	ldr	r3, [pc, #284]	; a1b0 <.text+0xa1b0>
-    a090:	e5d33000 	ldrb	r3, [r3]
-    a094:	e353001a 	cmp	r3, #26	; 0x1a
-    a098:	1a000008 	bne	a0c0 <parse_VELNED+0x2d8>
-    a09c:	e55b3010 	ldrb	r3, [fp, #-16]
-    a0a0:	e1a03803 	mov	r3, r3, lsl #16
-    a0a4:	e1a02003 	mov	r2, r3
-    a0a8:	e59f3110 	ldr	r3, [pc, #272]	; a1c0 <.text+0xa1c0>
-    a0ac:	e5933000 	ldr	r3, [r3]
-    a0b0:	e0822003 	add	r2, r2, r3
-    a0b4:	e59f3104 	ldr	r3, [pc, #260]	; a1c0 <.text+0xa1c0>
-    a0b8:	e5832000 	str	r2, [r3]
-    a0bc:	ea000032 	b	a18c <parse_VELNED+0x3a4>
-    a0c0:	e59f30e8 	ldr	r3, [pc, #232]	; a1b0 <.text+0xa1b0>
-    a0c4:	e5d33000 	ldrb	r3, [r3]
-    a0c8:	e353001b 	cmp	r3, #27	; 0x1b
-    a0cc:	1a00002e 	bne	a18c <parse_VELNED+0x3a4>
-    a0d0:	e55b3010 	ldrb	r3, [fp, #-16]
-    a0d4:	e1a03c03 	mov	r3, r3, lsl #24
-    a0d8:	e1a02003 	mov	r2, r3
-    a0dc:	e59f30dc 	ldr	r3, [pc, #220]	; a1c0 <.text+0xa1c0>
-    a0e0:	e5933000 	ldr	r3, [r3]
-    a0e4:	e0822003 	add	r2, r2, r3
-    a0e8:	e59f30d0 	ldr	r3, [pc, #208]	; a1c0 <.text+0xa1c0>
-    a0ec:	e5832000 	str	r2, [r3]
-    a0f0:	e59f30c0 	ldr	r3, [pc, #192]	; a1b8 <.text+0xa1b8>
-    a0f4:	e5932000 	ldr	r2, [r3]
-    a0f8:	e1a03002 	mov	r3, r2
-    a0fc:	e1a03103 	mov	r3, r3, lsl #2
-    a100:	e0833002 	add	r3, r3, r2
-    a104:	e1a03083 	mov	r3, r3, lsl #1
-    a108:	e1a02003 	mov	r2, r3
-    a10c:	e59f30b0 	ldr	r3, [pc, #176]	; a1c4 <.text+0xa1c4>
-    a110:	e583200c 	str	r2, [r3, #12]
-    a114:	e59f3098 	ldr	r3, [pc, #152]	; a1b4 <.text+0xa1b4>
-    a118:	e5932000 	ldr	r2, [r3]
-    a11c:	e1a03002 	mov	r3, r2
-    a120:	e1a03103 	mov	r3, r3, lsl #2
-    a124:	e0833002 	add	r3, r3, r2
-    a128:	e1a03083 	mov	r3, r3, lsl #1
-    a12c:	e1a02003 	mov	r2, r3
-    a130:	e59f308c 	ldr	r3, [pc, #140]	; a1c4 <.text+0xa1c4>
-    a134:	e5832010 	str	r2, [r3, #16]
-    a138:	e59f307c 	ldr	r3, [pc, #124]	; a1bc <.text+0xa1bc>
-    a13c:	e5931000 	ldr	r1, [r3]
-    a140:	e59f3080 	ldr	r3, [pc, #128]	; a1c8 <.text+0xa1c8>
-    a144:	e0c32391 	smull	r2, r3, r1, r3
-    a148:	e1a022c3 	mov	r2, r3, asr #5
-    a14c:	e1a03fc1 	mov	r3, r1, asr #31
-    a150:	e0632002 	rsb	r2, r3, r2
-    a154:	e59f3068 	ldr	r3, [pc, #104]	; a1c4 <.text+0xa1c4>
-    a158:	e5832014 	str	r2, [r3, #20]
-    a15c:	e59f305c 	ldr	r3, [pc, #92]	; a1c0 <.text+0xa1c0>
-    a160:	e5932000 	ldr	r2, [r3]
-    a164:	e1a03002 	mov	r3, r2
-    a168:	e1a03103 	mov	r3, r3, lsl #2
-    a16c:	e0833002 	add	r3, r3, r2
-    a170:	e1a03083 	mov	r3, r3, lsl #1
-    a174:	e1a02003 	mov	r2, r3
-    a178:	e59f3044 	ldr	r3, [pc, #68]	; a1c4 <.text+0xa1c4>
-    a17c:	e5832020 	str	r2, [r3, #32]
-    a180:	e59f2044 	ldr	r2, [pc, #68]	; a1cc <.text+0xa1cc>
-    a184:	e3a03001 	mov	r3, #1	; 0x1
-    a188:	e5823000 	str	r3, [r2]
-    a18c:	e59f301c 	ldr	r3, [pc, #28]	; a1b0 <.text+0xa1b0>
-    a190:	e5d33000 	ldrb	r3, [r3]
-    a194:	e2833001 	add	r3, r3, #1	; 0x1
-    a198:	e20330ff 	and	r3, r3, #255	; 0xff
-    a19c:	e59f200c 	ldr	r2, [pc, #12]	; a1b0 <.text+0xa1b0>
-    a1a0:	e5c23000 	strb	r3, [r2]
-    a1a4:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    a1a8:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    a1ac:	e12fff1e 	bx	lr
-    a1b0:	40000918 	andmi	r0, r0, r8, lsl r9
-    a1b4:	40000910 	andmi	r0, r0, r0, lsl r9
-    a1b8:	40000914 	andmi	r0, r0, r4, lsl r9
-    a1bc:	4000090c 	andmi	r0, r0, ip, lsl #18
-    a1c0:	40000908 	andmi	r0, r0, r8, lsl #18
-    a1c4:	40000f64 	andmi	r0, r0, r4, ror #30
-    a1c8:	51eb851f 	mvnpl	r8, pc, lsl r5
-    a1cc:	4000085c 	andmi	r0, r0, ip, asr r8
-
-0000a1d0 <parse_POSLLH>:
-    a1d0:	e1a0c00d 	mov	ip, sp
-    a1d4:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    a1d8:	e24cb004 	sub	fp, ip, #4	; 0x4
-    a1dc:	e24dd008 	sub	sp, sp, #8	; 0x8
-    a1e0:	e1a03000 	mov	r3, r0
-    a1e4:	e1a02001 	mov	r2, r1
-    a1e8:	e54b3010 	strb	r3, [fp, #-16]
-    a1ec:	e1a03002 	mov	r3, r2
-    a1f0:	e54b3014 	strb	r3, [fp, #-20]
-    a1f4:	e55b3014 	ldrb	r3, [fp, #-20]
-    a1f8:	e3530000 	cmp	r3, #0	; 0x0
-    a1fc:	0a000003 	beq	a210 <parse_POSLLH+0x40>
-    a200:	e59f3400 	ldr	r3, [pc, #1024]	; a608 <.text+0xa608>
-    a204:	e3a02000 	mov	r2, #0	; 0x0
-    a208:	e5c32000 	strb	r2, [r3]
-    a20c:	ea0000fa 	b	a5fc <parse_POSLLH+0x42c>
-    a210:	e59f33f0 	ldr	r3, [pc, #1008]	; a608 <.text+0xa608>
-    a214:	e5d33000 	ldrb	r3, [r3]
-    a218:	e3530000 	cmp	r3, #0	; 0x0
-    a21c:	1a000003 	bne	a230 <parse_POSLLH+0x60>
-    a220:	e55b2010 	ldrb	r2, [fp, #-16]
-    a224:	e59f33e0 	ldr	r3, [pc, #992]	; a60c <.text+0xa60c>
-    a228:	e5832000 	str	r2, [r3]
-    a22c:	ea0000ec 	b	a5e4 <parse_POSLLH+0x414>
-    a230:	e59f33d0 	ldr	r3, [pc, #976]	; a608 <.text+0xa608>
-    a234:	e5d33000 	ldrb	r3, [r3]
-    a238:	e3530001 	cmp	r3, #1	; 0x1
-    a23c:	1a000007 	bne	a260 <parse_POSLLH+0x90>
-    a240:	e55b3010 	ldrb	r3, [fp, #-16]
-    a244:	e1a02403 	mov	r2, r3, lsl #8
-    a248:	e59f33bc 	ldr	r3, [pc, #956]	; a60c <.text+0xa60c>
-    a24c:	e5933000 	ldr	r3, [r3]
-    a250:	e0822003 	add	r2, r2, r3
-    a254:	e59f33b0 	ldr	r3, [pc, #944]	; a60c <.text+0xa60c>
-    a258:	e5832000 	str	r2, [r3]
-    a25c:	ea0000e0 	b	a5e4 <parse_POSLLH+0x414>
-    a260:	e59f33a0 	ldr	r3, [pc, #928]	; a608 <.text+0xa608>
-    a264:	e5d33000 	ldrb	r3, [r3]
-    a268:	e3530002 	cmp	r3, #2	; 0x2
-    a26c:	1a000007 	bne	a290 <parse_POSLLH+0xc0>
-    a270:	e55b3010 	ldrb	r3, [fp, #-16]
-    a274:	e1a02803 	mov	r2, r3, lsl #16
-    a278:	e59f338c 	ldr	r3, [pc, #908]	; a60c <.text+0xa60c>
-    a27c:	e5933000 	ldr	r3, [r3]
-    a280:	e0822003 	add	r2, r2, r3
-    a284:	e59f3380 	ldr	r3, [pc, #896]	; a60c <.text+0xa60c>
-    a288:	e5832000 	str	r2, [r3]
-    a28c:	ea0000d4 	b	a5e4 <parse_POSLLH+0x414>
-    a290:	e59f3370 	ldr	r3, [pc, #880]	; a608 <.text+0xa608>
-    a294:	e5d33000 	ldrb	r3, [r3]
-    a298:	e3530003 	cmp	r3, #3	; 0x3
-    a29c:	1a000007 	bne	a2c0 <parse_POSLLH+0xf0>
-    a2a0:	e55b3010 	ldrb	r3, [fp, #-16]
-    a2a4:	e1a02c03 	mov	r2, r3, lsl #24
-    a2a8:	e59f335c 	ldr	r3, [pc, #860]	; a60c <.text+0xa60c>
-    a2ac:	e5933000 	ldr	r3, [r3]
-    a2b0:	e0822003 	add	r2, r2, r3
-    a2b4:	e59f3350 	ldr	r3, [pc, #848]	; a60c <.text+0xa60c>
-    a2b8:	e5832000 	str	r2, [r3]
-    a2bc:	ea0000c8 	b	a5e4 <parse_POSLLH+0x414>
-    a2c0:	e59f3340 	ldr	r3, [pc, #832]	; a608 <.text+0xa608>
-    a2c4:	e5d33000 	ldrb	r3, [r3]
-    a2c8:	e3530004 	cmp	r3, #4	; 0x4
-    a2cc:	1a000003 	bne	a2e0 <parse_POSLLH+0x110>
-    a2d0:	e55b2010 	ldrb	r2, [fp, #-16]
-    a2d4:	e59f3334 	ldr	r3, [pc, #820]	; a610 <.text+0xa610>
-    a2d8:	e5832000 	str	r2, [r3]
-    a2dc:	ea0000c0 	b	a5e4 <parse_POSLLH+0x414>
-    a2e0:	e59f3320 	ldr	r3, [pc, #800]	; a608 <.text+0xa608>
-    a2e4:	e5d33000 	ldrb	r3, [r3]
-    a2e8:	e3530005 	cmp	r3, #5	; 0x5
-    a2ec:	1a000007 	bne	a310 <parse_POSLLH+0x140>
-    a2f0:	e55b3010 	ldrb	r3, [fp, #-16]
-    a2f4:	e1a02403 	mov	r2, r3, lsl #8
-    a2f8:	e59f3310 	ldr	r3, [pc, #784]	; a610 <.text+0xa610>
-    a2fc:	e5933000 	ldr	r3, [r3]
-    a300:	e0822003 	add	r2, r2, r3
-    a304:	e59f3304 	ldr	r3, [pc, #772]	; a610 <.text+0xa610>
-    a308:	e5832000 	str	r2, [r3]
-    a30c:	ea0000b4 	b	a5e4 <parse_POSLLH+0x414>
-    a310:	e59f32f0 	ldr	r3, [pc, #752]	; a608 <.text+0xa608>
-    a314:	e5d33000 	ldrb	r3, [r3]
-    a318:	e3530006 	cmp	r3, #6	; 0x6
-    a31c:	1a000007 	bne	a340 <parse_POSLLH+0x170>
-    a320:	e55b3010 	ldrb	r3, [fp, #-16]
-    a324:	e1a02803 	mov	r2, r3, lsl #16
-    a328:	e59f32e0 	ldr	r3, [pc, #736]	; a610 <.text+0xa610>
-    a32c:	e5933000 	ldr	r3, [r3]
-    a330:	e0822003 	add	r2, r2, r3
-    a334:	e59f32d4 	ldr	r3, [pc, #724]	; a610 <.text+0xa610>
-    a338:	e5832000 	str	r2, [r3]
-    a33c:	ea0000a8 	b	a5e4 <parse_POSLLH+0x414>
-    a340:	e59f32c0 	ldr	r3, [pc, #704]	; a608 <.text+0xa608>
-    a344:	e5d33000 	ldrb	r3, [r3]
-    a348:	e3530007 	cmp	r3, #7	; 0x7
-    a34c:	1a000007 	bne	a370 <parse_POSLLH+0x1a0>
-    a350:	e55b3010 	ldrb	r3, [fp, #-16]
-    a354:	e1a02c03 	mov	r2, r3, lsl #24
-    a358:	e59f32b0 	ldr	r3, [pc, #688]	; a610 <.text+0xa610>
-    a35c:	e5933000 	ldr	r3, [r3]
-    a360:	e0822003 	add	r2, r2, r3
-    a364:	e59f32a4 	ldr	r3, [pc, #676]	; a610 <.text+0xa610>
-    a368:	e5832000 	str	r2, [r3]
-    a36c:	ea00009c 	b	a5e4 <parse_POSLLH+0x414>
-    a370:	e59f3290 	ldr	r3, [pc, #656]	; a608 <.text+0xa608>
-    a374:	e5d33000 	ldrb	r3, [r3]
-    a378:	e353000c 	cmp	r3, #12	; 0xc
-    a37c:	1a000003 	bne	a390 <parse_POSLLH+0x1c0>
-    a380:	e55b2010 	ldrb	r2, [fp, #-16]
-    a384:	e59f3288 	ldr	r3, [pc, #648]	; a614 <.text+0xa614>
-    a388:	e5832000 	str	r2, [r3]
-    a38c:	ea000094 	b	a5e4 <parse_POSLLH+0x414>
-    a390:	e59f3270 	ldr	r3, [pc, #624]	; a608 <.text+0xa608>
-    a394:	e5d33000 	ldrb	r3, [r3]
-    a398:	e353000d 	cmp	r3, #13	; 0xd
-    a39c:	1a000007 	bne	a3c0 <parse_POSLLH+0x1f0>
-    a3a0:	e55b3010 	ldrb	r3, [fp, #-16]
-    a3a4:	e1a02403 	mov	r2, r3, lsl #8
-    a3a8:	e59f3264 	ldr	r3, [pc, #612]	; a614 <.text+0xa614>
-    a3ac:	e5933000 	ldr	r3, [r3]
-    a3b0:	e0822003 	add	r2, r2, r3
-    a3b4:	e59f3258 	ldr	r3, [pc, #600]	; a614 <.text+0xa614>
-    a3b8:	e5832000 	str	r2, [r3]
-    a3bc:	ea000088 	b	a5e4 <parse_POSLLH+0x414>
-    a3c0:	e59f3240 	ldr	r3, [pc, #576]	; a608 <.text+0xa608>
-    a3c4:	e5d33000 	ldrb	r3, [r3]
-    a3c8:	e353000e 	cmp	r3, #14	; 0xe
-    a3cc:	1a000007 	bne	a3f0 <parse_POSLLH+0x220>
-    a3d0:	e55b3010 	ldrb	r3, [fp, #-16]
-    a3d4:	e1a02803 	mov	r2, r3, lsl #16
-    a3d8:	e59f3234 	ldr	r3, [pc, #564]	; a614 <.text+0xa614>
-    a3dc:	e5933000 	ldr	r3, [r3]
-    a3e0:	e0822003 	add	r2, r2, r3
-    a3e4:	e59f3228 	ldr	r3, [pc, #552]	; a614 <.text+0xa614>
-    a3e8:	e5832000 	str	r2, [r3]
-    a3ec:	ea00007c 	b	a5e4 <parse_POSLLH+0x414>
-    a3f0:	e59f3210 	ldr	r3, [pc, #528]	; a608 <.text+0xa608>
-    a3f4:	e5d33000 	ldrb	r3, [r3]
-    a3f8:	e353000f 	cmp	r3, #15	; 0xf
-    a3fc:	1a000007 	bne	a420 <parse_POSLLH+0x250>
-    a400:	e55b3010 	ldrb	r3, [fp, #-16]
-    a404:	e1a02c03 	mov	r2, r3, lsl #24
-    a408:	e59f3204 	ldr	r3, [pc, #516]	; a614 <.text+0xa614>
-    a40c:	e5933000 	ldr	r3, [r3]
-    a410:	e0822003 	add	r2, r2, r3
-    a414:	e59f31f8 	ldr	r3, [pc, #504]	; a614 <.text+0xa614>
-    a418:	e5832000 	str	r2, [r3]
-    a41c:	ea000070 	b	a5e4 <parse_POSLLH+0x414>
-    a420:	e59f31e0 	ldr	r3, [pc, #480]	; a608 <.text+0xa608>
-    a424:	e5d33000 	ldrb	r3, [r3]
-    a428:	e3530010 	cmp	r3, #16	; 0x10
-    a42c:	1a000003 	bne	a440 <parse_POSLLH+0x270>
-    a430:	e55b2010 	ldrb	r2, [fp, #-16]
-    a434:	e59f31dc 	ldr	r3, [pc, #476]	; a618 <.text+0xa618>
-    a438:	e5832000 	str	r2, [r3]
-    a43c:	ea000068 	b	a5e4 <parse_POSLLH+0x414>
-    a440:	e59f31c0 	ldr	r3, [pc, #448]	; a608 <.text+0xa608>
-    a444:	e5d33000 	ldrb	r3, [r3]
-    a448:	e3530011 	cmp	r3, #17	; 0x11
-    a44c:	1a000008 	bne	a474 <parse_POSLLH+0x2a4>
-    a450:	e55b3010 	ldrb	r3, [fp, #-16]
-    a454:	e1a03403 	mov	r3, r3, lsl #8
-    a458:	e1a02003 	mov	r2, r3
-    a45c:	e59f31b4 	ldr	r3, [pc, #436]	; a618 <.text+0xa618>
-    a460:	e5933000 	ldr	r3, [r3]
-    a464:	e0822003 	add	r2, r2, r3
-    a468:	e59f31a8 	ldr	r3, [pc, #424]	; a618 <.text+0xa618>
-    a46c:	e5832000 	str	r2, [r3]
-    a470:	ea00005b 	b	a5e4 <parse_POSLLH+0x414>
-    a474:	e59f318c 	ldr	r3, [pc, #396]	; a608 <.text+0xa608>
-    a478:	e5d33000 	ldrb	r3, [r3]
-    a47c:	e3530012 	cmp	r3, #18	; 0x12
-    a480:	1a000008 	bne	a4a8 <parse_POSLLH+0x2d8>
-    a484:	e55b3010 	ldrb	r3, [fp, #-16]
-    a488:	e1a03803 	mov	r3, r3, lsl #16
-    a48c:	e1a02003 	mov	r2, r3
-    a490:	e59f3180 	ldr	r3, [pc, #384]	; a618 <.text+0xa618>
-    a494:	e5933000 	ldr	r3, [r3]
-    a498:	e0822003 	add	r2, r2, r3
-    a49c:	e59f3174 	ldr	r3, [pc, #372]	; a618 <.text+0xa618>
-    a4a0:	e5832000 	str	r2, [r3]
-    a4a4:	ea00004e 	b	a5e4 <parse_POSLLH+0x414>
-    a4a8:	e59f3158 	ldr	r3, [pc, #344]	; a608 <.text+0xa608>
-    a4ac:	e5d33000 	ldrb	r3, [r3]
-    a4b0:	e3530013 	cmp	r3, #19	; 0x13
-    a4b4:	1a000008 	bne	a4dc <parse_POSLLH+0x30c>
-    a4b8:	e55b3010 	ldrb	r3, [fp, #-16]
-    a4bc:	e1a03c03 	mov	r3, r3, lsl #24
-    a4c0:	e1a02003 	mov	r2, r3
-    a4c4:	e59f314c 	ldr	r3, [pc, #332]	; a618 <.text+0xa618>
-    a4c8:	e5933000 	ldr	r3, [r3]
-    a4cc:	e0822003 	add	r2, r2, r3
-    a4d0:	e59f3140 	ldr	r3, [pc, #320]	; a618 <.text+0xa618>
-    a4d4:	e5832000 	str	r2, [r3]
-    a4d8:	ea000041 	b	a5e4 <parse_POSLLH+0x414>
-    a4dc:	e59f3124 	ldr	r3, [pc, #292]	; a608 <.text+0xa608>
-    a4e0:	e5d33000 	ldrb	r3, [r3]
-    a4e4:	e3530014 	cmp	r3, #20	; 0x14
-    a4e8:	1a000003 	bne	a4fc <parse_POSLLH+0x32c>
-    a4ec:	e55b2010 	ldrb	r2, [fp, #-16]
-    a4f0:	e59f3124 	ldr	r3, [pc, #292]	; a61c <.text+0xa61c>
-    a4f4:	e5832000 	str	r2, [r3]
-    a4f8:	ea000039 	b	a5e4 <parse_POSLLH+0x414>
-    a4fc:	e59f3104 	ldr	r3, [pc, #260]	; a608 <.text+0xa608>
-    a500:	e5d33000 	ldrb	r3, [r3]
-    a504:	e3530015 	cmp	r3, #21	; 0x15
-    a508:	1a000008 	bne	a530 <parse_POSLLH+0x360>
-    a50c:	e55b3010 	ldrb	r3, [fp, #-16]
-    a510:	e1a03403 	mov	r3, r3, lsl #8
-    a514:	e1a02003 	mov	r2, r3
-    a518:	e59f30fc 	ldr	r3, [pc, #252]	; a61c <.text+0xa61c>
-    a51c:	e5933000 	ldr	r3, [r3]
-    a520:	e0822003 	add	r2, r2, r3
-    a524:	e59f30f0 	ldr	r3, [pc, #240]	; a61c <.text+0xa61c>
-    a528:	e5832000 	str	r2, [r3]
-    a52c:	ea00002c 	b	a5e4 <parse_POSLLH+0x414>
-    a530:	e59f30d0 	ldr	r3, [pc, #208]	; a608 <.text+0xa608>
-    a534:	e5d33000 	ldrb	r3, [r3]
-    a538:	e3530016 	cmp	r3, #22	; 0x16
-    a53c:	1a000008 	bne	a564 <parse_POSLLH+0x394>
-    a540:	e55b3010 	ldrb	r3, [fp, #-16]
-    a544:	e1a03803 	mov	r3, r3, lsl #16
-    a548:	e1a02003 	mov	r2, r3
-    a54c:	e59f30c8 	ldr	r3, [pc, #200]	; a61c <.text+0xa61c>
-    a550:	e5933000 	ldr	r3, [r3]
-    a554:	e0822003 	add	r2, r2, r3
-    a558:	e59f30bc 	ldr	r3, [pc, #188]	; a61c <.text+0xa61c>
-    a55c:	e5832000 	str	r2, [r3]
-    a560:	ea00001f 	b	a5e4 <parse_POSLLH+0x414>
-    a564:	e59f309c 	ldr	r3, [pc, #156]	; a608 <.text+0xa608>
-    a568:	e5d33000 	ldrb	r3, [r3]
-    a56c:	e3530017 	cmp	r3, #23	; 0x17
-    a570:	1a00001b 	bne	a5e4 <parse_POSLLH+0x414>
-    a574:	e55b3010 	ldrb	r3, [fp, #-16]
-    a578:	e1a03c03 	mov	r3, r3, lsl #24
-    a57c:	e1a02003 	mov	r2, r3
-    a580:	e59f3094 	ldr	r3, [pc, #148]	; a61c <.text+0xa61c>
-    a584:	e5933000 	ldr	r3, [r3]
-    a588:	e0822003 	add	r2, r2, r3
-    a58c:	e59f3088 	ldr	r3, [pc, #136]	; a61c <.text+0xa61c>
-    a590:	e5832000 	str	r2, [r3]
-    a594:	e59f3074 	ldr	r3, [pc, #116]	; a610 <.text+0xa610>
-    a598:	e5932000 	ldr	r2, [r3]
-    a59c:	e59f307c 	ldr	r3, [pc, #124]	; a620 <.text+0xa620>
-    a5a0:	e5832000 	str	r2, [r3]
-    a5a4:	e59f3060 	ldr	r3, [pc, #96]	; a60c <.text+0xa60c>
-    a5a8:	e5932000 	ldr	r2, [r3]
-    a5ac:	e59f306c 	ldr	r3, [pc, #108]	; a620 <.text+0xa620>
-    a5b0:	e5832004 	str	r2, [r3, #4]
-    a5b4:	e59f3058 	ldr	r3, [pc, #88]	; a614 <.text+0xa614>
-    a5b8:	e5932000 	ldr	r2, [r3]
-    a5bc:	e59f305c 	ldr	r3, [pc, #92]	; a620 <.text+0xa620>
-    a5c0:	e5832008 	str	r2, [r3, #8]
-    a5c4:	e59f304c 	ldr	r3, [pc, #76]	; a618 <.text+0xa618>
-    a5c8:	e5932000 	ldr	r2, [r3]
-    a5cc:	e59f304c 	ldr	r3, [pc, #76]	; a620 <.text+0xa620>
-    a5d0:	e5832018 	str	r2, [r3, #24]
-    a5d4:	e59f3040 	ldr	r3, [pc, #64]	; a61c <.text+0xa61c>
-    a5d8:	e5932000 	ldr	r2, [r3]
-    a5dc:	e59f303c 	ldr	r3, [pc, #60]	; a620 <.text+0xa620>
-    a5e0:	e583201c 	str	r2, [r3, #28]
-    a5e4:	e59f301c 	ldr	r3, [pc, #28]	; a608 <.text+0xa608>
-    a5e8:	e5d33000 	ldrb	r3, [r3]
-    a5ec:	e2833001 	add	r3, r3, #1	; 0x1
-    a5f0:	e20330ff 	and	r3, r3, #255	; 0xff
-    a5f4:	e59f200c 	ldr	r2, [pc, #12]	; a608 <.text+0xa608>
-    a5f8:	e5c23000 	strb	r3, [r2]
-    a5fc:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    a600:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    a604:	e12fff1e 	bx	lr
-    a608:	40000930 	andmi	r0, r0, r0, lsr r9
-    a60c:	40000928 	andmi	r0, r0, r8, lsr #18
-    a610:	4000092c 	andmi	r0, r0, ip, lsr #18
-    a614:	40000924 	andmi	r0, r0, r4, lsr #18
-    a618:	40000920 	andmi	r0, r0, r0, lsr #18
-    a61c:	4000091c 	andmi	r0, r0, ip, lsl r9
-    a620:	40000f64 	andmi	r0, r0, r4, ror #30
-
-0000a624 <parse_POSUTM>:
-    a624:	e1a0c00d 	mov	ip, sp
-    a628:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    a62c:	e24cb004 	sub	fp, ip, #4	; 0x4
-    a630:	e24dd008 	sub	sp, sp, #8	; 0x8
-    a634:	e1a03000 	mov	r3, r0
-    a638:	e1a02001 	mov	r2, r1
-    a63c:	e54b3010 	strb	r3, [fp, #-16]
-    a640:	e1a03002 	mov	r3, r2
-    a644:	e54b3014 	strb	r3, [fp, #-20]
-    a648:	e55b3014 	ldrb	r3, [fp, #-20]
-    a64c:	e3530000 	cmp	r3, #0	; 0x0
-    a650:	0a000003 	beq	a664 <parse_POSUTM+0x40>
-    a654:	e59f3188 	ldr	r3, [pc, #392]	; a7e4 <.text+0xa7e4>
-    a658:	e3a02000 	mov	r2, #0	; 0x0
-    a65c:	e5c32000 	strb	r2, [r3]
-    a660:	ea00005c 	b	a7d8 <parse_POSUTM+0x1b4>
-    a664:	e59f3178 	ldr	r3, [pc, #376]	; a7e4 <.text+0xa7e4>
-    a668:	e5d33000 	ldrb	r3, [r3]
-    a66c:	e3530000 	cmp	r3, #0	; 0x0
-    a670:	1a000003 	bne	a684 <parse_POSUTM+0x60>
-    a674:	e55b2010 	ldrb	r2, [fp, #-16]
-    a678:	e59f3168 	ldr	r3, [pc, #360]	; a7e8 <.text+0xa7e8>
-    a67c:	e5832000 	str	r2, [r3]
-    a680:	ea00004e 	b	a7c0 <parse_POSUTM+0x19c>
-    a684:	e59f3158 	ldr	r3, [pc, #344]	; a7e4 <.text+0xa7e4>
-    a688:	e5d33000 	ldrb	r3, [r3]
-    a68c:	e3530001 	cmp	r3, #1	; 0x1
-    a690:	1a000007 	bne	a6b4 <parse_POSUTM+0x90>
-    a694:	e55b3010 	ldrb	r3, [fp, #-16]
-    a698:	e1a02403 	mov	r2, r3, lsl #8
-    a69c:	e59f3144 	ldr	r3, [pc, #324]	; a7e8 <.text+0xa7e8>
-    a6a0:	e5933000 	ldr	r3, [r3]
-    a6a4:	e0822003 	add	r2, r2, r3
-    a6a8:	e59f3138 	ldr	r3, [pc, #312]	; a7e8 <.text+0xa7e8>
-    a6ac:	e5832000 	str	r2, [r3]
-    a6b0:	ea000042 	b	a7c0 <parse_POSUTM+0x19c>
-    a6b4:	e59f3128 	ldr	r3, [pc, #296]	; a7e4 <.text+0xa7e4>
-    a6b8:	e5d33000 	ldrb	r3, [r3]
-    a6bc:	e3530002 	cmp	r3, #2	; 0x2
-    a6c0:	1a000007 	bne	a6e4 <parse_POSUTM+0xc0>
-    a6c4:	e55b3010 	ldrb	r3, [fp, #-16]
-    a6c8:	e1a02803 	mov	r2, r3, lsl #16
-    a6cc:	e59f3114 	ldr	r3, [pc, #276]	; a7e8 <.text+0xa7e8>
-    a6d0:	e5933000 	ldr	r3, [r3]
-    a6d4:	e0822003 	add	r2, r2, r3
-    a6d8:	e59f3108 	ldr	r3, [pc, #264]	; a7e8 <.text+0xa7e8>
-    a6dc:	e5832000 	str	r2, [r3]
-    a6e0:	ea000036 	b	a7c0 <parse_POSUTM+0x19c>
-    a6e4:	e59f30f8 	ldr	r3, [pc, #248]	; a7e4 <.text+0xa7e4>
-    a6e8:	e5d33000 	ldrb	r3, [r3]
-    a6ec:	e3530003 	cmp	r3, #3	; 0x3
-    a6f0:	1a000007 	bne	a714 <parse_POSUTM+0xf0>
-    a6f4:	e55b3010 	ldrb	r3, [fp, #-16]
-    a6f8:	e1a02c03 	mov	r2, r3, lsl #24
-    a6fc:	e59f30e4 	ldr	r3, [pc, #228]	; a7e8 <.text+0xa7e8>
-    a700:	e5933000 	ldr	r3, [r3]
-    a704:	e0822003 	add	r2, r2, r3
-    a708:	e59f30d8 	ldr	r3, [pc, #216]	; a7e8 <.text+0xa7e8>
-    a70c:	e5832000 	str	r2, [r3]
-    a710:	ea00002a 	b	a7c0 <parse_POSUTM+0x19c>
-    a714:	e59f30c8 	ldr	r3, [pc, #200]	; a7e4 <.text+0xa7e4>
-    a718:	e5d33000 	ldrb	r3, [r3]
-    a71c:	e3530004 	cmp	r3, #4	; 0x4
-    a720:	1a000003 	bne	a734 <parse_POSUTM+0x110>
-    a724:	e55b2010 	ldrb	r2, [fp, #-16]
-    a728:	e59f30bc 	ldr	r3, [pc, #188]	; a7ec <.text+0xa7ec>
-    a72c:	e5832000 	str	r2, [r3]
-    a730:	ea000022 	b	a7c0 <parse_POSUTM+0x19c>
-    a734:	e59f30a8 	ldr	r3, [pc, #168]	; a7e4 <.text+0xa7e4>
-    a738:	e5d33000 	ldrb	r3, [r3]
-    a73c:	e3530005 	cmp	r3, #5	; 0x5
-    a740:	1a000007 	bne	a764 <parse_POSUTM+0x140>
-    a744:	e55b3010 	ldrb	r3, [fp, #-16]
-    a748:	e1a02403 	mov	r2, r3, lsl #8
-    a74c:	e59f3098 	ldr	r3, [pc, #152]	; a7ec <.text+0xa7ec>
-    a750:	e5933000 	ldr	r3, [r3]
-    a754:	e0822003 	add	r2, r2, r3
-    a758:	e59f308c 	ldr	r3, [pc, #140]	; a7ec <.text+0xa7ec>
-    a75c:	e5832000 	str	r2, [r3]
-    a760:	ea000016 	b	a7c0 <parse_POSUTM+0x19c>
-    a764:	e59f3078 	ldr	r3, [pc, #120]	; a7e4 <.text+0xa7e4>
-    a768:	e5d33000 	ldrb	r3, [r3]
-    a76c:	e3530006 	cmp	r3, #6	; 0x6
-    a770:	1a000007 	bne	a794 <parse_POSUTM+0x170>
-    a774:	e55b3010 	ldrb	r3, [fp, #-16]
-    a778:	e1a02803 	mov	r2, r3, lsl #16
-    a77c:	e59f3068 	ldr	r3, [pc, #104]	; a7ec <.text+0xa7ec>
-    a780:	e5933000 	ldr	r3, [r3]
-    a784:	e0822003 	add	r2, r2, r3
-    a788:	e59f305c 	ldr	r3, [pc, #92]	; a7ec <.text+0xa7ec>
-    a78c:	e5832000 	str	r2, [r3]
-    a790:	ea00000a 	b	a7c0 <parse_POSUTM+0x19c>
-    a794:	e59f3048 	ldr	r3, [pc, #72]	; a7e4 <.text+0xa7e4>
-    a798:	e5d33000 	ldrb	r3, [r3]
-    a79c:	e3530007 	cmp	r3, #7	; 0x7
-    a7a0:	1a000006 	bne	a7c0 <parse_POSUTM+0x19c>
-    a7a4:	e55b3010 	ldrb	r3, [fp, #-16]
-    a7a8:	e1a02c03 	mov	r2, r3, lsl #24
-    a7ac:	e59f3038 	ldr	r3, [pc, #56]	; a7ec <.text+0xa7ec>
-    a7b0:	e5933000 	ldr	r3, [r3]
-    a7b4:	e0822003 	add	r2, r2, r3
-    a7b8:	e59f302c 	ldr	r3, [pc, #44]	; a7ec <.text+0xa7ec>
-    a7bc:	e5832000 	str	r2, [r3]
-    a7c0:	e59f301c 	ldr	r3, [pc, #28]	; a7e4 <.text+0xa7e4>
-    a7c4:	e5d33000 	ldrb	r3, [r3]
-    a7c8:	e2833001 	add	r3, r3, #1	; 0x1
-    a7cc:	e20330ff 	and	r3, r3, #255	; 0xff
-    a7d0:	e59f200c 	ldr	r2, [pc, #12]	; a7e4 <.text+0xa7e4>
-    a7d4:	e5c23000 	strb	r3, [r2]
-    a7d8:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    a7dc:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    a7e0:	e12fff1e 	bx	lr
-    a7e4:	4000093c 	andmi	r0, r0, ip, lsr r9
-    a7e8:	40000938 	andmi	r0, r0, r8, lsr r9
-    a7ec:	40000934 	andmi	r0, r0, r4, lsr r9
-
-0000a7f0 <parse_NAVSOL>:
-    a7f0:	e1a0c00d 	mov	ip, sp
-    a7f4:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    a7f8:	e24cb004 	sub	fp, ip, #4	; 0x4
-    a7fc:	e24dd008 	sub	sp, sp, #8	; 0x8
-    a800:	e1a03000 	mov	r3, r0
-    a804:	e1a02001 	mov	r2, r1
-    a808:	e54b3010 	strb	r3, [fp, #-16]
-    a80c:	e1a03002 	mov	r3, r2
-    a810:	e54b3014 	strb	r3, [fp, #-20]
-    a814:	e55b3014 	ldrb	r3, [fp, #-20]
-    a818:	e3530000 	cmp	r3, #0	; 0x0
-    a81c:	0a000003 	beq	a830 <parse_NAVSOL+0x40>
-    a820:	e59f3184 	ldr	r3, [pc, #388]	; a9ac <.text+0xa9ac>
-    a824:	e3a02000 	mov	r2, #0	; 0x0
-    a828:	e5c32000 	strb	r2, [r3]
-    a82c:	ea00005b 	b	a9a0 <parse_NAVSOL+0x1b0>
-    a830:	e59f3174 	ldr	r3, [pc, #372]	; a9ac <.text+0xa9ac>
-    a834:	e5d33000 	ldrb	r3, [r3]
-    a838:	e3530000 	cmp	r3, #0	; 0x0
-    a83c:	1a000003 	bne	a850 <parse_NAVSOL+0x60>
-    a840:	e55b2010 	ldrb	r2, [fp, #-16]
-    a844:	e59f3164 	ldr	r3, [pc, #356]	; a9b0 <.text+0xa9b0>
-    a848:	e5832000 	str	r2, [r3]
-    a84c:	ea00004d 	b	a988 <parse_NAVSOL+0x198>
-    a850:	e59f3154 	ldr	r3, [pc, #340]	; a9ac <.text+0xa9ac>
-    a854:	e5d33000 	ldrb	r3, [r3]
-    a858:	e3530001 	cmp	r3, #1	; 0x1
-    a85c:	1a000008 	bne	a884 <parse_NAVSOL+0x94>
-    a860:	e55b3010 	ldrb	r3, [fp, #-16]
-    a864:	e1a03403 	mov	r3, r3, lsl #8
-    a868:	e1a02003 	mov	r2, r3
-    a86c:	e59f313c 	ldr	r3, [pc, #316]	; a9b0 <.text+0xa9b0>
-    a870:	e5933000 	ldr	r3, [r3]
-    a874:	e0822003 	add	r2, r2, r3
-    a878:	e59f3130 	ldr	r3, [pc, #304]	; a9b0 <.text+0xa9b0>
-    a87c:	e5832000 	str	r2, [r3]
-    a880:	ea000040 	b	a988 <parse_NAVSOL+0x198>
-    a884:	e59f3120 	ldr	r3, [pc, #288]	; a9ac <.text+0xa9ac>
-    a888:	e5d33000 	ldrb	r3, [r3]
-    a88c:	e3530002 	cmp	r3, #2	; 0x2
-    a890:	1a000008 	bne	a8b8 <parse_NAVSOL+0xc8>
-    a894:	e55b3010 	ldrb	r3, [fp, #-16]
-    a898:	e1a03803 	mov	r3, r3, lsl #16
-    a89c:	e1a02003 	mov	r2, r3
-    a8a0:	e59f3108 	ldr	r3, [pc, #264]	; a9b0 <.text+0xa9b0>
-    a8a4:	e5933000 	ldr	r3, [r3]
-    a8a8:	e0822003 	add	r2, r2, r3
-    a8ac:	e59f30fc 	ldr	r3, [pc, #252]	; a9b0 <.text+0xa9b0>
-    a8b0:	e5832000 	str	r2, [r3]
-    a8b4:	ea000033 	b	a988 <parse_NAVSOL+0x198>
-    a8b8:	e59f30ec 	ldr	r3, [pc, #236]	; a9ac <.text+0xa9ac>
-    a8bc:	e5d33000 	ldrb	r3, [r3]
-    a8c0:	e3530003 	cmp	r3, #3	; 0x3
-    a8c4:	1a000008 	bne	a8ec <parse_NAVSOL+0xfc>
-    a8c8:	e55b3010 	ldrb	r3, [fp, #-16]
-    a8cc:	e1a03c03 	mov	r3, r3, lsl #24
-    a8d0:	e1a02003 	mov	r2, r3
-    a8d4:	e59f30d4 	ldr	r3, [pc, #212]	; a9b0 <.text+0xa9b0>
-    a8d8:	e5933000 	ldr	r3, [r3]
-    a8dc:	e0822003 	add	r2, r2, r3
-    a8e0:	e59f30c8 	ldr	r3, [pc, #200]	; a9b0 <.text+0xa9b0>
-    a8e4:	e5832000 	str	r2, [r3]
-    a8e8:	ea000026 	b	a988 <parse_NAVSOL+0x198>
-    a8ec:	e59f30b8 	ldr	r3, [pc, #184]	; a9ac <.text+0xa9ac>
-    a8f0:	e5d33000 	ldrb	r3, [r3]
-    a8f4:	e3530008 	cmp	r3, #8	; 0x8
-    a8f8:	1a000003 	bne	a90c <parse_NAVSOL+0x11c>
-    a8fc:	e55b2010 	ldrb	r2, [fp, #-16]
-    a900:	e59f30ac 	ldr	r3, [pc, #172]	; a9b4 <.text+0xa9b4>
-    a904:	e1c320b0 	strh	r2, [r3]
-    a908:	ea00001e 	b	a988 <parse_NAVSOL+0x198>
-    a90c:	e59f3098 	ldr	r3, [pc, #152]	; a9ac <.text+0xa9ac>
-    a910:	e5d33000 	ldrb	r3, [r3]
-    a914:	e3530009 	cmp	r3, #9	; 0x9
-    a918:	1a000013 	bne	a96c <parse_NAVSOL+0x17c>
-    a91c:	e55b3010 	ldrb	r3, [fp, #-16]
-    a920:	e1a03403 	mov	r3, r3, lsl #8
-    a924:	e1a03803 	mov	r3, r3, lsl #16
-    a928:	e1a02823 	mov	r2, r3, lsr #16
-    a92c:	e59f3080 	ldr	r3, [pc, #128]	; a9b4 <.text+0xa9b4>
-    a930:	e1d330b0 	ldrh	r3, [r3]
-    a934:	e0823003 	add	r3, r2, r3
-    a938:	e1a03803 	mov	r3, r3, lsl #16
-    a93c:	e1a02823 	mov	r2, r3, lsr #16
-    a940:	e59f306c 	ldr	r3, [pc, #108]	; a9b4 <.text+0xa9b4>
-    a944:	e1c320b0 	strh	r2, [r3]
-    a948:	e59f3060 	ldr	r3, [pc, #96]	; a9b0 <.text+0xa9b0>
-    a94c:	e5932000 	ldr	r2, [r3]
-    a950:	e59f3060 	ldr	r3, [pc, #96]	; a9b8 <.text+0xa9b8>
-    a954:	e5832000 	str	r2, [r3]
-    a958:	e59f3054 	ldr	r3, [pc, #84]	; a9b4 <.text+0xa9b4>
-    a95c:	e1d320b0 	ldrh	r2, [r3]
-    a960:	e59f3050 	ldr	r3, [pc, #80]	; a9b8 <.text+0xa9b8>
-    a964:	e1c320b4 	strh	r2, [r3, #4]
-    a968:	ea000006 	b	a988 <parse_NAVSOL+0x198>
-    a96c:	e59f3038 	ldr	r3, [pc, #56]	; a9ac <.text+0xa9ac>
-    a970:	e5d33000 	ldrb	r3, [r3]
-    a974:	e353002f 	cmp	r3, #47	; 0x2f
-    a978:	1a000002 	bne	a988 <parse_NAVSOL+0x198>
-    a97c:	e55b2010 	ldrb	r2, [fp, #-16]
-    a980:	e59f3034 	ldr	r3, [pc, #52]	; a9bc <.text+0xa9bc>
-    a984:	e5832024 	str	r2, [r3, #36]
-    a988:	e59f301c 	ldr	r3, [pc, #28]	; a9ac <.text+0xa9ac>
-    a98c:	e5d33000 	ldrb	r3, [r3]
-    a990:	e2833001 	add	r3, r3, #1	; 0x1
-    a994:	e20330ff 	and	r3, r3, #255	; 0xff
-    a998:	e59f200c 	ldr	r2, [pc, #12]	; a9ac <.text+0xa9ac>
-    a99c:	e5c23000 	strb	r3, [r2]
-    a9a0:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    a9a4:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    a9a8:	e12fff1e 	bx	lr
-    a9ac:	40000944 	andmi	r0, r0, r4, asr #18
-    a9b0:	40000940 	andmi	r0, r0, r0, asr #18
-    a9b4:	4000093e 	andmi	r0, r0, lr, lsr r9
-    a9b8:	400013d8 	ldrmid	r1, [r0], -r8
-    a9bc:	40000f64 	andmi	r0, r0, r4, ror #30
-
-0000a9c0 <parse_STATUS>:
-    a9c0:	e1a0c00d 	mov	ip, sp
-    a9c4:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    a9c8:	e24cb004 	sub	fp, ip, #4	; 0x4
-    a9cc:	e24dd008 	sub	sp, sp, #8	; 0x8
-    a9d0:	e1a03000 	mov	r3, r0
-    a9d4:	e1a02001 	mov	r2, r1
-    a9d8:	e54b3010 	strb	r3, [fp, #-16]
-    a9dc:	e1a03002 	mov	r3, r2
-    a9e0:	e54b3014 	strb	r3, [fp, #-20]
-    a9e4:	e55b3014 	ldrb	r3, [fp, #-20]
-    a9e8:	e3530000 	cmp	r3, #0	; 0x0
-    a9ec:	0a000003 	beq	aa00 <parse_STATUS+0x40>
-    a9f0:	e59f30bc 	ldr	r3, [pc, #188]	; aab4 <.text+0xaab4>
-    a9f4:	e3a02000 	mov	r2, #0	; 0x0
-    a9f8:	e5c32000 	strb	r2, [r3]
-    a9fc:	ea000029 	b	aaa8 <parse_STATUS+0xe8>
-    aa00:	e59f30ac 	ldr	r3, [pc, #172]	; aab4 <.text+0xaab4>
-    aa04:	e5d33000 	ldrb	r3, [r3]
-    aa08:	e3530000 	cmp	r3, #0	; 0x0
-    aa0c:	1a000003 	bne	aa20 <parse_STATUS+0x60>
-    aa10:	e59f20a0 	ldr	r2, [pc, #160]	; aab8 <.text+0xaab8>
-    aa14:	e55b3010 	ldrb	r3, [fp, #-16]
-    aa18:	e5c23000 	strb	r3, [r2]
-    aa1c:	ea00001b 	b	aa90 <parse_STATUS+0xd0>
-    aa20:	e59f308c 	ldr	r3, [pc, #140]	; aab4 <.text+0xaab4>
-    aa24:	e5d33000 	ldrb	r3, [r3]
-    aa28:	e3530001 	cmp	r3, #1	; 0x1
-    aa2c:	1a000003 	bne	aa40 <parse_STATUS+0x80>
-    aa30:	e59f2084 	ldr	r2, [pc, #132]	; aabc <.text+0xaabc>
-    aa34:	e55b3010 	ldrb	r3, [fp, #-16]
-    aa38:	e5c23000 	strb	r3, [r2]
-    aa3c:	ea000013 	b	aa90 <parse_STATUS+0xd0>
-    aa40:	e59f306c 	ldr	r3, [pc, #108]	; aab4 <.text+0xaab4>
-    aa44:	e5d33000 	ldrb	r3, [r3]
-    aa48:	e3530002 	cmp	r3, #2	; 0x2
-    aa4c:	1a00000f 	bne	aa90 <parse_STATUS+0xd0>
-    aa50:	e59f2068 	ldr	r2, [pc, #104]	; aac0 <.text+0xaac0>
-    aa54:	e55b3010 	ldrb	r3, [fp, #-16]
-    aa58:	e5c23000 	strb	r3, [r2]
-    aa5c:	e59f3054 	ldr	r3, [pc, #84]	; aab8 <.text+0xaab8>
-    aa60:	e5d33000 	ldrb	r3, [r3]
-    aa64:	e1a02003 	mov	r2, r3
-    aa68:	e59f304c 	ldr	r3, [pc, #76]	; aabc <.text+0xaabc>
-    aa6c:	e5d33000 	ldrb	r3, [r3]
-    aa70:	e1a03403 	mov	r3, r3, lsl #8
-    aa74:	e1822003 	orr	r2, r2, r3
-    aa78:	e59f3040 	ldr	r3, [pc, #64]	; aac0 <.text+0xaac0>
-    aa7c:	e5d33000 	ldrb	r3, [r3]
-    aa80:	e1a03803 	mov	r3, r3, lsl #16
-    aa84:	e1822003 	orr	r2, r2, r3
-    aa88:	e59f3034 	ldr	r3, [pc, #52]	; aac4 <.text+0xaac4>
-    aa8c:	e5832028 	str	r2, [r3, #40]
-    aa90:	e59f301c 	ldr	r3, [pc, #28]	; aab4 <.text+0xaab4>
-    aa94:	e5d33000 	ldrb	r3, [r3]
-    aa98:	e2833001 	add	r3, r3, #1	; 0x1
-    aa9c:	e20330ff 	and	r3, r3, #255	; 0xff
-    aaa0:	e59f200c 	ldr	r2, [pc, #12]	; aab4 <.text+0xaab4>
-    aaa4:	e5c23000 	strb	r3, [r2]
-    aaa8:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    aaac:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    aab0:	e12fff1e 	bx	lr
-    aab4:	40000948 	andmi	r0, r0, r8, asr #18
-    aab8:	40000947 	andmi	r0, r0, r7, asr #18
-    aabc:	40000946 	andmi	r0, r0, r6, asr #18
-    aac0:	40000945 	andmi	r0, r0, r5, asr #18
-    aac4:	40000f64 	andmi	r0, r0, r4, ror #30
-
-0000aac8 <uart1ISR>:
-    aac8:	e1a0c00d 	mov	ip, sp
-    aacc:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    aad0:	e24cb004 	sub	fp, ip, #4	; 0x4
-    aad4:	e24dd00c 	sub	sp, sp, #12	; 0xc
-    aad8:	e3a0328e 	mov	r3, #-536870904	; 0xe0000008
-    aadc:	e2833801 	add	r3, r3, #65536	; 0x10000
-    aae0:	e5933000 	ldr	r3, [r3]
-    aae4:	e50b3010 	str	r3, [fp, #-16]
-    aae8:	e51b3010 	ldr	r3, [fp, #-16]
-    aaec:	e1a030a3 	mov	r3, r3, lsr #1
-    aaf0:	e2033007 	and	r3, r3, #7	; 0x7
-    aaf4:	e50b3018 	str	r3, [fp, #-24]
-    aaf8:	e51b3018 	ldr	r3, [fp, #-24]
-    aafc:	e3530001 	cmp	r3, #1	; 0x1
-    ab00:	0a000003 	beq	ab14 <uart1ISR+0x4c>
-    ab04:	e51b3018 	ldr	r3, [fp, #-24]
-    ab08:	e3530002 	cmp	r3, #2	; 0x2
-    ab0c:	0a00001d 	beq	ab88 <uart1ISR+0xc0>
-    ab10:	ea000132 	b	afe0 <.text+0xafe0>
-    ab14:	e24b3012 	sub	r3, fp, #18	; 0x12
-    ab18:	e3a00000 	mov	r0, #0	; 0x0
-    ab1c:	e1a01003 	mov	r1, r3
-    ab20:	e3a02001 	mov	r2, #1	; 0x1
-    ab24:	eb0001cb 	bl	b258 <ringbuffer1>
-    ab28:	e1a03000 	mov	r3, r0
-    ab2c:	e3530000 	cmp	r3, #0	; 0x0
-    ab30:	0a000006 	beq	ab50 <uart1ISR+0x88>
-    ab34:	e59f24c0 	ldr	r2, [pc, #1216]	; affc <.text+0xaffc>
-    ab38:	e3a03001 	mov	r3, #1	; 0x1
-    ab3c:	e5c23000 	strb	r3, [r2]
-    ab40:	e55b3012 	ldrb	r3, [fp, #-18]
-    ab44:	e1a00003 	mov	r0, r3
-    ab48:	eb00015d 	bl	b0c4 <UART1WriteChar>
-    ab4c:	ea000123 	b	afe0 <.text+0xafe0>
-    ab50:	e59f24a4 	ldr	r2, [pc, #1188]	; affc <.text+0xaffc>
-    ab54:	e3a03000 	mov	r3, #0	; 0x0
-    ab58:	e5c23000 	strb	r3, [r2]
-    ab5c:	e59f349c 	ldr	r3, [pc, #1180]	; b000 <.text+0xb000>
-    ab60:	e5d33000 	ldrb	r3, [r3]
-    ab64:	e20330ff 	and	r3, r3, #255	; 0xff
-    ab68:	e3530000 	cmp	r3, #0	; 0x0
-    ab6c:	0a00011b 	beq	afe0 <.text+0xafe0>
-    ab70:	e3a00ce1 	mov	r0, #57600	; 0xe100
-    ab74:	eb000127 	bl	b018 <UART1Initialize>
-    ab78:	e59f3480 	ldr	r3, [pc, #1152]	; b000 <.text+0xb000>
-    ab7c:	e3a02000 	mov	r2, #0	; 0x0
-    ab80:	e5c32000 	strb	r2, [r3]
-    ab84:	ea000115 	b	afe0 <.text+0xafe0>
-    ab88:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    ab8c:	e2833801 	add	r3, r3, #65536	; 0x10000
-    ab90:	e5933000 	ldr	r3, [r3]
-    ab94:	e54b3011 	strb	r3, [fp, #-17]
-    ab98:	e59f3464 	ldr	r3, [pc, #1124]	; b004 <.text+0xb004>
-    ab9c:	e5d33000 	ldrb	r3, [r3]
-    aba0:	e353000e 	cmp	r3, #14	; 0xe
-    aba4:	979ff103 	ldrls	pc, [pc, r3, lsl #2]
-    aba8:	ea000109 	b	afd4 <.text+0xafd4>
-    abac:	0000abe8 	andeq	sl, r0, r8, ror #23
-    abb0:	0000ac04 	andeq	sl, r0, r4, lsl #24
-    abb4:	0000ac30 	andeq	sl, r0, r0, lsr ip
-    abb8:	0000ac78 	andeq	sl, r0, r8, ror ip
-    abbc:	0000aca0 	andeq	sl, r0, r0, lsr #25
-    abc0:	0000ad20 	andeq	sl, r0, r0, lsr #26
-    abc4:	0000ade4 	andeq	sl, r0, r4, ror #27
-    abc8:	0000afd4 	ldreqd	sl, [r0], -r4
-    abcc:	0000afd4 	ldreqd	sl, [r0], -r4
-    abd0:	0000afd4 	ldreqd	sl, [r0], -r4
-    abd4:	0000aecc 	andeq	sl, r0, ip, asr #29
-    abd8:	0000af04 	andeq	sl, r0, r4, lsl #30
-    abdc:	0000af68 	andeq	sl, r0, r8, ror #30
-    abe0:	0000af94 	muleq	r0, r4, pc
-    abe4:	0000afa4 	andeq	sl, r0, r4, lsr #31
-    abe8:	e55b3011 	ldrb	r3, [fp, #-17]
-    abec:	e35300b5 	cmp	r3, #181	; 0xb5
-    abf0:	1a0000fa 	bne	afe0 <.text+0xafe0>
-    abf4:	e59f3408 	ldr	r3, [pc, #1032]	; b004 <.text+0xb004>
-    abf8:	e3a02001 	mov	r2, #1	; 0x1
-    abfc:	e5c32000 	strb	r2, [r3]
-    ac00:	ea0000f6 	b	afe0 <.text+0xafe0>
-    ac04:	e55b3011 	ldrb	r3, [fp, #-17]
-    ac08:	e3530062 	cmp	r3, #98	; 0x62
-    ac0c:	1a000003 	bne	ac20 <.text+0xac20>
-    ac10:	e59f33ec 	ldr	r3, [pc, #1004]	; b004 <.text+0xb004>
-    ac14:	e3a02002 	mov	r2, #2	; 0x2
-    ac18:	e5c32000 	strb	r2, [r3]
-    ac1c:	ea0000ef 	b	afe0 <.text+0xafe0>
-    ac20:	e59f33dc 	ldr	r3, [pc, #988]	; b004 <.text+0xb004>
-    ac24:	e3a02000 	mov	r2, #0	; 0x0
-    ac28:	e5c32000 	strb	r2, [r3]
-    ac2c:	ea0000eb 	b	afe0 <.text+0xafe0>
-    ac30:	e55b3011 	ldrb	r3, [fp, #-17]
-    ac34:	e3530001 	cmp	r3, #1	; 0x1
-    ac38:	1a000003 	bne	ac4c <.text+0xac4c>
-    ac3c:	e59f33c0 	ldr	r3, [pc, #960]	; b004 <.text+0xb004>
-    ac40:	e3a02003 	mov	r2, #3	; 0x3
-    ac44:	e5c32000 	strb	r2, [r3]
-    ac48:	ea0000e4 	b	afe0 <.text+0xafe0>
-    ac4c:	e55b3011 	ldrb	r3, [fp, #-17]
-    ac50:	e3530005 	cmp	r3, #5	; 0x5
-    ac54:	1a000003 	bne	ac68 <.text+0xac68>
-    ac58:	e59f33a4 	ldr	r3, [pc, #932]	; b004 <.text+0xb004>
-    ac5c:	e3a0200a 	mov	r2, #10	; 0xa
-    ac60:	e5c32000 	strb	r2, [r3]
-    ac64:	ea0000dd 	b	afe0 <.text+0xafe0>
-    ac68:	e59f3394 	ldr	r3, [pc, #916]	; b004 <.text+0xb004>
-    ac6c:	e3a02000 	mov	r2, #0	; 0x0
-    ac70:	e5c32000 	strb	r2, [r3]
-    ac74:	ea0000d9 	b	afe0 <.text+0xafe0>
-    ac78:	e59f2388 	ldr	r2, [pc, #904]	; b008 <.text+0xb008>
-    ac7c:	e55b3011 	ldrb	r3, [fp, #-17]
-    ac80:	e5c23000 	strb	r3, [r2]
-    ac84:	e59f2380 	ldr	r2, [pc, #896]	; b00c <.text+0xb00c>
-    ac88:	e3a03000 	mov	r3, #0	; 0x0
-    ac8c:	e1c230b0 	strh	r3, [r2]
-    ac90:	e59f236c 	ldr	r2, [pc, #876]	; b004 <.text+0xb004>
-    ac94:	e3a03004 	mov	r3, #4	; 0x4
-    ac98:	e5c23000 	strb	r3, [r2]
-    ac9c:	ea0000cf 	b	afe0 <.text+0xafe0>
-    aca0:	e59f3364 	ldr	r3, [pc, #868]	; b00c <.text+0xb00c>
-    aca4:	e1d330b0 	ldrh	r3, [r3]
-    aca8:	e3530000 	cmp	r3, #0	; 0x0
-    acac:	1a000002 	bne	acbc <.text+0xacbc>
-    acb0:	e55b2011 	ldrb	r2, [fp, #-17]
-    acb4:	e59f3354 	ldr	r3, [pc, #852]	; b010 <.text+0xb010>
-    acb8:	e1c320b0 	strh	r2, [r3]
-    acbc:	e59f3344 	ldr	r3, [pc, #836]	; b008 <.text+0xb008>
-    acc0:	e5d33000 	ldrb	r3, [r3]
-    acc4:	e3530006 	cmp	r3, #6	; 0x6
-    acc8:	1a000002 	bne	acd8 <.text+0xacd8>
-    accc:	e3a00000 	mov	r0, #0	; 0x0
-    acd0:	e3a01001 	mov	r1, #1	; 0x1
-    acd4:	ebfffec5 	bl	a7f0 <parse_NAVSOL>
-    acd8:	e59f332c 	ldr	r3, [pc, #812]	; b00c <.text+0xb00c>
-    acdc:	e1d330b0 	ldrh	r3, [r3]
-    ace0:	e2833001 	add	r3, r3, #1	; 0x1
-    ace4:	e1a03803 	mov	r3, r3, lsl #16
-    ace8:	e1a02823 	mov	r2, r3, lsr #16
-    acec:	e59f3318 	ldr	r3, [pc, #792]	; b00c <.text+0xb00c>
-    acf0:	e1c320b0 	strh	r2, [r3]
-    acf4:	e59f3310 	ldr	r3, [pc, #784]	; b00c <.text+0xb00c>
-    acf8:	e1d330b0 	ldrh	r3, [r3]
-    acfc:	e3530002 	cmp	r3, #2	; 0x2
-    ad00:	1a0000b6 	bne	afe0 <.text+0xafe0>
-    ad04:	e59f2300 	ldr	r2, [pc, #768]	; b00c <.text+0xb00c>
-    ad08:	e3a03000 	mov	r3, #0	; 0x0
-    ad0c:	e1c230b0 	strh	r3, [r2]
-    ad10:	e59f22ec 	ldr	r2, [pc, #748]	; b004 <.text+0xb004>
-    ad14:	e3a03005 	mov	r3, #5	; 0x5
-    ad18:	e5c23000 	strb	r3, [r2]
-    ad1c:	ea0000af 	b	afe0 <.text+0xafe0>
-    ad20:	e59f32e0 	ldr	r3, [pc, #736]	; b008 <.text+0xb008>
-    ad24:	e5d33000 	ldrb	r3, [r3]
-    ad28:	e3530006 	cmp	r3, #6	; 0x6
-    ad2c:	1a000003 	bne	ad40 <.text+0xad40>
-    ad30:	e55b3011 	ldrb	r3, [fp, #-17]
-    ad34:	e1a00003 	mov	r0, r3
-    ad38:	e3a01000 	mov	r1, #0	; 0x0
-    ad3c:	ebfffeab 	bl	a7f0 <parse_NAVSOL>
-    ad40:	e59f32c4 	ldr	r3, [pc, #708]	; b00c <.text+0xb00c>
-    ad44:	e1d330b0 	ldrh	r3, [r3]
-    ad48:	e2833001 	add	r3, r3, #1	; 0x1
-    ad4c:	e1a03803 	mov	r3, r3, lsl #16
-    ad50:	e1a02823 	mov	r2, r3, lsr #16
-    ad54:	e59f32b0 	ldr	r3, [pc, #688]	; b00c <.text+0xb00c>
-    ad58:	e1c320b0 	strh	r2, [r3]
-    ad5c:	e59f32a8 	ldr	r3, [pc, #680]	; b00c <.text+0xb00c>
-    ad60:	e1d330b0 	ldrh	r3, [r3]
-    ad64:	e3530004 	cmp	r3, #4	; 0x4
-    ad68:	1a00009c 	bne	afe0 <.text+0xafe0>
-    ad6c:	e59f2298 	ldr	r2, [pc, #664]	; b00c <.text+0xb00c>
-    ad70:	e3a03000 	mov	r3, #0	; 0x0
-    ad74:	e1c230b0 	strh	r3, [r2]
-    ad78:	e59f2284 	ldr	r2, [pc, #644]	; b004 <.text+0xb004>
-    ad7c:	e3a03006 	mov	r3, #6	; 0x6
-    ad80:	e5c23000 	strb	r3, [r2]
-    ad84:	e59f327c 	ldr	r3, [pc, #636]	; b008 <.text+0xb008>
-    ad88:	e5d33000 	ldrb	r3, [r3]
-    ad8c:	e3530002 	cmp	r3, #2	; 0x2
-    ad90:	1a000003 	bne	ada4 <.text+0xada4>
-    ad94:	e3a00000 	mov	r0, #0	; 0x0
-    ad98:	e3a01001 	mov	r1, #1	; 0x1
-    ad9c:	ebfffd0b 	bl	a1d0 <parse_POSLLH>
-    ada0:	ea00008e 	b	afe0 <.text+0xafe0>
-    ada4:	e59f325c 	ldr	r3, [pc, #604]	; b008 <.text+0xb008>
-    ada8:	e5d33000 	ldrb	r3, [r3]
-    adac:	e3530003 	cmp	r3, #3	; 0x3
-    adb0:	1a000003 	bne	adc4 <.text+0xadc4>
-    adb4:	e3a00000 	mov	r0, #0	; 0x0
-    adb8:	e3a01001 	mov	r1, #1	; 0x1
-    adbc:	ebfffeff 	bl	a9c0 <parse_STATUS>
-    adc0:	ea000086 	b	afe0 <.text+0xafe0>
-    adc4:	e59f323c 	ldr	r3, [pc, #572]	; b008 <.text+0xb008>
-    adc8:	e5d33000 	ldrb	r3, [r3]
-    adcc:	e3530012 	cmp	r3, #18	; 0x12
-    add0:	1a000082 	bne	afe0 <.text+0xafe0>
-    add4:	e3a00000 	mov	r0, #0	; 0x0
-    add8:	e3a01001 	mov	r1, #1	; 0x1
-    addc:	ebfffc01 	bl	9de8 <parse_VELNED>
-    ade0:	ea00007e 	b	afe0 <.text+0xafe0>
-    ade4:	e59f321c 	ldr	r3, [pc, #540]	; b008 <.text+0xb008>
-    ade8:	e5d33000 	ldrb	r3, [r3]
-    adec:	e3530002 	cmp	r3, #2	; 0x2
-    adf0:	1a000004 	bne	ae08 <.text+0xae08>
-    adf4:	e55b3011 	ldrb	r3, [fp, #-17]
-    adf8:	e1a00003 	mov	r0, r3
-    adfc:	e3a01000 	mov	r1, #0	; 0x0
-    ae00:	ebfffcf2 	bl	a1d0 <parse_POSLLH>
-    ae04:	ea00001d 	b	ae80 <.text+0xae80>
-    ae08:	e59f31f8 	ldr	r3, [pc, #504]	; b008 <.text+0xb008>
-    ae0c:	e5d33000 	ldrb	r3, [r3]
-    ae10:	e3530003 	cmp	r3, #3	; 0x3
-    ae14:	1a000004 	bne	ae2c <.text+0xae2c>
-    ae18:	e55b3011 	ldrb	r3, [fp, #-17]
-    ae1c:	e1a00003 	mov	r0, r3
-    ae20:	e3a01000 	mov	r1, #0	; 0x0
-    ae24:	ebfffee5 	bl	a9c0 <parse_STATUS>
-    ae28:	ea000014 	b	ae80 <.text+0xae80>
-    ae2c:	e59f31d4 	ldr	r3, [pc, #468]	; b008 <.text+0xb008>
-    ae30:	e5d33000 	ldrb	r3, [r3]
-    ae34:	e3530012 	cmp	r3, #18	; 0x12
-    ae38:	1a000004 	bne	ae50 <.text+0xae50>
-    ae3c:	e55b3011 	ldrb	r3, [fp, #-17]
-    ae40:	e1a00003 	mov	r0, r3
-    ae44:	e3a01000 	mov	r1, #0	; 0x0
-    ae48:	ebfffbe6 	bl	9de8 <parse_VELNED>
-    ae4c:	ea00000b 	b	ae80 <.text+0xae80>
-    ae50:	e59f31b0 	ldr	r3, [pc, #432]	; b008 <.text+0xb008>
-    ae54:	e5d33000 	ldrb	r3, [r3]
-    ae58:	e3530006 	cmp	r3, #6	; 0x6
-    ae5c:	1a000004 	bne	ae74 <.text+0xae74>
-    ae60:	e55b3011 	ldrb	r3, [fp, #-17]
-    ae64:	e1a00003 	mov	r0, r3
-    ae68:	e3a01000 	mov	r1, #0	; 0x0
-    ae6c:	ebfffe5f 	bl	a7f0 <parse_NAVSOL>
-    ae70:	ea000002 	b	ae80 <.text+0xae80>
-    ae74:	e59f3188 	ldr	r3, [pc, #392]	; b004 <.text+0xb004>
-    ae78:	e3a02000 	mov	r2, #0	; 0x0
-    ae7c:	e5c32000 	strb	r2, [r3]
-    ae80:	e59f3184 	ldr	r3, [pc, #388]	; b00c <.text+0xb00c>
-    ae84:	e1d330b0 	ldrh	r3, [r3]
-    ae88:	e2833001 	add	r3, r3, #1	; 0x1
-    ae8c:	e1a03803 	mov	r3, r3, lsl #16
-    ae90:	e1a02823 	mov	r2, r3, lsr #16
-    ae94:	e59f3170 	ldr	r3, [pc, #368]	; b00c <.text+0xb00c>
-    ae98:	e1c320b0 	strh	r2, [r3]
-    ae9c:	e59f3168 	ldr	r3, [pc, #360]	; b00c <.text+0xb00c>
-    aea0:	e1d330b0 	ldrh	r3, [r3]
-    aea4:	e1a02003 	mov	r2, r3
-    aea8:	e59f3160 	ldr	r3, [pc, #352]	; b010 <.text+0xb010>
-    aeac:	e1d330b0 	ldrh	r3, [r3]
-    aeb0:	e2433004 	sub	r3, r3, #4	; 0x4
-    aeb4:	e1520003 	cmp	r2, r3
-    aeb8:	ba000048 	blt	afe0 <.text+0xafe0>
-    aebc:	e59f3140 	ldr	r3, [pc, #320]	; b004 <.text+0xb004>
-    aec0:	e3a02000 	mov	r2, #0	; 0x0
-    aec4:	e5c32000 	strb	r2, [r3]
-    aec8:	ea000044 	b	afe0 <.text+0xafe0>
-    aecc:	e55b3011 	ldrb	r3, [fp, #-17]
-    aed0:	e3530001 	cmp	r3, #1	; 0x1
-    aed4:	1a000006 	bne	aef4 <.text+0xaef4>
-    aed8:	e59f212c 	ldr	r2, [pc, #300]	; b00c <.text+0xb00c>
-    aedc:	e3a03000 	mov	r3, #0	; 0x0
-    aee0:	e1c230b0 	strh	r3, [r2]
-    aee4:	e59f2118 	ldr	r2, [pc, #280]	; b004 <.text+0xb004>
-    aee8:	e3a0300b 	mov	r3, #11	; 0xb
-    aeec:	e5c23000 	strb	r3, [r2]
-    aef0:	ea00003a 	b	afe0 <.text+0xafe0>
-    aef4:	e59f3108 	ldr	r3, [pc, #264]	; b004 <.text+0xb004>
-    aef8:	e3a02000 	mov	r2, #0	; 0x0
-    aefc:	e5c32000 	strb	r2, [r3]
-    af00:	ea000036 	b	afe0 <.text+0xafe0>
-    af04:	e59f3100 	ldr	r3, [pc, #256]	; b00c <.text+0xb00c>
-    af08:	e1d330b0 	ldrh	r3, [r3]
-    af0c:	e3530000 	cmp	r3, #0	; 0x0
-    af10:	1a000002 	bne	af20 <.text+0xaf20>
-    af14:	e55b2011 	ldrb	r2, [fp, #-17]
-    af18:	e59f30f0 	ldr	r3, [pc, #240]	; b010 <.text+0xb010>
-    af1c:	e1c320b0 	strh	r2, [r3]
-    af20:	e59f30e4 	ldr	r3, [pc, #228]	; b00c <.text+0xb00c>
-    af24:	e1d330b0 	ldrh	r3, [r3]
-    af28:	e2833001 	add	r3, r3, #1	; 0x1
-    af2c:	e1a03803 	mov	r3, r3, lsl #16
-    af30:	e1a02823 	mov	r2, r3, lsr #16
-    af34:	e59f30d0 	ldr	r3, [pc, #208]	; b00c <.text+0xb00c>
-    af38:	e1c320b0 	strh	r2, [r3]
-    af3c:	e59f30c8 	ldr	r3, [pc, #200]	; b00c <.text+0xb00c>
-    af40:	e1d330b0 	ldrh	r3, [r3]
-    af44:	e3530002 	cmp	r3, #2	; 0x2
-    af48:	1a000024 	bne	afe0 <.text+0xafe0>
-    af4c:	e59f20b8 	ldr	r2, [pc, #184]	; b00c <.text+0xb00c>
-    af50:	e3a03000 	mov	r3, #0	; 0x0
-    af54:	e1c230b0 	strh	r3, [r2]
-    af58:	e59f20a4 	ldr	r2, [pc, #164]	; b004 <.text+0xb004>
-    af5c:	e3a0300c 	mov	r3, #12	; 0xc
-    af60:	e5c23000 	strb	r3, [r2]
-    af64:	ea00001d 	b	afe0 <.text+0xafe0>
-    af68:	e55b3011 	ldrb	r3, [fp, #-17]
-    af6c:	e3530006 	cmp	r3, #6	; 0x6
-    af70:	1a000003 	bne	af84 <.text+0xaf84>
-    af74:	e59f3088 	ldr	r3, [pc, #136]	; b004 <.text+0xb004>
-    af78:	e3a0200d 	mov	r2, #13	; 0xd
-    af7c:	e5c32000 	strb	r2, [r3]
-    af80:	ea000016 	b	afe0 <.text+0xafe0>
-    af84:	e59f3078 	ldr	r3, [pc, #120]	; b004 <.text+0xb004>
-    af88:	e3a02000 	mov	r2, #0	; 0x0
-    af8c:	e5c32000 	strb	r2, [r3]
-    af90:	ea000012 	b	afe0 <.text+0xafe0>
-    af94:	e59f3068 	ldr	r3, [pc, #104]	; b004 <.text+0xb004>
-    af98:	e3a0200e 	mov	r2, #14	; 0xe
-    af9c:	e5c32000 	strb	r2, [r3]
-    afa0:	ea00000e 	b	afe0 <.text+0xafe0>
-    afa4:	e59f3068 	ldr	r3, [pc, #104]	; b014 <.text+0xb014>
-    afa8:	e5d33000 	ldrb	r3, [r3]
-    afac:	e20330ff 	and	r3, r3, #255	; 0xff
-    afb0:	e3530000 	cmp	r3, #0	; 0x0
-    afb4:	1a000009 	bne	afe0 <.text+0xafe0>
-    afb8:	e59f2054 	ldr	r2, [pc, #84]	; b014 <.text+0xb014>
-    afbc:	e3a03001 	mov	r3, #1	; 0x1
-    afc0:	e5c23000 	strb	r3, [r2]
-    afc4:	e59f2038 	ldr	r2, [pc, #56]	; b004 <.text+0xb004>
-    afc8:	e3a03000 	mov	r3, #0	; 0x0
-    afcc:	e5c23000 	strb	r3, [r2]
-    afd0:	ea000002 	b	afe0 <.text+0xafe0>
-    afd4:	e59f3028 	ldr	r3, [pc, #40]	; b004 <.text+0xb004>
-    afd8:	e3a02000 	mov	r2, #0	; 0x0
-    afdc:	e5c32000 	strb	r2, [r3]
-    afe0:	e3a03000 	mov	r3, #0	; 0x0
-    afe4:	e2433efd 	sub	r3, r3, #4048	; 0xfd0
-    afe8:	e3a02000 	mov	r2, #0	; 0x0
-    afec:	e5832000 	str	r2, [r3]
-    aff0:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    aff4:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    aff8:	e12fff1e 	bx	lr
-    affc:	400008fa 	strmid	r0, [r0], -sl
-    b000:	400008fc 	strmid	r0, [r0], -ip
-    b004:	4000094f 	andmi	r0, r0, pc, asr #18
-    b008:	4000094e 	andmi	r0, r0, lr, asr #18
-    b00c:	4000094c 	andmi	r0, r0, ip, asr #18
-    b010:	4000094a 	andmi	r0, r0, sl, asr #18
-    b014:	40000906 	andmi	r0, r0, r6, lsl #18
-
-0000b018 <UART1Initialize>:
-    b018:	e1a0c00d 	mov	ip, sp
-    b01c:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    b020:	e24cb004 	sub	fp, ip, #4	; 0x4
-    b024:	e24dd008 	sub	sp, sp, #8	; 0x8
-    b028:	e50b0014 	str	r0, [fp, #-20]
-    b02c:	ebfff615 	bl	8888 <peripheralClockFrequency>
-    b030:	e1a02000 	mov	r2, r0
-    b034:	e51b3014 	ldr	r3, [fp, #-20]
-    b038:	e1a03203 	mov	r3, r3, lsl #4
-    b03c:	e1a00002 	mov	r0, r2
-    b040:	e1a01003 	mov	r1, r3
-    b044:	eb002848 	bl	1516c <____udivsi3_from_arm>
-    b048:	e1a03000 	mov	r3, r0
-    b04c:	e50b3010 	str	r3, [fp, #-16]
-    b050:	e3a032ce 	mov	r3, #-536870900	; 0xe000000c
-    b054:	e2833801 	add	r3, r3, #65536	; 0x10000
-    b058:	e3a02083 	mov	r2, #131	; 0x83
-    b05c:	e5832000 	str	r2, [r3]
-    b060:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    b064:	e2833801 	add	r3, r3, #65536	; 0x10000
-    b068:	e51b2010 	ldr	r2, [fp, #-16]
-    b06c:	e20220ff 	and	r2, r2, #255	; 0xff
-    b070:	e5832000 	str	r2, [r3]
-    b074:	e3a0224e 	mov	r2, #-536870908	; 0xe0000004
-    b078:	e2822801 	add	r2, r2, #65536	; 0x10000
-    b07c:	e51b3010 	ldr	r3, [fp, #-16]
-    b080:	e1a03423 	mov	r3, r3, lsr #8
-    b084:	e20330ff 	and	r3, r3, #255	; 0xff
-    b088:	e5823000 	str	r3, [r2]
-    b08c:	e3a022ce 	mov	r2, #-536870900	; 0xe000000c
-    b090:	e2822801 	add	r2, r2, #65536	; 0x10000
-    b094:	e3a032ce 	mov	r3, #-536870900	; 0xe000000c
-    b098:	e2833801 	add	r3, r3, #65536	; 0x10000
-    b09c:	e5933000 	ldr	r3, [r3]
-    b0a0:	e3c33080 	bic	r3, r3, #128	; 0x80
-    b0a4:	e5823000 	str	r3, [r2]
-    b0a8:	e3a0328e 	mov	r3, #-536870904	; 0xe0000008
-    b0ac:	e2833801 	add	r3, r3, #65536	; 0x10000
-    b0b0:	e3a02001 	mov	r2, #1	; 0x1
-    b0b4:	e5832000 	str	r2, [r3]
-    b0b8:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    b0bc:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    b0c0:	e12fff1e 	bx	lr
-
-0000b0c4 <UART1WriteChar>:
-    b0c4:	e1a0c00d 	mov	ip, sp
-    b0c8:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    b0cc:	e24cb004 	sub	fp, ip, #4	; 0x4
-    b0d0:	e24dd004 	sub	sp, sp, #4	; 0x4
-    b0d4:	e1a03000 	mov	r3, r0
-    b0d8:	e54b3010 	strb	r3, [fp, #-16]
-    b0dc:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    b0e0:	e2833801 	add	r3, r3, #65536	; 0x10000
-    b0e4:	e2833014 	add	r3, r3, #20	; 0x14
-    b0e8:	e5933000 	ldr	r3, [r3]
-    b0ec:	e2033020 	and	r3, r3, #32	; 0x20
-    b0f0:	e3530000 	cmp	r3, #0	; 0x0
-    b0f4:	0afffff8 	beq	b0dc <UART1WriteChar+0x18>
-    b0f8:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    b0fc:	e2833801 	add	r3, r3, #65536	; 0x10000
-    b100:	e55b2010 	ldrb	r2, [fp, #-16]
-    b104:	e5832000 	str	r2, [r3]
-    b108:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    b10c:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    b110:	e12fff1e 	bx	lr
-
-0000b114 <UART1ReadChar>:
-    b114:	e1a0c00d 	mov	ip, sp
-    b118:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    b11c:	e24cb004 	sub	fp, ip, #4	; 0x4
-    b120:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    b124:	e2833801 	add	r3, r3, #65536	; 0x10000
-    b128:	e2833014 	add	r3, r3, #20	; 0x14
-    b12c:	e5933000 	ldr	r3, [r3]
-    b130:	e2033001 	and	r3, r3, #1	; 0x1
-    b134:	e3530000 	cmp	r3, #0	; 0x0
-    b138:	0afffff8 	beq	b120 <UART1ReadChar+0xc>
-    b13c:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    b140:	e2833801 	add	r3, r3, #65536	; 0x10000
-    b144:	e5933000 	ldr	r3, [r3]
-    b148:	e20330ff 	and	r3, r3, #255	; 0xff
-    b14c:	e1a00003 	mov	r0, r3
-    b150:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    b154:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    b158:	e12fff1e 	bx	lr
-
-0000b15c <UART1_send>:
-    b15c:	e1a0c00d 	mov	ip, sp
-    b160:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    b164:	e24cb004 	sub	fp, ip, #4	; 0x4
-    b168:	e24dd00c 	sub	sp, sp, #12	; 0xc
-    b16c:	e50b0014 	str	r0, [fp, #-20]
-    b170:	e1a03001 	mov	r3, r1
-    b174:	e54b3018 	strb	r3, [fp, #-24]
-    b178:	e3a03000 	mov	r3, #0	; 0x0
-    b17c:	e54b300d 	strb	r3, [fp, #-13]
-    b180:	ea000011 	b	b1cc <UART1_send+0x70>
-    b184:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    b188:	e2833903 	add	r3, r3, #49152	; 0xc000
-    b18c:	e2833014 	add	r3, r3, #20	; 0x14
-    b190:	e5933000 	ldr	r3, [r3]
-    b194:	e2033020 	and	r3, r3, #32	; 0x20
-    b198:	e3530000 	cmp	r3, #0	; 0x0
-    b19c:	0afffff8 	beq	b184 <UART1_send+0x28>
-    b1a0:	e3a0220e 	mov	r2, #-536870912	; 0xe0000000
-    b1a4:	e2822801 	add	r2, r2, #65536	; 0x10000
-    b1a8:	e55b300d 	ldrb	r3, [fp, #-13]
-    b1ac:	e1a01003 	mov	r1, r3
-    b1b0:	e51b3014 	ldr	r3, [fp, #-20]
-    b1b4:	e0813003 	add	r3, r1, r3
-    b1b8:	e5d33000 	ldrb	r3, [r3]
-    b1bc:	e5823000 	str	r3, [r2]
-    b1c0:	e55b300d 	ldrb	r3, [fp, #-13]
-    b1c4:	e2833001 	add	r3, r3, #1	; 0x1
-    b1c8:	e54b300d 	strb	r3, [fp, #-13]
-    b1cc:	e55b3018 	ldrb	r3, [fp, #-24]
-    b1d0:	e2433001 	sub	r3, r3, #1	; 0x1
-    b1d4:	e54b3018 	strb	r3, [fp, #-24]
-    b1d8:	e55b3018 	ldrb	r3, [fp, #-24]
-    b1dc:	e35300ff 	cmp	r3, #255	; 0xff
-    b1e0:	1affffe7 	bne	b184 <UART1_send+0x28>
-    b1e4:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    b1e8:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    b1ec:	e12fff1e 	bx	lr
-
-0000b1f0 <UART1_send_ringbuffer>:
-    b1f0:	e1a0c00d 	mov	ip, sp
-    b1f4:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    b1f8:	e24cb004 	sub	fp, ip, #4	; 0x4
-    b1fc:	e24dd004 	sub	sp, sp, #4	; 0x4
-    b200:	e59f304c 	ldr	r3, [pc, #76]	; b254 <.text+0xb254>
-    b204:	e5d33000 	ldrb	r3, [r3]
-    b208:	e3530000 	cmp	r3, #0	; 0x0
-    b20c:	1a00000d 	bne	b248 <UART1_send_ringbuffer+0x58>
-    b210:	e24b300d 	sub	r3, fp, #13	; 0xd
-    b214:	e3a00000 	mov	r0, #0	; 0x0
-    b218:	e1a01003 	mov	r1, r3
-    b21c:	e3a02001 	mov	r2, #1	; 0x1
-    b220:	eb00000c 	bl	b258 <ringbuffer1>
-    b224:	e1a03000 	mov	r3, r0
-    b228:	e3530000 	cmp	r3, #0	; 0x0
-    b22c:	0a000005 	beq	b248 <UART1_send_ringbuffer+0x58>
-    b230:	e59f201c 	ldr	r2, [pc, #28]	; b254 <.text+0xb254>
-    b234:	e3a03001 	mov	r3, #1	; 0x1
-    b238:	e5c23000 	strb	r3, [r2]
-    b23c:	e55b300d 	ldrb	r3, [fp, #-13]
-    b240:	e1a00003 	mov	r0, r3
-    b244:	ebffff9e 	bl	b0c4 <UART1WriteChar>
-    b248:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    b24c:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    b250:	e12fff1e 	bx	lr
-    b254:	400008fa 	strmid	r0, [r0], -sl
-
-0000b258 <ringbuffer1>:
-    b258:	e1a0c00d 	mov	ip, sp
-    b25c:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    b260:	e24cb004 	sub	fp, ip, #4	; 0x4
-    b264:	e24dd018 	sub	sp, sp, #24	; 0x18
-    b268:	e1a03000 	mov	r3, r0
-    b26c:	e50b101c 	str	r1, [fp, #-28]
-    b270:	e50b2020 	str	r2, [fp, #-32]
-    b274:	e54b3018 	strb	r3, [fp, #-24]
-    b278:	e3a03000 	mov	r3, #0	; 0x0
-    b27c:	e50b3014 	str	r3, [fp, #-20]
-    b280:	e3a03000 	mov	r3, #0	; 0x0
-    b284:	e50b3010 	str	r3, [fp, #-16]
-    b288:	e55b3018 	ldrb	r3, [fp, #-24]
-    b28c:	e3530001 	cmp	r3, #1	; 0x1
-    b290:	1a000021 	bne	b31c <ringbuffer1+0xc4>
-    b294:	e59f3198 	ldr	r3, [pc, #408]	; b434 <.text+0xb434>
-    b298:	e5933000 	ldr	r3, [r3]
-    b29c:	e2632d06 	rsb	r2, r3, #384	; 0x180
-    b2a0:	e51b3020 	ldr	r3, [fp, #-32]
-    b2a4:	e1520003 	cmp	r2, r3
-    b2a8:	9a00005a 	bls	b418 <ringbuffer1+0x1c0>
-    b2ac:	ea00000d 	b	b2e8 <ringbuffer1+0x90>
-    b2b0:	e59f3180 	ldr	r3, [pc, #384]	; b438 <.text+0xb438>
-    b2b4:	e5931000 	ldr	r1, [r3]
-    b2b8:	e51b2014 	ldr	r2, [fp, #-20]
-    b2bc:	e51b301c 	ldr	r3, [fp, #-28]
-    b2c0:	e0823003 	add	r3, r2, r3
-    b2c4:	e5d33000 	ldrb	r3, [r3]
-    b2c8:	e59f216c 	ldr	r2, [pc, #364]	; b43c <.text+0xb43c>
-    b2cc:	e7c23001 	strb	r3, [r2, r1]
-    b2d0:	e2812001 	add	r2, r1, #1	; 0x1
-    b2d4:	e59f315c 	ldr	r3, [pc, #348]	; b438 <.text+0xb438>
-    b2d8:	e5832000 	str	r2, [r3]
-    b2dc:	e51b3014 	ldr	r3, [fp, #-20]
-    b2e0:	e2833001 	add	r3, r3, #1	; 0x1
-    b2e4:	e50b3014 	str	r3, [fp, #-20]
-    b2e8:	e51b2014 	ldr	r2, [fp, #-20]
-    b2ec:	e51b3020 	ldr	r3, [fp, #-32]
-    b2f0:	e1520003 	cmp	r2, r3
-    b2f4:	3affffed 	bcc	b2b0 <ringbuffer1+0x58>
-    b2f8:	e59f3134 	ldr	r3, [pc, #308]	; b434 <.text+0xb434>
-    b2fc:	e5932000 	ldr	r2, [r3]
-    b300:	e51b3020 	ldr	r3, [fp, #-32]
-    b304:	e0822003 	add	r2, r2, r3
-    b308:	e59f3124 	ldr	r3, [pc, #292]	; b434 <.text+0xb434>
-    b30c:	e5832000 	str	r2, [r3]
-    b310:	e3a03001 	mov	r3, #1	; 0x1
-    b314:	e50b3024 	str	r3, [fp, #-36]
-    b318:	ea000040 	b	b420 <ringbuffer1+0x1c8>
-    b31c:	e55b3018 	ldrb	r3, [fp, #-24]
-    b320:	e3530000 	cmp	r3, #0	; 0x0
-    b324:	1a00002b 	bne	b3d8 <ringbuffer1+0x180>
-    b328:	e59f3104 	ldr	r3, [pc, #260]	; b434 <.text+0xb434>
-    b32c:	e5932000 	ldr	r2, [r3]
-    b330:	e51b3020 	ldr	r3, [fp, #-32]
-    b334:	e1520003 	cmp	r2, r3
-    b338:	3a000036 	bcc	b418 <ringbuffer1+0x1c0>
-    b33c:	ea00000e 	b	b37c <ringbuffer1+0x124>
-    b340:	e51b2010 	ldr	r2, [fp, #-16]
-    b344:	e51b301c 	ldr	r3, [fp, #-28]
-    b348:	e0822003 	add	r2, r2, r3
-    b34c:	e59f30ec 	ldr	r3, [pc, #236]	; b440 <.text+0xb440>
-    b350:	e5931000 	ldr	r1, [r3]
-    b354:	e59f30e0 	ldr	r3, [pc, #224]	; b43c <.text+0xb43c>
-    b358:	e7d33001 	ldrb	r3, [r3, r1]
-    b35c:	e20330ff 	and	r3, r3, #255	; 0xff
-    b360:	e5c23000 	strb	r3, [r2]
-    b364:	e51b3010 	ldr	r3, [fp, #-16]
-    b368:	e2833001 	add	r3, r3, #1	; 0x1
-    b36c:	e50b3010 	str	r3, [fp, #-16]
-    b370:	e2812001 	add	r2, r1, #1	; 0x1
-    b374:	e59f30c4 	ldr	r3, [pc, #196]	; b440 <.text+0xb440>
-    b378:	e5832000 	str	r2, [r3]
-    b37c:	e51b2010 	ldr	r2, [fp, #-16]
-    b380:	e51b3020 	ldr	r3, [fp, #-32]
-    b384:	e1520003 	cmp	r2, r3
-    b388:	3affffec 	bcc	b340 <ringbuffer1+0xe8>
-    b38c:	e59f30a0 	ldr	r3, [pc, #160]	; b434 <.text+0xb434>
-    b390:	e5932000 	ldr	r2, [r3]
-    b394:	e51b3020 	ldr	r3, [fp, #-32]
-    b398:	e0632002 	rsb	r2, r3, r2
-    b39c:	e59f3090 	ldr	r3, [pc, #144]	; b434 <.text+0xb434>
-    b3a0:	e5832000 	str	r2, [r3]
-    b3a4:	e59f3088 	ldr	r3, [pc, #136]	; b434 <.text+0xb434>
-    b3a8:	e5933000 	ldr	r3, [r3]
-    b3ac:	e3530000 	cmp	r3, #0	; 0x0
-    b3b0:	1a000005 	bne	b3cc <ringbuffer1+0x174>
-    b3b4:	e59f207c 	ldr	r2, [pc, #124]	; b438 <.text+0xb438>
-    b3b8:	e3a03000 	mov	r3, #0	; 0x0
-    b3bc:	e5823000 	str	r3, [r2]
-    b3c0:	e59f2078 	ldr	r2, [pc, #120]	; b440 <.text+0xb440>
-    b3c4:	e3a03000 	mov	r3, #0	; 0x0
-    b3c8:	e5823000 	str	r3, [r2]
-    b3cc:	e3a03001 	mov	r3, #1	; 0x1
-    b3d0:	e50b3024 	str	r3, [fp, #-36]
-    b3d4:	ea000011 	b	b420 <ringbuffer1+0x1c8>
-    b3d8:	e55b3018 	ldrb	r3, [fp, #-24]
-    b3dc:	e3530002 	cmp	r3, #2	; 0x2
-    b3e0:	1a00000c 	bne	b418 <ringbuffer1+0x1c0>
-    b3e4:	e59f3048 	ldr	r3, [pc, #72]	; b434 <.text+0xb434>
-    b3e8:	e5933000 	ldr	r3, [r3]
-    b3ec:	e3530000 	cmp	r3, #0	; 0x0
-    b3f0:	0a000002 	beq	b400 <ringbuffer1+0x1a8>
-    b3f4:	e3a03000 	mov	r3, #0	; 0x0
-    b3f8:	e50b3024 	str	r3, [fp, #-36]
-    b3fc:	ea000007 	b	b420 <ringbuffer1+0x1c8>
-    b400:	e3a03f5d 	mov	r3, #372	; 0x174
-    b404:	e50b3024 	str	r3, [fp, #-36]
-    b408:	e51b3024 	ldr	r3, [fp, #-36]
-    b40c:	e2833001 	add	r3, r3, #1	; 0x1
-    b410:	e50b3024 	str	r3, [fp, #-36]
-    b414:	ea000001 	b	b420 <ringbuffer1+0x1c8>
-    b418:	e3a03000 	mov	r3, #0	; 0x0
-    b41c:	e50b3024 	str	r3, [fp, #-36]
-    b420:	e51b3024 	ldr	r3, [fp, #-36]
-    b424:	e1a00003 	mov	r0, r3
-    b428:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    b42c:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    b430:	e12fff1e 	bx	lr
-    b434:	40000950 	andmi	r0, r0, r0, asr r9
-    b438:	40000954 	andmi	r0, r0, r4, asr r9
-    b43c:	4000095c 	andmi	r0, r0, ip, asr r9
-    b440:	40000958 	andmi	r0, r0, r8, asr r9
-
-0000b444 <GPS_configure>:
-    b444:	e1a0c00d 	mov	ip, sp
-    b448:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    b44c:	e24cb004 	sub	fp, ip, #4	; 0x4
-    b450:	e24dd004 	sub	sp, sp, #4	; 0x4
-    b454:	e59f3608 	ldr	r3, [pc, #1544]	; ba64 <.text+0xba64>
-    b458:	e5d33000 	ldrb	r3, [r3]
-    b45c:	e3530007 	cmp	r3, #7	; 0x7
-    b460:	979ff103 	ldrls	pc, [pc, r3, lsl #2]
-    b464:	ea000160 	b	b9ec <.text+0xb9ec>
-    b468:	0000b488 	andeq	fp, r0, r8, lsl #9
-    b46c:	0000b53c 	andeq	fp, r0, ip, lsr r5
-    b470:	0000b604 	andeq	fp, r0, r4, lsl #12
-    b474:	0000b6f8 	streqd	fp, [r0], -r8
-    b478:	0000b79c 	muleq	r0, ip, r7
-    b47c:	0000b840 	andeq	fp, r0, r0, asr #16
-    b480:	0000b8e4 	andeq	fp, r0, r4, ror #17
-    b484:	0000b988 	andeq	fp, r0, r8, lsl #19
-    b488:	e59f35d8 	ldr	r3, [pc, #1496]	; ba68 <.text+0xba68>
-    b48c:	e5d33000 	ldrb	r3, [r3]
-    b490:	e3530000 	cmp	r3, #0	; 0x0
-    b494:	0a000005 	beq	b4b0 <.text+0xb4b0>
-    b498:	e3a00ce1 	mov	r0, #57600	; 0xe100
-    b49c:	ebfffedd 	bl	b018 <UART1Initialize>
-    b4a0:	e59f35c0 	ldr	r3, [pc, #1472]	; ba68 <.text+0xba68>
-    b4a4:	e3a02000 	mov	r2, #0	; 0x0
-    b4a8:	e5c32000 	strb	r2, [r3]
-    b4ac:	ea000001 	b	b4b8 <.text+0xb4b8>
-    b4b0:	e3a00d96 	mov	r0, #9600	; 0x2580
-    b4b4:	ebfffed7 	bl	b018 <UART1Initialize>
-    b4b8:	e3a00002 	mov	r0, #2	; 0x2
-    b4bc:	e3a01000 	mov	r1, #0	; 0x0
-    b4c0:	e3a02000 	mov	r2, #0	; 0x0
-    b4c4:	ebffff63 	bl	b258 <ringbuffer1>
-    b4c8:	e1a03000 	mov	r3, r0
-    b4cc:	e353001c 	cmp	r3, #28	; 0x1c
-    b4d0:	da000015 	ble	b52c <.text+0xb52c>
-    b4d4:	e3a00001 	mov	r0, #1	; 0x1
-    b4d8:	e59f158c 	ldr	r1, [pc, #1420]	; ba6c <.text+0xba6c>
-    b4dc:	e3a02002 	mov	r2, #2	; 0x2
-    b4e0:	ebffff5c 	bl	b258 <ringbuffer1>
-    b4e4:	e1a03000 	mov	r3, r0
-    b4e8:	e50b3010 	str	r3, [fp, #-16]
-    b4ec:	e3a00001 	mov	r0, #1	; 0x1
-    b4f0:	e59f1578 	ldr	r1, [pc, #1400]	; ba70 <.text+0xba70>
-    b4f4:	e3a0201a 	mov	r2, #26	; 0x1a
-    b4f8:	ebffff56 	bl	b258 <ringbuffer1>
-    b4fc:	e1a03000 	mov	r3, r0
-    b500:	e50b3010 	str	r3, [fp, #-16]
-    b504:	ebffff39 	bl	b1f0 <UART1_send_ringbuffer>
-    b508:	e59f2564 	ldr	r2, [pc, #1380]	; ba74 <.text+0xba74>
-    b50c:	e3a03001 	mov	r3, #1	; 0x1
-    b510:	e5c23000 	strb	r3, [r2]
-    b514:	e59f3548 	ldr	r3, [pc, #1352]	; ba64 <.text+0xba64>
-    b518:	e5d33000 	ldrb	r3, [r3]
-    b51c:	e2833001 	add	r3, r3, #1	; 0x1
-    b520:	e20330ff 	and	r3, r3, #255	; 0xff
-    b524:	e59f2538 	ldr	r2, [pc, #1336]	; ba64 <.text+0xba64>
-    b528:	e5c23000 	strb	r3, [r2]
-    b52c:	e59f3544 	ldr	r3, [pc, #1348]	; ba78 <.text+0xba78>
-    b530:	e3a02000 	mov	r2, #0	; 0x0
-    b534:	e5c32000 	strb	r2, [r3]
-    b538:	ea00012e 	b	b9f8 <.text+0xb9f8>
-    b53c:	e59f3538 	ldr	r3, [pc, #1336]	; ba7c <.text+0xba7c>
-    b540:	e5d33000 	ldrb	r3, [r3]
-    b544:	e20330ff 	and	r3, r3, #255	; 0xff
-    b548:	e3530000 	cmp	r3, #0	; 0x0
-    b54c:	0a000022 	beq	b5dc <.text+0xb5dc>
-    b550:	e59f2524 	ldr	r2, [pc, #1316]	; ba7c <.text+0xba7c>
-    b554:	e3a03000 	mov	r3, #0	; 0x0
-    b558:	e5c23000 	strb	r3, [r2]
-    b55c:	e3a00002 	mov	r0, #2	; 0x2
-    b560:	e3a01000 	mov	r1, #0	; 0x0
-    b564:	e3a02000 	mov	r2, #0	; 0x0
-    b568:	ebffff3a 	bl	b258 <ringbuffer1>
-    b56c:	e1a03000 	mov	r3, r0
-    b570:	e353000c 	cmp	r3, #12	; 0xc
-    b574:	da000011 	ble	b5c0 <.text+0xb5c0>
-    b578:	e3a00001 	mov	r0, #1	; 0x1
-    b57c:	e59f14e8 	ldr	r1, [pc, #1256]	; ba6c <.text+0xba6c>
-    b580:	e3a02002 	mov	r2, #2	; 0x2
-    b584:	ebffff33 	bl	b258 <ringbuffer1>
-    b588:	e3a00001 	mov	r0, #1	; 0x1
-    b58c:	e59f14ec 	ldr	r1, [pc, #1260]	; ba80 <.text+0xba80>
-    b590:	e3a0200a 	mov	r2, #10	; 0xa
-    b594:	ebffff2f 	bl	b258 <ringbuffer1>
-    b598:	ebffff14 	bl	b1f0 <UART1_send_ringbuffer>
-    b59c:	e59f24e0 	ldr	r2, [pc, #1248]	; ba84 <.text+0xba84>
-    b5a0:	e3a03000 	mov	r3, #0	; 0x0
-    b5a4:	e5c23000 	strb	r3, [r2]
-    b5a8:	e59f34b4 	ldr	r3, [pc, #1204]	; ba64 <.text+0xba64>
-    b5ac:	e5d33000 	ldrb	r3, [r3]
-    b5b0:	e2833001 	add	r3, r3, #1	; 0x1
-    b5b4:	e20330ff 	and	r3, r3, #255	; 0xff
-    b5b8:	e59f24a4 	ldr	r2, [pc, #1188]	; ba64 <.text+0xba64>
-    b5bc:	e5c23000 	strb	r3, [r2]
-    b5c0:	e59f24b0 	ldr	r2, [pc, #1200]	; ba78 <.text+0xba78>
-    b5c4:	e3a03000 	mov	r3, #0	; 0x0
-    b5c8:	e5c23000 	strb	r3, [r2]
-    b5cc:	e59f2494 	ldr	r2, [pc, #1172]	; ba68 <.text+0xba68>
-    b5d0:	e3a03000 	mov	r3, #0	; 0x0
-    b5d4:	e5c23000 	strb	r3, [r2]
-    b5d8:	ea000106 	b	b9f8 <.text+0xb9f8>
-    b5dc:	e59f3494 	ldr	r3, [pc, #1172]	; ba78 <.text+0xba78>
-    b5e0:	e5d33000 	ldrb	r3, [r3]
-    b5e4:	e2833001 	add	r3, r3, #1	; 0x1
-    b5e8:	e20330ff 	and	r3, r3, #255	; 0xff
-    b5ec:	e59f2484 	ldr	r2, [pc, #1156]	; ba78 <.text+0xba78>
-    b5f0:	e5c23000 	strb	r3, [r2]
-    b5f4:	e59f246c 	ldr	r2, [pc, #1132]	; ba68 <.text+0xba68>
-    b5f8:	e3a03001 	mov	r3, #1	; 0x1
-    b5fc:	e5c23000 	strb	r3, [r2]
-    b600:	ea0000fc 	b	b9f8 <.text+0xb9f8>
-    b604:	e59f3470 	ldr	r3, [pc, #1136]	; ba7c <.text+0xba7c>
-    b608:	e5d33000 	ldrb	r3, [r3]
-    b60c:	e20330ff 	and	r3, r3, #255	; 0xff
-    b610:	e3530000 	cmp	r3, #0	; 0x0
-    b614:	0a000030 	beq	b6dc <.text+0xb6dc>
-    b618:	e59f245c 	ldr	r2, [pc, #1116]	; ba7c <.text+0xba7c>
-    b61c:	e3a03000 	mov	r3, #0	; 0x0
-    b620:	e5c23000 	strb	r3, [r2]
-    b624:	e3a00002 	mov	r0, #2	; 0x2
-    b628:	e3a01000 	mov	r1, #0	; 0x0
-    b62c:	e3a02000 	mov	r2, #0	; 0x0
-    b630:	ebffff08 	bl	b258 <ringbuffer1>
-    b634:	e1a03000 	mov	r3, r0
-    b638:	e353000e 	cmp	r3, #14	; 0xe
-    b63c:	da000022 	ble	b6cc <.text+0xb6cc>
-    b640:	e3a00001 	mov	r0, #1	; 0x1
-    b644:	e59f1420 	ldr	r1, [pc, #1056]	; ba6c <.text+0xba6c>
-    b648:	e3a02002 	mov	r2, #2	; 0x2
-    b64c:	ebffff01 	bl	b258 <ringbuffer1>
-    b650:	e59f342c 	ldr	r3, [pc, #1068]	; ba84 <.text+0xba84>
-    b654:	e5d33000 	ldrb	r3, [r3]
-    b658:	e1a02003 	mov	r2, r3
-    b65c:	e1a03002 	mov	r3, r2
-    b660:	e1a03083 	mov	r3, r3, lsl #1
-    b664:	e0833002 	add	r3, r3, r2
-    b668:	e1a03103 	mov	r3, r3, lsl #2
-    b66c:	e1a02003 	mov	r2, r3
-    b670:	e59f3410 	ldr	r3, [pc, #1040]	; ba88 <.text+0xba88>
-    b674:	e0823003 	add	r3, r2, r3
-    b678:	e3a00001 	mov	r0, #1	; 0x1
-    b67c:	e1a01003 	mov	r1, r3
-    b680:	e3a0200c 	mov	r2, #12	; 0xc
-    b684:	ebfffef3 	bl	b258 <ringbuffer1>
-    b688:	ebfffed8 	bl	b1f0 <UART1_send_ringbuffer>
-    b68c:	e59f33f0 	ldr	r3, [pc, #1008]	; ba84 <.text+0xba84>
-    b690:	e5d33000 	ldrb	r3, [r3]
-    b694:	e2833001 	add	r3, r3, #1	; 0x1
-    b698:	e20330ff 	and	r3, r3, #255	; 0xff
-    b69c:	e59f23e0 	ldr	r2, [pc, #992]	; ba84 <.text+0xba84>
-    b6a0:	e5c23000 	strb	r3, [r2]
-    b6a4:	e59f33d8 	ldr	r3, [pc, #984]	; ba84 <.text+0xba84>
-    b6a8:	e5d33000 	ldrb	r3, [r3]
-    b6ac:	e353000b 	cmp	r3, #11	; 0xb
-    b6b0:	1a000005 	bne	b6cc <.text+0xb6cc>
-    b6b4:	e59f33a8 	ldr	r3, [pc, #936]	; ba64 <.text+0xba64>
-    b6b8:	e5d33000 	ldrb	r3, [r3]
-    b6bc:	e2833001 	add	r3, r3, #1	; 0x1
-    b6c0:	e20330ff 	and	r3, r3, #255	; 0xff
-    b6c4:	e59f2398 	ldr	r2, [pc, #920]	; ba64 <.text+0xba64>
-    b6c8:	e5c23000 	strb	r3, [r2]
-    b6cc:	e59f33a4 	ldr	r3, [pc, #932]	; ba78 <.text+0xba78>
-    b6d0:	e3a02000 	mov	r2, #0	; 0x0
-    b6d4:	e5c32000 	strb	r2, [r3]
-    b6d8:	ea0000c6 	b	b9f8 <.text+0xb9f8>
-    b6dc:	e59f3394 	ldr	r3, [pc, #916]	; ba78 <.text+0xba78>
-    b6e0:	e5d33000 	ldrb	r3, [r3]
-    b6e4:	e2833001 	add	r3, r3, #1	; 0x1
-    b6e8:	e20330ff 	and	r3, r3, #255	; 0xff
-    b6ec:	e59f2384 	ldr	r2, [pc, #900]	; ba78 <.text+0xba78>
-    b6f0:	e5c23000 	strb	r3, [r2]
-    b6f4:	ea0000bf 	b	b9f8 <.text+0xb9f8>
-    b6f8:	e59f337c 	ldr	r3, [pc, #892]	; ba7c <.text+0xba7c>
-    b6fc:	e5d33000 	ldrb	r3, [r3]
-    b700:	e20330ff 	and	r3, r3, #255	; 0xff
-    b704:	e3530000 	cmp	r3, #0	; 0x0
-    b708:	0a00001c 	beq	b780 <.text+0xb780>
-    b70c:	e59f2368 	ldr	r2, [pc, #872]	; ba7c <.text+0xba7c>
-    b710:	e3a03000 	mov	r3, #0	; 0x0
-    b714:	e5c23000 	strb	r3, [r2]
-    b718:	e3a00002 	mov	r0, #2	; 0x2
-    b71c:	e3a01000 	mov	r1, #0	; 0x0
-    b720:	e3a02000 	mov	r2, #0	; 0x0
-    b724:	ebfffecb 	bl	b258 <ringbuffer1>
-    b728:	e1a03000 	mov	r3, r0
-    b72c:	e3530030 	cmp	r3, #48	; 0x30
-    b730:	da00000e 	ble	b770 <.text+0xb770>
-    b734:	e3a00001 	mov	r0, #1	; 0x1
-    b738:	e59f132c 	ldr	r1, [pc, #812]	; ba6c <.text+0xba6c>
-    b73c:	e3a02002 	mov	r2, #2	; 0x2
-    b740:	ebfffec4 	bl	b258 <ringbuffer1>
-    b744:	e3a00001 	mov	r0, #1	; 0x1
-    b748:	e59f133c 	ldr	r1, [pc, #828]	; ba8c <.text+0xba8c>
-    b74c:	e3a0202e 	mov	r2, #46	; 0x2e
-    b750:	ebfffec0 	bl	b258 <ringbuffer1>
-    b754:	ebfffea5 	bl	b1f0 <UART1_send_ringbuffer>
-    b758:	e59f3304 	ldr	r3, [pc, #772]	; ba64 <.text+0xba64>
-    b75c:	e5d33000 	ldrb	r3, [r3]
-    b760:	e2833001 	add	r3, r3, #1	; 0x1
-    b764:	e20330ff 	and	r3, r3, #255	; 0xff
-    b768:	e59f22f4 	ldr	r2, [pc, #756]	; ba64 <.text+0xba64>
-    b76c:	e5c23000 	strb	r3, [r2]
-    b770:	e59f3300 	ldr	r3, [pc, #768]	; ba78 <.text+0xba78>
-    b774:	e3a02000 	mov	r2, #0	; 0x0
-    b778:	e5c32000 	strb	r2, [r3]
-    b77c:	ea00009d 	b	b9f8 <.text+0xb9f8>
-    b780:	e59f32f0 	ldr	r3, [pc, #752]	; ba78 <.text+0xba78>
-    b784:	e5d33000 	ldrb	r3, [r3]
-    b788:	e2833001 	add	r3, r3, #1	; 0x1
-    b78c:	e20330ff 	and	r3, r3, #255	; 0xff
-    b790:	e59f22e0 	ldr	r2, [pc, #736]	; ba78 <.text+0xba78>
-    b794:	e5c23000 	strb	r3, [r2]
-    b798:	ea000096 	b	b9f8 <.text+0xb9f8>
-    b79c:	e59f32d8 	ldr	r3, [pc, #728]	; ba7c <.text+0xba7c>
-    b7a0:	e5d33000 	ldrb	r3, [r3]
-    b7a4:	e20330ff 	and	r3, r3, #255	; 0xff
-    b7a8:	e3530000 	cmp	r3, #0	; 0x0
-    b7ac:	0a00001c 	beq	b824 <.text+0xb824>
-    b7b0:	e59f22c4 	ldr	r2, [pc, #708]	; ba7c <.text+0xba7c>
-    b7b4:	e3a03000 	mov	r3, #0	; 0x0
-    b7b8:	e5c23000 	strb	r3, [r2]
-    b7bc:	e3a00002 	mov	r0, #2	; 0x2
-    b7c0:	e3a01000 	mov	r1, #0	; 0x0
-    b7c4:	e3a02000 	mov	r2, #0	; 0x0
-    b7c8:	ebfffea2 	bl	b258 <ringbuffer1>
-    b7cc:	e1a03000 	mov	r3, r0
-    b7d0:	e353000e 	cmp	r3, #14	; 0xe
-    b7d4:	da00000e 	ble	b814 <.text+0xb814>
-    b7d8:	e3a00001 	mov	r0, #1	; 0x1
-    b7dc:	e59f1288 	ldr	r1, [pc, #648]	; ba6c <.text+0xba6c>
-    b7e0:	e3a02002 	mov	r2, #2	; 0x2
-    b7e4:	ebfffe9b 	bl	b258 <ringbuffer1>
-    b7e8:	e3a00001 	mov	r0, #1	; 0x1
-    b7ec:	e59f129c 	ldr	r1, [pc, #668]	; ba90 <.text+0xba90>
-    b7f0:	e3a0200c 	mov	r2, #12	; 0xc
-    b7f4:	ebfffe97 	bl	b258 <ringbuffer1>
-    b7f8:	ebfffe7c 	bl	b1f0 <UART1_send_ringbuffer>
-    b7fc:	e59f3260 	ldr	r3, [pc, #608]	; ba64 <.text+0xba64>
-    b800:	e5d33000 	ldrb	r3, [r3]
-    b804:	e2833001 	add	r3, r3, #1	; 0x1
-    b808:	e20330ff 	and	r3, r3, #255	; 0xff
-    b80c:	e59f2250 	ldr	r2, [pc, #592]	; ba64 <.text+0xba64>
-    b810:	e5c23000 	strb	r3, [r2]
-    b814:	e59f325c 	ldr	r3, [pc, #604]	; ba78 <.text+0xba78>
-    b818:	e3a02000 	mov	r2, #0	; 0x0
-    b81c:	e5c32000 	strb	r2, [r3]
-    b820:	ea000074 	b	b9f8 <.text+0xb9f8>
-    b824:	e59f324c 	ldr	r3, [pc, #588]	; ba78 <.text+0xba78>
-    b828:	e5d33000 	ldrb	r3, [r3]
-    b82c:	e2833001 	add	r3, r3, #1	; 0x1
-    b830:	e20330ff 	and	r3, r3, #255	; 0xff
-    b834:	e59f223c 	ldr	r2, [pc, #572]	; ba78 <.text+0xba78>
-    b838:	e5c23000 	strb	r3, [r2]
-    b83c:	ea00006d 	b	b9f8 <.text+0xb9f8>
-    b840:	e59f3234 	ldr	r3, [pc, #564]	; ba7c <.text+0xba7c>
-    b844:	e5d33000 	ldrb	r3, [r3]
-    b848:	e20330ff 	and	r3, r3, #255	; 0xff
-    b84c:	e3530000 	cmp	r3, #0	; 0x0
-    b850:	0a00001c 	beq	b8c8 <.text+0xb8c8>
-    b854:	e59f2220 	ldr	r2, [pc, #544]	; ba7c <.text+0xba7c>
-    b858:	e3a03000 	mov	r3, #0	; 0x0
-    b85c:	e5c23000 	strb	r3, [r2]
-    b860:	e3a00002 	mov	r0, #2	; 0x2
-    b864:	e3a01000 	mov	r1, #0	; 0x0
-    b868:	e3a02000 	mov	r2, #0	; 0x0
-    b86c:	ebfffe79 	bl	b258 <ringbuffer1>
-    b870:	e1a03000 	mov	r3, r0
-    b874:	e3530010 	cmp	r3, #16	; 0x10
-    b878:	da00000e 	ble	b8b8 <.text+0xb8b8>
-    b87c:	e3a00001 	mov	r0, #1	; 0x1
-    b880:	e59f11e4 	ldr	r1, [pc, #484]	; ba6c <.text+0xba6c>
-    b884:	e3a02002 	mov	r2, #2	; 0x2
-    b888:	ebfffe72 	bl	b258 <ringbuffer1>
-    b88c:	e3a00001 	mov	r0, #1	; 0x1
-    b890:	e59f11fc 	ldr	r1, [pc, #508]	; ba94 <.text+0xba94>
-    b894:	e3a0200e 	mov	r2, #14	; 0xe
-    b898:	ebfffe6e 	bl	b258 <ringbuffer1>
-    b89c:	ebfffe53 	bl	b1f0 <UART1_send_ringbuffer>
-    b8a0:	e59f31bc 	ldr	r3, [pc, #444]	; ba64 <.text+0xba64>
-    b8a4:	e5d33000 	ldrb	r3, [r3]
-    b8a8:	e2833001 	add	r3, r3, #1	; 0x1
-    b8ac:	e20330ff 	and	r3, r3, #255	; 0xff
-    b8b0:	e59f21ac 	ldr	r2, [pc, #428]	; ba64 <.text+0xba64>
-    b8b4:	e5c23000 	strb	r3, [r2]
-    b8b8:	e59f31b8 	ldr	r3, [pc, #440]	; ba78 <.text+0xba78>
-    b8bc:	e3a02000 	mov	r2, #0	; 0x0
-    b8c0:	e5c32000 	strb	r2, [r3]
-    b8c4:	ea00004b 	b	b9f8 <.text+0xb9f8>
-    b8c8:	e59f31a8 	ldr	r3, [pc, #424]	; ba78 <.text+0xba78>
-    b8cc:	e5d33000 	ldrb	r3, [r3]
-    b8d0:	e2833001 	add	r3, r3, #1	; 0x1
-    b8d4:	e20330ff 	and	r3, r3, #255	; 0xff
-    b8d8:	e59f2198 	ldr	r2, [pc, #408]	; ba78 <.text+0xba78>
-    b8dc:	e5c23000 	strb	r3, [r2]
-    b8e0:	ea000044 	b	b9f8 <.text+0xb9f8>
-    b8e4:	e59f3190 	ldr	r3, [pc, #400]	; ba7c <.text+0xba7c>
-    b8e8:	e5d33000 	ldrb	r3, [r3]
-    b8ec:	e20330ff 	and	r3, r3, #255	; 0xff
-    b8f0:	e3530000 	cmp	r3, #0	; 0x0
-    b8f4:	0a00001c 	beq	b96c <.text+0xb96c>
-    b8f8:	e59f217c 	ldr	r2, [pc, #380]	; ba7c <.text+0xba7c>
-    b8fc:	e3a03000 	mov	r3, #0	; 0x0
-    b900:	e5c23000 	strb	r3, [r2]
-    b904:	e3a00002 	mov	r0, #2	; 0x2
-    b908:	e3a01000 	mov	r1, #0	; 0x0
-    b90c:	e3a02000 	mov	r2, #0	; 0x0
-    b910:	ebfffe50 	bl	b258 <ringbuffer1>
-    b914:	e1a03000 	mov	r3, r0
-    b918:	e3530015 	cmp	r3, #21	; 0x15
-    b91c:	da00000e 	ble	b95c <.text+0xb95c>
-    b920:	e3a00001 	mov	r0, #1	; 0x1
-    b924:	e59f1140 	ldr	r1, [pc, #320]	; ba6c <.text+0xba6c>
-    b928:	e3a02002 	mov	r2, #2	; 0x2
-    b92c:	ebfffe49 	bl	b258 <ringbuffer1>
-    b930:	e3a00001 	mov	r0, #1	; 0x1
-    b934:	e59f115c 	ldr	r1, [pc, #348]	; ba98 <.text+0xba98>
-    b938:	e3a02013 	mov	r2, #19	; 0x13
-    b93c:	ebfffe45 	bl	b258 <ringbuffer1>
-    b940:	ebfffe2a 	bl	b1f0 <UART1_send_ringbuffer>
-    b944:	e59f3118 	ldr	r3, [pc, #280]	; ba64 <.text+0xba64>
-    b948:	e5d33000 	ldrb	r3, [r3]
-    b94c:	e2833001 	add	r3, r3, #1	; 0x1
-    b950:	e20330ff 	and	r3, r3, #255	; 0xff
-    b954:	e59f2108 	ldr	r2, [pc, #264]	; ba64 <.text+0xba64>
-    b958:	e5c23000 	strb	r3, [r2]
-    b95c:	e59f3114 	ldr	r3, [pc, #276]	; ba78 <.text+0xba78>
-    b960:	e3a02000 	mov	r2, #0	; 0x0
-    b964:	e5c32000 	strb	r2, [r3]
-    b968:	ea000022 	b	b9f8 <.text+0xb9f8>
-    b96c:	e59f3104 	ldr	r3, [pc, #260]	; ba78 <.text+0xba78>
-    b970:	e5d33000 	ldrb	r3, [r3]
-    b974:	e2833001 	add	r3, r3, #1	; 0x1
-    b978:	e20330ff 	and	r3, r3, #255	; 0xff
-    b97c:	e59f20f4 	ldr	r2, [pc, #244]	; ba78 <.text+0xba78>
-    b980:	e5c23000 	strb	r3, [r2]
-    b984:	ea00001b 	b	b9f8 <.text+0xb9f8>
-    b988:	e59f30ec 	ldr	r3, [pc, #236]	; ba7c <.text+0xba7c>
-    b98c:	e5d33000 	ldrb	r3, [r3]
-    b990:	e20330ff 	and	r3, r3, #255	; 0xff
-    b994:	e3530000 	cmp	r3, #0	; 0x0
-    b998:	0a00000c 	beq	b9d0 <.text+0xb9d0>
-    b99c:	e59f20d8 	ldr	r2, [pc, #216]	; ba7c <.text+0xba7c>
-    b9a0:	e3a03000 	mov	r3, #0	; 0x0
-    b9a4:	e5c23000 	strb	r3, [r2]
-    b9a8:	e59f20ec 	ldr	r2, [pc, #236]	; ba9c <.text+0xba9c>
-    b9ac:	e3a03002 	mov	r3, #2	; 0x2
-    b9b0:	e5c23000 	strb	r3, [r2]
-    b9b4:	e59f20a8 	ldr	r2, [pc, #168]	; ba64 <.text+0xba64>
-    b9b8:	e3a03000 	mov	r3, #0	; 0x0
-    b9bc:	e5c23000 	strb	r3, [r2]
-    b9c0:	e59f20b0 	ldr	r2, [pc, #176]	; ba78 <.text+0xba78>
-    b9c4:	e3a03000 	mov	r3, #0	; 0x0
-    b9c8:	e5c23000 	strb	r3, [r2]
-    b9cc:	ea000009 	b	b9f8 <.text+0xb9f8>
-    b9d0:	e59f30a0 	ldr	r3, [pc, #160]	; ba78 <.text+0xba78>
-    b9d4:	e5d33000 	ldrb	r3, [r3]
-    b9d8:	e2833001 	add	r3, r3, #1	; 0x1
-    b9dc:	e20330ff 	and	r3, r3, #255	; 0xff
-    b9e0:	e59f2090 	ldr	r2, [pc, #144]	; ba78 <.text+0xba78>
-    b9e4:	e5c23000 	strb	r3, [r2]
-    b9e8:	ea000002 	b	b9f8 <.text+0xb9f8>
-    b9ec:	e59f3070 	ldr	r3, [pc, #112]	; ba64 <.text+0xba64>
-    b9f0:	e3a02000 	mov	r2, #0	; 0x0
-    b9f4:	e5c32000 	strb	r2, [r3]
-    b9f8:	e59f3078 	ldr	r3, [pc, #120]	; ba78 <.text+0xba78>
-    b9fc:	e5d33000 	ldrb	r3, [r3]
-    ba00:	e35300c8 	cmp	r3, #200	; 0xc8
-    ba04:	9a000013 	bls	ba58 <.text+0xba58>
-    ba08:	e59f3058 	ldr	r3, [pc, #88]	; ba68 <.text+0xba68>
-    ba0c:	e5d33000 	ldrb	r3, [r3]
-    ba10:	e3530000 	cmp	r3, #0	; 0x0
-    ba14:	0a000006 	beq	ba34 <.text+0xba34>
-    ba18:	e59f2044 	ldr	r2, [pc, #68]	; ba64 <.text+0xba64>
-    ba1c:	e3a03000 	mov	r3, #0	; 0x0
-    ba20:	e5c23000 	strb	r3, [r2]
-    ba24:	e59f204c 	ldr	r2, [pc, #76]	; ba78 <.text+0xba78>
-    ba28:	e3a03000 	mov	r3, #0	; 0x0
-    ba2c:	e5c23000 	strb	r3, [r2]
-    ba30:	ea000008 	b	ba58 <.text+0xba58>
-    ba34:	e59f2028 	ldr	r2, [pc, #40]	; ba64 <.text+0xba64>
-    ba38:	e3a03000 	mov	r3, #0	; 0x0
-    ba3c:	e5c23000 	strb	r3, [r2]
-    ba40:	e59f2030 	ldr	r2, [pc, #48]	; ba78 <.text+0xba78>
-    ba44:	e3a03000 	mov	r3, #0	; 0x0
-    ba48:	e5c23000 	strb	r3, [r2]
-    ba4c:	e59f2048 	ldr	r2, [pc, #72]	; ba9c <.text+0xba9c>
-    ba50:	e3a03003 	mov	r3, #3	; 0x3
-    ba54:	e5c23000 	strb	r3, [r2]
-    ba58:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    ba5c:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    ba60:	e12fff1e 	bx	lr
-    ba64:	40000adf 	ldrmid	r0, [r0], -pc
-    ba68:	40000adc 	ldrmid	r0, [r0], -ip
-    ba6c:	00015383 	andeq	r5, r1, r3, lsl #7
-    ba70:	00015280 	andeq	r5, r1, r0, lsl #5
-    ba74:	400008fc 	strmid	r0, [r0], -ip
-    ba78:	40000add 	ldrmid	r0, [r0], -sp
-    ba7c:	40000906 	andmi	r0, r0, r6, lsl #18
-    ba80:	0001529a 	muleq	r1, sl, r2
-    ba84:	40000ade 	ldrmid	r0, [r0], -lr
-    ba88:	000152a4 	andeq	r5, r1, r4, lsr #5
-    ba8c:	00015336 	andeq	r5, r1, r6, lsr r3
-    ba90:	00015364 	andeq	r5, r1, r4, ror #6
-    ba94:	00015328 	andeq	r5, r1, r8, lsr #6
-    ba98:	00015370 	andeq	r5, r1, r0, ror r3
-    ba9c:	40000c14 	andmi	r0, r0, r4, lsl ip
-
-0000baa0 <_read_r>:
-    baa0:	e1a0c00d 	mov	ip, sp
-    baa4:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    baa8:	e24cb004 	sub	fp, ip, #4	; 0x4
-    baac:	e24dd020 	sub	sp, sp, #32	; 0x20
-    bab0:	e50b001c 	str	r0, [fp, #-28]
-    bab4:	e50b1020 	str	r1, [fp, #-32]
-    bab8:	e50b2024 	str	r2, [fp, #-36]
-    babc:	e50b3028 	str	r3, [fp, #-40]
-    bac0:	e51b3024 	ldr	r3, [fp, #-36]
-    bac4:	e50b3010 	str	r3, [fp, #-16]
-    bac8:	e3a03000 	mov	r3, #0	; 0x0
-    bacc:	e50b3014 	str	r3, [fp, #-20]
-    bad0:	ea00001f 	b	bb54 <_read_r+0xb4>
-    bad4:	ebfff7f6 	bl	9ab4 <UARTReadChar>
-    bad8:	e1a03000 	mov	r3, r0
-    badc:	e54b3015 	strb	r3, [fp, #-21]
-    bae0:	e51b2010 	ldr	r2, [fp, #-16]
-    bae4:	e55b3015 	ldrb	r3, [fp, #-21]
-    bae8:	e5c23000 	strb	r3, [r2]
-    baec:	e51b3010 	ldr	r3, [fp, #-16]
-    baf0:	e2833001 	add	r3, r3, #1	; 0x1
-    baf4:	e50b3010 	str	r3, [fp, #-16]
-    baf8:	e55b3015 	ldrb	r3, [fp, #-21]
-    bafc:	e1a00003 	mov	r0, r3
-    bb00:	ebfff7d7 	bl	9a64 <UARTWriteChar>
-    bb04:	e55b3015 	ldrb	r3, [fp, #-21]
-    bb08:	e353000d 	cmp	r3, #13	; 0xd
-    bb0c:	1a00000d 	bne	bb48 <_read_r+0xa8>
-    bb10:	e51b3014 	ldr	r3, [fp, #-20]
-    bb14:	e51b2028 	ldr	r2, [fp, #-40]
-    bb18:	e2422002 	sub	r2, r2, #2	; 0x2
-    bb1c:	e1530002 	cmp	r3, r2
-    bb20:	8a000008 	bhi	bb48 <_read_r+0xa8>
-    bb24:	e51b2010 	ldr	r2, [fp, #-16]
-    bb28:	e3a0300a 	mov	r3, #10	; 0xa
-    bb2c:	e5c23000 	strb	r3, [r2]
-    bb30:	e3a0000a 	mov	r0, #10	; 0xa
-    bb34:	ebfff7ca 	bl	9a64 <UARTWriteChar>
-    bb38:	e51b3014 	ldr	r3, [fp, #-20]
-    bb3c:	e2833002 	add	r3, r3, #2	; 0x2
-    bb40:	e50b302c 	str	r3, [fp, #-44]
-    bb44:	ea000008 	b	bb6c <_read_r+0xcc>
-    bb48:	e51b3014 	ldr	r3, [fp, #-20]
-    bb4c:	e2833001 	add	r3, r3, #1	; 0x1
-    bb50:	e50b3014 	str	r3, [fp, #-20]
-    bb54:	e51b2014 	ldr	r2, [fp, #-20]
-    bb58:	e51b3028 	ldr	r3, [fp, #-40]
-    bb5c:	e1520003 	cmp	r2, r3
-    bb60:	3affffdb 	bcc	bad4 <_read_r+0x34>
-    bb64:	e51b3014 	ldr	r3, [fp, #-20]
-    bb68:	e50b302c 	str	r3, [fp, #-44]
-    bb6c:	e51b302c 	ldr	r3, [fp, #-44]
-    bb70:	e1a00003 	mov	r0, r3
-    bb74:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    bb78:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    bb7c:	e12fff1e 	bx	lr
-
-0000bb80 <_write_r>:
-    bb80:	e1a0c00d 	mov	ip, sp
-    bb84:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    bb88:	e24cb004 	sub	fp, ip, #4	; 0x4
-    bb8c:	e24dd018 	sub	sp, sp, #24	; 0x18
-    bb90:	e50b0018 	str	r0, [fp, #-24]
-    bb94:	e50b101c 	str	r1, [fp, #-28]
-    bb98:	e50b2020 	str	r2, [fp, #-32]
-    bb9c:	e50b3024 	str	r3, [fp, #-36]
-    bba0:	e51b3020 	ldr	r3, [fp, #-32]
-    bba4:	e50b3010 	str	r3, [fp, #-16]
-    bba8:	e3a03000 	mov	r3, #0	; 0x0
-    bbac:	e50b3014 	str	r3, [fp, #-20]
-    bbb0:	ea000010 	b	bbf8 <_write_r+0x78>
-    bbb4:	e51b3010 	ldr	r3, [fp, #-16]
-    bbb8:	e5d33000 	ldrb	r3, [r3]
-    bbbc:	e353000a 	cmp	r3, #10	; 0xa
-    bbc0:	1a000001 	bne	bbcc <_write_r+0x4c>
-    bbc4:	e3a0000d 	mov	r0, #13	; 0xd
-    bbc8:	ebfff7a5 	bl	9a64 <UARTWriteChar>
-    bbcc:	e51b3010 	ldr	r3, [fp, #-16]
-    bbd0:	e5d33000 	ldrb	r3, [r3]
-    bbd4:	e1a02003 	mov	r2, r3
-    bbd8:	e51b3010 	ldr	r3, [fp, #-16]
-    bbdc:	e2833001 	add	r3, r3, #1	; 0x1
-    bbe0:	e50b3010 	str	r3, [fp, #-16]
-    bbe4:	e1a00002 	mov	r0, r2
-    bbe8:	ebfff79d 	bl	9a64 <UARTWriteChar>
-    bbec:	e51b3014 	ldr	r3, [fp, #-20]
-    bbf0:	e2833001 	add	r3, r3, #1	; 0x1
-    bbf4:	e50b3014 	str	r3, [fp, #-20]
-    bbf8:	e51b2014 	ldr	r2, [fp, #-20]
-    bbfc:	e51b3024 	ldr	r3, [fp, #-36]
-    bc00:	e1520003 	cmp	r2, r3
-    bc04:	3affffea 	bcc	bbb4 <_write_r+0x34>
-    bc08:	e51b3024 	ldr	r3, [fp, #-36]
-    bc0c:	e1a00003 	mov	r0, r3
-    bc10:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    bc14:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    bc18:	e12fff1e 	bx	lr
-
-0000bc1c <_close_r>:
-    bc1c:	e1a0c00d 	mov	ip, sp
-    bc20:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    bc24:	e24cb004 	sub	fp, ip, #4	; 0x4
-    bc28:	e24dd008 	sub	sp, sp, #8	; 0x8
-    bc2c:	e50b0010 	str	r0, [fp, #-16]
-    bc30:	e50b1014 	str	r1, [fp, #-20]
-    bc34:	e3a03000 	mov	r3, #0	; 0x0
-    bc38:	e1a00003 	mov	r0, r3
-    bc3c:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    bc40:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    bc44:	e12fff1e 	bx	lr
-
-0000bc48 <_lseek_r>:
-    bc48:	e1a0c00d 	mov	ip, sp
-    bc4c:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    bc50:	e24cb004 	sub	fp, ip, #4	; 0x4
-    bc54:	e24dd010 	sub	sp, sp, #16	; 0x10
-    bc58:	e50b0010 	str	r0, [fp, #-16]
-    bc5c:	e50b1014 	str	r1, [fp, #-20]
-    bc60:	e50b2018 	str	r2, [fp, #-24]
-    bc64:	e50b301c 	str	r3, [fp, #-28]
-    bc68:	e3a03000 	mov	r3, #0	; 0x0
-    bc6c:	e1a00003 	mov	r0, r3
-    bc70:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    bc74:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    bc78:	e12fff1e 	bx	lr
-
-0000bc7c <_fstat_r>:
-    bc7c:	e1a0c00d 	mov	ip, sp
-    bc80:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    bc84:	e24cb004 	sub	fp, ip, #4	; 0x4
-    bc88:	e24dd00c 	sub	sp, sp, #12	; 0xc
-    bc8c:	e50b0010 	str	r0, [fp, #-16]
-    bc90:	e50b1014 	str	r1, [fp, #-20]
-    bc94:	e50b2018 	str	r2, [fp, #-24]
-    bc98:	e51b2018 	ldr	r2, [fp, #-24]
-    bc9c:	e3a03a02 	mov	r3, #8192	; 0x2000
-    bca0:	e5823004 	str	r3, [r2, #4]
-    bca4:	e3a03000 	mov	r3, #0	; 0x0
-    bca8:	e1a00003 	mov	r0, r3
-    bcac:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    bcb0:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    bcb4:	e12fff1e 	bx	lr
-
-0000bcb8 <isatty>:
-    bcb8:	e1a0c00d 	mov	ip, sp
-    bcbc:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    bcc0:	e24cb004 	sub	fp, ip, #4	; 0x4
-    bcc4:	e24dd004 	sub	sp, sp, #4	; 0x4
-    bcc8:	e50b0010 	str	r0, [fp, #-16]
-    bccc:	e3a03001 	mov	r3, #1	; 0x1
-    bcd0:	e1a00003 	mov	r0, r3
-    bcd4:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    bcd8:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    bcdc:	e12fff1e 	bx	lr
-
-0000bce0 <_sbrk_r>:
-    bce0:	e1a0c00d 	mov	ip, sp
-    bce4:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    bce8:	e24cb004 	sub	fp, ip, #4	; 0x4
-    bcec:	e24dd00c 	sub	sp, sp, #12	; 0xc
-    bcf0:	e50b0014 	str	r0, [fp, #-20]
-    bcf4:	e50b1018 	str	r1, [fp, #-24]
-    bcf8:	e59f304c 	ldr	r3, [pc, #76]	; bd4c <.text+0xbd4c>
-    bcfc:	e5933000 	ldr	r3, [r3]
-    bd00:	e3530000 	cmp	r3, #0	; 0x0
-    bd04:	1a000002 	bne	bd14 <_sbrk_r+0x34>
-    bd08:	e59f203c 	ldr	r2, [pc, #60]	; bd4c <.text+0xbd4c>
-    bd0c:	e59f303c 	ldr	r3, [pc, #60]	; bd50 <.text+0xbd50>
-    bd10:	e5823000 	str	r3, [r2]
-    bd14:	e59f3030 	ldr	r3, [pc, #48]	; bd4c <.text+0xbd4c>
-    bd18:	e5933000 	ldr	r3, [r3]
-    bd1c:	e50b3010 	str	r3, [fp, #-16]
-    bd20:	e59f3024 	ldr	r3, [pc, #36]	; bd4c <.text+0xbd4c>
-    bd24:	e5932000 	ldr	r2, [r3]
-    bd28:	e51b3018 	ldr	r3, [fp, #-24]
-    bd2c:	e0822003 	add	r2, r2, r3
-    bd30:	e59f3014 	ldr	r3, [pc, #20]	; bd4c <.text+0xbd4c>
-    bd34:	e5832000 	str	r2, [r3]
-    bd38:	e51b3010 	ldr	r3, [fp, #-16]
-    bd3c:	e1a00003 	mov	r0, r3
-    bd40:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    bd44:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    bd48:	e12fff1e 	bx	lr
-    bd4c:	40000ae0 	andmi	r0, r0, r0, ror #21
-    bd50:	40003a00 	andmi	r3, r0, r0, lsl #20
-
-0000bd54 <I2C0MasterHandler>:
-    bd54:	e1a0c00d 	mov	ip, sp
-    bd58:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    bd5c:	e24cb004 	sub	fp, ip, #4	; 0x4
-    bd60:	e24dd004 	sub	sp, sp, #4	; 0x4
-    bd64:	e3a0324e 	mov	r3, #-536870908	; 0xe0000004
-    bd68:	e2833907 	add	r3, r3, #114688	; 0x1c000
-    bd6c:	e5933000 	ldr	r3, [r3]
-    bd70:	e54b300d 	strb	r3, [fp, #-13]
-    bd74:	e55b300d 	ldrb	r3, [fp, #-13]
-    bd78:	e2433008 	sub	r3, r3, #8	; 0x8
-    bd7c:	e3530050 	cmp	r3, #80	; 0x50
-    bd80:	979ff103 	ldrls	pc, [pc, r3, lsl #2]
-    bd84:	ea000106 	b	c1a4 <.text+0xc1a4>
-    bd88:	0000becc 	andeq	fp, r0, ip, asr #29
-    bd8c:	0000c1a4 	andeq	ip, r0, r4, lsr #3
-    bd90:	0000c1a4 	andeq	ip, r0, r4, lsr #3
-    bd94:	0000c1a4 	andeq	ip, r0, r4, lsr #3
-    bd98:	0000c1a4 	andeq	ip, r0, r4, lsr #3
-    bd9c:	0000c1a4 	andeq	ip, r0, r4, lsr #3
-    bda0:	0000c1a4 	andeq	ip, r0, r4, lsr #3
-    bda4:	0000c1a4 	andeq	ip, r0, r4, lsr #3
-    bda8:	0000bf04 	andeq	fp, r0, r4, lsl #30
-    bdac:	0000c1a4 	andeq	ip, r0, r4, lsr #3
-    bdb0:	0000c1a4 	andeq	ip, r0, r4, lsr #3
-    bdb4:	0000c1a4 	andeq	ip, r0, r4, lsr #3
-    bdb8:	0000c1a4 	andeq	ip, r0, r4, lsr #3
-    bdbc:	0000c1a4 	andeq	ip, r0, r4, lsr #3
-    bdc0:	0000c1a4 	andeq	ip, r0, r4, lsr #3
-    bdc4:	0000c1a4 	andeq	ip, r0, r4, lsr #3
-    bdc8:	0000bf5c 	andeq	fp, r0, ip, asr pc
-    bdcc:	0000c1a4 	andeq	ip, r0, r4, lsr #3
-    bdd0:	0000c1a4 	andeq	ip, r0, r4, lsr #3
-    bdd4:	0000c1a4 	andeq	ip, r0, r4, lsr #3
-    bdd8:	0000c1a4 	andeq	ip, r0, r4, lsr #3
-    bddc:	0000c1a4 	andeq	ip, r0, r4, lsr #3
-    bde0:	0000c1a4 	andeq	ip, r0, r4, lsr #3
-    bde4:	0000c1a4 	andeq	ip, r0, r4, lsr #3
-    bde8:	0000c180 	andeq	ip, r0, r0, lsl #3
-    bdec:	0000c1a4 	andeq	ip, r0, r4, lsr #3
-    bdf0:	0000c1a4 	andeq	ip, r0, r4, lsr #3
-    bdf4:	0000c1a4 	andeq	ip, r0, r4, lsr #3
-    bdf8:	0000c1a4 	andeq	ip, r0, r4, lsr #3
-    bdfc:	0000c1a4 	andeq	ip, r0, r4, lsr #3
-    be00:	0000c1a4 	andeq	ip, r0, r4, lsr #3
-    be04:	0000c1a4 	andeq	ip, r0, r4, lsr #3
-    be08:	0000bfc4 	andeq	fp, r0, r4, asr #31
-    be0c:	0000c1a4 	andeq	ip, r0, r4, lsr #3
-    be10:	0000c1a4 	andeq	ip, r0, r4, lsr #3
-    be14:	0000c1a4 	andeq	ip, r0, r4, lsr #3
-    be18:	0000c1a4 	andeq	ip, r0, r4, lsr #3
-    be1c:	0000c1a4 	andeq	ip, r0, r4, lsr #3
-    be20:	0000c1a4 	andeq	ip, r0, r4, lsr #3
-    be24:	0000c1a4 	andeq	ip, r0, r4, lsr #3
-    be28:	0000bfc4 	andeq	fp, r0, r4, asr #31
-    be2c:	0000c1a4 	andeq	ip, r0, r4, lsr #3
-    be30:	0000c1a4 	andeq	ip, r0, r4, lsr #3
-    be34:	0000c1a4 	andeq	ip, r0, r4, lsr #3
-    be38:	0000c1a4 	andeq	ip, r0, r4, lsr #3
-    be3c:	0000c1a4 	andeq	ip, r0, r4, lsr #3
-    be40:	0000c1a4 	andeq	ip, r0, r4, lsr #3
-    be44:	0000c1a4 	andeq	ip, r0, r4, lsr #3
-    be48:	0000c1a4 	andeq	ip, r0, r4, lsr #3
-    be4c:	0000c1a4 	andeq	ip, r0, r4, lsr #3
-    be50:	0000c1a4 	andeq	ip, r0, r4, lsr #3
-    be54:	0000c1a4 	andeq	ip, r0, r4, lsr #3
-    be58:	0000c1a4 	andeq	ip, r0, r4, lsr #3
-    be5c:	0000c1a4 	andeq	ip, r0, r4, lsr #3
-    be60:	0000c1a4 	andeq	ip, r0, r4, lsr #3
-    be64:	0000c1a4 	andeq	ip, r0, r4, lsr #3
-    be68:	0000c0c8 	andeq	ip, r0, r8, asr #1
-    be6c:	0000c1a4 	andeq	ip, r0, r4, lsr #3
-    be70:	0000c1a4 	andeq	ip, r0, r4, lsr #3
-    be74:	0000c1a4 	andeq	ip, r0, r4, lsr #3
-    be78:	0000c1a4 	andeq	ip, r0, r4, lsr #3
-    be7c:	0000c1a4 	andeq	ip, r0, r4, lsr #3
-    be80:	0000c1a4 	andeq	ip, r0, r4, lsr #3
-    be84:	0000c1a4 	andeq	ip, r0, r4, lsr #3
-    be88:	0000c180 	andeq	ip, r0, r0, lsl #3
-    be8c:	0000c1a4 	andeq	ip, r0, r4, lsr #3
-    be90:	0000c1a4 	andeq	ip, r0, r4, lsr #3
-    be94:	0000c1a4 	andeq	ip, r0, r4, lsr #3
-    be98:	0000c1a4 	andeq	ip, r0, r4, lsr #3
-    be9c:	0000c1a4 	andeq	ip, r0, r4, lsr #3
-    bea0:	0000c1a4 	andeq	ip, r0, r4, lsr #3
-    bea4:	0000c1a4 	andeq	ip, r0, r4, lsr #3
-    bea8:	0000c0e0 	andeq	ip, r0, r0, ror #1
-    beac:	0000c1a4 	andeq	ip, r0, r4, lsr #3
-    beb0:	0000c1a4 	andeq	ip, r0, r4, lsr #3
-    beb4:	0000c1a4 	andeq	ip, r0, r4, lsr #3
-    beb8:	0000c1a4 	andeq	ip, r0, r4, lsr #3
-    bebc:	0000c1a4 	andeq	ip, r0, r4, lsr #3
-    bec0:	0000c1a4 	andeq	ip, r0, r4, lsr #3
-    bec4:	0000c1a4 	andeq	ip, r0, r4, lsr #3
-    bec8:	0000c0e0 	andeq	ip, r0, r0, ror #1
-    becc:	e3a0228e 	mov	r2, #-536870904	; 0xe0000008
-    bed0:	e2822907 	add	r2, r2, #114688	; 0x1c000
-    bed4:	e59f32f8 	ldr	r3, [pc, #760]	; c1d4 <.text+0xc1d4>
-    bed8:	e5d33000 	ldrb	r3, [r3]
-    bedc:	e5823000 	str	r3, [r2]
-    bee0:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    bee4:	e2833907 	add	r3, r3, #114688	; 0x1c000
-    bee8:	e2833018 	add	r3, r3, #24	; 0x18
-    beec:	e3a02028 	mov	r2, #40	; 0x28
-    bef0:	e5832000 	str	r2, [r3]
-    bef4:	e59f22dc 	ldr	r2, [pc, #732]	; c1d8 <.text+0xc1d8>
-    bef8:	e3a03001 	mov	r3, #1	; 0x1
-    befc:	e5823000 	str	r3, [r2]
-    bf00:	ea0000ac 	b	c1b8 <.text+0xc1b8>
-    bf04:	e59f32d0 	ldr	r3, [pc, #720]	; c1dc <.text+0xc1dc>
-    bf08:	e5933000 	ldr	r3, [r3]
-    bf0c:	e3530001 	cmp	r3, #1	; 0x1
-    bf10:	0a000003 	beq	bf24 <.text+0xbf24>
-    bf14:	e59f32c0 	ldr	r3, [pc, #704]	; c1dc <.text+0xc1dc>
-    bf18:	e5933000 	ldr	r3, [r3]
-    bf1c:	e3530002 	cmp	r3, #2	; 0x2
-    bf20:	1a000004 	bne	bf38 <.text+0xbf38>
-    bf24:	e3a0228e 	mov	r2, #-536870904	; 0xe0000008
-    bf28:	e2822907 	add	r2, r2, #114688	; 0x1c000
-    bf2c:	e59f32a0 	ldr	r3, [pc, #672]	; c1d4 <.text+0xc1d4>
-    bf30:	e5d33002 	ldrb	r3, [r3, #2]
-    bf34:	e5823000 	str	r3, [r2]
-    bf38:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    bf3c:	e2833907 	add	r3, r3, #114688	; 0x1c000
-    bf40:	e2833018 	add	r3, r3, #24	; 0x18
-    bf44:	e3a02028 	mov	r2, #40	; 0x28
-    bf48:	e5832000 	str	r2, [r3]
-    bf4c:	e59f2284 	ldr	r2, [pc, #644]	; c1d8 <.text+0xc1d8>
-    bf50:	e3a03002 	mov	r3, #2	; 0x2
-    bf54:	e5823000 	str	r3, [r2]
-    bf58:	ea000096 	b	c1b8 <.text+0xc1b8>
-    bf5c:	e59f3274 	ldr	r3, [pc, #628]	; c1d8 <.text+0xc1d8>
-    bf60:	e5933000 	ldr	r3, [r3]
-    bf64:	e3530001 	cmp	r3, #1	; 0x1
-    bf68:	1a00000f 	bne	bfac <.text+0xbfac>
-    bf6c:	e3a0228e 	mov	r2, #-536870904	; 0xe0000008
-    bf70:	e2822907 	add	r2, r2, #114688	; 0x1c000
-    bf74:	e59f3264 	ldr	r3, [pc, #612]	; c1e0 <.text+0xc1e0>
-    bf78:	e5933000 	ldr	r3, [r3]
-    bf7c:	e2831001 	add	r1, r3, #1	; 0x1
-    bf80:	e59f324c 	ldr	r3, [pc, #588]	; c1d4 <.text+0xc1d4>
-    bf84:	e7d33001 	ldrb	r3, [r3, r1]
-    bf88:	e5823000 	str	r3, [r2]
-    bf8c:	e59f324c 	ldr	r3, [pc, #588]	; c1e0 <.text+0xc1e0>
-    bf90:	e5933000 	ldr	r3, [r3]
-    bf94:	e2832001 	add	r2, r3, #1	; 0x1
-    bf98:	e59f3240 	ldr	r3, [pc, #576]	; c1e0 <.text+0xc1e0>
-    bf9c:	e5832000 	str	r2, [r3]
-    bfa0:	e59f2230 	ldr	r2, [pc, #560]	; c1d8 <.text+0xc1d8>
-    bfa4:	e3a03004 	mov	r3, #4	; 0x4
-    bfa8:	e5823000 	str	r3, [r2]
-    bfac:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    bfb0:	e2833907 	add	r3, r3, #114688	; 0x1c000
-    bfb4:	e2833018 	add	r3, r3, #24	; 0x18
-    bfb8:	e3a02008 	mov	r2, #8	; 0x8
-    bfbc:	e5832000 	str	r2, [r3]
-    bfc0:	ea00007c 	b	c1b8 <.text+0xc1b8>
-    bfc4:	e59f3214 	ldr	r3, [pc, #532]	; c1e0 <.text+0xc1e0>
-    bfc8:	e5932000 	ldr	r2, [r3]
-    bfcc:	e59f3210 	ldr	r3, [pc, #528]	; c1e4 <.text+0xc1e4>
-    bfd0:	e5933000 	ldr	r3, [r3]
-    bfd4:	e1520003 	cmp	r2, r3
-    bfd8:	0a000025 	beq	c074 <.text+0xc074>
-    bfdc:	e3a0228e 	mov	r2, #-536870904	; 0xe0000008
-    bfe0:	e2822907 	add	r2, r2, #114688	; 0x1c000
-    bfe4:	e59f31f4 	ldr	r3, [pc, #500]	; c1e0 <.text+0xc1e0>
-    bfe8:	e5933000 	ldr	r3, [r3]
-    bfec:	e2831001 	add	r1, r3, #1	; 0x1
-    bff0:	e59f31dc 	ldr	r3, [pc, #476]	; c1d4 <.text+0xc1d4>
-    bff4:	e7d33001 	ldrb	r3, [r3, r1]
-    bff8:	e5823000 	str	r3, [r2]
-    bffc:	e59f31dc 	ldr	r3, [pc, #476]	; c1e0 <.text+0xc1e0>
-    c000:	e5933000 	ldr	r3, [r3]
-    c004:	e2832001 	add	r2, r3, #1	; 0x1
-    c008:	e59f31d0 	ldr	r3, [pc, #464]	; c1e0 <.text+0xc1e0>
-    c00c:	e5832000 	str	r2, [r3]
-    c010:	e59f31c8 	ldr	r3, [pc, #456]	; c1e0 <.text+0xc1e0>
-    c014:	e5932000 	ldr	r2, [r3]
-    c018:	e59f31c4 	ldr	r3, [pc, #452]	; c1e4 <.text+0xc1e4>
-    c01c:	e5933000 	ldr	r3, [r3]
-    c020:	e1520003 	cmp	r2, r3
-    c024:	0a000003 	beq	c038 <.text+0xc038>
-    c028:	e59f21a8 	ldr	r2, [pc, #424]	; c1d8 <.text+0xc1d8>
-    c02c:	e3a03004 	mov	r3, #4	; 0x4
-    c030:	e5823000 	str	r3, [r2]
-    c034:	ea00001d 	b	c0b0 <.text+0xc0b0>
-    c038:	e59f2198 	ldr	r2, [pc, #408]	; c1d8 <.text+0xc1d8>
-    c03c:	e3a03005 	mov	r3, #5	; 0x5
-    c040:	e5823000 	str	r3, [r2]
-    c044:	e59f319c 	ldr	r3, [pc, #412]	; c1e8 <.text+0xc1e8>
-    c048:	e5933000 	ldr	r3, [r3]
-    c04c:	e3530000 	cmp	r3, #0	; 0x0
-    c050:	0a000016 	beq	c0b0 <.text+0xc0b0>
-    c054:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    c058:	e2833907 	add	r3, r3, #114688	; 0x1c000
-    c05c:	e3a02020 	mov	r2, #32	; 0x20
-    c060:	e5832000 	str	r2, [r3]
-    c064:	e59f216c 	ldr	r2, [pc, #364]	; c1d8 <.text+0xc1d8>
-    c068:	e3a03003 	mov	r3, #3	; 0x3
-    c06c:	e5823000 	str	r3, [r2]
-    c070:	ea00000e 	b	c0b0 <.text+0xc0b0>
-    c074:	e59f316c 	ldr	r3, [pc, #364]	; c1e8 <.text+0xc1e8>
-    c078:	e5933000 	ldr	r3, [r3]
-    c07c:	e3530000 	cmp	r3, #0	; 0x0
-    c080:	0a000007 	beq	c0a4 <.text+0xc0a4>
-    c084:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    c088:	e2833907 	add	r3, r3, #114688	; 0x1c000
-    c08c:	e3a02020 	mov	r2, #32	; 0x20
-    c090:	e5832000 	str	r2, [r3]
-    c094:	e59f213c 	ldr	r2, [pc, #316]	; c1d8 <.text+0xc1d8>
-    c098:	e3a03003 	mov	r3, #3	; 0x3
-    c09c:	e5823000 	str	r3, [r2]
-    c0a0:	ea000002 	b	c0b0 <.text+0xc0b0>
-    c0a4:	e59f212c 	ldr	r2, [pc, #300]	; c1d8 <.text+0xc1d8>
-    c0a8:	e3a03005 	mov	r3, #5	; 0x5
-    c0ac:	e5823000 	str	r3, [r2]
-    c0b0:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    c0b4:	e2833907 	add	r3, r3, #114688	; 0x1c000
-    c0b8:	e2833018 	add	r3, r3, #24	; 0x18
-    c0bc:	e3a02008 	mov	r2, #8	; 0x8
-    c0c0:	e5832000 	str	r2, [r3]
-    c0c4:	ea00003b 	b	c1b8 <.text+0xc1b8>
-    c0c8:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    c0cc:	e2833907 	add	r3, r3, #114688	; 0x1c000
-    c0d0:	e2833018 	add	r3, r3, #24	; 0x18
-    c0d4:	e3a02008 	mov	r2, #8	; 0x8
-    c0d8:	e5832000 	str	r2, [r3]
-    c0dc:	ea000035 	b	c1b8 <.text+0xc1b8>
-    c0e0:	e59f3104 	ldr	r3, [pc, #260]	; c1ec <.text+0xc1ec>
-    c0e4:	e5933000 	ldr	r3, [r3]
-    c0e8:	e2831003 	add	r1, r3, #3	; 0x3
-    c0ec:	e3a0328e 	mov	r3, #-536870904	; 0xe0000008
-    c0f0:	e2833907 	add	r3, r3, #114688	; 0x1c000
-    c0f4:	e5933000 	ldr	r3, [r3]
-    c0f8:	e20330ff 	and	r3, r3, #255	; 0xff
-    c0fc:	e59f20d0 	ldr	r2, [pc, #208]	; c1d4 <.text+0xc1d4>
-    c100:	e7c23001 	strb	r3, [r2, r1]
-    c104:	e59f30e0 	ldr	r3, [pc, #224]	; c1ec <.text+0xc1ec>
-    c108:	e5933000 	ldr	r3, [r3]
-    c10c:	e2832001 	add	r2, r3, #1	; 0x1
-    c110:	e59f30d4 	ldr	r3, [pc, #212]	; c1ec <.text+0xc1ec>
-    c114:	e5832000 	str	r2, [r3]
-    c118:	e59f30cc 	ldr	r3, [pc, #204]	; c1ec <.text+0xc1ec>
-    c11c:	e5932000 	ldr	r2, [r3]
-    c120:	e59f30c0 	ldr	r3, [pc, #192]	; c1e8 <.text+0xc1e8>
-    c124:	e5933000 	ldr	r3, [r3]
-    c128:	e1520003 	cmp	r2, r3
-    c12c:	0a000003 	beq	c140 <.text+0xc140>
-    c130:	e59f20a0 	ldr	r2, [pc, #160]	; c1d8 <.text+0xc1d8>
-    c134:	e3a03004 	mov	r3, #4	; 0x4
-    c138:	e5823000 	str	r3, [r2]
-    c13c:	ea000005 	b	c158 <.text+0xc158>
-    c140:	e59f20a4 	ldr	r2, [pc, #164]	; c1ec <.text+0xc1ec>
-    c144:	e3a03000 	mov	r3, #0	; 0x0
-    c148:	e5823000 	str	r3, [r2]
-    c14c:	e59f2084 	ldr	r2, [pc, #132]	; c1d8 <.text+0xc1d8>
-    c150:	e3a03005 	mov	r3, #5	; 0x5
-    c154:	e5823000 	str	r3, [r2]
-    c158:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    c15c:	e2833907 	add	r3, r3, #114688	; 0x1c000
-    c160:	e3a02004 	mov	r2, #4	; 0x4
-    c164:	e5832000 	str	r2, [r3]
-    c168:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    c16c:	e2833907 	add	r3, r3, #114688	; 0x1c000
-    c170:	e2833018 	add	r3, r3, #24	; 0x18
-    c174:	e3a02008 	mov	r2, #8	; 0x8
-    c178:	e5832000 	str	r2, [r3]
-    c17c:	ea00000d 	b	c1b8 <.text+0xc1b8>
-    c180:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    c184:	e2833907 	add	r3, r3, #114688	; 0x1c000
-    c188:	e2833018 	add	r3, r3, #24	; 0x18
-    c18c:	e3a02008 	mov	r2, #8	; 0x8
-    c190:	e5832000 	str	r2, [r3]
-    c194:	e59f203c 	ldr	r2, [pc, #60]	; c1d8 <.text+0xc1d8>
-    c198:	e3a03005 	mov	r3, #5	; 0x5
-    c19c:	e5823000 	str	r3, [r2]
-    c1a0:	ea000004 	b	c1b8 <.text+0xc1b8>
-    c1a4:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    c1a8:	e2833907 	add	r3, r3, #114688	; 0x1c000
-    c1ac:	e2833018 	add	r3, r3, #24	; 0x18
-    c1b0:	e3a02008 	mov	r2, #8	; 0x8
-    c1b4:	e5832000 	str	r2, [r3]
-    c1b8:	e3a03000 	mov	r3, #0	; 0x0
-    c1bc:	e2433efd 	sub	r3, r3, #4048	; 0xfd0
-    c1c0:	e3a02000 	mov	r2, #0	; 0x0
-    c1c4:	e5832000 	str	r2, [r3]
-    c1c8:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    c1cc:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    c1d0:	e12fff1e 	bx	lr
-    c1d4:	40001e78 	andmi	r1, r0, r8, ror lr
-    c1d8:	40000ae4 	andmi	r0, r0, r4, ror #21
-    c1dc:	40001e98 	mulmi	r0, r8, lr
-    c1e0:	40000af4 	strmid	r0, [r0], -r4
-    c1e4:	40001e9c 	mulmi	r0, ip, lr
-    c1e8:	40001e50 	andmi	r1, r0, r0, asr lr
-    c1ec:	40000af0 	strmid	r0, [r0], -r0
-
-0000c1f0 <I2C0_send_motordata>:
-    c1f0:	e1a0c00d 	mov	ip, sp
-    c1f4:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    c1f8:	e24cb004 	sub	fp, ip, #4	; 0x4
-    c1fc:	e59f2080 	ldr	r2, [pc, #128]	; c284 <.text+0xc284>
-    c200:	e3a03000 	mov	r3, #0	; 0x0
-    c204:	e5823000 	str	r3, [r2]
-    c208:	e59f2078 	ldr	r2, [pc, #120]	; c288 <.text+0xc288>
-    c20c:	e3a03000 	mov	r3, #0	; 0x0
-    c210:	e5823000 	str	r3, [r2]
-    c214:	e59f2070 	ldr	r2, [pc, #112]	; c28c <.text+0xc28c>
-    c218:	e3a03005 	mov	r3, #5	; 0x5
-    c21c:	e5823000 	str	r3, [r2]
-    c220:	e59f2068 	ldr	r2, [pc, #104]	; c290 <.text+0xc290>
-    c224:	e3a03000 	mov	r3, #0	; 0x0
-    c228:	e5823000 	str	r3, [r2]
-    c22c:	e59f2060 	ldr	r2, [pc, #96]	; c294 <.text+0xc294>
-    c230:	e3a03002 	mov	r3, #2	; 0x2
-    c234:	e5c23000 	strb	r3, [r2]
-    c238:	e59f2054 	ldr	r2, [pc, #84]	; c294 <.text+0xc294>
-    c23c:	e3a03064 	mov	r3, #100	; 0x64
-    c240:	e5c23001 	strb	r3, [r2, #1]
-    c244:	e59f2048 	ldr	r2, [pc, #72]	; c294 <.text+0xc294>
-    c248:	e3a03064 	mov	r3, #100	; 0x64
-    c24c:	e5c23002 	strb	r3, [r2, #2]
-    c250:	e59f203c 	ldr	r2, [pc, #60]	; c294 <.text+0xc294>
-    c254:	e3a03064 	mov	r3, #100	; 0x64
-    c258:	e5c23003 	strb	r3, [r2, #3]
-    c25c:	e59f2030 	ldr	r2, [pc, #48]	; c294 <.text+0xc294>
-    c260:	e3a03001 	mov	r3, #1	; 0x1
-    c264:	e5c23004 	strb	r3, [r2, #4]
-    c268:	e59f2028 	ldr	r2, [pc, #40]	; c298 <.text+0xc298>
-    c26c:	e3a03002 	mov	r3, #2	; 0x2
-    c270:	e5823000 	str	r3, [r2]
-    c274:	eb000066 	bl	c414 <I2CEngine>
-    c278:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    c27c:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    c280:	e12fff1e 	bx	lr
-    c284:	40000af4 	strmid	r0, [r0], -r4
-    c288:	40000af0 	strmid	r0, [r0], -r0
-    c28c:	40001e9c 	mulmi	r0, ip, lr
-    c290:	40001e50 	andmi	r1, r0, r0, asr lr
-    c294:	40001e78 	andmi	r1, r0, r8, ror lr
-    c298:	40001e98 	mulmi	r0, r8, lr
-
-0000c29c <I2CStart>:
-    c29c:	e1a0c00d 	mov	ip, sp
-    c2a0:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    c2a4:	e24cb004 	sub	fp, ip, #4	; 0x4
-    c2a8:	e24dd008 	sub	sp, sp, #8	; 0x8
-    c2ac:	e3a03000 	mov	r3, #0	; 0x0
-    c2b0:	e50b3014 	str	r3, [fp, #-20]
-    c2b4:	e3a03000 	mov	r3, #0	; 0x0
-    c2b8:	e50b3010 	str	r3, [fp, #-16]
-    c2bc:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    c2c0:	e2833907 	add	r3, r3, #114688	; 0x1c000
-    c2c4:	e3a02020 	mov	r2, #32	; 0x20
-    c2c8:	e5832000 	str	r2, [r3]
-    c2cc:	e59f3058 	ldr	r3, [pc, #88]	; c32c <.text+0xc32c>
-    c2d0:	e5933000 	ldr	r3, [r3]
-    c2d4:	e3530001 	cmp	r3, #1	; 0x1
-    c2d8:	1a000002 	bne	c2e8 <I2CStart+0x4c>
-    c2dc:	e3a03001 	mov	r3, #1	; 0x1
-    c2e0:	e50b3010 	str	r3, [fp, #-16]
-    c2e4:	ea00000b 	b	c318 <I2CStart+0x7c>
-    c2e8:	e51b2014 	ldr	r2, [fp, #-20]
-    c2ec:	e3a03401 	mov	r3, #16777216	; 0x1000000
-    c2f0:	e2433002 	sub	r3, r3, #2	; 0x2
-    c2f4:	e1520003 	cmp	r2, r3
-    c2f8:	9a000002 	bls	c308 <I2CStart+0x6c>
-    c2fc:	e3a03000 	mov	r3, #0	; 0x0
-    c300:	e50b3010 	str	r3, [fp, #-16]
-    c304:	ea000003 	b	c318 <I2CStart+0x7c>
-    c308:	e51b3014 	ldr	r3, [fp, #-20]
-    c30c:	e2833001 	add	r3, r3, #1	; 0x1
-    c310:	e50b3014 	str	r3, [fp, #-20]
-    c314:	eaffffec 	b	c2cc <I2CStart+0x30>
-    c318:	e51b3010 	ldr	r3, [fp, #-16]
-    c31c:	e1a00003 	mov	r0, r3
-    c320:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    c324:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    c328:	e12fff1e 	bx	lr
-    c32c:	40000ae4 	andmi	r0, r0, r4, ror #21
-
-0000c330 <I2CStop>:
-    c330:	e1a0c00d 	mov	ip, sp
-    c334:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    c338:	e24cb004 	sub	fp, ip, #4	; 0x4
-    c33c:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    c340:	e2833907 	add	r3, r3, #114688	; 0x1c000
-    c344:	e3a02010 	mov	r2, #16	; 0x10
-    c348:	e5832000 	str	r2, [r3]
-    c34c:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    c350:	e2833907 	add	r3, r3, #114688	; 0x1c000
-    c354:	e2833018 	add	r3, r3, #24	; 0x18
-    c358:	e3a02008 	mov	r2, #8	; 0x8
-    c35c:	e5832000 	str	r2, [r3]
-    c360:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    c364:	e2833907 	add	r3, r3, #114688	; 0x1c000
-    c368:	e5933000 	ldr	r3, [r3]
-    c36c:	e2033010 	and	r3, r3, #16	; 0x10
-    c370:	e3530000 	cmp	r3, #0	; 0x0
-    c374:	1afffff9 	bne	c360 <I2CStop+0x30>
-    c378:	e3a03001 	mov	r3, #1	; 0x1
-    c37c:	e1a00003 	mov	r0, r3
-    c380:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    c384:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    c388:	e12fff1e 	bx	lr
-
-0000c38c <I2CInit>:
-    c38c:	e1a0c00d 	mov	ip, sp
-    c390:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    c394:	e24cb004 	sub	fp, ip, #4	; 0x4
-    c398:	e24dd004 	sub	sp, sp, #4	; 0x4
-    c39c:	e50b0010 	str	r0, [fp, #-16]
-    c3a0:	e3a0228e 	mov	r2, #-536870904	; 0xe0000008
-    c3a4:	e282290a 	add	r2, r2, #163840	; 0x28000
-    c3a8:	e3a0328e 	mov	r3, #-536870904	; 0xe0000008
-    c3ac:	e283390a 	add	r3, r3, #163840	; 0x28000
-    c3b0:	e5933000 	ldr	r3, [r3]
-    c3b4:	e383300c 	orr	r3, r3, #12	; 0xc
-    c3b8:	e5823000 	str	r3, [r2]
-    c3bc:	e3a0324e 	mov	r3, #-536870908	; 0xe0000004
-    c3c0:	e283390a 	add	r3, r3, #163840	; 0x28000
-    c3c4:	e3a0200c 	mov	r2, #12	; 0xc
-    c3c8:	e5832000 	str	r2, [r3]
-    c3cc:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    c3d0:	e2833907 	add	r3, r3, #114688	; 0x1c000
-    c3d4:	e2833018 	add	r3, r3, #24	; 0x18
-    c3d8:	e3a0206c 	mov	r2, #108	; 0x6c
-    c3dc:	e5832000 	str	r2, [r3]
-    c3e0:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    c3e4:	e2833907 	add	r3, r3, #114688	; 0x1c000
-    c3e8:	e2833014 	add	r3, r3, #20	; 0x14
-    c3ec:	e3a02080 	mov	r2, #128	; 0x80
-    c3f0:	e5832000 	str	r2, [r3]
-    c3f4:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    c3f8:	e2833907 	add	r3, r3, #114688	; 0x1c000
-    c3fc:	e2833010 	add	r3, r3, #16	; 0x10
-    c400:	e3a02080 	mov	r2, #128	; 0x80
-    c404:	e5832000 	str	r2, [r3]
-    c408:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    c40c:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    c410:	e12fff1e 	bx	lr
-
-0000c414 <I2CEngine>:
-    c414:	e1a0c00d 	mov	ip, sp
-    c418:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    c41c:	e24cb004 	sub	fp, ip, #4	; 0x4
-    c420:	e24dd004 	sub	sp, sp, #4	; 0x4
-    c424:	e59f206c 	ldr	r2, [pc, #108]	; c498 <.text+0xc498>
-    c428:	e3a03000 	mov	r3, #0	; 0x0
-    c42c:	e5823000 	str	r3, [r2]
-    c430:	e59f2064 	ldr	r2, [pc, #100]	; c49c <.text+0xc49c>
-    c434:	e3a03000 	mov	r3, #0	; 0x0
-    c438:	e5823000 	str	r3, [r2]
-    c43c:	e59f205c 	ldr	r2, [pc, #92]	; c4a0 <.text+0xc4a0>
-    c440:	e3a03000 	mov	r3, #0	; 0x0
-    c444:	e5823000 	str	r3, [r2]
-    c448:	ebffff93 	bl	c29c <I2CStart>
-    c44c:	e1a03000 	mov	r3, r0
-    c450:	e3530001 	cmp	r3, #1	; 0x1
-    c454:	0a000003 	beq	c468 <I2CEngine+0x54>
-    c458:	ebffffb4 	bl	c330 <I2CStop>
-    c45c:	e3a03000 	mov	r3, #0	; 0x0
-    c460:	e50b3010 	str	r3, [fp, #-16]
-    c464:	ea000006 	b	c484 <I2CEngine+0x70>
-    c468:	e59f3028 	ldr	r3, [pc, #40]	; c498 <.text+0xc498>
-    c46c:	e5933000 	ldr	r3, [r3]
-    c470:	e3530005 	cmp	r3, #5	; 0x5
-    c474:	1afffffb 	bne	c468 <I2CEngine+0x54>
-    c478:	ebffffac 	bl	c330 <I2CStop>
-    c47c:	e3a03001 	mov	r3, #1	; 0x1
-    c480:	e50b3010 	str	r3, [fp, #-16]
-    c484:	e51b3010 	ldr	r3, [fp, #-16]
-    c488:	e1a00003 	mov	r0, r3
-    c48c:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    c490:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    c494:	e12fff1e 	bx	lr
-    c498:	40000ae4 	andmi	r0, r0, r4, ror #21
-    c49c:	40000af0 	strmid	r0, [r0], -r0
-    c4a0:	40000af4 	strmid	r0, [r0], -r4
-
-0000c4a4 <ADCInit>:
-    c4a4:	e1a0c00d 	mov	ip, sp
-    c4a8:	e92dd810 	stmdb	sp!, {r4, fp, ip, lr, pc}
-    c4ac:	e24cb004 	sub	fp, ip, #4	; 0x4
-    c4b0:	e24dd004 	sub	sp, sp, #4	; 0x4
-    c4b4:	e50b0014 	str	r0, [fp, #-20]
-    c4b8:	e3a0420e 	mov	r4, #-536870912	; 0xe0000000
-    c4bc:	e284490d 	add	r4, r4, #212992	; 0x34000
-    c4c0:	e3a008e5 	mov	r0, #15007744	; 0xe50000
-    c4c4:	e2400d79 	sub	r0, r0, #7744	; 0x1e40
-    c4c8:	e51b1014 	ldr	r1, [fp, #-20]
-    c4cc:	eb002326 	bl	1516c <____udivsi3_from_arm>
-    c4d0:	e1a03000 	mov	r3, r0
-    c4d4:	e2433001 	sub	r3, r3, #1	; 0x1
-    c4d8:	e1a03403 	mov	r3, r3, lsl #8
-    c4dc:	e3833602 	orr	r3, r3, #2097152	; 0x200000
-    c4e0:	e3833001 	orr	r3, r3, #1	; 0x1
-    c4e4:	e5843000 	str	r3, [r4]
-    c4e8:	e3a0420e 	mov	r4, #-536870912	; 0xe0000000
-    c4ec:	e2844806 	add	r4, r4, #393216	; 0x60000
-    c4f0:	e3a008e5 	mov	r0, #15007744	; 0xe50000
-    c4f4:	e2400d79 	sub	r0, r0, #7744	; 0x1e40
-    c4f8:	e51b1014 	ldr	r1, [fp, #-20]
-    c4fc:	eb00231a 	bl	1516c <____udivsi3_from_arm>
-    c500:	e1a03000 	mov	r3, r0
-    c504:	e2433001 	sub	r3, r3, #1	; 0x1
-    c508:	e1a03403 	mov	r3, r3, lsl #8
-    c50c:	e3833602 	orr	r3, r3, #2097152	; 0x200000
-    c510:	e3833001 	orr	r3, r3, #1	; 0x1
-    c514:	e5843000 	str	r3, [r4]
-    c518:	e3a03001 	mov	r3, #1	; 0x1
-    c51c:	e1a00003 	mov	r0, r3
-    c520:	e24bd010 	sub	sp, fp, #16	; 0x10
-    c524:	e89d6810 	ldmia	sp, {r4, fp, sp, lr}
-    c528:	e12fff1e 	bx	lr
-
-0000c52c <ADC0Read>:
-    c52c:	e1a0c00d 	mov	ip, sp
-    c530:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    c534:	e24cb004 	sub	fp, ip, #4	; 0x4
-    c538:	e24dd014 	sub	sp, sp, #20	; 0x14
-    c53c:	e1a03000 	mov	r3, r0
-    c540:	e54b301c 	strb	r3, [fp, #-28]
-    c544:	e3a03000 	mov	r3, #0	; 0x0
-    c548:	e50b3018 	str	r3, [fp, #-24]
-    c54c:	e55b301c 	ldrb	r3, [fp, #-28]
-    c550:	e3530007 	cmp	r3, #7	; 0x7
-    c554:	9a000001 	bls	c560 <ADC0Read+0x34>
-    c558:	e3a03000 	mov	r3, #0	; 0x0
-    c55c:	e54b301c 	strb	r3, [fp, #-28]
-    c560:	e3a0220e 	mov	r2, #-536870912	; 0xe0000000
-    c564:	e282290d 	add	r2, r2, #212992	; 0x34000
-    c568:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    c56c:	e283390d 	add	r3, r3, #212992	; 0x34000
-    c570:	e5933000 	ldr	r3, [r3]
-    c574:	e3c330ff 	bic	r3, r3, #255	; 0xff
-    c578:	e5823000 	str	r3, [r2]
-    c57c:	e3a0120e 	mov	r1, #-536870912	; 0xe0000000
-    c580:	e281190d 	add	r1, r1, #212992	; 0x34000
-    c584:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    c588:	e283390d 	add	r3, r3, #212992	; 0x34000
-    c58c:	e5930000 	ldr	r0, [r3]
-    c590:	e55b201c 	ldrb	r2, [fp, #-28]
-    c594:	e3a03001 	mov	r3, #1	; 0x1
-    c598:	e1a03213 	mov	r3, r3, lsl r2
-    c59c:	e1803003 	orr	r3, r0, r3
-    c5a0:	e3833401 	orr	r3, r3, #16777216	; 0x1000000
-    c5a4:	e5813000 	str	r3, [r1]
-    c5a8:	ea000009 	b	c5d4 <ADC0Read+0xa8>
-    c5ac:	e55b301c 	ldrb	r3, [fp, #-28]
-    c5b0:	e1a03103 	mov	r3, r3, lsl #2
-    c5b4:	e283320e 	add	r3, r3, #-536870912	; 0xe0000000
-    c5b8:	e283390d 	add	r3, r3, #212992	; 0x34000
-    c5bc:	e2833010 	add	r3, r3, #16	; 0x10
-    c5c0:	e5933000 	ldr	r3, [r3]
-    c5c4:	e50b3014 	str	r3, [fp, #-20]
-    c5c8:	e51b3014 	ldr	r3, [fp, #-20]
-    c5cc:	e3530000 	cmp	r3, #0	; 0x0
-    c5d0:	ba00000a 	blt	c600 <ADC0Read+0xd4>
-    c5d4:	e51b1018 	ldr	r1, [fp, #-24]
-    c5d8:	e3a03d4e 	mov	r3, #4992	; 0x1380
-    c5dc:	e2833007 	add	r3, r3, #7	; 0x7
-    c5e0:	e1510003 	cmp	r1, r3
-    c5e4:	83a03000 	movhi	r3, #0	; 0x0
-    c5e8:	93a03001 	movls	r3, #1	; 0x1
-    c5ec:	e20320ff 	and	r2, r3, #255	; 0xff
-    c5f0:	e2813001 	add	r3, r1, #1	; 0x1
-    c5f4:	e50b3018 	str	r3, [fp, #-24]
-    c5f8:	e3520000 	cmp	r2, #0	; 0x0
-    c5fc:	1affffea 	bne	c5ac <ADC0Read+0x80>
-    c600:	e3a0220e 	mov	r2, #-536870912	; 0xe0000000
-    c604:	e282290d 	add	r2, r2, #212992	; 0x34000
-    c608:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    c60c:	e283390d 	add	r3, r3, #212992	; 0x34000
-    c610:	e5933000 	ldr	r3, [r3]
-    c614:	e3c33407 	bic	r3, r3, #117440512	; 0x7000000
-    c618:	e5823000 	str	r3, [r2]
-    c61c:	e51b3014 	ldr	r3, [fp, #-20]
-    c620:	e2033101 	and	r3, r3, #1073741824	; 0x40000000
-    c624:	e3530000 	cmp	r3, #0	; 0x0
-    c628:	0a000002 	beq	c638 <ADC0Read+0x10c>
-    c62c:	e3a03000 	mov	r3, #0	; 0x0
-    c630:	e50b3020 	str	r3, [fp, #-32]
-    c634:	ea000006 	b	c654 <ADC0Read+0x128>
-    c638:	e51b3014 	ldr	r3, [fp, #-20]
-    c63c:	e1a03323 	mov	r3, r3, lsr #6
-    c640:	e1a03b03 	mov	r3, r3, lsl #22
-    c644:	e1a03b23 	mov	r3, r3, lsr #22
-    c648:	e50b3010 	str	r3, [fp, #-16]
-    c64c:	e51b3010 	ldr	r3, [fp, #-16]
-    c650:	e50b3020 	str	r3, [fp, #-32]
-    c654:	e51b3020 	ldr	r3, [fp, #-32]
-    c658:	e1a00003 	mov	r0, r3
-    c65c:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    c660:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    c664:	e12fff1e 	bx	lr
-
-0000c668 <ADC1Read>:
-    c668:	e1a0c00d 	mov	ip, sp
-    c66c:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    c670:	e24cb004 	sub	fp, ip, #4	; 0x4
-    c674:	e24dd010 	sub	sp, sp, #16	; 0x10
-    c678:	e1a03000 	mov	r3, r0
-    c67c:	e54b3018 	strb	r3, [fp, #-24]
-    c680:	e55b3018 	ldrb	r3, [fp, #-24]
-    c684:	e3530007 	cmp	r3, #7	; 0x7
-    c688:	9a000001 	bls	c694 <ADC1Read+0x2c>
-    c68c:	e3a03000 	mov	r3, #0	; 0x0
-    c690:	e54b3018 	strb	r3, [fp, #-24]
-    c694:	e3a0220e 	mov	r2, #-536870912	; 0xe0000000
-    c698:	e2822806 	add	r2, r2, #393216	; 0x60000
-    c69c:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    c6a0:	e2833806 	add	r3, r3, #393216	; 0x60000
-    c6a4:	e5933000 	ldr	r3, [r3]
-    c6a8:	e3c330ff 	bic	r3, r3, #255	; 0xff
-    c6ac:	e5823000 	str	r3, [r2]
-    c6b0:	e3a0120e 	mov	r1, #-536870912	; 0xe0000000
-    c6b4:	e2811806 	add	r1, r1, #393216	; 0x60000
-    c6b8:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    c6bc:	e2833806 	add	r3, r3, #393216	; 0x60000
-    c6c0:	e5930000 	ldr	r0, [r3]
-    c6c4:	e55b2018 	ldrb	r2, [fp, #-24]
-    c6c8:	e3a03001 	mov	r3, #1	; 0x1
-    c6cc:	e1a03213 	mov	r3, r3, lsl r2
-    c6d0:	e1803003 	orr	r3, r0, r3
-    c6d4:	e3833401 	orr	r3, r3, #16777216	; 0x1000000
-    c6d8:	e5813000 	str	r3, [r1]
-    c6dc:	e55b3018 	ldrb	r3, [fp, #-24]
-    c6e0:	e1a03103 	mov	r3, r3, lsl #2
-    c6e4:	e283320e 	add	r3, r3, #-536870912	; 0xe0000000
-    c6e8:	e2833806 	add	r3, r3, #393216	; 0x60000
-    c6ec:	e2833010 	add	r3, r3, #16	; 0x10
-    c6f0:	e5933000 	ldr	r3, [r3]
-    c6f4:	e50b3014 	str	r3, [fp, #-20]
-    c6f8:	e51b3014 	ldr	r3, [fp, #-20]
-    c6fc:	e3530000 	cmp	r3, #0	; 0x0
-    c700:	ba000000 	blt	c708 <ADC1Read+0xa0>
-    c704:	eafffff4 	b	c6dc <ADC1Read+0x74>
-    c708:	e3a0220e 	mov	r2, #-536870912	; 0xe0000000
-    c70c:	e2822806 	add	r2, r2, #393216	; 0x60000
-    c710:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    c714:	e2833806 	add	r3, r3, #393216	; 0x60000
-    c718:	e5933000 	ldr	r3, [r3]
-    c71c:	e3c33407 	bic	r3, r3, #117440512	; 0x7000000
-    c720:	e5823000 	str	r3, [r2]
-    c724:	e51b3014 	ldr	r3, [fp, #-20]
-    c728:	e2033101 	and	r3, r3, #1073741824	; 0x40000000
-    c72c:	e3530000 	cmp	r3, #0	; 0x0
-    c730:	0a000002 	beq	c740 <ADC1Read+0xd8>
-    c734:	e3a03000 	mov	r3, #0	; 0x0
-    c738:	e50b301c 	str	r3, [fp, #-28]
-    c73c:	ea000006 	b	c75c <ADC1Read+0xf4>
-    c740:	e51b3014 	ldr	r3, [fp, #-20]
-    c744:	e1a03323 	mov	r3, r3, lsr #6
-    c748:	e1a03b03 	mov	r3, r3, lsl #22
-    c74c:	e1a03b23 	mov	r3, r3, lsr #22
-    c750:	e50b3010 	str	r3, [fp, #-16]
-    c754:	e51b3010 	ldr	r3, [fp, #-16]
-    c758:	e50b301c 	str	r3, [fp, #-28]
-    c75c:	e51b301c 	ldr	r3, [fp, #-28]
-    c760:	e1a00003 	mov	r0, r3
-    c764:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    c768:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    c76c:	e12fff1e 	bx	lr
-
-0000c770 <SSPHandler>:
-    c770:	e1a0c00d 	mov	ip, sp
-    c774:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    c778:	e24cb004 	sub	fp, ip, #4	; 0x4
-    c77c:	e24dd008 	sub	sp, sp, #8	; 0x8
-    c780:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    c784:	e283391a 	add	r3, r3, #425984	; 0x68000
-    c788:	e283301c 	add	r3, r3, #28	; 0x1c
-    c78c:	e5933000 	ldr	r3, [r3]
-    c790:	e50b3014 	str	r3, [fp, #-20]
-    c794:	e51b3014 	ldr	r3, [fp, #-20]
-    c798:	e2033001 	and	r3, r3, #1	; 0x1
-    c79c:	e20330ff 	and	r3, r3, #255	; 0xff
-    c7a0:	e3530000 	cmp	r3, #0	; 0x0
-    c7a4:	0a000004 	beq	c7bc <SSPHandler+0x4c>
-    c7a8:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    c7ac:	e283391a 	add	r3, r3, #425984	; 0x68000
-    c7b0:	e2833020 	add	r3, r3, #32	; 0x20
-    c7b4:	e3a02001 	mov	r2, #1	; 0x1
-    c7b8:	e5832000 	str	r2, [r3]
-    c7bc:	e51b3014 	ldr	r3, [fp, #-20]
-    c7c0:	e2033002 	and	r3, r3, #2	; 0x2
-    c7c4:	e3530000 	cmp	r3, #0	; 0x0
-    c7c8:	0a000004 	beq	c7e0 <SSPHandler+0x70>
-    c7cc:	e3a0320e 	mov	r3, #-536870912	; 0xe0000000
-    c7d0:	e283391a 	add	r3, r3, #425984	; 0x68000
-    c7d4:	e2833020 	add	r3, r3, #32	; 0x20
-    c7d8:	e3a02002 	mov	r2, #2	; 0x2
-    c7dc:	e5832000 	str	r2, [r3]
-    c7e0:	e51b3014 	ldr	r3, [fp, #-20]
-    c7e4:	e2033004 	and	r3, r3, #4	; 0x4
-    c7e8:	e3530000 	cmp	r3, #0	; 0x0
-    c7ec:	0a000016 	beq	c84c <SSPHandler+0xdc>
-    c7f0:	ea00000f 	b	c834 <SSPHandler+0xc4>
-    c7f4:	e3a0328e 	mov	r3, #-536870904	; 0xe0000008
-    c7f8:	e283391a 	add	r3, r3, #425984	; 0x68000
-    c7fc:	e5933000 	ldr	r3, [r3]
-    c800:	e14b30be 	strh	r3, [fp, #-14]
-    c804:	e15b30be 	ldrh	r3, [fp, #-14]
-    c808:	e20330ff 	and	r3, r3, #255	; 0xff
-    c80c:	e20330ff 	and	r3, r3, #255	; 0xff
-    c810:	e1a00003 	mov	r0, r3
-    c814:	ebffd0b2 	bl	ae4 <SSP_rx_handler_HL>
-    c818:	e15b30be 	ldrh	r3, [fp, #-14]
-    c81c:	e1a03423 	mov	r3, r3, lsr #8
-    c820:	e1a03803 	mov	r3, r3, lsl #16
-    c824:	e1a03823 	mov	r3, r3, lsr #16
-    c828:	e20330ff 	and	r3, r3, #255	; 0xff
-    c82c:	e1a00003 	mov	r0, r3
-    c830:	ebffd0ab 	bl	ae4 <SSP_rx_handler_HL>
-    c834:	e3a032ce 	mov	r3, #-536870900	; 0xe000000c
-    c838:	e283391a 	add	r3, r3, #425984	; 0x68000
-    c83c:	e5933000 	ldr	r3, [r3]
-    c840:	e2033004 	and	r3, r3, #4	; 0x4
-    c844:	e3530000 	cmp	r3, #0	; 0x0
-    c848:	1affffe9 	bne	c7f4 <SSPHandler+0x84>
-    c84c:	e51b3014 	ldr	r3, [fp, #-20]
-    c850:	e2033008 	and	r3, r3, #8	; 0x8
-    c854:	e3530000 	cmp	r3, #0	; 0x0
-    c858:	0a00002f 	beq	c91c <SSPHandler+0x1ac>
-    c85c:	ea000028 	b	c904 <SSPHandler+0x194>
-    c860:	e59f30d0 	ldr	r3, [pc, #208]	; c938 <.text+0xc938>
-    c864:	e5933000 	ldr	r3, [r3]
-    c868:	e1a02003 	mov	r2, r3
-    c86c:	e59f30c8 	ldr	r3, [pc, #200]	; c93c <.text+0xc93c>
-    c870:	e5933000 	ldr	r3, [r3]
-    c874:	e1520003 	cmp	r2, r3
-    c878:	2a000014 	bcs	c8d0 <SSPHandler+0x160>
-    c87c:	e3a0128e 	mov	r1, #-536870904	; 0xe0000008
-    c880:	e281191a 	add	r1, r1, #425984	; 0x68000
-    c884:	e59f30ac 	ldr	r3, [pc, #172]	; c938 <.text+0xc938>
-    c888:	e5932000 	ldr	r2, [r3]
-    c88c:	e59f30ac 	ldr	r3, [pc, #172]	; c940 <.text+0xc940>
-    c890:	e7d33002 	ldrb	r3, [r3, r2]
-    c894:	e1a00003 	mov	r0, r3
-    c898:	e59f3098 	ldr	r3, [pc, #152]	; c938 <.text+0xc938>
-    c89c:	e5933000 	ldr	r3, [r3]
-    c8a0:	e2832001 	add	r2, r3, #1	; 0x1
-    c8a4:	e59f3094 	ldr	r3, [pc, #148]	; c940 <.text+0xc940>
-    c8a8:	e7d33002 	ldrb	r3, [r3, r2]
-    c8ac:	e1a03403 	mov	r3, r3, lsl #8
-    c8b0:	e1803003 	orr	r3, r0, r3
-    c8b4:	e5813000 	str	r3, [r1]
-    c8b8:	e59f3078 	ldr	r3, [pc, #120]	; c938 <.text+0xc938>
-    c8bc:	e5933000 	ldr	r3, [r3]
-    c8c0:	e2832002 	add	r2, r3, #2	; 0x2
-    c8c4:	e59f306c 	ldr	r3, [pc, #108]	; c938 <.text+0xc938>
-    c8c8:	e5832000 	str	r2, [r3]
-    c8cc:	ea00000c 	b	c904 <SSPHandler+0x194>
-    c8d0:	e59f2060 	ldr	r2, [pc, #96]	; c938 <.text+0xc938>
-    c8d4:	e3a03000 	mov	r3, #0	; 0x0
-    c8d8:	e5823000 	str	r3, [r2]
-    c8dc:	e59f2058 	ldr	r2, [pc, #88]	; c93c <.text+0xc93c>
-    c8e0:	e3a03000 	mov	r3, #0	; 0x0
-    c8e4:	e5823000 	str	r3, [r2]
-    c8e8:	e59f2054 	ldr	r2, [pc, #84]	; c944 <.text+0xc944>
-    c8ec:	e3a03001 	mov	r3, #1	; 0x1
-    c8f0:	e5c23000 	strb	r3, [r2]
-    c8f4:	e3a0328e 	mov	r3, #-536870904	; 0xe0000008
-    c8f8:	e283391a 	add	r3, r3, #425984	; 0x68000
-    c8fc:	e3a02000 	mov	r2, #0	; 0x0
-    c900:	e5832000 	str	r2, [r3]
-    c904:	e3a032ce 	mov	r3, #-536870900	; 0xe000000c
-    c908:	e283391a 	add	r3, r3, #425984	; 0x68000
-    c90c:	e5933000 	ldr	r3, [r3]
-    c910:	e2033002 	and	r3, r3, #2	; 0x2
-    c914:	e3530000 	cmp	r3, #0	; 0x0
-    c918:	1affffd0 	bne	c860 <SSPHandler+0xf0>
-    c91c:	e3a03000 	mov	r3, #0	; 0x0
-    c920:	e2433efd 	sub	r3, r3, #4048	; 0xfd0
-    c924:	e3a02000 	mov	r2, #0	; 0x0
-    c928:	e5832000 	str	r2, [r3]
-    c92c:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    c930:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    c934:	e12fff1e 	bx	lr
-    c938:	40001ee8 	andmi	r1, r0, r8, ror #29
-    c93c:	40001ee4 	andmi	r1, r0, r4, ror #29
-    c940:	40001eec 	andmi	r1, r0, ip, ror #29
-    c944:	4000001b 	andmi	r0, r0, fp, lsl r0
-
-0000c948 <LL_write_init>:
-    c948:	e1a0c00d 	mov	ip, sp
-    c94c:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    c950:	e24cb004 	sub	fp, ip, #4	; 0x4
-    c954:	e59f2028 	ldr	r2, [pc, #40]	; c984 <.text+0xc984>
-    c958:	e3a0303e 	mov	r3, #62	; 0x3e
-    c95c:	e5c23000 	strb	r3, [r2]
-    c960:	e59f201c 	ldr	r2, [pc, #28]	; c984 <.text+0xc984>
-    c964:	e3a0302a 	mov	r3, #42	; 0x2a
-    c968:	e5c23001 	strb	r3, [r2, #1]
-    c96c:	e59f2010 	ldr	r2, [pc, #16]	; c984 <.text+0xc984>
-    c970:	e3a0303e 	mov	r3, #62	; 0x3e
-    c974:	e5c23002 	strb	r3, [r2, #2]
-    c978:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    c97c:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    c980:	e12fff1e 	bx	lr
-    c984:	40001eec 	andmi	r1, r0, ip, ror #29
-
-0000c988 <LL_write>:
-    c988:	e1a0c00d 	mov	ip, sp
-    c98c:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    c990:	e24cb004 	sub	fp, ip, #4	; 0x4
-    c994:	e24dd014 	sub	sp, sp, #20	; 0x14
-    c998:	e50b0014 	str	r0, [fp, #-20]
-    c99c:	e1a03001 	mov	r3, r1
-    c9a0:	e14b31b8 	strh	r3, [fp, #-24]
-    c9a4:	e1a03002 	mov	r3, r2
-    c9a8:	e54b301c 	strb	r3, [fp, #-28]
-    c9ac:	e59f31d0 	ldr	r3, [pc, #464]	; cb84 <.text+0xcb84>
-    c9b0:	e5d33000 	ldrb	r3, [r3]
-    c9b4:	e3530000 	cmp	r3, #0	; 0x0
-    c9b8:	0a00001f 	beq	ca3c <LL_write+0xb4>
-    c9bc:	e59f31c4 	ldr	r3, [pc, #452]	; cb88 <.text+0xcb88>
-    c9c0:	e55b201c 	ldrb	r2, [fp, #-28]
-    c9c4:	e5c32003 	strb	r2, [r3, #3]
-    c9c8:	e3a03000 	mov	r3, #0	; 0x0
-    c9cc:	e50b3010 	str	r3, [fp, #-16]
-    c9d0:	ea00000a 	b	ca00 <LL_write+0x78>
-    c9d4:	e51b3010 	ldr	r3, [fp, #-16]
-    c9d8:	e2831004 	add	r1, r3, #4	; 0x4
-    c9dc:	e51b2010 	ldr	r2, [fp, #-16]
-    c9e0:	e51b3014 	ldr	r3, [fp, #-20]
-    c9e4:	e0823003 	add	r3, r2, r3
-    c9e8:	e5d33000 	ldrb	r3, [r3]
-    c9ec:	e59f2194 	ldr	r2, [pc, #404]	; cb88 <.text+0xcb88>
-    c9f0:	e7c23001 	strb	r3, [r2, r1]
-    c9f4:	e51b3010 	ldr	r3, [fp, #-16]
-    c9f8:	e2833001 	add	r3, r3, #1	; 0x1
-    c9fc:	e50b3010 	str	r3, [fp, #-16]
-    ca00:	e15b21b8 	ldrh	r2, [fp, #-24]
-    ca04:	e51b3010 	ldr	r3, [fp, #-16]
-    ca08:	e1520003 	cmp	r2, r3
-    ca0c:	8afffff0 	bhi	c9d4 <LL_write+0x4c>
-    ca10:	e15b31b8 	ldrh	r3, [fp, #-24]
-    ca14:	e2831004 	add	r1, r3, #4	; 0x4
-    ca18:	e59f2168 	ldr	r2, [pc, #360]	; cb88 <.text+0xcb88>
-    ca1c:	e3a03000 	mov	r3, #0	; 0x0
-    ca20:	e7c23001 	strb	r3, [r2, r1]
-    ca24:	e15b31b8 	ldrh	r3, [fp, #-24]
-    ca28:	e2833005 	add	r3, r3, #5	; 0x5
-    ca2c:	e1a02003 	mov	r2, r3
-    ca30:	e59f3154 	ldr	r3, [pc, #340]	; cb8c <.text+0xcb8c>
-    ca34:	e5832000 	str	r2, [r3]
-    ca38:	ea000047 	b	cb5c <LL_write+0x1d4>
-    ca3c:	e15b21b8 	ldrh	r2, [fp, #-24]
-    ca40:	e59f3144 	ldr	r3, [pc, #324]	; cb8c <.text+0xcb8c>
-    ca44:	e5933000 	ldr	r3, [r3]
-    ca48:	e0823003 	add	r3, r2, r3
-    ca4c:	e353007e 	cmp	r3, #126	; 0x7e
-    ca50:	8a00003e 	bhi	cb50 <LL_write+0x1c8>
-    ca54:	e59f3130 	ldr	r3, [pc, #304]	; cb8c <.text+0xcb8c>
-    ca58:	e5933000 	ldr	r3, [r3]
-    ca5c:	e2431001 	sub	r1, r3, #1	; 0x1
-    ca60:	e59f2120 	ldr	r2, [pc, #288]	; cb88 <.text+0xcb88>
-    ca64:	e3a0303e 	mov	r3, #62	; 0x3e
-    ca68:	e7c23001 	strb	r3, [r2, r1]
-    ca6c:	e59f3118 	ldr	r3, [pc, #280]	; cb8c <.text+0xcb8c>
-    ca70:	e5931000 	ldr	r1, [r3]
-    ca74:	e59f210c 	ldr	r2, [pc, #268]	; cb88 <.text+0xcb88>
-    ca78:	e3a0302a 	mov	r3, #42	; 0x2a
-    ca7c:	e7c23001 	strb	r3, [r2, r1]
-    ca80:	e59f3104 	ldr	r3, [pc, #260]	; cb8c <.text+0xcb8c>
-    ca84:	e5933000 	ldr	r3, [r3]
-    ca88:	e2831001 	add	r1, r3, #1	; 0x1
-    ca8c:	e59f20f4 	ldr	r2, [pc, #244]	; cb88 <.text+0xcb88>
-    ca90:	e3a0303e 	mov	r3, #62	; 0x3e
-    ca94:	e7c23001 	strb	r3, [r2, r1]
-    ca98:	e59f30ec 	ldr	r3, [pc, #236]	; cb8c <.text+0xcb8c>
-    ca9c:	e5933000 	ldr	r3, [r3]
-    caa0:	e2831002 	add	r1, r3, #2	; 0x2
-    caa4:	e59f20dc 	ldr	r2, [pc, #220]	; cb88 <.text+0xcb88>
-    caa8:	e55b301c 	ldrb	r3, [fp, #-28]
-    caac:	e7c23001 	strb	r3, [r2, r1]
-    cab0:	e59f30d4 	ldr	r3, [pc, #212]	; cb8c <.text+0xcb8c>
-    cab4:	e5933000 	ldr	r3, [r3]
-    cab8:	e50b3010 	str	r3, [fp, #-16]
-    cabc:	ea00000e 	b	cafc <LL_write+0x174>
-    cac0:	e51b3010 	ldr	r3, [fp, #-16]
-    cac4:	e2831003 	add	r1, r3, #3	; 0x3
-    cac8:	e59f30bc 	ldr	r3, [pc, #188]	; cb8c <.text+0xcb8c>
-    cacc:	e5932000 	ldr	r2, [r3]
-    cad0:	e51b3010 	ldr	r3, [fp, #-16]
-    cad4:	e0623003 	rsb	r3, r2, r3
-    cad8:	e1a02003 	mov	r2, r3
-    cadc:	e51b3014 	ldr	r3, [fp, #-20]
-    cae0:	e0823003 	add	r3, r2, r3
-    cae4:	e5d33000 	ldrb	r3, [r3]
-    cae8:	e59f2098 	ldr	r2, [pc, #152]	; cb88 <.text+0xcb88>
-    caec:	e7c23001 	strb	r3, [r2, r1]
-    caf0:	e51b3010 	ldr	r3, [fp, #-16]
-    caf4:	e2833001 	add	r3, r3, #1	; 0x1
-    caf8:	e50b3010 	str	r3, [fp, #-16]
-    cafc:	e15b21b8 	ldrh	r2, [fp, #-24]
-    cb00:	e59f3084 	ldr	r3, [pc, #132]	; cb8c <.text+0xcb8c>
-    cb04:	e5933000 	ldr	r3, [r3]
-    cb08:	e0822003 	add	r2, r2, r3
-    cb0c:	e51b3010 	ldr	r3, [fp, #-16]
-    cb10:	e1520003 	cmp	r2, r3
-    cb14:	8affffe9 	bhi	cac0 <LL_write+0x138>
-    cb18:	e15b21b8 	ldrh	r2, [fp, #-24]
-    cb1c:	e59f3068 	ldr	r3, [pc, #104]	; cb8c <.text+0xcb8c>
-    cb20:	e5933000 	ldr	r3, [r3]
-    cb24:	e0823003 	add	r3, r2, r3
-    cb28:	e2832005 	add	r2, r3, #5	; 0x5
-    cb2c:	e59f3058 	ldr	r3, [pc, #88]	; cb8c <.text+0xcb8c>
-    cb30:	e5832000 	str	r2, [r3]
-    cb34:	e59f3050 	ldr	r3, [pc, #80]	; cb8c <.text+0xcb8c>
-    cb38:	e5933000 	ldr	r3, [r3]
-    cb3c:	e2431001 	sub	r1, r3, #1	; 0x1
-    cb40:	e59f2040 	ldr	r2, [pc, #64]	; cb88 <.text+0xcb88>
-    cb44:	e3a03000 	mov	r3, #0	; 0x0
-    cb48:	e7c23001 	strb	r3, [r2, r1]
-    cb4c:	ea000002 	b	cb5c <LL_write+0x1d4>
-    cb50:	e3a03000 	mov	r3, #0	; 0x0
-    cb54:	e50b3020 	str	r3, [fp, #-32]
-    cb58:	ea000004 	b	cb70 <LL_write+0x1e8>
-    cb5c:	e59f3020 	ldr	r3, [pc, #32]	; cb84 <.text+0xcb84>
-    cb60:	e3a02000 	mov	r2, #0	; 0x0
-    cb64:	e5c32000 	strb	r2, [r3]
-    cb68:	e3a03001 	mov	r3, #1	; 0x1
-    cb6c:	e50b3020 	str	r3, [fp, #-32]
-    cb70:	e51b3020 	ldr	r3, [fp, #-32]
-    cb74:	e1a00003 	mov	r0, r3
-    cb78:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    cb7c:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    cb80:	e12fff1e 	bx	lr
-    cb84:	4000001b 	andmi	r0, r0, fp, lsl r0
-    cb88:	40001eec 	andmi	r1, r0, ip, ror #29
-    cb8c:	40001ee4 	andmi	r1, r0, r4, ror #29
-
-0000cb90 <DefaultVICHandler>:
-    cb90:	e1a0c00d 	mov	ip, sp
-    cb94:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    cb98:	e24cb004 	sub	fp, ip, #4	; 0x4
-    cb9c:	e3a03000 	mov	r3, #0	; 0x0
-    cba0:	e2433efd 	sub	r3, r3, #4048	; 0xfd0
-    cba4:	e3a02000 	mov	r2, #0	; 0x0
-    cba8:	e5832000 	str	r2, [r3]
-    cbac:	eafffffe 	b	cbac <DefaultVICHandler+0x1c>
-
-0000cbb0 <init_VIC>:
-    cbb0:	e1a0c00d 	mov	ip, sp
-    cbb4:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    cbb8:	e24cb004 	sub	fp, ip, #4	; 0x4
-    cbbc:	e24dd00c 	sub	sp, sp, #12	; 0xc
-    cbc0:	e3a03000 	mov	r3, #0	; 0x0
-    cbc4:	e50b3018 	str	r3, [fp, #-24]
-    cbc8:	e3e03efe 	mvn	r3, #4064	; 0xfe0
-    cbcc:	e243300b 	sub	r3, r3, #11	; 0xb
-    cbd0:	e3e02000 	mvn	r2, #0	; 0x0
-    cbd4:	e5832000 	str	r2, [r3]
-    cbd8:	e3a03000 	mov	r3, #0	; 0x0
-    cbdc:	e2433efd 	sub	r3, r3, #4048	; 0xfd0
-    cbe0:	e3a02000 	mov	r2, #0	; 0x0
-    cbe4:	e5832000 	str	r2, [r3]
-    cbe8:	e3e03eff 	mvn	r3, #4080	; 0xff0
-    cbec:	e2433003 	sub	r3, r3, #3	; 0x3
-    cbf0:	e3a02000 	mov	r2, #0	; 0x0
-    cbf4:	e5832000 	str	r2, [r3]
-    cbf8:	e3a03000 	mov	r3, #0	; 0x0
-    cbfc:	e50b3018 	str	r3, [fp, #-24]
-    cc00:	ea000010 	b	cc48 <init_VIC+0x98>
-    cc04:	e51b3018 	ldr	r3, [fp, #-24]
-    cc08:	e1a03103 	mov	r3, r3, lsl #2
-    cc0c:	e2433c0f 	sub	r3, r3, #3840	; 0xf00
-    cc10:	e50b3014 	str	r3, [fp, #-20]
-    cc14:	e51b3018 	ldr	r3, [fp, #-24]
-    cc18:	e1a03103 	mov	r3, r3, lsl #2
-    cc1c:	e2433c0e 	sub	r3, r3, #3584	; 0xe00
-    cc20:	e50b3010 	str	r3, [fp, #-16]
-    cc24:	e51b2014 	ldr	r2, [fp, #-20]
-    cc28:	e3a03000 	mov	r3, #0	; 0x0
-    cc2c:	e5823000 	str	r3, [r2]
-    cc30:	e51b2010 	ldr	r2, [fp, #-16]
-    cc34:	e3a03000 	mov	r3, #0	; 0x0
-    cc38:	e5823000 	str	r3, [r2]
-    cc3c:	e51b3018 	ldr	r3, [fp, #-24]
-    cc40:	e2833001 	add	r3, r3, #1	; 0x1
-    cc44:	e50b3018 	str	r3, [fp, #-24]
-    cc48:	e51b3018 	ldr	r3, [fp, #-24]
-    cc4c:	e353000f 	cmp	r3, #15	; 0xf
-    cc50:	9affffeb 	bls	cc04 <init_VIC+0x54>
-    cc54:	e3e03d3f 	mvn	r3, #4032	; 0xfc0
-    cc58:	e243300b 	sub	r3, r3, #11	; 0xb
-    cc5c:	e59f200c 	ldr	r2, [pc, #12]	; cc70 <.text+0xcc70>
-    cc60:	e5832000 	str	r2, [r3]
-    cc64:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    cc68:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    cc6c:	e12fff1e 	bx	lr
-    cc70:	0000cb90 	muleq	r0, r0, fp
-
-0000cc74 <install_irq>:
-    cc74:	e1a0c00d 	mov	ip, sp
-    cc78:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    cc7c:	e24cb004 	sub	fp, ip, #4	; 0x4
-    cc80:	e24dd018 	sub	sp, sp, #24	; 0x18
-    cc84:	e50b001c 	str	r0, [fp, #-28]
-    cc88:	e50b1020 	str	r1, [fp, #-32]
-    cc8c:	e3e02efe 	mvn	r2, #4064	; 0xfe0
-    cc90:	e242200b 	sub	r2, r2, #11	; 0xb
-    cc94:	e51b101c 	ldr	r1, [fp, #-28]
-    cc98:	e3a03001 	mov	r3, #1	; 0x1
-    cc9c:	e1a03113 	mov	r3, r3, lsl r1
-    cca0:	e5823000 	str	r3, [r2]
-    cca4:	e3a03000 	mov	r3, #0	; 0x0
-    cca8:	e50b3018 	str	r3, [fp, #-24]
-    ccac:	ea000017 	b	cd10 <install_irq+0x9c>
-    ccb0:	e51b3018 	ldr	r3, [fp, #-24]
-    ccb4:	e1a03103 	mov	r3, r3, lsl #2
-    ccb8:	e2433c0f 	sub	r3, r3, #3840	; 0xf00
-    ccbc:	e50b3014 	str	r3, [fp, #-20]
-    ccc0:	e51b3018 	ldr	r3, [fp, #-24]
-    ccc4:	e1a03103 	mov	r3, r3, lsl #2
-    ccc8:	e2433c0e 	sub	r3, r3, #3584	; 0xe00
-    cccc:	e50b3010 	str	r3, [fp, #-16]
-    ccd0:	e51b3014 	ldr	r3, [fp, #-20]
-    ccd4:	e5933000 	ldr	r3, [r3]
-    ccd8:	e3530000 	cmp	r3, #0	; 0x0
-    ccdc:	1a000008 	bne	cd04 <install_irq+0x90>
-    cce0:	e51b3020 	ldr	r3, [fp, #-32]
-    cce4:	e1a02003 	mov	r2, r3
-    cce8:	e51b3014 	ldr	r3, [fp, #-20]
-    ccec:	e5832000 	str	r2, [r3]
-    ccf0:	e51b301c 	ldr	r3, [fp, #-28]
-    ccf4:	e3832020 	orr	r2, r3, #32	; 0x20
-    ccf8:	e51b3010 	ldr	r3, [fp, #-16]
-    ccfc:	e5832000 	str	r2, [r3]
-    cd00:	ea000005 	b	cd1c <install_irq+0xa8>
-    cd04:	e51b3018 	ldr	r3, [fp, #-24]
-    cd08:	e2833001 	add	r3, r3, #1	; 0x1
-    cd0c:	e50b3018 	str	r3, [fp, #-24]
-    cd10:	e51b3018 	ldr	r3, [fp, #-24]
-    cd14:	e353000f 	cmp	r3, #15	; 0xf
-    cd18:	9affffe4 	bls	ccb0 <install_irq+0x3c>
-    cd1c:	e51b3018 	ldr	r3, [fp, #-24]
-    cd20:	e3530010 	cmp	r3, #16	; 0x10
-    cd24:	1a000002 	bne	cd34 <install_irq+0xc0>
-    cd28:	e3a03000 	mov	r3, #0	; 0x0
-    cd2c:	e50b3024 	str	r3, [fp, #-36]
-    cd30:	ea000007 	b	cd54 <install_irq+0xe0>
-    cd34:	e3a02000 	mov	r2, #0	; 0x0
-    cd38:	e2422eff 	sub	r2, r2, #4080	; 0xff0
-    cd3c:	e51b101c 	ldr	r1, [fp, #-28]
-    cd40:	e3a03001 	mov	r3, #1	; 0x1
-    cd44:	e1a03113 	mov	r3, r3, lsl r1
-    cd48:	e5823000 	str	r3, [r2]
-    cd4c:	e3a03001 	mov	r3, #1	; 0x1
-    cd50:	e50b3024 	str	r3, [fp, #-36]
-    cd54:	e51b3024 	ldr	r3, [fp, #-36]
-    cd58:	e1a00003 	mov	r0, r3
-    cd5c:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    cd60:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    cd64:	e12fff1e 	bx	lr
-
-0000cd68 <uninstall_irq>:
-    cd68:	e1a0c00d 	mov	ip, sp
-    cd6c:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    cd70:	e24cb004 	sub	fp, ip, #4	; 0x4
-    cd74:	e24dd014 	sub	sp, sp, #20	; 0x14
-    cd78:	e50b001c 	str	r0, [fp, #-28]
-    cd7c:	e3e02efe 	mvn	r2, #4064	; 0xfe0
-    cd80:	e242200b 	sub	r2, r2, #11	; 0xb
-    cd84:	e51b101c 	ldr	r1, [fp, #-28]
-    cd88:	e3a03001 	mov	r3, #1	; 0x1
-    cd8c:	e1a03113 	mov	r3, r3, lsl r1
-    cd90:	e5823000 	str	r3, [r2]
-    cd94:	e3a03000 	mov	r3, #0	; 0x0
-    cd98:	e50b3018 	str	r3, [fp, #-24]
-    cd9c:	ea000019 	b	ce08 <uninstall_irq+0xa0>
-    cda0:	e51b3018 	ldr	r3, [fp, #-24]
-    cda4:	e1a03103 	mov	r3, r3, lsl #2
-    cda8:	e2433c0f 	sub	r3, r3, #3840	; 0xf00
-    cdac:	e50b3014 	str	r3, [fp, #-20]
-    cdb0:	e51b3018 	ldr	r3, [fp, #-24]
-    cdb4:	e1a03103 	mov	r3, r3, lsl #2
-    cdb8:	e2433c0e 	sub	r3, r3, #3584	; 0xe00
-    cdbc:	e50b3010 	str	r3, [fp, #-16]
-    cdc0:	e51b3010 	ldr	r3, [fp, #-16]
-    cdc4:	e5933000 	ldr	r3, [r3]
-    cdc8:	e3c32020 	bic	r2, r3, #32	; 0x20
-    cdcc:	e51b301c 	ldr	r3, [fp, #-28]
-    cdd0:	e1520003 	cmp	r2, r3
-    cdd4:	1a000008 	bne	cdfc <uninstall_irq+0x94>
-    cdd8:	e51b2014 	ldr	r2, [fp, #-20]
-    cddc:	e3a03000 	mov	r3, #0	; 0x0
-    cde0:	e5823000 	str	r3, [r2]
-    cde4:	e51b3010 	ldr	r3, [fp, #-16]
-    cde8:	e5933000 	ldr	r3, [r3]
-    cdec:	e3c32020 	bic	r2, r3, #32	; 0x20
-    cdf0:	e51b3010 	ldr	r3, [fp, #-16]
-    cdf4:	e5832000 	str	r2, [r3]
-    cdf8:	ea000005 	b	ce14 <uninstall_irq+0xac>
-    cdfc:	e51b3018 	ldr	r3, [fp, #-24]
-    ce00:	e2833001 	add	r3, r3, #1	; 0x1
-    ce04:	e50b3018 	str	r3, [fp, #-24]
-    ce08:	e51b3018 	ldr	r3, [fp, #-24]
-    ce0c:	e353000f 	cmp	r3, #15	; 0xf
-    ce10:	9affffe2 	bls	cda0 <uninstall_irq+0x38>
-    ce14:	e51b3018 	ldr	r3, [fp, #-24]
-    ce18:	e3530010 	cmp	r3, #16	; 0x10
-    ce1c:	1a000002 	bne	ce2c <uninstall_irq+0xc4>
-    ce20:	e3a03000 	mov	r3, #0	; 0x0
-    ce24:	e50b3020 	str	r3, [fp, #-32]
-    ce28:	ea000007 	b	ce4c <uninstall_irq+0xe4>
-    ce2c:	e3a02000 	mov	r2, #0	; 0x0
-    ce30:	e2422eff 	sub	r2, r2, #4080	; 0xff0
-    ce34:	e51b101c 	ldr	r1, [fp, #-28]
-    ce38:	e3a03001 	mov	r3, #1	; 0x1
-    ce3c:	e1a03113 	mov	r3, r3, lsl r1
-    ce40:	e5823000 	str	r3, [r2]
-    ce44:	e3a03001 	mov	r3, #1	; 0x1
-    ce48:	e50b3020 	str	r3, [fp, #-32]
-    ce4c:	e51b3020 	ldr	r3, [fp, #-32]
-    ce50:	e1a00003 	mov	r0, r3
-    ce54:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    ce58:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    ce5c:	e12fff1e 	bx	lr
-
-0000ce60 <disableIRQ>:
-    ce60:	e1a0c00d 	mov	ip, sp
-    ce64:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    ce68:	e24cb004 	sub	fp, ip, #4	; 0x4
-    ce6c:	e24dd004 	sub	sp, sp, #4	; 0x4
-    ce70:	eb00000a 	bl	cea0 <__get_cpsr>
-    ce74:	e1a03000 	mov	r3, r0
-    ce78:	e50b3010 	str	r3, [fp, #-16]
-    ce7c:	e51b3010 	ldr	r3, [fp, #-16]
-    ce80:	e3833080 	orr	r3, r3, #128	; 0x80
-    ce84:	e1a00003 	mov	r0, r3
-    ce88:	eb00000f 	bl	cecc <__set_cpsr>
-    ce8c:	e51b3010 	ldr	r3, [fp, #-16]
-    ce90:	e1a00003 	mov	r0, r3
-    ce94:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    ce98:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    ce9c:	e12fff1e 	bx	lr
-
-0000cea0 <__get_cpsr>:
-    cea0:	e1a0c00d 	mov	ip, sp
-    cea4:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    cea8:	e24cb004 	sub	fp, ip, #4	; 0x4
-    ceac:	e24dd004 	sub	sp, sp, #4	; 0x4
-    ceb0:	e10f3000 	mrs	r3, CPSR
-    ceb4:	e50b3010 	str	r3, [fp, #-16]
-    ceb8:	e51b3010 	ldr	r3, [fp, #-16]
-    cebc:	e1a00003 	mov	r0, r3
-    cec0:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    cec4:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    cec8:	e12fff1e 	bx	lr
-
-0000cecc <__set_cpsr>:
-    cecc:	e1a0c00d 	mov	ip, sp
-    ced0:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    ced4:	e24cb004 	sub	fp, ip, #4	; 0x4
-    ced8:	e24dd004 	sub	sp, sp, #4	; 0x4
-    cedc:	e50b0010 	str	r0, [fp, #-16]
-    cee0:	e51b3010 	ldr	r3, [fp, #-16]
-    cee4:	e129f003 	msr	CPSR_fc, r3
-    cee8:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    ceec:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    cef0:	e12fff1e 	bx	lr
-
-0000cef4 <restoreIRQ>:
-    cef4:	e1a0c00d 	mov	ip, sp
-    cef8:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    cefc:	e24cb004 	sub	fp, ip, #4	; 0x4
-    cf00:	e24dd008 	sub	sp, sp, #8	; 0x8
-    cf04:	e50b0014 	str	r0, [fp, #-20]
-    cf08:	ebffffe4 	bl	cea0 <__get_cpsr>
-    cf0c:	e1a03000 	mov	r3, r0
-    cf10:	e50b3010 	str	r3, [fp, #-16]
-    cf14:	e51b3010 	ldr	r3, [fp, #-16]
-    cf18:	e3c32080 	bic	r2, r3, #128	; 0x80
-    cf1c:	e51b3014 	ldr	r3, [fp, #-20]
-    cf20:	e2033080 	and	r3, r3, #128	; 0x80
-    cf24:	e1823003 	orr	r3, r2, r3
-    cf28:	e1a00003 	mov	r0, r3
-    cf2c:	ebffffe6 	bl	cecc <__set_cpsr>
-    cf30:	e51b3010 	ldr	r3, [fp, #-16]
-    cf34:	e1a00003 	mov	r0, r3
-    cf38:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    cf3c:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    cf40:	e12fff1e 	bx	lr
-
-0000cf44 <enableIRQ>:
-    cf44:	e1a0c00d 	mov	ip, sp
-    cf48:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    cf4c:	e24cb004 	sub	fp, ip, #4	; 0x4
-    cf50:	e24dd004 	sub	sp, sp, #4	; 0x4
-    cf54:	ebffffd1 	bl	cea0 <__get_cpsr>
-    cf58:	e1a03000 	mov	r3, r0
-    cf5c:	e50b3010 	str	r3, [fp, #-16]
-    cf60:	e51b3010 	ldr	r3, [fp, #-16]
-    cf64:	e3c33080 	bic	r3, r3, #128	; 0x80
-    cf68:	e1a00003 	mov	r0, r3
-    cf6c:	ebffffd6 	bl	cecc <__set_cpsr>
-    cf70:	e51b3010 	ldr	r3, [fp, #-16]
-    cf74:	e1a00003 	mov	r0, r3
-    cf78:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    cf7c:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    cf80:	e12fff1e 	bx	lr
-
-0000cf84 <disableFIQ>:
-    cf84:	e1a0c00d 	mov	ip, sp
-    cf88:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    cf8c:	e24cb004 	sub	fp, ip, #4	; 0x4
-    cf90:	e24dd004 	sub	sp, sp, #4	; 0x4
-    cf94:	ebffffc1 	bl	cea0 <__get_cpsr>
-    cf98:	e1a03000 	mov	r3, r0
-    cf9c:	e50b3010 	str	r3, [fp, #-16]
-    cfa0:	e51b3010 	ldr	r3, [fp, #-16]
-    cfa4:	e3833040 	orr	r3, r3, #64	; 0x40
-    cfa8:	e1a00003 	mov	r0, r3
-    cfac:	ebffffc6 	bl	cecc <__set_cpsr>
-    cfb0:	e51b3010 	ldr	r3, [fp, #-16]
-    cfb4:	e1a00003 	mov	r0, r3
-    cfb8:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    cfbc:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    cfc0:	e12fff1e 	bx	lr
-
-0000cfc4 <restoreFIQ>:
-    cfc4:	e1a0c00d 	mov	ip, sp
-    cfc8:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    cfcc:	e24cb004 	sub	fp, ip, #4	; 0x4
-    cfd0:	e24dd008 	sub	sp, sp, #8	; 0x8
-    cfd4:	e50b0014 	str	r0, [fp, #-20]
-    cfd8:	ebffffb0 	bl	cea0 <__get_cpsr>
-    cfdc:	e1a03000 	mov	r3, r0
-    cfe0:	e50b3010 	str	r3, [fp, #-16]
-    cfe4:	e51b3010 	ldr	r3, [fp, #-16]
-    cfe8:	e3c32040 	bic	r2, r3, #64	; 0x40
-    cfec:	e51b3014 	ldr	r3, [fp, #-20]
-    cff0:	e2033040 	and	r3, r3, #64	; 0x40
-    cff4:	e1823003 	orr	r3, r2, r3
-    cff8:	e1a00003 	mov	r0, r3
-    cffc:	ebffffb2 	bl	cecc <__set_cpsr>
-    d000:	e51b3010 	ldr	r3, [fp, #-16]
-    d004:	e1a00003 	mov	r0, r3
-    d008:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    d00c:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    d010:	e12fff1e 	bx	lr
-
-0000d014 <enableFIQ>:
-    d014:	e1a0c00d 	mov	ip, sp
-    d018:	e92dd800 	stmdb	sp!, {fp, ip, lr, pc}
-    d01c:	e24cb004 	sub	fp, ip, #4	; 0x4
-    d020:	e24dd004 	sub	sp, sp, #4	; 0x4
-    d024:	ebffff9d 	bl	cea0 <__get_cpsr>
-    d028:	e1a03000 	mov	r3, r0
-    d02c:	e50b3010 	str	r3, [fp, #-16]
-    d030:	e51b3010 	ldr	r3, [fp, #-16]
-    d034:	e3c33040 	bic	r3, r3, #64	; 0x40
-    d038:	e1a00003 	mov	r0, r3
-    d03c:	ebffffa2 	bl	cecc <__set_cpsr>
-    d040:	e51b3010 	ldr	r3, [fp, #-16]
-    d044:	e1a00003 	mov	r0, r3
-    d048:	e24bd00c 	sub	sp, fp, #12	; 0xc
-    d04c:	e89d6800 	ldmia	sp, {fp, sp, lr}
-    d050:	e12fff1e 	bx	lr
-
-0000d054 <memcpy>:
-    d054:	b510      	push	{r4, lr}
-    d056:	1c04      	adds	r4, r0, #0
-    d058:	1c10      	adds	r0, r2, #0
-    d05a:	1c22      	adds	r2, r4, #0
-    d05c:	e003      	b.n	d066 <memcpy+0x12>
-    d05e:	780b      	ldrb	r3, [r1, #0]
-    d060:	3101      	adds	r1, #1
-    d062:	7013      	strb	r3, [r2, #0]
-    d064:	3201      	adds	r2, #1
-    d066:	3801      	subs	r0, #1
-    d068:	d2f9      	bcs.n	d05e <memcpy+0xa>
-    d06a:	1c20      	adds	r0, r4, #0
-    d06c:	bc10      	pop	{r4}
-    d06e:	bc02      	pop	{r1}
-    d070:	4708      	bx	r1
-    d072:	46c0      	nop			(mov r8, r8)
-
-0000d074 <printf>:
-    d074:	b40f      	push	{r0, r1, r2, r3}
-    d076:	b500      	push	{lr}
-    d078:	4b06      	ldr	r3, [pc, #24]	(d094 <.text+0xd094>)
-    d07a:	b081      	sub	sp, #4
-    d07c:	aa02      	add	r2, sp, #8
-    d07e:	681b      	ldr	r3, [r3, #0]
-    d080:	ca02      	ldmia	r2!, {r1}
-    d082:	6898      	ldr	r0, [r3, #8]
-    d084:	9200      	str	r2, [sp, #0]
-    d086:	f001 fa6b 	bl	e560 <vfprintf>
-    d08a:	b001      	add	sp, #4
-    d08c:	bc08      	pop	{r3}
-    d08e:	b004      	add	sp, #16
-    d090:	4718      	bx	r3
-    d092:	0000      	lsls	r0, r0, #0
-    d094:	0020      	lsls	r0, r4, #0
-    d096:	4000      	ands	r0, r0
-
-0000d098 <_printf_r>:
-    d098:	b40e      	push	{r1, r2, r3}
-    d09a:	b500      	push	{lr}
-    d09c:	b081      	sub	sp, #4
-    d09e:	ab02      	add	r3, sp, #8
-    d0a0:	cb04      	ldmia	r3!, {r2}
-    d0a2:	6881      	ldr	r1, [r0, #8]
-    d0a4:	9300      	str	r3, [sp, #0]
-    d0a6:	f000 f84b 	bl	d140 <_vfprintf_r>
-    d0aa:	b001      	add	sp, #4
-    d0ac:	bc08      	pop	{r3}
-    d0ae:	b003      	add	sp, #12
-    d0b0:	4718      	bx	r3
-    d0b2:	46c0      	nop			(mov r8, r8)
-
-0000d0b4 <_puts_r>:
-    d0b4:	b530      	push	{r4, r5, lr}
-    d0b6:	b087      	sub	sp, #28
-    d0b8:	1c05      	adds	r5, r0, #0
-    d0ba:	1c08      	adds	r0, r1, #0
-    d0bc:	1c0c      	adds	r4, r1, #0
-    d0be:	f000 f827 	bl	d110 <strlen>
-    d0c2:	4b0d      	ldr	r3, [pc, #52]	(d0f8 <.text+0xd0f8>)
-    d0c4:	9302      	str	r3, [sp, #8]
-    d0c6:	2301      	movs	r3, #1
-    d0c8:	9001      	str	r0, [sp, #4]
-    d0ca:	9303      	str	r3, [sp, #12]
-    d0cc:	3001      	adds	r0, #1
-    d0ce:	466b      	mov	r3, sp
-    d0d0:	9006      	str	r0, [sp, #24]
-    d0d2:	9304      	str	r3, [sp, #16]
-    d0d4:	68a8      	ldr	r0, [r5, #8]
-    d0d6:	2302      	movs	r3, #2
-    d0d8:	a904      	add	r1, sp, #16
-    d0da:	9400      	str	r4, [sp, #0]
-    d0dc:	9305      	str	r3, [sp, #20]
-    d0de:	f002 fd5d 	bl	fb9c <__sfvwrite>
-    d0e2:	2800      	cmp	r0, #0
-    d0e4:	d002      	beq.n	d0ec <_puts_r+0x38>
-    d0e6:	2001      	movs	r0, #1
-    d0e8:	4240      	negs	r0, r0
-    d0ea:	e000      	b.n	d0ee <_puts_r+0x3a>
-    d0ec:	200a      	movs	r0, #10
-    d0ee:	b007      	add	sp, #28
-    d0f0:	bc30      	pop	{r4, r5}
-    d0f2:	bc02      	pop	{r1}
-    d0f4:	4708      	bx	r1
-    d0f6:	0000      	lsls	r0, r0, #0
-    d0f8:	599c      	ldr	r4, [r3, r6]
-    d0fa:	0001      	lsls	r1, r0, #0
-
-0000d0fc <puts>:
-    d0fc:	b500      	push	{lr}
-    d0fe:	4b03      	ldr	r3, [pc, #12]	(d10c <.text+0xd10c>)
-    d100:	1c01      	adds	r1, r0, #0
-    d102:	6818      	ldr	r0, [r3, #0]
-    d104:	f7ff ffd6 	bl	d0b4 <_puts_r>
-    d108:	bc02      	pop	{r1}
-    d10a:	4708      	bx	r1
-    d10c:	0020      	lsls	r0, r4, #0
-    d10e:	4000      	ands	r0, r0
-
-0000d110 <strlen>:
-    d110:	1c02      	adds	r2, r0, #0
-    d112:	e000      	b.n	d116 <strlen+0x6>
-    d114:	3001      	adds	r0, #1
-    d116:	7803      	ldrb	r3, [r0, #0]
-    d118:	2b00      	cmp	r3, #0
-    d11a:	d1fb      	bne.n	d114 <strlen+0x4>
-    d11c:	1a80      	subs	r0, r0, r2
-    d11e:	4770      	bx	lr
-
-0000d120 <__sprint>:
-    d120:	b510      	push	{r4, lr}
-    d122:	688b      	ldr	r3, [r1, #8]
-    d124:	1c0c      	adds	r4, r1, #0
-    d126:	2b00      	cmp	r3, #0
-    d128:	d102      	bne.n	d130 <__sprint+0x10>
-    d12a:	2000      	movs	r0, #0
-    d12c:	604b      	str	r3, [r1, #4]
-    d12e:	e004      	b.n	d13a <__sprint+0x1a>
-    d130:	f002 fd34 	bl	fb9c <__sfvwrite>
-    d134:	2300      	movs	r3, #0
-    d136:	60a3      	str	r3, [r4, #8]
-    d138:	6063      	str	r3, [r4, #4]
-    d13a:	bc10      	pop	{r4}
-    d13c:	bc02      	pop	{r1}
-    d13e:	4708      	bx	r1
-
-0000d140 <_vfprintf_r>:
-    d140:	b5f0      	push	{r4, r5, r6, r7, lr}
-    d142:	4cd2      	ldr	r4, [pc, #840]	(d48c <.text+0xd48c>)
-    d144:	44a5      	add	sp, r4
-    d146:	9005      	str	r0, [sp, #20]
-    d148:	9104      	str	r1, [sp, #16]
-    d14a:	1c16      	adds	r6, r2, #0
-    d14c:	1c1d      	adds	r5, r3, #0
-    d14e:	f002 fee5 	bl	ff1c <localeconv>
-    d152:	6800      	ldr	r0, [r0, #0]
-    d154:	900b      	str	r0, [sp, #44]
-    d156:	9805      	ldr	r0, [sp, #20]
-    d158:	2800      	cmp	r0, #0
-    d15a:	d004      	beq.n	d166 <_vfprintf_r+0x26>
-    d15c:	6b83      	ldr	r3, [r0, #56]
-    d15e:	2b00      	cmp	r3, #0
-    d160:	d101      	bne.n	d166 <_vfprintf_r+0x26>
-    d162:	f002 fb3b 	bl	f7dc <__sinit>
-    d166:	9904      	ldr	r1, [sp, #16]
-    d168:	898b      	ldrh	r3, [r1, #12]
-    d16a:	071a      	lsls	r2, r3, #28
-    d16c:	d502      	bpl.n	d174 <_vfprintf_r+0x34>
-    d16e:	690b      	ldr	r3, [r1, #16]
-    d170:	2b00      	cmp	r3, #0
-    d172:	d106      	bne.n	d182 <_vfprintf_r+0x42>
-    d174:	9804      	ldr	r0, [sp, #16]
-    d176:	f001 fbef 	bl	e958 <__swsetup>
-    d17a:	2800      	cmp	r0, #0
-    d17c:	d001      	beq.n	d182 <_vfprintf_r+0x42>
-    d17e:	f001 f9bd 	bl	e4fc <.text+0xe4fc>
-    d182:	9b04      	ldr	r3, [sp, #16]
-    d184:	899a      	ldrh	r2, [r3, #12]
-    d186:	231a      	movs	r3, #26
-    d188:	4013      	ands	r3, r2
-    d18a:	2b0a      	cmp	r3, #10
-    d18c:	d147      	bne.n	d21e <_vfprintf_r+0xde>
-    d18e:	9c04      	ldr	r4, [sp, #16]
-    d190:	200e      	movs	r0, #14
-    d192:	5e23      	ldrsh	r3, [r4, r0]
-    d194:	2b00      	cmp	r3, #0
-    d196:	db42      	blt.n	d21e <_vfprintf_r+0xde>
-    d198:	4cbd      	ldr	r4, [pc, #756]	(d490 <.text+0xd490>)
-    d19a:	2302      	movs	r3, #2
-    d19c:	446c      	add	r4, sp
-    d19e:	439a      	bics	r2, r3
-    d1a0:	9904      	ldr	r1, [sp, #16]
-    d1a2:	81a2      	strh	r2, [r4, #12]
-    d1a4:	89cb      	ldrh	r3, [r1, #14]
-    d1a6:	22bd      	movs	r2, #189
-    d1a8:	81e3      	strh	r3, [r4, #14]
-    d1aa:	00d2      	lsls	r2, r2, #3
-    d1ac:	69cb      	ldr	r3, [r1, #28]
-    d1ae:	446a      	add	r2, sp
-    d1b0:	20be      	movs	r0, #190
-    d1b2:	6013      	str	r3, [r2, #0]
-    d1b4:	00c0      	lsls	r0, r0, #3
-    d1b6:	6a4b      	ldr	r3, [r1, #36]
-    d1b8:	4ab6      	ldr	r2, [pc, #728]	(d494 <.text+0xd494>)
-    d1ba:	4468      	add	r0, sp
-    d1bc:	6003      	str	r3, [r0, #0]
-    d1be:	446a      	add	r2, sp
-    d1c0:	ab1c      	add	r3, sp, #112
-    d1c2:	48b5      	ldr	r0, [pc, #724]	(d498 <.text+0xd498>)
-    d1c4:	21bc      	movs	r1, #188
-    d1c6:	6013      	str	r3, [r2, #0]
-    d1c8:	6023      	str	r3, [r4, #0]
-    d1ca:	00c9      	lsls	r1, r1, #3
-    d1cc:	2380      	movs	r3, #128
-    d1ce:	4ab3      	ldr	r2, [pc, #716]	(d49c <.text+0xd49c>)
-    d1d0:	00db      	lsls	r3, r3, #3
-    d1d2:	4468      	add	r0, sp
-    d1d4:	4469      	add	r1, sp
-    d1d6:	6003      	str	r3, [r0, #0]
-    d1d8:	600b      	str	r3, [r1, #0]
-    d1da:	446a      	add	r2, sp
-    d1dc:	2300      	movs	r3, #0
-    d1de:	6013      	str	r3, [r2, #0]
-    d1e0:	9805      	ldr	r0, [sp, #20]
-    d1e2:	1c21      	adds	r1, r4, #0
-    d1e4:	1c32      	adds	r2, r6, #0
-    d1e6:	1c2b      	adds	r3, r5, #0
-    d1e8:	f7ff ffaa 	bl	d140 <_vfprintf_r>
-    d1ec:	9008      	str	r0, [sp, #32]
-    d1ee:	2800      	cmp	r0, #0
-    d1f0:	db07      	blt.n	d202 <_vfprintf_r+0xc2>
-    d1f2:	1c20      	adds	r0, r4, #0
-    d1f4:	f002 fa92 	bl	f71c <fflush>
-    d1f8:	2800      	cmp	r0, #0
-    d1fa:	d002      	beq.n	d202 <_vfprintf_r+0xc2>
-    d1fc:	2301      	movs	r3, #1
-    d1fe:	425b      	negs	r3, r3
-    d200:	9308      	str	r3, [sp, #32]
-    d202:	4ba3      	ldr	r3, [pc, #652]	(d490 <.text+0xd490>)
-    d204:	446b      	add	r3, sp
-    d206:	899b      	ldrh	r3, [r3, #12]
-    d208:	065c      	lsls	r4, r3, #25
-    d20a:	d401      	bmi.n	d210 <_vfprintf_r+0xd0>
-    d20c:	f001 f991 	bl	e532 <.text+0xe532>
-    d210:	9804      	ldr	r0, [sp, #16]
-    d212:	8983      	ldrh	r3, [r0, #12]
-    d214:	2240      	movs	r2, #64
-    d216:	4313      	orrs	r3, r2
-    d218:	8183      	strh	r3, [r0, #12]
-    d21a:	f001 f98a 	bl	e532 <.text+0xe532>
-    d21e:	22c5      	movs	r2, #197
-    d220:	23d2      	movs	r3, #210
-    d222:	00d2      	lsls	r2, r2, #3
-    d224:	00db      	lsls	r3, r3, #3
-    d226:	24d3      	movs	r4, #211
-    d228:	489d      	ldr	r0, [pc, #628]	(d4a0 <.text+0xd4a0>)
-    d22a:	446a      	add	r2, sp
-    d22c:	446b      	add	r3, sp
-    d22e:	00e4      	lsls	r4, r4, #3
-    d230:	446c      	add	r4, sp
-    d232:	601a      	str	r2, [r3, #0]
-    d234:	4468      	add	r0, sp
-    d236:	2300      	movs	r3, #0
-    d238:	6023      	str	r3, [r4, #0]
-    d23a:	6003      	str	r3, [r0, #0]
-    d23c:	4b99      	ldr	r3, [pc, #612]	(d4a4 <.text+0xd4a4>)
-    d23e:	4c9a      	ldr	r4, [pc, #616]	(d4a8 <.text+0xd4a8>)
-    d240:	9314      	str	r3, [sp, #80]
-    d242:	9415      	str	r4, [sp, #84]
-    d244:	2400      	movs	r4, #0
-    d246:	961b      	str	r6, [sp, #108]
-    d248:	9411      	str	r4, [sp, #68]
-    d24a:	9412      	str	r4, [sp, #72]
-    d24c:	9207      	str	r2, [sp, #28]
-    d24e:	9408      	str	r4, [sp, #32]
-    d250:	940d      	str	r4, [sp, #52]
-    d252:	e001      	b.n	d258 <_vfprintf_r+0x118>
-    d254:	9407      	str	r4, [sp, #28]
-    d256:	9d18      	ldr	r5, [sp, #96]
-    d258:	9e1b      	ldr	r6, [sp, #108]
-    d25a:	e000      	b.n	d25e <_vfprintf_r+0x11e>
-    d25c:	3601      	adds	r6, #1
-    d25e:	7833      	ldrb	r3, [r6, #0]
-    d260:	2b00      	cmp	r3, #0
-    d262:	d001      	beq.n	d268 <_vfprintf_r+0x128>
-    d264:	2b25      	cmp	r3, #37
-    d266:	d1f9      	bne.n	d25c <_vfprintf_r+0x11c>
-    d268:	981b      	ldr	r0, [sp, #108]
-    d26a:	1a34      	subs	r4, r6, r0
-    d26c:	2c00      	cmp	r4, #0
-    d26e:	d022      	beq.n	d2b6 <_vfprintf_r+0x176>
-    d270:	22d3      	movs	r2, #211
-    d272:	9907      	ldr	r1, [sp, #28]
-    d274:	00d2      	lsls	r2, r2, #3
-    d276:	446a      	add	r2, sp
-    d278:	6813      	ldr	r3, [r2, #0]
-    d27a:	6008      	str	r0, [r1, #0]
-    d27c:	4888      	ldr	r0, [pc, #544]	(d4a0 <.text+0xd4a0>)
-    d27e:	191b      	adds	r3, r3, r4
-    d280:	4468      	add	r0, sp
-    d282:	6013      	str	r3, [r2, #0]
-    d284:	6803      	ldr	r3, [r0, #0]
-    d286:	3301      	adds	r3, #1
-    d288:	604c      	str	r4, [r1, #4]
-    d28a:	6003      	str	r3, [r0, #0]
-    d28c:	2b07      	cmp	r3, #7
-    d28e:	dc01      	bgt.n	d294 <_vfprintf_r+0x154>
-    d290:	3108      	adds	r1, #8
-    d292:	e00c      	b.n	d2ae <_vfprintf_r+0x16e>
-    d294:	21d2      	movs	r1, #210
-    d296:	00c9      	lsls	r1, r1, #3
-    d298:	9804      	ldr	r0, [sp, #16]
-    d29a:	4469      	add	r1, sp
-    d29c:	f7ff ff40 	bl	d120 <__sprint>
-    d2a0:	2800      	cmp	r0, #0
-    d2a2:	d001      	beq.n	d2a8 <_vfprintf_r+0x168>
-    d2a4:	f001 f926 	bl	e4f4 <.text+0xe4f4>
-    d2a8:	21c5      	movs	r1, #197
-    d2aa:	00c9      	lsls	r1, r1, #3
-    d2ac:	4469      	add	r1, sp
-    d2ae:	9a08      	ldr	r2, [sp, #32]
-    d2b0:	1912      	adds	r2, r2, r4
-    d2b2:	9107      	str	r1, [sp, #28]
-    d2b4:	9208      	str	r2, [sp, #32]
-    d2b6:	7833      	ldrb	r3, [r6, #0]
-    d2b8:	2b00      	cmp	r3, #0
-    d2ba:	d101      	bne.n	d2c0 <_vfprintf_r+0x180>
-    d2bc:	f001 f900 	bl	e4c0 <.text+0xe4c0>
-    d2c0:	4b7a      	ldr	r3, [pc, #488]	(d4ac <.text+0xd4ac>)
-    d2c2:	2200      	movs	r2, #0
-    d2c4:	446b      	add	r3, sp
-    d2c6:	3601      	adds	r6, #1
-    d2c8:	961b      	str	r6, [sp, #108]
-    d2ca:	701a      	strb	r2, [r3, #0]
-    d2cc:	2301      	movs	r3, #1
-    d2ce:	425b      	negs	r3, r3
-    d2d0:	9217      	str	r2, [sp, #92]
-    d2d2:	9209      	str	r2, [sp, #36]
-    d2d4:	9316      	str	r3, [sp, #88]
-    d2d6:	e003      	b.n	d2e0 <_vfprintf_r+0x1a0>
-    d2d8:	2401      	movs	r4, #1
-    d2da:	4264      	negs	r4, r4
-    d2dc:	9416      	str	r4, [sp, #88]
-    d2de:	1c1d      	adds	r5, r3, #0
-    d2e0:	981b      	ldr	r0, [sp, #108]
-    d2e2:	991b      	ldr	r1, [sp, #108]
-    d2e4:	7800      	ldrb	r0, [r0, #0]
-    d2e6:	3101      	adds	r1, #1
-    d2e8:	9019      	str	r0, [sp, #100]
-    d2ea:	911b      	str	r1, [sp, #108]
-    d2ec:	e000      	b.n	d2f0 <_vfprintf_r+0x1b0>
-    d2ee:	9209      	str	r2, [sp, #36]
-    d2f0:	9b19      	ldr	r3, [sp, #100]
-    d2f2:	3b20      	subs	r3, #32
-    d2f4:	2b58      	cmp	r3, #88
-    d2f6:	d900      	bls.n	d2fa <_vfprintf_r+0x1ba>
-    d2f8:	e3e9      	b.n	dace <.text+0xdace>
-    d2fa:	4a6d      	ldr	r2, [pc, #436]	(d4b0 <.text+0xd4b0>)
-    d2fc:	009b      	lsls	r3, r3, #2
-    d2fe:	589b      	ldr	r3, [r3, r2]
-    d300:	469f      	mov	pc, r3
-    d302:	4a6c      	ldr	r2, [pc, #432]	(d4b4 <.text+0xd4b4>)
-    d304:	9211      	str	r2, [sp, #68]
-    d306:	e359      	b.n	d9bc <.text+0xd9bc>
-    d308:	4a68      	ldr	r2, [pc, #416]	(d4ac <.text+0xd4ac>)
-    d30a:	446a      	add	r2, sp
-    d30c:	7813      	ldrb	r3, [r2, #0]
-    d30e:	2b00      	cmp	r3, #0
-    d310:	d1e6      	bne.n	d2e0 <_vfprintf_r+0x1a0>
-    d312:	2320      	movs	r3, #32
-    d314:	7013      	strb	r3, [r2, #0]
-    d316:	e7e3      	b.n	d2e0 <_vfprintf_r+0x1a0>
-    d318:	2301      	movs	r3, #1
-    d31a:	e03a      	b.n	d392 <_vfprintf_r+0x252>
-    d31c:	1d2b      	adds	r3, r5, #4
-    d31e:	682d      	ldr	r5, [r5, #0]
-    d320:	9509      	str	r5, [sp, #36]
-    d322:	2d00      	cmp	r5, #0
-    d324:	da1a      	bge.n	d35c <_vfprintf_r+0x21c>
-    d326:	4268      	negs	r0, r5
-    d328:	9009      	str	r0, [sp, #36]
-    d32a:	1c1d      	adds	r5, r3, #0
-    d32c:	9917      	ldr	r1, [sp, #92]
-    d32e:	2304      	movs	r3, #4
-    d330:	4319      	orrs	r1, r3
-    d332:	9117      	str	r1, [sp, #92]
-    d334:	e7d4      	b.n	d2e0 <_vfprintf_r+0x1a0>
-    d336:	4b5d      	ldr	r3, [pc, #372]	(d4ac <.text+0xd4ac>)
-    d338:	222b      	movs	r2, #43
-    d33a:	446b      	add	r3, sp
-    d33c:	701a      	strb	r2, [r3, #0]
-    d33e:	e7cf      	b.n	d2e0 <_vfprintf_r+0x1a0>
-    d340:	9a1b      	ldr	r2, [sp, #108]
-    d342:	7813      	ldrb	r3, [r2, #0]
-    d344:	3201      	adds	r2, #1
-    d346:	921b      	str	r2, [sp, #108]
-    d348:	2b2a      	cmp	r3, #42
-    d34a:	d002      	beq.n	d352 <_vfprintf_r+0x212>
-    d34c:	2200      	movs	r2, #0
-    d34e:	9319      	str	r3, [sp, #100]
-    d350:	e013      	b.n	d37a <_vfprintf_r+0x23a>
-    d352:	1d2b      	adds	r3, r5, #4
-    d354:	682d      	ldr	r5, [r5, #0]
-    d356:	9516      	str	r5, [sp, #88]
-    d358:	2d00      	cmp	r5, #0
-    d35a:	dbbd      	blt.n	d2d8 <_vfprintf_r+0x198>
-    d35c:	1c1d      	adds	r5, r3, #0
-    d35e:	e7bf      	b.n	d2e0 <_vfprintf_r+0x1a0>
-    d360:	0093      	lsls	r3, r2, #2
-    d362:	981b      	ldr	r0, [sp, #108]
-    d364:	189b      	adds	r3, r3, r2
-    d366:	9c19      	ldr	r4, [sp, #100]
-    d368:	991b      	ldr	r1, [sp, #108]
-    d36a:	7800      	ldrb	r0, [r0, #0]
-    d36c:	005b      	lsls	r3, r3, #1
-    d36e:	191b      	adds	r3, r3, r4
-    d370:	3101      	adds	r1, #1
-    d372:	1c1a      	adds	r2, r3, #0
-    d374:	9019      	str	r0, [sp, #100]
-    d376:	911b      	str	r1, [sp, #108]
-    d378:	3a30      	subs	r2, #48
-    d37a:	9b19      	ldr	r3, [sp, #100]
-    d37c:	3b30      	subs	r3, #48
-    d37e:	2b09      	cmp	r3, #9
-    d380:	d9ee      	bls.n	d360 <_vfprintf_r+0x220>
-    d382:	2a00      	cmp	r2, #0
-    d384:	9216      	str	r2, [sp, #88]
-    d386:	dab3      	bge.n	d2f0 <_vfprintf_r+0x1b0>
-    d388:	2201      	movs	r2, #1
-    d38a:	4252      	negs	r2, r2
-    d38c:	9216      	str	r2, [sp, #88]
-    d38e:	e7af      	b.n	d2f0 <_vfprintf_r+0x1b0>
-    d390:	2380      	movs	r3, #128
-    d392:	9c17      	ldr	r4, [sp, #92]
-    d394:	431c      	orrs	r4, r3
-    d396:	9417      	str	r4, [sp, #92]
-    d398:	e7a2      	b.n	d2e0 <_vfprintf_r+0x1a0>
-    d39a:	2200      	movs	r2, #0
-    d39c:	0093      	lsls	r3, r2, #2
-    d39e:	189b      	adds	r3, r3, r2
-    d3a0:	9819      	ldr	r0, [sp, #100]
-    d3a2:	005b      	lsls	r3, r3, #1
-    d3a4:	181b      	adds	r3, r3, r0
-    d3a6:	991b      	ldr	r1, [sp, #108]
-    d3a8:	1c1a      	adds	r2, r3, #0
-    d3aa:	9b1b      	ldr	r3, [sp, #108]
-    d3ac:	7809      	ldrb	r1, [r1, #0]
-    d3ae:	3301      	adds	r3, #1
-    d3b0:	931b      	str	r3, [sp, #108]
-    d3b2:	1c0b      	adds	r3, r1, #0
-    d3b4:	3b30      	subs	r3, #48
-    d3b6:	3a30      	subs	r2, #48
-    d3b8:	9119      	str	r1, [sp, #100]
-    d3ba:	2b09      	cmp	r3, #9
-    d3bc:	d897      	bhi.n	d2ee <_vfprintf_r+0x1ae>
-    d3be:	e7ed      	b.n	d39c <_vfprintf_r+0x25c>
-    d3c0:	2308      	movs	r3, #8
-    d3c2:	e7e6      	b.n	d392 <_vfprintf_r+0x252>
-    d3c4:	2340      	movs	r3, #64
-    d3c6:	e00d      	b.n	d3e4 <_vfprintf_r+0x2a4>
-    d3c8:	991b      	ldr	r1, [sp, #108]
-    d3ca:	780b      	ldrb	r3, [r1, #0]
-    d3cc:	2b6c      	cmp	r3, #108
-    d3ce:	d106      	bne.n	d3de <_vfprintf_r+0x29e>
-    d3d0:	9a17      	ldr	r2, [sp, #92]
-    d3d2:	2310      	movs	r3, #16
-    d3d4:	3101      	adds	r1, #1
-    d3d6:	431a      	orrs	r2, r3
-    d3d8:	911b      	str	r1, [sp, #108]
-    d3da:	9217      	str	r2, [sp, #92]
-    d3dc:	e780      	b.n	d2e0 <_vfprintf_r+0x1a0>
-    d3de:	2310      	movs	r3, #16
-    d3e0:	e7d7      	b.n	d392 <_vfprintf_r+0x252>
-    d3e2:	2310      	movs	r3, #16
-    d3e4:	9817      	ldr	r0, [sp, #92]
-    d3e6:	4318      	orrs	r0, r3
-    d3e8:	9017      	str	r0, [sp, #92]
-    d3ea:	e779      	b.n	d2e0 <_vfprintf_r+0x1a0>
-    d3ec:	9919      	ldr	r1, [sp, #100]
-    d3ee:	2943      	cmp	r1, #67
-    d3f0:	d002      	beq.n	d3f8 <_vfprintf_r+0x2b8>
-    d3f2:	9a17      	ldr	r2, [sp, #92]
-    d3f4:	06d2      	lsls	r2, r2, #27
-    d3f6:	d517      	bpl.n	d428 <_vfprintf_r+0x2e8>
-    d3f8:	4c2f      	ldr	r4, [pc, #188]	(d4b8 <.text+0xd4b8>)
-    d3fa:	446c      	add	r4, sp
-    d3fc:	2100      	movs	r1, #0
-    d3fe:	2208      	movs	r2, #8
-    d400:	1c20      	adds	r0, r4, #0
-    d402:	f003 f879 	bl	104f8 <memset>
-    d406:	218e      	movs	r1, #142
-    d408:	00c9      	lsls	r1, r1, #3
-    d40a:	682a      	ldr	r2, [r5, #0]
-    d40c:	9805      	ldr	r0, [sp, #20]
-    d40e:	4469      	add	r1, sp
-    d410:	1c23      	adds	r3, r4, #0
-    d412:	f001 f8b5 	bl	e580 <_wcrtomb_r>
-    d416:	1c06      	adds	r6, r0, #0
-    d418:	1c43      	adds	r3, r0, #1
-    d41a:	d101      	bne.n	d420 <_vfprintf_r+0x2e0>
-    d41c:	f001 f84a 	bl	e4b4 <.text+0xe4b4>
-    d420:	3504      	adds	r5, #4
-    d422:	9518      	str	r5, [sp, #96]
-    d424:	f001 f876 	bl	e514 <.text+0xe514>
-    d428:	238e      	movs	r3, #142
-    d42a:	682a      	ldr	r2, [r5, #0]
-    d42c:	00db      	lsls	r3, r3, #3
-    d42e:	1d29      	adds	r1, r5, #4
-    d430:	446b      	add	r3, sp
-    d432:	2601      	movs	r6, #1
-    d434:	9118      	str	r1, [sp, #96]
-    d436:	701a      	strb	r2, [r3, #0]
-    d438:	f001 f86c 	bl	e514 <.text+0xe514>
-    d43c:	9a17      	ldr	r2, [sp, #92]
-    d43e:	2310      	movs	r3, #16
-    d440:	431a      	orrs	r2, r3
-    d442:	9217      	str	r2, [sp, #92]
-    d444:	9b17      	ldr	r3, [sp, #92]
-    d446:	06db      	lsls	r3, r3, #27
-    d448:	d503      	bpl.n	d452 <_vfprintf_r+0x312>
-    d44a:	1d2c      	adds	r4, r5, #4
-    d44c:	9418      	str	r4, [sp, #96]
-    d44e:	682c      	ldr	r4, [r5, #0]
-    d450:	e00a      	b.n	d468 <_vfprintf_r+0x328>
-    d452:	9917      	ldr	r1, [sp, #92]
-    d454:	1d2b      	adds	r3, r5, #4
-    d456:	6828      	ldr	r0, [r5, #0]
-    d458:	0649      	lsls	r1, r1, #25
-    d45a:	d503      	bpl.n	d464 <_vfprintf_r+0x324>
-    d45c:	9318      	str	r3, [sp, #96]
-    d45e:	0403      	lsls	r3, r0, #16
-    d460:	141c      	asrs	r4, r3, #16
-    d462:	e001      	b.n	d468 <_vfprintf_r+0x328>
-    d464:	9318      	str	r3, [sp, #96]
-    d466:	1c04      	adds	r4, r0, #0
-    d468:	2c00      	cmp	r4, #0
-    d46a:	da04      	bge.n	d476 <_vfprintf_r+0x336>
-    d46c:	4b0f      	ldr	r3, [pc, #60]	(d4ac <.text+0xd4ac>)
-    d46e:	222d      	movs	r2, #45
-    d470:	446b      	add	r3, sp
-    d472:	701a      	strb	r2, [r3, #0]
-    d474:	4264      	negs	r4, r4
-    d476:	2101      	movs	r1, #1
-    d478:	e2c0      	b.n	d9fc <.text+0xd9fc>
-    d47a:	9a19      	ldr	r2, [sp, #100]
-    d47c:	9b16      	ldr	r3, [sp, #88]
-    d47e:	921a      	str	r2, [sp, #104]
-    d480:	3301      	adds	r3, #1
-    d482:	d11b      	bne.n	d4bc <.text+0xd4bc>
-    d484:	2406      	movs	r4, #6
-    d486:	9416      	str	r4, [sp, #88]
-    d488:	e022      	b.n	d4d0 <.text+0xd4d0>
-    d48a:	0000      	lsls	r0, r0, #0
-    d48c:	f938 ffff 	ldrsh.w	pc, [r8, #255]!
-    d490:	05cc      	lsls	r4, r1, #23
-    d492:	0000      	lsls	r0, r0, #0
-    d494:	05dc      	lsls	r4, r3, #23
-    d496:	0000      	lsls	r0, r0, #0
-    d498:	05d4      	lsls	r4, r2, #23
-    d49a:	0000      	lsls	r0, r0, #0
-    d49c:	05e4      	lsls	r4, r4, #23
-    d49e:	0000      	lsls	r0, r0, #0
-    d4a0:	0694      	lsls	r4, r2, #26
-	...
-    d4aa:	0000      	lsls	r0, r0, #0
-    d4ac:	06c7      	lsls	r7, r0, #27
-    d4ae:	0000      	lsls	r0, r0, #0
-    d4b0:	5388      	strh	r0, [r1, r6]
-    d4b2:	0001      	lsls	r1, r0, #0
-    d4b4:	59a0      	ldr	r0, [r4, r6]
-    d4b6:	0001      	lsls	r1, r0, #0
-    d4b8:	06a4      	lsls	r4, r4, #26
-    d4ba:	0000      	lsls	r0, r0, #0
-    d4bc:	9819      	ldr	r0, [sp, #100]
-    d4be:	2867      	cmp	r0, #103
-    d4c0:	d001      	beq.n	d4c6 <.text+0xd4c6>
-    d4c2:	2847      	cmp	r0, #71
-    d4c4:	d104      	bne.n	d4d0 <.text+0xd4d0>
-    d4c6:	9916      	ldr	r1, [sp, #88]
-    d4c8:	2900      	cmp	r1, #0
-    d4ca:	d101      	bne.n	d4d0 <.text+0xd4d0>
-    d4cc:	2201      	movs	r2, #1
-    d4ce:	9216      	str	r2, [sp, #88]
-    d4d0:	9c17      	ldr	r4, [sp, #92]
-    d4d2:	1c2b      	adds	r3, r5, #0
-    d4d4:	3308      	adds	r3, #8
-    d4d6:	0724      	lsls	r4, r4, #28
-    d4d8:	d505      	bpl.n	d4e6 <.text+0xd4e6>
-    d4da:	6828      	ldr	r0, [r5, #0]
-    d4dc:	6869      	ldr	r1, [r5, #4]
-    d4de:	9318      	str	r3, [sp, #96]
-    d4e0:	9014      	str	r0, [sp, #80]
-    d4e2:	9115      	str	r1, [sp, #84]
-    d4e4:	e004      	b.n	d4f0 <.text+0xd4f0>
-    d4e6:	6829      	ldr	r1, [r5, #0]
-    d4e8:	686a      	ldr	r2, [r5, #4]
-    d4ea:	9114      	str	r1, [sp, #80]
-    d4ec:	9215      	str	r2, [sp, #84]
-    d4ee:	9318      	str	r3, [sp, #96]
-    d4f0:	9814      	ldr	r0, [sp, #80]
-    d4f2:	9915      	ldr	r1, [sp, #84]
-    d4f4:	f003 fdaa 	bl	1104c <isinf>
-    d4f8:	2800      	cmp	r0, #0
-    d4fa:	d017      	beq.n	d52c <.text+0xd52c>
-    d4fc:	9814      	ldr	r0, [sp, #80]
-    d4fe:	9915      	ldr	r1, [sp, #84]
-    d500:	4bc3      	ldr	r3, [pc, #780]	(d810 <.text+0xd810>)
-    d502:	4ac2      	ldr	r2, [pc, #776]	(d80c <.text+0xd80c>)
-    d504:	f007 fe3e 	bl	15184 <____ltdf2_from_thumb>
-    d508:	2800      	cmp	r0, #0
-    d50a:	da03      	bge.n	d514 <.text+0xd514>
-    d50c:	4bc1      	ldr	r3, [pc, #772]	(d814 <.text+0xd814>)
-    d50e:	222d      	movs	r2, #45
-    d510:	446b      	add	r3, sp
-    d512:	701a      	strb	r2, [r3, #0]
-    d514:	9b19      	ldr	r3, [sp, #100]
-    d516:	3b45      	subs	r3, #69
-    d518:	2b02      	cmp	r3, #2
-    d51a:	d904      	bls.n	d526 <.text+0xd526>
-    d51c:	4fbe      	ldr	r7, [pc, #760]	(d818 <.text+0xd818>)
-    d51e:	2200      	movs	r2, #0
-    d520:	2603      	movs	r6, #3
-    d522:	920f      	str	r2, [sp, #60]
-    d524:	e2ec      	b.n	db00 <.text+0xdb00>
-    d526:	4fbd      	ldr	r7, [pc, #756]	(d81c <.text+0xd81c>)
-    d528:	2603      	movs	r6, #3
-    d52a:	e2e4      	b.n	daf6 <.text+0xdaf6>
-    d52c:	9814      	ldr	r0, [sp, #80]
-    d52e:	9915      	ldr	r1, [sp, #84]
-    d530:	f003 fda2 	bl	11078 <isnan>
-    d534:	2800      	cmp	r0, #0
-    d536:	d009      	beq.n	d54c <.text+0xd54c>
-    d538:	9b19      	ldr	r3, [sp, #100]
-    d53a:	3b45      	subs	r3, #69
-    d53c:	2b02      	cmp	r3, #2
-    d53e:	d802      	bhi.n	d546 <.text+0xd546>
-    d540:	4fb7      	ldr	r7, [pc, #732]	(d820 <.text+0xd820>)
-    d542:	2603      	movs	r6, #3
-    d544:	e2da      	b.n	dafc <.text+0xdafc>
-    d546:	4fb7      	ldr	r7, [pc, #732]	(d824 <.text+0xd824>)
-    d548:	2603      	movs	r6, #3
-    d54a:	e21b      	b.n	d984 <.text+0xd984>
-    d54c:	9917      	ldr	r1, [sp, #92]
-    d54e:	2380      	movs	r3, #128
-    d550:	005b      	lsls	r3, r3, #1
-    d552:	9a19      	ldr	r2, [sp, #100]
-    d554:	4319      	orrs	r1, r3
-    d556:	9117      	str	r1, [sp, #92]
-    d558:	2a66      	cmp	r2, #102
-    d55a:	d103      	bne.n	d564 <.text+0xd564>
-    d55c:	9b16      	ldr	r3, [sp, #88]
-    d55e:	2603      	movs	r6, #3
-    d560:	930a      	str	r3, [sp, #40]
-    d562:	e00b      	b.n	d57c <.text+0xd57c>
-    d564:	9c19      	ldr	r4, [sp, #100]
-    d566:	2c65      	cmp	r4, #101
-    d568:	d004      	beq.n	d574 <.text+0xd574>
-    d56a:	2c45      	cmp	r4, #69
-    d56c:	d002      	beq.n	d574 <.text+0xd574>
-    d56e:	9816      	ldr	r0, [sp, #88]
-    d570:	900a      	str	r0, [sp, #40]
-    d572:	e002      	b.n	d57a <.text+0xd57a>
-    d574:	9916      	ldr	r1, [sp, #88]
-    d576:	3101      	adds	r1, #1
-    d578:	910a      	str	r1, [sp, #40]
-    d57a:	2602      	movs	r6, #2
-    d57c:	9b14      	ldr	r3, [sp, #80]
-    d57e:	9c15      	ldr	r4, [sp, #84]
-    d580:	2b00      	cmp	r3, #0
-    d582:	db03      	blt.n	d58c <.text+0xd58c>
-    d584:	1c25      	adds	r5, r4, #0
-    d586:	2200      	movs	r2, #0
-    d588:	1c1c      	adds	r4, r3, #0
-    d58a:	e006      	b.n	d59a <.text+0xd59a>
-    d58c:	9b15      	ldr	r3, [sp, #84]
-    d58e:	9814      	ldr	r0, [sp, #80]
-    d590:	2180      	movs	r1, #128
-    d592:	0609      	lsls	r1, r1, #24
-    d594:	1844      	adds	r4, r0, r1
-    d596:	1c1d      	adds	r5, r3, #0
-    d598:	222d      	movs	r2, #45
-    d59a:	9b0a      	ldr	r3, [sp, #40]
-    d59c:	9300      	str	r3, [sp, #0]
-    d59e:	4ba2      	ldr	r3, [pc, #648]	(d828 <.text+0xd828>)
-    d5a0:	446b      	add	r3, sp
-    d5a2:	9301      	str	r3, [sp, #4]
-    d5a4:	4ba1      	ldr	r3, [pc, #644]	(d82c <.text+0xd82c>)
-    d5a6:	446b      	add	r3, sp
-    d5a8:	9302      	str	r3, [sp, #8]
-    d5aa:	23d8      	movs	r3, #216
-    d5ac:	00db      	lsls	r3, r3, #3
-    d5ae:	446b      	add	r3, sp
-    d5b0:	920c      	str	r2, [sp, #48]
-    d5b2:	9303      	str	r3, [sp, #12]
-    d5b4:	9805      	ldr	r0, [sp, #20]
-    d5b6:	1c21      	adds	r1, r4, #0
-    d5b8:	1c2a      	adds	r2, r5, #0
-    d5ba:	1c33      	adds	r3, r6, #0
-    d5bc:	f001 fab0 	bl	eb20 <_dtoa_r>
-    d5c0:	1c07      	adds	r7, r0, #0
-    d5c2:	9819      	ldr	r0, [sp, #100]
-    d5c4:	2867      	cmp	r0, #103
-    d5c6:	d001      	beq.n	d5cc <.text+0xd5cc>
-    d5c8:	2847      	cmp	r0, #71
-    d5ca:	d102      	bne.n	d5d2 <.text+0xd5d2>
-    d5cc:	9917      	ldr	r1, [sp, #92]
-    d5ce:	07c9      	lsls	r1, r1, #31
-    d5d0:	d533      	bpl.n	d63a <.text+0xd63a>
-    d5d2:	9a0a      	ldr	r2, [sp, #40]
-    d5d4:	9b19      	ldr	r3, [sp, #100]
-    d5d6:	18be      	adds	r6, r7, r2
-    d5d8:	2b66      	cmp	r3, #102
-    d5da:	d114      	bne.n	d606 <.text+0xd606>
-    d5dc:	783b      	ldrb	r3, [r7, #0]
-    d5de:	2b30      	cmp	r3, #48
-    d5e0:	d10d      	bne.n	d5fe <.text+0xd5fe>
-    d5e2:	1c20      	adds	r0, r4, #0
-    d5e4:	1c29      	adds	r1, r5, #0
-    d5e6:	4b8a      	ldr	r3, [pc, #552]	(d810 <.text+0xd810>)
-    d5e8:	4a88      	ldr	r2, [pc, #544]	(d80c <.text+0xd80c>)
-    d5ea:	f007 fdcf 	bl	1518c <____nedf2_from_thumb>
-    d5ee:	2800      	cmp	r0, #0
-    d5f0:	d005      	beq.n	d5fe <.text+0xd5fe>
-    d5f2:	980a      	ldr	r0, [sp, #40]
-    d5f4:	498c      	ldr	r1, [pc, #560]	(d828 <.text+0xd828>)
-    d5f6:	2301      	movs	r3, #1
-    d5f8:	1a1b      	subs	r3, r3, r0
-    d5fa:	4469      	add	r1, sp
-    d5fc:	600b      	str	r3, [r1, #0]
-    d5fe:	4a8a      	ldr	r2, [pc, #552]	(d828 <.text+0xd828>)
-    d600:	446a      	add	r2, sp
-    d602:	6813      	ldr	r3, [r2, #0]
-    d604:	18f6      	adds	r6, r6, r3
-    d606:	1c20      	adds	r0, r4, #0
-    d608:	1c29      	adds	r1, r5, #0
-    d60a:	4b81      	ldr	r3, [pc, #516]	(d810 <.text+0xd810>)
-    d60c:	4a7f      	ldr	r2, [pc, #508]	(d80c <.text+0xd80c>)
-    d60e:	f007 fdc1 	bl	15194 <____eqdf2_from_thumb>
-    d612:	2800      	cmp	r0, #0
-    d614:	d10b      	bne.n	d62e <.text+0xd62e>
-    d616:	23d8      	movs	r3, #216
-    d618:	00db      	lsls	r3, r3, #3
-    d61a:	446b      	add	r3, sp
-    d61c:	601e      	str	r6, [r3, #0]
-    d61e:	e006      	b.n	d62e <.text+0xd62e>
-    d620:	24d8      	movs	r4, #216
-    d622:	2330      	movs	r3, #48
-    d624:	00e4      	lsls	r4, r4, #3
-    d626:	7013      	strb	r3, [r2, #0]
-    d628:	446c      	add	r4, sp
-    d62a:	1c53      	adds	r3, r2, #1
-    d62c:	6023      	str	r3, [r4, #0]
-    d62e:	20d8      	movs	r0, #216
-    d630:	00c0      	lsls	r0, r0, #3
-    d632:	4468      	add	r0, sp
-    d634:	6802      	ldr	r2, [r0, #0]
-    d636:	42b2      	cmp	r2, r6
-    d638:	d3f2      	bcc.n	d620 <.text+0xd620>
-    d63a:	21d8      	movs	r1, #216
-    d63c:	00c9      	lsls	r1, r1, #3
-    d63e:	4469      	add	r1, sp
-    d640:	680b      	ldr	r3, [r1, #0]
-    d642:	9a19      	ldr	r2, [sp, #100]
-    d644:	1bdb      	subs	r3, r3, r7
-    d646:	9313      	str	r3, [sp, #76]
-    d648:	2a67      	cmp	r2, #103
-    d64a:	d001      	beq.n	d650 <.text+0xd650>
-    d64c:	2a47      	cmp	r2, #71
-    d64e:	d112      	bne.n	d676 <.text+0xd676>
-    d650:	4c75      	ldr	r4, [pc, #468]	(d828 <.text+0xd828>)
-    d652:	446c      	add	r4, sp
-    d654:	6823      	ldr	r3, [r4, #0]
-    d656:	1d18      	adds	r0, r3, #4
-    d658:	dd05      	ble.n	d666 <.text+0xd666>
-    d65a:	9916      	ldr	r1, [sp, #88]
-    d65c:	428b      	cmp	r3, r1
-    d65e:	dc02      	bgt.n	d666 <.text+0xd666>
-    d660:	2267      	movs	r2, #103
-    d662:	921a      	str	r2, [sp, #104]
-    d664:	e074      	b.n	d750 <.text+0xd750>
-    d666:	9b19      	ldr	r3, [sp, #100]
-    d668:	2b67      	cmp	r3, #103
-    d66a:	d001      	beq.n	d670 <.text+0xd670>
-    d66c:	f000 ff4a 	bl	e504 <.text+0xe504>
-    d670:	2465      	movs	r4, #101
-    d672:	941a      	str	r4, [sp, #104]
-    d674:	e003      	b.n	d67e <.text+0xd67e>
-    d676:	9819      	ldr	r0, [sp, #100]
-    d678:	2865      	cmp	r0, #101
-    d67a:	dc4a      	bgt.n	d712 <.text+0xd712>
-    d67c:	901a      	str	r0, [sp, #104]
-    d67e:	496a      	ldr	r1, [pc, #424]	(d828 <.text+0xd828>)
-    d680:	4469      	add	r1, sp
-    d682:	680b      	ldr	r3, [r1, #0]
-    d684:	4a6a      	ldr	r2, [pc, #424]	(d830 <.text+0xd830>)
-    d686:	1e5d      	subs	r5, r3, #1
-    d688:	ab1a      	add	r3, sp, #104
-    d68a:	781b      	ldrb	r3, [r3, #0]
-    d68c:	446a      	add	r2, sp
-    d68e:	600d      	str	r5, [r1, #0]
-    d690:	7013      	strb	r3, [r2, #0]
-    d692:	2d00      	cmp	r5, #0
-    d694:	da02      	bge.n	d69c <.text+0xd69c>
-    d696:	426d      	negs	r5, r5
-    d698:	232d      	movs	r3, #45
-    d69a:	e000      	b.n	d69e <.text+0xd69e>
-    d69c:	232b      	movs	r3, #43
-    d69e:	7053      	strb	r3, [r2, #1]
-    d6a0:	2d09      	cmp	r5, #9
-    d6a2:	dd21      	ble.n	d6e8 <.text+0xd6e8>
-    d6a4:	24d2      	movs	r4, #210
-    d6a6:	00e4      	lsls	r4, r4, #3
-    d6a8:	446c      	add	r4, sp
-    d6aa:	1c28      	adds	r0, r5, #0
-    d6ac:	210a      	movs	r1, #10
-    d6ae:	f006 f981 	bl	139b4 <__modsi3>
-    d6b2:	3c01      	subs	r4, #1
-    d6b4:	3030      	adds	r0, #48
-    d6b6:	7020      	strb	r0, [r4, #0]
-    d6b8:	210a      	movs	r1, #10
-    d6ba:	1c28      	adds	r0, r5, #0
-    d6bc:	f006 f8c4 	bl	13848 <__aeabi_idiv>
-    d6c0:	1c05      	adds	r5, r0, #0
-    d6c2:	2809      	cmp	r0, #9
-    d6c4:	dcf1      	bgt.n	d6aa <.text+0xd6aa>
-    d6c6:	4a5b      	ldr	r2, [pc, #364]	(d834 <.text+0xd834>)
-    d6c8:	1c03      	adds	r3, r0, #0
-    d6ca:	1e61      	subs	r1, r4, #1
-    d6cc:	3330      	adds	r3, #48
-    d6ce:	446a      	add	r2, sp
-    d6d0:	700b      	strb	r3, [r1, #0]
-    d6d2:	e003      	b.n	d6dc <.text+0xd6dc>
-    d6d4:	780b      	ldrb	r3, [r1, #0]
-    d6d6:	3101      	adds	r1, #1
-    d6d8:	7013      	strb	r3, [r2, #0]
-    d6da:	3201      	adds	r2, #1
-    d6dc:	23d2      	movs	r3, #210
-    d6de:	00db      	lsls	r3, r3, #3
-    d6e0:	446b      	add	r3, sp
-    d6e2:	4299      	cmp	r1, r3
-    d6e4:	d3f6      	bcc.n	d6d4 <.text+0xd6d4>
-    d6e6:	e008      	b.n	d6fa <.text+0xd6fa>
-    d6e8:	4b51      	ldr	r3, [pc, #324]	(d830 <.text+0xd830>)
-    d6ea:	2230      	movs	r2, #48
-    d6ec:	446b      	add	r3, sp
-    d6ee:	709a      	strb	r2, [r3, #2]
-    d6f0:	1c2a      	adds	r2, r5, #0
-    d6f2:	3230      	adds	r2, #48
-    d6f4:	70da      	strb	r2, [r3, #3]
-    d6f6:	4a50      	ldr	r2, [pc, #320]	(d838 <.text+0xd838>)
-    d6f8:	446a      	add	r2, sp
-    d6fa:	4b4d      	ldr	r3, [pc, #308]	(d830 <.text+0xd830>)
-    d6fc:	9c13      	ldr	r4, [sp, #76]
-    d6fe:	446b      	add	r3, sp
-    d700:	1ad2      	subs	r2, r2, r3
-    d702:	920d      	str	r2, [sp, #52]
-    d704:	1916      	adds	r6, r2, r4
-    d706:	2c01      	cmp	r4, #1
-    d708:	dc2b      	bgt.n	d762 <.text+0xd762>
-    d70a:	9817      	ldr	r0, [sp, #92]
-    d70c:	07c0      	lsls	r0, r0, #31
-    d70e:	d532      	bpl.n	d776 <.text+0xd776>
-    d710:	e027      	b.n	d762 <.text+0xd762>
-    d712:	9919      	ldr	r1, [sp, #100]
-    d714:	2966      	cmp	r1, #102
-    d716:	d119      	bne.n	d74c <.text+0xd74c>
-    d718:	4a43      	ldr	r2, [pc, #268]	(d828 <.text+0xd828>)
-    d71a:	446a      	add	r2, sp
-    d71c:	6816      	ldr	r6, [r2, #0]
-    d71e:	2e00      	cmp	r6, #0
-    d720:	dd09      	ble.n	d736 <.text+0xd736>
-    d722:	9b16      	ldr	r3, [sp, #88]
-    d724:	2b00      	cmp	r3, #0
-    d726:	d102      	bne.n	d72e <.text+0xd72e>
-    d728:	9c17      	ldr	r4, [sp, #92]
-    d72a:	07e4      	lsls	r4, r4, #31
-    d72c:	d523      	bpl.n	d776 <.text+0xd776>
-    d72e:	9816      	ldr	r0, [sp, #88]
-    d730:	1c73      	adds	r3, r6, #1
-    d732:	18c6      	adds	r6, r0, r3
-    d734:	e01f      	b.n	d776 <.text+0xd776>
-    d736:	9916      	ldr	r1, [sp, #88]
-    d738:	2900      	cmp	r1, #0
-    d73a:	d104      	bne.n	d746 <.text+0xd746>
-    d73c:	9a17      	ldr	r2, [sp, #92]
-    d73e:	07d2      	lsls	r2, r2, #31
-    d740:	d401      	bmi.n	d746 <.text+0xd746>
-    d742:	2601      	movs	r6, #1
-    d744:	e017      	b.n	d776 <.text+0xd776>
-    d746:	9e16      	ldr	r6, [sp, #88]
-    d748:	3602      	adds	r6, #2
-    d74a:	e014      	b.n	d776 <.text+0xd776>
-    d74c:	9b19      	ldr	r3, [sp, #100]
-    d74e:	931a      	str	r3, [sp, #104]
-    d750:	4c35      	ldr	r4, [pc, #212]	(d828 <.text+0xd828>)
-    d752:	446c      	add	r4, sp
-    d754:	6826      	ldr	r6, [r4, #0]
-    d756:	9813      	ldr	r0, [sp, #76]
-    d758:	4286      	cmp	r6, r0
-    d75a:	db04      	blt.n	d766 <.text+0xd766>
-    d75c:	9917      	ldr	r1, [sp, #92]
-    d75e:	07c9      	lsls	r1, r1, #31
-    d760:	d509      	bpl.n	d776 <.text+0xd776>
-    d762:	3601      	adds	r6, #1
-    d764:	e007      	b.n	d776 <.text+0xd776>
-    d766:	2e00      	cmp	r6, #0
-    d768:	dd01      	ble.n	d76e <.text+0xd76e>
-    d76a:	2001      	movs	r0, #1
-    d76c:	e001      	b.n	d772 <.text+0xd772>
-    d76e:	2302      	movs	r3, #2
-    d770:	1b98      	subs	r0, r3, r6
-    d772:	9a13      	ldr	r2, [sp, #76]
-    d774:	1816      	adds	r6, r2, r0
-    d776:	9b0c      	ldr	r3, [sp, #48]
-    d778:	2b00      	cmp	r3, #0
-    d77a:	d106      	bne.n	d78a <.text+0xd78a>
-    d77c:	9c1a      	ldr	r4, [sp, #104]
-    d77e:	9813      	ldr	r0, [sp, #76]
-    d780:	2100      	movs	r1, #0
-    d782:	9419      	str	r4, [sp, #100]
-    d784:	900e      	str	r0, [sp, #56]
-    d786:	910f      	str	r1, [sp, #60]
-    d788:	e1ba      	b.n	db00 <.text+0xdb00>
-    d78a:	4b22      	ldr	r3, [pc, #136]	(d814 <.text+0xd814>)
-    d78c:	222d      	movs	r2, #45
-    d78e:	446b      	add	r3, sp
-    d790:	701a      	strb	r2, [r3, #0]
-    d792:	2e00      	cmp	r6, #0
-    d794:	9610      	str	r6, [sp, #64]
-    d796:	da01      	bge.n	d79c <.text+0xd79c>
-    d798:	2200      	movs	r2, #0
-    d79a:	9210      	str	r2, [sp, #64]
-    d79c:	9b1a      	ldr	r3, [sp, #104]
-    d79e:	9c13      	ldr	r4, [sp, #76]
-    d7a0:	2000      	movs	r0, #0
-    d7a2:	9319      	str	r3, [sp, #100]
-    d7a4:	940e      	str	r4, [sp, #56]
-    d7a6:	900f      	str	r0, [sp, #60]
-    d7a8:	e1b4      	b.n	db14 <.text+0xdb14>
-    d7aa:	9917      	ldr	r1, [sp, #92]
-    d7ac:	06c9      	lsls	r1, r1, #27
-    d7ae:	d505      	bpl.n	d7bc <.text+0xd7bc>
-    d7b0:	682b      	ldr	r3, [r5, #0]
-    d7b2:	9c08      	ldr	r4, [sp, #32]
-    d7b4:	1d2a      	adds	r2, r5, #4
-    d7b6:	9218      	str	r2, [sp, #96]
-    d7b8:	601c      	str	r4, [r3, #0]
-    d7ba:	e54c      	b.n	d256 <_vfprintf_r+0x116>
-    d7bc:	9817      	ldr	r0, [sp, #92]
-    d7be:	1d2b      	adds	r3, r5, #4
-    d7c0:	0640      	lsls	r0, r0, #25
-    d7c2:	d505      	bpl.n	d7d0 <.text+0xd7d0>
-    d7c4:	4669      	mov	r1, sp
-    d7c6:	9318      	str	r3, [sp, #96]
-    d7c8:	8c09      	ldrh	r1, [r1, #32]
-    d7ca:	682b      	ldr	r3, [r5, #0]
-    d7cc:	8019      	strh	r1, [r3, #0]
-    d7ce:	e542      	b.n	d256 <_vfprintf_r+0x116>
-    d7d0:	9318      	str	r3, [sp, #96]
-    d7d2:	9a08      	ldr	r2, [sp, #32]
-    d7d4:	682b      	ldr	r3, [r5, #0]
-    d7d6:	601a      	str	r2, [r3, #0]
-    d7d8:	e53d      	b.n	d256 <_vfprintf_r+0x116>
-    d7da:	9c17      	ldr	r4, [sp, #92]
-    d7dc:	2310      	movs	r3, #16
-    d7de:	431c      	orrs	r4, r3
-    d7e0:	9417      	str	r4, [sp, #92]
-    d7e2:	9817      	ldr	r0, [sp, #92]
-    d7e4:	06c0      	lsls	r0, r0, #27
-    d7e6:	d503      	bpl.n	d7f0 <.text+0xd7f0>
-    d7e8:	682c      	ldr	r4, [r5, #0]
-    d7ea:	1d29      	adds	r1, r5, #4
-    d7ec:	9118      	str	r1, [sp, #96]
-    d7ee:	e007      	b.n	d800 <.text+0xd800>
-    d7f0:	9a17      	ldr	r2, [sp, #92]
-    d7f2:	1d2b      	adds	r3, r5, #4
-    d7f4:	6828      	ldr	r0, [r5, #0]
-    d7f6:	0652      	lsls	r2, r2, #25
-    d7f8:	d504      	bpl.n	d804 <.text+0xd804>
-    d7fa:	9318      	str	r3, [sp, #96]
-    d7fc:	0403      	lsls	r3, r0, #16
-    d7fe:	0c1c      	lsrs	r4, r3, #16
-    d800:	2100      	movs	r1, #0
-    d802:	e0f7      	b.n	d9f4 <.text+0xd9f4>
-    d804:	1c04      	adds	r4, r0, #0
-    d806:	9318      	str	r3, [sp, #96]
-    d808:	e7fa      	b.n	d800 <.text+0xd800>
-	...
-    d812:	0000      	lsls	r0, r0, #0
-    d814:	06c7      	lsls	r7, r0, #27
-    d816:	0000      	lsls	r0, r0, #0
-    d818:	59b4      	ldr	r4, [r6, r6]
-    d81a:	0001      	lsls	r1, r0, #0
-    d81c:	59b8      	ldr	r0, [r7, r6]
-    d81e:	0001      	lsls	r1, r0, #0
-    d820:	59bc      	ldr	r4, [r7, r6]
-    d822:	0001      	lsls	r1, r0, #0
-    d824:	59c0      	ldr	r0, [r0, r7]
-    d826:	0001      	lsls	r1, r0, #0
-    d828:	06b4      	lsls	r4, r6, #26
-    d82a:	0000      	lsls	r0, r0, #0
-    d82c:	06bc      	lsls	r4, r7, #26
-    d82e:	0000      	lsls	r0, r0, #0
-    d830:	06ad      	lsls	r5, r5, #26
-    d832:	0000      	lsls	r0, r0, #0
-    d834:	06af      	lsls	r7, r5, #26
-    d836:	0000      	lsls	r0, r0, #0
-    d838:	06b1      	lsls	r1, r6, #26
-    d83a:	0000      	lsls	r0, r0, #0
-    d83c:	1d2b      	adds	r3, r5, #4
-    d83e:	9817      	ldr	r0, [sp, #92]
-    d840:	9318      	str	r3, [sp, #96]
-    d842:	49c9      	ldr	r1, [pc, #804]	(db68 <.text+0xdb68>)
-    d844:	2302      	movs	r3, #2
-    d846:	682c      	ldr	r4, [r5, #0]
-    d848:	4318      	orrs	r0, r3
-    d84a:	2278      	movs	r2, #120
-    d84c:	9017      	str	r0, [sp, #92]
-    d84e:	9111      	str	r1, [sp, #68]
-    d850:	9219      	str	r2, [sp, #100]
-    d852:	e0ce      	b.n	d9f2 <.text+0xd9f2>
-    d854:	4bc5      	ldr	r3, [pc, #788]	(db6c <.text+0xdb6c>)
-    d856:	2200      	movs	r2, #0
-    d858:	446b      	add	r3, sp
-    d85a:	701a      	strb	r2, [r3, #0]
-    d85c:	682f      	ldr	r7, [r5, #0]
-    d85e:	1d2b      	adds	r3, r5, #4
-    d860:	9318      	str	r3, [sp, #96]
-    d862:	2f00      	cmp	r7, #0
-    d864:	d101      	bne.n	d86a <.text+0xd86a>
-    d866:	f000 fe51 	bl	e50c <.text+0xe50c>
-    d86a:	9c19      	ldr	r4, [sp, #100]
-    d86c:	2c53      	cmp	r4, #83
-    d86e:	d002      	beq.n	d876 <.text+0xd876>
-    d870:	9817      	ldr	r0, [sp, #92]
-    d872:	06c0      	lsls	r0, r0, #27
-    d874:	d571      	bpl.n	d95a <.text+0xd95a>
-    d876:	21d7      	movs	r1, #215
-    d878:	00c9      	lsls	r1, r1, #3
-    d87a:	48bd      	ldr	r0, [pc, #756]	(db70 <.text+0xdb70>)
-    d87c:	4469      	add	r1, sp
-    d87e:	600f      	str	r7, [r1, #0]
-    d880:	2208      	movs	r2, #8
-    d882:	4468      	add	r0, sp
-    d884:	2100      	movs	r1, #0
-    d886:	f002 fe37 	bl	104f8 <memset>
-    d88a:	9a16      	ldr	r2, [sp, #88]
-    d88c:	2a00      	cmp	r2, #0
-    d88e:	db1d      	blt.n	d8cc <.text+0xd8cc>
-    d890:	2600      	movs	r6, #0
-    d892:	2400      	movs	r4, #0
-    d894:	20d7      	movs	r0, #215
-    d896:	00c0      	lsls	r0, r0, #3
-    d898:	4468      	add	r0, sp
-    d89a:	6803      	ldr	r3, [r0, #0]
-    d89c:	591a      	ldr	r2, [r3, r4]
-    d89e:	2a00      	cmp	r2, #0
-    d8a0:	d02a      	beq.n	d8f8 <.text+0xd8f8>
-    d8a2:	218e      	movs	r1, #142
-    d8a4:	4bb2      	ldr	r3, [pc, #712]	(db70 <.text+0xdb70>)
-    d8a6:	00c9      	lsls	r1, r1, #3
-    d8a8:	4469      	add	r1, sp
-    d8aa:	9805      	ldr	r0, [sp, #20]
-    d8ac:	446b      	add	r3, sp
-    d8ae:	f000 fe67 	bl	e580 <_wcrtomb_r>
-    d8b2:	1c41      	adds	r1, r0, #1
-    d8b4:	d101      	bne.n	d8ba <.text+0xd8ba>
-    d8b6:	f000 fdfd 	bl	e4b4 <.text+0xe4b4>
-    d8ba:	9a16      	ldr	r2, [sp, #88]
-    d8bc:	1980      	adds	r0, r0, r6
-    d8be:	4290      	cmp	r0, r2
-    d8c0:	dc1a      	bgt.n	d8f8 <.text+0xd8f8>
-    d8c2:	3404      	adds	r4, #4
-    d8c4:	4290      	cmp	r0, r2
-    d8c6:	d011      	beq.n	d8ec <.text+0xd8ec>
-    d8c8:	1c06      	adds	r6, r0, #0
-    d8ca:	e7e3      	b.n	d894 <.text+0xd894>
-    d8cc:	4ba8      	ldr	r3, [pc, #672]	(db70 <.text+0xdb70>)
-    d8ce:	22d7      	movs	r2, #215
-    d8d0:	446b      	add	r3, sp
-    d8d2:	00d2      	lsls	r2, r2, #3
-    d8d4:	9300      	str	r3, [sp, #0]
-    d8d6:	9805      	ldr	r0, [sp, #20]
-    d8d8:	2100      	movs	r1, #0
-    d8da:	446a      	add	r2, sp
-    d8dc:	2300      	movs	r3, #0
-    d8de:	f000 fe77 	bl	e5d0 <_wcsrtombs_r>
-    d8e2:	1c06      	adds	r6, r0, #0
-    d8e4:	1c43      	adds	r3, r0, #1
-    d8e6:	d103      	bne.n	d8f0 <.text+0xd8f0>
-    d8e8:	f000 fde4 	bl	e4b4 <.text+0xe4b4>
-    d8ec:	9e16      	ldr	r6, [sp, #88]
-    d8ee:	e003      	b.n	d8f8 <.text+0xd8f8>
-    d8f0:	21d7      	movs	r1, #215
-    d8f2:	00c9      	lsls	r1, r1, #3
-    d8f4:	4469      	add	r1, sp
-    d8f6:	600f      	str	r7, [r1, #0]
-    d8f8:	2e00      	cmp	r6, #0
-    d8fa:	d100      	bne.n	d8fe <.text+0xd8fe>
-    d8fc:	e0fb      	b.n	daf6 <.text+0xdaf6>
-    d8fe:	1c71      	adds	r1, r6, #1
-    d900:	9805      	ldr	r0, [sp, #20]
-    d902:	f002 fb7b 	bl	fffc <_malloc_r>
-    d906:	2800      	cmp	r0, #0
-    d908:	d107      	bne.n	d91a <.text+0xd91a>
-    d90a:	9a04      	ldr	r2, [sp, #16]
-    d90c:	8993      	ldrh	r3, [r2, #12]
-    d90e:	9c04      	ldr	r4, [sp, #16]
-    d910:	2240      	movs	r2, #64
-    d912:	4313      	orrs	r3, r2
-    d914:	81a3      	strh	r3, [r4, #12]
-    d916:	f000 fded 	bl	e4f4 <.text+0xe4f4>
-    d91a:	4c95      	ldr	r4, [pc, #596]	(db70 <.text+0xdb70>)
-    d91c:	446c      	add	r4, sp
-    d91e:	9012      	str	r0, [sp, #72]
-    d920:	2100      	movs	r1, #0
-    d922:	2208      	movs	r2, #8
-    d924:	1c20      	adds	r0, r4, #0
-    d926:	f002 fde7 	bl	104f8 <memset>
-    d92a:	22d7      	movs	r2, #215
-    d92c:	00d2      	lsls	r2, r2, #3
-    d92e:	9805      	ldr	r0, [sp, #20]
-    d930:	9912      	ldr	r1, [sp, #72]
-    d932:	446a      	add	r2, sp
-    d934:	1c33      	adds	r3, r6, #0
-    d936:	9400      	str	r4, [sp, #0]
-    d938:	f000 fe4a 	bl	e5d0 <_wcsrtombs_r>
-    d93c:	42b0      	cmp	r0, r6
-    d93e:	d006      	beq.n	d94e <.text+0xd94e>
-    d940:	9804      	ldr	r0, [sp, #16]
-    d942:	8983      	ldrh	r3, [r0, #12]
-    d944:	2240      	movs	r2, #64
-    d946:	4313      	orrs	r3, r2
-    d948:	8183      	strh	r3, [r0, #12]
-    d94a:	f000 fdcf 	bl	e4ec <.text+0xe4ec>
-    d94e:	9a12      	ldr	r2, [sp, #72]
-    d950:	2300      	movs	r3, #0
-    d952:	5593      	strb	r3, [r2, r6]
-    d954:	9f12      	ldr	r7, [sp, #72]
-    d956:	930f      	str	r3, [sp, #60]
-    d958:	e0d2      	b.n	db00 <.text+0xdb00>
-    d95a:	9b16      	ldr	r3, [sp, #88]
-    d95c:	2b00      	cmp	r3, #0
-    d95e:	db0d      	blt.n	d97c <.text+0xd97c>
-    d960:	1c38      	adds	r0, r7, #0
-    d962:	2100      	movs	r1, #0
-    d964:	1c1a      	adds	r2, r3, #0
-    d966:	f002 fd9f 	bl	104a8 <memchr>
-    d96a:	2800      	cmp	r0, #0
-    d96c:	d100      	bne.n	d970 <.text+0xd970>
-    d96e:	e0c4      	b.n	dafa <.text+0xdafa>
-    d970:	9c16      	ldr	r4, [sp, #88]
-    d972:	1bc6      	subs	r6, r0, r7
-    d974:	42a6      	cmp	r6, r4
-    d976:	dd00      	ble.n	d97a <.text+0xd97a>
-    d978:	e0bf      	b.n	dafa <.text+0xdafa>
-    d97a:	e0bc      	b.n	daf6 <.text+0xdaf6>
-    d97c:	1c38      	adds	r0, r7, #0
-    d97e:	f7ff fbc7 	bl	d110 <strlen>
-    d982:	1c06      	adds	r6, r0, #0
-    d984:	2000      	movs	r0, #0
-    d986:	e0a0      	b.n	daca <.text+0xdaca>
-    d988:	9917      	ldr	r1, [sp, #92]
-    d98a:	2310      	movs	r3, #16
-    d98c:	4319      	orrs	r1, r3
-    d98e:	9117      	str	r1, [sp, #92]
-    d990:	9a17      	ldr	r2, [sp, #92]
-    d992:	06d2      	lsls	r2, r2, #27
-    d994:	d503      	bpl.n	d99e <.text+0xd99e>
-    d996:	682c      	ldr	r4, [r5, #0]
-    d998:	1d2b      	adds	r3, r5, #4
-    d99a:	9318      	str	r3, [sp, #96]
-    d99c:	e00a      	b.n	d9b4 <.text+0xd9b4>
-    d99e:	9c17      	ldr	r4, [sp, #92]
-    d9a0:	1d2b      	adds	r3, r5, #4
-    d9a2:	6828      	ldr	r0, [r5, #0]
-    d9a4:	0664      	lsls	r4, r4, #25
-    d9a6:	d503      	bpl.n	d9b0 <.text+0xd9b0>
-    d9a8:	9318      	str	r3, [sp, #96]
-    d9aa:	0403      	lsls	r3, r0, #16
-    d9ac:	0c1c      	lsrs	r4, r3, #16
-    d9ae:	e001      	b.n	d9b4 <.text+0xd9b4>
-    d9b0:	9318      	str	r3, [sp, #96]
-    d9b2:	1c04      	adds	r4, r0, #0
-    d9b4:	2101      	movs	r1, #1
-    d9b6:	e01d      	b.n	d9f4 <.text+0xd9f4>
-    d9b8:	486e      	ldr	r0, [pc, #440]	(db74 <.text+0xdb74>)
-    d9ba:	9011      	str	r0, [sp, #68]
-    d9bc:	9917      	ldr	r1, [sp, #92]
-    d9be:	06c9      	lsls	r1, r1, #27
-    d9c0:	d503      	bpl.n	d9ca <.text+0xd9ca>
-    d9c2:	682c      	ldr	r4, [r5, #0]
-    d9c4:	1d2a      	adds	r2, r5, #4
-    d9c6:	9218      	str	r2, [sp, #96]
-    d9c8:	e00a      	b.n	d9e0 <.text+0xd9e0>
-    d9ca:	9c17      	ldr	r4, [sp, #92]
-    d9cc:	1d2b      	adds	r3, r5, #4
-    d9ce:	6828      	ldr	r0, [r5, #0]
-    d9d0:	0664      	lsls	r4, r4, #25
-    d9d2:	d503      	bpl.n	d9dc <.text+0xd9dc>
-    d9d4:	9318      	str	r3, [sp, #96]
-    d9d6:	0403      	lsls	r3, r0, #16
-    d9d8:	0c1c      	lsrs	r4, r3, #16
-    d9da:	e001      	b.n	d9e0 <.text+0xd9e0>
-    d9dc:	9318      	str	r3, [sp, #96]
-    d9de:	1c04      	adds	r4, r0, #0
-    d9e0:	9817      	ldr	r0, [sp, #92]
-    d9e2:	07c0      	lsls	r0, r0, #31
-    d9e4:	d505      	bpl.n	d9f2 <.text+0xd9f2>
-    d9e6:	2c00      	cmp	r4, #0
-    d9e8:	d003      	beq.n	d9f2 <.text+0xd9f2>
-    d9ea:	9917      	ldr	r1, [sp, #92]
-    d9ec:	2302      	movs	r3, #2
-    d9ee:	4319      	orrs	r1, r3
-    d9f0:	9117      	str	r1, [sp, #92]
-    d9f2:	2102      	movs	r1, #2
-    d9f4:	4b5d      	ldr	r3, [pc, #372]	(db6c <.text+0xdb6c>)
-    d9f6:	2200      	movs	r2, #0
-    d9f8:	446b      	add	r3, sp
-    d9fa:	701a      	strb	r2, [r3, #0]
-    d9fc:	9a16      	ldr	r2, [sp, #88]
-    d9fe:	2a00      	cmp	r2, #0
-    da00:	db03      	blt.n	da0a <.text+0xda0a>
-    da02:	9817      	ldr	r0, [sp, #92]
-    da04:	2380      	movs	r3, #128
-    da06:	4398      	bics	r0, r3
-    da08:	9017      	str	r0, [sp, #92]
-    da0a:	2c00      	cmp	r4, #0
-    da0c:	d102      	bne.n	da14 <.text+0xda14>
-    da0e:	9a16      	ldr	r2, [sp, #88]
-    da10:	2a00      	cmp	r2, #0
-    da12:	d044      	beq.n	da9e <.text+0xda9e>
-    da14:	2901      	cmp	r1, #1
-    da16:	d004      	beq.n	da22 <.text+0xda22>
-    da18:	2901      	cmp	r1, #1
-    da1a:	d305      	bcc.n	da28 <.text+0xda28>
-    da1c:	2902      	cmp	r1, #2
-    da1e:	d135      	bne.n	da8c <.text+0xda8c>
-    da20:	e028      	b.n	da74 <.text+0xda74>
-    da22:	4d55      	ldr	r5, [pc, #340]	(db78 <.text+0xdb78>)
-    da24:	446d      	add	r5, sp
-    da26:	e01d      	b.n	da64 <.text+0xda64>
-    da28:	4f53      	ldr	r7, [pc, #332]	(db78 <.text+0xdb78>)
-    da2a:	446f      	add	r7, sp
-    da2c:	2307      	movs	r3, #7
-    da2e:	4023      	ands	r3, r4
-    da30:	3f01      	subs	r7, #1
-    da32:	3330      	adds	r3, #48
-    da34:	08e4      	lsrs	r4, r4, #3
-    da36:	703b      	strb	r3, [r7, #0]
-    da38:	2c00      	cmp	r4, #0
-    da3a:	d1f7      	bne.n	da2c <.text+0xda2c>
-    da3c:	9c17      	ldr	r4, [sp, #92]
-    da3e:	07e4      	lsls	r4, r4, #31
-    da40:	d53c      	bpl.n	dabc <.text+0xdabc>
-    da42:	2b30      	cmp	r3, #48
-    da44:	d03a      	beq.n	dabc <.text+0xdabc>
-    da46:	3f01      	subs	r7, #1
-    da48:	2330      	movs	r3, #48
-    da4a:	e011      	b.n	da70 <.text+0xda70>
-    da4c:	1c05      	adds	r5, r0, #0
-    da4e:	210a      	movs	r1, #10
-    da50:	1c20      	adds	r0, r4, #0
-    da52:	f005 ff4b 	bl	138ec <__umodsi3>
-    da56:	3030      	adds	r0, #48
-    da58:	7028      	strb	r0, [r5, #0]
-    da5a:	210a      	movs	r1, #10
-    da5c:	1c20      	adds	r0, r4, #0
-    da5e:	f005 fead 	bl	137bc <__aeabi_uidiv>
-    da62:	1c04      	adds	r4, r0, #0
-    da64:	1e68      	subs	r0, r5, #1
-    da66:	2c09      	cmp	r4, #9
-    da68:	d8f0      	bhi.n	da4c <.text+0xda4c>
-    da6a:	1c23      	adds	r3, r4, #0
-    da6c:	1c07      	adds	r7, r0, #0
-    da6e:	3330      	adds	r3, #48
-    da70:	703b      	strb	r3, [r7, #0]
-    da72:	e023      	b.n	dabc <.text+0xdabc>
-    da74:	4f40      	ldr	r7, [pc, #256]	(db78 <.text+0xdb78>)
-    da76:	446f      	add	r7, sp
-    da78:	9811      	ldr	r0, [sp, #68]
-    da7a:	230f      	movs	r3, #15
-    da7c:	4023      	ands	r3, r4
-    da7e:	5cc3      	ldrb	r3, [r0, r3]
-    da80:	3f01      	subs	r7, #1
-    da82:	0924      	lsrs	r4, r4, #4
-    da84:	703b      	strb	r3, [r7, #0]
-    da86:	2c00      	cmp	r4, #0
-    da88:	d018      	beq.n	dabc <.text+0xdabc>
-    da8a:	e7f5      	b.n	da78 <.text+0xda78>
-    da8c:	4c3b      	ldr	r4, [pc, #236]	(db7c <.text+0xdb7c>)
-    da8e:	1c20      	adds	r0, r4, #0
-    da90:	f7ff fb3e 	bl	d110 <strlen>
-    da94:	9916      	ldr	r1, [sp, #88]
-    da96:	1c06      	adds	r6, r0, #0
-    da98:	1c27      	adds	r7, r4, #0
-    da9a:	910f      	str	r1, [sp, #60]
-    da9c:	e030      	b.n	db00 <.text+0xdb00>
-    da9e:	2900      	cmp	r1, #0
-    daa0:	d102      	bne.n	daa8 <.text+0xdaa8>
-    daa2:	9a17      	ldr	r2, [sp, #92]
-    daa4:	07d2      	lsls	r2, r2, #31
-    daa6:	d401      	bmi.n	daac <.text+0xdaac>
-    daa8:	4f33      	ldr	r7, [pc, #204]	(db78 <.text+0xdb78>)
-    daaa:	e006      	b.n	daba <.text+0xdaba>
-    daac:	228e      	movs	r2, #142
-    daae:	00d2      	lsls	r2, r2, #3
-    dab0:	4b33      	ldr	r3, [pc, #204]	(db80 <.text+0xdb80>)
-    dab2:	2130      	movs	r1, #48
-    dab4:	446a      	add	r2, sp
-    dab6:	54d1      	strb	r1, [r2, r3]
-    dab8:	4f32      	ldr	r7, [pc, #200]	(db84 <.text+0xdb84>)
-    daba:	446f      	add	r7, sp
-    dabc:	24d9      	movs	r4, #217
-    dabe:	00e4      	lsls	r4, r4, #3
-    dac0:	446c      	add	r4, sp
-    dac2:	1be3      	subs	r3, r4, r7
-    dac4:	1c1e      	adds	r6, r3, #0
-    dac6:	9816      	ldr	r0, [sp, #88]
-    dac8:	3efc      	subs	r6, #252
-    daca:	900f      	str	r0, [sp, #60]
-    dacc:	e018      	b.n	db00 <.text+0xdb00>
-    dace:	9919      	ldr	r1, [sp, #100]
-    dad0:	2900      	cmp	r1, #0
-    dad2:	d101      	bne.n	dad8 <.text+0xdad8>
-    dad4:	f000 fcf4 	bl	e4c0 <.text+0xe4c0>
-    dad8:	218e      	movs	r1, #142
-    dada:	aa19      	add	r2, sp, #100
-    dadc:	7812      	ldrb	r2, [r2, #0]
-    dade:	00c9      	lsls	r1, r1, #3
-    dae0:	4b22      	ldr	r3, [pc, #136]	(db6c <.text+0xdb6c>)
-    dae2:	4469      	add	r1, sp
-    dae4:	700a      	strb	r2, [r1, #0]
-    dae6:	446b      	add	r3, sp
-    dae8:	2200      	movs	r2, #0
-    daea:	2601      	movs	r6, #1
-    daec:	1c0f      	adds	r7, r1, #0
-    daee:	701a      	strb	r2, [r3, #0]
-    daf0:	9518      	str	r5, [sp, #96]
-    daf2:	f000 fd0d 	bl	e510 <.text+0xe510>
-    daf6:	2300      	movs	r3, #0
-    daf8:	e72d      	b.n	d956 <.text+0xd956>
-    dafa:	9e16      	ldr	r6, [sp, #88]
-    dafc:	2400      	movs	r4, #0
-    dafe:	940f      	str	r4, [sp, #60]
-    db00:	980f      	ldr	r0, [sp, #60]
-    db02:	9610      	str	r6, [sp, #64]
-    db04:	4286      	cmp	r6, r0
-    db06:	da00      	bge.n	db0a <.text+0xdb0a>
-    db08:	9010      	str	r0, [sp, #64]
-    db0a:	4b18      	ldr	r3, [pc, #96]	(db6c <.text+0xdb6c>)
-    db0c:	446b      	add	r3, sp
-    db0e:	781b      	ldrb	r3, [r3, #0]
-    db10:	2b00      	cmp	r3, #0
-    db12:	d003      	beq.n	db1c <.text+0xdb1c>
-    db14:	9910      	ldr	r1, [sp, #64]
-    db16:	3101      	adds	r1, #1
-    db18:	9110      	str	r1, [sp, #64]
-    db1a:	e005      	b.n	db28 <.text+0xdb28>
-    db1c:	9a17      	ldr	r2, [sp, #92]
-    db1e:	0792      	lsls	r2, r2, #30
-    db20:	d502      	bpl.n	db28 <.text+0xdb28>
-    db22:	9b10      	ldr	r3, [sp, #64]
-    db24:	3302      	adds	r3, #2
-    db26:	9310      	str	r3, [sp, #64]
-    db28:	9c17      	ldr	r4, [sp, #92]
-    db2a:	2384      	movs	r3, #132
-    db2c:	401c      	ands	r4, r3
-    db2e:	9406      	str	r4, [sp, #24]
-    db30:	d161      	bne.n	dbf6 <.text+0xdbf6>
-    db32:	9809      	ldr	r0, [sp, #36]
-    db34:	9910      	ldr	r1, [sp, #64]
-    db36:	1a44      	subs	r4, r0, r1
-    db38:	2c00      	cmp	r4, #0
-    db3a:	dc33      	bgt.n	dba4 <.text+0xdba4>
-    db3c:	e05b      	b.n	dbf6 <.text+0xdbf6>
-    db3e:	9a07      	ldr	r2, [sp, #28]
-    db40:	6013      	str	r3, [r2, #0]
-    db42:	2310      	movs	r3, #16
-    db44:	6053      	str	r3, [r2, #4]
-    db46:	1c03      	adds	r3, r0, #0
-    db48:	20d3      	movs	r0, #211
-    db4a:	00c0      	lsls	r0, r0, #3
-    db4c:	4a0e      	ldr	r2, [pc, #56]	(db88 <.text+0xdb88>)
-    db4e:	3310      	adds	r3, #16
-    db50:	4468      	add	r0, sp
-    db52:	6003      	str	r3, [r0, #0]
-    db54:	446a      	add	r2, sp
-    db56:	1c6b      	adds	r3, r5, #1
-    db58:	6013      	str	r3, [r2, #0]
-    db5a:	2b07      	cmp	r3, #7
-    db5c:	dc16      	bgt.n	db8c <.text+0xdb8c>
-    db5e:	9b07      	ldr	r3, [sp, #28]
-    db60:	3308      	adds	r3, #8
-    db62:	9307      	str	r3, [sp, #28]
-    db64:	e01d      	b.n	dba2 <.text+0xdba2>
-    db66:	0000      	lsls	r0, r0, #0
-    db68:	59a0      	ldr	r0, [r4, r6]
-    db6a:	0001      	lsls	r1, r0, #0
-    db6c:	06c7      	lsls	r7, r0, #27
-    db6e:	0000      	lsls	r0, r0, #0
-    db70:	069c      	lsls	r4, r3, #26
-    db72:	0000      	lsls	r0, r0, #0
-    db74:	59c4      	ldr	r4, [r0, r7]
-    db76:	0001      	lsls	r1, r0, #0
-    db78:	05cc      	lsls	r4, r1, #23
-    db7a:	0000      	lsls	r0, r0, #0
-    db7c:	59d8      	ldr	r0, [r3, r7]
-    db7e:	0001      	lsls	r1, r0, #0
-    db80:	015b      	lsls	r3, r3, #5
-    db82:	0000      	lsls	r0, r0, #0
-    db84:	05cb      	lsls	r3, r1, #23
-    db86:	0000      	lsls	r0, r0, #0
-    db88:	0694      	lsls	r4, r2, #26
-    db8a:	0000      	lsls	r0, r0, #0
-    db8c:	9804      	ldr	r0, [sp, #16]
-    db8e:	f7ff fac7 	bl	d120 <__sprint>
-    db92:	2800      	cmp	r0, #0
-    db94:	d001      	beq.n	db9a <.text+0xdb9a>
-    db96:	f000 fca6 	bl	e4e6 <.text+0xe4e6>
-    db9a:	20c5      	movs	r0, #197
-    db9c:	00c0      	lsls	r0, r0, #3
-    db9e:	4468      	add	r0, sp
-    dba0:	9007      	str	r0, [sp, #28]
-    dba2:	3c10      	subs	r4, #16
-    dba4:	22d3      	movs	r2, #211
-    dba6:	4bce      	ldr	r3, [pc, #824]	(dee0 <.text+0xdee0>)
-    dba8:	21d2      	movs	r1, #210
-    dbaa:	00d2      	lsls	r2, r2, #3
-    dbac:	446b      	add	r3, sp
-    dbae:	00c9      	lsls	r1, r1, #3
-    dbb0:	446a      	add	r2, sp
-    dbb2:	681d      	ldr	r5, [r3, #0]
-    dbb4:	4469      	add	r1, sp
-    dbb6:	6810      	ldr	r0, [r2, #0]
-    dbb8:	4bca      	ldr	r3, [pc, #808]	(dee4 <.text+0xdee4>)
-    dbba:	2c10      	cmp	r4, #16
-    dbbc:	dcbf      	bgt.n	db3e <.text+0xdb3e>
-    dbbe:	9a07      	ldr	r2, [sp, #28]
-    dbc0:	6013      	str	r3, [r2, #0]
-    dbc2:	6054      	str	r4, [r2, #4]
-    dbc4:	1903      	adds	r3, r0, r4
-    dbc6:	24d3      	movs	r4, #211
-    dbc8:	00e4      	lsls	r4, r4, #3
-    dbca:	48c5      	ldr	r0, [pc, #788]	(dee0 <.text+0xdee0>)
-    dbcc:	446c      	add	r4, sp
-    dbce:	6023      	str	r3, [r4, #0]
-    dbd0:	4468      	add	r0, sp
-    dbd2:	1c6b      	adds	r3, r5, #1
-    dbd4:	6003      	str	r3, [r0, #0]
-    dbd6:	2b07      	cmp	r3, #7
-    dbd8:	dc02      	bgt.n	dbe0 <.text+0xdbe0>
-    dbda:	3208      	adds	r2, #8
-    dbdc:	9207      	str	r2, [sp, #28]
-    dbde:	e00a      	b.n	dbf6 <.text+0xdbf6>
-    dbe0:	9804      	ldr	r0, [sp, #16]
-    dbe2:	f7ff fa9d 	bl	d120 <__sprint>
-    dbe6:	2800      	cmp	r0, #0
-    dbe8:	d001      	beq.n	dbee <.text+0xdbee>
-    dbea:	f000 fc7c 	bl	e4e6 <.text+0xe4e6>
-    dbee:	21c5      	movs	r1, #197
-    dbf0:	00c9      	lsls	r1, r1, #3
-    dbf2:	4469      	add	r1, sp
-    dbf4:	9107      	str	r1, [sp, #28]
-    dbf6:	4abc      	ldr	r2, [pc, #752]	(dee8 <.text+0xdee8>)
-    dbf8:	446a      	add	r2, sp
-    dbfa:	7813      	ldrb	r3, [r2, #0]
-    dbfc:	2b00      	cmp	r3, #0
-    dbfe:	d023      	beq.n	dc48 <.text+0xdc48>
-    dc00:	9b07      	ldr	r3, [sp, #28]
-    dc02:	20d3      	movs	r0, #211
-    dc04:	9c07      	ldr	r4, [sp, #28]
-    dc06:	00c0      	lsls	r0, r0, #3
-    dc08:	4468      	add	r0, sp
-    dc0a:	601a      	str	r2, [r3, #0]
-    dc0c:	2301      	movs	r3, #1
-    dc0e:	6063      	str	r3, [r4, #4]
-    dc10:	49b3      	ldr	r1, [pc, #716]	(dee0 <.text+0xdee0>)
-    dc12:	6803      	ldr	r3, [r0, #0]
-    dc14:	4469      	add	r1, sp
-    dc16:	3301      	adds	r3, #1
-    dc18:	6003      	str	r3, [r0, #0]
-    dc1a:	680b      	ldr	r3, [r1, #0]
-    dc1c:	3301      	adds	r3, #1
-    dc1e:	600b      	str	r3, [r1, #0]
-    dc20:	2b07      	cmp	r3, #7
-    dc22:	dc02      	bgt.n	dc2a <.text+0xdc2a>
-    dc24:	3408      	adds	r4, #8
-    dc26:	9407      	str	r4, [sp, #28]
-    dc28:	e03a      	b.n	dca0 <.text+0xdca0>
-    dc2a:	21d2      	movs	r1, #210
-    dc2c:	00c9      	lsls	r1, r1, #3
-    dc2e:	9804      	ldr	r0, [sp, #16]
-    dc30:	4469      	add	r1, sp
-    dc32:	f7ff fa75 	bl	d120 <__sprint>
-    dc36:	2800      	cmp	r0, #0
-    dc38:	d001      	beq.n	dc3e <.text+0xdc3e>
-    dc3a:	f000 fc54 	bl	e4e6 <.text+0xe4e6>
-    dc3e:	22c5      	movs	r2, #197
-    dc40:	00d2      	lsls	r2, r2, #3
-    dc42:	446a      	add	r2, sp
-    dc44:	9207      	str	r2, [sp, #28]
-    dc46:	e02b      	b.n	dca0 <.text+0xdca0>
-    dc48:	9b17      	ldr	r3, [sp, #92]
-    dc4a:	2102      	movs	r1, #2
-    dc4c:	420b      	tst	r3, r1
-    dc4e:	d027      	beq.n	dca0 <.text+0xdca0>
-    dc50:	4ba6      	ldr	r3, [pc, #664]	(deec <.text+0xdeec>)
-    dc52:	2230      	movs	r2, #48
-    dc54:	446b      	add	r3, sp
-    dc56:	701a      	strb	r2, [r3, #0]
-    dc58:	ac19      	add	r4, sp, #100
-    dc5a:	7824      	ldrb	r4, [r4, #0]
-    dc5c:	705c      	strb	r4, [r3, #1]
-    dc5e:	9807      	ldr	r0, [sp, #28]
-    dc60:	6041      	str	r1, [r0, #4]
-    dc62:	21d3      	movs	r1, #211
-    dc64:	00c9      	lsls	r1, r1, #3
-    dc66:	4469      	add	r1, sp
-    dc68:	6003      	str	r3, [r0, #0]
-    dc6a:	4a9d      	ldr	r2, [pc, #628]	(dee0 <.text+0xdee0>)
-    dc6c:	680b      	ldr	r3, [r1, #0]
-    dc6e:	446a      	add	r2, sp
-    dc70:	3302      	adds	r3, #2
-    dc72:	600b      	str	r3, [r1, #0]
-    dc74:	6813      	ldr	r3, [r2, #0]
-    dc76:	3301      	adds	r3, #1
-    dc78:	6013      	str	r3, [r2, #0]
-    dc7a:	2b07      	cmp	r3, #7
-    dc7c:	dc02      	bgt.n	dc84 <.text+0xdc84>
-    dc7e:	3008      	adds	r0, #8
-    dc80:	9007      	str	r0, [sp, #28]
-    dc82:	e00d      	b.n	dca0 <.text+0xdca0>
-    dc84:	21d2      	movs	r1, #210
-    dc86:	00c9      	lsls	r1, r1, #3
-    dc88:	9804      	ldr	r0, [sp, #16]
-    dc8a:	4469      	add	r1, sp
-    dc8c:	f7ff fa48 	bl	d120 <__sprint>
-    dc90:	2800      	cmp	r0, #0
-    dc92:	d001      	beq.n	dc98 <.text+0xdc98>
-    dc94:	f000 fc27 	bl	e4e6 <.text+0xe4e6>
-    dc98:	23c5      	movs	r3, #197
-    dc9a:	00db      	lsls	r3, r3, #3
-    dc9c:	446b      	add	r3, sp
-    dc9e:	9307      	str	r3, [sp, #28]
-    dca0:	9c06      	ldr	r4, [sp, #24]
-    dca2:	2c80      	cmp	r4, #128
-    dca4:	d14d      	bne.n	dd42 <.text+0xdd42>
-    dca6:	9809      	ldr	r0, [sp, #36]
-    dca8:	9910      	ldr	r1, [sp, #64]
-    dcaa:	1a44      	subs	r4, r0, r1
-    dcac:	2c00      	cmp	r4, #0
-    dcae:	dc20      	bgt.n	dcf2 <.text+0xdcf2>
-    dcb0:	e047      	b.n	dd42 <.text+0xdd42>
-    dcb2:	9a07      	ldr	r2, [sp, #28]
-    dcb4:	6013      	str	r3, [r2, #0]
-    dcb6:	2310      	movs	r3, #16
-    dcb8:	6053      	str	r3, [r2, #4]
-    dcba:	1c03      	adds	r3, r0, #0
-    dcbc:	20d3      	movs	r0, #211
-    dcbe:	00c0      	lsls	r0, r0, #3
-    dcc0:	4a87      	ldr	r2, [pc, #540]	(dee0 <.text+0xdee0>)
-    dcc2:	3310      	adds	r3, #16
-    dcc4:	4468      	add	r0, sp
-    dcc6:	6003      	str	r3, [r0, #0]
-    dcc8:	446a      	add	r2, sp
-    dcca:	1c6b      	adds	r3, r5, #1
-    dccc:	6013      	str	r3, [r2, #0]
-    dcce:	2b07      	cmp	r3, #7
-    dcd0:	dc03      	bgt.n	dcda <.text+0xdcda>
-    dcd2:	9b07      	ldr	r3, [sp, #28]
-    dcd4:	3308      	adds	r3, #8
-    dcd6:	9307      	str	r3, [sp, #28]
-    dcd8:	e00a      	b.n	dcf0 <.text+0xdcf0>
-    dcda:	9804      	ldr	r0, [sp, #16]
-    dcdc:	f7ff fa20 	bl	d120 <__sprint>
-    dce0:	2800      	cmp	r0, #0
-    dce2:	d001      	beq.n	dce8 <.text+0xdce8>
-    dce4:	f000 fbff 	bl	e4e6 <.text+0xe4e6>
-    dce8:	20c5      	movs	r0, #197
-    dcea:	00c0      	lsls	r0, r0, #3
-    dcec:	4468      	add	r0, sp
-    dcee:	9007      	str	r0, [sp, #28]
-    dcf0:	3c10      	subs	r4, #16
-    dcf2:	22d3      	movs	r2, #211
-    dcf4:	4b7a      	ldr	r3, [pc, #488]	(dee0 <.text+0xdee0>)
-    dcf6:	21d2      	movs	r1, #210
-    dcf8:	00d2      	lsls	r2, r2, #3
-    dcfa:	446b      	add	r3, sp
-    dcfc:	00c9      	lsls	r1, r1, #3
-    dcfe:	446a      	add	r2, sp
-    dd00:	681d      	ldr	r5, [r3, #0]
-    dd02:	4469      	add	r1, sp
-    dd04:	6810      	ldr	r0, [r2, #0]
-    dd06:	4b7a      	ldr	r3, [pc, #488]	(def0 <.text+0xdef0>)
-    dd08:	2c10      	cmp	r4, #16
-    dd0a:	dcd2      	bgt.n	dcb2 <.text+0xdcb2>
-    dd0c:	9a07      	ldr	r2, [sp, #28]
-    dd0e:	6013      	str	r3, [r2, #0]
-    dd10:	6054      	str	r4, [r2, #4]
-    dd12:	1903      	adds	r3, r0, r4
-    dd14:	24d3      	movs	r4, #211
-    dd16:	00e4      	lsls	r4, r4, #3
-    dd18:	4871      	ldr	r0, [pc, #452]	(dee0 <.text+0xdee0>)
-    dd1a:	446c      	add	r4, sp
-    dd1c:	6023      	str	r3, [r4, #0]
-    dd1e:	4468      	add	r0, sp
-    dd20:	1c6b      	adds	r3, r5, #1
-    dd22:	6003      	str	r3, [r0, #0]
-    dd24:	2b07      	cmp	r3, #7
-    dd26:	dc02      	bgt.n	dd2e <.text+0xdd2e>
-    dd28:	3208      	adds	r2, #8
-    dd2a:	9207      	str	r2, [sp, #28]
-    dd2c:	e009      	b.n	dd42 <.text+0xdd42>
-    dd2e:	9804      	ldr	r0, [sp, #16]
-    dd30:	f7ff f9f6 	bl	d120 <__sprint>
-    dd34:	2800      	cmp	r0, #0
-    dd36:	d000      	beq.n	dd3a <.text+0xdd3a>
-    dd38:	e3d5      	b.n	e4e6 <.text+0xe4e6>
-    dd3a:	21c5      	movs	r1, #197
-    dd3c:	00c9      	lsls	r1, r1, #3
-    dd3e:	4469      	add	r1, sp
-    dd40:	9107      	str	r1, [sp, #28]
-    dd42:	9a0f      	ldr	r2, [sp, #60]
-    dd44:	1b94      	subs	r4, r2, r6
-    dd46:	2c00      	cmp	r4, #0
-    dd48:	dc1f      	bgt.n	dd8a <.text+0xdd8a>
-    dd4a:	e046      	b.n	ddda <.text+0xddda>
-    dd4c:	9a07      	ldr	r2, [sp, #28]
-    dd4e:	6013      	str	r3, [r2, #0]
-    dd50:	2310      	movs	r3, #16
-    dd52:	6053      	str	r3, [r2, #4]
-    dd54:	1c03      	adds	r3, r0, #0
-    dd56:	20d3      	movs	r0, #211
-    dd58:	00c0      	lsls	r0, r0, #3
-    dd5a:	4a61      	ldr	r2, [pc, #388]	(dee0 <.text+0xdee0>)
-    dd5c:	3310      	adds	r3, #16
-    dd5e:	4468      	add	r0, sp
-    dd60:	6003      	str	r3, [r0, #0]
-    dd62:	446a      	add	r2, sp
-    dd64:	1c6b      	adds	r3, r5, #1
-    dd66:	6013      	str	r3, [r2, #0]
-    dd68:	2b07      	cmp	r3, #7
-    dd6a:	dc03      	bgt.n	dd74 <.text+0xdd74>
-    dd6c:	9b07      	ldr	r3, [sp, #28]
-    dd6e:	3308      	adds	r3, #8
-    dd70:	9307      	str	r3, [sp, #28]
-    dd72:	e009      	b.n	dd88 <.text+0xdd88>
-    dd74:	9804      	ldr	r0, [sp, #16]
-    dd76:	f7ff f9d3 	bl	d120 <__sprint>
-    dd7a:	2800      	cmp	r0, #0
-    dd7c:	d000      	beq.n	dd80 <.text+0xdd80>
-    dd7e:	e3b2      	b.n	e4e6 <.text+0xe4e6>
-    dd80:	20c5      	movs	r0, #197
-    dd82:	00c0      	lsls	r0, r0, #3
-    dd84:	4468      	add	r0, sp
-    dd86:	9007      	str	r0, [sp, #28]
-    dd88:	3c10      	subs	r4, #16
-    dd8a:	22d3      	movs	r2, #211
-    dd8c:	4b54      	ldr	r3, [pc, #336]	(dee0 <.text+0xdee0>)
-    dd8e:	21d2      	movs	r1, #210
-    dd90:	00d2      	lsls	r2, r2, #3
-    dd92:	446b      	add	r3, sp
-    dd94:	00c9      	lsls	r1, r1, #3
-    dd96:	446a      	add	r2, sp
-    dd98:	681d      	ldr	r5, [r3, #0]
-    dd9a:	4469      	add	r1, sp
-    dd9c:	6810      	ldr	r0, [r2, #0]
-    dd9e:	4b54      	ldr	r3, [pc, #336]	(def0 <.text+0xdef0>)
-    dda0:	2c10      	cmp	r4, #16
-    dda2:	dcd3      	bgt.n	dd4c <.text+0xdd4c>
-    dda4:	9a07      	ldr	r2, [sp, #28]
-    dda6:	6013      	str	r3, [r2, #0]
-    dda8:	6054      	str	r4, [r2, #4]
-    ddaa:	1903      	adds	r3, r0, r4
-    ddac:	24d3      	movs	r4, #211
-    ddae:	00e4      	lsls	r4, r4, #3
-    ddb0:	484b      	ldr	r0, [pc, #300]	(dee0 <.text+0xdee0>)
-    ddb2:	446c      	add	r4, sp
-    ddb4:	6023      	str	r3, [r4, #0]
-    ddb6:	4468      	add	r0, sp
-    ddb8:	1c6b      	adds	r3, r5, #1
-    ddba:	6003      	str	r3, [r0, #0]
-    ddbc:	2b07      	cmp	r3, #7
-    ddbe:	dc02      	bgt.n	ddc6 <.text+0xddc6>
-    ddc0:	3208      	adds	r2, #8
-    ddc2:	9207      	str	r2, [sp, #28]
-    ddc4:	e009      	b.n	ddda <.text+0xddda>
-    ddc6:	9804      	ldr	r0, [sp, #16]
-    ddc8:	f7ff f9aa 	bl	d120 <__sprint>
-    ddcc:	2800      	cmp	r0, #0
-    ddce:	d000      	beq.n	ddd2 <.text+0xddd2>
-    ddd0:	e389      	b.n	e4e6 <.text+0xe4e6>
-    ddd2:	21c5      	movs	r1, #197
-    ddd4:	00c9      	lsls	r1, r1, #3
-    ddd6:	4469      	add	r1, sp
-    ddd8:	9107      	str	r1, [sp, #28]
-    ddda:	9a17      	ldr	r2, [sp, #92]
-    dddc:	05d2      	lsls	r2, r2, #23
-    ddde:	d412      	bmi.n	de06 <.text+0xde06>
-    dde0:	24d3      	movs	r4, #211
-    dde2:	9b07      	ldr	r3, [sp, #28]
-    dde4:	00e4      	lsls	r4, r4, #3
-    dde6:	446c      	add	r4, sp
-    dde8:	601f      	str	r7, [r3, #0]
-    ddea:	605e      	str	r6, [r3, #4]
-    ddec:	483c      	ldr	r0, [pc, #240]	(dee0 <.text+0xdee0>)
-    ddee:	6823      	ldr	r3, [r4, #0]
-    ddf0:	4468      	add	r0, sp
-    ddf2:	199b      	adds	r3, r3, r6
-    ddf4:	6023      	str	r3, [r4, #0]
-    ddf6:	6803      	ldr	r3, [r0, #0]
-    ddf8:	3301      	adds	r3, #1
-    ddfa:	6003      	str	r3, [r0, #0]
-    ddfc:	2b07      	cmp	r3, #7
-    ddfe:	dd00      	ble.n	de02 <.text+0xde02>
-    de00:	e2e5      	b.n	e3ce <.text+0xe3ce>
-    de02:	9a07      	ldr	r2, [sp, #28]
-    de04:	e2e1      	b.n	e3ca <.text+0xe3ca>
-    de06:	9919      	ldr	r1, [sp, #100]
-    de08:	2965      	cmp	r1, #101
-    de0a:	dc00      	bgt.n	de0e <.text+0xde0e>
-    de0c:	e21c      	b.n	e248 <.text+0xe248>
-    de0e:	9814      	ldr	r0, [sp, #80]
-    de10:	9915      	ldr	r1, [sp, #84]
-    de12:	4a38      	ldr	r2, [pc, #224]	(def4 <.text+0xdef4>)
-    de14:	4b38      	ldr	r3, [pc, #224]	(def8 <.text+0xdef8>)
-    de16:	f007 f9bd 	bl	15194 <____eqdf2_from_thumb>
-    de1a:	2800      	cmp	r0, #0
-    de1c:	d000      	beq.n	de20 <.text+0xde20>
-    de1e:	e09d      	b.n	df5c <.text+0xdf5c>
-    de20:	4b36      	ldr	r3, [pc, #216]	(defc <.text+0xdefc>)
-    de22:	9a07      	ldr	r2, [sp, #28]
-    de24:	24d3      	movs	r4, #211
-    de26:	00e4      	lsls	r4, r4, #3
-    de28:	446c      	add	r4, sp
-    de2a:	6013      	str	r3, [r2, #0]
-    de2c:	2301      	movs	r3, #1
-    de2e:	6053      	str	r3, [r2, #4]
-    de30:	482b      	ldr	r0, [pc, #172]	(dee0 <.text+0xdee0>)
-    de32:	6823      	ldr	r3, [r4, #0]
-    de34:	4468      	add	r0, sp
-    de36:	3301      	adds	r3, #1
-    de38:	6023      	str	r3, [r4, #0]
-    de3a:	6803      	ldr	r3, [r0, #0]
-    de3c:	3301      	adds	r3, #1
-    de3e:	6003      	str	r3, [r0, #0]
-    de40:	2b07      	cmp	r3, #7
-    de42:	dc01      	bgt.n	de48 <.text+0xde48>
-    de44:	3208      	adds	r2, #8
-    de46:	e00b      	b.n	de60 <.text+0xde60>
-    de48:	21d2      	movs	r1, #210
-    de4a:	00c9      	lsls	r1, r1, #3
-    de4c:	9804      	ldr	r0, [sp, #16]
-    de4e:	4469      	add	r1, sp
-    de50:	f7ff f966 	bl	d120 <__sprint>
-    de54:	2800      	cmp	r0, #0
-    de56:	d000      	beq.n	de5a <.text+0xde5a>
-    de58:	e345      	b.n	e4e6 <.text+0xe4e6>
-    de5a:	22c5      	movs	r2, #197
-    de5c:	00d2      	lsls	r2, r2, #3
-    de5e:	446a      	add	r2, sp
-    de60:	4927      	ldr	r1, [pc, #156]	(df00 <.text+0xdf00>)
-    de62:	4469      	add	r1, sp
-    de64:	680b      	ldr	r3, [r1, #0]
-    de66:	9c0e      	ldr	r4, [sp, #56]
-    de68:	42a3      	cmp	r3, r4
-    de6a:	db03      	blt.n	de74 <.text+0xde74>
-    de6c:	9817      	ldr	r0, [sp, #92]
-    de6e:	07c0      	lsls	r0, r0, #31
-    de70:	d400      	bmi.n	de74 <.text+0xde74>
-    de72:	e2b4      	b.n	e3de <.text+0xe3de>
-    de74:	24d3      	movs	r4, #211
-    de76:	00e4      	lsls	r4, r4, #3
-    de78:	2301      	movs	r3, #1
-    de7a:	446c      	add	r4, sp
-    de7c:	6053      	str	r3, [r2, #4]
-    de7e:	4818      	ldr	r0, [pc, #96]	(dee0 <.text+0xdee0>)
-    de80:	6823      	ldr	r3, [r4, #0]
-    de82:	4468      	add	r0, sp
-    de84:	3301      	adds	r3, #1
-    de86:	6023      	str	r3, [r4, #0]
-    de88:	6803      	ldr	r3, [r0, #0]
-    de8a:	990b      	ldr	r1, [sp, #44]
-    de8c:	3301      	adds	r3, #1
-    de8e:	6011      	str	r1, [r2, #0]
-    de90:	6003      	str	r3, [r0, #0]
-    de92:	2b07      	cmp	r3, #7
-    de94:	dc01      	bgt.n	de9a <.text+0xde9a>
-    de96:	3208      	adds	r2, #8
-    de98:	e00b      	b.n	deb2 <.text+0xdeb2>
-    de9a:	21d2      	movs	r1, #210
-    de9c:	00c9      	lsls	r1, r1, #3
-    de9e:	9804      	ldr	r0, [sp, #16]
-    dea0:	4469      	add	r1, sp
-    dea2:	f7ff f93d 	bl	d120 <__sprint>
-    dea6:	2800      	cmp	r0, #0
-    dea8:	d000      	beq.n	deac <.text+0xdeac>
-    deaa:	e31c      	b.n	e4e6 <.text+0xe4e6>
-    deac:	22c5      	movs	r2, #197
-    deae:	00d2      	lsls	r2, r2, #3
-    deb0:	446a      	add	r2, sp
-    deb2:	9c0e      	ldr	r4, [sp, #56]
-    deb4:	3c01      	subs	r4, #1
-    deb6:	2c00      	cmp	r4, #0
-    deb8:	dc2e      	bgt.n	df18 <.text+0xdf18>
-    deba:	e290      	b.n	e3de <.text+0xe3de>
-    debc:	6013      	str	r3, [r2, #0]
-    debe:	2310      	movs	r3, #16
-    dec0:	6053      	str	r3, [r2, #4]
-    dec2:	1c03      	adds	r3, r0, #0
-    dec4:	20d3      	movs	r0, #211
-    dec6:	00c0      	lsls	r0, r0, #3
-    dec8:	3310      	adds	r3, #16
-    deca:	4468      	add	r0, sp
-    decc:	6003      	str	r3, [r0, #0]
-    dece:	4804      	ldr	r0, [pc, #16]	(dee0 <.text+0xdee0>)
-    ded0:	1c6b      	adds	r3, r5, #1
-    ded2:	4468      	add	r0, sp
-    ded4:	6003      	str	r3, [r0, #0]
-    ded6:	2b07      	cmp	r3, #7
-    ded8:	dc14      	bgt.n	df04 <.text+0xdf04>
-    deda:	3208      	adds	r2, #8
-    dedc:	e01b      	b.n	df16 <.text+0xdf16>
-    dede:	0000      	lsls	r0, r0, #0
-    dee0:	0694      	lsls	r4, r2, #26
-    dee2:	0000      	lsls	r0, r0, #0
-    dee4:	54fc      	strb	r4, [r7, r3]
-    dee6:	0001      	lsls	r1, r0, #0
-    dee8:	06c7      	lsls	r7, r0, #27
-    deea:	0000      	lsls	r0, r0, #0
-    deec:	06c5      	lsls	r5, r0, #27
-    deee:	0000      	lsls	r0, r0, #0
-    def0:	54ec      	strb	r4, [r5, r3]
-    def2:	0001      	lsls	r1, r0, #0
-	...
-    defc:	59f4      	ldr	r4, [r6, r7]
-    defe:	0001      	lsls	r1, r0, #0
-    df00:	06b4      	lsls	r4, r6, #26
-    df02:	0000      	lsls	r0, r0, #0
-    df04:	9804      	ldr	r0, [sp, #16]
-    df06:	f7ff f90b 	bl	d120 <__sprint>
-    df0a:	2800      	cmp	r0, #0
-    df0c:	d000      	beq.n	df10 <.text+0xdf10>
-    df0e:	e2ea      	b.n	e4e6 <.text+0xe4e6>
-    df10:	22c5      	movs	r2, #197
-    df12:	00d2      	lsls	r2, r2, #3
-    df14:	446a      	add	r2, sp
-    df16:	3c10      	subs	r4, #16
-    df18:	23d3      	movs	r3, #211
-    df1a:	00db      	lsls	r3, r3, #3
-    df1c:	446b      	add	r3, sp
-    df1e:	6818      	ldr	r0, [r3, #0]
-    df20:	4bda      	ldr	r3, [pc, #872]	(e28c <.text+0xe28c>)
-    df22:	21d2      	movs	r1, #210
-    df24:	446b      	add	r3, sp
-    df26:	00c9      	lsls	r1, r1, #3
-    df28:	681d      	ldr	r5, [r3, #0]
-    df2a:	4469      	add	r1, sp
-    df2c:	4bd8      	ldr	r3, [pc, #864]	(e290 <.text+0xe290>)
-    df2e:	2c10      	cmp	r4, #16
-    df30:	dcc4      	bgt.n	debc <.text+0xdebc>
-    df32:	6013      	str	r3, [r2, #0]
-    df34:	6054      	str	r4, [r2, #4]
-    df36:	1903      	adds	r3, r0, r4
-    df38:	24d3      	movs	r4, #211
-    df3a:	00e4      	lsls	r4, r4, #3
-    df3c:	48d3      	ldr	r0, [pc, #844]	(e28c <.text+0xe28c>)
-    df3e:	446c      	add	r4, sp
-    df40:	6023      	str	r3, [r4, #0]
-    df42:	4468      	add	r0, sp
-    df44:	1c6b      	adds	r3, r5, #1
-    df46:	6003      	str	r3, [r0, #0]
-    df48:	2b07      	cmp	r3, #7
-    df4a:	dc00      	bgt.n	df4e <.text+0xdf4e>
-    df4c:	e23d      	b.n	e3ca <.text+0xe3ca>
-    df4e:	9804      	ldr	r0, [sp, #16]
-    df50:	f7ff f8e6 	bl	d120 <__sprint>
-    df54:	2800      	cmp	r0, #0
-    df56:	d000      	beq.n	df5a <.text+0xdf5a>
-    df58:	e2c5      	b.n	e4e6 <.text+0xe4e6>
-    df5a:	e23d      	b.n	e3d8 <.text+0xe3d8>
-    df5c:	49cd      	ldr	r1, [pc, #820]	(e294 <.text+0xe294>)
-    df5e:	4469      	add	r1, sp
-    df60:	680b      	ldr	r3, [r1, #0]
-    df62:	2b00      	cmp	r3, #0
-    df64:	dd00      	ble.n	df68 <.text+0xdf68>
-    df66:	e095      	b.n	e094 <.text+0xe094>
-    df68:	4bcb      	ldr	r3, [pc, #812]	(e298 <.text+0xe298>)
-    df6a:	9a07      	ldr	r2, [sp, #28]
-    df6c:	24d3      	movs	r4, #211
-    df6e:	00e4      	lsls	r4, r4, #3
-    df70:	446c      	add	r4, sp
-    df72:	6013      	str	r3, [r2, #0]
-    df74:	2301      	movs	r3, #1
-    df76:	6053      	str	r3, [r2, #4]
-    df78:	48c4      	ldr	r0, [pc, #784]	(e28c <.text+0xe28c>)
-    df7a:	6823      	ldr	r3, [r4, #0]
-    df7c:	4468      	add	r0, sp
-    df7e:	3301      	adds	r3, #1
-    df80:	6023      	str	r3, [r4, #0]
-    df82:	6803      	ldr	r3, [r0, #0]
-    df84:	3301      	adds	r3, #1
-    df86:	6003      	str	r3, [r0, #0]
-    df88:	2b07      	cmp	r3, #7
-    df8a:	dc01      	bgt.n	df90 <.text+0xdf90>
-    df8c:	3208      	adds	r2, #8
-    df8e:	e00b      	b.n	dfa8 <.text+0xdfa8>
-    df90:	21d2      	movs	r1, #210
-    df92:	00c9      	lsls	r1, r1, #3
-    df94:	9804      	ldr	r0, [sp, #16]
-    df96:	4469      	add	r1, sp
-    df98:	f7ff f8c2 	bl	d120 <__sprint>
-    df9c:	2800      	cmp	r0, #0
-    df9e:	d000      	beq.n	dfa2 <.text+0xdfa2>
-    dfa0:	e2a1      	b.n	e4e6 <.text+0xe4e6>
-    dfa2:	22c5      	movs	r2, #197
-    dfa4:	00d2      	lsls	r2, r2, #3
-    dfa6:	446a      	add	r2, sp
-    dfa8:	49ba      	ldr	r1, [pc, #744]	(e294 <.text+0xe294>)
-    dfaa:	4469      	add	r1, sp
-    dfac:	680b      	ldr	r3, [r1, #0]
-    dfae:	2b00      	cmp	r3, #0
-    dfb0:	d103      	bne.n	dfba <.text+0xdfba>
-    dfb2:	9b0e      	ldr	r3, [sp, #56]
-    dfb4:	2b00      	cmp	r3, #0
-    dfb6:	d100      	bne.n	dfba <.text+0xdfba>
-    dfb8:	e211      	b.n	e3de <.text+0xe3de>
-    dfba:	20d3      	movs	r0, #211
-    dfbc:	00c0      	lsls	r0, r0, #3
-    dfbe:	2301      	movs	r3, #1
-    dfc0:	4468      	add	r0, sp
-    dfc2:	6053      	str	r3, [r2, #4]
-    dfc4:	49b1      	ldr	r1, [pc, #708]	(e28c <.text+0xe28c>)
-    dfc6:	6803      	ldr	r3, [r0, #0]
-    dfc8:	4469      	add	r1, sp
-    dfca:	3301      	adds	r3, #1
-    dfcc:	6003      	str	r3, [r0, #0]
-    dfce:	680b      	ldr	r3, [r1, #0]
-    dfd0:	9c0b      	ldr	r4, [sp, #44]
-    dfd2:	3301      	adds	r3, #1
-    dfd4:	6014      	str	r4, [r2, #0]
-    dfd6:	600b      	str	r3, [r1, #0]
-    dfd8:	2b07      	cmp	r3, #7
-    dfda:	dc01      	bgt.n	dfe0 <.text+0xdfe0>
-    dfdc:	3208      	adds	r2, #8
-    dfde:	e00b      	b.n	dff8 <.text+0xdff8>
-    dfe0:	21d2      	movs	r1, #210
-    dfe2:	00c9      	lsls	r1, r1, #3
-    dfe4:	9804      	ldr	r0, [sp, #16]
-    dfe6:	4469      	add	r1, sp
-    dfe8:	f7ff f89a 	bl	d120 <__sprint>
-    dfec:	2800      	cmp	r0, #0
-    dfee:	d000      	beq.n	dff2 <.text+0xdff2>
-    dff0:	e279      	b.n	e4e6 <.text+0xe4e6>
-    dff2:	22c5      	movs	r2, #197
-    dff4:	00d2      	lsls	r2, r2, #3
-    dff6:	446a      	add	r2, sp
-    dff8:	4ca6      	ldr	r4, [pc, #664]	(e294 <.text+0xe294>)
-    dffa:	446c      	add	r4, sp
-    dffc:	6823      	ldr	r3, [r4, #0]
-    dffe:	425e      	negs	r6, r3
-    e000:	2e00      	cmp	r6, #0
-    e002:	dc1b      	bgt.n	e03c <.text+0xe03c>
-    e004:	e03d      	b.n	e082 <.text+0xe082>
-    e006:	6013      	str	r3, [r2, #0]
-    e008:	2310      	movs	r3, #16
-    e00a:	6053      	str	r3, [r2, #4]
-    e00c:	1c03      	adds	r3, r0, #0
-    e00e:	20d3      	movs	r0, #211
-    e010:	00c0      	lsls	r0, r0, #3
-    e012:	4c9e      	ldr	r4, [pc, #632]	(e28c <.text+0xe28c>)
-    e014:	3310      	adds	r3, #16
-    e016:	4468      	add	r0, sp
-    e018:	6003      	str	r3, [r0, #0]
-    e01a:	446c      	add	r4, sp
-    e01c:	1c6b      	adds	r3, r5, #1
-    e01e:	6023      	str	r3, [r4, #0]
-    e020:	2b07      	cmp	r3, #7
-    e022:	dc01      	bgt.n	e028 <.text+0xe028>
-    e024:	3208      	adds	r2, #8
-    e026:	e008      	b.n	e03a <.text+0xe03a>
-    e028:	9804      	ldr	r0, [sp, #16]
-    e02a:	f7ff f879 	bl	d120 <__sprint>
-    e02e:	2800      	cmp	r0, #0
-    e030:	d000      	beq.n	e034 <.text+0xe034>
-    e032:	e258      	b.n	e4e6 <.text+0xe4e6>
-    e034:	22c5      	movs	r2, #197
-    e036:	00d2      	lsls	r2, r2, #3
-    e038:	446a      	add	r2, sp
-    e03a:	3e10      	subs	r6, #16
-    e03c:	23d3      	movs	r3, #211
-    e03e:	4c93      	ldr	r4, [pc, #588]	(e28c <.text+0xe28c>)
-    e040:	21d2      	movs	r1, #210
-    e042:	00db      	lsls	r3, r3, #3
-    e044:	446b      	add	r3, sp
-    e046:	00c9      	lsls	r1, r1, #3
-    e048:	446c      	add	r4, sp
-    e04a:	6818      	ldr	r0, [r3, #0]
-    e04c:	4469      	add	r1, sp
-    e04e:	6825      	ldr	r5, [r4, #0]
-    e050:	4b8f      	ldr	r3, [pc, #572]	(e290 <.text+0xe290>)
-    e052:	2e10      	cmp	r6, #16
-    e054:	dcd7      	bgt.n	e006 <.text+0xe006>
-    e056:	6013      	str	r3, [r2, #0]
-    e058:	1983      	adds	r3, r0, r6
-    e05a:	20d3      	movs	r0, #211
-    e05c:	00c0      	lsls	r0, r0, #3
-    e05e:	4468      	add	r0, sp
-    e060:	6003      	str	r3, [r0, #0]
-    e062:	1c6b      	adds	r3, r5, #1
-    e064:	6056      	str	r6, [r2, #4]
-    e066:	6023      	str	r3, [r4, #0]
-    e068:	2b07      	cmp	r3, #7
-    e06a:	dc01      	bgt.n	e070 <.text+0xe070>
-    e06c:	3208      	adds	r2, #8
-    e06e:	e008      	b.n	e082 <.text+0xe082>
-    e070:	9804      	ldr	r0, [sp, #16]
-    e072:	f7ff f855 	bl	d120 <__sprint>
-    e076:	2800      	cmp	r0, #0
-    e078:	d000      	beq.n	e07c <.text+0xe07c>
-    e07a:	e234      	b.n	e4e6 <.text+0xe4e6>
-    e07c:	22c5      	movs	r2, #197
-    e07e:	00d2      	lsls	r2, r2, #3
-    e080:	446a      	add	r2, sp
-    e082:	24d3      	movs	r4, #211
-    e084:	00e4      	lsls	r4, r4, #3
-    e086:	446c      	add	r4, sp
-    e088:	990e      	ldr	r1, [sp, #56]
-    e08a:	6823      	ldr	r3, [r4, #0]
-    e08c:	185b      	adds	r3, r3, r1
-    e08e:	6017      	str	r7, [r2, #0]
-    e090:	6051      	str	r1, [r2, #4]
-    e092:	e07b      	b.n	e18c <.text+0xe18c>
-    e094:	22d3      	movs	r2, #211
-    e096:	00d2      	lsls	r2, r2, #3
-    e098:	446a      	add	r2, sp
-    e09a:	4c7c      	ldr	r4, [pc, #496]	(e28c <.text+0xe28c>)
-    e09c:	21d2      	movs	r1, #210
-    e09e:	6810      	ldr	r0, [r2, #0]
-    e0a0:	9a0e      	ldr	r2, [sp, #56]
-    e0a2:	00c9      	lsls	r1, r1, #3
-    e0a4:	446c      	add	r4, sp
-    e0a6:	4469      	add	r1, sp
-    e0a8:	6825      	ldr	r5, [r4, #0]
-    e0aa:	4293      	cmp	r3, r2
-    e0ac:	db78      	blt.n	e1a0 <.text+0xe1a0>
-    e0ae:	9b07      	ldr	r3, [sp, #28]
-    e0b0:	24d3      	movs	r4, #211
-    e0b2:	601f      	str	r7, [r3, #0]
-    e0b4:	605a      	str	r2, [r3, #4]
-    e0b6:	00e4      	lsls	r4, r4, #3
-    e0b8:	1883      	adds	r3, r0, r2
-    e0ba:	4874      	ldr	r0, [pc, #464]	(e28c <.text+0xe28c>)
-    e0bc:	446c      	add	r4, sp
-    e0be:	6023      	str	r3, [r4, #0]
-    e0c0:	4468      	add	r0, sp
-    e0c2:	1c6b      	adds	r3, r5, #1
-    e0c4:	6003      	str	r3, [r0, #0]
-    e0c6:	2b07      	cmp	r3, #7
-    e0c8:	dc02      	bgt.n	e0d0 <.text+0xe0d0>
-    e0ca:	9a07      	ldr	r2, [sp, #28]
-    e0cc:	3208      	adds	r2, #8
-    e0ce:	e008      	b.n	e0e2 <.text+0xe0e2>
-    e0d0:	9804      	ldr	r0, [sp, #16]
-    e0d2:	f7ff f825 	bl	d120 <__sprint>
-    e0d6:	2800      	cmp	r0, #0
-    e0d8:	d000      	beq.n	e0dc <.text+0xe0dc>
-    e0da:	e204      	b.n	e4e6 <.text+0xe4e6>
-    e0dc:	22c5      	movs	r2, #197
-    e0de:	00d2      	lsls	r2, r2, #3
-    e0e0:	446a      	add	r2, sp
-    e0e2:	496c      	ldr	r1, [pc, #432]	(e294 <.text+0xe294>)
-    e0e4:	4469      	add	r1, sp
-    e0e6:	680b      	ldr	r3, [r1, #0]
-    e0e8:	980e      	ldr	r0, [sp, #56]
-    e0ea:	1a1c      	subs	r4, r3, r0
-    e0ec:	2c00      	cmp	r4, #0
-    e0ee:	dc1b      	bgt.n	e128 <.text+0xe128>
-    e0f0:	e03f      	b.n	e172 <.text+0xe172>
-    e0f2:	6013      	str	r3, [r2, #0]
-    e0f4:	2310      	movs	r3, #16
-    e0f6:	6053      	str	r3, [r2, #4]
-    e0f8:	1c03      	adds	r3, r0, #0
-    e0fa:	20d3      	movs	r0, #211
-    e0fc:	00c0      	lsls	r0, r0, #3
-    e0fe:	3310      	adds	r3, #16
-    e100:	4468      	add	r0, sp
-    e102:	6003      	str	r3, [r0, #0]
-    e104:	4861      	ldr	r0, [pc, #388]	(e28c <.text+0xe28c>)
-    e106:	1c6b      	adds	r3, r5, #1
-    e108:	4468      	add	r0, sp
-    e10a:	6003      	str	r3, [r0, #0]
-    e10c:	2b07      	cmp	r3, #7
-    e10e:	dc01      	bgt.n	e114 <.text+0xe114>
-    e110:	3208      	adds	r2, #8
-    e112:	e008      	b.n	e126 <.text+0xe126>
-    e114:	9804      	ldr	r0, [sp, #16]
-    e116:	f7ff f803 	bl	d120 <__sprint>
-    e11a:	2800      	cmp	r0, #0
-    e11c:	d000      	beq.n	e120 <.text+0xe120>
-    e11e:	e1e2      	b.n	e4e6 <.text+0xe4e6>
-    e120:	22c5      	movs	r2, #197
-    e122:	00d2      	lsls	r2, r2, #3
-    e124:	446a      	add	r2, sp
-    e126:	3c10      	subs	r4, #16
-    e128:	23d3      	movs	r3, #211
-    e12a:	00db      	lsls	r3, r3, #3
-    e12c:	446b      	add	r3, sp
-    e12e:	6818      	ldr	r0, [r3, #0]
-    e130:	4b56      	ldr	r3, [pc, #344]	(e28c <.text+0xe28c>)
-    e132:	21d2      	movs	r1, #210
-    e134:	446b      	add	r3, sp
-    e136:	00c9      	lsls	r1, r1, #3
-    e138:	681d      	ldr	r5, [r3, #0]
-    e13a:	4469      	add	r1, sp
-    e13c:	4b54      	ldr	r3, [pc, #336]	(e290 <.text+0xe290>)
-    e13e:	2c10      	cmp	r4, #16
-    e140:	dcd7      	bgt.n	e0f2 <.text+0xe0f2>
-    e142:	6013      	str	r3, [r2, #0]
-    e144:	6054      	str	r4, [r2, #4]
-    e146:	1903      	adds	r3, r0, r4
-    e148:	24d3      	movs	r4, #211
-    e14a:	00e4      	lsls	r4, r4, #3
-    e14c:	484f      	ldr	r0, [pc, #316]	(e28c <.text+0xe28c>)
-    e14e:	446c      	add	r4, sp
-    e150:	6023      	str	r3, [r4, #0]
-    e152:	4468      	add	r0, sp
-    e154:	1c6b      	adds	r3, r5, #1
-    e156:	6003      	str	r3, [r0, #0]
-    e158:	2b07      	cmp	r3, #7
-    e15a:	dc01      	bgt.n	e160 <.text+0xe160>
-    e15c:	3208      	adds	r2, #8
-    e15e:	e008      	b.n	e172 <.text+0xe172>
-    e160:	9804      	ldr	r0, [sp, #16]
-    e162:	f7fe ffdd 	bl	d120 <__sprint>
-    e166:	2800      	cmp	r0, #0
-    e168:	d000      	beq.n	e16c <.text+0xe16c>
-    e16a:	e1bc      	b.n	e4e6 <.text+0xe4e6>
-    e16c:	22c5      	movs	r2, #197
-    e16e:	00d2      	lsls	r2, r2, #3
-    e170:	446a      	add	r2, sp
-    e172:	9b17      	ldr	r3, [sp, #92]
-    e174:	2101      	movs	r1, #1
-    e176:	420b      	tst	r3, r1
-    e178:	d100      	bne.n	e17c <.text+0xe17c>
-    e17a:	e130      	b.n	e3de <.text+0xe3de>
-    e17c:	24d3      	movs	r4, #211
-    e17e:	4b47      	ldr	r3, [pc, #284]	(e29c <.text+0xe29c>)
-    e180:	00e4      	lsls	r4, r4, #3
-    e182:	446c      	add	r4, sp
-    e184:	6013      	str	r3, [r2, #0]
-    e186:	6823      	ldr	r3, [r4, #0]
-    e188:	6051      	str	r1, [r2, #4]
-    e18a:	3301      	adds	r3, #1
-    e18c:	483f      	ldr	r0, [pc, #252]	(e28c <.text+0xe28c>)
-    e18e:	4468      	add	r0, sp
-    e190:	6023      	str	r3, [r4, #0]
-    e192:	6803      	ldr	r3, [r0, #0]
-    e194:	3301      	adds	r3, #1
-    e196:	6003      	str	r3, [r0, #0]
-    e198:	2b07      	cmp	r3, #7
-    e19a:	dc00      	bgt.n	e19e <.text+0xe19e>
-    e19c:	e115      	b.n	e3ca <.text+0xe3ca>
-    e19e:	e116      	b.n	e3ce <.text+0xe3ce>
-    e1a0:	9a07      	ldr	r2, [sp, #28]
-    e1a2:	24d3      	movs	r4, #211
-    e1a4:	6053      	str	r3, [r2, #4]
-    e1a6:	00e4      	lsls	r4, r4, #3
-    e1a8:	18c3      	adds	r3, r0, r3
-    e1aa:	4838      	ldr	r0, [pc, #224]	(e28c <.text+0xe28c>)
-    e1ac:	446c      	add	r4, sp
-    e1ae:	6023      	str	r3, [r4, #0]
-    e1b0:	4468      	add	r0, sp
-    e1b2:	1c6b      	adds	r3, r5, #1
-    e1b4:	6017      	str	r7, [r2, #0]
-    e1b6:	6003      	str	r3, [r0, #0]
-    e1b8:	2b07      	cmp	r3, #7
-    e1ba:	dc01      	bgt.n	e1c0 <.text+0xe1c0>
-    e1bc:	3208      	adds	r2, #8
-    e1be:	e008      	b.n	e1d2 <.text+0xe1d2>
-    e1c0:	9804      	ldr	r0, [sp, #16]
-    e1c2:	f7fe ffad 	bl	d120 <__sprint>
-    e1c6:	2800      	cmp	r0, #0
-    e1c8:	d000      	beq.n	e1cc <.text+0xe1cc>
-    e1ca:	e18c      	b.n	e4e6 <.text+0xe4e6>
-    e1cc:	22c5      	movs	r2, #197
-    e1ce:	00d2      	lsls	r2, r2, #3
-    e1d0:	446a      	add	r2, sp
-    e1d2:	4b32      	ldr	r3, [pc, #200]	(e29c <.text+0xe29c>)
-    e1d4:	492f      	ldr	r1, [pc, #188]	(e294 <.text+0xe294>)
-    e1d6:	20d3      	movs	r0, #211
-    e1d8:	00c0      	lsls	r0, r0, #3
-    e1da:	4469      	add	r1, sp
-    e1dc:	4468      	add	r0, sp
-    e1de:	6013      	str	r3, [r2, #0]
-    e1e0:	2301      	movs	r3, #1
-    e1e2:	680c      	ldr	r4, [r1, #0]
-    e1e4:	6053      	str	r3, [r2, #4]
-    e1e6:	4929      	ldr	r1, [pc, #164]	(e28c <.text+0xe28c>)
-    e1e8:	6803      	ldr	r3, [r0, #0]
-    e1ea:	4469      	add	r1, sp
-    e1ec:	3301      	adds	r3, #1
-    e1ee:	6003      	str	r3, [r0, #0]
-    e1f0:	680b      	ldr	r3, [r1, #0]
-    e1f2:	3301      	adds	r3, #1
-    e1f4:	600b      	str	r3, [r1, #0]
-    e1f6:	2b07      	cmp	r3, #7
-    e1f8:	dc02      	bgt.n	e200 <.text+0xe200>
-    e1fa:	1c11      	adds	r1, r2, #0
-    e1fc:	3108      	adds	r1, #8
-    e1fe:	e00b      	b.n	e218 <.text+0xe218>
-    e200:	21d2      	movs	r1, #210
-    e202:	00c9      	lsls	r1, r1, #3
-    e204:	9804      	ldr	r0, [sp, #16]
-    e206:	4469      	add	r1, sp
-    e208:	f7fe ff8a 	bl	d120 <__sprint>
-    e20c:	2800      	cmp	r0, #0
-    e20e:	d000      	beq.n	e212 <.text+0xe212>
-    e210:	e169      	b.n	e4e6 <.text+0xe4e6>
-    e212:	21c5      	movs	r1, #197
-    e214:	00c9      	lsls	r1, r1, #3
-    e216:	4469      	add	r1, sp
-    e218:	193b      	adds	r3, r7, r4
-    e21a:	600b      	str	r3, [r1, #0]
-    e21c:	4b1d      	ldr	r3, [pc, #116]	(e294 <.text+0xe294>)
-    e21e:	20d3      	movs	r0, #211
-    e220:	446b      	add	r3, sp
-    e222:	00c0      	lsls	r0, r0, #3
-    e224:	681a      	ldr	r2, [r3, #0]
-    e226:	4468      	add	r0, sp
-    e228:	9c0e      	ldr	r4, [sp, #56]
-    e22a:	6803      	ldr	r3, [r0, #0]
-    e22c:	1aa2      	subs	r2, r4, r2
-    e22e:	189b      	adds	r3, r3, r2
-    e230:	604a      	str	r2, [r1, #4]
-    e232:	4a16      	ldr	r2, [pc, #88]	(e28c <.text+0xe28c>)
-    e234:	446a      	add	r2, sp
-    e236:	6003      	str	r3, [r0, #0]
-    e238:	6813      	ldr	r3, [r2, #0]
-    e23a:	3301      	adds	r3, #1
-    e23c:	6013      	str	r3, [r2, #0]
-    e23e:	2b07      	cmp	r3, #7
-    e240:	dd00      	ble.n	e244 <.text+0xe244>
-    e242:	e0c4      	b.n	e3ce <.text+0xe3ce>
-    e244:	1c0a      	adds	r2, r1, #0
-    e246:	e0c0      	b.n	e3ca <.text+0xe3ca>
-    e248:	9b0e      	ldr	r3, [sp, #56]
-    e24a:	2b01      	cmp	r3, #1
-    e24c:	dc04      	bgt.n	e258 <.text+0xe258>
-    e24e:	9c17      	ldr	r4, [sp, #92]
-    e250:	2301      	movs	r3, #1
-    e252:	421c      	tst	r4, r3
-    e254:	d100      	bne.n	e258 <.text+0xe258>
-    e256:	e086      	b.n	e366 <.text+0xe366>
-    e258:	4a11      	ldr	r2, [pc, #68]	(e2a0 <.text+0xe2a0>)
-    e25a:	783b      	ldrb	r3, [r7, #0]
-    e25c:	446a      	add	r2, sp
-    e25e:	7013      	strb	r3, [r2, #0]
-    e260:	232e      	movs	r3, #46
-    e262:	7053      	strb	r3, [r2, #1]
-    e264:	21d3      	movs	r1, #211
-    e266:	9807      	ldr	r0, [sp, #28]
-    e268:	00c9      	lsls	r1, r1, #3
-    e26a:	2302      	movs	r3, #2
-    e26c:	4469      	add	r1, sp
-    e26e:	6002      	str	r2, [r0, #0]
-    e270:	6043      	str	r3, [r0, #4]
-    e272:	4a06      	ldr	r2, [pc, #24]	(e28c <.text+0xe28c>)
-    e274:	680b      	ldr	r3, [r1, #0]
-    e276:	446a      	add	r2, sp
-    e278:	3302      	adds	r3, #2
-    e27a:	600b      	str	r3, [r1, #0]
-    e27c:	6813      	ldr	r3, [r2, #0]
-    e27e:	3301      	adds	r3, #1
-    e280:	6013      	str	r3, [r2, #0]
-    e282:	2b07      	cmp	r3, #7
-    e284:	dc0e      	bgt.n	e2a4 <.text+0xe2a4>
-    e286:	1c04      	adds	r4, r0, #0
-    e288:	3408      	adds	r4, #8
-    e28a:	e017      	b.n	e2bc <.text+0xe2bc>
-    e28c:	0694      	lsls	r4, r2, #26
-    e28e:	0000      	lsls	r0, r0, #0
-    e290:	54ec      	strb	r4, [r5, r3]
-    e292:	0001      	lsls	r1, r0, #0
-    e294:	06b4      	lsls	r4, r6, #26
-    e296:	0000      	lsls	r0, r0, #0
-    e298:	59f4      	ldr	r4, [r6, r7]
-    e29a:	0001      	lsls	r1, r0, #0
-    e29c:	59f8      	ldr	r0, [r7, r7]
-    e29e:	0001      	lsls	r1, r0, #0
-    e2a0:	06c5      	lsls	r5, r0, #27
-    e2a2:	0000      	lsls	r0, r0, #0
-    e2a4:	21d2      	movs	r1, #210
-    e2a6:	00c9      	lsls	r1, r1, #3
-    e2a8:	9804      	ldr	r0, [sp, #16]
-    e2aa:	4469      	add	r1, sp
-    e2ac:	f7fe ff38 	bl	d120 <__sprint>
-    e2b0:	2800      	cmp	r0, #0
-    e2b2:	d000      	beq.n	e2b6 <.text+0xe2b6>
-    e2b4:	e117      	b.n	e4e6 <.text+0xe4e6>
-    e2b6:	24c5      	movs	r4, #197
-    e2b8:	00e4      	lsls	r4, r4, #3
-    e2ba:	446c      	add	r4, sp
-    e2bc:	9814      	ldr	r0, [sp, #80]
-    e2be:	9915      	ldr	r1, [sp, #84]
-    e2c0:	4ba0      	ldr	r3, [pc, #640]	(e544 <.text+0xe544>)
-    e2c2:	4a9f      	ldr	r2, [pc, #636]	(e540 <.text+0xe540>)
-    e2c4:	f006 ff62 	bl	1518c <____nedf2_from_thumb>
-    e2c8:	9d0e      	ldr	r5, [sp, #56]
-    e2ca:	3d01      	subs	r5, #1
-    e2cc:	2800      	cmp	r0, #0
-    e2ce:	d012      	beq.n	e2f6 <.text+0xe2f6>
-    e2d0:	20d3      	movs	r0, #211
-    e2d2:	00c0      	lsls	r0, r0, #3
-    e2d4:	1c7b      	adds	r3, r7, #1
-    e2d6:	4468      	add	r0, sp
-    e2d8:	6023      	str	r3, [r4, #0]
-    e2da:	990e      	ldr	r1, [sp, #56]
-    e2dc:	6803      	ldr	r3, [r0, #0]
-    e2de:	4a9a      	ldr	r2, [pc, #616]	(e548 <.text+0xe548>)
-    e2e0:	18cb      	adds	r3, r1, r3
-    e2e2:	3b01      	subs	r3, #1
-    e2e4:	446a      	add	r2, sp
-    e2e6:	6003      	str	r3, [r0, #0]
-    e2e8:	6813      	ldr	r3, [r2, #0]
-    e2ea:	3301      	adds	r3, #1
-    e2ec:	6065      	str	r5, [r4, #4]
-    e2ee:	6013      	str	r3, [r2, #0]
-    e2f0:	2b07      	cmp	r3, #7
-    e2f2:	dd49      	ble.n	e388 <.text+0xe388>
-    e2f4:	e04a      	b.n	e38c <.text+0xe38c>
-    e2f6:	1e2e      	subs	r6, r5, #0
-    e2f8:	dc1b      	bgt.n	e332 <.text+0xe332>
-    e2fa:	e053      	b.n	e3a4 <.text+0xe3a4>
-    e2fc:	6023      	str	r3, [r4, #0]
-    e2fe:	2310      	movs	r3, #16
-    e300:	6063      	str	r3, [r4, #4]
-    e302:	1c03      	adds	r3, r0, #0
-    e304:	20d3      	movs	r0, #211
-    e306:	00c0      	lsls	r0, r0, #3
-    e308:	4a8f      	ldr	r2, [pc, #572]	(e548 <.text+0xe548>)
-    e30a:	3310      	adds	r3, #16
-    e30c:	4468      	add	r0, sp
-    e30e:	6003      	str	r3, [r0, #0]
-    e310:	446a      	add	r2, sp
-    e312:	1c6b      	adds	r3, r5, #1
-    e314:	6013      	str	r3, [r2, #0]
-    e316:	2b07      	cmp	r3, #7
-    e318:	dc01      	bgt.n	e31e <.text+0xe31e>
-    e31a:	3408      	adds	r4, #8
-    e31c:	e008      	b.n	e330 <.text+0xe330>
-    e31e:	9804      	ldr	r0, [sp, #16]
-    e320:	f7fe fefe 	bl	d120 <__sprint>
-    e324:	2800      	cmp	r0, #0
-    e326:	d000      	beq.n	e32a <.text+0xe32a>
-    e328:	e0dd      	b.n	e4e6 <.text+0xe4e6>
-    e32a:	24c5      	movs	r4, #197
-    e32c:	00e4      	lsls	r4, r4, #3
-    e32e:	446c      	add	r4, sp
-    e330:	3e10      	subs	r6, #16
-    e332:	23d3      	movs	r3, #211
-    e334:	4a84      	ldr	r2, [pc, #528]	(e548 <.text+0xe548>)
-    e336:	21d2      	movs	r1, #210
-    e338:	00db      	lsls	r3, r3, #3
-    e33a:	446b      	add	r3, sp
-    e33c:	00c9      	lsls	r1, r1, #3
-    e33e:	446a      	add	r2, sp
-    e340:	6818      	ldr	r0, [r3, #0]
-    e342:	4469      	add	r1, sp
-    e344:	6815      	ldr	r5, [r2, #0]
-    e346:	4b81      	ldr	r3, [pc, #516]	(e54c <.text+0xe54c>)
-    e348:	2e10      	cmp	r6, #16
-    e34a:	dcd7      	bgt.n	e2fc <.text+0xe2fc>
-    e34c:	6023      	str	r3, [r4, #0]
-    e34e:	1983      	adds	r3, r0, r6
-    e350:	20d3      	movs	r0, #211
-    e352:	00c0      	lsls	r0, r0, #3
-    e354:	4468      	add	r0, sp
-    e356:	6003      	str	r3, [r0, #0]
-    e358:	1c6b      	adds	r3, r5, #1
-    e35a:	6066      	str	r6, [r4, #4]
-    e35c:	6013      	str	r3, [r2, #0]
-    e35e:	2b07      	cmp	r3, #7
-    e360:	dd12      	ble.n	e388 <.text+0xe388>
-    e362:	9804      	ldr	r0, [sp, #16]
-    e364:	e016      	b.n	e394 <.text+0xe394>
-    e366:	22d3      	movs	r2, #211
-    e368:	9907      	ldr	r1, [sp, #28]
-    e36a:	00d2      	lsls	r2, r2, #3
-    e36c:	446a      	add	r2, sp
-    e36e:	604b      	str	r3, [r1, #4]
-    e370:	4c75      	ldr	r4, [pc, #468]	(e548 <.text+0xe548>)
-    e372:	6813      	ldr	r3, [r2, #0]
-    e374:	446c      	add	r4, sp
-    e376:	3301      	adds	r3, #1
-    e378:	6013      	str	r3, [r2, #0]
-    e37a:	6823      	ldr	r3, [r4, #0]
-    e37c:	3301      	adds	r3, #1
-    e37e:	600f      	str	r7, [r1, #0]
-    e380:	6023      	str	r3, [r4, #0]
-    e382:	2b07      	cmp	r3, #7
-    e384:	dc02      	bgt.n	e38c <.text+0xe38c>
-    e386:	1c0c      	adds	r4, r1, #0
-    e388:	3408      	adds	r4, #8
-    e38a:	e00b      	b.n	e3a4 <.text+0xe3a4>
-    e38c:	21d2      	movs	r1, #210
-    e38e:	00c9      	lsls	r1, r1, #3
-    e390:	9804      	ldr	r0, [sp, #16]
-    e392:	4469      	add	r1, sp
-    e394:	f7fe fec4 	bl	d120 <__sprint>
-    e398:	2800      	cmp	r0, #0
-    e39a:	d000      	beq.n	e39e <.text+0xe39e>
-    e39c:	e0a3      	b.n	e4e6 <.text+0xe4e6>
-    e39e:	24c5      	movs	r4, #197
-    e3a0:	00e4      	lsls	r4, r4, #3
-    e3a2:	446c      	add	r4, sp
-    e3a4:	4b6a      	ldr	r3, [pc, #424]	(e550 <.text+0xe550>)
-    e3a6:	21d3      	movs	r1, #211
-    e3a8:	00c9      	lsls	r1, r1, #3
-    e3aa:	446b      	add	r3, sp
-    e3ac:	4469      	add	r1, sp
-    e3ae:	980d      	ldr	r0, [sp, #52]
-    e3b0:	6023      	str	r3, [r4, #0]
-    e3b2:	4a65      	ldr	r2, [pc, #404]	(e548 <.text+0xe548>)
-    e3b4:	680b      	ldr	r3, [r1, #0]
-    e3b6:	446a      	add	r2, sp
-    e3b8:	181b      	adds	r3, r3, r0
-    e3ba:	600b      	str	r3, [r1, #0]
-    e3bc:	6813      	ldr	r3, [r2, #0]
-    e3be:	3301      	adds	r3, #1
-    e3c0:	6060      	str	r0, [r4, #4]
-    e3c2:	6013      	str	r3, [r2, #0]
-    e3c4:	2b07      	cmp	r3, #7
-    e3c6:	dc02      	bgt.n	e3ce <.text+0xe3ce>
-    e3c8:	1c22      	adds	r2, r4, #0
-    e3ca:	3208      	adds	r2, #8
-    e3cc:	e007      	b.n	e3de <.text+0xe3de>
-    e3ce:	21d2      	movs	r1, #210
-    e3d0:	00c9      	lsls	r1, r1, #3
-    e3d2:	9804      	ldr	r0, [sp, #16]
-    e3d4:	4469      	add	r1, sp
-    e3d6:	e5bb      	b.n	df50 <.text+0xdf50>
-    e3d8:	22c5      	movs	r2, #197
-    e3da:	00d2      	lsls	r2, r2, #3
-    e3dc:	446a      	add	r2, sp
-    e3de:	9b17      	ldr	r3, [sp, #92]
-    e3e0:	075b      	lsls	r3, r3, #29
-    e3e2:	d53e      	bpl.n	e462 <.text+0xe462>
-    e3e4:	9809      	ldr	r0, [sp, #36]
-    e3e6:	9910      	ldr	r1, [sp, #64]
-    e3e8:	1a44      	subs	r4, r0, r1
-    e3ea:	2c00      	cmp	r4, #0
-    e3ec:	dc1a      	bgt.n	e424 <.text+0xe424>
-    e3ee:	e038      	b.n	e462 <.text+0xe462>
-    e3f0:	6013      	str	r3, [r2, #0]
-    e3f2:	2310      	movs	r3, #16
-    e3f4:	6053      	str	r3, [r2, #4]
-    e3f6:	1c03      	adds	r3, r0, #0
-    e3f8:	20d3      	movs	r0, #211
-    e3fa:	00c0      	lsls	r0, r0, #3
-    e3fc:	3310      	adds	r3, #16
-    e3fe:	4468      	add	r0, sp
-    e400:	6003      	str	r3, [r0, #0]
-    e402:	4851      	ldr	r0, [pc, #324]	(e548 <.text+0xe548>)
-    e404:	1c6b      	adds	r3, r5, #1
-    e406:	4468      	add	r0, sp
-    e408:	6003      	str	r3, [r0, #0]
-    e40a:	2b07      	cmp	r3, #7
-    e40c:	dc01      	bgt.n	e412 <.text+0xe412>
-    e40e:	3208      	adds	r2, #8
-    e410:	e007      	b.n	e422 <.text+0xe422>
-    e412:	9804      	ldr	r0, [sp, #16]
-    e414:	f7fe fe84 	bl	d120 <__sprint>
-    e418:	2800      	cmp	r0, #0
-    e41a:	d164      	bne.n	e4e6 <.text+0xe4e6>
-    e41c:	22c5      	movs	r2, #197
-    e41e:	00d2      	lsls	r2, r2, #3
-    e420:	446a      	add	r2, sp
-    e422:	3c10      	subs	r4, #16
-    e424:	23d3      	movs	r3, #211
-    e426:	00db      	lsls	r3, r3, #3
-    e428:	446b      	add	r3, sp
-    e42a:	6818      	ldr	r0, [r3, #0]
-    e42c:	4b46      	ldr	r3, [pc, #280]	(e548 <.text+0xe548>)
-    e42e:	21d2      	movs	r1, #210
-    e430:	446b      	add	r3, sp
-    e432:	00c9      	lsls	r1, r1, #3
-    e434:	681d      	ldr	r5, [r3, #0]
-    e436:	4469      	add	r1, sp
-    e438:	4b46      	ldr	r3, [pc, #280]	(e554 <.text+0xe554>)
-    e43a:	2c10      	cmp	r4, #16
-    e43c:	dcd8      	bgt.n	e3f0 <.text+0xe3f0>
-    e43e:	6013      	str	r3, [r2, #0]
-    e440:	6054      	str	r4, [r2, #4]
-    e442:	1903      	adds	r3, r0, r4
-    e444:	24d3      	movs	r4, #211
-    e446:	00e4      	lsls	r4, r4, #3
-    e448:	483f      	ldr	r0, [pc, #252]	(e548 <.text+0xe548>)
-    e44a:	446c      	add	r4, sp
-    e44c:	6023      	str	r3, [r4, #0]
-    e44e:	4468      	add	r0, sp
-    e450:	1c6b      	adds	r3, r5, #1
-    e452:	6003      	str	r3, [r0, #0]
-    e454:	2b07      	cmp	r3, #7
-    e456:	dd04      	ble.n	e462 <.text+0xe462>
-    e458:	9804      	ldr	r0, [sp, #16]
-    e45a:	f7fe fe61 	bl	d120 <__sprint>
-    e45e:	2800      	cmp	r0, #0
-    e460:	d141      	bne.n	e4e6 <.text+0xe4e6>
-    e462:	9b10      	ldr	r3, [sp, #64]
-    e464:	9909      	ldr	r1, [sp, #36]
-    e466:	428b      	cmp	r3, r1
-    e468:	da00      	bge.n	e46c <.text+0xe46c>
-    e46a:	1c0b      	adds	r3, r1, #0
-    e46c:	24d3      	movs	r4, #211
-    e46e:	9a08      	ldr	r2, [sp, #32]
-    e470:	00e4      	lsls	r4, r4, #3
-    e472:	446c      	add	r4, sp
-    e474:	18d2      	adds	r2, r2, r3
-    e476:	6823      	ldr	r3, [r4, #0]
-    e478:	9208      	str	r2, [sp, #32]
-    e47a:	2b00      	cmp	r3, #0
-    e47c:	d007      	beq.n	e48e <.text+0xe48e>
-    e47e:	21d2      	movs	r1, #210
-    e480:	00c9      	lsls	r1, r1, #3
-    e482:	9804      	ldr	r0, [sp, #16]
-    e484:	4469      	add	r1, sp
-    e486:	f7fe fe4b 	bl	d120 <__sprint>
-    e48a:	2800      	cmp	r0, #0
-    e48c:	d12b      	bne.n	e4e6 <.text+0xe4e6>
-    e48e:	482e      	ldr	r0, [pc, #184]	(e548 <.text+0xe548>)
-    e490:	24c5      	movs	r4, #197
-    e492:	9912      	ldr	r1, [sp, #72]
-    e494:	2300      	movs	r3, #0
-    e496:	4468      	add	r0, sp
-    e498:	00e4      	lsls	r4, r4, #3
-    e49a:	6003      	str	r3, [r0, #0]
-    e49c:	446c      	add	r4, sp
-    e49e:	2900      	cmp	r1, #0
-    e4a0:	d101      	bne.n	e4a6 <.text+0xe4a6>
-    e4a2:	f7fe fed7 	bl	d254 <_vfprintf_r+0x114>
-    e4a6:	9805      	ldr	r0, [sp, #20]
-    e4a8:	f001 faa4 	bl	f9f4 <_free_r>
-    e4ac:	2200      	movs	r2, #0
-    e4ae:	9212      	str	r2, [sp, #72]
-    e4b0:	f7fe fed0 	bl	d254 <_vfprintf_r+0x114>
-    e4b4:	9c04      	ldr	r4, [sp, #16]
-    e4b6:	89a3      	ldrh	r3, [r4, #12]
-    e4b8:	2240      	movs	r2, #64
-    e4ba:	4313      	orrs	r3, r2
-    e4bc:	81a3      	strh	r3, [r4, #12]
-    e4be:	e019      	b.n	e4f4 <.text+0xe4f4>
-    e4c0:	21d3      	movs	r1, #211
-    e4c2:	00c9      	lsls	r1, r1, #3
-    e4c4:	4469      	add	r1, sp
-    e4c6:	680b      	ldr	r3, [r1, #0]
-    e4c8:	2b00      	cmp	r3, #0
-    e4ca:	d007      	beq.n	e4dc <.text+0xe4dc>
-    e4cc:	21d2      	movs	r1, #210
-    e4ce:	00c9      	lsls	r1, r1, #3
-    e4d0:	9804      	ldr	r0, [sp, #16]
-    e4d2:	4469      	add	r1, sp
-    e4d4:	f7fe fe24 	bl	d120 <__sprint>
-    e4d8:	2800      	cmp	r0, #0
-    e4da:	d10b      	bne.n	e4f4 <.text+0xe4f4>
-    e4dc:	4a1a      	ldr	r2, [pc, #104]	(e548 <.text+0xe548>)
-    e4de:	2300      	movs	r3, #0
-    e4e0:	446a      	add	r2, sp
-    e4e2:	6013      	str	r3, [r2, #0]
-    e4e4:	e006      	b.n	e4f4 <.text+0xe4f4>
-    e4e6:	9b12      	ldr	r3, [sp, #72]
-    e4e8:	2b00      	cmp	r3, #0
-    e4ea:	d003      	beq.n	e4f4 <.text+0xe4f4>
-    e4ec:	9805      	ldr	r0, [sp, #20]
-    e4ee:	9912      	ldr	r1, [sp, #72]
-    e4f0:	f001 fa80 	bl	f9f4 <_free_r>
-    e4f4:	9c04      	ldr	r4, [sp, #16]
-    e4f6:	89a3      	ldrh	r3, [r4, #12]
-    e4f8:	0658      	lsls	r0, r3, #25
-    e4fa:	d51a      	bpl.n	e532 <.text+0xe532>
-    e4fc:	2101      	movs	r1, #1
-    e4fe:	4249      	negs	r1, r1
-    e500:	9108      	str	r1, [sp, #32]
-    e502:	e016      	b.n	e532 <.text+0xe532>
-    e504:	2245      	movs	r2, #69
-    e506:	921a      	str	r2, [sp, #104]
-    e508:	f7ff f8b9 	bl	d67e <.text+0xd67e>
-    e50c:	4f12      	ldr	r7, [pc, #72]	(e558 <.text+0xe558>)
-    e50e:	2606      	movs	r6, #6
-    e510:	9610      	str	r6, [sp, #64]
-    e512:	e00a      	b.n	e52a <.text+0xe52a>
-    e514:	4b11      	ldr	r3, [pc, #68]	(e55c <.text+0xe55c>)
-    e516:	278e      	movs	r7, #142
-    e518:	2200      	movs	r2, #0
-    e51a:	446b      	add	r3, sp
-    e51c:	00ff      	lsls	r7, r7, #3
-    e51e:	701a      	strb	r2, [r3, #0]
-    e520:	446f      	add	r7, sp
-    e522:	2e00      	cmp	r6, #0
-    e524:	9610      	str	r6, [sp, #64]
-    e526:	da00      	bge.n	e52a <.text+0xe52a>
-    e528:	9210      	str	r2, [sp, #64]
-    e52a:	2300      	movs	r3, #0
-    e52c:	930f      	str	r3, [sp, #60]
-    e52e:	f7ff faf5 	bl	db1c <.text+0xdb1c>
-    e532:	23d9      	movs	r3, #217
-    e534:	9808      	ldr	r0, [sp, #32]
-    e536:	00db      	lsls	r3, r3, #3
-    e538:	449d      	add	sp, r3
-    e53a:	bcf0      	pop	{r4, r5, r6, r7}
-    e53c:	bc02      	pop	{r1}
-    e53e:	4708      	bx	r1
-	...
-    e548:	0694      	lsls	r4, r2, #26
-    e54a:	0000      	lsls	r0, r0, #0
-    e54c:	54ec      	strb	r4, [r5, r3]
-    e54e:	0001      	lsls	r1, r0, #0
-    e550:	06ad      	lsls	r5, r5, #26
-    e552:	0000      	lsls	r0, r0, #0
-    e554:	54fc      	strb	r4, [r7, r3]
-    e556:	0001      	lsls	r1, r0, #0
-    e558:	59fc      	ldr	r4, [r7, r7]
-    e55a:	0001      	lsls	r1, r0, #0
-    e55c:	06c7      	lsls	r7, r0, #27
-	...
-
-0000e560 <vfprintf>:
-    e560:	b530      	push	{r4, r5, lr}
-    e562:	1c13      	adds	r3, r2, #0
-    e564:	4a05      	ldr	r2, [pc, #20]	(e57c <.text+0xe57c>)
-    e566:	1c0d      	adds	r5, r1, #0
-    e568:	1c04      	adds	r4, r0, #0
-    e56a:	1c21      	adds	r1, r4, #0
-    e56c:	6810      	ldr	r0, [r2, #0]
-    e56e:	1c2a      	adds	r2, r5, #0
-    e570:	f7fe fde6 	bl	d140 <_vfprintf_r>
-    e574:	bc30      	pop	{r4, r5}
-    e576:	bc02      	pop	{r1}
-    e578:	4708      	bx	r1
-    e57a:	0000      	lsls	r0, r0, #0
-    e57c:	0020      	lsls	r0, r4, #0
-    e57e:	4000      	ands	r0, r0
-
-0000e580 <_wcrtomb_r>:
-    e580:	b530      	push	{r4, r5, lr}
-    e582:	b083      	sub	sp, #12
-    e584:	1c05      	adds	r5, r0, #0
-    e586:	1c1c      	adds	r4, r3, #0
-    e588:	2900      	cmp	r1, #0
-    e58a:	d102      	bne.n	e592 <_wcrtomb_r+0x12>
-    e58c:	4669      	mov	r1, sp
-    e58e:	3102      	adds	r1, #2
-    e590:	2200      	movs	r2, #0
-    e592:	1c23      	adds	r3, r4, #0
-    e594:	f000 f888 	bl	e6a8 <_wctomb_r>
-    e598:	1c43      	adds	r3, r0, #1
-    e59a:	d105      	bne.n	e5a8 <_wcrtomb_r+0x28>
-    e59c:	2300      	movs	r3, #0
-    e59e:	6023      	str	r3, [r4, #0]
-    e5a0:	238a      	movs	r3, #138
-    e5a2:	2001      	movs	r0, #1
-    e5a4:	602b      	str	r3, [r5, #0]
-    e5a6:	4240      	negs	r0, r0
-    e5a8:	b003      	add	sp, #12
-    e5aa:	bc30      	pop	{r4, r5}
-    e5ac:	bc02      	pop	{r1}
-    e5ae:	4708      	bx	r1
-
-0000e5b0 <wcrtomb>:
-    e5b0:	b530      	push	{r4, r5, lr}
-    e5b2:	1c13      	adds	r3, r2, #0
-    e5b4:	4a05      	ldr	r2, [pc, #20]	(e5cc <.text+0xe5cc>)
-    e5b6:	1c0d      	adds	r5, r1, #0
-    e5b8:	1c04      	adds	r4, r0, #0
-    e5ba:	1c21      	adds	r1, r4, #0
-    e5bc:	6810      	ldr	r0, [r2, #0]
-    e5be:	1c2a      	adds	r2, r5, #0
-    e5c0:	f7ff ffde 	bl	e580 <_wcrtomb_r>
-    e5c4:	bc30      	pop	{r4, r5}
-    e5c6:	bc02      	pop	{r1}
-    e5c8:	4708      	bx	r1
-    e5ca:	0000      	lsls	r0, r0, #0
-    e5cc:	0020      	lsls	r0, r4, #0
-    e5ce:	4000      	ands	r0, r0
-
-0000e5d0 <_wcsrtombs_r>:
-    e5d0:	b5f0      	push	{r4, r5, r6, r7, lr}
-    e5d2:	b089      	sub	sp, #36
-    e5d4:	9002      	str	r0, [sp, #8]
-    e5d6:	9101      	str	r1, [sp, #4]
-    e5d8:	9200      	str	r2, [sp, #0]
-    e5da:	1c1d      	adds	r5, r3, #0
-    e5dc:	9f0e      	ldr	r7, [sp, #56]
-    e5de:	2900      	cmp	r1, #0
-    e5e0:	d101      	bne.n	e5e6 <_wcsrtombs_r+0x16>
-    e5e2:	2501      	movs	r5, #1
-    e5e4:	426d      	negs	r5, r5
-    e5e6:	9900      	ldr	r1, [sp, #0]
-    e5e8:	9a01      	ldr	r2, [sp, #4]
-    e5ea:	680e      	ldr	r6, [r1, #0]
-    e5ec:	2400      	movs	r4, #0
-    e5ee:	9203      	str	r2, [sp, #12]
-    e5f0:	e03f      	b.n	e672 <_wcsrtombs_r+0xa2>
-    e5f2:	683b      	ldr	r3, [r7, #0]
-    e5f4:	9304      	str	r3, [sp, #16]
-    e5f6:	6879      	ldr	r1, [r7, #4]
-    e5f8:	9105      	str	r1, [sp, #20]
-    e5fa:	4669      	mov	r1, sp
-    e5fc:	6832      	ldr	r2, [r6, #0]
-    e5fe:	9802      	ldr	r0, [sp, #8]
-    e600:	311a      	adds	r1, #26
-    e602:	1c3b      	adds	r3, r7, #0
-    e604:	f7ff ffbc 	bl	e580 <_wcrtomb_r>
-    e608:	1c42      	adds	r2, r0, #1
-    e60a:	d107      	bne.n	e61c <_wcsrtombs_r+0x4c>
-    e60c:	9902      	ldr	r1, [sp, #8]
-    e60e:	238a      	movs	r3, #138
-    e610:	2401      	movs	r4, #1
-    e612:	600b      	str	r3, [r1, #0]
-    e614:	4264      	negs	r4, r4
-    e616:	2300      	movs	r3, #0
-    e618:	603b      	str	r3, [r7, #0]
-    e61a:	e02c      	b.n	e676 <_wcsrtombs_r+0xa6>
-    e61c:	1a2b      	subs	r3, r5, r0
-    e61e:	429c      	cmp	r4, r3
-    e620:	d822      	bhi.n	e668 <_wcsrtombs_r+0x98>
-    e622:	42a8      	cmp	r0, r5
-    e624:	d220      	bcs.n	e668 <_wcsrtombs_r+0x98>
-    e626:	9a01      	ldr	r2, [sp, #4]
-    e628:	1824      	adds	r4, r4, r0
-    e62a:	2a00      	cmp	r2, #0
-    e62c:	d00f      	beq.n	e64e <_wcsrtombs_r+0x7e>
-    e62e:	2200      	movs	r2, #0
-    e630:	e007      	b.n	e642 <_wcsrtombs_r+0x72>
-    e632:	466b      	mov	r3, sp
-    e634:	331a      	adds	r3, #26
-    e636:	5cd3      	ldrb	r3, [r2, r3]
-    e638:	9903      	ldr	r1, [sp, #12]
-    e63a:	700b      	strb	r3, [r1, #0]
-    e63c:	3101      	adds	r1, #1
-    e63e:	9103      	str	r1, [sp, #12]
-    e640:	3201      	adds	r2, #1
-    e642:	4282      	cmp	r2, r0
-    e644:	dbf5      	blt.n	e632 <_wcsrtombs_r+0x62>
-    e646:	9a00      	ldr	r2, [sp, #0]
-    e648:	6813      	ldr	r3, [r2, #0]
-    e64a:	3304      	adds	r3, #4
-    e64c:	6013      	str	r3, [r2, #0]
-    e64e:	6833      	ldr	r3, [r6, #0]
-    e650:	2b00      	cmp	r3, #0
-    e652:	d001      	beq.n	e658 <_wcsrtombs_r+0x88>
-    e654:	3604      	adds	r6, #4
-    e656:	e00c      	b.n	e672 <_wcsrtombs_r+0xa2>
-    e658:	9901      	ldr	r1, [sp, #4]
-    e65a:	2900      	cmp	r1, #0
-    e65c:	d001      	beq.n	e662 <_wcsrtombs_r+0x92>
-    e65e:	9a00      	ldr	r2, [sp, #0]
-    e660:	6013      	str	r3, [r2, #0]
-    e662:	3c01      	subs	r4, #1
-    e664:	603b      	str	r3, [r7, #0]
-    e666:	e006      	b.n	e676 <_wcsrtombs_r+0xa6>
-    e668:	9b04      	ldr	r3, [sp, #16]
-    e66a:	9905      	ldr	r1, [sp, #20]
-    e66c:	603b      	str	r3, [r7, #0]
-    e66e:	6079      	str	r1, [r7, #4]
-    e670:	e001      	b.n	e676 <_wcsrtombs_r+0xa6>
-    e672:	42ac      	cmp	r4, r5
-    e674:	d3bd      	bcc.n	e5f2 <_wcsrtombs_r+0x22>
-    e676:	1c20      	adds	r0, r4, #0
-    e678:	b009      	add	sp, #36
-    e67a:	bcf0      	pop	{r4, r5, r6, r7}
-    e67c:	bc02      	pop	{r1}
-    e67e:	4708      	bx	r1
-
-0000e680 <wcsrtombs>:
-    e680:	b570      	push	{r4, r5, r6, lr}
-    e682:	1c16      	adds	r6, r2, #0
-    e684:	4a07      	ldr	r2, [pc, #28]	(e6a4 <.text+0xe6a4>)
-    e686:	1c0d      	adds	r5, r1, #0
-    e688:	b081      	sub	sp, #4
-    e68a:	1c04      	adds	r4, r0, #0
-    e68c:	1c21      	adds	r1, r4, #0
-    e68e:	6810      	ldr	r0, [r2, #0]
-    e690:	9300      	str	r3, [sp, #0]
-    e692:	1c2a      	adds	r2, r5, #0
-    e694:	1c33      	adds	r3, r6, #0
-    e696:	f7ff ff9b 	bl	e5d0 <_wcsrtombs_r>
-    e69a:	b001      	add	sp, #4
-    e69c:	bc70      	pop	{r4, r5, r6}
-    e69e:	bc02      	pop	{r1}
-    e6a0:	4708      	bx	r1
-    e6a2:	0000      	lsls	r0, r0, #0
-    e6a4:	0020      	lsls	r0, r4, #0
-    e6a6:	4000      	ands	r0, r0
-
-0000e6a8 <_wctomb_r>:
-    e6a8:	b5f0      	push	{r4, r5, r6, r7, lr}
-    e6aa:	4e9c      	ldr	r6, [pc, #624]	(e91c <.text+0xe91c>)
-    e6ac:	1c30      	adds	r0, r6, #0
-    e6ae:	1c0d      	adds	r5, r1, #0
-    e6b0:	1c14      	adds	r4, r2, #0
-    e6b2:	1c1f      	adds	r7, r3, #0
-    e6b4:	f7fe fd2c 	bl	d110 <strlen>
-    e6b8:	2801      	cmp	r0, #1
-    e6ba:	d800      	bhi.n	e6be <_wctomb_r+0x16>
-    e6bc:	e121      	b.n	e902 <_wctomb_r+0x25a>
-    e6be:	4998      	ldr	r1, [pc, #608]	(e920 <.text+0xe920>)
-    e6c0:	1c30      	adds	r0, r6, #0
-    e6c2:	f002 fd53 	bl	1116c <strcmp>
-    e6c6:	2800      	cmp	r0, #0
-    e6c8:	d000      	beq.n	e6cc <_wctomb_r+0x24>
-    e6ca:	e097      	b.n	e7fc <_wctomb_r+0x154>
-    e6cc:	2d00      	cmp	r5, #0
-    e6ce:	d100      	bne.n	e6d2 <_wctomb_r+0x2a>
-    e6d0:	e11c      	b.n	e90c <_wctomb_r+0x264>
-    e6d2:	2c7f      	cmp	r4, #127
-    e6d4:	dc00      	bgt.n	e6d8 <_wctomb_r+0x30>
-    e6d6:	e116      	b.n	e906 <_wctomb_r+0x25e>
-    e6d8:	1c22      	adds	r2, r4, #0
-    e6da:	4b92      	ldr	r3, [pc, #584]	(e924 <.text+0xe924>)
-    e6dc:	3a80      	subs	r2, #128
-    e6de:	429a      	cmp	r2, r3
-    e6e0:	d80d      	bhi.n	e6fe <_wctomb_r+0x56>
-    e6e2:	0562      	lsls	r2, r4, #21
-    e6e4:	2340      	movs	r3, #64
-    e6e6:	425b      	negs	r3, r3
-    e6e8:	0ed2      	lsrs	r2, r2, #27
-    e6ea:	431a      	orrs	r2, r3
-    e6ec:	702a      	strb	r2, [r5, #0]
-    e6ee:	233f      	movs	r3, #63
-    e6f0:	1c22      	adds	r2, r4, #0
-    e6f2:	401a      	ands	r2, r3
-    e6f4:	2380      	movs	r3, #128
-    e6f6:	425b      	negs	r3, r3
-    e6f8:	431a      	orrs	r2, r3
-    e6fa:	706a      	strb	r2, [r5, #1]
-    e6fc:	e0a4      	b.n	e848 <_wctomb_r+0x1a0>
-    e6fe:	488a      	ldr	r0, [pc, #552]	(e928 <.text+0xe928>)
-    e700:	4b8a      	ldr	r3, [pc, #552]	(e92c <.text+0xe92c>)
-    e702:	1822      	adds	r2, r4, r0
-    e704:	429a      	cmp	r2, r3
-    e706:	d817      	bhi.n	e738 <_wctomb_r+0x90>
-    e708:	4b89      	ldr	r3, [pc, #548]	(e930 <.text+0xe930>)
-    e70a:	18e2      	adds	r2, r4, r3
-    e70c:	4b89      	ldr	r3, [pc, #548]	(e934 <.text+0xe934>)
-    e70e:	429a      	cmp	r2, r3
-    e710:	d800      	bhi.n	e714 <_wctomb_r+0x6c>
-    e712:	e0fd      	b.n	e910 <_wctomb_r+0x268>
-    e714:	0422      	lsls	r2, r4, #16
-    e716:	2320      	movs	r3, #32
-    e718:	425b      	negs	r3, r3
-    e71a:	0f12      	lsrs	r2, r2, #28
-    e71c:	431a      	orrs	r2, r3
-    e71e:	702a      	strb	r2, [r5, #0]
-    e720:	0523      	lsls	r3, r4, #20
-    e722:	2280      	movs	r2, #128
-    e724:	4252      	negs	r2, r2
-    e726:	0e9b      	lsrs	r3, r3, #26
-    e728:	4313      	orrs	r3, r2
-    e72a:	706b      	strb	r3, [r5, #1]
-    e72c:	233f      	movs	r3, #63
-    e72e:	4023      	ands	r3, r4
-    e730:	4313      	orrs	r3, r2
-    e732:	2003      	movs	r0, #3
-    e734:	70ab      	strb	r3, [r5, #2]
-    e736:	e0ed      	b.n	e914 <_wctomb_r+0x26c>
-    e738:	487f      	ldr	r0, [pc, #508]	(e938 <.text+0xe938>)
-    e73a:	4b80      	ldr	r3, [pc, #512]	(e93c <.text+0xe93c>)
-    e73c:	1822      	adds	r2, r4, r0
-    e73e:	429a      	cmp	r2, r3
-    e740:	d816      	bhi.n	e770 <_wctomb_r+0xc8>
-    e742:	02e2      	lsls	r2, r4, #11
-    e744:	2310      	movs	r3, #16
-    e746:	425b      	negs	r3, r3
-    e748:	0f52      	lsrs	r2, r2, #29
-    e74a:	431a      	orrs	r2, r3
-    e74c:	702a      	strb	r2, [r5, #0]
-    e74e:	03a3      	lsls	r3, r4, #14
-    e750:	2280      	movs	r2, #128
-    e752:	4252      	negs	r2, r2
-    e754:	0e9b      	lsrs	r3, r3, #26
-    e756:	4313      	orrs	r3, r2
-    e758:	706b      	strb	r3, [r5, #1]
-    e75a:	0523      	lsls	r3, r4, #20
-    e75c:	0e9b      	lsrs	r3, r3, #26
-    e75e:	1c69      	adds	r1, r5, #1
-    e760:	4313      	orrs	r3, r2
-    e762:	704b      	strb	r3, [r1, #1]
-    e764:	233f      	movs	r3, #63
-    e766:	4023      	ands	r3, r4
-    e768:	4313      	orrs	r3, r2
-    e76a:	2004      	movs	r0, #4
-    e76c:	708b      	strb	r3, [r1, #2]
-    e76e:	e0d1      	b.n	e914 <_wctomb_r+0x26c>
-    e770:	4b73      	ldr	r3, [pc, #460]	(e940 <.text+0xe940>)
-    e772:	18e2      	adds	r2, r4, r3
-    e774:	4b73      	ldr	r3, [pc, #460]	(e944 <.text+0xe944>)
-    e776:	429a      	cmp	r2, r3
-    e778:	d81b      	bhi.n	e7b2 <_wctomb_r+0x10a>
-    e77a:	01a2      	lsls	r2, r4, #6
-    e77c:	2308      	movs	r3, #8
-    e77e:	425b      	negs	r3, r3
-    e780:	0f92      	lsrs	r2, r2, #30
-    e782:	431a      	orrs	r2, r3
-    e784:	702a      	strb	r2, [r5, #0]
-    e786:	0223      	lsls	r3, r4, #8
-    e788:	2280      	movs	r2, #128
-    e78a:	4252      	negs	r2, r2
-    e78c:	0e9b      	lsrs	r3, r3, #26
-    e78e:	4313      	orrs	r3, r2
-    e790:	706b      	strb	r3, [r5, #1]
-    e792:	03a3      	lsls	r3, r4, #14
-    e794:	0e9b      	lsrs	r3, r3, #26
-    e796:	1c69      	adds	r1, r5, #1
-    e798:	4313      	orrs	r3, r2
-    e79a:	704b      	strb	r3, [r1, #1]
-    e79c:	0523      	lsls	r3, r4, #20
-    e79e:	0e9b      	lsrs	r3, r3, #26
-    e7a0:	1c48      	adds	r0, r1, #1
-    e7a2:	4313      	orrs	r3, r2
-    e7a4:	7043      	strb	r3, [r0, #1]
-    e7a6:	233f      	movs	r3, #63
-    e7a8:	4023      	ands	r3, r4
-    e7aa:	4313      	orrs	r3, r2
-    e7ac:	7083      	strb	r3, [r0, #2]
-    e7ae:	2005      	movs	r0, #5
-    e7b0:	e0b0      	b.n	e914 <_wctomb_r+0x26c>
-    e7b2:	4b65      	ldr	r3, [pc, #404]	(e948 <.text+0xe948>)
-    e7b4:	429c      	cmp	r4, r3
-    e7b6:	dc00      	bgt.n	e7ba <_wctomb_r+0x112>
-    e7b8:	e0aa      	b.n	e910 <_wctomb_r+0x268>
-    e7ba:	0062      	lsls	r2, r4, #1
-    e7bc:	2304      	movs	r3, #4
-    e7be:	425b      	negs	r3, r3
-    e7c0:	0fd2      	lsrs	r2, r2, #31
-    e7c2:	431a      	orrs	r2, r3
-    e7c4:	702a      	strb	r2, [r5, #0]
-    e7c6:	00a3      	lsls	r3, r4, #2
-    e7c8:	2280      	movs	r2, #128
-    e7ca:	4252      	negs	r2, r2
-    e7cc:	0e9b      	lsrs	r3, r3, #26
-    e7ce:	4313      	orrs	r3, r2
-    e7d0:	706b      	strb	r3, [r5, #1]
-    e7d2:	0223      	lsls	r3, r4, #8
-    e7d4:	0e9b      	lsrs	r3, r3, #26
-    e7d6:	1c68      	adds	r0, r5, #1
-    e7d8:	4313      	orrs	r3, r2
-    e7da:	7043      	strb	r3, [r0, #1]
-    e7dc:	03a3      	lsls	r3, r4, #14
-    e7de:	0e9b      	lsrs	r3, r3, #26
-    e7e0:	1c41      	adds	r1, r0, #1
-    e7e2:	4313      	orrs	r3, r2
-    e7e4:	704b      	strb	r3, [r1, #1]
-    e7e6:	0523      	lsls	r3, r4, #20
-    e7e8:	0e9b      	lsrs	r3, r3, #26
-    e7ea:	1c48      	adds	r0, r1, #1
-    e7ec:	4313      	orrs	r3, r2
-    e7ee:	7043      	strb	r3, [r0, #1]
-    e7f0:	233f      	movs	r3, #63
-    e7f2:	4023      	ands	r3, r4
-    e7f4:	4313      	orrs	r3, r2
-    e7f6:	7083      	strb	r3, [r0, #2]
-    e7f8:	2006      	movs	r0, #6
-    e7fa:	e08b      	b.n	e914 <_wctomb_r+0x26c>
-    e7fc:	4953      	ldr	r1, [pc, #332]	(e94c <.text+0xe94c>)
-    e7fe:	1c30      	adds	r0, r6, #0
-    e800:	f002 fcb4 	bl	1116c <strcmp>
-    e804:	2800      	cmp	r0, #0
-    e806:	d121      	bne.n	e84c <_wctomb_r+0x1a4>
-    e808:	2d00      	cmp	r5, #0
-    e80a:	d07f      	beq.n	e90c <_wctomb_r+0x264>
-    e80c:	0423      	lsls	r3, r4, #16
-    e80e:	0e1a      	lsrs	r2, r3, #24
-    e810:	2a00      	cmp	r2, #0
-    e812:	d078      	beq.n	e906 <_wctomb_r+0x25e>
-    e814:	1c13      	adds	r3, r2, #0
-    e816:	337f      	adds	r3, #127
-    e818:	061b      	lsls	r3, r3, #24
-    e81a:	0e1b      	lsrs	r3, r3, #24
-    e81c:	2b1e      	cmp	r3, #30
-    e81e:	d905      	bls.n	e82c <_wctomb_r+0x184>
-    e820:	1c13      	adds	r3, r2, #0
-    e822:	3320      	adds	r3, #32
-    e824:	061b      	lsls	r3, r3, #24
-    e826:	0e1b      	lsrs	r3, r3, #24
-    e828:	2b0f      	cmp	r3, #15
-    e82a:	d871      	bhi.n	e910 <_wctomb_r+0x268>
-    e82c:	20c0      	movs	r0, #192
-    e82e:	0623      	lsls	r3, r4, #24
-    e830:	0600      	lsls	r0, r0, #24
-    e832:	0e19      	lsrs	r1, r3, #24
-    e834:	181b      	adds	r3, r3, r0
-    e836:	0e1b      	lsrs	r3, r3, #24
-    e838:	2b3e      	cmp	r3, #62
-    e83a:	d903      	bls.n	e844 <_wctomb_r+0x19c>
-    e83c:	2380      	movs	r3, #128
-    e83e:	404b      	eors	r3, r1
-    e840:	2b7c      	cmp	r3, #124
-    e842:	d865      	bhi.n	e910 <_wctomb_r+0x268>
-    e844:	702a      	strb	r2, [r5, #0]
-    e846:	7069      	strb	r1, [r5, #1]
-    e848:	2002      	movs	r0, #2
-    e84a:	e063      	b.n	e914 <_wctomb_r+0x26c>
-    e84c:	4940      	ldr	r1, [pc, #256]	(e950 <.text+0xe950>)
-    e84e:	1c30      	adds	r0, r6, #0
-    e850:	f002 fc8c 	bl	1116c <strcmp>
-    e854:	2800      	cmp	r0, #0
-    e856:	d114      	bne.n	e882 <_wctomb_r+0x1da>
-    e858:	2d00      	cmp	r5, #0
-    e85a:	d057      	beq.n	e90c <_wctomb_r+0x264>
-    e85c:	0423      	lsls	r3, r4, #16
-    e85e:	0e1a      	lsrs	r2, r3, #24
-    e860:	2a00      	cmp	r2, #0
-    e862:	d050      	beq.n	e906 <_wctomb_r+0x25e>
-    e864:	1c13      	adds	r3, r2, #0
-    e866:	335f      	adds	r3, #95
-    e868:	061b      	lsls	r3, r3, #24
-    e86a:	0e1b      	lsrs	r3, r3, #24
-    e86c:	2b5d      	cmp	r3, #93
-    e86e:	d84f      	bhi.n	e910 <_wctomb_r+0x268>
-    e870:	20be      	movs	r0, #190
-    e872:	0623      	lsls	r3, r4, #24
-    e874:	05c0      	lsls	r0, r0, #23
-    e876:	0e19      	lsrs	r1, r3, #24
-    e878:	181b      	adds	r3, r3, r0
-    e87a:	0e1b      	lsrs	r3, r3, #24
-    e87c:	2b5d      	cmp	r3, #93
-    e87e:	d847      	bhi.n	e910 <_wctomb_r+0x268>
-    e880:	e7e0      	b.n	e844 <_wctomb_r+0x19c>
-    e882:	4934      	ldr	r1, [pc, #208]	(e954 <.text+0xe954>)
-    e884:	1c30      	adds	r0, r6, #0
-    e886:	f002 fc71 	bl	1116c <strcmp>
-    e88a:	2800      	cmp	r0, #0
-    e88c:	d139      	bne.n	e902 <_wctomb_r+0x25a>
-    e88e:	2d00      	cmp	r5, #0
-    e890:	d03a      	beq.n	e908 <_wctomb_r+0x260>
-    e892:	0623      	lsls	r3, r4, #24
-    e894:	0e1e      	lsrs	r6, r3, #24
-    e896:	0423      	lsls	r3, r4, #16
-    e898:	0e19      	lsrs	r1, r3, #24
-    e89a:	2900      	cmp	r1, #0
-    e89c:	d01f      	beq.n	e8de <_wctomb_r+0x236>
-    e89e:	1c0b      	adds	r3, r1, #0
-    e8a0:	3b21      	subs	r3, #33
-    e8a2:	061b      	lsls	r3, r3, #24
-    e8a4:	0e1b      	lsrs	r3, r3, #24
-    e8a6:	2b5d      	cmp	r3, #93
-    e8a8:	d832      	bhi.n	e910 <_wctomb_r+0x268>
-    e8aa:	1c33      	adds	r3, r6, #0
-    e8ac:	3b21      	subs	r3, #33
-    e8ae:	061b      	lsls	r3, r3, #24
-    e8b0:	0e1b      	lsrs	r3, r3, #24
-    e8b2:	2b5d      	cmp	r3, #93
-    e8b4:	d82c      	bhi.n	e910 <_wctomb_r+0x268>
-    e8b6:	683b      	ldr	r3, [r7, #0]
-    e8b8:	2b00      	cmp	r3, #0
-    e8ba:	d001      	beq.n	e8c0 <_wctomb_r+0x218>
-    e8bc:	2000      	movs	r0, #0
-    e8be:	e00a      	b.n	e8d6 <_wctomb_r+0x22e>
-    e8c0:	2301      	movs	r3, #1
-    e8c2:	603b      	str	r3, [r7, #0]
-    e8c4:	231b      	movs	r3, #27
-    e8c6:	702b      	strb	r3, [r5, #0]
-    e8c8:	2324      	movs	r3, #36
-    e8ca:	706b      	strb	r3, [r5, #1]
-    e8cc:	1c6a      	adds	r2, r5, #1
-    e8ce:	2342      	movs	r3, #66
-    e8d0:	7053      	strb	r3, [r2, #1]
-    e8d2:	1c95      	adds	r5, r2, #2
-    e8d4:	2003      	movs	r0, #3
-    e8d6:	3002      	adds	r0, #2
-    e8d8:	7029      	strb	r1, [r5, #0]
-    e8da:	706e      	strb	r6, [r5, #1]
-    e8dc:	e01a      	b.n	e914 <_wctomb_r+0x26c>
-    e8de:	683b      	ldr	r3, [r7, #0]
-    e8e0:	2b00      	cmp	r3, #0
-    e8e2:	d101      	bne.n	e8e8 <_wctomb_r+0x240>
-    e8e4:	2000      	movs	r0, #0
-    e8e6:	e009      	b.n	e8fc <_wctomb_r+0x254>
-    e8e8:	231b      	movs	r3, #27
-    e8ea:	6039      	str	r1, [r7, #0]
-    e8ec:	702b      	strb	r3, [r5, #0]
-    e8ee:	2328      	movs	r3, #40
-    e8f0:	706b      	strb	r3, [r5, #1]
-    e8f2:	1c6a      	adds	r2, r5, #1
-    e8f4:	2342      	movs	r3, #66
-    e8f6:	7053      	strb	r3, [r2, #1]
-    e8f8:	1c95      	adds	r5, r2, #2
-    e8fa:	2003      	movs	r0, #3
-    e8fc:	3001      	adds	r0, #1
-    e8fe:	702e      	strb	r6, [r5, #0]
-    e900:	e008      	b.n	e914 <_wctomb_r+0x26c>
-    e902:	2d00      	cmp	r5, #0
-    e904:	d002      	beq.n	e90c <_wctomb_r+0x264>
-    e906:	702c      	strb	r4, [r5, #0]
-    e908:	2001      	movs	r0, #1
-    e90a:	e003      	b.n	e914 <_wctomb_r+0x26c>
-    e90c:	2000      	movs	r0, #0
-    e90e:	e001      	b.n	e914 <_wctomb_r+0x26c>
-    e910:	2001      	movs	r0, #1
-    e912:	4240      	negs	r0, r0
-    e914:	bcf0      	pop	{r4, r5, r6, r7}
-    e916:	bc02      	pop	{r1}
-    e918:	4708      	bx	r1
-    e91a:	0000      	lsls	r0, r0, #0
-    e91c:	0428      	lsls	r0, r5, #16
-    e91e:	4000      	ands	r0, r0
-    e920:	5a04      	ldrh	r4, [r0, r0]
-    e922:	0001      	lsls	r1, r0, #0
-    e924:	077f      	lsls	r7, r7, #29
-    e926:	0000      	lsls	r0, r0, #0
-    e928:	f800 ffff 	strb.w	pc, [r0, #255]!
-    e92c:	f7ff 0000 	undefined
-    e930:	2800      	cmp	r0, #0
-    e932:	ffff 07ff 	vqshl.u64	q8, <illegal reg q15.5>, #63
-    e936:	0000      	lsls	r0, r0, #0
-    e938:	0000      	lsls	r0, r0, #0
-    e93a:	ffff ffff 	undefined
-    e93e:	001e      	lsls	r6, r3, #0
-    e940:	0000      	lsls	r0, r0, #0
-    e942:	ffe0 ffff 	undefined
-    e946:	03df      	lsls	r7, r3, #15
-    e948:	ffff 03ff 	vrsra.u64	q8, <illegal reg q15.5>, #1
-    e94c:	5a0c      	ldrh	r4, [r1, r0]
-    e94e:	0001      	lsls	r1, r0, #0
-    e950:	5a14      	ldrh	r4, [r2, r0]
-    e952:	0001      	lsls	r1, r0, #0
-    e954:	5a1c      	ldrh	r4, [r3, r0]
-    e956:	0001      	lsls	r1, r0, #0
-
-0000e958 <__swsetup>:
-    e958:	b530      	push	{r4, r5, lr}
-    e95a:	4b23      	ldr	r3, [pc, #140]	(e9e8 <.text+0xe9e8>)
-    e95c:	1c04      	adds	r4, r0, #0
-    e95e:	6818      	ldr	r0, [r3, #0]
-    e960:	2800      	cmp	r0, #0
-    e962:	d004      	beq.n	e96e <__swsetup+0x16>
-    e964:	6b83      	ldr	r3, [r0, #56]
-    e966:	2b00      	cmp	r3, #0
-    e968:	d101      	bne.n	e96e <__swsetup+0x16>
-    e96a:	f000 ff37 	bl	f7dc <__sinit>
-    e96e:	89a2      	ldrh	r2, [r4, #12]
-    e970:	2308      	movs	r3, #8
-    e972:	1c15      	adds	r5, r2, #0
-    e974:	401d      	ands	r5, r3
-    e976:	d11e      	bne.n	e9b6 <__swsetup+0x5e>
-    e978:	06d3      	lsls	r3, r2, #27
-    e97a:	d402      	bmi.n	e982 <__swsetup+0x2a>
-    e97c:	2001      	movs	r0, #1
-    e97e:	4240      	negs	r0, r0
-    e980:	e02f      	b.n	e9e2 <__swsetup+0x8a>
-    e982:	0753      	lsls	r3, r2, #29
-    e984:	d513      	bpl.n	e9ae <__swsetup+0x56>
-    e986:	6b21      	ldr	r1, [r4, #48]
-    e988:	2900      	cmp	r1, #0
-    e98a:	d008      	beq.n	e99e <__swsetup+0x46>
-    e98c:	1c23      	adds	r3, r4, #0
-    e98e:	3340      	adds	r3, #64
-    e990:	4299      	cmp	r1, r3
-    e992:	d003      	beq.n	e99c <__swsetup+0x44>
-    e994:	4b14      	ldr	r3, [pc, #80]	(e9e8 <.text+0xe9e8>)
-    e996:	6818      	ldr	r0, [r3, #0]
-    e998:	f001 f82c 	bl	f9f4 <_free_r>
-    e99c:	6325      	str	r5, [r4, #48]
-    e99e:	89a3      	ldrh	r3, [r4, #12]
-    e9a0:	2224      	movs	r2, #36
-    e9a2:	4393      	bics	r3, r2
-    e9a4:	81a3      	strh	r3, [r4, #12]
-    e9a6:	2300      	movs	r3, #0
-    e9a8:	6063      	str	r3, [r4, #4]
-    e9aa:	6923      	ldr	r3, [r4, #16]
-    e9ac:	6023      	str	r3, [r4, #0]
-    e9ae:	89a3      	ldrh	r3, [r4, #12]
-    e9b0:	2208      	movs	r2, #8
-    e9b2:	4313      	orrs	r3, r2
-    e9b4:	81a3      	strh	r3, [r4, #12]
-    e9b6:	6923      	ldr	r3, [r4, #16]
-    e9b8:	2b00      	cmp	r3, #0
-    e9ba:	d102      	bne.n	e9c2 <__swsetup+0x6a>
-    e9bc:	1c20      	adds	r0, r4, #0
-    e9be:	f001 fab1 	bl	ff24 <__smakebuf>
-    e9c2:	89a3      	ldrh	r3, [r4, #12]
-    e9c4:	07da      	lsls	r2, r3, #31
-    e9c6:	d505      	bpl.n	e9d4 <__swsetup+0x7c>
-    e9c8:	2300      	movs	r3, #0
-    e9ca:	60a3      	str	r3, [r4, #8]
-    e9cc:	6963      	ldr	r3, [r4, #20]
-    e9ce:	425b      	negs	r3, r3
-    e9d0:	61a3      	str	r3, [r4, #24]
-    e9d2:	e005      	b.n	e9e0 <__swsetup+0x88>
-    e9d4:	079a      	lsls	r2, r3, #30
-    e9d6:	d501      	bpl.n	e9dc <__swsetup+0x84>
-    e9d8:	2300      	movs	r3, #0
-    e9da:	e000      	b.n	e9de <__swsetup+0x86>
-    e9dc:	6963      	ldr	r3, [r4, #20]
-    e9de:	60a3      	str	r3, [r4, #8]
-    e9e0:	2000      	movs	r0, #0
-    e9e2:	bc30      	pop	{r4, r5}
-    e9e4:	bc02      	pop	{r1}
-    e9e6:	4708      	bx	r1
-    e9e8:	0020      	lsls	r0, r4, #0
-    e9ea:	4000      	ands	r0, r0
-
-0000e9ec <quorem>:
-    e9ec:	b5f0      	push	{r4, r5, r6, r7, lr}
-    e9ee:	690a      	ldr	r2, [r1, #16]
-    e9f0:	6903      	ldr	r3, [r0, #16]
-    e9f2:	b089      	sub	sp, #36
-    e9f4:	9001      	str	r0, [sp, #4]
-    e9f6:	9100      	str	r1, [sp, #0]
-    e9f8:	4293      	cmp	r3, r2
-    e9fa:	da01      	bge.n	ea00 <quorem+0x14>
-    e9fc:	2000      	movs	r0, #0
-    e9fe:	e089      	b.n	eb14 <quorem+0x128>
-    ea00:	1e56      	subs	r6, r2, #1
-    ea02:	9800      	ldr	r0, [sp, #0]
-    ea04:	9a01      	ldr	r2, [sp, #4]
-    ea06:	3014      	adds	r0, #20
-    ea08:	3214      	adds	r2, #20
-    ea0a:	00b3      	lsls	r3, r6, #2
-    ea0c:	18c1      	adds	r1, r0, r3
-    ea0e:	18d3      	adds	r3, r2, r3
-    ea10:	9106      	str	r1, [sp, #24]
-    ea12:	9305      	str	r3, [sp, #20]
-    ea14:	6809      	ldr	r1, [r1, #0]
-    ea16:	681b      	ldr	r3, [r3, #0]
-    ea18:	9008      	str	r0, [sp, #32]
-    ea1a:	3101      	adds	r1, #1
-    ea1c:	1c18      	adds	r0, r3, #0
-    ea1e:	9207      	str	r2, [sp, #28]
-    ea20:	9302      	str	r3, [sp, #8]
-    ea22:	f004 fecb 	bl	137bc <__aeabi_uidiv>
-    ea26:	9004      	str	r0, [sp, #16]
-    ea28:	2800      	cmp	r0, #0
-    ea2a:	d036      	beq.n	ea9a <quorem+0xae>
-    ea2c:	2000      	movs	r0, #0
-    ea2e:	9d07      	ldr	r5, [sp, #28]
-    ea30:	9f08      	ldr	r7, [sp, #32]
-    ea32:	9003      	str	r0, [sp, #12]
-    ea34:	4684      	mov	ip, r0
-    ea36:	cf04      	ldmia	r7!, {r2}
-    ea38:	4c38      	ldr	r4, [pc, #224]	(eb1c <.text+0xeb1c>)
-    ea3a:	9804      	ldr	r0, [sp, #16]
-    ea3c:	1c13      	adds	r3, r2, #0
-    ea3e:	4023      	ands	r3, r4
-    ea40:	1c01      	adds	r1, r0, #0
-    ea42:	4359      	muls	r1, r3
-    ea44:	0c12      	lsrs	r2, r2, #16
-    ea46:	4342      	muls	r2, r0
-    ea48:	4461      	add	r1, ip
-    ea4a:	0c0b      	lsrs	r3, r1, #16
-    ea4c:	18d2      	adds	r2, r2, r3
-    ea4e:	0c13      	lsrs	r3, r2, #16
-    ea50:	469c      	mov	ip, r3
-    ea52:	682b      	ldr	r3, [r5, #0]
-    ea54:	1c18      	adds	r0, r3, #0
-    ea56:	4021      	ands	r1, r4
-    ea58:	4020      	ands	r0, r4
-    ea5a:	1a40      	subs	r0, r0, r1
-    ea5c:	9903      	ldr	r1, [sp, #12]
-    ea5e:	4022      	ands	r2, r4
-    ea60:	1840      	adds	r0, r0, r1
-    ea62:	0c1b      	lsrs	r3, r3, #16
-    ea64:	1a9b      	subs	r3, r3, r2
-    ea66:	1402      	asrs	r2, r0, #16
-    ea68:	189b      	adds	r3, r3, r2
-    ea6a:	141a      	asrs	r2, r3, #16
-    ea6c:	806b      	strh	r3, [r5, #2]
-    ea6e:	9b06      	ldr	r3, [sp, #24]
-    ea70:	8028      	strh	r0, [r5, #0]
-    ea72:	9203      	str	r2, [sp, #12]
-    ea74:	3504      	adds	r5, #4
-    ea76:	429f      	cmp	r7, r3
-    ea78:	d9dd      	bls.n	ea36 <quorem+0x4a>
-    ea7a:	9802      	ldr	r0, [sp, #8]
-    ea7c:	2800      	cmp	r0, #0
-    ea7e:	d001      	beq.n	ea84 <quorem+0x98>
-    ea80:	e00b      	b.n	ea9a <quorem+0xae>
-    ea82:	3e01      	subs	r6, #1
-    ea84:	9905      	ldr	r1, [sp, #20]
-    ea86:	9a07      	ldr	r2, [sp, #28]
-    ea88:	3904      	subs	r1, #4
-    ea8a:	9105      	str	r1, [sp, #20]
-    ea8c:	4291      	cmp	r1, r2
-    ea8e:	d902      	bls.n	ea96 <quorem+0xaa>
-    ea90:	680b      	ldr	r3, [r1, #0]
-    ea92:	2b00      	cmp	r3, #0
-    ea94:	d0f5      	beq.n	ea82 <quorem+0x96>
-    ea96:	9b01      	ldr	r3, [sp, #4]
-    ea98:	611e      	str	r6, [r3, #16]
-    ea9a:	9801      	ldr	r0, [sp, #4]
-    ea9c:	9900      	ldr	r1, [sp, #0]
-    ea9e:	f001 fd9d 	bl	105dc <__mcmp>
-    eaa2:	2800      	cmp	r0, #0
-    eaa4:	db35      	blt.n	eb12 <quorem+0x126>
-    eaa6:	9804      	ldr	r0, [sp, #16]
-    eaa8:	3001      	adds	r0, #1
-    eaaa:	2700      	movs	r7, #0
-    eaac:	9004      	str	r0, [sp, #16]
-    eaae:	9d07      	ldr	r5, [sp, #28]
-    eab0:	46bc      	mov	ip, r7
-    eab2:	9908      	ldr	r1, [sp, #32]
-    eab4:	c904      	ldmia	r1!, {r2}
-    eab6:	4c19      	ldr	r4, [pc, #100]	(eb1c <.text+0xeb1c>)
-    eab8:	9108      	str	r1, [sp, #32]
-    eaba:	1c11      	adds	r1, r2, #0
-    eabc:	4021      	ands	r1, r4
-    eabe:	4461      	add	r1, ip
-    eac0:	0c0b      	lsrs	r3, r1, #16
-    eac2:	0c12      	lsrs	r2, r2, #16
-    eac4:	18d2      	adds	r2, r2, r3
-    eac6:	0c13      	lsrs	r3, r2, #16
-    eac8:	469c      	mov	ip, r3
-    eaca:	682b      	ldr	r3, [r5, #0]
-    eacc:	1c18      	adds	r0, r3, #0
-    eace:	4021      	ands	r1, r4
-    ead0:	4020      	ands	r0, r4
-    ead2:	1a40      	subs	r0, r0, r1
-    ead4:	19c0      	adds	r0, r0, r7
-    ead6:	4022      	ands	r2, r4
-    ead8:	0c1b      	lsrs	r3, r3, #16
-    eada:	1a9b      	subs	r3, r3, r2
-    eadc:	8028      	strh	r0, [r5, #0]
-    eade:	1402      	asrs	r2, r0, #16
-    eae0:	9906      	ldr	r1, [sp, #24]
-    eae2:	9808      	ldr	r0, [sp, #32]
-    eae4:	189b      	adds	r3, r3, r2
-    eae6:	806b      	strh	r3, [r5, #2]
-    eae8:	141f      	asrs	r7, r3, #16
-    eaea:	3504      	adds	r5, #4
-    eaec:	4288      	cmp	r0, r1
-    eaee:	d9e0      	bls.n	eab2 <quorem+0xc6>
-    eaf0:	9807      	ldr	r0, [sp, #28]
-    eaf2:	00b3      	lsls	r3, r6, #2
-    eaf4:	18c2      	adds	r2, r0, r3
-    eaf6:	6813      	ldr	r3, [r2, #0]
-    eaf8:	2b00      	cmp	r3, #0
-    eafa:	d001      	beq.n	eb00 <quorem+0x114>
-    eafc:	e009      	b.n	eb12 <quorem+0x126>
-    eafe:	3e01      	subs	r6, #1
-    eb00:	9907      	ldr	r1, [sp, #28]
-    eb02:	3a04      	subs	r2, #4
-    eb04:	428a      	cmp	r2, r1
-    eb06:	d902      	bls.n	eb0e <quorem+0x122>
-    eb08:	6813      	ldr	r3, [r2, #0]
-    eb0a:	2b00      	cmp	r3, #0
-    eb0c:	d0f7      	beq.n	eafe <quorem+0x112>
-    eb0e:	9a01      	ldr	r2, [sp, #4]
-    eb10:	6116      	str	r6, [r2, #16]
-    eb12:	9804      	ldr	r0, [sp, #16]
-    eb14:	b009      	add	sp, #36
-    eb16:	bcf0      	pop	{r4, r5, r6, r7}
-    eb18:	bc02      	pop	{r1}
-    eb1a:	4708      	bx	r1
-    eb1c:	ffff 0000 	vaddl.u<illegal width 64>	q8, d15, d0
-
-0000eb20 <_dtoa_r>:
-    eb20:	b5f0      	push	{r4, r5, r6, r7, lr}
-    eb22:	b0a4      	sub	sp, #144
-    eb24:	9103      	str	r1, [sp, #12]
-    eb26:	9204      	str	r2, [sp, #16]
-    eb28:	6c01      	ldr	r1, [r0, #64]
-    eb2a:	9002      	str	r0, [sp, #8]
-    eb2c:	9301      	str	r3, [sp, #4]
-    eb2e:	9c2b      	ldr	r4, [sp, #172]
-    eb30:	2900      	cmp	r1, #0
-    eb32:	d00a      	beq.n	eb4a <_dtoa_r+0x2a>
-    eb34:	6c43      	ldr	r3, [r0, #68]
-    eb36:	604b      	str	r3, [r1, #4]
-    eb38:	6c42      	ldr	r2, [r0, #68]
-    eb3a:	2301      	movs	r3, #1
-    eb3c:	4093      	lsls	r3, r2
-    eb3e:	608b      	str	r3, [r1, #8]
-    eb40:	f001 fce6 	bl	10510 <_Bfree>
-    eb44:	9802      	ldr	r0, [sp, #8]
-    eb46:	2300      	movs	r3, #0
-    eb48:	6403      	str	r3, [r0, #64]
-    eb4a:	9a03      	ldr	r2, [sp, #12]
-    eb4c:	2a00      	cmp	r2, #0
-    eb4e:	da05      	bge.n	eb5c <_dtoa_r+0x3c>
-    eb50:	2301      	movs	r3, #1
-    eb52:	6023      	str	r3, [r4, #0]
-    eb54:	4bcd      	ldr	r3, [pc, #820]	(ee8c <.text+0xee8c>)
-    eb56:	401a      	ands	r2, r3
-    eb58:	9203      	str	r2, [sp, #12]
-    eb5a:	e001      	b.n	eb60 <_dtoa_r+0x40>
-    eb5c:	2300      	movs	r3, #0
-    eb5e:	6023      	str	r3, [r4, #0]
-    eb60:	9e03      	ldr	r6, [sp, #12]
-    eb62:	4acb      	ldr	r2, [pc, #812]	(ee90 <.text+0xee90>)
-    eb64:	1c33      	adds	r3, r6, #0
-    eb66:	4013      	ands	r3, r2
-    eb68:	4293      	cmp	r3, r2
-    eb6a:	d119      	bne.n	eba0 <_dtoa_r+0x80>
-    eb6c:	4bc9      	ldr	r3, [pc, #804]	(ee94 <.text+0xee94>)
-    eb6e:	992a      	ldr	r1, [sp, #168]
-    eb70:	9a04      	ldr	r2, [sp, #16]
-    eb72:	600b      	str	r3, [r1, #0]
-    eb74:	2a00      	cmp	r2, #0
-    eb76:	d104      	bne.n	eb82 <_dtoa_r+0x62>
-    eb78:	4bc7      	ldr	r3, [pc, #796]	(ee98 <.text+0xee98>)
-    eb7a:	421e      	tst	r6, r3
-    eb7c:	d101      	bne.n	eb82 <_dtoa_r+0x62>
-    eb7e:	48c7      	ldr	r0, [pc, #796]	(ee9c <.text+0xee9c>)
-    eb80:	e000      	b.n	eb84 <_dtoa_r+0x64>
-    eb82:	48c7      	ldr	r0, [pc, #796]	(eea0 <.text+0xeea0>)
-    eb84:	9b2c      	ldr	r3, [sp, #176]
-    eb86:	2b00      	cmp	r3, #0
-    eb88:	d101      	bne.n	eb8e <_dtoa_r+0x6e>
-    eb8a:	f000 fdc3 	bl	f714 <.text+0xf714>
-    eb8e:	78c3      	ldrb	r3, [r0, #3]
-    eb90:	1cc2      	adds	r2, r0, #3
-    eb92:	2b00      	cmp	r3, #0
-    eb94:	d000      	beq.n	eb98 <_dtoa_r+0x78>
-    eb96:	3205      	adds	r2, #5
-    eb98:	9c2c      	ldr	r4, [sp, #176]
-    eb9a:	6022      	str	r2, [r4, #0]
-    eb9c:	f000 fdba 	bl	f714 <.text+0xf714>
-    eba0:	9803      	ldr	r0, [sp, #12]
-    eba2:	9904      	ldr	r1, [sp, #16]
-    eba4:	4abf      	ldr	r2, [pc, #764]	(eea4 <.text+0xeea4>)
-    eba6:	4bc0      	ldr	r3, [pc, #768]	(eea8 <.text+0xeea8>)
-    eba8:	9005      	str	r0, [sp, #20]
-    ebaa:	9106      	str	r1, [sp, #24]
-    ebac:	f006 faee 	bl	1518c <____nedf2_from_thumb>
-    ebb0:	2800      	cmp	r0, #0
-    ebb2:	d10e      	bne.n	ebd2 <_dtoa_r+0xb2>
-    ebb4:	992a      	ldr	r1, [sp, #168]
-    ebb6:	9a2c      	ldr	r2, [sp, #176]
-    ebb8:	2301      	movs	r3, #1
-    ebba:	600b      	str	r3, [r1, #0]
-    ebbc:	2a00      	cmp	r2, #0
-    ebbe:	d102      	bne.n	ebc6 <_dtoa_r+0xa6>
-    ebc0:	48ba      	ldr	r0, [pc, #744]	(eeac <.text+0xeeac>)
-    ebc2:	f000 fda7 	bl	f714 <.text+0xf714>
-    ebc6:	4bba      	ldr	r3, [pc, #744]	(eeb0 <.text+0xeeb0>)
-    ebc8:	9c2c      	ldr	r4, [sp, #176]
-    ebca:	1e58      	subs	r0, r3, #1
-    ebcc:	6023      	str	r3, [r4, #0]
-    ebce:	f000 fda1 	bl	f714 <.text+0xf714>
-    ebd2:	ab22      	add	r3, sp, #136
-    ebd4:	9300      	str	r3, [sp, #0]
-    ebd6:	9802      	ldr	r0, [sp, #8]
-    ebd8:	ab23      	add	r3, sp, #140
-    ebda:	9905      	ldr	r1, [sp, #20]
-    ebdc:	9a06      	ldr	r2, [sp, #24]
-    ebde:	f001 fe1f 	bl	10820 <_d2b>
-    ebe2:	0073      	lsls	r3, r6, #1
-    ebe4:	0d5c      	lsrs	r4, r3, #21
-    ebe6:	9014      	str	r0, [sp, #80]
-    ebe8:	2c00      	cmp	r4, #0
-    ebea:	d00b      	beq.n	ec04 <_dtoa_r+0xe4>
-    ebec:	9805      	ldr	r0, [sp, #20]
-    ebee:	9906      	ldr	r1, [sp, #24]
-    ebf0:	4ba9      	ldr	r3, [pc, #676]	(ee98 <.text+0xee98>)
-    ebf2:	4ab0      	ldr	r2, [pc, #704]	(eeb4 <.text+0xeeb4>)
-    ebf4:	4003      	ands	r3, r0
-    ebf6:	1c18      	adds	r0, r3, #0
-    ebf8:	4310      	orrs	r0, r2
-    ebfa:	4aaf      	ldr	r2, [pc, #700]	(eeb8 <.text+0xeeb8>)
-    ebfc:	2300      	movs	r3, #0
-    ebfe:	18a6      	adds	r6, r4, r2
-    ec00:	9313      	str	r3, [sp, #76]
-    ec02:	e023      	b.n	ec4c <_dtoa_r+0x12c>
-    ec04:	9b22      	ldr	r3, [sp, #136]
-    ec06:	4cad      	ldr	r4, [pc, #692]	(eebc <.text+0xeebc>)
-    ec08:	9a23      	ldr	r2, [sp, #140]
-    ec0a:	191b      	adds	r3, r3, r4
-    ec0c:	189d      	adds	r5, r3, r2
-    ec0e:	2d20      	cmp	r5, #32
-    ec10:	dd09      	ble.n	ec26 <_dtoa_r+0x106>
-    ec12:	2240      	movs	r2, #64
-    ec14:	1b52      	subs	r2, r2, r5
-    ec16:	1c2b      	adds	r3, r5, #0
-    ec18:	9804      	ldr	r0, [sp, #16]
-    ec1a:	4096      	lsls	r6, r2
-    ec1c:	3b20      	subs	r3, #32
-    ec1e:	40d8      	lsrs	r0, r3
-    ec20:	1c34      	adds	r4, r6, #0
-    ec22:	4304      	orrs	r4, r0
-    ec24:	e003      	b.n	ec2e <_dtoa_r+0x10e>
-    ec26:	2320      	movs	r3, #32
-    ec28:	9c04      	ldr	r4, [sp, #16]
-    ec2a:	1b5b      	subs	r3, r3, r5
-    ec2c:	409c      	lsls	r4, r3
-    ec2e:	1c20      	adds	r0, r4, #0
-    ec30:	f006 fab4 	bl	1519c <____floatsidf_from_thumb>
-    ec34:	2c00      	cmp	r4, #0
-    ec36:	da03      	bge.n	ec40 <_dtoa_r+0x120>
-    ec38:	4aa1      	ldr	r2, [pc, #644]	(eec0 <.text+0xeec0>)
-    ec3a:	4ba2      	ldr	r3, [pc, #648]	(eec4 <.text+0xeec4>)
-    ec3c:	f006 fab2 	bl	151a4 <____adddf3_from_thumb>
-    ec40:	4aa1      	ldr	r2, [pc, #644]	(eec8 <.text+0xeec8>)
-    ec42:	4ba2      	ldr	r3, [pc, #648]	(eecc <.text+0xeecc>)
-    ec44:	2401      	movs	r4, #1
-    ec46:	9413      	str	r4, [sp, #76]
-    ec48:	1880      	adds	r0, r0, r2
-    ec4a:	18ee      	adds	r6, r5, r3
-    ec4c:	4aa0      	ldr	r2, [pc, #640]	(eed0 <.text+0xeed0>)
-    ec4e:	4ba1      	ldr	r3, [pc, #644]	(eed4 <.text+0xeed4>)
-    ec50:	f006 faac 	bl	151ac <____subdf3_from_thumb>
-    ec54:	4aa0      	ldr	r2, [pc, #640]	(eed8 <.text+0xeed8>)
-    ec56:	4ba1      	ldr	r3, [pc, #644]	(eedc <.text+0xeedc>)
-    ec58:	f006 faac 	bl	151b4 <____muldf3_from_thumb>
-    ec5c:	4aa0      	ldr	r2, [pc, #640]	(eee0 <.text+0xeee0>)
-    ec5e:	4ba1      	ldr	r3, [pc, #644]	(eee4 <.text+0xeee4>)
-    ec60:	f006 faa0 	bl	151a4 <____adddf3_from_thumb>
-    ec64:	1c04      	adds	r4, r0, #0
-    ec66:	1c30      	adds	r0, r6, #0
-    ec68:	1c0d      	adds	r5, r1, #0
-    ec6a:	f006 fa97 	bl	1519c <____floatsidf_from_thumb>
-    ec6e:	4a9e      	ldr	r2, [pc, #632]	(eee8 <.text+0xeee8>)
-    ec70:	4b9e      	ldr	r3, [pc, #632]	(eeec <.text+0xeeec>)
-    ec72:	f006 fa9f 	bl	151b4 <____muldf3_from_thumb>
-    ec76:	1c02      	adds	r2, r0, #0
-    ec78:	1c0b      	adds	r3, r1, #0
-    ec7a:	1c20      	adds	r0, r4, #0
-    ec7c:	1c29      	adds	r1, r5, #0
-    ec7e:	f006 fa91 	bl	151a4 <____adddf3_from_thumb>
-    ec82:	1c04      	adds	r4, r0, #0
-    ec84:	1c0d      	adds	r5, r1, #0
-    ec86:	f006 fa99 	bl	151bc <____fixdfsi_from_thumb>
-    ec8a:	1c29      	adds	r1, r5, #0
-    ec8c:	900e      	str	r0, [sp, #56]
-    ec8e:	4a85      	ldr	r2, [pc, #532]	(eea4 <.text+0xeea4>)
-    ec90:	4b85      	ldr	r3, [pc, #532]	(eea8 <.text+0xeea8>)
-    ec92:	1c20      	adds	r0, r4, #0
-    ec94:	f006 fa76 	bl	15184 <____ltdf2_from_thumb>
-    ec98:	2800      	cmp	r0, #0
-    ec9a:	da0d      	bge.n	ecb8 <_dtoa_r+0x198>
-    ec9c:	980e      	ldr	r0, [sp, #56]
-    ec9e:	f006 fa7d 	bl	1519c <____floatsidf_from_thumb>
-    eca2:	1c02      	adds	r2, r0, #0
-    eca4:	1c0b      	adds	r3, r1, #0
-    eca6:	1c20      	adds	r0, r4, #0
-    eca8:	1c29      	adds	r1, r5, #0
-    ecaa:	f006 fa6f 	bl	1518c <____nedf2_from_thumb>
-    ecae:	2800      	cmp	r0, #0
-    ecb0:	d002      	beq.n	ecb8 <_dtoa_r+0x198>
-    ecb2:	980e      	ldr	r0, [sp, #56]
-    ecb4:	3801      	subs	r0, #1
-    ecb6:	900e      	str	r0, [sp, #56]
-    ecb8:	990e      	ldr	r1, [sp, #56]
-    ecba:	2916      	cmp	r1, #22
-    ecbc:	d901      	bls.n	ecc2 <_dtoa_r+0x1a2>
-    ecbe:	2201      	movs	r2, #1
-    ecc0:	e012      	b.n	ece8 <_dtoa_r+0x1c8>
-    ecc2:	9c0e      	ldr	r4, [sp, #56]
-    ecc4:	4b8a      	ldr	r3, [pc, #552]	(eef0 <.text+0xeef0>)
-    ecc6:	00e2      	lsls	r2, r4, #3
-    ecc8:	18d2      	adds	r2, r2, r3
-    ecca:	9805      	ldr	r0, [sp, #20]
-    eccc:	9906      	ldr	r1, [sp, #24]
-    ecce:	6853      	ldr	r3, [r2, #4]
-    ecd0:	6812      	ldr	r2, [r2, #0]
-    ecd2:	f006 fa57 	bl	15184 <____ltdf2_from_thumb>
-    ecd6:	2800      	cmp	r0, #0
-    ecd8:	db02      	blt.n	ece0 <_dtoa_r+0x1c0>
-    ecda:	2000      	movs	r0, #0
-    ecdc:	900f      	str	r0, [sp, #60]
-    ecde:	e004      	b.n	ecea <_dtoa_r+0x1ca>
-    ece0:	990e      	ldr	r1, [sp, #56]
-    ece2:	3901      	subs	r1, #1
-    ece4:	910e      	str	r1, [sp, #56]
-    ece6:	2200      	movs	r2, #0
-    ece8:	920f      	str	r2, [sp, #60]
-    ecea:	9b22      	ldr	r3, [sp, #136]
-    ecec:	1b9b      	subs	r3, r3, r6
-    ecee:	1e5a      	subs	r2, r3, #1
-    ecf0:	d403      	bmi.n	ecfa <_dtoa_r+0x1da>
-    ecf2:	2300      	movs	r3, #0
-    ecf4:	9211      	str	r2, [sp, #68]
-    ecf6:	9309      	str	r3, [sp, #36]
-    ecf8:	e003      	b.n	ed02 <_dtoa_r+0x1e2>
-    ecfa:	4252      	negs	r2, r2
-    ecfc:	2400      	movs	r4, #0
-    ecfe:	9209      	str	r2, [sp, #36]
-    ed00:	9411      	str	r4, [sp, #68]
-    ed02:	980e      	ldr	r0, [sp, #56]
-    ed04:	2800      	cmp	r0, #0
-    ed06:	db06      	blt.n	ed16 <_dtoa_r+0x1f6>
-    ed08:	9911      	ldr	r1, [sp, #68]
-    ed0a:	2200      	movs	r2, #0
-    ed0c:	1809      	adds	r1, r1, r0
-    ed0e:	9111      	str	r1, [sp, #68]
-    ed10:	9012      	str	r0, [sp, #72]
-    ed12:	920a      	str	r2, [sp, #40]
-    ed14:	e007      	b.n	ed26 <_dtoa_r+0x206>
-    ed16:	9b09      	ldr	r3, [sp, #36]
-    ed18:	9c0e      	ldr	r4, [sp, #56]
-    ed1a:	2100      	movs	r1, #0
-    ed1c:	1b1b      	subs	r3, r3, r4
-    ed1e:	4260      	negs	r0, r4
-    ed20:	9309      	str	r3, [sp, #36]
-    ed22:	900a      	str	r0, [sp, #40]
-    ed24:	9112      	str	r1, [sp, #72]
-    ed26:	9a01      	ldr	r2, [sp, #4]
-    ed28:	2a09      	cmp	r2, #9
-    ed2a:	d81b      	bhi.n	ed64 <_dtoa_r+0x244>
-    ed2c:	2a05      	cmp	r2, #5
-    ed2e:	dc01      	bgt.n	ed34 <_dtoa_r+0x214>
-    ed30:	2401      	movs	r4, #1
-    ed32:	e003      	b.n	ed3c <_dtoa_r+0x21c>
-    ed34:	9b01      	ldr	r3, [sp, #4]
-    ed36:	3b04      	subs	r3, #4
-    ed38:	9301      	str	r3, [sp, #4]
-    ed3a:	2400      	movs	r4, #0
-    ed3c:	9801      	ldr	r0, [sp, #4]
-    ed3e:	2805      	cmp	r0, #5
-    ed40:	d803      	bhi.n	ed4a <_dtoa_r+0x22a>
-    ed42:	4a6c      	ldr	r2, [pc, #432]	(eef4 <.text+0xeef4>)
-    ed44:	0083      	lsls	r3, r0, #2
-    ed46:	589b      	ldr	r3, [r3, r2]
-    ed48:	469f      	mov	pc, r3
-    ed4a:	2101      	movs	r1, #1
-    ed4c:	4249      	negs	r1, r1
-    ed4e:	2201      	movs	r2, #1
-    ed50:	910c      	str	r1, [sp, #48]
-    ed52:	910d      	str	r1, [sp, #52]
-    ed54:	9210      	str	r2, [sp, #64]
-    ed56:	e02f      	b.n	edb8 <_dtoa_r+0x298>
-    ed58:	2301      	movs	r3, #1
-    ed5a:	9310      	str	r3, [sp, #64]
-    ed5c:	e020      	b.n	eda0 <_dtoa_r+0x280>
-    ed5e:	2001      	movs	r0, #1
-    ed60:	9010      	str	r0, [sp, #64]
-    ed62:	e00e      	b.n	ed82 <_dtoa_r+0x262>
-    ed64:	2100      	movs	r1, #0
-    ed66:	9101      	str	r1, [sp, #4]
-    ed68:	2401      	movs	r4, #1
-    ed6a:	2301      	movs	r3, #1
-    ed6c:	425b      	negs	r3, r3
-    ed6e:	2200      	movs	r2, #0
-    ed70:	2001      	movs	r0, #1
-    ed72:	2612      	movs	r6, #18
-    ed74:	9229      	str	r2, [sp, #164]
-    ed76:	930c      	str	r3, [sp, #48]
-    ed78:	930d      	str	r3, [sp, #52]
-    ed7a:	9010      	str	r0, [sp, #64]
-    ed7c:	e01c      	b.n	edb8 <_dtoa_r+0x298>
-    ed7e:	2100      	movs	r1, #0
-    ed80:	9110      	str	r1, [sp, #64]
-    ed82:	9a29      	ldr	r2, [sp, #164]
-    ed84:	2a00      	cmp	r2, #0
-    ed86:	dd03      	ble.n	ed90 <_dtoa_r+0x270>
-    ed88:	1c16      	adds	r6, r2, #0
-    ed8a:	920c      	str	r2, [sp, #48]
-    ed8c:	920d      	str	r2, [sp, #52]
-    ed8e:	e013      	b.n	edb8 <_dtoa_r+0x298>
-    ed90:	2601      	movs	r6, #1
-    ed92:	2301      	movs	r3, #1
-    ed94:	9329      	str	r3, [sp, #164]
-    ed96:	960c      	str	r6, [sp, #48]
-    ed98:	960d      	str	r6, [sp, #52]
-    ed9a:	e00d      	b.n	edb8 <_dtoa_r+0x298>
-    ed9c:	2000      	movs	r0, #0
-    ed9e:	9010      	str	r0, [sp, #64]
-    eda0:	9b29      	ldr	r3, [sp, #164]
-    eda2:	990e      	ldr	r1, [sp, #56]
-    eda4:	3301      	adds	r3, #1
-    eda6:	18ce      	adds	r6, r1, r3
-    eda8:	1e72      	subs	r2, r6, #1
-    edaa:	920d      	str	r2, [sp, #52]
-    edac:	2e00      	cmp	r6, #0
-    edae:	dc02      	bgt.n	edb6 <_dtoa_r+0x296>
-    edb0:	960c      	str	r6, [sp, #48]
-    edb2:	2601      	movs	r6, #1
-    edb4:	e000      	b.n	edb8 <_dtoa_r+0x298>
-    edb6:	960c      	str	r6, [sp, #48]
-    edb8:	9802      	ldr	r0, [sp, #8]
-    edba:	2300      	movs	r3, #0
-    edbc:	2204      	movs	r2, #4
-    edbe:	6443      	str	r3, [r0, #68]
-    edc0:	e003      	b.n	edca <_dtoa_r+0x2aa>
-    edc2:	1c4b      	adds	r3, r1, #1
-    edc4:	9902      	ldr	r1, [sp, #8]
-    edc6:	644b      	str	r3, [r1, #68]
-    edc8:	0052      	lsls	r2, r2, #1
-    edca:	1c13      	adds	r3, r2, #0
-    edcc:	9802      	ldr	r0, [sp, #8]
-    edce:	3314      	adds	r3, #20
-    edd0:	6c41      	ldr	r1, [r0, #68]
-    edd2:	42b3      	cmp	r3, r6
-    edd4:	d9f5      	bls.n	edc2 <_dtoa_r+0x2a2>
-    edd6:	f001 fcf5 	bl	107c4 <_Balloc>
-    edda:	9902      	ldr	r1, [sp, #8]
-    eddc:	9a0c      	ldr	r2, [sp, #48]
-    edde:	901a      	str	r0, [sp, #104]
-    ede0:	6408      	str	r0, [r1, #64]
-    ede2:	2a0e      	cmp	r2, #14
-    ede4:	d900      	bls.n	ede8 <_dtoa_r+0x2c8>
-    ede6:	e1a5      	b.n	f134 <.text+0xf134>
-    ede8:	2c00      	cmp	r4, #0
-    edea:	d100      	bne.n	edee <_dtoa_r+0x2ce>
-    edec:	e1a2      	b.n	f134 <.text+0xf134>
-    edee:	9b0e      	ldr	r3, [sp, #56]
-    edf0:	2b00      	cmp	r3, #0
-    edf2:	dd33      	ble.n	ee5c <_dtoa_r+0x33c>
-    edf4:	210f      	movs	r1, #15
-    edf6:	4a3e      	ldr	r2, [pc, #248]	(eef0 <.text+0xeef0>)
-    edf8:	400b      	ands	r3, r1
-    edfa:	980e      	ldr	r0, [sp, #56]
-    edfc:	00db      	lsls	r3, r3, #3
-    edfe:	189b      	adds	r3, r3, r2
-    ee00:	1104      	asrs	r4, r0, #4
-    ee02:	681e      	ldr	r6, [r3, #0]
-    ee04:	685f      	ldr	r7, [r3, #4]
-    ee06:	06e2      	lsls	r2, r4, #27
-    ee08:	d402      	bmi.n	ee10 <_dtoa_r+0x2f0>
-    ee0a:	2302      	movs	r3, #2
-    ee0c:	930b      	str	r3, [sp, #44]
-    ee0e:	e00b      	b.n	ee28 <_dtoa_r+0x308>
-    ee10:	4b39      	ldr	r3, [pc, #228]	(eef8 <.text+0xeef8>)
-    ee12:	400c      	ands	r4, r1
-    ee14:	6a1a      	ldr	r2, [r3, #32]
-    ee16:	6a5b      	ldr	r3, [r3, #36]
-    ee18:	9805      	ldr	r0, [sp, #20]
-    ee1a:	9906      	ldr	r1, [sp, #24]
-    ee1c:	f006 f9d2 	bl	151c4 <____divdf3_from_thumb>
-    ee20:	9003      	str	r0, [sp, #12]
-    ee22:	9104      	str	r1, [sp, #16]
-    ee24:	2003      	movs	r0, #3
-    ee26:	900b      	str	r0, [sp, #44]
-    ee28:	4d33      	ldr	r5, [pc, #204]	(eef8 <.text+0xeef8>)
-    ee2a:	e00e      	b.n	ee4a <_dtoa_r+0x32a>
-    ee2c:	07e1      	lsls	r1, r4, #31
-    ee2e:	d50a      	bpl.n	ee46 <_dtoa_r+0x326>
-    ee30:	9a0b      	ldr	r2, [sp, #44]
-    ee32:	3201      	adds	r2, #1
-    ee34:	920b      	str	r2, [sp, #44]
-    ee36:	1c30      	adds	r0, r6, #0
-    ee38:	1c39      	adds	r1, r7, #0
-    ee3a:	682a      	ldr	r2, [r5, #0]
-    ee3c:	686b      	ldr	r3, [r5, #4]
-    ee3e:	f006 f9b9 	bl	151b4 <____muldf3_from_thumb>
-    ee42:	1c06      	adds	r6, r0, #0
-    ee44:	1c0f      	adds	r7, r1, #0
-    ee46:	1064      	asrs	r4, r4, #1
-    ee48:	3508      	adds	r5, #8
-    ee4a:	2c00      	cmp	r4, #0
-    ee4c:	d1ee      	bne.n	ee2c <_dtoa_r+0x30c>
-    ee4e:	9803      	ldr	r0, [sp, #12]
-    ee50:	9904      	ldr	r1, [sp, #16]
-    ee52:	1c32      	adds	r2, r6, #0
-    ee54:	1c3b      	adds	r3, r7, #0
-    ee56:	f006 f9b5 	bl	151c4 <____divdf3_from_thumb>
-    ee5a:	e05c      	b.n	ef16 <.text+0xef16>
-    ee5c:	9b0e      	ldr	r3, [sp, #56]
-    ee5e:	425c      	negs	r4, r3
-    ee60:	2c00      	cmp	r4, #0
-    ee62:	d102      	bne.n	ee6a <_dtoa_r+0x34a>
-    ee64:	2402      	movs	r4, #2
-    ee66:	940b      	str	r4, [sp, #44]
-    ee68:	e057      	b.n	ef1a <.text+0xef1a>
-    ee6a:	230f      	movs	r3, #15
-    ee6c:	4a20      	ldr	r2, [pc, #128]	(eef0 <.text+0xeef0>)
-    ee6e:	4023      	ands	r3, r4
-    ee70:	00db      	lsls	r3, r3, #3
-    ee72:	189b      	adds	r3, r3, r2
-    ee74:	681a      	ldr	r2, [r3, #0]
-    ee76:	685b      	ldr	r3, [r3, #4]
-    ee78:	9805      	ldr	r0, [sp, #20]
-    ee7a:	9906      	ldr	r1, [sp, #24]
-    ee7c:	f006 f99a 	bl	151b4 <____muldf3_from_thumb>
-    ee80:	4d1d      	ldr	r5, [pc, #116]	(eef8 <.text+0xeef8>)
-    ee82:	2202      	movs	r2, #2
-    ee84:	1124      	asrs	r4, r4, #4
-    ee86:	920b      	str	r2, [sp, #44]
-    ee88:	e043      	b.n	ef12 <.text+0xef12>
-    ee8a:	0000      	lsls	r0, r0, #0
-    ee8c:	ffff 7fff 	undefined
-    ee90:	0000      	lsls	r0, r0, #0
-    ee92:	7ff0      	ldrb	r0, [r6, #31]
-    ee94:	270f      	movs	r7, #15
-    ee96:	0000      	lsls	r0, r0, #0
-    ee98:	ffff 000f 	vaddl.u<illegal width 64>	q8, d15, d15
-    ee9c:	5a24      	ldrh	r4, [r4, r0]
-    ee9e:	0001      	lsls	r1, r0, #0
-    eea0:	5a30      	ldrh	r0, [r6, r0]
-    eea2:	0001      	lsls	r1, r0, #0
-	...
-    eeac:	59f4      	ldr	r4, [r6, r7]
-    eeae:	0001      	lsls	r1, r0, #0
-    eeb0:	59f5      	ldr	r5, [r6, r7]
-    eeb2:	0001      	lsls	r1, r0, #0
-    eeb4:	0000      	lsls	r0, r0, #0
-    eeb6:	3ff0      	subs	r7, #240
-    eeb8:	fc01 ffff 	stc2	15, cr15, [r1], {255}
-    eebc:	0432      	lsls	r2, r6, #16
-    eebe:	0000      	lsls	r0, r0, #0
-    eec0:	0000      	lsls	r0, r0, #0
-    eec2:	41f0      	rors	r0, r6
-    eec4:	0000      	lsls	r0, r0, #0
-    eec6:	0000      	lsls	r0, r0, #0
-    eec8:	0000      	lsls	r0, r0, #0
-    eeca:	fe10 fbcd 	cdp2	11, 1, cr15, cr0, cr13, {6}
-    eece:	ffff 0000 	vaddl.u<illegal width 64>	q8, d15, d0
-    eed2:	3ff8      	subs	r7, #248
-    eed4:	0000      	lsls	r0, r0, #0
-    eed6:	0000      	lsls	r0, r0, #0
-    eed8:	87a7      	strh	r7, [r4, #60]
-    eeda:	3fd2      	subs	r7, #210
-    eedc:	4361      	muls	r1, r4
-    eede:	636f      	str	r7, [r5, #52]
-    eee0:	8a28      	ldrh	r0, [r5, #16]
-    eee2:	3fc6      	subs	r7, #198
-    eee4:	c8b3      	ldmia	r0!, {r0, r1, r4, r5, r7}
-    eee6:	8b60      	ldrh	r0, [r4, #26]
-    eee8:	4413      	add	r3, r2
-    eeea:	3fd3      	subs	r7, #211
-    eeec:	79fb      	ldrb	r3, [r7, #7]
-    eeee:	509f      	str	r7, [r3, r2]
-    eef0:	555c      	strb	r4, [r3, r5]
-    eef2:	0001      	lsls	r1, r0, #0
-    eef4:	550c      	strb	r4, [r1, r4]
-    eef6:	0001      	lsls	r1, r0, #0
-    eef8:	5624      	ldrsb	r4, [r4, r0]
-    eefa:	0001      	lsls	r1, r0, #0
-    eefc:	07e3      	lsls	r3, r4, #31
-    eefe:	d506      	bpl.n	ef0e <.text+0xef0e>
-    ef00:	9a0b      	ldr	r2, [sp, #44]
-    ef02:	3201      	adds	r2, #1
-    ef04:	920b      	str	r2, [sp, #44]
-    ef06:	682a      	ldr	r2, [r5, #0]
-    ef08:	686b      	ldr	r3, [r5, #4]
-    ef0a:	f006 f953 	bl	151b4 <____muldf3_from_thumb>
-    ef0e:	1064      	asrs	r4, r4, #1
-    ef10:	3508      	adds	r5, #8
-    ef12:	2c00      	cmp	r4, #0
-    ef14:	d1f2      	bne.n	eefc <.text+0xeefc>
-    ef16:	9003      	str	r0, [sp, #12]
-    ef18:	9104      	str	r1, [sp, #16]
-    ef1a:	9b0f      	ldr	r3, [sp, #60]
-    ef1c:	2b00      	cmp	r3, #0
-    ef1e:	d02f      	beq.n	ef80 <.text+0xef80>
-    ef20:	9c03      	ldr	r4, [sp, #12]
-    ef22:	9d04      	ldr	r5, [sp, #16]
-    ef24:	4bce      	ldr	r3, [pc, #824]	(f260 <.text+0xf260>)
-    ef26:	4acd      	ldr	r2, [pc, #820]	(f25c <.text+0xf25c>)
-    ef28:	1c20      	adds	r0, r4, #0
-    ef2a:	1c29      	adds	r1, r5, #0
-    ef2c:	f006 f92a 	bl	15184 <____ltdf2_from_thumb>
-    ef30:	2800      	cmp	r0, #0
-    ef32:	da25      	bge.n	ef80 <.text+0xef80>
-    ef34:	980c      	ldr	r0, [sp, #48]
-    ef36:	2800      	cmp	r0, #0
-    ef38:	dd22      	ble.n	ef80 <.text+0xef80>
-    ef3a:	990d      	ldr	r1, [sp, #52]
-    ef3c:	2900      	cmp	r1, #0
-    ef3e:	dc00      	bgt.n	ef42 <.text+0xef42>
-    ef40:	e0f4      	b.n	f12c <.text+0xf12c>
-    ef42:	9a0e      	ldr	r2, [sp, #56]
-    ef44:	3a01      	subs	r2, #1
-    ef46:	9220      	str	r2, [sp, #128]
-    ef48:	1c20      	adds	r0, r4, #0
-    ef4a:	4ac6      	ldr	r2, [pc, #792]	(f264 <.text+0xf264>)
-    ef4c:	4bc6      	ldr	r3, [pc, #792]	(f268 <.text+0xf268>)
-    ef4e:	1c29      	adds	r1, r5, #0
-    ef50:	f006 f930 	bl	151b4 <____muldf3_from_thumb>
-    ef54:	1c04      	adds	r4, r0, #0
-    ef56:	980b      	ldr	r0, [sp, #44]
-    ef58:	1c0d      	adds	r5, r1, #0
-    ef5a:	3001      	adds	r0, #1
-    ef5c:	9403      	str	r4, [sp, #12]
-    ef5e:	9504      	str	r5, [sp, #16]
-    ef60:	f006 f91c 	bl	1519c <____floatsidf_from_thumb>
-    ef64:	1c22      	adds	r2, r4, #0
-    ef66:	1c2b      	adds	r3, r5, #0
-    ef68:	f006 f924 	bl	151b4 <____muldf3_from_thumb>
-    ef6c:	4abf      	ldr	r2, [pc, #764]	(f26c <.text+0xf26c>)
-    ef6e:	4bc0      	ldr	r3, [pc, #768]	(f270 <.text+0xf270>)
-    ef70:	f006 f918 	bl	151a4 <____adddf3_from_thumb>
-    ef74:	4bbf      	ldr	r3, [pc, #764]	(f274 <.text+0xf274>)
-    ef76:	18c4      	adds	r4, r0, r3
-    ef78:	980d      	ldr	r0, [sp, #52]
-    ef7a:	1c0d      	adds	r5, r1, #0
-    ef7c:	9021      	str	r0, [sp, #132]
-    ef7e:	e032      	b.n	efe6 <.text+0xefe6>
-    ef80:	9e03      	ldr	r6, [sp, #12]
-    ef82:	9f04      	ldr	r7, [sp, #16]
-    ef84:	980b      	ldr	r0, [sp, #44]
-    ef86:	f006 f909 	bl	1519c <____floatsidf_from_thumb>
-    ef8a:	1c32      	adds	r2, r6, #0
-    ef8c:	1c3b      	adds	r3, r7, #0
-    ef8e:	f006 f911 	bl	151b4 <____muldf3_from_thumb>
-    ef92:	4ab6      	ldr	r2, [pc, #728]	(f26c <.text+0xf26c>)
-    ef94:	4bb6      	ldr	r3, [pc, #728]	(f270 <.text+0xf270>)
-    ef96:	f006 f905 	bl	151a4 <____adddf3_from_thumb>
-    ef9a:	9a0c      	ldr	r2, [sp, #48]
-    ef9c:	1c0d      	adds	r5, r1, #0
-    ef9e:	49b5      	ldr	r1, [pc, #724]	(f274 <.text+0xf274>)
-    efa0:	1c04      	adds	r4, r0, #0
-    efa2:	1864      	adds	r4, r4, r1
-    efa4:	2a00      	cmp	r2, #0
-    efa6:	d11a      	bne.n	efde <.text+0xefde>
-    efa8:	4ab3      	ldr	r2, [pc, #716]	(f278 <.text+0xf278>)
-    efaa:	4bb4      	ldr	r3, [pc, #720]	(f27c <.text+0xf27c>)
-    efac:	1c30      	adds	r0, r6, #0
-    efae:	1c39      	adds	r1, r7, #0
-    efb0:	f006 f8fc 	bl	151ac <____subdf3_from_thumb>
-    efb4:	1c22      	adds	r2, r4, #0
-    efb6:	1c2b      	adds	r3, r5, #0
-    efb8:	1c06      	adds	r6, r0, #0
-    efba:	1c0f      	adds	r7, r1, #0
-    efbc:	f006 f906 	bl	151cc <____gtdf2_from_thumb>
-    efc0:	2800      	cmp	r0, #0
-    efc2:	dd00      	ble.n	efc6 <.text+0xefc6>
-    efc4:	e26f      	b.n	f4a6 <.text+0xf4a6>
-    efc6:	2080      	movs	r0, #128
-    efc8:	0600      	lsls	r0, r0, #24
-    efca:	1822      	adds	r2, r4, r0
-    efcc:	1c2b      	adds	r3, r5, #0
-    efce:	1c30      	adds	r0, r6, #0
-    efd0:	1c39      	adds	r1, r7, #0
-    efd2:	f006 f8d7 	bl	15184 <____ltdf2_from_thumb>
-    efd6:	2800      	cmp	r0, #0
-    efd8:	da00      	bge.n	efdc <.text+0xefdc>
-    efda:	e25a      	b.n	f492 <.text+0xf492>
-    efdc:	e0a6      	b.n	f12c <.text+0xf12c>
-    efde:	990c      	ldr	r1, [sp, #48]
-    efe0:	9a0e      	ldr	r2, [sp, #56]
-    efe2:	9121      	str	r1, [sp, #132]
-    efe4:	9220      	str	r2, [sp, #128]
-    efe6:	9821      	ldr	r0, [sp, #132]
-    efe8:	9910      	ldr	r1, [sp, #64]
-    efea:	4aa5      	ldr	r2, [pc, #660]	(f280 <.text+0xf280>)
-    efec:	00c3      	lsls	r3, r0, #3
-    efee:	2900      	cmp	r1, #0
-    eff0:	d04c      	beq.n	f08c <.text+0xf08c>
-    eff2:	189b      	adds	r3, r3, r2
-    eff4:	3b08      	subs	r3, #8
-    eff6:	681a      	ldr	r2, [r3, #0]
-    eff8:	685b      	ldr	r3, [r3, #4]
-    effa:	48a2      	ldr	r0, [pc, #648]	(f284 <.text+0xf284>)
-    effc:	49a2      	ldr	r1, [pc, #648]	(f288 <.text+0xf288>)
-    effe:	f006 f8e1 	bl	151c4 <____divdf3_from_thumb>
-    f002:	1c2b      	adds	r3, r5, #0
-    f004:	1c22      	adds	r2, r4, #0
-    f006:	f006 f8d1 	bl	151ac <____subdf3_from_thumb>
-    f00a:	9018      	str	r0, [sp, #96]
-    f00c:	9119      	str	r1, [sp, #100]
-    f00e:	9d03      	ldr	r5, [sp, #12]
-    f010:	9e04      	ldr	r6, [sp, #16]
-    f012:	9f1a      	ldr	r7, [sp, #104]
-    f014:	1c31      	adds	r1, r6, #0
-    f016:	1c28      	adds	r0, r5, #0
-    f018:	f006 f8d0 	bl	151bc <____fixdfsi_from_thumb>
-    f01c:	1c04      	adds	r4, r0, #0
-    f01e:	f006 f8bd 	bl	1519c <____floatsidf_from_thumb>
-    f022:	1c02      	adds	r2, r0, #0
-    f024:	1c0b      	adds	r3, r1, #0
-    f026:	1c28      	adds	r0, r5, #0
-    f028:	1c31      	adds	r1, r6, #0
-    f02a:	f006 f8bf 	bl	151ac <____subdf3_from_thumb>
-    f02e:	3430      	adds	r4, #48
-    f030:	703c      	strb	r4, [r7, #0]
-    f032:	9a18      	ldr	r2, [sp, #96]
-    f034:	9b19      	ldr	r3, [sp, #100]
-    f036:	1c05      	adds	r5, r0, #0
-    f038:	1c0e      	adds	r6, r1, #0
-    f03a:	3701      	adds	r7, #1
-    f03c:	f006 f8a2 	bl	15184 <____ltdf2_from_thumb>
-    f040:	2800      	cmp	r0, #0
-    f042:	da00      	bge.n	f046 <.text+0xf046>
-    f044:	e334      	b.n	f6b0 <.text+0xf6b0>
-    f046:	1c2a      	adds	r2, r5, #0
-    f048:	1c33      	adds	r3, r6, #0
-    f04a:	4985      	ldr	r1, [pc, #532]	(f260 <.text+0xf260>)
-    f04c:	4883      	ldr	r0, [pc, #524]	(f25c <.text+0xf25c>)
-    f04e:	f006 f8ad 	bl	151ac <____subdf3_from_thumb>
-    f052:	9a18      	ldr	r2, [sp, #96]
-    f054:	9b19      	ldr	r3, [sp, #100]
-    f056:	f006 f895 	bl	15184 <____ltdf2_from_thumb>
-    f05a:	2800      	cmp	r0, #0
-    f05c:	da00      	bge.n	f060 <.text+0xf060>
-    f05e:	e0da      	b.n	f216 <.text+0xf216>
-    f060:	9a1a      	ldr	r2, [sp, #104]
-    f062:	9c21      	ldr	r4, [sp, #132]
-    f064:	1abb      	subs	r3, r7, r2
-    f066:	42a3      	cmp	r3, r4
-    f068:	da60      	bge.n	f12c <.text+0xf12c>
-    f06a:	9818      	ldr	r0, [sp, #96]
-    f06c:	9919      	ldr	r1, [sp, #100]
-    f06e:	4a7d      	ldr	r2, [pc, #500]	(f264 <.text+0xf264>)
-    f070:	4b7d      	ldr	r3, [pc, #500]	(f268 <.text+0xf268>)
-    f072:	f006 f89f 	bl	151b4 <____muldf3_from_thumb>
-    f076:	4a7b      	ldr	r2, [pc, #492]	(f264 <.text+0xf264>)
-    f078:	4b7b      	ldr	r3, [pc, #492]	(f268 <.text+0xf268>)
-    f07a:	9018      	str	r0, [sp, #96]
-    f07c:	9119      	str	r1, [sp, #100]
-    f07e:	1c28      	adds	r0, r5, #0
-    f080:	1c31      	adds	r1, r6, #0
-    f082:	f006 f897 	bl	151b4 <____muldf3_from_thumb>
-    f086:	1c05      	adds	r5, r0, #0
-    f088:	1c0e      	adds	r6, r1, #0
-    f08a:	e7c3      	b.n	f014 <.text+0xf014>
-    f08c:	189b      	adds	r3, r3, r2
-    f08e:	3b08      	subs	r3, #8
-    f090:	1c29      	adds	r1, r5, #0
-    f092:	1c20      	adds	r0, r4, #0
-    f094:	681a      	ldr	r2, [r3, #0]
-    f096:	685b      	ldr	r3, [r3, #4]
-    f098:	f006 f88c 	bl	151b4 <____muldf3_from_thumb>
-    f09c:	901b      	str	r0, [sp, #108]
-    f09e:	911c      	str	r1, [sp, #112]
-    f0a0:	9d03      	ldr	r5, [sp, #12]
-    f0a2:	9e04      	ldr	r6, [sp, #16]
-    f0a4:	2700      	movs	r7, #0
-    f0a6:	1c31      	adds	r1, r6, #0
-    f0a8:	1c28      	adds	r0, r5, #0
-    f0aa:	f006 f887 	bl	151bc <____fixdfsi_from_thumb>
-    f0ae:	1c04      	adds	r4, r0, #0
-    f0b0:	f006 f874 	bl	1519c <____floatsidf_from_thumb>
-    f0b4:	1c02      	adds	r2, r0, #0
-    f0b6:	1c0b      	adds	r3, r1, #0
-    f0b8:	1c28      	adds	r0, r5, #0
-    f0ba:	1c31      	adds	r1, r6, #0
-    f0bc:	f006 f876 	bl	151ac <____subdf3_from_thumb>
-    f0c0:	1c05      	adds	r5, r0, #0
-    f0c2:	981a      	ldr	r0, [sp, #104]
-    f0c4:	3430      	adds	r4, #48
-    f0c6:	543c      	strb	r4, [r7, r0]
-    f0c8:	1c0e      	adds	r6, r1, #0
-    f0ca:	9921      	ldr	r1, [sp, #132]
-    f0cc:	3701      	adds	r7, #1
-    f0ce:	428f      	cmp	r7, r1
-    f0d0:	d123      	bne.n	f11a <.text+0xf11a>
-    f0d2:	4a6c      	ldr	r2, [pc, #432]	(f284 <.text+0xf284>)
-    f0d4:	4b6c      	ldr	r3, [pc, #432]	(f288 <.text+0xf288>)
-    f0d6:	19c7      	adds	r7, r0, r7
-    f0d8:	981b      	ldr	r0, [sp, #108]
-    f0da:	991c      	ldr	r1, [sp, #112]
-    f0dc:	f006 f862 	bl	151a4 <____adddf3_from_thumb>
-    f0e0:	1c02      	adds	r2, r0, #0
-    f0e2:	1c0b      	adds	r3, r1, #0
-    f0e4:	1c28      	adds	r0, r5, #0
-    f0e6:	1c31      	adds	r1, r6, #0
-    f0e8:	f006 f870 	bl	151cc <____gtdf2_from_thumb>
-    f0ec:	2800      	cmp	r0, #0
-    f0ee:	dd00      	ble.n	f0f2 <.text+0xf0f2>
-    f0f0:	e091      	b.n	f216 <.text+0xf216>
-    f0f2:	9a1b      	ldr	r2, [sp, #108]
-    f0f4:	9b1c      	ldr	r3, [sp, #112]
-    f0f6:	4863      	ldr	r0, [pc, #396]	(f284 <.text+0xf284>)
-    f0f8:	4963      	ldr	r1, [pc, #396]	(f288 <.text+0xf288>)
-    f0fa:	f006 f857 	bl	151ac <____subdf3_from_thumb>
-    f0fe:	1c02      	adds	r2, r0, #0
-    f100:	1c0b      	adds	r3, r1, #0
-    f102:	1c28      	adds	r0, r5, #0
-    f104:	1c31      	adds	r1, r6, #0
-    f106:	f006 f83d 	bl	15184 <____ltdf2_from_thumb>
-    f10a:	2800      	cmp	r0, #0
-    f10c:	da0e      	bge.n	f12c <.text+0xf12c>
-    f10e:	3f01      	subs	r7, #1
-    f110:	783b      	ldrb	r3, [r7, #0]
-    f112:	2b30      	cmp	r3, #48
-    f114:	d0fb      	beq.n	f10e <.text+0xf10e>
-    f116:	3701      	adds	r7, #1
-    f118:	e086      	b.n	f228 <.text+0xf228>
-    f11a:	1c28      	adds	r0, r5, #0
-    f11c:	1c31      	adds	r1, r6, #0
-    f11e:	4a51      	ldr	r2, [pc, #324]	(f264 <.text+0xf264>)
-    f120:	4b51      	ldr	r3, [pc, #324]	(f268 <.text+0xf268>)
-    f122:	f006 f847 	bl	151b4 <____muldf3_from_thumb>
-    f126:	1c05      	adds	r5, r0, #0
-    f128:	1c0e      	adds	r6, r1, #0
-    f12a:	e7bc      	b.n	f0a6 <.text+0xf0a6>
-    f12c:	9b05      	ldr	r3, [sp, #20]
-    f12e:	9c06      	ldr	r4, [sp, #24]
-    f130:	9303      	str	r3, [sp, #12]
-    f132:	9404      	str	r4, [sp, #16]
-    f134:	9b23      	ldr	r3, [sp, #140]
-    f136:	2b00      	cmp	r3, #0
-    f138:	da00      	bge.n	f13c <.text+0xf13c>
-    f13a:	e088      	b.n	f24e <.text+0xf24e>
-    f13c:	9c0e      	ldr	r4, [sp, #56]
-    f13e:	2c0e      	cmp	r4, #14
-    f140:	dd00      	ble.n	f144 <.text+0xf144>
-    f142:	e084      	b.n	f24e <.text+0xf24e>
-    f144:	4a4e      	ldr	r2, [pc, #312]	(f280 <.text+0xf280>)
-    f146:	00e3      	lsls	r3, r4, #3
-    f148:	189b      	adds	r3, r3, r2
-    f14a:	6818      	ldr	r0, [r3, #0]
-    f14c:	6859      	ldr	r1, [r3, #4]
-    f14e:	901d      	str	r0, [sp, #116]
-    f150:	911e      	str	r1, [sp, #120]
-    f152:	9929      	ldr	r1, [sp, #164]
-    f154:	2900      	cmp	r1, #0
-    f156:	da02      	bge.n	f15e <.text+0xf15e>
-    f158:	9a0c      	ldr	r2, [sp, #48]
-    f15a:	2a00      	cmp	r2, #0
-    f15c:	dd03      	ble.n	f166 <.text+0xf166>
-    f15e:	9c03      	ldr	r4, [sp, #12]
-    f160:	9d04      	ldr	r5, [sp, #16]
-    f162:	9f1a      	ldr	r7, [sp, #104]
-    f164:	e011      	b.n	f18a <.text+0xf18a>
-    f166:	9b0c      	ldr	r3, [sp, #48]
-    f168:	2b00      	cmp	r3, #0
-    f16a:	d000      	beq.n	f16e <.text+0xf16e>
-    f16c:	e191      	b.n	f492 <.text+0xf492>
-    f16e:	4a42      	ldr	r2, [pc, #264]	(f278 <.text+0xf278>)
-    f170:	4b42      	ldr	r3, [pc, #264]	(f27c <.text+0xf27c>)
-    f172:	981d      	ldr	r0, [sp, #116]
-    f174:	991e      	ldr	r1, [sp, #120]
-    f176:	f006 f81d 	bl	151b4 <____muldf3_from_thumb>
-    f17a:	9a03      	ldr	r2, [sp, #12]
-    f17c:	9b04      	ldr	r3, [sp, #16]
-    f17e:	f006 f829 	bl	151d4 <____gedf2_from_thumb>
-    f182:	2800      	cmp	r0, #0
-    f184:	db00      	blt.n	f188 <.text+0xf188>
-    f186:	e184      	b.n	f492 <.text+0xf492>
-    f188:	e18d      	b.n	f4a6 <.text+0xf4a6>
-    f18a:	9a1d      	ldr	r2, [sp, #116]
-    f18c:	9b1e      	ldr	r3, [sp, #120]
-    f18e:	1c20      	adds	r0, r4, #0
-    f190:	1c29      	adds	r1, r5, #0
-    f192:	f006 f817 	bl	151c4 <____divdf3_from_thumb>
-    f196:	f006 f811 	bl	151bc <____fixdfsi_from_thumb>
-    f19a:	1c06      	adds	r6, r0, #0
-    f19c:	f005 fffe 	bl	1519c <____floatsidf_from_thumb>
-    f1a0:	9a1d      	ldr	r2, [sp, #116]
-    f1a2:	9b1e      	ldr	r3, [sp, #120]
-    f1a4:	f006 f806 	bl	151b4 <____muldf3_from_thumb>
-    f1a8:	1c0b      	adds	r3, r1, #0
-    f1aa:	1c02      	adds	r2, r0, #0
-    f1ac:	1c29      	adds	r1, r5, #0
-    f1ae:	1c20      	adds	r0, r4, #0
-    f1b0:	f005 fffc 	bl	151ac <____subdf3_from_thumb>
-    f1b4:	1c33      	adds	r3, r6, #0
-    f1b6:	3330      	adds	r3, #48
-    f1b8:	703b      	strb	r3, [r7, #0]
-    f1ba:	1c04      	adds	r4, r0, #0
-    f1bc:	1c0d      	adds	r5, r1, #0
-    f1be:	981a      	ldr	r0, [sp, #104]
-    f1c0:	990c      	ldr	r1, [sp, #48]
-    f1c2:	3701      	adds	r7, #1
-    f1c4:	1843      	adds	r3, r0, r1
-    f1c6:	429f      	cmp	r7, r3
-    f1c8:	d131      	bne.n	f22e <.text+0xf22e>
-    f1ca:	1c22      	adds	r2, r4, #0
-    f1cc:	1c2b      	adds	r3, r5, #0
-    f1ce:	1c20      	adds	r0, r4, #0
-    f1d0:	1c29      	adds	r1, r5, #0
-    f1d2:	f005 ffe7 	bl	151a4 <____adddf3_from_thumb>
-    f1d6:	9a1d      	ldr	r2, [sp, #116]
-    f1d8:	9b1e      	ldr	r3, [sp, #120]
-    f1da:	1c04      	adds	r4, r0, #0
-    f1dc:	1c0d      	adds	r5, r1, #0
-    f1de:	f005 fff5 	bl	151cc <____gtdf2_from_thumb>
-    f1e2:	2800      	cmp	r0, #0
-    f1e4:	dc15      	bgt.n	f212 <.text+0xf212>
-    f1e6:	1c20      	adds	r0, r4, #0
-    f1e8:	1c29      	adds	r1, r5, #0
-    f1ea:	9a1d      	ldr	r2, [sp, #116]
-    f1ec:	9b1e      	ldr	r3, [sp, #120]
-    f1ee:	f005 ffd1 	bl	15194 <____eqdf2_from_thumb>
-    f1f2:	2800      	cmp	r0, #0
-    f1f4:	d000      	beq.n	f1f8 <.text+0xf1f8>
-    f1f6:	e277      	b.n	f6e8 <.text+0xf6e8>
-    f1f8:	07f2      	lsls	r2, r6, #31
-    f1fa:	d40a      	bmi.n	f212 <.text+0xf212>
-    f1fc:	e274      	b.n	f6e8 <.text+0xf6e8>
-    f1fe:	9b1a      	ldr	r3, [sp, #104]
-    f200:	429a      	cmp	r2, r3
-    f202:	d109      	bne.n	f218 <.text+0xf218>
-    f204:	9c20      	ldr	r4, [sp, #128]
-    f206:	981a      	ldr	r0, [sp, #104]
-    f208:	3401      	adds	r4, #1
-    f20a:	2330      	movs	r3, #48
-    f20c:	9420      	str	r4, [sp, #128]
-    f20e:	7003      	strb	r3, [r0, #0]
-    f210:	e006      	b.n	f220 <.text+0xf220>
-    f212:	990e      	ldr	r1, [sp, #56]
-    f214:	9120      	str	r1, [sp, #128]
-    f216:	1c3a      	adds	r2, r7, #0
-    f218:	3a01      	subs	r2, #1
-    f21a:	7813      	ldrb	r3, [r2, #0]
-    f21c:	2b39      	cmp	r3, #57
-    f21e:	d0ee      	beq.n	f1fe <.text+0xf1fe>
-    f220:	7813      	ldrb	r3, [r2, #0]
-    f222:	3301      	adds	r3, #1
-    f224:	7013      	strb	r3, [r2, #0]
-    f226:	1c57      	adds	r7, r2, #1
-    f228:	9a20      	ldr	r2, [sp, #128]
-    f22a:	920e      	str	r2, [sp, #56]
-    f22c:	e25c      	b.n	f6e8 <.text+0xf6e8>
-    f22e:	1c20      	adds	r0, r4, #0
-    f230:	1c29      	adds	r1, r5, #0
-    f232:	4a0c      	ldr	r2, [pc, #48]	(f264 <.text+0xf264>)
-    f234:	4b0c      	ldr	r3, [pc, #48]	(f268 <.text+0xf268>)
-    f236:	f005 ffbd 	bl	151b4 <____muldf3_from_thumb>
-    f23a:	4a14      	ldr	r2, [pc, #80]	(f28c <.text+0xf28c>)
-    f23c:	4b14      	ldr	r3, [pc, #80]	(f290 <.text+0xf290>)
-    f23e:	1c04      	adds	r4, r0, #0
-    f240:	1c0d      	adds	r5, r1, #0
-    f242:	f005 ffa3 	bl	1518c <____nedf2_from_thumb>
-    f246:	2800      	cmp	r0, #0
-    f248:	d100      	bne.n	f24c <.text+0xf24c>
-    f24a:	e24d      	b.n	f6e8 <.text+0xf6e8>
-    f24c:	e79d      	b.n	f18a <.text+0xf18a>
-    f24e:	9c10      	ldr	r4, [sp, #64]
-    f250:	2c00      	cmp	r4, #0
-    f252:	d11f      	bne.n	f294 <.text+0xf294>
-    f254:	9e09      	ldr	r6, [sp, #36]
-    f256:	9d0a      	ldr	r5, [sp, #40]
-    f258:	2000      	movs	r0, #0
-    f25a:	e04c      	b.n	f2f6 <.text+0xf2f6>
-    f25c:	0000      	lsls	r0, r0, #0
-    f25e:	3ff0      	subs	r7, #240
-    f260:	0000      	lsls	r0, r0, #0
-    f262:	0000      	lsls	r0, r0, #0
-    f264:	0000      	lsls	r0, r0, #0
-    f266:	4024      	ands	r4, r4
-    f268:	0000      	lsls	r0, r0, #0
-    f26a:	0000      	lsls	r0, r0, #0
-    f26c:	0000      	lsls	r0, r0, #0
-    f26e:	401c      	ands	r4, r3
-    f270:	0000      	lsls	r0, r0, #0
-    f272:	0000      	lsls	r0, r0, #0
-    f274:	0000      	lsls	r0, r0, #0
-    f276:	fcc0 0000 	stc2l	0, cr0, [r0], {0}
-    f27a:	4014      	ands	r4, r2
-    f27c:	0000      	lsls	r0, r0, #0
-    f27e:	0000      	lsls	r0, r0, #0
-    f280:	555c      	strb	r4, [r3, r5]
-    f282:	0001      	lsls	r1, r0, #0
-    f284:	0000      	lsls	r0, r0, #0
-    f286:	3fe0      	subs	r7, #224
-	...
-    f294:	9901      	ldr	r1, [sp, #4]
-    f296:	2901      	cmp	r1, #1
-    f298:	dc0b      	bgt.n	f2b2 <.text+0xf2b2>
-    f29a:	9a13      	ldr	r2, [sp, #76]
-    f29c:	2a00      	cmp	r2, #0
-    f29e:	d002      	beq.n	f2a6 <.text+0xf2a6>
-    f2a0:	4cc6      	ldr	r4, [pc, #792]	(f5bc <.text+0xf5bc>)
-    f2a2:	191b      	adds	r3, r3, r4
-    f2a4:	e002      	b.n	f2ac <.text+0xf2ac>
-    f2a6:	9a22      	ldr	r2, [sp, #136]
-    f2a8:	2336      	movs	r3, #54
-    f2aa:	1a9b      	subs	r3, r3, r2
-    f2ac:	9e09      	ldr	r6, [sp, #36]
-    f2ae:	9d0a      	ldr	r5, [sp, #40]
-    f2b0:	e017      	b.n	f2e2 <.text+0xf2e2>
-    f2b2:	9a0c      	ldr	r2, [sp, #48]
-    f2b4:	980a      	ldr	r0, [sp, #40]
-    f2b6:	3a01      	subs	r2, #1
-    f2b8:	4290      	cmp	r0, r2
-    f2ba:	db01      	blt.n	f2c0 <.text+0xf2c0>
-    f2bc:	1a85      	subs	r5, r0, r2
-    f2be:	e007      	b.n	f2d0 <.text+0xf2d0>
-    f2c0:	990a      	ldr	r1, [sp, #40]
-    f2c2:	1a53      	subs	r3, r2, r1
-    f2c4:	9a12      	ldr	r2, [sp, #72]
-    f2c6:	18c9      	adds	r1, r1, r3
-    f2c8:	18d2      	adds	r2, r2, r3
-    f2ca:	9212      	str	r2, [sp, #72]
-    f2cc:	910a      	str	r1, [sp, #40]
-    f2ce:	2500      	movs	r5, #0
-    f2d0:	9b0c      	ldr	r3, [sp, #48]
-    f2d2:	2b00      	cmp	r3, #0
-    f2d4:	db01      	blt.n	f2da <.text+0xf2da>
-    f2d6:	9e09      	ldr	r6, [sp, #36]
-    f2d8:	e003      	b.n	f2e2 <.text+0xf2e2>
-    f2da:	9c09      	ldr	r4, [sp, #36]
-    f2dc:	980c      	ldr	r0, [sp, #48]
-    f2de:	2300      	movs	r3, #0
-    f2e0:	1a26      	subs	r6, r4, r0
-    f2e2:	9909      	ldr	r1, [sp, #36]
-    f2e4:	9a11      	ldr	r2, [sp, #68]
-    f2e6:	18c9      	adds	r1, r1, r3
-    f2e8:	9109      	str	r1, [sp, #36]
-    f2ea:	18d2      	adds	r2, r2, r3
-    f2ec:	9802      	ldr	r0, [sp, #8]
-    f2ee:	2101      	movs	r1, #1
-    f2f0:	9211      	str	r2, [sp, #68]
-    f2f2:	f001 fc4d 	bl	10b90 <_i2b>
-    f2f6:	9016      	str	r0, [sp, #88]
-    f2f8:	2e00      	cmp	r6, #0
-    f2fa:	dd0c      	ble.n	f316 <.text+0xf316>
-    f2fc:	9b11      	ldr	r3, [sp, #68]
-    f2fe:	2b00      	cmp	r3, #0
-    f300:	dd09      	ble.n	f316 <.text+0xf316>
-    f302:	42b3      	cmp	r3, r6
-    f304:	dd00      	ble.n	f308 <.text+0xf308>
-    f306:	1c33      	adds	r3, r6, #0
-    f308:	9c09      	ldr	r4, [sp, #36]
-    f30a:	9811      	ldr	r0, [sp, #68]
-    f30c:	1ae4      	subs	r4, r4, r3
-    f30e:	1ac0      	subs	r0, r0, r3
-    f310:	9409      	str	r4, [sp, #36]
-    f312:	9011      	str	r0, [sp, #68]
-    f314:	1af6      	subs	r6, r6, r3
-    f316:	990a      	ldr	r1, [sp, #40]
-    f318:	2900      	cmp	r1, #0
-    f31a:	dd22      	ble.n	f362 <.text+0xf362>
-    f31c:	9a10      	ldr	r2, [sp, #64]
-    f31e:	2a00      	cmp	r2, #0
-    f320:	d019      	beq.n	f356 <.text+0xf356>
-    f322:	2d00      	cmp	r5, #0
-    f324:	dd10      	ble.n	f348 <.text+0xf348>
-    f326:	9916      	ldr	r1, [sp, #88]
-    f328:	1c2a      	adds	r2, r5, #0
-    f32a:	9802      	ldr	r0, [sp, #8]
-    f32c:	f001 fc82 	bl	10c34 <_pow5mult>
-    f330:	9016      	str	r0, [sp, #88]
-    f332:	9916      	ldr	r1, [sp, #88]
-    f334:	9a14      	ldr	r2, [sp, #80]
-    f336:	9802      	ldr	r0, [sp, #8]
-    f338:	f001 fb94 	bl	10a64 <_multiply>
-    f33c:	9914      	ldr	r1, [sp, #80]
-    f33e:	1c04      	adds	r4, r0, #0
-    f340:	9802      	ldr	r0, [sp, #8]
-    f342:	f001 f8e5 	bl	10510 <_Bfree>
-    f346:	9414      	str	r4, [sp, #80]
-    f348:	9b0a      	ldr	r3, [sp, #40]
-    f34a:	1b5a      	subs	r2, r3, r5
-    f34c:	2a00      	cmp	r2, #0
-    f34e:	d008      	beq.n	f362 <.text+0xf362>
-    f350:	9802      	ldr	r0, [sp, #8]
-    f352:	9914      	ldr	r1, [sp, #80]
-    f354:	e002      	b.n	f35c <.text+0xf35c>
-    f356:	9802      	ldr	r0, [sp, #8]
-    f358:	9914      	ldr	r1, [sp, #80]
-    f35a:	9a0a      	ldr	r2, [sp, #40]
-    f35c:	f001 fc6a 	bl	10c34 <_pow5mult>
-    f360:	9014      	str	r0, [sp, #80]
-    f362:	9802      	ldr	r0, [sp, #8]
-    f364:	2101      	movs	r1, #1
-    f366:	f001 fc13 	bl	10b90 <_i2b>
-    f36a:	9c12      	ldr	r4, [sp, #72]
-    f36c:	9017      	str	r0, [sp, #92]
-    f36e:	2c00      	cmp	r4, #0
-    f370:	dd05      	ble.n	f37e <.text+0xf37e>
-    f372:	9802      	ldr	r0, [sp, #8]
-    f374:	9917      	ldr	r1, [sp, #92]
-    f376:	1c22      	adds	r2, r4, #0
-    f378:	f001 fc5c 	bl	10c34 <_pow5mult>
-    f37c:	9017      	str	r0, [sp, #92]
-    f37e:	9801      	ldr	r0, [sp, #4]
-    f380:	2801      	cmp	r0, #1
-    f382:	dc11      	bgt.n	f3a8 <.text+0xf3a8>
-    f384:	9904      	ldr	r1, [sp, #16]
-    f386:	2900      	cmp	r1, #0
-    f388:	d10e      	bne.n	f3a8 <.text+0xf3a8>
-    f38a:	9a03      	ldr	r2, [sp, #12]
-    f38c:	4b8c      	ldr	r3, [pc, #560]	(f5c0 <.text+0xf5c0>)
-    f38e:	421a      	tst	r2, r3
-    f390:	d10a      	bne.n	f3a8 <.text+0xf3a8>
-    f392:	4b8c      	ldr	r3, [pc, #560]	(f5c4 <.text+0xf5c4>)
-    f394:	421a      	tst	r2, r3
-    f396:	d007      	beq.n	f3a8 <.text+0xf3a8>
-    f398:	9a09      	ldr	r2, [sp, #36]
-    f39a:	9b11      	ldr	r3, [sp, #68]
-    f39c:	3201      	adds	r2, #1
-    f39e:	3301      	adds	r3, #1
-    f3a0:	2401      	movs	r4, #1
-    f3a2:	9209      	str	r2, [sp, #36]
-    f3a4:	9311      	str	r3, [sp, #68]
-    f3a6:	e000      	b.n	f3aa <.text+0xf3aa>
-    f3a8:	2400      	movs	r4, #0
-    f3aa:	9812      	ldr	r0, [sp, #72]
-    f3ac:	2800      	cmp	r0, #0
-    f3ae:	d101      	bne.n	f3b4 <.text+0xf3b4>
-    f3b0:	2201      	movs	r2, #1
-    f3b2:	e008      	b.n	f3c6 <.text+0xf3c6>
-    f3b4:	9917      	ldr	r1, [sp, #92]
-    f3b6:	690b      	ldr	r3, [r1, #16]
-    f3b8:	009b      	lsls	r3, r3, #2
-    f3ba:	185b      	adds	r3, r3, r1
-    f3bc:	6918      	ldr	r0, [r3, #16]
-    f3be:	f001 f8b3 	bl	10528 <_hi0bits>
-    f3c2:	2320      	movs	r3, #32
-    f3c4:	1a1a      	subs	r2, r3, r0
-    f3c6:	9b11      	ldr	r3, [sp, #68]
-    f3c8:	18d2      	adds	r2, r2, r3
-    f3ca:	231f      	movs	r3, #31
-    f3cc:	401a      	ands	r2, r3
-    f3ce:	d00e      	beq.n	f3ee <.text+0xf3ee>
-    f3d0:	2320      	movs	r3, #32
-    f3d2:	1a9a      	subs	r2, r3, r2
-    f3d4:	2a04      	cmp	r2, #4
-    f3d6:	dd08      	ble.n	f3ea <.text+0xf3ea>
-    f3d8:	9809      	ldr	r0, [sp, #36]
-    f3da:	9911      	ldr	r1, [sp, #68]
-    f3dc:	1f13      	subs	r3, r2, #4
-    f3de:	18c0      	adds	r0, r0, r3
-    f3e0:	18c9      	adds	r1, r1, r3
-    f3e2:	18f6      	adds	r6, r6, r3
-    f3e4:	9009      	str	r0, [sp, #36]
-    f3e6:	9111      	str	r1, [sp, #68]
-    f3e8:	e00a      	b.n	f400 <.text+0xf400>
-    f3ea:	2a03      	cmp	r2, #3
-    f3ec:	dc08      	bgt.n	f400 <.text+0xf400>
-    f3ee:	1c13      	adds	r3, r2, #0
-    f3f0:	9811      	ldr	r0, [sp, #68]
-    f3f2:	9a09      	ldr	r2, [sp, #36]
-    f3f4:	331c      	adds	r3, #28
-    f3f6:	18d2      	adds	r2, r2, r3
-    f3f8:	18c0      	adds	r0, r0, r3
-    f3fa:	9209      	str	r2, [sp, #36]
-    f3fc:	9011      	str	r0, [sp, #68]
-    f3fe:	18f6      	adds	r6, r6, r3
-    f400:	9909      	ldr	r1, [sp, #36]
-    f402:	2900      	cmp	r1, #0
-    f404:	dd05      	ble.n	f412 <.text+0xf412>
-    f406:	9802      	ldr	r0, [sp, #8]
-    f408:	9914      	ldr	r1, [sp, #80]
-    f40a:	9a09      	ldr	r2, [sp, #36]
-    f40c:	f001 fae2 	bl	109d4 <_lshift>
-    f410:	9014      	str	r0, [sp, #80]
-    f412:	9a11      	ldr	r2, [sp, #68]
-    f414:	2a00      	cmp	r2, #0
-    f416:	dd04      	ble.n	f422 <.text+0xf422>
-    f418:	9802      	ldr	r0, [sp, #8]
-    f41a:	9917      	ldr	r1, [sp, #92]
-    f41c:	f001 fada 	bl	109d4 <_lshift>
-    f420:	9017      	str	r0, [sp, #92]
-    f422:	9b0f      	ldr	r3, [sp, #60]
-    f424:	2b00      	cmp	r3, #0
-    f426:	d01e      	beq.n	f466 <.text+0xf466>
-    f428:	9814      	ldr	r0, [sp, #80]
-    f42a:	9917      	ldr	r1, [sp, #92]
-    f42c:	f001 f8d6 	bl	105dc <__mcmp>
-    f430:	2800      	cmp	r0, #0
-    f432:	da18      	bge.n	f466 <.text+0xf466>
-    f434:	980e      	ldr	r0, [sp, #56]
-    f436:	3801      	subs	r0, #1
-    f438:	900e      	str	r0, [sp, #56]
-    f43a:	9914      	ldr	r1, [sp, #80]
-    f43c:	9802      	ldr	r0, [sp, #8]
-    f43e:	220a      	movs	r2, #10
-    f440:	2300      	movs	r3, #0
-    f442:	f001 fbb1 	bl	10ba8 <_multadd>
-    f446:	9910      	ldr	r1, [sp, #64]
-    f448:	9014      	str	r0, [sp, #80]
-    f44a:	2900      	cmp	r1, #0
-    f44c:	d102      	bne.n	f454 <.text+0xf454>
-    f44e:	9a0d      	ldr	r2, [sp, #52]
-    f450:	920c      	str	r2, [sp, #48]
-    f452:	e008      	b.n	f466 <.text+0xf466>
-    f454:	2300      	movs	r3, #0
-    f456:	9802      	ldr	r0, [sp, #8]
-    f458:	9916      	ldr	r1, [sp, #88]
-    f45a:	220a      	movs	r2, #10
-    f45c:	f001 fba4 	bl	10ba8 <_multadd>
-    f460:	9b0d      	ldr	r3, [sp, #52]
-    f462:	9016      	str	r0, [sp, #88]
-    f464:	930c      	str	r3, [sp, #48]
-    f466:	980c      	ldr	r0, [sp, #48]
-    f468:	2800      	cmp	r0, #0
-    f46a:	dc2a      	bgt.n	f4c2 <.text+0xf4c2>
-    f46c:	9901      	ldr	r1, [sp, #4]
-    f46e:	2902      	cmp	r1, #2
-    f470:	dd27      	ble.n	f4c2 <.text+0xf4c2>
-    f472:	2800      	cmp	r0, #0
-    f474:	d110      	bne.n	f498 <.text+0xf498>
-    f476:	9917      	ldr	r1, [sp, #92]
-    f478:	9802      	ldr	r0, [sp, #8]
-    f47a:	2205      	movs	r2, #5
-    f47c:	2300      	movs	r3, #0
-    f47e:	f001 fb93 	bl	10ba8 <_multadd>
-    f482:	9017      	str	r0, [sp, #92]
-    f484:	9917      	ldr	r1, [sp, #92]
-    f486:	9814      	ldr	r0, [sp, #80]
-    f488:	f001 f8a8 	bl	105dc <__mcmp>
-    f48c:	2800      	cmp	r0, #0
-    f48e:	dc0d      	bgt.n	f4ac <.text+0xf4ac>
-    f490:	e002      	b.n	f498 <.text+0xf498>
-    f492:	2200      	movs	r2, #0
-    f494:	9216      	str	r2, [sp, #88]
-    f496:	9217      	str	r2, [sp, #92]
-    f498:	9b29      	ldr	r3, [sp, #164]
-    f49a:	9f1a      	ldr	r7, [sp, #104]
-    f49c:	43db      	mvns	r3, r3
-    f49e:	2400      	movs	r4, #0
-    f4a0:	930e      	str	r3, [sp, #56]
-    f4a2:	9415      	str	r4, [sp, #84]
-    f4a4:	e10c      	b.n	f6c0 <.text+0xf6c0>
-    f4a6:	2000      	movs	r0, #0
-    f4a8:	9016      	str	r0, [sp, #88]
-    f4aa:	9017      	str	r0, [sp, #92]
-    f4ac:	991a      	ldr	r1, [sp, #104]
-    f4ae:	2331      	movs	r3, #49
-    f4b0:	700b      	strb	r3, [r1, #0]
-    f4b2:	9a0e      	ldr	r2, [sp, #56]
-    f4b4:	1c0f      	adds	r7, r1, #0
-    f4b6:	3201      	adds	r2, #1
-    f4b8:	2300      	movs	r3, #0
-    f4ba:	3701      	adds	r7, #1
-    f4bc:	920e      	str	r2, [sp, #56]
-    f4be:	9315      	str	r3, [sp, #84]
-    f4c0:	e0fe      	b.n	f6c0 <.text+0xf6c0>
-    f4c2:	9810      	ldr	r0, [sp, #64]
-    f4c4:	2800      	cmp	r0, #0
-    f4c6:	d100      	bne.n	f4ca <.text+0xf4ca>
-    f4c8:	e0b8      	b.n	f63c <.text+0xf63c>
-    f4ca:	2e00      	cmp	r6, #0
-    f4cc:	dd05      	ble.n	f4da <.text+0xf4da>
-    f4ce:	9802      	ldr	r0, [sp, #8]
-    f4d0:	9916      	ldr	r1, [sp, #88]
-    f4d2:	1c32      	adds	r2, r6, #0
-    f4d4:	f001 fa7e 	bl	109d4 <_lshift>
-    f4d8:	9016      	str	r0, [sp, #88]
-    f4da:	2c00      	cmp	r4, #0
-    f4dc:	d101      	bne.n	f4e2 <.text+0xf4e2>
-    f4de:	9816      	ldr	r0, [sp, #88]
-    f4e0:	e013      	b.n	f50a <.text+0xf50a>
-    f4e2:	9a16      	ldr	r2, [sp, #88]
-    f4e4:	9802      	ldr	r0, [sp, #8]
-    f4e6:	6851      	ldr	r1, [r2, #4]
-    f4e8:	f001 f96c 	bl	107c4 <_Balloc>
-    f4ec:	9b16      	ldr	r3, [sp, #88]
-    f4ee:	691a      	ldr	r2, [r3, #16]
-    f4f0:	9916      	ldr	r1, [sp, #88]
-    f4f2:	0092      	lsls	r2, r2, #2
-    f4f4:	1c04      	adds	r4, r0, #0
-    f4f6:	310c      	adds	r1, #12
-    f4f8:	3208      	adds	r2, #8
-    f4fa:	300c      	adds	r0, #12
-    f4fc:	f7fd fdaa 	bl	d054 <memcpy>
-    f500:	9802      	ldr	r0, [sp, #8]
-    f502:	1c21      	adds	r1, r4, #0
-    f504:	2201      	movs	r2, #1
-    f506:	f001 fa65 	bl	109d4 <_lshift>
-    f50a:	9c04      	ldr	r4, [sp, #16]
-    f50c:	9916      	ldr	r1, [sp, #88]
-    f50e:	2301      	movs	r3, #1
-    f510:	401c      	ands	r4, r3
-    f512:	9408      	str	r4, [sp, #32]
-    f514:	9115      	str	r1, [sp, #84]
-    f516:	9016      	str	r0, [sp, #88]
-    f518:	9c1a      	ldr	r4, [sp, #104]
-    f51a:	9917      	ldr	r1, [sp, #92]
-    f51c:	9814      	ldr	r0, [sp, #80]
-    f51e:	f7ff fa65 	bl	e9ec <quorem>
-    f522:	9915      	ldr	r1, [sp, #84]
-    f524:	9007      	str	r0, [sp, #28]
-    f526:	1c05      	adds	r5, r0, #0
-    f528:	9814      	ldr	r0, [sp, #80]
-    f52a:	f001 f857 	bl	105dc <__mcmp>
-    f52e:	9917      	ldr	r1, [sp, #92]
-    f530:	901f      	str	r0, [sp, #124]
-    f532:	9a16      	ldr	r2, [sp, #88]
-    f534:	9802      	ldr	r0, [sp, #8]
-    f536:	f001 f9dd 	bl	108f4 <__mdiff>
-    f53a:	68c3      	ldr	r3, [r0, #12]
-    f53c:	3530      	adds	r5, #48
-    f53e:	1c06      	adds	r6, r0, #0
-    f540:	2b00      	cmp	r3, #0
-    f542:	d000      	beq.n	f546 <.text+0xf546>
-    f544:	e0e0      	b.n	f708 <.text+0xf708>
-    f546:	1c31      	adds	r1, r6, #0
-    f548:	9814      	ldr	r0, [sp, #80]
-    f54a:	f001 f847 	bl	105dc <__mcmp>
-    f54e:	1c31      	adds	r1, r6, #0
-    f550:	1c07      	adds	r7, r0, #0
-    f552:	9802      	ldr	r0, [sp, #8]
-    f554:	f000 ffdc 	bl	10510 <_Bfree>
-    f558:	2f00      	cmp	r7, #0
-    f55a:	d10d      	bne.n	f578 <.text+0xf578>
-    f55c:	9a01      	ldr	r2, [sp, #4]
-    f55e:	2a00      	cmp	r2, #0
-    f560:	d10a      	bne.n	f578 <.text+0xf578>
-    f562:	9b08      	ldr	r3, [sp, #32]
-    f564:	2b00      	cmp	r3, #0
-    f566:	d107      	bne.n	f578 <.text+0xf578>
-    f568:	2d39      	cmp	r5, #57
-    f56a:	d031      	beq.n	f5d0 <.text+0xf5d0>
-    f56c:	981f      	ldr	r0, [sp, #124]
-    f56e:	2800      	cmp	r0, #0
-    f570:	dd21      	ble.n	f5b6 <.text+0xf5b6>
-    f572:	9d07      	ldr	r5, [sp, #28]
-    f574:	3531      	adds	r5, #49
-    f576:	e01e      	b.n	f5b6 <.text+0xf5b6>
-    f578:	991f      	ldr	r1, [sp, #124]
-    f57a:	2900      	cmp	r1, #0
-    f57c:	db07      	blt.n	f58e <.text+0xf58e>
-    f57e:	2900      	cmp	r1, #0
-    f580:	d122      	bne.n	f5c8 <.text+0xf5c8>
-    f582:	9a01      	ldr	r2, [sp, #4]
-    f584:	2a00      	cmp	r2, #0
-    f586:	d11f      	bne.n	f5c8 <.text+0xf5c8>
-    f588:	9b08      	ldr	r3, [sp, #32]
-    f58a:	2b00      	cmp	r3, #0
-    f58c:	d11c      	bne.n	f5c8 <.text+0xf5c8>
-    f58e:	2f00      	cmp	r7, #0
-    f590:	dd11      	ble.n	f5b6 <.text+0xf5b6>
-    f592:	9914      	ldr	r1, [sp, #80]
-    f594:	9802      	ldr	r0, [sp, #8]
-    f596:	2201      	movs	r2, #1
-    f598:	f001 fa1c 	bl	109d4 <_lshift>
-    f59c:	9917      	ldr	r1, [sp, #92]
-    f59e:	9014      	str	r0, [sp, #80]
-    f5a0:	f001 f81c 	bl	105dc <__mcmp>
-    f5a4:	2800      	cmp	r0, #0
-    f5a6:	dc03      	bgt.n	f5b0 <.text+0xf5b0>
-    f5a8:	2800      	cmp	r0, #0
-    f5aa:	d104      	bne.n	f5b6 <.text+0xf5b6>
-    f5ac:	07e8      	lsls	r0, r5, #31
-    f5ae:	d502      	bpl.n	f5b6 <.text+0xf5b6>
-    f5b0:	3501      	adds	r5, #1
-    f5b2:	2d3a      	cmp	r5, #58
-    f5b4:	d00c      	beq.n	f5d0 <.text+0xf5d0>
-    f5b6:	7025      	strb	r5, [r4, #0]
-    f5b8:	e081      	b.n	f6be <.text+0xf6be>
-    f5ba:	0000      	lsls	r0, r0, #0
-    f5bc:	0433      	lsls	r3, r6, #16
-    f5be:	0000      	lsls	r0, r0, #0
-    f5c0:	ffff 000f 	vaddl.u<illegal width 64>	q8, d15, d15
-    f5c4:	0000      	lsls	r0, r0, #0
-    f5c6:	7ff0      	ldrb	r0, [r6, #31]
-    f5c8:	2f00      	cmp	r7, #0
-    f5ca:	dd08      	ble.n	f5de <.text+0xf5de>
-    f5cc:	2d39      	cmp	r5, #57
-    f5ce:	d103      	bne.n	f5d8 <.text+0xf5d8>
-    f5d0:	2339      	movs	r3, #57
-    f5d2:	7023      	strb	r3, [r4, #0]
-    f5d4:	3401      	adds	r4, #1
-    f5d6:	e062      	b.n	f69e <.text+0xf69e>
-    f5d8:	1c6b      	adds	r3, r5, #1
-    f5da:	7023      	strb	r3, [r4, #0]
-    f5dc:	e06f      	b.n	f6be <.text+0xf6be>
-    f5de:	7025      	strb	r5, [r4, #0]
-    f5e0:	991a      	ldr	r1, [sp, #104]
-    f5e2:	9a0c      	ldr	r2, [sp, #48]
-    f5e4:	3401      	adds	r4, #1
-    f5e6:	188b      	adds	r3, r1, r2
-    f5e8:	429c      	cmp	r4, r3
-    f5ea:	d03c      	beq.n	f666 <.text+0xf666>
-    f5ec:	2300      	movs	r3, #0
-    f5ee:	9802      	ldr	r0, [sp, #8]
-    f5f0:	9914      	ldr	r1, [sp, #80]
-    f5f2:	220a      	movs	r2, #10
-    f5f4:	f001 fad8 	bl	10ba8 <_multadd>
-    f5f8:	9b15      	ldr	r3, [sp, #84]
-    f5fa:	9014      	str	r0, [sp, #80]
-    f5fc:	9816      	ldr	r0, [sp, #88]
-    f5fe:	4283      	cmp	r3, r0
-    f600:	d108      	bne.n	f614 <.text+0xf614>
-    f602:	9802      	ldr	r0, [sp, #8]
-    f604:	9916      	ldr	r1, [sp, #88]
-    f606:	220a      	movs	r2, #10
-    f608:	2300      	movs	r3, #0
-    f60a:	f001 facd 	bl	10ba8 <_multadd>
-    f60e:	9016      	str	r0, [sp, #88]
-    f610:	9015      	str	r0, [sp, #84]
-    f612:	e782      	b.n	f51a <.text+0xf51a>
-    f614:	9915      	ldr	r1, [sp, #84]
-    f616:	220a      	movs	r2, #10
-    f618:	2300      	movs	r3, #0
-    f61a:	9802      	ldr	r0, [sp, #8]
-    f61c:	f001 fac4 	bl	10ba8 <_multadd>
-    f620:	9916      	ldr	r1, [sp, #88]
-    f622:	9015      	str	r0, [sp, #84]
-    f624:	220a      	movs	r2, #10
-    f626:	9802      	ldr	r0, [sp, #8]
-    f628:	2300      	movs	r3, #0
-    f62a:	f001 fabd 	bl	10ba8 <_multadd>
-    f62e:	9016      	str	r0, [sp, #88]
-    f630:	e773      	b.n	f51a <.text+0xf51a>
-    f632:	991a      	ldr	r1, [sp, #104]
-    f634:	2200      	movs	r2, #0
-    f636:	190c      	adds	r4, r1, r4
-    f638:	9215      	str	r2, [sp, #84]
-    f63a:	e014      	b.n	f666 <.text+0xf666>
-    f63c:	2400      	movs	r4, #0
-    f63e:	9814      	ldr	r0, [sp, #80]
-    f640:	9917      	ldr	r1, [sp, #92]
-    f642:	f7ff f9d3 	bl	e9ec <quorem>
-    f646:	9b1a      	ldr	r3, [sp, #104]
-    f648:	1c05      	adds	r5, r0, #0
-    f64a:	3530      	adds	r5, #48
-    f64c:	54e5      	strb	r5, [r4, r3]
-    f64e:	980c      	ldr	r0, [sp, #48]
-    f650:	3401      	adds	r4, #1
-    f652:	4284      	cmp	r4, r0
-    f654:	daed      	bge.n	f632 <.text+0xf632>
-    f656:	9802      	ldr	r0, [sp, #8]
-    f658:	9914      	ldr	r1, [sp, #80]
-    f65a:	220a      	movs	r2, #10
-    f65c:	2300      	movs	r3, #0
-    f65e:	f001 faa3 	bl	10ba8 <_multadd>
-    f662:	9014      	str	r0, [sp, #80]
-    f664:	e7eb      	b.n	f63e <.text+0xf63e>
-    f666:	9914      	ldr	r1, [sp, #80]
-    f668:	9802      	ldr	r0, [sp, #8]
-    f66a:	2201      	movs	r2, #1
-    f66c:	f001 f9b2 	bl	109d4 <_lshift>
-    f670:	9917      	ldr	r1, [sp, #92]
-    f672:	9014      	str	r0, [sp, #80]
-    f674:	f000 ffb2 	bl	105dc <__mcmp>
-    f678:	2800      	cmp	r0, #0
-    f67a:	dc10      	bgt.n	f69e <.text+0xf69e>
-    f67c:	2800      	cmp	r0, #0
-    f67e:	d11a      	bne.n	f6b6 <.text+0xf6b6>
-    f680:	07e9      	lsls	r1, r5, #31
-    f682:	d40c      	bmi.n	f69e <.text+0xf69e>
-    f684:	e017      	b.n	f6b6 <.text+0xf6b6>
-    f686:	9b1a      	ldr	r3, [sp, #104]
-    f688:	429a      	cmp	r2, r3
-    f68a:	d109      	bne.n	f6a0 <.text+0xf6a0>
-    f68c:	981a      	ldr	r0, [sp, #104]
-    f68e:	9c0e      	ldr	r4, [sp, #56]
-    f690:	1c07      	adds	r7, r0, #0
-    f692:	3401      	adds	r4, #1
-    f694:	2331      	movs	r3, #49
-    f696:	3701      	adds	r7, #1
-    f698:	940e      	str	r4, [sp, #56]
-    f69a:	7003      	strb	r3, [r0, #0]
-    f69c:	e010      	b.n	f6c0 <.text+0xf6c0>
-    f69e:	1c22      	adds	r2, r4, #0
-    f6a0:	3a01      	subs	r2, #1
-    f6a2:	7813      	ldrb	r3, [r2, #0]
-    f6a4:	2b39      	cmp	r3, #57
-    f6a6:	d0ee      	beq.n	f686 <.text+0xf686>
-    f6a8:	3301      	adds	r3, #1
-    f6aa:	1c57      	adds	r7, r2, #1
-    f6ac:	7013      	strb	r3, [r2, #0]
-    f6ae:	e007      	b.n	f6c0 <.text+0xf6c0>
-    f6b0:	9920      	ldr	r1, [sp, #128]
-    f6b2:	910e      	str	r1, [sp, #56]
-    f6b4:	e018      	b.n	f6e8 <.text+0xf6e8>
-    f6b6:	3c01      	subs	r4, #1
-    f6b8:	7823      	ldrb	r3, [r4, #0]
-    f6ba:	2b30      	cmp	r3, #48
-    f6bc:	d0fb      	beq.n	f6b6 <.text+0xf6b6>
-    f6be:	1c67      	adds	r7, r4, #1
-    f6c0:	9802      	ldr	r0, [sp, #8]
-    f6c2:	9917      	ldr	r1, [sp, #92]
-    f6c4:	f000 ff24 	bl	10510 <_Bfree>
-    f6c8:	9a16      	ldr	r2, [sp, #88]
-    f6ca:	2a00      	cmp	r2, #0
-    f6cc:	d00c      	beq.n	f6e8 <.text+0xf6e8>
-    f6ce:	9b15      	ldr	r3, [sp, #84]
-    f6d0:	2b00      	cmp	r3, #0
-    f6d2:	d005      	beq.n	f6e0 <.text+0xf6e0>
-    f6d4:	4293      	cmp	r3, r2
-    f6d6:	d003      	beq.n	f6e0 <.text+0xf6e0>
-    f6d8:	9802      	ldr	r0, [sp, #8]
-    f6da:	1c19      	adds	r1, r3, #0
-    f6dc:	f000 ff18 	bl	10510 <_Bfree>
-    f6e0:	9802      	ldr	r0, [sp, #8]
-    f6e2:	9916      	ldr	r1, [sp, #88]
-    f6e4:	f000 ff14 	bl	10510 <_Bfree>
-    f6e8:	9802      	ldr	r0, [sp, #8]
-    f6ea:	9914      	ldr	r1, [sp, #80]
-    f6ec:	f000 ff10 	bl	10510 <_Bfree>
-    f6f0:	2300      	movs	r3, #0
-    f6f2:	703b      	strb	r3, [r7, #0]
-    f6f4:	9b0e      	ldr	r3, [sp, #56]
-    f6f6:	9c2a      	ldr	r4, [sp, #168]
-    f6f8:	982c      	ldr	r0, [sp, #176]
-    f6fa:	3301      	adds	r3, #1
-    f6fc:	6023      	str	r3, [r4, #0]
-    f6fe:	2800      	cmp	r0, #0
-    f700:	d000      	beq.n	f704 <.text+0xf704>
-    f702:	6007      	str	r7, [r0, #0]
-    f704:	981a      	ldr	r0, [sp, #104]
-    f706:	e005      	b.n	f714 <.text+0xf714>
-    f708:	9802      	ldr	r0, [sp, #8]
-    f70a:	1c31      	adds	r1, r6, #0
-    f70c:	f000 ff00 	bl	10510 <_Bfree>
-    f710:	2701      	movs	r7, #1
-    f712:	e731      	b.n	f578 <.text+0xf578>
-    f714:	b024      	add	sp, #144
-    f716:	bcf0      	pop	{r4, r5, r6, r7}
-    f718:	bc02      	pop	{r1}
-    f71a:	4708      	bx	r1
-
-0000f71c <fflush>:
-    f71c:	b570      	push	{r4, r5, r6, lr}
-    f71e:	1c04      	adds	r4, r0, #0
-    f720:	2800      	cmp	r0, #0
-    f722:	d105      	bne.n	f730 <fflush+0x14>
-    f724:	4b1b      	ldr	r3, [pc, #108]	(f794 <.text+0xf794>)
-    f726:	491c      	ldr	r1, [pc, #112]	(f798 <.text+0xf798>)
-    f728:	6818      	ldr	r0, [r3, #0]
-    f72a:	f000 fb93 	bl	fe54 <_fwalk>
-    f72e:	e02e      	b.n	f78e <fflush+0x72>
-    f730:	4b1a      	ldr	r3, [pc, #104]	(f79c <.text+0xf79c>)
-    f732:	6818      	ldr	r0, [r3, #0]
-    f734:	2800      	cmp	r0, #0
-    f736:	d004      	beq.n	f742 <fflush+0x26>
-    f738:	6b83      	ldr	r3, [r0, #56]
-    f73a:	2b00      	cmp	r3, #0
-    f73c:	d101      	bne.n	f742 <fflush+0x26>
-    f73e:	f000 f84d 	bl	f7dc <__sinit>
-    f742:	230c      	movs	r3, #12
-    f744:	5ee1      	ldrsh	r1, [r4, r3]
-    f746:	070b      	lsls	r3, r1, #28
-    f748:	d520      	bpl.n	f78c <fflush+0x70>
-    f74a:	6926      	ldr	r6, [r4, #16]
-    f74c:	2e00      	cmp	r6, #0
-    f74e:	d01d      	beq.n	f78c <fflush+0x70>
-    f750:	2303      	movs	r3, #3
-    f752:	6822      	ldr	r2, [r4, #0]
-    f754:	6026      	str	r6, [r4, #0]
-    f756:	4219      	tst	r1, r3
-    f758:	d008      	beq.n	f76c <fflush+0x50>
-    f75a:	2300      	movs	r3, #0
-    f75c:	e007      	b.n	f76e <fflush+0x52>
-    f75e:	89a3      	ldrh	r3, [r4, #12]
-    f760:	2240      	movs	r2, #64
-    f762:	2001      	movs	r0, #1
-    f764:	4313      	orrs	r3, r2
-    f766:	4240      	negs	r0, r0
-    f768:	81a3      	strh	r3, [r4, #12]
-    f76a:	e010      	b.n	f78e <fflush+0x72>
-    f76c:	6963      	ldr	r3, [r4, #20]
-    f76e:	1b95      	subs	r5, r2, r6
-    f770:	60a3      	str	r3, [r4, #8]
-    f772:	e009      	b.n	f788 <fflush+0x6c>
-    f774:	69e0      	ldr	r0, [r4, #28]
-    f776:	6a63      	ldr	r3, [r4, #36]
-    f778:	1c31      	adds	r1, r6, #0
-    f77a:	1c2a      	adds	r2, r5, #0
-    f77c:	f000 f810 	bl	f7a0 <.text+0xf7a0>
-    f780:	2800      	cmp	r0, #0
-    f782:	ddec      	ble.n	f75e <fflush+0x42>
-    f784:	1836      	adds	r6, r6, r0
-    f786:	1a2d      	subs	r5, r5, r0
-    f788:	2d00      	cmp	r5, #0
-    f78a:	dcf3      	bgt.n	f774 <fflush+0x58>
-    f78c:	2000      	movs	r0, #0
-    f78e:	bc70      	pop	{r4, r5, r6}
-    f790:	bc02      	pop	{r1}
-    f792:	4708      	bx	r1
-    f794:	5524      	strb	r4, [r4, r4]
-    f796:	0001      	lsls	r1, r0, #0
-    f798:	f71d 0000 	undefined
-    f79c:	0020      	lsls	r0, r4, #0
-    f79e:	4000      	ands	r0, r0
-    f7a0:	4718      	bx	r3
-    f7a2:	46c0      	nop			(mov r8, r8)
-
-0000f7a4 <std>:
-    f7a4:	2300      	movs	r3, #0
-    f7a6:	6003      	str	r3, [r0, #0]
-    f7a8:	6043      	str	r3, [r0, #4]
-    f7aa:	6083      	str	r3, [r0, #8]
-    f7ac:	6103      	str	r3, [r0, #16]
-    f7ae:	6143      	str	r3, [r0, #20]
-    f7b0:	6183      	str	r3, [r0, #24]
-    f7b2:	4b06      	ldr	r3, [pc, #24]	(f7cc <.text+0xf7cc>)
-    f7b4:	6203      	str	r3, [r0, #32]
-    f7b6:	4b06      	ldr	r3, [pc, #24]	(f7d0 <.text+0xf7d0>)
-    f7b8:	6243      	str	r3, [r0, #36]
-    f7ba:	4b06      	ldr	r3, [pc, #24]	(f7d4 <.text+0xf7d4>)
-    f7bc:	6283      	str	r3, [r0, #40]
-    f7be:	4b06      	ldr	r3, [pc, #24]	(f7d8 <.text+0xf7d8>)
-    f7c0:	8181      	strh	r1, [r0, #12]
-    f7c2:	81c2      	strh	r2, [r0, #14]
-    f7c4:	61c0      	str	r0, [r0, #28]
-    f7c6:	62c3      	str	r3, [r0, #44]
-    f7c8:	4770      	bx	lr
-    f7ca:	0000      	lsls	r0, r0, #0
-    f7cc:	1135      	asrs	r5, r6, #4
-    f7ce:	0001      	lsls	r1, r0, #0
-    f7d0:	10f1      	asrs	r1, r6, #3
-    f7d2:	0001      	lsls	r1, r0, #0
-    f7d4:	10b5      	asrs	r5, r6, #2
-    f7d6:	0001      	lsls	r1, r0, #0
-    f7d8:	109d      	asrs	r5, r3, #2
-    f7da:	0001      	lsls	r1, r0, #0
-
-0000f7dc <__sinit>:
-    f7dc:	b510      	push	{r4, lr}
-    f7de:	6b82      	ldr	r2, [r0, #56]
-    f7e0:	1c04      	adds	r4, r0, #0
-    f7e2:	2a00      	cmp	r2, #0
-    f7e4:	d122      	bne.n	f82c <__sinit+0x50>
-    f7e6:	4b13      	ldr	r3, [pc, #76]	(f834 <.text+0xf834>)
-    f7e8:	63c3      	str	r3, [r0, #60]
-    f7ea:	2301      	movs	r3, #1
-    f7ec:	6383      	str	r3, [r0, #56]
-    f7ee:	23b8      	movs	r3, #184
-    f7f0:	009b      	lsls	r3, r3, #2
-    f7f2:	50c2      	str	r2, [r0, r3]
-    f7f4:	23b9      	movs	r3, #185
-    f7f6:	009b      	lsls	r3, r3, #2
-    f7f8:	2203      	movs	r2, #3
-    f7fa:	21bb      	movs	r1, #187
-    f7fc:	50c2      	str	r2, [r0, r3]
-    f7fe:	0089      	lsls	r1, r1, #2
-    f800:	23ba      	movs	r3, #186
-    f802:	1842      	adds	r2, r0, r1
-    f804:	009b      	lsls	r3, r3, #2
-    f806:	50c2      	str	r2, [r0, r3]
-    f808:	2104      	movs	r1, #4
-    f80a:	6840      	ldr	r0, [r0, #4]
-    f80c:	2200      	movs	r2, #0
-    f80e:	1c23      	adds	r3, r4, #0
-    f810:	f7ff ffc8 	bl	f7a4 <std>
-    f814:	68a0      	ldr	r0, [r4, #8]
-    f816:	2109      	movs	r1, #9
-    f818:	2201      	movs	r2, #1
-    f81a:	1c23      	adds	r3, r4, #0
-    f81c:	f7ff ffc2 	bl	f7a4 <std>
-    f820:	68e0      	ldr	r0, [r4, #12]
-    f822:	210a      	movs	r1, #10
-    f824:	2202      	movs	r2, #2
-    f826:	1c23      	adds	r3, r4, #0
-    f828:	f7ff ffbc 	bl	f7a4 <std>
-    f82c:	bc10      	pop	{r4}
-    f82e:	bc01      	pop	{r0}
-    f830:	4700      	bx	r0
-    f832:	0000      	lsls	r0, r0, #0
-    f834:	f851 0000 	ldr.w	r0, [r1, r0]
-
-0000f838 <__sfp_lock_acquire>:
-    f838:	4770      	bx	lr
-	...
-
-0000f83c <__sfp_lock_release>:
-    f83c:	4770      	bx	lr
-	...
-
-0000f840 <__sinit_lock_acquire>:
-    f840:	4770      	bx	lr
-	...
-
-0000f844 <__sinit_lock_release>:
-    f844:	4770      	bx	lr
-	...
-
-0000f848 <__fp_lock>:
-    f848:	2000      	movs	r0, #0
-    f84a:	4770      	bx	lr
-
-0000f84c <__fp_unlock>:
-    f84c:	2000      	movs	r0, #0
-    f84e:	4770      	bx	lr
-
-0000f850 <_cleanup_r>:
-    f850:	b500      	push	{lr}
-    f852:	4902      	ldr	r1, [pc, #8]	(f85c <.text+0xf85c>)
-    f854:	f000 fafe 	bl	fe54 <_fwalk>
-    f858:	bc01      	pop	{r0}
-    f85a:	4700      	bx	r0
-    f85c:	1281      	asrs	r1, r0, #10
-    f85e:	0001      	lsls	r1, r0, #0
-
-0000f860 <_cleanup>:
-    f860:	b500      	push	{lr}
-    f862:	4b03      	ldr	r3, [pc, #12]	(f870 <.text+0xf870>)
-    f864:	6818      	ldr	r0, [r3, #0]
-    f866:	f7ff fff3 	bl	f850 <_cleanup_r>
-    f86a:	bc01      	pop	{r0}
-    f86c:	4700      	bx	r0
-    f86e:	0000      	lsls	r0, r0, #0
-    f870:	5524      	strb	r4, [r4, r4]
-    f872:	0001      	lsls	r1, r0, #0
-
-0000f874 <__sfmoreglue>:
-    f874:	b570      	push	{r4, r5, r6, lr}
-    f876:	235c      	movs	r3, #92
-    f878:	1c0e      	adds	r6, r1, #0
-    f87a:	435e      	muls	r6, r3
-    f87c:	1c0d      	adds	r5, r1, #0
-    f87e:	1c31      	adds	r1, r6, #0
-    f880:	310c      	adds	r1, #12
-    f882:	f000 fbbb 	bl	fffc <_malloc_r>
-    f886:	2800      	cmp	r0, #0
-    f888:	d101      	bne.n	f88e <__sfmoreglue+0x1a>
-    f88a:	2400      	movs	r4, #0
-    f88c:	e009      	b.n	f8a2 <__sfmoreglue+0x2e>
-    f88e:	1c04      	adds	r4, r0, #0
-    f890:	2300      	movs	r3, #0
-    f892:	300c      	adds	r0, #12
-    f894:	6023      	str	r3, [r4, #0]
-    f896:	6065      	str	r5, [r4, #4]
-    f898:	60a0      	str	r0, [r4, #8]
-    f89a:	2100      	movs	r1, #0
-    f89c:	1c32      	adds	r2, r6, #0
-    f89e:	f000 fe2b 	bl	104f8 <memset>
-    f8a2:	1c20      	adds	r0, r4, #0
-    f8a4:	bc70      	pop	{r4, r5, r6}
-    f8a6:	bc02      	pop	{r1}
-    f8a8:	4708      	bx	r1
-	...
-
-0000f8ac <__fp_unlock_all>:
-    f8ac:	b500      	push	{lr}
-    f8ae:	4b03      	ldr	r3, [pc, #12]	(f8bc <.text+0xf8bc>)
-    f8b0:	4903      	ldr	r1, [pc, #12]	(f8c0 <.text+0xf8c0>)
-    f8b2:	6818      	ldr	r0, [r3, #0]
-    f8b4:	f000 face 	bl	fe54 <_fwalk>
-    f8b8:	bc01      	pop	{r0}
-    f8ba:	4700      	bx	r0
-    f8bc:	0020      	lsls	r0, r4, #0
-    f8be:	4000      	ands	r0, r0
-    f8c0:	f84d 0000 	str.w	r0, [sp, r0]
-
-0000f8c4 <__fp_lock_all>:
-    f8c4:	b500      	push	{lr}
-    f8c6:	4b03      	ldr	r3, [pc, #12]	(f8d4 <.text+0xf8d4>)
-    f8c8:	4903      	ldr	r1, [pc, #12]	(f8d8 <.text+0xf8d8>)
-    f8ca:	6818      	ldr	r0, [r3, #0]
-    f8cc:	f000 fac2 	bl	fe54 <_fwalk>
-    f8d0:	bc01      	pop	{r0}
-    f8d2:	4700      	bx	r0
-    f8d4:	0020      	lsls	r0, r4, #0
-    f8d6:	4000      	ands	r0, r0
-    f8d8:	f849 0000 	str.w	r0, [r9, r0]
-
-0000f8dc <__sfp>:
-    f8dc:	b530      	push	{r4, r5, lr}
-    f8de:	4b1c      	ldr	r3, [pc, #112]	(f950 <.text+0xf950>)
-    f8e0:	681c      	ldr	r4, [r3, #0]
-    f8e2:	6ba3      	ldr	r3, [r4, #56]
-    f8e4:	1c05      	adds	r5, r0, #0
-    f8e6:	2b00      	cmp	r3, #0
-    f8e8:	d102      	bne.n	f8f0 <__sfp+0x14>
-    f8ea:	1c20      	adds	r0, r4, #0
-    f8ec:	f7ff ff76 	bl	f7dc <__sinit>
-    f8f0:	21b8      	movs	r1, #184
-    f8f2:	0089      	lsls	r1, r1, #2
-    f8f4:	1864      	adds	r4, r4, r1
-    f8f6:	68a0      	ldr	r0, [r4, #8]
-    f8f8:	6863      	ldr	r3, [r4, #4]
-    f8fa:	e004      	b.n	f906 <__sfp+0x2a>
-    f8fc:	210c      	movs	r1, #12
-    f8fe:	5e42      	ldrsh	r2, [r0, r1]
-    f900:	2a00      	cmp	r2, #0
-    f902:	d012      	beq.n	f92a <__sfp+0x4e>
-    f904:	305c      	adds	r0, #92
-    f906:	3b01      	subs	r3, #1
-    f908:	d5f8      	bpl.n	f8fc <__sfp+0x20>
-    f90a:	6823      	ldr	r3, [r4, #0]
-    f90c:	2b00      	cmp	r3, #0
-    f90e:	d106      	bne.n	f91e <__sfp+0x42>
-    f910:	1c28      	adds	r0, r5, #0
-    f912:	2104      	movs	r1, #4
-    f914:	f7ff ffae 	bl	f874 <__sfmoreglue>
-    f918:	6020      	str	r0, [r4, #0]
-    f91a:	2800      	cmp	r0, #0
-    f91c:	d001      	beq.n	f922 <__sfp+0x46>
-    f91e:	6824      	ldr	r4, [r4, #0]
-    f920:	e7e9      	b.n	f8f6 <__sfp+0x1a>
-    f922:	230c      	movs	r3, #12
-    f924:	2000      	movs	r0, #0
-    f926:	602b      	str	r3, [r5, #0]
-    f928:	e00e      	b.n	f948 <__sfp+0x6c>
-    f92a:	2301      	movs	r3, #1
-    f92c:	425b      	negs	r3, r3
-    f92e:	81c3      	strh	r3, [r0, #14]
-    f930:	2301      	movs	r3, #1
-    f932:	8183      	strh	r3, [r0, #12]
-    f934:	6002      	str	r2, [r0, #0]
-    f936:	6082      	str	r2, [r0, #8]
-    f938:	6042      	str	r2, [r0, #4]
-    f93a:	6102      	str	r2, [r0, #16]
-    f93c:	6142      	str	r2, [r0, #20]
-    f93e:	6182      	str	r2, [r0, #24]
-    f940:	6302      	str	r2, [r0, #48]
-    f942:	6342      	str	r2, [r0, #52]
-    f944:	6442      	str	r2, [r0, #68]
-    f946:	6482      	str	r2, [r0, #72]
-    f948:	bc30      	pop	{r4, r5}
-    f94a:	bc02      	pop	{r1}
-    f94c:	4708      	bx	r1
-    f94e:	0000      	lsls	r0, r0, #0
-    f950:	5524      	strb	r4, [r4, r4]
-    f952:	0001      	lsls	r1, r0, #0
-
-0000f954 <_malloc_trim_r>:
-    f954:	b5f0      	push	{r4, r5, r6, r7, lr}
-    f956:	1c0c      	adds	r4, r1, #0
-    f958:	1c05      	adds	r5, r0, #0
-    f95a:	f000 fdd5 	bl	10508 <__malloc_lock>
-    f95e:	4f21      	ldr	r7, [pc, #132]	(f9e4 <.text+0xf9e4>)
-    f960:	68bb      	ldr	r3, [r7, #8]
-    f962:	685a      	ldr	r2, [r3, #4]
-    f964:	2303      	movs	r3, #3
-    f966:	1c16      	adds	r6, r2, #0
-    f968:	439e      	bics	r6, r3
-    f96a:	4b1f      	ldr	r3, [pc, #124]	(f9e8 <.text+0xf9e8>)
-    f96c:	1b34      	subs	r4, r6, r4
-    f96e:	18e4      	adds	r4, r4, r3
-    f970:	0b24      	lsrs	r4, r4, #12
-    f972:	3c01      	subs	r4, #1
-    f974:	0324      	lsls	r4, r4, #12
-    f976:	3310      	adds	r3, #16
-    f978:	429c      	cmp	r4, r3
-    f97a:	dd1d      	ble.n	f9b8 <_malloc_trim_r+0x64>
-    f97c:	1c28      	adds	r0, r5, #0
-    f97e:	2100      	movs	r1, #0
-    f980:	f005 fc2c 	bl	151dc <___sbrk_r_from_thumb>
-    f984:	68bb      	ldr	r3, [r7, #8]
-    f986:	18f3      	adds	r3, r6, r3
-    f988:	4298      	cmp	r0, r3
-    f98a:	d115      	bne.n	f9b8 <_malloc_trim_r+0x64>
-    f98c:	4261      	negs	r1, r4
-    f98e:	1c28      	adds	r0, r5, #0
-    f990:	f005 fc24 	bl	151dc <___sbrk_r_from_thumb>
-    f994:	3001      	adds	r0, #1
-    f996:	d114      	bne.n	f9c2 <_malloc_trim_r+0x6e>
-    f998:	2100      	movs	r1, #0
-    f99a:	1c28      	adds	r0, r5, #0
-    f99c:	f005 fc1e 	bl	151dc <___sbrk_r_from_thumb>
-    f9a0:	68bc      	ldr	r4, [r7, #8]
-    f9a2:	1b01      	subs	r1, r0, r4
-    f9a4:	290f      	cmp	r1, #15
-    f9a6:	dd07      	ble.n	f9b8 <_malloc_trim_r+0x64>
-    f9a8:	4b10      	ldr	r3, [pc, #64]	(f9ec <.text+0xf9ec>)
-    f9aa:	681b      	ldr	r3, [r3, #0]
-    f9ac:	4a10      	ldr	r2, [pc, #64]	(f9f0 <.text+0xf9f0>)
-    f9ae:	1ac3      	subs	r3, r0, r3
-    f9b0:	6013      	str	r3, [r2, #0]
-    f9b2:	2301      	movs	r3, #1
-    f9b4:	430b      	orrs	r3, r1
-    f9b6:	6063      	str	r3, [r4, #4]
-    f9b8:	1c28      	adds	r0, r5, #0
-    f9ba:	f000 fda7 	bl	1050c <__malloc_unlock>
-    f9be:	2000      	movs	r0, #0
-    f9c0:	e00c      	b.n	f9dc <_malloc_trim_r+0x88>
-    f9c2:	2201      	movs	r2, #1
-    f9c4:	1b33      	subs	r3, r6, r4
-    f9c6:	4313      	orrs	r3, r2
-    f9c8:	68b9      	ldr	r1, [r7, #8]
-    f9ca:	4a09      	ldr	r2, [pc, #36]	(f9f0 <.text+0xf9f0>)
-    f9cc:	604b      	str	r3, [r1, #4]
-    f9ce:	6813      	ldr	r3, [r2, #0]
-    f9d0:	1b1b      	subs	r3, r3, r4
-    f9d2:	1c28      	adds	r0, r5, #0
-    f9d4:	6013      	str	r3, [r2, #0]
-    f9d6:	f000 fd99 	bl	1050c <__malloc_unlock>
-    f9da:	2001      	movs	r0, #1
-    f9dc:	bcf0      	pop	{r4, r5, r6, r7}
-    f9de:	bc02      	pop	{r1}
-    f9e0:	4708      	bx	r1
-    f9e2:	0000      	lsls	r0, r0, #0
-    f9e4:	0434      	lsls	r4, r6, #16
-    f9e6:	4000      	ands	r0, r0
-    f9e8:	0fef      	lsrs	r7, r5, #31
-    f9ea:	0000      	lsls	r0, r0, #0
-    f9ec:	0840      	lsrs	r0, r0, #1
-    f9ee:	4000      	ands	r0, r0
-    f9f0:	0b1c      	lsrs	r4, r3, #12
-    f9f2:	4000      	ands	r0, r0
-
-0000f9f4 <_free_r>:
-    f9f4:	b5f0      	push	{r4, r5, r6, r7, lr}
-    f9f6:	b081      	sub	sp, #4
-    f9f8:	9000      	str	r0, [sp, #0]
-    f9fa:	1c0c      	adds	r4, r1, #0
-    f9fc:	2900      	cmp	r1, #0
-    f9fe:	d100      	bne.n	fa02 <_free_r+0xe>
-    fa00:	e0bd      	b.n	fb7e <_free_r+0x18a>
-    fa02:	1c26      	adds	r6, r4, #0
-    fa04:	3e08      	subs	r6, #8
-    fa06:	f000 fd7f 	bl	10508 <__malloc_lock>
-    fa0a:	6871      	ldr	r1, [r6, #4]
-    fa0c:	2201      	movs	r2, #1
-    fa0e:	1c0c      	adds	r4, r1, #0
-    fa10:	4394      	bics	r4, r2
-    fa12:	1930      	adds	r0, r6, r4
-    fa14:	4694      	mov	ip, r2
-    fa16:	6842      	ldr	r2, [r0, #4]
-    fa18:	4f5b      	ldr	r7, [pc, #364]	(fb88 <.text+0xfb88>)
-    fa1a:	2303      	movs	r3, #3
-    fa1c:	1c15      	adds	r5, r2, #0
-    fa1e:	439d      	bics	r5, r3
-    fa20:	68bb      	ldr	r3, [r7, #8]
-    fa22:	4662      	mov	r2, ip
-    fa24:	4011      	ands	r1, r2
-    fa26:	4298      	cmp	r0, r3
-    fa28:	d118      	bne.n	fa5c <_free_r+0x68>
-    fa2a:	1960      	adds	r0, r4, r5
-    fa2c:	2900      	cmp	r1, #0
-    fa2e:	d106      	bne.n	fa3e <_free_r+0x4a>
-    fa30:	6833      	ldr	r3, [r6, #0]
-    fa32:	1af6      	subs	r6, r6, r3
-    fa34:	68f2      	ldr	r2, [r6, #12]
-    fa36:	18c0      	adds	r0, r0, r3
-    fa38:	68b3      	ldr	r3, [r6, #8]
-    fa3a:	60da      	str	r2, [r3, #12]
-    fa3c:	6093      	str	r3, [r2, #8]
-    fa3e:	4663      	mov	r3, ip
-    fa40:	4303      	orrs	r3, r0
-    fa42:	6073      	str	r3, [r6, #4]
-    fa44:	4b51      	ldr	r3, [pc, #324]	(fb8c <.text+0xfb8c>)
-    fa46:	681b      	ldr	r3, [r3, #0]
-    fa48:	60be      	str	r6, [r7, #8]
-    fa4a:	4298      	cmp	r0, r3
-    fa4c:	d200      	bcs.n	fa50 <_free_r+0x5c>
-    fa4e:	e093      	b.n	fb78 <_free_r+0x184>
-    fa50:	4b4f      	ldr	r3, [pc, #316]	(fb90 <.text+0xfb90>)
-    fa52:	9800      	ldr	r0, [sp, #0]
-    fa54:	6819      	ldr	r1, [r3, #0]
-    fa56:	f7ff ff7d 	bl	f954 <_malloc_trim_r>
-    fa5a:	e08d      	b.n	fb78 <_free_r+0x184>
-    fa5c:	6045      	str	r5, [r0, #4]
-    fa5e:	2900      	cmp	r1, #0
-    fa60:	d10c      	bne.n	fa7c <_free_r+0x88>
-    fa62:	6833      	ldr	r3, [r6, #0]
-    fa64:	1af6      	subs	r6, r6, r3
-    fa66:	18e4      	adds	r4, r4, r3
-    fa68:	68b2      	ldr	r2, [r6, #8]
-    fa6a:	1c3b      	adds	r3, r7, #0
-    fa6c:	3308      	adds	r3, #8
-    fa6e:	429a      	cmp	r2, r3
-    fa70:	d101      	bne.n	fa76 <_free_r+0x82>
-    fa72:	2101      	movs	r1, #1
-    fa74:	e003      	b.n	fa7e <_free_r+0x8a>
-    fa76:	68f3      	ldr	r3, [r6, #12]
-    fa78:	60d3      	str	r3, [r2, #12]
-    fa7a:	609a      	str	r2, [r3, #8]
-    fa7c:	2100      	movs	r1, #0
-    fa7e:	1943      	adds	r3, r0, r5
-    fa80:	685b      	ldr	r3, [r3, #4]
-    fa82:	2201      	movs	r2, #1
-    fa84:	4694      	mov	ip, r2
-    fa86:	4213      	tst	r3, r2
-    fa88:	d114      	bne.n	fab4 <_free_r+0xc0>
-    fa8a:	1964      	adds	r4, r4, r5
-    fa8c:	2900      	cmp	r1, #0
-    fa8e:	d10d      	bne.n	faac <_free_r+0xb8>
-    fa90:	4b3d      	ldr	r3, [pc, #244]	(fb88 <.text+0xfb88>)
-    fa92:	6882      	ldr	r2, [r0, #8]
-    fa94:	3308      	adds	r3, #8
-    fa96:	429a      	cmp	r2, r3
-    fa98:	d108      	bne.n	faac <_free_r+0xb8>
-    fa9a:	4663      	mov	r3, ip
-    fa9c:	4323      	orrs	r3, r4
-    fa9e:	60d6      	str	r6, [r2, #12]
-    faa0:	6096      	str	r6, [r2, #8]
-    faa2:	60f2      	str	r2, [r6, #12]
-    faa4:	60b2      	str	r2, [r6, #8]
-    faa6:	6073      	str	r3, [r6, #4]
-    faa8:	5134      	str	r4, [r6, r4]
-    faaa:	e065      	b.n	fb78 <_free_r+0x184>
-    faac:	68c2      	ldr	r2, [r0, #12]
-    faae:	6883      	ldr	r3, [r0, #8]
-    fab0:	60da      	str	r2, [r3, #12]
-    fab2:	6093      	str	r3, [r2, #8]
-    fab4:	2001      	movs	r0, #1
-    fab6:	1c23      	adds	r3, r4, #0
-    fab8:	4303      	orrs	r3, r0
-    faba:	6073      	str	r3, [r6, #4]
-    fabc:	5134      	str	r4, [r6, r4]
-    fabe:	2900      	cmp	r1, #0
-    fac0:	d15a      	bne.n	fb78 <_free_r+0x184>
-    fac2:	4b34      	ldr	r3, [pc, #208]	(fb94 <.text+0xfb94>)
-    fac4:	429c      	cmp	r4, r3
-    fac6:	d812      	bhi.n	faee <_free_r+0xfa>
-    fac8:	08e1      	lsrs	r1, r4, #3
-    faca:	1c0a      	adds	r2, r1, #0
-    facc:	2900      	cmp	r1, #0
-    face:	da00      	bge.n	fad2 <_free_r+0xde>
-    fad0:	1cca      	adds	r2, r1, #3
-    fad2:	1092      	asrs	r2, r2, #2
-    fad4:	687b      	ldr	r3, [r7, #4]
-    fad6:	4090      	lsls	r0, r2
-    fad8:	4303      	orrs	r3, r0
-    fada:	4a2b      	ldr	r2, [pc, #172]	(fb88 <.text+0xfb88>)
-    fadc:	607b      	str	r3, [r7, #4]
-    fade:	00cb      	lsls	r3, r1, #3
-    fae0:	189b      	adds	r3, r3, r2
-    fae2:	689a      	ldr	r2, [r3, #8]
-    fae4:	60f3      	str	r3, [r6, #12]
-    fae6:	60b2      	str	r2, [r6, #8]
-    fae8:	60d6      	str	r6, [r2, #12]
-    faea:	609e      	str	r6, [r3, #8]
-    faec:	e044      	b.n	fb78 <_free_r+0x184>
-    faee:	0a62      	lsrs	r2, r4, #9
-    faf0:	2a00      	cmp	r2, #0
-    faf2:	d101      	bne.n	faf8 <_free_r+0x104>
-    faf4:	08e1      	lsrs	r1, r4, #3
-    faf6:	e020      	b.n	fb3a <_free_r+0x146>
-    faf8:	2a04      	cmp	r2, #4
-    fafa:	d803      	bhi.n	fb04 <_free_r+0x110>
-    fafc:	09a3      	lsrs	r3, r4, #6
-    fafe:	1c19      	adds	r1, r3, #0
-    fb00:	3138      	adds	r1, #56
-    fb02:	e01a      	b.n	fb3a <_free_r+0x146>
-    fb04:	2a14      	cmp	r2, #20
-    fb06:	d802      	bhi.n	fb0e <_free_r+0x11a>
-    fb08:	1c11      	adds	r1, r2, #0
-    fb0a:	315b      	adds	r1, #91
-    fb0c:	e015      	b.n	fb3a <_free_r+0x146>
-    fb0e:	2a54      	cmp	r2, #84
-    fb10:	d803      	bhi.n	fb1a <_free_r+0x126>
-    fb12:	0b23      	lsrs	r3, r4, #12
-    fb14:	1c19      	adds	r1, r3, #0
-    fb16:	316e      	adds	r1, #110
-    fb18:	e00f      	b.n	fb3a <_free_r+0x146>
-    fb1a:	23aa      	movs	r3, #170
-    fb1c:	005b      	lsls	r3, r3, #1
-    fb1e:	429a      	cmp	r2, r3
-    fb20:	d803      	bhi.n	fb2a <_free_r+0x136>
-    fb22:	0be3      	lsrs	r3, r4, #15
-    fb24:	1c19      	adds	r1, r3, #0
-    fb26:	3177      	adds	r1, #119
-    fb28:	e007      	b.n	fb3a <_free_r+0x146>
-    fb2a:	4b1b      	ldr	r3, [pc, #108]	(fb98 <.text+0xfb98>)
-    fb2c:	429a      	cmp	r2, r3
-    fb2e:	d901      	bls.n	fb34 <_free_r+0x140>
-    fb30:	217e      	movs	r1, #126
-    fb32:	e002      	b.n	fb3a <_free_r+0x146>
-    fb34:	0ca3      	lsrs	r3, r4, #18
-    fb36:	1c19      	adds	r1, r3, #0
-    fb38:	317c      	adds	r1, #124
-    fb3a:	4a13      	ldr	r2, [pc, #76]	(fb88 <.text+0xfb88>)
-    fb3c:	00cb      	lsls	r3, r1, #3
-    fb3e:	189d      	adds	r5, r3, r2
-    fb40:	68a8      	ldr	r0, [r5, #8]
-    fb42:	42a8      	cmp	r0, r5
-    fb44:	d10e      	bne.n	fb64 <_free_r+0x170>
-    fb46:	1c0b      	adds	r3, r1, #0
-    fb48:	2900      	cmp	r1, #0
-    fb4a:	da00      	bge.n	fb4e <_free_r+0x15a>
-    fb4c:	3303      	adds	r3, #3
-    fb4e:	109b      	asrs	r3, r3, #2
-    fb50:	2201      	movs	r2, #1
-    fb52:	409a      	lsls	r2, r3
-    fb54:	687b      	ldr	r3, [r7, #4]
-    fb56:	4313      	orrs	r3, r2
-    fb58:	607b      	str	r3, [r7, #4]
-    fb5a:	1c03      	adds	r3, r0, #0
-    fb5c:	e008      	b.n	fb70 <_free_r+0x17c>
-    fb5e:	6880      	ldr	r0, [r0, #8]
-    fb60:	42a8      	cmp	r0, r5
-    fb62:	d004      	beq.n	fb6e <_free_r+0x17a>
-    fb64:	6843      	ldr	r3, [r0, #4]
-    fb66:	2203      	movs	r2, #3
-    fb68:	4393      	bics	r3, r2
-    fb6a:	429c      	cmp	r4, r3
-    fb6c:	d3f7      	bcc.n	fb5e <_free_r+0x16a>
-    fb6e:	68c3      	ldr	r3, [r0, #12]
-    fb70:	60f3      	str	r3, [r6, #12]
-    fb72:	60b0      	str	r0, [r6, #8]
-    fb74:	60c6      	str	r6, [r0, #12]
-    fb76:	609e      	str	r6, [r3, #8]
-    fb78:	9800      	ldr	r0, [sp, #0]
-    fb7a:	f000 fcc7 	bl	1050c <__malloc_unlock>
-    fb7e:	b001      	add	sp, #4
-    fb80:	bcf0      	pop	{r4, r5, r6, r7}
-    fb82:	bc01      	pop	{r0}
-    fb84:	4700      	bx	r0
-    fb86:	0000      	lsls	r0, r0, #0
-    fb88:	0434      	lsls	r4, r6, #16
-    fb8a:	4000      	ands	r0, r0
-    fb8c:	083c      	lsrs	r4, r7, #32
-    fb8e:	4000      	ands	r0, r0
-    fb90:	0b10      	lsrs	r0, r2, #12
-    fb92:	4000      	ands	r0, r0
-    fb94:	01ff      	lsls	r7, r7, #7
-    fb96:	0000      	lsls	r0, r0, #0
-    fb98:	0554      	lsls	r4, r2, #21
-	...
-
-0000fb9c <__sfvwrite>:
-    fb9c:	b5f0      	push	{r4, r5, r6, r7, lr}
-    fb9e:	688b      	ldr	r3, [r1, #8]
-    fba0:	b087      	sub	sp, #28
-    fba2:	1c05      	adds	r5, r0, #0
-    fba4:	9100      	str	r1, [sp, #0]
-    fba6:	2b00      	cmp	r3, #0
-    fba8:	d100      	bne.n	fbac <__sfvwrite+0x10>
-    fbaa:	e11c      	b.n	fde6 <__sfvwrite+0x24a>
-    fbac:	8983      	ldrh	r3, [r0, #12]
-    fbae:	071a      	lsls	r2, r3, #28
-    fbb0:	d502      	bpl.n	fbb8 <__sfvwrite+0x1c>
-    fbb2:	6903      	ldr	r3, [r0, #16]
-    fbb4:	2b00      	cmp	r3, #0
-    fbb6:	d105      	bne.n	fbc4 <__sfvwrite+0x28>
-    fbb8:	1c28      	adds	r0, r5, #0
-    fbba:	f7fe fecd 	bl	e958 <__swsetup>
-    fbbe:	2800      	cmp	r0, #0
-    fbc0:	d000      	beq.n	fbc4 <__sfvwrite+0x28>
-    fbc2:	e10d      	b.n	fde0 <__sfvwrite+0x244>
-    fbc4:	9b00      	ldr	r3, [sp, #0]
-    fbc6:	681b      	ldr	r3, [r3, #0]
-    fbc8:	9304      	str	r3, [sp, #16]
-    fbca:	89ab      	ldrh	r3, [r5, #12]
-    fbcc:	079a      	lsls	r2, r3, #30
-    fbce:	d521      	bpl.n	fc14 <__sfvwrite+0x78>
-    fbd0:	2400      	movs	r4, #0
-    fbd2:	2600      	movs	r6, #0
-    fbd4:	e004      	b.n	fbe0 <__sfvwrite+0x44>
-    fbd6:	9b04      	ldr	r3, [sp, #16]
-    fbd8:	681e      	ldr	r6, [r3, #0]
-    fbda:	685c      	ldr	r4, [r3, #4]
-    fbdc:	3308      	adds	r3, #8
-    fbde:	9304      	str	r3, [sp, #16]
-    fbe0:	2c00      	cmp	r4, #0
-    fbe2:	d0f8      	beq.n	fbd6 <__sfvwrite+0x3a>
-    fbe4:	2380      	movs	r3, #128
-    fbe6:	00db      	lsls	r3, r3, #3
-    fbe8:	69e8      	ldr	r0, [r5, #28]
-    fbea:	1c22      	adds	r2, r4, #0
-    fbec:	429c      	cmp	r4, r3
-    fbee:	d900      	bls.n	fbf2 <__sfvwrite+0x56>
-    fbf0:	1c1a      	adds	r2, r3, #0
-    fbf2:	6a6b      	ldr	r3, [r5, #36]
-    fbf4:	1c31      	adds	r1, r6, #0
-    fbf6:	f000 f8fd 	bl	fdf4 <.text+0xfdf4>
-    fbfa:	2800      	cmp	r0, #0
-    fbfc:	dc00      	bgt.n	fc00 <__sfvwrite+0x64>
-    fbfe:	e0eb      	b.n	fdd8 <__sfvwrite+0x23c>
-    fc00:	9a00      	ldr	r2, [sp, #0]
-    fc02:	6893      	ldr	r3, [r2, #8]
-    fc04:	1a1b      	subs	r3, r3, r0
-    fc06:	6093      	str	r3, [r2, #8]
-    fc08:	2b00      	cmp	r3, #0
-    fc0a:	d100      	bne.n	fc0e <__sfvwrite+0x72>
-    fc0c:	e0eb      	b.n	fde6 <__sfvwrite+0x24a>
-    fc0e:	1836      	adds	r6, r6, r0
-    fc10:	1a24      	subs	r4, r4, r0
-    fc12:	e7e5      	b.n	fbe0 <__sfvwrite+0x44>
-    fc14:	07da      	lsls	r2, r3, #31
-    fc16:	d50a      	bpl.n	fc2e <__sfvwrite+0x92>
-    fc18:	2300      	movs	r3, #0
-    fc1a:	2700      	movs	r7, #0
-    fc1c:	9302      	str	r3, [sp, #8]
-    fc1e:	9303      	str	r3, [sp, #12]
-    fc20:	9305      	str	r3, [sp, #20]
-    fc22:	e07b      	b.n	fd1c <__sfvwrite+0x180>
-    fc24:	6820      	ldr	r0, [r4, #0]
-    fc26:	6929      	ldr	r1, [r5, #16]
-    fc28:	f7ff fee4 	bl	f9f4 <_free_r>
-    fc2c:	e0d4      	b.n	fdd8 <__sfvwrite+0x23c>
-    fc2e:	2600      	movs	r6, #0
-    fc30:	9606      	str	r6, [sp, #24]
-    fc32:	e006      	b.n	fc42 <__sfvwrite+0xa6>
-    fc34:	9a04      	ldr	r2, [sp, #16]
-    fc36:	9b04      	ldr	r3, [sp, #16]
-    fc38:	6812      	ldr	r2, [r2, #0]
-    fc3a:	685e      	ldr	r6, [r3, #4]
-    fc3c:	3308      	adds	r3, #8
-    fc3e:	9206      	str	r2, [sp, #24]
-    fc40:	9304      	str	r3, [sp, #16]
-    fc42:	2e00      	cmp	r6, #0
-    fc44:	d0f6      	beq.n	fc34 <__sfvwrite+0x98>
-    fc46:	89ab      	ldrh	r3, [r5, #12]
-    fc48:	68ac      	ldr	r4, [r5, #8]
-    fc4a:	059a      	lsls	r2, r3, #22
-    fc4c:	d526      	bpl.n	fc9c <__sfvwrite+0x100>
-    fc4e:	42a6      	cmp	r6, r4
-    fc50:	d914      	bls.n	fc7c <__sfvwrite+0xe0>
-    fc52:	061a      	lsls	r2, r3, #24
-    fc54:	d512      	bpl.n	fc7c <__sfvwrite+0xe0>
-    fc56:	682b      	ldr	r3, [r5, #0]
-    fc58:	6929      	ldr	r1, [r5, #16]
-    fc5a:	4c65      	ldr	r4, [pc, #404]	(fdf0 <.text+0xfdf0>)
-    fc5c:	1a5f      	subs	r7, r3, r1
-    fc5e:	19bb      	adds	r3, r7, r6
-    fc60:	6820      	ldr	r0, [r4, #0]
-    fc62:	1c1a      	adds	r2, r3, #0
-    fc64:	9301      	str	r3, [sp, #4]
-    fc66:	f001 f86d 	bl	10d44 <_realloc_r>
-    fc6a:	2800      	cmp	r0, #0
-    fc6c:	d0da      	beq.n	fc24 <__sfvwrite+0x88>
-    fc6e:	9a01      	ldr	r2, [sp, #4]
-    fc70:	19c3      	adds	r3, r0, r7
-    fc72:	6128      	str	r0, [r5, #16]
-    fc74:	602b      	str	r3, [r5, #0]
-    fc76:	616a      	str	r2, [r5, #20]
-    fc78:	60ae      	str	r6, [r5, #8]
-    fc7a:	1c34      	adds	r4, r6, #0
-    fc7c:	42a6      	cmp	r6, r4
-    fc7e:	d200      	bcs.n	fc82 <__sfvwrite+0xe6>
-    fc80:	1c34      	adds	r4, r6, #0
-    fc82:	1c22      	adds	r2, r4, #0
-    fc84:	6828      	ldr	r0, [r5, #0]
-    fc86:	9906      	ldr	r1, [sp, #24]
-    fc88:	f000 fc1a 	bl	104c0 <memmove>
-    fc8c:	68ab      	ldr	r3, [r5, #8]
-    fc8e:	1b1b      	subs	r3, r3, r4
-    fc90:	60ab      	str	r3, [r5, #8]
-    fc92:	682b      	ldr	r3, [r5, #0]
-    fc94:	191b      	adds	r3, r3, r4
-    fc96:	1c34      	adds	r4, r6, #0
-    fc98:	602b      	str	r3, [r5, #0]
-    fc9a:	e029      	b.n	fcf0 <__sfvwrite+0x154>
-    fc9c:	6828      	ldr	r0, [r5, #0]
-    fc9e:	692b      	ldr	r3, [r5, #16]
-    fca0:	4298      	cmp	r0, r3
-    fca2:	d90e      	bls.n	fcc2 <__sfvwrite+0x126>
-    fca4:	42a6      	cmp	r6, r4
-    fca6:	d90c      	bls.n	fcc2 <__sfvwrite+0x126>
-    fca8:	9906      	ldr	r1, [sp, #24]
-    fcaa:	1c22      	adds	r2, r4, #0
-    fcac:	f000 fc08 	bl	104c0 <memmove>
-    fcb0:	682b      	ldr	r3, [r5, #0]
-    fcb2:	191b      	adds	r3, r3, r4
-    fcb4:	602b      	str	r3, [r5, #0]
-    fcb6:	1c28      	adds	r0, r5, #0
-    fcb8:	f7ff fd30 	bl	f71c <fflush>
-    fcbc:	2800      	cmp	r0, #0
-    fcbe:	d017      	beq.n	fcf0 <__sfvwrite+0x154>
-    fcc0:	e08a      	b.n	fdd8 <__sfvwrite+0x23c>
-    fcc2:	696a      	ldr	r2, [r5, #20]
-    fcc4:	4296      	cmp	r6, r2
-    fcc6:	d308      	bcc.n	fcda <__sfvwrite+0x13e>
-    fcc8:	69e8      	ldr	r0, [r5, #28]
-    fcca:	6a6b      	ldr	r3, [r5, #36]
-    fccc:	9906      	ldr	r1, [sp, #24]
-    fcce:	f000 f891 	bl	fdf4 <.text+0xfdf4>
-    fcd2:	1c04      	adds	r4, r0, #0
-    fcd4:	2800      	cmp	r0, #0
-    fcd6:	dc0b      	bgt.n	fcf0 <__sfvwrite+0x154>
-    fcd8:	e07e      	b.n	fdd8 <__sfvwrite+0x23c>
-    fcda:	9906      	ldr	r1, [sp, #24]
-    fcdc:	1c32      	adds	r2, r6, #0
-    fcde:	f000 fbef 	bl	104c0 <memmove>
-    fce2:	68ab      	ldr	r3, [r5, #8]
-    fce4:	1b9b      	subs	r3, r3, r6
-    fce6:	60ab      	str	r3, [r5, #8]
-    fce8:	682b      	ldr	r3, [r5, #0]
-    fcea:	199b      	adds	r3, r3, r6
-    fcec:	602b      	str	r3, [r5, #0]
-    fcee:	1c34      	adds	r4, r6, #0
-    fcf0:	9a00      	ldr	r2, [sp, #0]
-    fcf2:	6893      	ldr	r3, [r2, #8]
-    fcf4:	1b1b      	subs	r3, r3, r4
-    fcf6:	6093      	str	r3, [r2, #8]
-    fcf8:	2b00      	cmp	r3, #0
-    fcfa:	d074      	beq.n	fde6 <__sfvwrite+0x24a>
-    fcfc:	9b06      	ldr	r3, [sp, #24]
-    fcfe:	1b36      	subs	r6, r6, r4
-    fd00:	191b      	adds	r3, r3, r4
-    fd02:	9306      	str	r3, [sp, #24]
-    fd04:	e79d      	b.n	fc42 <__sfvwrite+0xa6>
-    fd06:	9a04      	ldr	r2, [sp, #16]
-    fd08:	9b04      	ldr	r3, [sp, #16]
-    fd0a:	6812      	ldr	r2, [r2, #0]
-    fd0c:	685b      	ldr	r3, [r3, #4]
-    fd0e:	9203      	str	r2, [sp, #12]
-    fd10:	9a04      	ldr	r2, [sp, #16]
-    fd12:	9302      	str	r3, [sp, #8]
-    fd14:	3208      	adds	r2, #8
-    fd16:	2300      	movs	r3, #0
-    fd18:	9204      	str	r2, [sp, #16]
-    fd1a:	9305      	str	r3, [sp, #20]
-    fd1c:	9a02      	ldr	r2, [sp, #8]
-    fd1e:	2a00      	cmp	r2, #0
-    fd20:	d0f1      	beq.n	fd06 <__sfvwrite+0x16a>
-    fd22:	9b05      	ldr	r3, [sp, #20]
-    fd24:	2b00      	cmp	r3, #0
-    fd26:	d10f      	bne.n	fd48 <__sfvwrite+0x1ac>
-    fd28:	9803      	ldr	r0, [sp, #12]
-    fd2a:	210a      	movs	r1, #10
-    fd2c:	f000 fbbc 	bl	104a8 <memchr>
-    fd30:	2800      	cmp	r0, #0
-    fd32:	d005      	beq.n	fd40 <__sfvwrite+0x1a4>
-    fd34:	9a03      	ldr	r2, [sp, #12]
-    fd36:	1a83      	subs	r3, r0, r2
-    fd38:	1c5f      	adds	r7, r3, #1
-    fd3a:	2301      	movs	r3, #1
-    fd3c:	9305      	str	r3, [sp, #20]
-    fd3e:	e003      	b.n	fd48 <__sfvwrite+0x1ac>
-    fd40:	9f02      	ldr	r7, [sp, #8]
-    fd42:	2201      	movs	r2, #1
-    fd44:	9205      	str	r2, [sp, #20]
-    fd46:	3701      	adds	r7, #1
-    fd48:	9b02      	ldr	r3, [sp, #8]
-    fd4a:	1c3e      	adds	r6, r7, #0
-    fd4c:	429f      	cmp	r7, r3
-    fd4e:	d900      	bls.n	fd52 <__sfvwrite+0x1b6>
-    fd50:	1c1e      	adds	r6, r3, #0
-    fd52:	6828      	ldr	r0, [r5, #0]
-    fd54:	692b      	ldr	r3, [r5, #16]
-    fd56:	68a9      	ldr	r1, [r5, #8]
-    fd58:	696a      	ldr	r2, [r5, #20]
-    fd5a:	4298      	cmp	r0, r3
-    fd5c:	d90f      	bls.n	fd7e <__sfvwrite+0x1e2>
-    fd5e:	188c      	adds	r4, r1, r2
-    fd60:	42a6      	cmp	r6, r4
-    fd62:	dd0c      	ble.n	fd7e <__sfvwrite+0x1e2>
-    fd64:	9903      	ldr	r1, [sp, #12]
-    fd66:	1c22      	adds	r2, r4, #0
-    fd68:	f000 fbaa 	bl	104c0 <memmove>
-    fd6c:	682b      	ldr	r3, [r5, #0]
-    fd6e:	191b      	adds	r3, r3, r4
-    fd70:	602b      	str	r3, [r5, #0]
-    fd72:	1c28      	adds	r0, r5, #0
-    fd74:	f7ff fcd2 	bl	f71c <fflush>
-    fd78:	2800      	cmp	r0, #0
-    fd7a:	d016      	beq.n	fdaa <__sfvwrite+0x20e>
-    fd7c:	e02c      	b.n	fdd8 <__sfvwrite+0x23c>
-    fd7e:	4296      	cmp	r6, r2
-    fd80:	db08      	blt.n	fd94 <__sfvwrite+0x1f8>
-    fd82:	69e8      	ldr	r0, [r5, #28]
-    fd84:	6a6b      	ldr	r3, [r5, #36]
-    fd86:	9903      	ldr	r1, [sp, #12]
-    fd88:	f000 f834 	bl	fdf4 <.text+0xfdf4>
-    fd8c:	1c04      	adds	r4, r0, #0
-    fd8e:	2800      	cmp	r0, #0
-    fd90:	dc0b      	bgt.n	fdaa <__sfvwrite+0x20e>
-    fd92:	e021      	b.n	fdd8 <__sfvwrite+0x23c>
-    fd94:	9903      	ldr	r1, [sp, #12]
-    fd96:	1c32      	adds	r2, r6, #0
-    fd98:	f000 fb92 	bl	104c0 <memmove>
-    fd9c:	68ab      	ldr	r3, [r5, #8]
-    fd9e:	1b9b      	subs	r3, r3, r6
-    fda0:	60ab      	str	r3, [r5, #8]
-    fda2:	682b      	ldr	r3, [r5, #0]
-    fda4:	199b      	adds	r3, r3, r6
-    fda6:	602b      	str	r3, [r5, #0]
-    fda8:	1c34      	adds	r4, r6, #0
-    fdaa:	1b3f      	subs	r7, r7, r4
-    fdac:	2f00      	cmp	r7, #0
-    fdae:	d106      	bne.n	fdbe <__sfvwrite+0x222>
-    fdb0:	1c28      	adds	r0, r5, #0
-    fdb2:	f7ff fcb3 	bl	f71c <fflush>
-    fdb6:	2800      	cmp	r0, #0
-    fdb8:	d10e      	bne.n	fdd8 <__sfvwrite+0x23c>
-    fdba:	2200      	movs	r2, #0
-    fdbc:	9205      	str	r2, [sp, #20]
-    fdbe:	9a00      	ldr	r2, [sp, #0]
-    fdc0:	6893      	ldr	r3, [r2, #8]
-    fdc2:	1b1b      	subs	r3, r3, r4
-    fdc4:	6093      	str	r3, [r2, #8]
-    fdc6:	2b00      	cmp	r3, #0
-    fdc8:	d00d      	beq.n	fde6 <__sfvwrite+0x24a>
-    fdca:	9b03      	ldr	r3, [sp, #12]
-    fdcc:	9a02      	ldr	r2, [sp, #8]
-    fdce:	191b      	adds	r3, r3, r4
-    fdd0:	1b12      	subs	r2, r2, r4
-    fdd2:	9303      	str	r3, [sp, #12]
-    fdd4:	9202      	str	r2, [sp, #8]
-    fdd6:	e7a1      	b.n	fd1c <__sfvwrite+0x180>
-    fdd8:	89ab      	ldrh	r3, [r5, #12]
-    fdda:	2240      	movs	r2, #64
-    fddc:	4313      	orrs	r3, r2
-    fdde:	81ab      	strh	r3, [r5, #12]
-    fde0:	2001      	movs	r0, #1
-    fde2:	4240      	negs	r0, r0
-    fde4:	e000      	b.n	fde8 <__sfvwrite+0x24c>
-    fde6:	2000      	movs	r0, #0
-    fde8:	b007      	add	sp, #28
-    fdea:	bcf0      	pop	{r4, r5, r6, r7}
-    fdec:	bc02      	pop	{r1}
-    fdee:	4708      	bx	r1
-    fdf0:	0020      	lsls	r0, r4, #0
-    fdf2:	4000      	ands	r0, r0
-    fdf4:	4718      	bx	r3
-    fdf6:	46c0      	nop			(mov r8, r8)
-
-0000fdf8 <_fwalk_reent>:
-    fdf8:	b5f0      	push	{r4, r5, r6, r7, lr}
-    fdfa:	b082      	sub	sp, #8
-    fdfc:	9001      	str	r0, [sp, #4]
-    fdfe:	9100      	str	r1, [sp, #0]
-    fe00:	f7ff fd1a 	bl	f838 <__sfp_lock_acquire>
-    fe04:	9a01      	ldr	r2, [sp, #4]
-    fe06:	23b8      	movs	r3, #184
-    fe08:	009b      	lsls	r3, r3, #2
-    fe0a:	18d5      	adds	r5, r2, r3
-    fe0c:	2700      	movs	r7, #0
-    fe0e:	e017      	b.n	fe40 <_fwalk_reent+0x48>
-    fe10:	68ab      	ldr	r3, [r5, #8]
-    fe12:	686e      	ldr	r6, [r5, #4]
-    fe14:	1c1c      	adds	r4, r3, #0
-    fe16:	340c      	adds	r4, #12
-    fe18:	e00d      	b.n	fe36 <_fwalk_reent+0x3e>
-    fe1a:	2200      	movs	r2, #0
-    fe1c:	5ea3      	ldrsh	r3, [r4, r2]
-    fe1e:	2b00      	cmp	r3, #0
-    fe20:	d008      	beq.n	fe34 <_fwalk_reent+0x3c>
-    fe22:	2202      	movs	r2, #2
-    fe24:	5ea3      	ldrsh	r3, [r4, r2]
-    fe26:	3301      	adds	r3, #1
-    fe28:	d004      	beq.n	fe34 <_fwalk_reent+0x3c>
-    fe2a:	9801      	ldr	r0, [sp, #4]
-    fe2c:	9b00      	ldr	r3, [sp, #0]
-    fe2e:	f000 f83c 	bl	feaa <_fwalk+0x56>
-    fe32:	4307      	orrs	r7, r0
-    fe34:	345c      	adds	r4, #92
-    fe36:	1c21      	adds	r1, r4, #0
-    fe38:	390c      	subs	r1, #12
-    fe3a:	3e01      	subs	r6, #1
-    fe3c:	d5ed      	bpl.n	fe1a <_fwalk_reent+0x22>
-    fe3e:	682d      	ldr	r5, [r5, #0]
-    fe40:	2d00      	cmp	r5, #0
-    fe42:	d1e5      	bne.n	fe10 <_fwalk_reent+0x18>
-    fe44:	f7ff fcfa 	bl	f83c <__sfp_lock_release>
-    fe48:	1c38      	adds	r0, r7, #0
-    fe4a:	b002      	add	sp, #8
-    fe4c:	bcf0      	pop	{r4, r5, r6, r7}
-    fe4e:	bc02      	pop	{r1}
-    fe50:	4708      	bx	r1
-	...
-
-0000fe54 <_fwalk>:
-    fe54:	b5f0      	push	{r4, r5, r6, r7, lr}
-    fe56:	b081      	sub	sp, #4
-    fe58:	1c04      	adds	r4, r0, #0
-    fe5a:	9100      	str	r1, [sp, #0]
-    fe5c:	f7ff fcec 	bl	f838 <__sfp_lock_acquire>
-    fe60:	22b8      	movs	r2, #184
-    fe62:	0092      	lsls	r2, r2, #2
-    fe64:	18a5      	adds	r5, r4, r2
-    fe66:	2700      	movs	r7, #0
-    fe68:	e016      	b.n	fe98 <_fwalk+0x44>
-    fe6a:	68ab      	ldr	r3, [r5, #8]
-    fe6c:	686e      	ldr	r6, [r5, #4]
-    fe6e:	1c1c      	adds	r4, r3, #0
-    fe70:	340c      	adds	r4, #12
-    fe72:	e00c      	b.n	fe8e <_fwalk+0x3a>
-    fe74:	2200      	movs	r2, #0
-    fe76:	5ea3      	ldrsh	r3, [r4, r2]
-    fe78:	2b00      	cmp	r3, #0
-    fe7a:	d007      	beq.n	fe8c <_fwalk+0x38>
-    fe7c:	2202      	movs	r2, #2
-    fe7e:	5ea3      	ldrsh	r3, [r4, r2]
-    fe80:	3301      	adds	r3, #1
-    fe82:	d003      	beq.n	fe8c <_fwalk+0x38>
-    fe84:	9b00      	ldr	r3, [sp, #0]
-    fe86:	f000 f810 	bl	feaa <_fwalk+0x56>
-    fe8a:	4307      	orrs	r7, r0
-    fe8c:	345c      	adds	r4, #92
-    fe8e:	1c20      	adds	r0, r4, #0
-    fe90:	380c      	subs	r0, #12
-    fe92:	3e01      	subs	r6, #1
-    fe94:	d5ee      	bpl.n	fe74 <_fwalk+0x20>
-    fe96:	682d      	ldr	r5, [r5, #0]
-    fe98:	2d00      	cmp	r5, #0
-    fe9a:	d1e6      	bne.n	fe6a <_fwalk+0x16>
-    fe9c:	f7ff fcce 	bl	f83c <__sfp_lock_release>
-    fea0:	1c38      	adds	r0, r7, #0
-    fea2:	b001      	add	sp, #4
-    fea4:	bcf0      	pop	{r4, r5, r6, r7}
-    fea6:	bc02      	pop	{r1}
-    fea8:	4708      	bx	r1
-    feaa:	4718      	bx	r3
-
-0000feac <__locale_charset>:
-    feac:	4b01      	ldr	r3, [pc, #4]	(feb4 <.text+0xfeb4>)
-    feae:	6818      	ldr	r0, [r3, #0]
-    feb0:	4770      	bx	lr
-    feb2:	0000      	lsls	r0, r0, #0
-    feb4:	5558      	strb	r0, [r3, r5]
-    feb6:	0001      	lsls	r1, r0, #0
-
-0000feb8 <_localeconv_r>:
-    feb8:	4800      	ldr	r0, [pc, #0]	(febc <.text+0xfebc>)
-    feba:	4770      	bx	lr
-    febc:	5528      	strb	r0, [r5, r4]
-    febe:	0001      	lsls	r1, r0, #0
-
-0000fec0 <_setlocale_r>:
-    fec0:	b570      	push	{r4, r5, r6, lr}
-    fec2:	1c0e      	adds	r6, r1, #0
-    fec4:	1c05      	adds	r5, r0, #0
-    fec6:	1c14      	adds	r4, r2, #0
-    fec8:	490b      	ldr	r1, [pc, #44]	(fef8 <.text+0xfef8>)
-    feca:	2a00      	cmp	r2, #0
-    fecc:	d101      	bne.n	fed2 <_setlocale_r+0x12>
-    fece:	1c08      	adds	r0, r1, #0
-    fed0:	e00f      	b.n	fef2 <_setlocale_r+0x32>
-    fed2:	1c10      	adds	r0, r2, #0
-    fed4:	f001 f94a 	bl	1116c <strcmp>
-    fed8:	2800      	cmp	r0, #0
-    feda:	d007      	beq.n	feec <_setlocale_r+0x2c>
-    fedc:	4907      	ldr	r1, [pc, #28]	(fefc <.text+0xfefc>)
-    fede:	1c20      	adds	r0, r4, #0
-    fee0:	f001 f944 	bl	1116c <strcmp>
-    fee4:	2800      	cmp	r0, #0
-    fee6:	d001      	beq.n	feec <_setlocale_r+0x2c>
-    fee8:	2000      	movs	r0, #0
-    feea:	e002      	b.n	fef2 <_setlocale_r+0x32>
-    feec:	632e      	str	r6, [r5, #48]
-    feee:	636c      	str	r4, [r5, #52]
-    fef0:	4801      	ldr	r0, [pc, #4]	(fef8 <.text+0xfef8>)
-    fef2:	bc70      	pop	{r4, r5, r6}
-    fef4:	bc02      	pop	{r1}
-    fef6:	4708      	bx	r1
-    fef8:	5a34      	ldrh	r4, [r6, r0]
-    fefa:	0001      	lsls	r1, r0, #0
-    fefc:	59d4      	ldr	r4, [r2, r7]
-    fefe:	0001      	lsls	r1, r0, #0
-
-0000ff00 <setlocale>:
-    ff00:	b510      	push	{r4, lr}
-    ff02:	4b05      	ldr	r3, [pc, #20]	(ff18 <.text+0xff18>)
-    ff04:	1c04      	adds	r4, r0, #0
-    ff06:	1c0a      	adds	r2, r1, #0
-    ff08:	6818      	ldr	r0, [r3, #0]
-    ff0a:	1c21      	adds	r1, r4, #0
-    ff0c:	f7ff ffd8 	bl	fec0 <_setlocale_r>
-    ff10:	bc10      	pop	{r4}
-    ff12:	bc02      	pop	{r1}
-    ff14:	4708      	bx	r1
-    ff16:	0000      	lsls	r0, r0, #0
-    ff18:	0020      	lsls	r0, r4, #0
-    ff1a:	4000      	ands	r0, r0
-
-0000ff1c <localeconv>:
-    ff1c:	4800      	ldr	r0, [pc, #0]	(ff20 <.text+0xff20>)
-    ff1e:	4770      	bx	lr
-    ff20:	5528      	strb	r0, [r5, r4]
-    ff22:	0001      	lsls	r1, r0, #0
-
-0000ff24 <__smakebuf>:
-    ff24:	b5f0      	push	{r4, r5, r6, r7, lr}
-    ff26:	8983      	ldrh	r3, [r0, #12]
-    ff28:	b08f      	sub	sp, #60
-    ff2a:	1c04      	adds	r4, r0, #0
-    ff2c:	079a      	lsls	r2, r3, #30
-    ff2e:	d43d      	bmi.n	ffac <__smakebuf+0x88>
-    ff30:	89c3      	ldrh	r3, [r0, #14]
-    ff32:	041b      	lsls	r3, r3, #16
-    ff34:	1419      	asrs	r1, r3, #16
-    ff36:	2900      	cmp	r1, #0
-    ff38:	db06      	blt.n	ff48 <__smakebuf+0x24>
-    ff3a:	4b2d      	ldr	r3, [pc, #180]	(fff0 <.text+0xfff0>)
-    ff3c:	466a      	mov	r2, sp
-    ff3e:	6818      	ldr	r0, [r3, #0]
-    ff40:	f005 f950 	bl	151e4 <___fstat_r_from_thumb>
-    ff44:	2800      	cmp	r0, #0
-    ff46:	da06      	bge.n	ff56 <__smakebuf+0x32>
-    ff48:	89a3      	ldrh	r3, [r4, #12]
-    ff4a:	2280      	movs	r2, #128
-    ff4c:	0112      	lsls	r2, r2, #4
-    ff4e:	4313      	orrs	r3, r2
-    ff50:	2700      	movs	r7, #0
-    ff52:	81a3      	strh	r3, [r4, #12]
-    ff54:	e01d      	b.n	ff92 <__smakebuf+0x6e>
-    ff56:	23f0      	movs	r3, #240
-    ff58:	9a01      	ldr	r2, [sp, #4]
-    ff5a:	021b      	lsls	r3, r3, #8
-    ff5c:	401a      	ands	r2, r3
-    ff5e:	2380      	movs	r3, #128
-    ff60:	019b      	lsls	r3, r3, #6
-    ff62:	2700      	movs	r7, #0
-    ff64:	429a      	cmp	r2, r3
-    ff66:	d100      	bne.n	ff6a <__smakebuf+0x46>
-    ff68:	2701      	movs	r7, #1
-    ff6a:	2380      	movs	r3, #128
-    ff6c:	021b      	lsls	r3, r3, #8
-    ff6e:	429a      	cmp	r2, r3
-    ff70:	d10a      	bne.n	ff88 <__smakebuf+0x64>
-    ff72:	4a20      	ldr	r2, [pc, #128]	(fff4 <.text+0xfff4>)
-    ff74:	6aa3      	ldr	r3, [r4, #40]
-    ff76:	4293      	cmp	r3, r2
-    ff78:	d106      	bne.n	ff88 <__smakebuf+0x64>
-    ff7a:	89a3      	ldrh	r3, [r4, #12]
-    ff7c:	2280      	movs	r2, #128
-    ff7e:	00d2      	lsls	r2, r2, #3
-    ff80:	4313      	orrs	r3, r2
-    ff82:	81a3      	strh	r3, [r4, #12]
-    ff84:	64e2      	str	r2, [r4, #76]
-    ff86:	e004      	b.n	ff92 <__smakebuf+0x6e>
-    ff88:	89a3      	ldrh	r3, [r4, #12]
-    ff8a:	2280      	movs	r2, #128
-    ff8c:	0112      	lsls	r2, r2, #4
-    ff8e:	4313      	orrs	r3, r2
-    ff90:	81a3      	strh	r3, [r4, #12]
-    ff92:	4d17      	ldr	r5, [pc, #92]	(fff0 <.text+0xfff0>)
-    ff94:	2680      	movs	r6, #128
-    ff96:	00f6      	lsls	r6, r6, #3
-    ff98:	6828      	ldr	r0, [r5, #0]
-    ff9a:	1c31      	adds	r1, r6, #0
-    ff9c:	f000 f82e 	bl	fffc <_malloc_r>
-    ffa0:	2800      	cmp	r0, #0
-    ffa2:	d10a      	bne.n	ffba <__smakebuf+0x96>
-    ffa4:	89a3      	ldrh	r3, [r4, #12]
-    ffa6:	2202      	movs	r2, #2
-    ffa8:	4313      	orrs	r3, r2
-    ffaa:	81a3      	strh	r3, [r4, #12]
-    ffac:	1c23      	adds	r3, r4, #0
-    ffae:	3343      	adds	r3, #67
-    ffb0:	6023      	str	r3, [r4, #0]
-    ffb2:	6123      	str	r3, [r4, #16]
-    ffb4:	2301      	movs	r3, #1
-    ffb6:	6163      	str	r3, [r4, #20]
-    ffb8:	e015      	b.n	ffe6 <__smakebuf+0xc2>
-    ffba:	682a      	ldr	r2, [r5, #0]
-    ffbc:	4b0e      	ldr	r3, [pc, #56]	(fff8 <.text+0xfff8>)
-    ffbe:	63d3      	str	r3, [r2, #60]
-    ffc0:	89a3      	ldrh	r3, [r4, #12]
-    ffc2:	2280      	movs	r2, #128
-    ffc4:	4313      	orrs	r3, r2
-    ffc6:	81a3      	strh	r3, [r4, #12]
-    ffc8:	6020      	str	r0, [r4, #0]
-    ffca:	6120      	str	r0, [r4, #16]
-    ffcc:	6166      	str	r6, [r4, #20]
-    ffce:	2f00      	cmp	r7, #0
-    ffd0:	d009      	beq.n	ffe6 <__smakebuf+0xc2>
-    ffd2:	230e      	movs	r3, #14
-    ffd4:	5ee0      	ldrsh	r0, [r4, r3]
-    ffd6:	f005 f909 	bl	151ec <__isatty_from_thumb>
-    ffda:	2800      	cmp	r0, #0
-    ffdc:	d003      	beq.n	ffe6 <__smakebuf+0xc2>
-    ffde:	89a3      	ldrh	r3, [r4, #12]
-    ffe0:	2201      	movs	r2, #1
-    ffe2:	4313      	orrs	r3, r2
-    ffe4:	81a3      	strh	r3, [r4, #12]
-    ffe6:	b00f      	add	sp, #60
-    ffe8:	bcf0      	pop	{r4, r5, r6, r7}
-    ffea:	bc01      	pop	{r0}
-    ffec:	4700      	bx	r0
-    ffee:	0000      	lsls	r0, r0, #0
-    fff0:	0020      	lsls	r0, r4, #0
-    fff2:	4000      	ands	r0, r0
-    fff4:	10b5      	asrs	r5, r6, #2
-    fff6:	0001      	lsls	r1, r0, #0
-    fff8:	f851 0000 	ldr.w	r0, [r1, r0]
-
-0000fffc <_malloc_r>:
-    fffc:	b5f0      	push	{r4, r5, r6, r7, lr}
-    fffe:	1c0a      	adds	r2, r1, #0
-   10000:	b086      	sub	sp, #24
-   10002:	320b      	adds	r2, #11
-   10004:	9000      	str	r0, [sp, #0]
-   10006:	2a16      	cmp	r2, #22
-   10008:	d802      	bhi.n	10010 <_malloc_r+0x14>
-   1000a:	2010      	movs	r0, #16
-   1000c:	9004      	str	r0, [sp, #16]
-   1000e:	e004      	b.n	1001a <_malloc_r+0x1e>
-   10010:	2307      	movs	r3, #7
-   10012:	439a      	bics	r2, r3
-   10014:	9204      	str	r2, [sp, #16]
-   10016:	2a00      	cmp	r2, #0
-   10018:	db02      	blt.n	10020 <_malloc_r+0x24>
-   1001a:	9a04      	ldr	r2, [sp, #16]
-   1001c:	428a      	cmp	r2, r1
-   1001e:	d203      	bcs.n	10028 <_malloc_r+0x2c>
-   10020:	9800      	ldr	r0, [sp, #0]
-   10022:	230c      	movs	r3, #12
-   10024:	6003      	str	r3, [r0, #0]
-   10026:	e1f2      	b.n	1040e <.text+0x1040e>
-   10028:	9800      	ldr	r0, [sp, #0]
-   1002a:	f000 fa6d 	bl	10508 <__malloc_lock>
-   1002e:	4bc0      	ldr	r3, [pc, #768]	(10330 <.text+0x10330>)
-   10030:	9904      	ldr	r1, [sp, #16]
-   10032:	4299      	cmp	r1, r3
-   10034:	d816      	bhi.n	10064 <_malloc_r+0x68>
-   10036:	08c9      	lsrs	r1, r1, #3
-   10038:	4abe      	ldr	r2, [pc, #760]	(10334 <.text+0x10334>)
-   1003a:	00cb      	lsls	r3, r1, #3
-   1003c:	189b      	adds	r3, r3, r2
-   1003e:	68dc      	ldr	r4, [r3, #12]
-   10040:	429c      	cmp	r4, r3
-   10042:	d104      	bne.n	1004e <_malloc_r+0x52>
-   10044:	1c23      	adds	r3, r4, #0
-   10046:	3308      	adds	r3, #8
-   10048:	68dc      	ldr	r4, [r3, #12]
-   1004a:	429c      	cmp	r4, r3
-   1004c:	d008      	beq.n	10060 <_malloc_r+0x64>
-   1004e:	6861      	ldr	r1, [r4, #4]
-   10050:	2303      	movs	r3, #3
-   10052:	4399      	bics	r1, r3
-   10054:	68e2      	ldr	r2, [r4, #12]
-   10056:	68a3      	ldr	r3, [r4, #8]
-   10058:	1861      	adds	r1, r4, r1
-   1005a:	60da      	str	r2, [r3, #12]
-   1005c:	6093      	str	r3, [r2, #8]
-   1005e:	e20c      	b.n	1047a <.text+0x1047a>
-   10060:	1c8f      	adds	r7, r1, #2
-   10062:	e041      	b.n	100e8 <_malloc_r+0xec>
-   10064:	9b04      	ldr	r3, [sp, #16]
-   10066:	0a5a      	lsrs	r2, r3, #9
-   10068:	2a00      	cmp	r2, #0
-   1006a:	d101      	bne.n	10070 <_malloc_r+0x74>
-   1006c:	08d9      	lsrs	r1, r3, #3
-   1006e:	e026      	b.n	100be <_malloc_r+0xc2>
-   10070:	2a04      	cmp	r2, #4
-   10072:	d804      	bhi.n	1007e <_malloc_r+0x82>
-   10074:	9804      	ldr	r0, [sp, #16]
-   10076:	0983      	lsrs	r3, r0, #6
-   10078:	1c19      	adds	r1, r3, #0
-   1007a:	3138      	adds	r1, #56
-   1007c:	e01f      	b.n	100be <_malloc_r+0xc2>
-   1007e:	2a14      	cmp	r2, #20
-   10080:	d802      	bhi.n	10088 <_malloc_r+0x8c>
-   10082:	1c11      	adds	r1, r2, #0
-   10084:	315b      	adds	r1, #91
-   10086:	e01a      	b.n	100be <_malloc_r+0xc2>
-   10088:	2a54      	cmp	r2, #84
-   1008a:	d804      	bhi.n	10096 <_malloc_r+0x9a>
-   1008c:	9904      	ldr	r1, [sp, #16]
-   1008e:	0b0b      	lsrs	r3, r1, #12
-   10090:	1c19      	adds	r1, r3, #0
-   10092:	316e      	adds	r1, #110
-   10094:	e013      	b.n	100be <_malloc_r+0xc2>
-   10096:	23aa      	movs	r3, #170
-   10098:	005b      	lsls	r3, r3, #1
-   1009a:	429a      	cmp	r2, r3
-   1009c:	d804      	bhi.n	100a8 <_malloc_r+0xac>
-   1009e:	9a04      	ldr	r2, [sp, #16]
-   100a0:	0bd3      	lsrs	r3, r2, #15
-   100a2:	1c19      	adds	r1, r3, #0
-   100a4:	3177      	adds	r1, #119
-   100a6:	e00a      	b.n	100be <_malloc_r+0xc2>
-   100a8:	4ba3      	ldr	r3, [pc, #652]	(10338 <.text+0x10338>)
-   100aa:	429a      	cmp	r2, r3
-   100ac:	d903      	bls.n	100b6 <_malloc_r+0xba>
-   100ae:	217e      	movs	r1, #126
-   100b0:	e005      	b.n	100be <_malloc_r+0xc2>
-   100b2:	3901      	subs	r1, #1
-   100b4:	e017      	b.n	100e6 <_malloc_r+0xea>
-   100b6:	9804      	ldr	r0, [sp, #16]
-   100b8:	0c83      	lsrs	r3, r0, #18
-   100ba:	1c19      	adds	r1, r3, #0
-   100bc:	317c      	adds	r1, #124
-   100be:	4a9d      	ldr	r2, [pc, #628]	(10334 <.text+0x10334>)
-   100c0:	00cb      	lsls	r3, r1, #3
-   100c2:	189d      	adds	r5, r3, r2
-   100c4:	68ec      	ldr	r4, [r5, #12]
-   100c6:	e00c      	b.n	100e2 <_malloc_r+0xe6>
-   100c8:	6862      	ldr	r2, [r4, #4]
-   100ca:	2303      	movs	r3, #3
-   100cc:	1c10      	adds	r0, r2, #0
-   100ce:	9a04      	ldr	r2, [sp, #16]
-   100d0:	4398      	bics	r0, r3
-   100d2:	1a83      	subs	r3, r0, r2
-   100d4:	2b0f      	cmp	r3, #15
-   100d6:	dcec      	bgt.n	100b2 <_malloc_r+0xb6>
-   100d8:	68e2      	ldr	r2, [r4, #12]
-   100da:	2b00      	cmp	r3, #0
-   100dc:	db00      	blt.n	100e0 <_malloc_r+0xe4>
-   100de:	e1c8      	b.n	10472 <.text+0x10472>
-   100e0:	1c14      	adds	r4, r2, #0
-   100e2:	42ac      	cmp	r4, r5
-   100e4:	d1f0      	bne.n	100c8 <_malloc_r+0xcc>
-   100e6:	1c4f      	adds	r7, r1, #1
-   100e8:	4894      	ldr	r0, [pc, #592]	(1033c <.text+0x1033c>)
-   100ea:	4b92      	ldr	r3, [pc, #584]	(10334 <.text+0x10334>)
-   100ec:	6885      	ldr	r5, [r0, #8]
-   100ee:	9301      	str	r3, [sp, #4]
-   100f0:	4285      	cmp	r5, r0
-   100f2:	d100      	bne.n	100f6 <_malloc_r+0xfa>
-   100f4:	e081      	b.n	101fa <_malloc_r+0x1fe>
-   100f6:	686a      	ldr	r2, [r5, #4]
-   100f8:	2303      	movs	r3, #3
-   100fa:	1c14      	adds	r4, r2, #0
-   100fc:	9904      	ldr	r1, [sp, #16]
-   100fe:	439c      	bics	r4, r3
-   10100:	1a60      	subs	r0, r4, r1
-   10102:	280f      	cmp	r0, #15
-   10104:	dd0e      	ble.n	10124 <_malloc_r+0x128>
-   10106:	9b04      	ldr	r3, [sp, #16]
-   10108:	186a      	adds	r2, r5, r1
-   1010a:	2101      	movs	r1, #1
-   1010c:	430b      	orrs	r3, r1
-   1010e:	606b      	str	r3, [r5, #4]
-   10110:	4b8a      	ldr	r3, [pc, #552]	(1033c <.text+0x1033c>)
-   10112:	60da      	str	r2, [r3, #12]
-   10114:	609a      	str	r2, [r3, #8]
-   10116:	60d3      	str	r3, [r2, #12]
-   10118:	6093      	str	r3, [r2, #8]
-   1011a:	1c03      	adds	r3, r0, #0
-   1011c:	430b      	orrs	r3, r1
-   1011e:	6053      	str	r3, [r2, #4]
-   10120:	5010      	str	r0, [r2, r0]
-   10122:	e009      	b.n	10138 <_malloc_r+0x13c>
-   10124:	4985      	ldr	r1, [pc, #532]	(1033c <.text+0x1033c>)
-   10126:	60c9      	str	r1, [r1, #12]
-   10128:	6089      	str	r1, [r1, #8]
-   1012a:	2800      	cmp	r0, #0
-   1012c:	db09      	blt.n	10142 <_malloc_r+0x146>
-   1012e:	192b      	adds	r3, r5, r4
-   10130:	685a      	ldr	r2, [r3, #4]
-   10132:	2101      	movs	r1, #1
-   10134:	430a      	orrs	r2, r1
-   10136:	605a      	str	r2, [r3, #4]
-   10138:	9800      	ldr	r0, [sp, #0]
-   1013a:	f000 f9e7 	bl	1050c <__malloc_unlock>
-   1013e:	1c28      	adds	r0, r5, #0
-   10140:	e1a3      	b.n	1048a <.text+0x1048a>
-   10142:	4b7f      	ldr	r3, [pc, #508]	(10340 <.text+0x10340>)
-   10144:	429c      	cmp	r4, r3
-   10146:	d813      	bhi.n	10170 <_malloc_r+0x174>
-   10148:	08e1      	lsrs	r1, r4, #3
-   1014a:	1c0b      	adds	r3, r1, #0
-   1014c:	2900      	cmp	r1, #0
-   1014e:	da00      	bge.n	10152 <_malloc_r+0x156>
-   10150:	1ccb      	adds	r3, r1, #3
-   10152:	9801      	ldr	r0, [sp, #4]
-   10154:	109b      	asrs	r3, r3, #2
-   10156:	2201      	movs	r2, #1
-   10158:	409a      	lsls	r2, r3
-   1015a:	6843      	ldr	r3, [r0, #4]
-   1015c:	4313      	orrs	r3, r2
-   1015e:	6043      	str	r3, [r0, #4]
-   10160:	00cb      	lsls	r3, r1, #3
-   10162:	181b      	adds	r3, r3, r0
-   10164:	689a      	ldr	r2, [r3, #8]
-   10166:	60eb      	str	r3, [r5, #12]
-   10168:	60aa      	str	r2, [r5, #8]
-   1016a:	60d5      	str	r5, [r2, #12]
-   1016c:	609d      	str	r5, [r3, #8]
-   1016e:	e044      	b.n	101fa <_malloc_r+0x1fe>
-   10170:	0a62      	lsrs	r2, r4, #9
-   10172:	2a00      	cmp	r2, #0
-   10174:	d101      	bne.n	1017a <_malloc_r+0x17e>
-   10176:	08e2      	lsrs	r2, r4, #3
-   10178:	e01f      	b.n	101ba <_malloc_r+0x1be>
-   1017a:	2a04      	cmp	r2, #4
-   1017c:	d803      	bhi.n	10186 <_malloc_r+0x18a>
-   1017e:	09a3      	lsrs	r3, r4, #6
-   10180:	1c1a      	adds	r2, r3, #0
-   10182:	3238      	adds	r2, #56
-   10184:	e019      	b.n	101ba <_malloc_r+0x1be>
-   10186:	2a14      	cmp	r2, #20
-   10188:	d801      	bhi.n	1018e <_malloc_r+0x192>
-   1018a:	325b      	adds	r2, #91
-   1018c:	e015      	b.n	101ba <_malloc_r+0x1be>
-   1018e:	2a54      	cmp	r2, #84
-   10190:	d803      	bhi.n	1019a <_malloc_r+0x19e>
-   10192:	0b23      	lsrs	r3, r4, #12
-   10194:	1c1a      	adds	r2, r3, #0
-   10196:	326e      	adds	r2, #110
-   10198:	e00f      	b.n	101ba <_malloc_r+0x1be>
-   1019a:	23aa      	movs	r3, #170
-   1019c:	005b      	lsls	r3, r3, #1
-   1019e:	429a      	cmp	r2, r3
-   101a0:	d803      	bhi.n	101aa <_malloc_r+0x1ae>
-   101a2:	0be3      	lsrs	r3, r4, #15
-   101a4:	1c1a      	adds	r2, r3, #0
-   101a6:	3277      	adds	r2, #119
-   101a8:	e007      	b.n	101ba <_malloc_r+0x1be>
-   101aa:	4b63      	ldr	r3, [pc, #396]	(10338 <.text+0x10338>)
-   101ac:	429a      	cmp	r2, r3
-   101ae:	d901      	bls.n	101b4 <_malloc_r+0x1b8>
-   101b0:	227e      	movs	r2, #126
-   101b2:	e002      	b.n	101ba <_malloc_r+0x1be>
-   101b4:	0ca3      	lsrs	r3, r4, #18
-   101b6:	1c1a      	adds	r2, r3, #0
-   101b8:	327c      	adds	r2, #124
-   101ba:	9901      	ldr	r1, [sp, #4]
-   101bc:	00d3      	lsls	r3, r2, #3
-   101be:	1858      	adds	r0, r3, r1
-   101c0:	6881      	ldr	r1, [r0, #8]
-   101c2:	4281      	cmp	r1, r0
-   101c4:	d10f      	bne.n	101e6 <_malloc_r+0x1ea>
-   101c6:	485b      	ldr	r0, [pc, #364]	(10334 <.text+0x10334>)
-   101c8:	1c13      	adds	r3, r2, #0
-   101ca:	2a00      	cmp	r2, #0
-   101cc:	da00      	bge.n	101d0 <_malloc_r+0x1d4>
-   101ce:	3303      	adds	r3, #3
-   101d0:	109b      	asrs	r3, r3, #2
-   101d2:	2201      	movs	r2, #1
-   101d4:	409a      	lsls	r2, r3
-   101d6:	6843      	ldr	r3, [r0, #4]
-   101d8:	4313      	orrs	r3, r2
-   101da:	6043      	str	r3, [r0, #4]
-   101dc:	1c0b      	adds	r3, r1, #0
-   101de:	e008      	b.n	101f2 <_malloc_r+0x1f6>
-   101e0:	6889      	ldr	r1, [r1, #8]
-   101e2:	4281      	cmp	r1, r0
-   101e4:	d004      	beq.n	101f0 <_malloc_r+0x1f4>
-   101e6:	684b      	ldr	r3, [r1, #4]
-   101e8:	2203      	movs	r2, #3
-   101ea:	4393      	bics	r3, r2
-   101ec:	429c      	cmp	r4, r3
-   101ee:	d3f7      	bcc.n	101e0 <_malloc_r+0x1e4>
-   101f0:	68cb      	ldr	r3, [r1, #12]
-   101f2:	60eb      	str	r3, [r5, #12]
-   101f4:	60a9      	str	r1, [r5, #8]
-   101f6:	60cd      	str	r5, [r1, #12]
-   101f8:	609d      	str	r5, [r3, #8]
-   101fa:	1c3a      	adds	r2, r7, #0
-   101fc:	2f00      	cmp	r7, #0
-   101fe:	da00      	bge.n	10202 <_malloc_r+0x206>
-   10200:	1cfa      	adds	r2, r7, #3
-   10202:	2301      	movs	r3, #1
-   10204:	1092      	asrs	r2, r2, #2
-   10206:	1c19      	adds	r1, r3, #0
-   10208:	4091      	lsls	r1, r2
-   1020a:	4a4a      	ldr	r2, [pc, #296]	(10334 <.text+0x10334>)
-   1020c:	9202      	str	r2, [sp, #8]
-   1020e:	6852      	ldr	r2, [r2, #4]
-   10210:	4291      	cmp	r1, r2
-   10212:	d84a      	bhi.n	102aa <_malloc_r+0x2ae>
-   10214:	4211      	tst	r1, r2
-   10216:	d107      	bne.n	10228 <_malloc_r+0x22c>
-   10218:	2303      	movs	r3, #3
-   1021a:	439f      	bics	r7, r3
-   1021c:	3704      	adds	r7, #4
-   1021e:	e000      	b.n	10222 <_malloc_r+0x226>
-   10220:	3704      	adds	r7, #4
-   10222:	0049      	lsls	r1, r1, #1
-   10224:	4211      	tst	r1, r2
-   10226:	d0fb      	beq.n	10220 <_malloc_r+0x224>
-   10228:	9801      	ldr	r0, [sp, #4]
-   1022a:	00fb      	lsls	r3, r7, #3
-   1022c:	181b      	adds	r3, r3, r0
-   1022e:	9305      	str	r3, [sp, #20]
-   10230:	46bc      	mov	ip, r7
-   10232:	1c1e      	adds	r6, r3, #0
-   10234:	68f4      	ldr	r4, [r6, #12]
-   10236:	e00d      	b.n	10254 <_malloc_r+0x258>
-   10238:	6862      	ldr	r2, [r4, #4]
-   1023a:	2303      	movs	r3, #3
-   1023c:	439a      	bics	r2, r3
-   1023e:	1c13      	adds	r3, r2, #0
-   10240:	9a04      	ldr	r2, [sp, #16]
-   10242:	1a9d      	subs	r5, r3, r2
-   10244:	2d0f      	cmp	r5, #15
-   10246:	dd00      	ble.n	1024a <_malloc_r+0x24e>
-   10248:	e0f6      	b.n	10438 <.text+0x10438>
-   1024a:	68e0      	ldr	r0, [r4, #12]
-   1024c:	2d00      	cmp	r5, #0
-   1024e:	db00      	blt.n	10252 <_malloc_r+0x256>
-   10250:	e106      	b.n	10460 <.text+0x10460>
-   10252:	1c04      	adds	r4, r0, #0
-   10254:	42b4      	cmp	r4, r6
-   10256:	d1ef      	bne.n	10238 <_malloc_r+0x23c>
-   10258:	2301      	movs	r3, #1
-   1025a:	449c      	add	ip, r3
-   1025c:	4660      	mov	r0, ip
-   1025e:	2303      	movs	r3, #3
-   10260:	4218      	tst	r0, r3
-   10262:	d002      	beq.n	1026a <_malloc_r+0x26e>
-   10264:	1c26      	adds	r6, r4, #0
-   10266:	3608      	adds	r6, #8
-   10268:	e7e4      	b.n	10234 <_malloc_r+0x238>
-   1026a:	9805      	ldr	r0, [sp, #20]
-   1026c:	1c3c      	adds	r4, r7, #0
-   1026e:	2303      	movs	r3, #3
-   10270:	421c      	tst	r4, r3
-   10272:	d015      	beq.n	102a0 <_malloc_r+0x2a4>
-   10274:	1c03      	adds	r3, r0, #0
-   10276:	6802      	ldr	r2, [r0, #0]
-   10278:	3b08      	subs	r3, #8
-   1027a:	1c18      	adds	r0, r3, #0
-   1027c:	429a      	cmp	r2, r3
-   1027e:	d101      	bne.n	10284 <_malloc_r+0x288>
-   10280:	3c01      	subs	r4, #1
-   10282:	e7f4      	b.n	1026e <_malloc_r+0x272>
-   10284:	9a02      	ldr	r2, [sp, #8]
-   10286:	6853      	ldr	r3, [r2, #4]
-   10288:	0049      	lsls	r1, r1, #1
-   1028a:	4299      	cmp	r1, r3
-   1028c:	d80d      	bhi.n	102aa <_malloc_r+0x2ae>
-   1028e:	2900      	cmp	r1, #0
-   10290:	d00b      	beq.n	102aa <_malloc_r+0x2ae>
-   10292:	4667      	mov	r7, ip
-   10294:	e001      	b.n	1029a <_malloc_r+0x29e>
-   10296:	3704      	adds	r7, #4
-   10298:	0049      	lsls	r1, r1, #1
-   1029a:	4219      	tst	r1, r3
-   1029c:	d0fb      	beq.n	10296 <_malloc_r+0x29a>
-   1029e:	e7c3      	b.n	10228 <_malloc_r+0x22c>
-   102a0:	9802      	ldr	r0, [sp, #8]
-   102a2:	6843      	ldr	r3, [r0, #4]
-   102a4:	438b      	bics	r3, r1
-   102a6:	6043      	str	r3, [r0, #4]
-   102a8:	e7ec      	b.n	10284 <_malloc_r+0x288>
-   102aa:	9902      	ldr	r1, [sp, #8]
-   102ac:	688f      	ldr	r7, [r1, #8]
-   102ae:	687a      	ldr	r2, [r7, #4]
-   102b0:	2303      	movs	r3, #3
-   102b2:	439a      	bics	r2, r3
-   102b4:	9b04      	ldr	r3, [sp, #16]
-   102b6:	9203      	str	r2, [sp, #12]
-   102b8:	429a      	cmp	r2, r3
-   102ba:	d303      	bcc.n	102c4 <_malloc_r+0x2c8>
-   102bc:	1ad0      	subs	r0, r2, r3
-   102be:	280f      	cmp	r0, #15
-   102c0:	dd00      	ble.n	102c4 <_malloc_r+0x2c8>
-   102c2:	e0a6      	b.n	10412 <.text+0x10412>
-   102c4:	4b1f      	ldr	r3, [pc, #124]	(10344 <.text+0x10344>)
-   102c6:	681b      	ldr	r3, [r3, #0]
-   102c8:	9804      	ldr	r0, [sp, #16]
-   102ca:	3310      	adds	r3, #16
-   102cc:	18c4      	adds	r4, r0, r3
-   102ce:	4b1e      	ldr	r3, [pc, #120]	(10348 <.text+0x10348>)
-   102d0:	681b      	ldr	r3, [r3, #0]
-   102d2:	3301      	adds	r3, #1
-   102d4:	d004      	beq.n	102e0 <_malloc_r+0x2e4>
-   102d6:	491d      	ldr	r1, [pc, #116]	(1034c <.text+0x1034c>)
-   102d8:	4b1d      	ldr	r3, [pc, #116]	(10350 <.text+0x10350>)
-   102da:	1862      	adds	r2, r4, r1
-   102dc:	1c14      	adds	r4, r2, #0
-   102de:	401c      	ands	r4, r3
-   102e0:	9800      	ldr	r0, [sp, #0]
-   102e2:	1c21      	adds	r1, r4, #0
-   102e4:	f004 ff7a 	bl	151dc <___sbrk_r_from_thumb>
-   102e8:	1c42      	adds	r2, r0, #1
-   102ea:	d100      	bne.n	102ee <_malloc_r+0x2f2>
-   102ec:	e081      	b.n	103f2 <.text+0x103f2>
-   102ee:	9b03      	ldr	r3, [sp, #12]
-   102f0:	18fe      	adds	r6, r7, r3
-   102f2:	1c05      	adds	r5, r0, #0
-   102f4:	42b0      	cmp	r0, r6
-   102f6:	d203      	bcs.n	10300 <_malloc_r+0x304>
-   102f8:	9902      	ldr	r1, [sp, #8]
-   102fa:	428f      	cmp	r7, r1
-   102fc:	d179      	bne.n	103f2 <.text+0x103f2>
-   102fe:	e096      	b.n	1042e <.text+0x1042e>
-   10300:	4a14      	ldr	r2, [pc, #80]	(10354 <.text+0x10354>)
-   10302:	6813      	ldr	r3, [r2, #0]
-   10304:	18e1      	adds	r1, r4, r3
-   10306:	6011      	str	r1, [r2, #0]
-   10308:	42b0      	cmp	r0, r6
-   1030a:	d10a      	bne.n	10322 <_malloc_r+0x326>
-   1030c:	4b0f      	ldr	r3, [pc, #60]	(1034c <.text+0x1034c>)
-   1030e:	4218      	tst	r0, r3
-   10310:	d107      	bne.n	10322 <_malloc_r+0x326>
-   10312:	9a02      	ldr	r2, [sp, #8]
-   10314:	9803      	ldr	r0, [sp, #12]
-   10316:	6893      	ldr	r3, [r2, #8]
-   10318:	2101      	movs	r1, #1
-   1031a:	1822      	adds	r2, r4, r0
-   1031c:	430a      	orrs	r2, r1
-   1031e:	605a      	str	r2, [r3, #4]
-   10320:	e05b      	b.n	103da <.text+0x103da>
-   10322:	4a09      	ldr	r2, [pc, #36]	(10348 <.text+0x10348>)
-   10324:	6813      	ldr	r3, [r2, #0]
-   10326:	3301      	adds	r3, #1
-   10328:	d116      	bne.n	10358 <.text+0x10358>
-   1032a:	6010      	str	r0, [r2, #0]
-   1032c:	e018      	b.n	10360 <.text+0x10360>
-   1032e:	0000      	lsls	r0, r0, #0
-   10330:	01f7      	lsls	r7, r6, #7
-   10332:	0000      	lsls	r0, r0, #0
-   10334:	0434      	lsls	r4, r6, #16
-   10336:	4000      	ands	r0, r0
-   10338:	0554      	lsls	r4, r2, #21
-   1033a:	0000      	lsls	r0, r0, #0
-   1033c:	043c      	lsls	r4, r7, #16
-   1033e:	4000      	ands	r0, r0
-   10340:	01ff      	lsls	r7, r7, #7
-   10342:	0000      	lsls	r0, r0, #0
-   10344:	0b10      	lsrs	r0, r2, #12
-   10346:	4000      	ands	r0, r0
-   10348:	0840      	lsrs	r0, r0, #1
-   1034a:	4000      	ands	r0, r0
-   1034c:	0fff      	lsrs	r7, r7, #31
-   1034e:	0000      	lsls	r0, r0, #0
-   10350:	f000 ffff 	bl	11352 <sin+0x12>
-   10354:	0b1c      	lsrs	r4, r3, #12
-   10356:	4000      	ands	r0, r0
-   10358:	4a4e      	ldr	r2, [pc, #312]	(10494 <.text+0x10494>)
-   1035a:	1b83      	subs	r3, r0, r6
-   1035c:	18cb      	adds	r3, r1, r3
-   1035e:	6013      	str	r3, [r2, #0]
-   10360:	2307      	movs	r3, #7
-   10362:	1c02      	adds	r2, r0, #0
-   10364:	401a      	ands	r2, r3
-   10366:	d101      	bne.n	1036c <.text+0x1036c>
-   10368:	2100      	movs	r1, #0
-   1036a:	e002      	b.n	10372 <.text+0x10372>
-   1036c:	2308      	movs	r3, #8
-   1036e:	1a99      	subs	r1, r3, r2
-   10370:	1845      	adds	r5, r0, r1
-   10372:	4b49      	ldr	r3, [pc, #292]	(10498 <.text+0x10498>)
-   10374:	192a      	adds	r2, r5, r4
-   10376:	401a      	ands	r2, r3
-   10378:	2380      	movs	r3, #128
-   1037a:	015b      	lsls	r3, r3, #5
-   1037c:	1a9b      	subs	r3, r3, r2
-   1037e:	18cc      	adds	r4, r1, r3
-   10380:	1c21      	adds	r1, r4, #0
-   10382:	9800      	ldr	r0, [sp, #0]
-   10384:	f004 ff2a 	bl	151dc <___sbrk_r_from_thumb>
-   10388:	1c41      	adds	r1, r0, #1
-   1038a:	d101      	bne.n	10390 <.text+0x10390>
-   1038c:	1c28      	adds	r0, r5, #0
-   1038e:	2400      	movs	r4, #0
-   10390:	4b40      	ldr	r3, [pc, #256]	(10494 <.text+0x10494>)
-   10392:	681a      	ldr	r2, [r3, #0]
-   10394:	1912      	adds	r2, r2, r4
-   10396:	601a      	str	r2, [r3, #0]
-   10398:	1b43      	subs	r3, r0, r5
-   1039a:	9a02      	ldr	r2, [sp, #8]
-   1039c:	191b      	adds	r3, r3, r4
-   1039e:	2101      	movs	r1, #1
-   103a0:	430b      	orrs	r3, r1
-   103a2:	6095      	str	r5, [r2, #8]
-   103a4:	606b      	str	r3, [r5, #4]
-   103a6:	4297      	cmp	r7, r2
-   103a8:	d017      	beq.n	103da <.text+0x103da>
-   103aa:	9b03      	ldr	r3, [sp, #12]
-   103ac:	2b0f      	cmp	r3, #15
-   103ae:	d801      	bhi.n	103b4 <.text+0x103b4>
-   103b0:	6069      	str	r1, [r5, #4]
-   103b2:	e01e      	b.n	103f2 <.text+0x103f2>
-   103b4:	9a03      	ldr	r2, [sp, #12]
-   103b6:	2307      	movs	r3, #7
-   103b8:	3a0c      	subs	r2, #12
-   103ba:	439a      	bics	r2, r3
-   103bc:	687b      	ldr	r3, [r7, #4]
-   103be:	400b      	ands	r3, r1
-   103c0:	4313      	orrs	r3, r2
-   103c2:	607b      	str	r3, [r7, #4]
-   103c4:	18b9      	adds	r1, r7, r2
-   103c6:	2305      	movs	r3, #5
-   103c8:	604b      	str	r3, [r1, #4]
-   103ca:	608b      	str	r3, [r1, #8]
-   103cc:	2a0f      	cmp	r2, #15
-   103ce:	d904      	bls.n	103da <.text+0x103da>
-   103d0:	1c39      	adds	r1, r7, #0
-   103d2:	3108      	adds	r1, #8
-   103d4:	9800      	ldr	r0, [sp, #0]
-   103d6:	f7ff fb0d 	bl	f9f4 <_free_r>
-   103da:	4b2e      	ldr	r3, [pc, #184]	(10494 <.text+0x10494>)
-   103dc:	492f      	ldr	r1, [pc, #188]	(1049c <.text+0x1049c>)
-   103de:	681a      	ldr	r2, [r3, #0]
-   103e0:	680b      	ldr	r3, [r1, #0]
-   103e2:	429a      	cmp	r2, r3
-   103e4:	d900      	bls.n	103e8 <.text+0x103e8>
-   103e6:	600a      	str	r2, [r1, #0]
-   103e8:	492d      	ldr	r1, [pc, #180]	(104a0 <.text+0x104a0>)
-   103ea:	680b      	ldr	r3, [r1, #0]
-   103ec:	429a      	cmp	r2, r3
-   103ee:	d900      	bls.n	103f2 <.text+0x103f2>
-   103f0:	600a      	str	r2, [r1, #0]
-   103f2:	9802      	ldr	r0, [sp, #8]
-   103f4:	6883      	ldr	r3, [r0, #8]
-   103f6:	685a      	ldr	r2, [r3, #4]
-   103f8:	9904      	ldr	r1, [sp, #16]
-   103fa:	2303      	movs	r3, #3
-   103fc:	439a      	bics	r2, r3
-   103fe:	428a      	cmp	r2, r1
-   10400:	d302      	bcc.n	10408 <.text+0x10408>
-   10402:	1a50      	subs	r0, r2, r1
-   10404:	280f      	cmp	r0, #15
-   10406:	dc04      	bgt.n	10412 <.text+0x10412>
-   10408:	9800      	ldr	r0, [sp, #0]
-   1040a:	f000 f87f 	bl	1050c <__malloc_unlock>
-   1040e:	2000      	movs	r0, #0
-   10410:	e03c      	b.n	1048c <.text+0x1048c>
-   10412:	9a02      	ldr	r2, [sp, #8]
-   10414:	9b04      	ldr	r3, [sp, #16]
-   10416:	6894      	ldr	r4, [r2, #8]
-   10418:	2101      	movs	r1, #1
-   1041a:	430b      	orrs	r3, r1
-   1041c:	6063      	str	r3, [r4, #4]
-   1041e:	9b04      	ldr	r3, [sp, #16]
-   10420:	18e2      	adds	r2, r4, r3
-   10422:	9b02      	ldr	r3, [sp, #8]
-   10424:	609a      	str	r2, [r3, #8]
-   10426:	1c03      	adds	r3, r0, #0
-   10428:	430b      	orrs	r3, r1
-   1042a:	6053      	str	r3, [r2, #4]
-   1042c:	e029      	b.n	10482 <.text+0x10482>
-   1042e:	4a19      	ldr	r2, [pc, #100]	(10494 <.text+0x10494>)
-   10430:	6813      	ldr	r3, [r2, #0]
-   10432:	18e1      	adds	r1, r4, r3
-   10434:	6011      	str	r1, [r2, #0]
-   10436:	e774      	b.n	10322 <_malloc_r+0x326>
-   10438:	9804      	ldr	r0, [sp, #16]
-   1043a:	9b04      	ldr	r3, [sp, #16]
-   1043c:	1822      	adds	r2, r4, r0
-   1043e:	2001      	movs	r0, #1
-   10440:	4303      	orrs	r3, r0
-   10442:	68e1      	ldr	r1, [r4, #12]
-   10444:	6063      	str	r3, [r4, #4]
-   10446:	68a3      	ldr	r3, [r4, #8]
-   10448:	60d9      	str	r1, [r3, #12]
-   1044a:	608b      	str	r3, [r1, #8]
-   1044c:	4915      	ldr	r1, [pc, #84]	(104a4 <.text+0x104a4>)
-   1044e:	1c2b      	adds	r3, r5, #0
-   10450:	4303      	orrs	r3, r0
-   10452:	60ca      	str	r2, [r1, #12]
-   10454:	608a      	str	r2, [r1, #8]
-   10456:	60d1      	str	r1, [r2, #12]
-   10458:	6091      	str	r1, [r2, #8]
-   1045a:	6053      	str	r3, [r2, #4]
-   1045c:	5155      	str	r5, [r2, r5]
-   1045e:	e010      	b.n	10482 <.text+0x10482>
-   10460:	18e1      	adds	r1, r4, r3
-   10462:	684b      	ldr	r3, [r1, #4]
-   10464:	2201      	movs	r2, #1
-   10466:	4313      	orrs	r3, r2
-   10468:	604b      	str	r3, [r1, #4]
-   1046a:	68a3      	ldr	r3, [r4, #8]
-   1046c:	60d8      	str	r0, [r3, #12]
-   1046e:	6083      	str	r3, [r0, #8]
-   10470:	e007      	b.n	10482 <.text+0x10482>
-   10472:	68a3      	ldr	r3, [r4, #8]
-   10474:	60da      	str	r2, [r3, #12]
-   10476:	6093      	str	r3, [r2, #8]
-   10478:	1821      	adds	r1, r4, r0
-   1047a:	684b      	ldr	r3, [r1, #4]
-   1047c:	2201      	movs	r2, #1
-   1047e:	4313      	orrs	r3, r2
-   10480:	604b      	str	r3, [r1, #4]
-   10482:	9800      	ldr	r0, [sp, #0]
-   10484:	f000 f842 	bl	1050c <__malloc_unlock>
-   10488:	1c20      	adds	r0, r4, #0
-   1048a:	3008      	adds	r0, #8
-   1048c:	b006      	add	sp, #24
-   1048e:	bcf0      	pop	{r4, r5, r6, r7}
-   10490:	bc02      	pop	{r1}
-   10492:	4708      	bx	r1
-   10494:	0b1c      	lsrs	r4, r3, #12
-   10496:	4000      	ands	r0, r0
-   10498:	0fff      	lsrs	r7, r7, #31
-   1049a:	0000      	lsls	r0, r0, #0
-   1049c:	0b14      	lsrs	r4, r2, #12
-   1049e:	4000      	ands	r0, r0
-   104a0:	0b18      	lsrs	r0, r3, #12
-   104a2:	4000      	ands	r0, r0
-   104a4:	043c      	lsls	r4, r7, #16
-   104a6:	4000      	ands	r0, r0
-
-000104a8 <memchr>:
-   104a8:	23ff      	movs	r3, #255
-   104aa:	4019      	ands	r1, r3
-   104ac:	e003      	b.n	104b6 <memchr+0xe>
-   104ae:	7803      	ldrb	r3, [r0, #0]
-   104b0:	428b      	cmp	r3, r1
-   104b2:	d003      	beq.n	104bc <memchr+0x14>
-   104b4:	3001      	adds	r0, #1
-   104b6:	3a01      	subs	r2, #1
-   104b8:	d2f9      	bcs.n	104ae <memchr+0x6>
-   104ba:	2000      	movs	r0, #0
-   104bc:	4770      	bx	lr
-   104be:	46c0      	nop			(mov r8, r8)
-
-000104c0 <memmove>:
-   104c0:	b530      	push	{r4, r5, lr}
-   104c2:	1c05      	adds	r5, r0, #0
-   104c4:	1c04      	adds	r4, r0, #0
-   104c6:	42a9      	cmp	r1, r5
-   104c8:	d20f      	bcs.n	104ea <memmove+0x2a>
-   104ca:	1888      	adds	r0, r1, r2
-   104cc:	4285      	cmp	r5, r0
-   104ce:	d20c      	bcs.n	104ea <memmove+0x2a>
-   104d0:	18a9      	adds	r1, r5, r2
-   104d2:	e003      	b.n	104dc <memmove+0x1c>
-   104d4:	3801      	subs	r0, #1
-   104d6:	7803      	ldrb	r3, [r0, #0]
-   104d8:	3901      	subs	r1, #1
-   104da:	700b      	strb	r3, [r1, #0]
-   104dc:	3a01      	subs	r2, #1
-   104de:	d2f9      	bcs.n	104d4 <memmove+0x14>
-   104e0:	e005      	b.n	104ee <memmove+0x2e>
-   104e2:	780b      	ldrb	r3, [r1, #0]
-   104e4:	3101      	adds	r1, #1
-   104e6:	7023      	strb	r3, [r4, #0]
-   104e8:	3401      	adds	r4, #1
-   104ea:	3a01      	subs	r2, #1
-   104ec:	d2f9      	bcs.n	104e2 <memmove+0x22>
-   104ee:	1c28      	adds	r0, r5, #0
-   104f0:	bc30      	pop	{r4, r5}
-   104f2:	bc02      	pop	{r1}
-   104f4:	4708      	bx	r1
-   104f6:	46c0      	nop			(mov r8, r8)
-
-000104f8 <memset>:
-   104f8:	1c03      	adds	r3, r0, #0
-   104fa:	e001      	b.n	10500 <memset+0x8>
-   104fc:	7019      	strb	r1, [r3, #0]
-   104fe:	3301      	adds	r3, #1
-   10500:	3a01      	subs	r2, #1
-   10502:	d2fb      	bcs.n	104fc <memset+0x4>
-   10504:	4770      	bx	lr
-   10506:	46c0      	nop			(mov r8, r8)
-
-00010508 <__malloc_lock>:
-   10508:	4770      	bx	lr
-	...
-
-0001050c <__malloc_unlock>:
-   1050c:	4770      	bx	lr
-   1050e:	46c0      	nop			(mov r8, r8)
-
-00010510 <_Bfree>:
-   10510:	1c02      	adds	r2, r0, #0
-   10512:	1c08      	adds	r0, r1, #0
-   10514:	2900      	cmp	r1, #0
-   10516:	d005      	beq.n	10524 <_Bfree+0x14>
-   10518:	684b      	ldr	r3, [r1, #4]
-   1051a:	6cd1      	ldr	r1, [r2, #76]
-   1051c:	009b      	lsls	r3, r3, #2
-   1051e:	585a      	ldr	r2, [r3, r1]
-   10520:	6002      	str	r2, [r0, #0]
-   10522:	5058      	str	r0, [r3, r1]
-   10524:	4770      	bx	lr
-	...
-
-00010528 <_hi0bits>:
-   10528:	4b10      	ldr	r3, [pc, #64]	(1056c <.text+0x1056c>)
-   1052a:	4218      	tst	r0, r3
-   1052c:	d001      	beq.n	10532 <_hi0bits+0xa>
-   1052e:	2200      	movs	r2, #0
-   10530:	e001      	b.n	10536 <_hi0bits+0xe>
-   10532:	0400      	lsls	r0, r0, #16
-   10534:	2210      	movs	r2, #16
-   10536:	23ff      	movs	r3, #255
-   10538:	061b      	lsls	r3, r3, #24
-   1053a:	4218      	tst	r0, r3
-   1053c:	d101      	bne.n	10542 <_hi0bits+0x1a>
-   1053e:	3208      	adds	r2, #8
-   10540:	0200      	lsls	r0, r0, #8
-   10542:	23f0      	movs	r3, #240
-   10544:	061b      	lsls	r3, r3, #24
-   10546:	4218      	tst	r0, r3
-   10548:	d101      	bne.n	1054e <_hi0bits+0x26>
-   1054a:	3204      	adds	r2, #4
-   1054c:	0100      	lsls	r0, r0, #4
-   1054e:	23c0      	movs	r3, #192
-   10550:	061b      	lsls	r3, r3, #24
-   10552:	4218      	tst	r0, r3
-   10554:	d101      	bne.n	1055a <_hi0bits+0x32>
-   10556:	3202      	adds	r2, #2
-   10558:	0080      	lsls	r0, r0, #2
-   1055a:	2800      	cmp	r0, #0
-   1055c:	db04      	blt.n	10568 <_hi0bits+0x40>
-   1055e:	0043      	lsls	r3, r0, #1
-   10560:	d401      	bmi.n	10566 <_hi0bits+0x3e>
-   10562:	2220      	movs	r2, #32
-   10564:	e000      	b.n	10568 <_hi0bits+0x40>
-   10566:	3201      	adds	r2, #1
-   10568:	1c10      	adds	r0, r2, #0
-   1056a:	4770      	bx	lr
-   1056c:	0000      	lsls	r0, r0, #0
-   1056e:	ffff 6802 	vtbl.8	d22, {d15}, d2
-
-00010570 <_lo0bits>:
-   10570:	6802      	ldr	r2, [r0, #0]
-   10572:	2307      	movs	r3, #7
-   10574:	1c01      	adds	r1, r0, #0
-   10576:	421a      	tst	r2, r3
-   10578:	d00d      	beq.n	10596 <_lo0bits+0x26>
-   1057a:	07d3      	lsls	r3, r2, #31
-   1057c:	d501      	bpl.n	10582 <_lo0bits+0x12>
-   1057e:	2000      	movs	r0, #0
-   10580:	e028      	b.n	105d4 <_lo0bits+0x64>
-   10582:	0793      	lsls	r3, r2, #30
-   10584:	d503      	bpl.n	1058e <_lo0bits+0x1e>
-   10586:	0853      	lsrs	r3, r2, #1
-   10588:	6003      	str	r3, [r0, #0]
-   1058a:	2001      	movs	r0, #1
-   1058c:	e022      	b.n	105d4 <_lo0bits+0x64>
-   1058e:	0893      	lsrs	r3, r2, #2
-   10590:	6003      	str	r3, [r0, #0]
-   10592:	2002      	movs	r0, #2
-   10594:	e01e      	b.n	105d4 <_lo0bits+0x64>
-   10596:	4b10      	ldr	r3, [pc, #64]	(105d8 <.text+0x105d8>)
-   10598:	421a      	tst	r2, r3
-   1059a:	d001      	beq.n	105a0 <_lo0bits+0x30>
-   1059c:	2000      	movs	r0, #0
-   1059e:	e001      	b.n	105a4 <_lo0bits+0x34>
-   105a0:	0c12      	lsrs	r2, r2, #16
-   105a2:	2010      	movs	r0, #16
-   105a4:	23ff      	movs	r3, #255
-   105a6:	421a      	tst	r2, r3
-   105a8:	d101      	bne.n	105ae <_lo0bits+0x3e>
-   105aa:	3008      	adds	r0, #8
-   105ac:	0a12      	lsrs	r2, r2, #8
-   105ae:	230f      	movs	r3, #15
-   105b0:	421a      	tst	r2, r3
-   105b2:	d101      	bne.n	105b8 <_lo0bits+0x48>
-   105b4:	3004      	adds	r0, #4
-   105b6:	0912      	lsrs	r2, r2, #4
-   105b8:	2303      	movs	r3, #3
-   105ba:	421a      	tst	r2, r3
-   105bc:	d101      	bne.n	105c2 <_lo0bits+0x52>
-   105be:	3002      	adds	r0, #2
-   105c0:	0892      	lsrs	r2, r2, #2
-   105c2:	07d3      	lsls	r3, r2, #31
-   105c4:	d405      	bmi.n	105d2 <_lo0bits+0x62>
-   105c6:	0852      	lsrs	r2, r2, #1
-   105c8:	2a00      	cmp	r2, #0
-   105ca:	d101      	bne.n	105d0 <_lo0bits+0x60>
-   105cc:	2020      	movs	r0, #32
-   105ce:	e001      	b.n	105d4 <_lo0bits+0x64>
-   105d0:	3001      	adds	r0, #1
-   105d2:	600a      	str	r2, [r1, #0]
-   105d4:	4770      	bx	lr
-   105d6:	0000      	lsls	r0, r0, #0
-   105d8:	ffff 0000 	vaddl.u<illegal width 64>	q8, d15, d0
-
-000105dc <__mcmp>:
-   105dc:	b530      	push	{r4, r5, lr}
-   105de:	6903      	ldr	r3, [r0, #16]
-   105e0:	690a      	ldr	r2, [r1, #16]
-   105e2:	1c04      	adds	r4, r0, #0
-   105e4:	1a98      	subs	r0, r3, r2
-   105e6:	2800      	cmp	r0, #0
-   105e8:	d114      	bne.n	10614 <__mcmp+0x38>
-   105ea:	1c25      	adds	r5, r4, #0
-   105ec:	0093      	lsls	r3, r2, #2
-   105ee:	3514      	adds	r5, #20
-   105f0:	18ea      	adds	r2, r5, r3
-   105f2:	3314      	adds	r3, #20
-   105f4:	18c9      	adds	r1, r1, r3
-   105f6:	3a04      	subs	r2, #4
-   105f8:	3904      	subs	r1, #4
-   105fa:	6814      	ldr	r4, [r2, #0]
-   105fc:	680b      	ldr	r3, [r1, #0]
-   105fe:	429c      	cmp	r4, r3
-   10600:	d006      	beq.n	10610 <__mcmp+0x34>
-   10602:	429c      	cmp	r4, r3
-   10604:	d202      	bcs.n	1060c <__mcmp+0x30>
-   10606:	2001      	movs	r0, #1
-   10608:	4240      	negs	r0, r0
-   1060a:	e003      	b.n	10614 <__mcmp+0x38>
-   1060c:	2001      	movs	r0, #1
-   1060e:	e001      	b.n	10614 <__mcmp+0x38>
-   10610:	42aa      	cmp	r2, r5
-   10612:	d8f0      	bhi.n	105f6 <__mcmp+0x1a>
-   10614:	bc30      	pop	{r4, r5}
-   10616:	bc02      	pop	{r1}
-   10618:	4708      	bx	r1
-	...
-
-0001061c <_ulp>:
-   1061c:	b530      	push	{r4, r5, lr}
-   1061e:	4b11      	ldr	r3, [pc, #68]	(10664 <.text+0x10664>)
-   10620:	4a11      	ldr	r2, [pc, #68]	(10668 <.text+0x10668>)
-   10622:	4003      	ands	r3, r0
-   10624:	189b      	adds	r3, r3, r2
-   10626:	2b00      	cmp	r3, #0
-   10628:	dd01      	ble.n	1062e <_ulp+0x12>
-   1062a:	1c1c      	adds	r4, r3, #0
-   1062c:	e007      	b.n	1063e <_ulp+0x22>
-   1062e:	425b      	negs	r3, r3
-   10630:	151a      	asrs	r2, r3, #20
-   10632:	2a13      	cmp	r2, #19
-   10634:	dc05      	bgt.n	10642 <_ulp+0x26>
-   10636:	2380      	movs	r3, #128
-   10638:	031b      	lsls	r3, r3, #12
-   1063a:	1c1c      	adds	r4, r3, #0
-   1063c:	4114      	asrs	r4, r2
-   1063e:	2500      	movs	r5, #0
-   10640:	e00a      	b.n	10658 <_ulp+0x3c>
-   10642:	3a14      	subs	r2, #20
-   10644:	2a1e      	cmp	r2, #30
-   10646:	dd01      	ble.n	1064c <_ulp+0x30>
-   10648:	2201      	movs	r2, #1
-   1064a:	e003      	b.n	10654 <_ulp+0x38>
-   1064c:	231f      	movs	r3, #31
-   1064e:	1a9b      	subs	r3, r3, r2
-   10650:	2201      	movs	r2, #1
-   10652:	409a      	lsls	r2, r3
-   10654:	2400      	movs	r4, #0
-   10656:	1c15      	adds	r5, r2, #0
-   10658:	1c29      	adds	r1, r5, #0
-   1065a:	1c20      	adds	r0, r4, #0
-   1065c:	bc30      	pop	{r4, r5}
-   1065e:	bc04      	pop	{r2}
-   10660:	4710      	bx	r2
-   10662:	0000      	lsls	r0, r0, #0
-   10664:	0000      	lsls	r0, r0, #0
-   10666:	7ff0      	ldrb	r0, [r6, #31]
-   10668:	0000      	lsls	r0, r0, #0
-   1066a:	fcc0 b5f0 	stc2l	5, cr11, [r0], {240}
-
-0001066c <_b2d>:
-   1066c:	b5f0      	push	{r4, r5, r6, r7, lr}
-   1066e:	b083      	sub	sp, #12
-   10670:	6903      	ldr	r3, [r0, #16]
-   10672:	9100      	str	r1, [sp, #0]
-   10674:	1c01      	adds	r1, r0, #0
-   10676:	3114      	adds	r1, #20
-   10678:	009b      	lsls	r3, r3, #2
-   1067a:	18cc      	adds	r4, r1, r3
-   1067c:	1f25      	subs	r5, r4, #4
-   1067e:	682a      	ldr	r2, [r5, #0]
-   10680:	1c10      	adds	r0, r2, #0
-   10682:	9101      	str	r1, [sp, #4]
-   10684:	9202      	str	r2, [sp, #8]
-   10686:	f7ff ff4f 	bl	10528 <_hi0bits>
-   1068a:	2320      	movs	r3, #32
-   1068c:	9900      	ldr	r1, [sp, #0]
-   1068e:	1a1b      	subs	r3, r3, r0
-   10690:	600b      	str	r3, [r1, #0]
-   10692:	280a      	cmp	r0, #10
-   10694:	dc18      	bgt.n	106c8 <_b2d+0x5c>
-   10696:	9a01      	ldr	r2, [sp, #4]
-   10698:	230b      	movs	r3, #11
-   1069a:	1a19      	subs	r1, r3, r0
-   1069c:	4295      	cmp	r5, r2
-   1069e:	d801      	bhi.n	106a4 <_b2d+0x38>
-   106a0:	2400      	movs	r4, #0
-   106a2:	e002      	b.n	106aa <_b2d+0x3e>
-   106a4:	1c23      	adds	r3, r4, #0
-   106a6:	3b08      	subs	r3, #8
-   106a8:	681c      	ldr	r4, [r3, #0]
-   106aa:	9a02      	ldr	r2, [sp, #8]
-   106ac:	4b1e      	ldr	r3, [pc, #120]	(10728 <.text+0x10728>)
-   106ae:	40ca      	lsrs	r2, r1
-   106b0:	1c16      	adds	r6, r2, #0
-   106b2:	431e      	orrs	r6, r3
-   106b4:	9a02      	ldr	r2, [sp, #8]
-   106b6:	1c03      	adds	r3, r0, #0
-   106b8:	3315      	adds	r3, #21
-   106ba:	409a      	lsls	r2, r3
-   106bc:	1c13      	adds	r3, r2, #0
-   106be:	1c22      	adds	r2, r4, #0
-   106c0:	40ca      	lsrs	r2, r1
-   106c2:	1c1f      	adds	r7, r3, #0
-   106c4:	4317      	orrs	r7, r2
-   106c6:	e029      	b.n	1071c <_b2d+0xb0>
-   106c8:	9b01      	ldr	r3, [sp, #4]
-   106ca:	429d      	cmp	r5, r3
-   106cc:	d801      	bhi.n	106d2 <_b2d+0x66>
-   106ce:	2400      	movs	r4, #0
-   106d0:	e002      	b.n	106d8 <_b2d+0x6c>
-   106d2:	1c25      	adds	r5, r4, #0
-   106d4:	3d08      	subs	r5, #8
-   106d6:	682c      	ldr	r4, [r5, #0]
-   106d8:	380b      	subs	r0, #11
-   106da:	2800      	cmp	r0, #0
-   106dc:	d01a      	beq.n	10714 <_b2d+0xa8>
-   106de:	2320      	movs	r3, #32
-   106e0:	9901      	ldr	r1, [sp, #4]
-   106e2:	1a1b      	subs	r3, r3, r0
-   106e4:	469c      	mov	ip, r3
-   106e6:	428d      	cmp	r5, r1
-   106e8:	d801      	bhi.n	106ee <_b2d+0x82>
-   106ea:	2500      	movs	r5, #0
-   106ec:	e001      	b.n	106f2 <_b2d+0x86>
-   106ee:	1f2b      	subs	r3, r5, #4
-   106f0:	681d      	ldr	r5, [r3, #0]
-   106f2:	4662      	mov	r2, ip
-   106f4:	1c21      	adds	r1, r4, #0
-   106f6:	9b02      	ldr	r3, [sp, #8]
-   106f8:	40d1      	lsrs	r1, r2
-   106fa:	4a0b      	ldr	r2, [pc, #44]	(10728 <.text+0x10728>)
-   106fc:	4083      	lsls	r3, r0
-   106fe:	4313      	orrs	r3, r2
-   10700:	1c0e      	adds	r6, r1, #0
-   10702:	1c22      	adds	r2, r4, #0
-   10704:	431e      	orrs	r6, r3
-   10706:	4082      	lsls	r2, r0
-   10708:	1c2b      	adds	r3, r5, #0
-   1070a:	4661      	mov	r1, ip
-   1070c:	40cb      	lsrs	r3, r1
-   1070e:	1c17      	adds	r7, r2, #0
-   10710:	431f      	orrs	r7, r3
-   10712:	e003      	b.n	1071c <_b2d+0xb0>
-   10714:	4b04      	ldr	r3, [pc, #16]	(10728 <.text+0x10728>)
-   10716:	9e02      	ldr	r6, [sp, #8]
-   10718:	1c27      	adds	r7, r4, #0
-   1071a:	431e      	orrs	r6, r3
-   1071c:	1c30      	adds	r0, r6, #0
-   1071e:	1c39      	adds	r1, r7, #0
-   10720:	b003      	add	sp, #12
-   10722:	bcf0      	pop	{r4, r5, r6, r7}
-   10724:	bc04      	pop	{r2}
-   10726:	4710      	bx	r2
-   10728:	0000      	lsls	r0, r0, #0
-   1072a:	3ff0      	subs	r7, #240
-
-0001072c <_ratio>:
-   1072c:	b5f0      	push	{r4, r5, r6, r7, lr}
-   1072e:	b084      	sub	sp, #16
-   10730:	1c0d      	adds	r5, r1, #0
-   10732:	a902      	add	r1, sp, #8
-   10734:	1c04      	adds	r4, r0, #0
-   10736:	f7ff ff99 	bl	1066c <_b2d>
-   1073a:	9000      	str	r0, [sp, #0]
-   1073c:	9101      	str	r1, [sp, #4]
-   1073e:	1c28      	adds	r0, r5, #0
-   10740:	a903      	add	r1, sp, #12
-   10742:	f7ff ff93 	bl	1066c <_b2d>
-   10746:	9b03      	ldr	r3, [sp, #12]
-   10748:	1c0f      	adds	r7, r1, #0
-   1074a:	9902      	ldr	r1, [sp, #8]
-   1074c:	692a      	ldr	r2, [r5, #16]
-   1074e:	1ac9      	subs	r1, r1, r3
-   10750:	6923      	ldr	r3, [r4, #16]
-   10752:	1a9b      	subs	r3, r3, r2
-   10754:	015b      	lsls	r3, r3, #5
-   10756:	18c9      	adds	r1, r1, r3
-   10758:	1c06      	adds	r6, r0, #0
-   1075a:	2900      	cmp	r1, #0
-   1075c:	dd04      	ble.n	10768 <_ratio+0x3c>
-   1075e:	9a00      	ldr	r2, [sp, #0]
-   10760:	050b      	lsls	r3, r1, #20
-   10762:	189b      	adds	r3, r3, r2
-   10764:	9300      	str	r3, [sp, #0]
-   10766:	e001      	b.n	1076c <_ratio+0x40>
-   10768:	050b      	lsls	r3, r1, #20
-   1076a:	1af6      	subs	r6, r6, r3
-   1076c:	9800      	ldr	r0, [sp, #0]
-   1076e:	9901      	ldr	r1, [sp, #4]
-   10770:	1c32      	adds	r2, r6, #0
-   10772:	1c3b      	adds	r3, r7, #0
-   10774:	f004 fd26 	bl	151c4 <____divdf3_from_thumb>
-   10778:	b004      	add	sp, #16
-   1077a:	bcf0      	pop	{r4, r5, r6, r7}
-   1077c:	bc04      	pop	{r2}
-   1077e:	4710      	bx	r2
-
-00010780 <_mprec_log10>:
-   10780:	b510      	push	{r4, lr}
-   10782:	1c04      	adds	r4, r0, #0
-   10784:	2817      	cmp	r0, #23
-   10786:	dd02      	ble.n	1078e <_mprec_log10+0xe>
-   10788:	490a      	ldr	r1, [pc, #40]	(107b4 <.text+0x107b4>)
-   1078a:	4809      	ldr	r0, [pc, #36]	(107b0 <.text+0x107b0>)
-   1078c:	e00a      	b.n	107a4 <_mprec_log10+0x24>
-   1078e:	4a0a      	ldr	r2, [pc, #40]	(107b8 <.text+0x107b8>)
-   10790:	00c3      	lsls	r3, r0, #3
-   10792:	189b      	adds	r3, r3, r2
-   10794:	6818      	ldr	r0, [r3, #0]
-   10796:	6859      	ldr	r1, [r3, #4]
-   10798:	e006      	b.n	107a8 <_mprec_log10+0x28>
-   1079a:	4a08      	ldr	r2, [pc, #32]	(107bc <.text+0x107bc>)
-   1079c:	4b08      	ldr	r3, [pc, #32]	(107c0 <.text+0x107c0>)
-   1079e:	f004 fd09 	bl	151b4 <____muldf3_from_thumb>
-   107a2:	3c01      	subs	r4, #1
-   107a4:	2c00      	cmp	r4, #0
-   107a6:	d1f8      	bne.n	1079a <_mprec_log10+0x1a>
-   107a8:	bc10      	pop	{r4}
-   107aa:	bc04      	pop	{r2}
-   107ac:	4710      	bx	r2
-   107ae:	0000      	lsls	r0, r0, #0
-   107b0:	0000      	lsls	r0, r0, #0
-   107b2:	3ff0      	subs	r7, #240
-   107b4:	0000      	lsls	r0, r0, #0
-   107b6:	0000      	lsls	r0, r0, #0
-   107b8:	555c      	strb	r4, [r3, r5]
-   107ba:	0001      	lsls	r1, r0, #0
-   107bc:	0000      	lsls	r0, r0, #0
-   107be:	4024      	ands	r4, r4
-   107c0:	0000      	lsls	r0, r0, #0
-	...
-
-000107c4 <_Balloc>:
-   107c4:	b5f0      	push	{r4, r5, r6, r7, lr}
-   107c6:	6cc3      	ldr	r3, [r0, #76]
-   107c8:	1c05      	adds	r5, r0, #0
-   107ca:	1c0e      	adds	r6, r1, #0
-   107cc:	2b00      	cmp	r3, #0
-   107ce:	d108      	bne.n	107e2 <_Balloc+0x1e>
-   107d0:	2104      	movs	r1, #4
-   107d2:	2210      	movs	r2, #16
-   107d4:	f000 fcd6 	bl	11184 <_calloc_r>
-   107d8:	64e8      	str	r0, [r5, #76]
-   107da:	2800      	cmp	r0, #0
-   107dc:	d101      	bne.n	107e2 <_Balloc+0x1e>
-   107de:	2400      	movs	r4, #0
-   107e0:	e019      	b.n	10816 <_Balloc+0x52>
-   107e2:	6ceb      	ldr	r3, [r5, #76]
-   107e4:	00b2      	lsls	r2, r6, #2
-   107e6:	18d2      	adds	r2, r2, r3
-   107e8:	6814      	ldr	r4, [r2, #0]
-   107ea:	2c00      	cmp	r4, #0
-   107ec:	d002      	beq.n	107f4 <_Balloc+0x30>
-   107ee:	6823      	ldr	r3, [r4, #0]
-   107f0:	6013      	str	r3, [r2, #0]
-   107f2:	e00d      	b.n	10810 <_Balloc+0x4c>
-   107f4:	2301      	movs	r3, #1
-   107f6:	1c1f      	adds	r7, r3, #0
-   107f8:	40b7      	lsls	r7, r6
-   107fa:	00ba      	lsls	r2, r7, #2
-   107fc:	3214      	adds	r2, #20
-   107fe:	1c28      	adds	r0, r5, #0
-   10800:	2101      	movs	r1, #1
-   10802:	f000 fcbf 	bl	11184 <_calloc_r>
-   10806:	2800      	cmp	r0, #0
-   10808:	d005      	beq.n	10816 <_Balloc+0x52>
-   1080a:	6046      	str	r6, [r0, #4]
-   1080c:	6087      	str	r7, [r0, #8]
-   1080e:	1c04      	adds	r4, r0, #0
-   10810:	2300      	movs	r3, #0
-   10812:	6123      	str	r3, [r4, #16]
-   10814:	60e3      	str	r3, [r4, #12]
-   10816:	1c20      	adds	r0, r4, #0
-   10818:	bcf0      	pop	{r4, r5, r6, r7}
-   1081a:	bc02      	pop	{r1}
-   1081c:	4708      	bx	r1
-	...
-
-00010820 <_d2b>:
-   10820:	b5f0      	push	{r4, r5, r6, r7, lr}
-   10822:	b084      	sub	sp, #16
-   10824:	1c0c      	adds	r4, r1, #0
-   10826:	2101      	movs	r1, #1
-   10828:	9300      	str	r3, [sp, #0]
-   1082a:	1c15      	adds	r5, r2, #0
-   1082c:	f7ff ffca 	bl	107c4 <_Balloc>
-   10830:	1c01      	adds	r1, r0, #0
-   10832:	3114      	adds	r1, #20
-   10834:	4b2b      	ldr	r3, [pc, #172]	(108e4 <.text+0x108e4>)
-   10836:	9101      	str	r1, [sp, #4]
-   10838:	1c21      	adds	r1, r4, #0
-   1083a:	4019      	ands	r1, r3
-   1083c:	4b2a      	ldr	r3, [pc, #168]	(108e8 <.text+0x108e8>)
-   1083e:	1c22      	adds	r2, r4, #0
-   10840:	401a      	ands	r2, r3
-   10842:	0d17      	lsrs	r7, r2, #20
-   10844:	1c06      	adds	r6, r0, #0
-   10846:	9103      	str	r1, [sp, #12]
-   10848:	2f00      	cmp	r7, #0
-   1084a:	d003      	beq.n	10854 <_d2b+0x34>
-   1084c:	2380      	movs	r3, #128
-   1084e:	035b      	lsls	r3, r3, #13
-   10850:	430b      	orrs	r3, r1
-   10852:	9303      	str	r3, [sp, #12]
-   10854:	2d00      	cmp	r5, #0
-   10856:	d01b      	beq.n	10890 <_d2b+0x70>
-   10858:	a802      	add	r0, sp, #8
-   1085a:	9502      	str	r5, [sp, #8]
-   1085c:	f7ff fe88 	bl	10570 <_lo0bits>
-   10860:	9902      	ldr	r1, [sp, #8]
-   10862:	2800      	cmp	r0, #0
-   10864:	d009      	beq.n	1087a <_d2b+0x5a>
-   10866:	9b03      	ldr	r3, [sp, #12]
-   10868:	2220      	movs	r2, #32
-   1086a:	1a12      	subs	r2, r2, r0
-   1086c:	4093      	lsls	r3, r2
-   1086e:	430b      	orrs	r3, r1
-   10870:	6173      	str	r3, [r6, #20]
-   10872:	9b03      	ldr	r3, [sp, #12]
-   10874:	40c3      	lsrs	r3, r0
-   10876:	9303      	str	r3, [sp, #12]
-   10878:	e000      	b.n	1087c <_d2b+0x5c>
-   1087a:	6171      	str	r1, [r6, #20]
-   1087c:	9b03      	ldr	r3, [sp, #12]
-   1087e:	9a01      	ldr	r2, [sp, #4]
-   10880:	6053      	str	r3, [r2, #4]
-   10882:	2b00      	cmp	r3, #0
-   10884:	d001      	beq.n	1088a <_d2b+0x6a>
-   10886:	2202      	movs	r2, #2
-   10888:	e000      	b.n	1088c <_d2b+0x6c>
-   1088a:	2201      	movs	r2, #1
-   1088c:	6132      	str	r2, [r6, #16]
-   1088e:	e008      	b.n	108a2 <_d2b+0x82>
-   10890:	a803      	add	r0, sp, #12
-   10892:	f7ff fe6d 	bl	10570 <_lo0bits>
-   10896:	9b03      	ldr	r3, [sp, #12]
-   10898:	6173      	str	r3, [r6, #20]
-   1089a:	2301      	movs	r3, #1
-   1089c:	6133      	str	r3, [r6, #16]
-   1089e:	3020      	adds	r0, #32
-   108a0:	2201      	movs	r2, #1
-   108a2:	2f00      	cmp	r7, #0
-   108a4:	d009      	beq.n	108ba <_d2b+0x9a>
-   108a6:	4911      	ldr	r1, [pc, #68]	(108ec <.text+0x108ec>)
-   108a8:	183b      	adds	r3, r7, r0
-   108aa:	9a00      	ldr	r2, [sp, #0]
-   108ac:	185b      	adds	r3, r3, r1
-   108ae:	6013      	str	r3, [r2, #0]
-   108b0:	9909      	ldr	r1, [sp, #36]
-   108b2:	2335      	movs	r3, #53
-   108b4:	1a1b      	subs	r3, r3, r0
-   108b6:	600b      	str	r3, [r1, #0]
-   108b8:	e00e      	b.n	108d8 <_d2b+0xb8>
-   108ba:	490d      	ldr	r1, [pc, #52]	(108f0 <.text+0x108f0>)
-   108bc:	1843      	adds	r3, r0, r1
-   108be:	9900      	ldr	r1, [sp, #0]
-   108c0:	0154      	lsls	r4, r2, #5
-   108c2:	600b      	str	r3, [r1, #0]
-   108c4:	0093      	lsls	r3, r2, #2
-   108c6:	9a01      	ldr	r2, [sp, #4]
-   108c8:	189b      	adds	r3, r3, r2
-   108ca:	3b04      	subs	r3, #4
-   108cc:	6818      	ldr	r0, [r3, #0]
-   108ce:	f7ff fe2b 	bl	10528 <_hi0bits>
-   108d2:	9b09      	ldr	r3, [sp, #36]
-   108d4:	1a24      	subs	r4, r4, r0
-   108d6:	601c      	str	r4, [r3, #0]
-   108d8:	1c30      	adds	r0, r6, #0
-   108da:	b004      	add	sp, #16
-   108dc:	bcf0      	pop	{r4, r5, r6, r7}
-   108de:	bc02      	pop	{r1}
-   108e0:	4708      	bx	r1
-   108e2:	0000      	lsls	r0, r0, #0
-   108e4:	ffff 000f 	vaddl.u<illegal width 64>	q8, d15, d15
-   108e8:	ffff 7fff 	undefined
-   108ec:	fbcd ffff 	undefined
-   108f0:	fbce ffff 	undefined
-
-000108f4 <__mdiff>:
-   108f4:	b5f0      	push	{r4, r5, r6, r7, lr}
-   108f6:	b083      	sub	sp, #12
-   108f8:	1c07      	adds	r7, r0, #0
-   108fa:	1c0d      	adds	r5, r1, #0
-   108fc:	1c08      	adds	r0, r1, #0
-   108fe:	1c11      	adds	r1, r2, #0
-   10900:	1c16      	adds	r6, r2, #0
-   10902:	f7ff fe6b 	bl	105dc <__mcmp>
-   10906:	1c04      	adds	r4, r0, #0
-   10908:	2800      	cmp	r0, #0
-   1090a:	d108      	bne.n	1091e <__mdiff+0x2a>
-   1090c:	1c38      	adds	r0, r7, #0
-   1090e:	2100      	movs	r1, #0
-   10910:	f7ff ff58 	bl	107c4 <_Balloc>
-   10914:	2301      	movs	r3, #1
-   10916:	1c07      	adds	r7, r0, #0
-   10918:	6103      	str	r3, [r0, #16]
-   1091a:	6144      	str	r4, [r0, #20]
-   1091c:	e053      	b.n	109c6 <__mdiff+0xd2>
-   1091e:	2800      	cmp	r0, #0
-   10920:	da04      	bge.n	1092c <__mdiff+0x38>
-   10922:	46b4      	mov	ip, r6
-   10924:	2401      	movs	r4, #1
-   10926:	1c2e      	adds	r6, r5, #0
-   10928:	4665      	mov	r5, ip
-   1092a:	e000      	b.n	1092e <__mdiff+0x3a>
-   1092c:	2400      	movs	r4, #0
-   1092e:	6869      	ldr	r1, [r5, #4]
-   10930:	1c38      	adds	r0, r7, #0
-   10932:	f7ff ff47 	bl	107c4 <_Balloc>
-   10936:	692a      	ldr	r2, [r5, #16]
-   10938:	3514      	adds	r5, #20
-   1093a:	46ac      	mov	ip, r5
-   1093c:	0093      	lsls	r3, r2, #2
-   1093e:	4463      	add	r3, ip
-   10940:	9301      	str	r3, [sp, #4]
-   10942:	6933      	ldr	r3, [r6, #16]
-   10944:	1c35      	adds	r5, r6, #0
-   10946:	3514      	adds	r5, #20
-   10948:	009b      	lsls	r3, r3, #2
-   1094a:	18eb      	adds	r3, r5, r3
-   1094c:	60c4      	str	r4, [r0, #12]
-   1094e:	9200      	str	r2, [sp, #0]
-   10950:	1c04      	adds	r4, r0, #0
-   10952:	9302      	str	r3, [sp, #8]
-   10954:	1c07      	adds	r7, r0, #0
-   10956:	3414      	adds	r4, #20
-   10958:	2600      	movs	r6, #0
-   1095a:	4662      	mov	r2, ip
-   1095c:	3204      	adds	r2, #4
-   1095e:	4694      	mov	ip, r2
-   10960:	3a04      	subs	r2, #4
-   10962:	ca08      	ldmia	r2!, {r3}
-   10964:	cd01      	ldmia	r5!, {r0}
-   10966:	4a1a      	ldr	r2, [pc, #104]	(109d0 <.text+0x109d0>)
-   10968:	1c19      	adds	r1, r3, #0
-   1096a:	4011      	ands	r1, r2
-   1096c:	4002      	ands	r2, r0
-   1096e:	1a89      	subs	r1, r1, r2
-   10970:	1989      	adds	r1, r1, r6
-   10972:	0c1b      	lsrs	r3, r3, #16
-   10974:	0c00      	lsrs	r0, r0, #16
-   10976:	1a1b      	subs	r3, r3, r0
-   10978:	140a      	asrs	r2, r1, #16
-   1097a:	189b      	adds	r3, r3, r2
-   1097c:	8063      	strh	r3, [r4, #2]
-   1097e:	141e      	asrs	r6, r3, #16
-   10980:	9b02      	ldr	r3, [sp, #8]
-   10982:	8021      	strh	r1, [r4, #0]
-   10984:	3404      	adds	r4, #4
-   10986:	429d      	cmp	r5, r3
-   10988:	d210      	bcs.n	109ac <__mdiff+0xb8>
-   1098a:	e7e6      	b.n	1095a <__mdiff+0x66>
-   1098c:	4662      	mov	r2, ip
-   1098e:	3204      	adds	r2, #4
-   10990:	4694      	mov	ip, r2
-   10992:	3a04      	subs	r2, #4
-   10994:	ca08      	ldmia	r2!, {r3}
-   10996:	4a0e      	ldr	r2, [pc, #56]	(109d0 <.text+0x109d0>)
-   10998:	1c19      	adds	r1, r3, #0
-   1099a:	4011      	ands	r1, r2
-   1099c:	1989      	adds	r1, r1, r6
-   1099e:	0c1b      	lsrs	r3, r3, #16
-   109a0:	140a      	asrs	r2, r1, #16
-   109a2:	189b      	adds	r3, r3, r2
-   109a4:	8063      	strh	r3, [r4, #2]
-   109a6:	8021      	strh	r1, [r4, #0]
-   109a8:	141e      	asrs	r6, r3, #16
-   109aa:	3404      	adds	r4, #4
-   109ac:	9b01      	ldr	r3, [sp, #4]
-   109ae:	459c      	cmp	ip, r3
-   109b0:	d3ec      	bcc.n	1098c <__mdiff+0x98>
-   109b2:	e002      	b.n	109ba <__mdiff+0xc6>
-   109b4:	9a00      	ldr	r2, [sp, #0]
-   109b6:	3a01      	subs	r2, #1
-   109b8:	9200      	str	r2, [sp, #0]
-   109ba:	3c04      	subs	r4, #4
-   109bc:	6823      	ldr	r3, [r4, #0]
-   109be:	2b00      	cmp	r3, #0
-   109c0:	d0f8      	beq.n	109b4 <__mdiff+0xc0>
-   109c2:	9b00      	ldr	r3, [sp, #0]
-   109c4:	613b      	str	r3, [r7, #16]
-   109c6:	1c38      	adds	r0, r7, #0
-   109c8:	b003      	add	sp, #12
-   109ca:	bcf0      	pop	{r4, r5, r6, r7}
-   109cc:	bc02      	pop	{r1}
-   109ce:	4708      	bx	r1
-   109d0:	ffff 0000 	vaddl.u<illegal width 64>	q8, d15, d0
-
-000109d4 <_lshift>:
-   109d4:	b5f0      	push	{r4, r5, r6, r7, lr}
-   109d6:	1c0d      	adds	r5, r1, #0
-   109d8:	692b      	ldr	r3, [r5, #16]
-   109da:	1157      	asrs	r7, r2, #5
-   109dc:	3301      	adds	r3, #1
-   109de:	18fe      	adds	r6, r7, r3
-   109e0:	6849      	ldr	r1, [r1, #4]
-   109e2:	68ab      	ldr	r3, [r5, #8]
-   109e4:	b082      	sub	sp, #8
-   109e6:	1c14      	adds	r4, r2, #0
-   109e8:	9000      	str	r0, [sp, #0]
-   109ea:	e001      	b.n	109f0 <_lshift+0x1c>
-   109ec:	3101      	adds	r1, #1
-   109ee:	005b      	lsls	r3, r3, #1
-   109f0:	429e      	cmp	r6, r3
-   109f2:	dcfb      	bgt.n	109ec <_lshift+0x18>
-   109f4:	9800      	ldr	r0, [sp, #0]
-   109f6:	f7ff fee5 	bl	107c4 <_Balloc>
-   109fa:	1c01      	adds	r1, r0, #0
-   109fc:	3114      	adds	r1, #20
-   109fe:	2200      	movs	r2, #0
-   10a00:	9001      	str	r0, [sp, #4]
-   10a02:	e002      	b.n	10a0a <_lshift+0x36>
-   10a04:	2300      	movs	r3, #0
-   10a06:	c108      	stmia	r1!, {r3}
-   10a08:	3201      	adds	r2, #1
-   10a0a:	42ba      	cmp	r2, r7
-   10a0c:	dbfa      	blt.n	10a04 <_lshift+0x30>
-   10a0e:	692b      	ldr	r3, [r5, #16]
-   10a10:	1c2a      	adds	r2, r5, #0
-   10a12:	3214      	adds	r2, #20
-   10a14:	009b      	lsls	r3, r3, #2
-   10a16:	189b      	adds	r3, r3, r2
-   10a18:	469c      	mov	ip, r3
-   10a1a:	231f      	movs	r3, #31
-   10a1c:	401c      	ands	r4, r3
-   10a1e:	d010      	beq.n	10a42 <_lshift+0x6e>
-   10a20:	2320      	movs	r3, #32
-   10a22:	1b1f      	subs	r7, r3, r4
-   10a24:	2000      	movs	r0, #0
-   10a26:	6813      	ldr	r3, [r2, #0]
-   10a28:	40a3      	lsls	r3, r4
-   10a2a:	4303      	orrs	r3, r0
-   10a2c:	c108      	stmia	r1!, {r3}
-   10a2e:	ca08      	ldmia	r2!, {r3}
-   10a30:	1c18      	adds	r0, r3, #0
-   10a32:	40f8      	lsrs	r0, r7
-   10a34:	4562      	cmp	r2, ip
-   10a36:	d3f6      	bcc.n	10a26 <_lshift+0x52>
-   10a38:	6008      	str	r0, [r1, #0]
-   10a3a:	2800      	cmp	r0, #0
-   10a3c:	d005      	beq.n	10a4a <_lshift+0x76>
-   10a3e:	3601      	adds	r6, #1
-   10a40:	e003      	b.n	10a4a <_lshift+0x76>
-   10a42:	ca08      	ldmia	r2!, {r3}
-   10a44:	c108      	stmia	r1!, {r3}
-   10a46:	4562      	cmp	r2, ip
-   10a48:	d3fb      	bcc.n	10a42 <_lshift+0x6e>
-   10a4a:	9a01      	ldr	r2, [sp, #4]
-   10a4c:	1e73      	subs	r3, r6, #1
-   10a4e:	9800      	ldr	r0, [sp, #0]
-   10a50:	1c29      	adds	r1, r5, #0
-   10a52:	6113      	str	r3, [r2, #16]
-   10a54:	f7ff fd5c 	bl	10510 <_Bfree>
-   10a58:	9801      	ldr	r0, [sp, #4]
-   10a5a:	b002      	add	sp, #8
-   10a5c:	bcf0      	pop	{r4, r5, r6, r7}
-   10a5e:	bc02      	pop	{r1}
-   10a60:	4708      	bx	r1
-	...
-
-00010a64 <_multiply>:
-   10a64:	b5f0      	push	{r4, r5, r6, r7, lr}
-   10a66:	1c15      	adds	r5, r2, #0
-   10a68:	692b      	ldr	r3, [r5, #16]
-   10a6a:	690a      	ldr	r2, [r1, #16]
-   10a6c:	b088      	sub	sp, #32
-   10a6e:	1c0c      	adds	r4, r1, #0
-   10a70:	429a      	cmp	r2, r3
-   10a72:	da02      	bge.n	10a7a <_multiply+0x16>
-   10a74:	46ac      	mov	ip, r5
-   10a76:	4664      	mov	r4, ip
-   10a78:	1c0d      	adds	r5, r1, #0
-   10a7a:	6926      	ldr	r6, [r4, #16]
-   10a7c:	692f      	ldr	r7, [r5, #16]
-   10a7e:	68a3      	ldr	r3, [r4, #8]
-   10a80:	19f2      	adds	r2, r6, r7
-   10a82:	6861      	ldr	r1, [r4, #4]
-   10a84:	9201      	str	r2, [sp, #4]
-   10a86:	429a      	cmp	r2, r3
-   10a88:	dd00      	ble.n	10a8c <_multiply+0x28>
-   10a8a:	3101      	adds	r1, #1
-   10a8c:	f7ff fe9a 	bl	107c4 <_Balloc>
-   10a90:	9a01      	ldr	r2, [sp, #4]
-   10a92:	1c01      	adds	r1, r0, #0
-   10a94:	3114      	adds	r1, #20
-   10a96:	0093      	lsls	r3, r2, #2
-   10a98:	18cb      	adds	r3, r1, r3
-   10a9a:	1c0a      	adds	r2, r1, #0
-   10a9c:	9000      	str	r0, [sp, #0]
-   10a9e:	9302      	str	r3, [sp, #8]
-   10aa0:	e001      	b.n	10aa6 <_multiply+0x42>
-   10aa2:	2300      	movs	r3, #0
-   10aa4:	c208      	stmia	r2!, {r3}
-   10aa6:	9b02      	ldr	r3, [sp, #8]
-   10aa8:	429a      	cmp	r2, r3
-   10aaa:	d3fa      	bcc.n	10aa2 <_multiply+0x3e>
-   10aac:	3414      	adds	r4, #20
-   10aae:	00b3      	lsls	r3, r6, #2
-   10ab0:	18e3      	adds	r3, r4, r3
-   10ab2:	3514      	adds	r5, #20
-   10ab4:	9303      	str	r3, [sp, #12]
-   10ab6:	00bb      	lsls	r3, r7, #2
-   10ab8:	18eb      	adds	r3, r5, r3
-   10aba:	9407      	str	r4, [sp, #28]
-   10abc:	9504      	str	r5, [sp, #16]
-   10abe:	9305      	str	r3, [sp, #20]
-   10ac0:	9106      	str	r1, [sp, #24]
-   10ac2:	e04b      	b.n	10b5c <_multiply+0xf8>
-   10ac4:	9a04      	ldr	r2, [sp, #16]
-   10ac6:	8817      	ldrh	r7, [r2, #0]
-   10ac8:	2f00      	cmp	r7, #0
-   10aca:	d01e      	beq.n	10b0a <_multiply+0xa6>
-   10acc:	2300      	movs	r3, #0
-   10ace:	9e07      	ldr	r6, [sp, #28]
-   10ad0:	9d06      	ldr	r5, [sp, #24]
-   10ad2:	469c      	mov	ip, r3
-   10ad4:	ce04      	ldmia	r6!, {r2}
-   10ad6:	482d      	ldr	r0, [pc, #180]	(10b8c <.text+0x10b8c>)
-   10ad8:	1c13      	adds	r3, r2, #0
-   10ada:	4003      	ands	r3, r0
-   10adc:	1c3c      	adds	r4, r7, #0
-   10ade:	435c      	muls	r4, r3
-   10ae0:	6829      	ldr	r1, [r5, #0]
-   10ae2:	1c0b      	adds	r3, r1, #0
-   10ae4:	4003      	ands	r3, r0
-   10ae6:	4463      	add	r3, ip
-   10ae8:	0c12      	lsrs	r2, r2, #16
-   10aea:	18e4      	adds	r4, r4, r3
-   10aec:	1c3b      	adds	r3, r7, #0
-   10aee:	4353      	muls	r3, r2
-   10af0:	0c09      	lsrs	r1, r1, #16
-   10af2:	0c22      	lsrs	r2, r4, #16
-   10af4:	185b      	adds	r3, r3, r1
-   10af6:	189b      	adds	r3, r3, r2
-   10af8:	0c1a      	lsrs	r2, r3, #16
-   10afa:	806b      	strh	r3, [r5, #2]
-   10afc:	9b03      	ldr	r3, [sp, #12]
-   10afe:	802c      	strh	r4, [r5, #0]
-   10b00:	4694      	mov	ip, r2
-   10b02:	3504      	adds	r5, #4
-   10b04:	429e      	cmp	r6, r3
-   10b06:	d3e5      	bcc.n	10ad4 <_multiply+0x70>
-   10b08:	602a      	str	r2, [r5, #0]
-   10b0a:	9a04      	ldr	r2, [sp, #16]
-   10b0c:	8857      	ldrh	r7, [r2, #2]
-   10b0e:	2f00      	cmp	r7, #0
-   10b10:	d01e      	beq.n	10b50 <_multiply+0xec>
-   10b12:	9b06      	ldr	r3, [sp, #24]
-   10b14:	2200      	movs	r2, #0
-   10b16:	681d      	ldr	r5, [r3, #0]
-   10b18:	9e07      	ldr	r6, [sp, #28]
-   10b1a:	1c1c      	adds	r4, r3, #0
-   10b1c:	4694      	mov	ip, r2
-   10b1e:	ce04      	ldmia	r6!, {r2}
-   10b20:	481a      	ldr	r0, [pc, #104]	(10b8c <.text+0x10b8c>)
-   10b22:	1c13      	adds	r3, r2, #0
-   10b24:	4003      	ands	r3, r0
-   10b26:	1c39      	adds	r1, r7, #0
-   10b28:	4359      	muls	r1, r3
-   10b2a:	0c12      	lsrs	r2, r2, #16
-   10b2c:	437a      	muls	r2, r7
-   10b2e:	8863      	ldrh	r3, [r4, #2]
-   10b30:	4463      	add	r3, ip
-   10b32:	18c9      	adds	r1, r1, r3
-   10b34:	8061      	strh	r1, [r4, #2]
-   10b36:	8025      	strh	r5, [r4, #0]
-   10b38:	3404      	adds	r4, #4
-   10b3a:	6823      	ldr	r3, [r4, #0]
-   10b3c:	4003      	ands	r3, r0
-   10b3e:	18d2      	adds	r2, r2, r3
-   10b40:	0c09      	lsrs	r1, r1, #16
-   10b42:	1855      	adds	r5, r2, r1
-   10b44:	9a03      	ldr	r2, [sp, #12]
-   10b46:	0c2b      	lsrs	r3, r5, #16
-   10b48:	469c      	mov	ip, r3
-   10b4a:	4296      	cmp	r6, r2
-   10b4c:	d3e7      	bcc.n	10b1e <_multiply+0xba>
-   10b4e:	6025      	str	r5, [r4, #0]
-   10b50:	9b04      	ldr	r3, [sp, #16]
-   10b52:	9a06      	ldr	r2, [sp, #24]
-   10b54:	3304      	adds	r3, #4
-   10b56:	3204      	adds	r2, #4
-   10b58:	9304      	str	r3, [sp, #16]
-   10b5a:	9206      	str	r2, [sp, #24]
-   10b5c:	9b04      	ldr	r3, [sp, #16]
-   10b5e:	9a05      	ldr	r2, [sp, #20]
-   10b60:	4293      	cmp	r3, r2
-   10b62:	d3af      	bcc.n	10ac4 <_multiply+0x60>
-   10b64:	9a02      	ldr	r2, [sp, #8]
-   10b66:	e002      	b.n	10b6e <_multiply+0x10a>
-   10b68:	9b01      	ldr	r3, [sp, #4]
-   10b6a:	3b01      	subs	r3, #1
-   10b6c:	9301      	str	r3, [sp, #4]
-   10b6e:	9b01      	ldr	r3, [sp, #4]
-   10b70:	2b00      	cmp	r3, #0
-   10b72:	dd03      	ble.n	10b7c <_multiply+0x118>
-   10b74:	3a04      	subs	r2, #4
-   10b76:	6813      	ldr	r3, [r2, #0]
-   10b78:	2b00      	cmp	r3, #0
-   10b7a:	d0f5      	beq.n	10b68 <_multiply+0x104>
-   10b7c:	9b00      	ldr	r3, [sp, #0]
-   10b7e:	9a01      	ldr	r2, [sp, #4]
-   10b80:	1c18      	adds	r0, r3, #0
-   10b82:	b008      	add	sp, #32
-   10b84:	611a      	str	r2, [r3, #16]
-   10b86:	bcf0      	pop	{r4, r5, r6, r7}
-   10b88:	bc02      	pop	{r1}
-   10b8a:	4708      	bx	r1
-   10b8c:	ffff 0000 	vaddl.u<illegal width 64>	q8, d15, d0
-
-00010b90 <_i2b>:
-   10b90:	b510      	push	{r4, lr}
-   10b92:	1c0c      	adds	r4, r1, #0
-   10b94:	2101      	movs	r1, #1
-   10b96:	f7ff fe15 	bl	107c4 <_Balloc>
-   10b9a:	2301      	movs	r3, #1
-   10b9c:	6144      	str	r4, [r0, #20]
-   10b9e:	6103      	str	r3, [r0, #16]
-   10ba0:	bc10      	pop	{r4}
-   10ba2:	bc02      	pop	{r1}
-   10ba4:	4708      	bx	r1
-	...
-
-00010ba8 <_multadd>:
-   10ba8:	b5f0      	push	{r4, r5, r6, r7, lr}
-   10baa:	b082      	sub	sp, #8
-   10bac:	1c1e      	adds	r6, r3, #0
-   10bae:	1c0c      	adds	r4, r1, #0
-   10bb0:	2300      	movs	r3, #0
-   10bb2:	9001      	str	r0, [sp, #4]
-   10bb4:	9200      	str	r2, [sp, #0]
-   10bb6:	690f      	ldr	r7, [r1, #16]
-   10bb8:	1c0d      	adds	r5, r1, #0
-   10bba:	3414      	adds	r4, #20
-   10bbc:	469c      	mov	ip, r3
-   10bbe:	6822      	ldr	r2, [r4, #0]
-   10bc0:	481b      	ldr	r0, [pc, #108]	(10c30 <.text+0x10c30>)
-   10bc2:	9b00      	ldr	r3, [sp, #0]
-   10bc4:	1c11      	adds	r1, r2, #0
-   10bc6:	4001      	ands	r1, r0
-   10bc8:	4359      	muls	r1, r3
-   10bca:	0c12      	lsrs	r2, r2, #16
-   10bcc:	1989      	adds	r1, r1, r6
-   10bce:	1c1e      	adds	r6, r3, #0
-   10bd0:	1c33      	adds	r3, r6, #0
-   10bd2:	4353      	muls	r3, r2
-   10bd4:	0c0a      	lsrs	r2, r1, #16
-   10bd6:	189b      	adds	r3, r3, r2
-   10bd8:	0c1e      	lsrs	r6, r3, #16
-   10bda:	4001      	ands	r1, r0
-   10bdc:	041b      	lsls	r3, r3, #16
-   10bde:	185b      	adds	r3, r3, r1
-   10be0:	c408      	stmia	r4!, {r3}
-   10be2:	2301      	movs	r3, #1
-   10be4:	449c      	add	ip, r3
-   10be6:	45bc      	cmp	ip, r7
-   10be8:	dbe9      	blt.n	10bbe <_multadd+0x16>
-   10bea:	2e00      	cmp	r6, #0
-   10bec:	d01a      	beq.n	10c24 <_multadd+0x7c>
-   10bee:	68ab      	ldr	r3, [r5, #8]
-   10bf0:	429f      	cmp	r7, r3
-   10bf2:	db12      	blt.n	10c1a <_multadd+0x72>
-   10bf4:	6869      	ldr	r1, [r5, #4]
-   10bf6:	9801      	ldr	r0, [sp, #4]
-   10bf8:	3101      	adds	r1, #1
-   10bfa:	f7ff fde3 	bl	107c4 <_Balloc>
-   10bfe:	692a      	ldr	r2, [r5, #16]
-   10c00:	1c29      	adds	r1, r5, #0
-   10c02:	0092      	lsls	r2, r2, #2
-   10c04:	1c04      	adds	r4, r0, #0
-   10c06:	310c      	adds	r1, #12
-   10c08:	3208      	adds	r2, #8
-   10c0a:	300c      	adds	r0, #12
-   10c0c:	f7fc fa22 	bl	d054 <memcpy>
-   10c10:	1c29      	adds	r1, r5, #0
-   10c12:	9801      	ldr	r0, [sp, #4]
-   10c14:	f7ff fc7c 	bl	10510 <_Bfree>
-   10c18:	1c25      	adds	r5, r4, #0
-   10c1a:	00bb      	lsls	r3, r7, #2
-   10c1c:	195b      	adds	r3, r3, r5
-   10c1e:	615e      	str	r6, [r3, #20]
-   10c20:	1c7b      	adds	r3, r7, #1
-   10c22:	612b      	str	r3, [r5, #16]
-   10c24:	1c28      	adds	r0, r5, #0
-   10c26:	b002      	add	sp, #8
-   10c28:	bcf0      	pop	{r4, r5, r6, r7}
-   10c2a:	bc02      	pop	{r1}
-   10c2c:	4708      	bx	r1
-   10c2e:	0000      	lsls	r0, r0, #0
-   10c30:	ffff 0000 	vaddl.u<illegal width 64>	q8, d15, d0
-
-00010c34 <_pow5mult>:
-   10c34:	b5f0      	push	{r4, r5, r6, r7, lr}
-   10c36:	b081      	sub	sp, #4
-   10c38:	2303      	movs	r3, #3
-   10c3a:	1c06      	adds	r6, r0, #0
-   10c3c:	9100      	str	r1, [sp, #0]
-   10c3e:	1c14      	adds	r4, r2, #0
-   10c40:	401a      	ands	r2, r3
-   10c42:	d008      	beq.n	10c56 <_pow5mult+0x22>
-   10c44:	4b1c      	ldr	r3, [pc, #112]	(10cb8 <.text+0x10cb8>)
-   10c46:	0092      	lsls	r2, r2, #2
-   10c48:	18d2      	adds	r2, r2, r3
-   10c4a:	3a04      	subs	r2, #4
-   10c4c:	6812      	ldr	r2, [r2, #0]
-   10c4e:	2300      	movs	r3, #0
-   10c50:	f7ff ffaa 	bl	10ba8 <_multadd>
-   10c54:	9000      	str	r0, [sp, #0]
-   10c56:	10a7      	asrs	r7, r4, #2
-   10c58:	2f00      	cmp	r7, #0
-   10c5a:	d028      	beq.n	10cae <_pow5mult+0x7a>
-   10c5c:	6cb5      	ldr	r5, [r6, #72]
-   10c5e:	2d00      	cmp	r5, #0
-   10c60:	d109      	bne.n	10c76 <_pow5mult+0x42>
-   10c62:	1c30      	adds	r0, r6, #0
-   10c64:	4915      	ldr	r1, [pc, #84]	(10cbc <.text+0x10cbc>)
-   10c66:	f7ff ff93 	bl	10b90 <_i2b>
-   10c6a:	2300      	movs	r3, #0
-   10c6c:	1c05      	adds	r5, r0, #0
-   10c6e:	64b0      	str	r0, [r6, #72]
-   10c70:	6003      	str	r3, [r0, #0]
-   10c72:	e000      	b.n	10c76 <_pow5mult+0x42>
-   10c74:	1c25      	adds	r5, r4, #0
-   10c76:	07fb      	lsls	r3, r7, #31
-   10c78:	d50a      	bpl.n	10c90 <_pow5mult+0x5c>
-   10c7a:	9900      	ldr	r1, [sp, #0]
-   10c7c:	1c2a      	adds	r2, r5, #0
-   10c7e:	1c30      	adds	r0, r6, #0
-   10c80:	f7ff fef0 	bl	10a64 <_multiply>
-   10c84:	9900      	ldr	r1, [sp, #0]
-   10c86:	1c04      	adds	r4, r0, #0
-   10c88:	1c30      	adds	r0, r6, #0
-   10c8a:	f7ff fc41 	bl	10510 <_Bfree>
-   10c8e:	9400      	str	r4, [sp, #0]
-   10c90:	107f      	asrs	r7, r7, #1
-   10c92:	2f00      	cmp	r7, #0
-   10c94:	d00b      	beq.n	10cae <_pow5mult+0x7a>
-   10c96:	682c      	ldr	r4, [r5, #0]
-   10c98:	2c00      	cmp	r4, #0
-   10c9a:	d1eb      	bne.n	10c74 <_pow5mult+0x40>
-   10c9c:	1c29      	adds	r1, r5, #0
-   10c9e:	1c2a      	adds	r2, r5, #0
-   10ca0:	1c30      	adds	r0, r6, #0
-   10ca2:	f7ff fedf 	bl	10a64 <_multiply>
-   10ca6:	6028      	str	r0, [r5, #0]
-   10ca8:	1c05      	adds	r5, r0, #0
-   10caa:	6004      	str	r4, [r0, #0]
-   10cac:	e7e3      	b.n	10c76 <_pow5mult+0x42>
-   10cae:	9800      	ldr	r0, [sp, #0]
-   10cb0:	b001      	add	sp, #4
-   10cb2:	bcf0      	pop	{r4, r5, r6, r7}
-   10cb4:	bc02      	pop	{r1}
-   10cb6:	4708      	bx	r1
-   10cb8:	5674      	ldrsb	r4, [r6, r1]
-   10cba:	0001      	lsls	r1, r0, #0
-   10cbc:	0271      	lsls	r1, r6, #9
-	...
-
-00010cc0 <_s2b>:
-   10cc0:	b5f0      	push	{r4, r5, r6, r7, lr}
-   10cc2:	b082      	sub	sp, #8
-   10cc4:	9001      	str	r0, [sp, #4]
-   10cc6:	1c18      	adds	r0, r3, #0
-   10cc8:	1c0d      	adds	r5, r1, #0
-   10cca:	3008      	adds	r0, #8
-   10ccc:	2109      	movs	r1, #9
-   10cce:	9300      	str	r3, [sp, #0]
-   10cd0:	1c16      	adds	r6, r2, #0
-   10cd2:	f002 fdb9 	bl	13848 <__aeabi_idiv>
-   10cd6:	2301      	movs	r3, #1
-   10cd8:	2100      	movs	r1, #0
-   10cda:	e001      	b.n	10ce0 <_s2b+0x20>
-   10cdc:	005b      	lsls	r3, r3, #1
-   10cde:	3101      	adds	r1, #1
-   10ce0:	4298      	cmp	r0, r3
-   10ce2:	dcfb      	bgt.n	10cdc <_s2b+0x1c>
-   10ce4:	9801      	ldr	r0, [sp, #4]
-   10ce6:	f7ff fd6d 	bl	107c4 <_Balloc>
-   10cea:	9b07      	ldr	r3, [sp, #28]
-   10cec:	6143      	str	r3, [r0, #20]
-   10cee:	2301      	movs	r3, #1
-   10cf0:	1c01      	adds	r1, r0, #0
-   10cf2:	6103      	str	r3, [r0, #16]
-   10cf4:	2e09      	cmp	r6, #9
-   10cf6:	dd11      	ble.n	10d1c <_s2b+0x5c>
-   10cf8:	1c2f      	adds	r7, r5, #0
-   10cfa:	3709      	adds	r7, #9
-   10cfc:	2409      	movs	r4, #9
-   10cfe:	5d63      	ldrb	r3, [r4, r5]
-   10d00:	9801      	ldr	r0, [sp, #4]
-   10d02:	3b30      	subs	r3, #48
-   10d04:	220a      	movs	r2, #10
-   10d06:	f7ff ff4f 	bl	10ba8 <_multadd>
-   10d0a:	3401      	adds	r4, #1
-   10d0c:	1c01      	adds	r1, r0, #0
-   10d0e:	42b4      	cmp	r4, r6
-   10d10:	d1f5      	bne.n	10cfe <_s2b+0x3e>
-   10d12:	19bb      	adds	r3, r7, r6
-   10d14:	1c1d      	adds	r5, r3, #0
-   10d16:	3d08      	subs	r5, #8
-   10d18:	1c34      	adds	r4, r6, #0
-   10d1a:	e00b      	b.n	10d34 <_s2b+0x74>
-   10d1c:	350a      	adds	r5, #10
-   10d1e:	2409      	movs	r4, #9
-   10d20:	e008      	b.n	10d34 <_s2b+0x74>
-   10d22:	782b      	ldrb	r3, [r5, #0]
-   10d24:	9801      	ldr	r0, [sp, #4]
-   10d26:	3b30      	subs	r3, #48
-   10d28:	220a      	movs	r2, #10
-   10d2a:	f7ff ff3d 	bl	10ba8 <_multadd>
-   10d2e:	3501      	adds	r5, #1
-   10d30:	1c01      	adds	r1, r0, #0
-   10d32:	3401      	adds	r4, #1
-   10d34:	9b00      	ldr	r3, [sp, #0]
-   10d36:	429c      	cmp	r4, r3
-   10d38:	dbf3      	blt.n	10d22 <_s2b+0x62>
-   10d3a:	1c08      	adds	r0, r1, #0
-   10d3c:	b002      	add	sp, #8
-   10d3e:	bcf0      	pop	{r4, r5, r6, r7}
-   10d40:	bc02      	pop	{r1}
-   10d42:	4708      	bx	r1
-
-00010d44 <_realloc_r>:
-   10d44:	b5f0      	push	{r4, r5, r6, r7, lr}
-   10d46:	b08b      	sub	sp, #44
-   10d48:	9003      	str	r0, [sp, #12]
-   10d4a:	1c0f      	adds	r7, r1, #0
-   10d4c:	9202      	str	r2, [sp, #8]
-   10d4e:	2900      	cmp	r1, #0
-   10d50:	d103      	bne.n	10d5a <_realloc_r+0x16>
-   10d52:	1c11      	adds	r1, r2, #0
-   10d54:	f7ff f952 	bl	fffc <_malloc_r>
-   10d58:	e01c      	b.n	10d94 <_realloc_r+0x50>
-   10d5a:	9803      	ldr	r0, [sp, #12]
-   10d5c:	1c3e      	adds	r6, r7, #0
-   10d5e:	f7ff fbd3 	bl	10508 <__malloc_lock>
-   10d62:	3e08      	subs	r6, #8
-   10d64:	9a02      	ldr	r2, [sp, #8]
-   10d66:	6870      	ldr	r0, [r6, #4]
-   10d68:	320b      	adds	r2, #11
-   10d6a:	9004      	str	r0, [sp, #16]
-   10d6c:	2a16      	cmp	r2, #22
-   10d6e:	d803      	bhi.n	10d78 <_realloc_r+0x34>
-   10d70:	2110      	movs	r1, #16
-   10d72:	9108      	str	r1, [sp, #32]
-   10d74:	9101      	str	r1, [sp, #4]
-   10d76:	e005      	b.n	10d84 <_realloc_r+0x40>
-   10d78:	2307      	movs	r3, #7
-   10d7a:	439a      	bics	r2, r3
-   10d7c:	9201      	str	r2, [sp, #4]
-   10d7e:	9208      	str	r2, [sp, #32]
-   10d80:	2a00      	cmp	r2, #0
-   10d82:	db03      	blt.n	10d8c <_realloc_r+0x48>
-   10d84:	9a08      	ldr	r2, [sp, #32]
-   10d86:	9b02      	ldr	r3, [sp, #8]
-   10d88:	429a      	cmp	r2, r3
-   10d8a:	d205      	bcs.n	10d98 <_realloc_r+0x54>
-   10d8c:	9d03      	ldr	r5, [sp, #12]
-   10d8e:	230c      	movs	r3, #12
-   10d90:	602b      	str	r3, [r5, #0]
-   10d92:	2000      	movs	r0, #0
-   10d94:	900a      	str	r0, [sp, #40]
-   10d96:	e152      	b.n	1103e <_realloc_r+0x2fa>
-   10d98:	9d04      	ldr	r5, [sp, #16]
-   10d9a:	2403      	movs	r4, #3
-   10d9c:	9901      	ldr	r1, [sp, #4]
-   10d9e:	43a5      	bics	r5, r4
-   10da0:	428d      	cmp	r5, r1
-   10da2:	db00      	blt.n	10da6 <_realloc_r+0x62>
-   10da4:	e11a      	b.n	10fdc <_realloc_r+0x298>
-   10da6:	4aa8      	ldr	r2, [pc, #672]	(11048 <.text+0x11048>)
-   10da8:	6893      	ldr	r3, [r2, #8]
-   10daa:	1971      	adds	r1, r6, r5
-   10dac:	9205      	str	r2, [sp, #20]
-   10dae:	9306      	str	r3, [sp, #24]
-   10db0:	6848      	ldr	r0, [r1, #4]
-   10db2:	4299      	cmp	r1, r3
-   10db4:	d008      	beq.n	10dc8 <_realloc_r+0x84>
-   10db6:	2301      	movs	r3, #1
-   10db8:	1c02      	adds	r2, r0, #0
-   10dba:	439a      	bics	r2, r3
-   10dbc:	188a      	adds	r2, r1, r2
-   10dbe:	6852      	ldr	r2, [r2, #4]
-   10dc0:	421a      	tst	r2, r3
-   10dc2:	d100      	bne.n	10dc6 <_realloc_r+0x82>
-   10dc4:	e133      	b.n	1102e <_realloc_r+0x2ea>
-   10dc6:	e01c      	b.n	10e02 <_realloc_r+0xbe>
-   10dc8:	9b08      	ldr	r3, [sp, #32]
-   10dca:	43a0      	bics	r0, r4
-   10dcc:	1942      	adds	r2, r0, r5
-   10dce:	3310      	adds	r3, #16
-   10dd0:	429a      	cmp	r2, r3
-   10dd2:	db18      	blt.n	10e06 <_realloc_r+0xc2>
-   10dd4:	9d08      	ldr	r5, [sp, #32]
-   10dd6:	1b53      	subs	r3, r2, r5
-   10dd8:	2201      	movs	r2, #1
-   10dda:	1971      	adds	r1, r6, r5
-   10ddc:	4313      	orrs	r3, r2
-   10dde:	604b      	str	r3, [r1, #4]
-   10de0:	6873      	ldr	r3, [r6, #4]
-   10de2:	9805      	ldr	r0, [sp, #20]
-   10de4:	4013      	ands	r3, r2
-   10de6:	432b      	orrs	r3, r5
-   10de8:	6081      	str	r1, [r0, #8]
-   10dea:	6073      	str	r3, [r6, #4]
-   10dec:	9803      	ldr	r0, [sp, #12]
-   10dee:	f7ff fb8d 	bl	1050c <__malloc_unlock>
-   10df2:	3608      	adds	r6, #8
-   10df4:	960a      	str	r6, [sp, #40]
-   10df6:	e122      	b.n	1103e <_realloc_r+0x2fa>
-   10df8:	68ca      	ldr	r2, [r1, #12]
-   10dfa:	688b      	ldr	r3, [r1, #8]
-   10dfc:	60da      	str	r2, [r3, #12]
-   10dfe:	6093      	str	r3, [r2, #8]
-   10e00:	e0b3      	b.n	10f6a <_realloc_r+0x226>
-   10e02:	2100      	movs	r1, #0
-   10e04:	2000      	movs	r0, #0
-   10e06:	9a04      	ldr	r2, [sp, #16]
-   10e08:	07d2      	lsls	r2, r2, #31
-   10e0a:	d500      	bpl.n	10e0e <_realloc_r+0xca>
-   10e0c:	e099      	b.n	10f42 <_realloc_r+0x1fe>
-   10e0e:	6833      	ldr	r3, [r6, #0]
-   10e10:	1af4      	subs	r4, r6, r3
-   10e12:	6862      	ldr	r2, [r4, #4]
-   10e14:	2303      	movs	r3, #3
-   10e16:	439a      	bics	r2, r3
-   10e18:	2900      	cmp	r1, #0
-   10e1a:	d059      	beq.n	10ed0 <_realloc_r+0x18c>
-   10e1c:	18ab      	adds	r3, r5, r2
-   10e1e:	9300      	str	r3, [sp, #0]
-   10e20:	9b06      	ldr	r3, [sp, #24]
-   10e22:	4299      	cmp	r1, r3
-   10e24:	d149      	bne.n	10eba <_realloc_r+0x176>
-   10e26:	9900      	ldr	r1, [sp, #0]
-   10e28:	9b08      	ldr	r3, [sp, #32]
-   10e2a:	1840      	adds	r0, r0, r1
-   10e2c:	3310      	adds	r3, #16
-   10e2e:	9007      	str	r0, [sp, #28]
-   10e30:	4298      	cmp	r0, r3
-   10e32:	db4d      	blt.n	10ed0 <_realloc_r+0x18c>
-   10e34:	68e2      	ldr	r2, [r4, #12]
-   10e36:	68a3      	ldr	r3, [r4, #8]
-   10e38:	60da      	str	r2, [r3, #12]
-   10e3a:	6093      	str	r3, [r2, #8]
-   10e3c:	1c22      	adds	r2, r4, #0
-   10e3e:	3208      	adds	r2, #8
-   10e40:	1f2e      	subs	r6, r5, #4
-   10e42:	920a      	str	r2, [sp, #40]
-   10e44:	2e24      	cmp	r6, #36
-   10e46:	d824      	bhi.n	10e92 <_realloc_r+0x14e>
-   10e48:	1c38      	adds	r0, r7, #0
-   10e4a:	1c15      	adds	r5, r2, #0
-   10e4c:	2e13      	cmp	r6, #19
-   10e4e:	d917      	bls.n	10e80 <_realloc_r+0x13c>
-   10e50:	1c3a      	adds	r2, r7, #0
-   10e52:	ca08      	ldmia	r2!, {r3}
-   10e54:	60a3      	str	r3, [r4, #8]
-   10e56:	687b      	ldr	r3, [r7, #4]
-   10e58:	3508      	adds	r5, #8
-   10e5a:	60e3      	str	r3, [r4, #12]
-   10e5c:	1d10      	adds	r0, r2, #4
-   10e5e:	2e1b      	cmp	r6, #27
-   10e60:	d90e      	bls.n	10e80 <_realloc_r+0x13c>
-   10e62:	6853      	ldr	r3, [r2, #4]
-   10e64:	6123      	str	r3, [r4, #16]
-   10e66:	6843      	ldr	r3, [r0, #4]
-   10e68:	1d02      	adds	r2, r0, #4
-   10e6a:	6163      	str	r3, [r4, #20]
-   10e6c:	3508      	adds	r5, #8
-   10e6e:	1d10      	adds	r0, r2, #4
-   10e70:	2e24      	cmp	r6, #36
-   10e72:	d105      	bne.n	10e80 <_realloc_r+0x13c>
-   10e74:	6853      	ldr	r3, [r2, #4]
-   10e76:	61a3      	str	r3, [r4, #24]
-   10e78:	6843      	ldr	r3, [r0, #4]
-   10e7a:	61e3      	str	r3, [r4, #28]
-   10e7c:	3508      	adds	r5, #8
-   10e7e:	3008      	adds	r0, #8
-   10e80:	1c01      	adds	r1, r0, #0
-   10e82:	c908      	ldmia	r1!, {r3}
-   10e84:	1c2a      	adds	r2, r5, #0
-   10e86:	c208      	stmia	r2!, {r3}
-   10e88:	6843      	ldr	r3, [r0, #4]
-   10e8a:	606b      	str	r3, [r5, #4]
-   10e8c:	684b      	ldr	r3, [r1, #4]
-   10e8e:	6053      	str	r3, [r2, #4]
-   10e90:	e004      	b.n	10e9c <_realloc_r+0x158>
-   10e92:	980a      	ldr	r0, [sp, #40]
-   10e94:	1c39      	adds	r1, r7, #0
-   10e96:	1c32      	adds	r2, r6, #0
-   10e98:	f7ff fb12 	bl	104c0 <memmove>
-   10e9c:	9b08      	ldr	r3, [sp, #32]
-   10e9e:	9807      	ldr	r0, [sp, #28]
-   10ea0:	18e1      	adds	r1, r4, r3
-   10ea2:	2201      	movs	r2, #1
-   10ea4:	1ac3      	subs	r3, r0, r3
-   10ea6:	4313      	orrs	r3, r2
-   10ea8:	604b      	str	r3, [r1, #4]
-   10eaa:	9d05      	ldr	r5, [sp, #20]
-   10eac:	6863      	ldr	r3, [r4, #4]
-   10eae:	60a9      	str	r1, [r5, #8]
-   10eb0:	9d08      	ldr	r5, [sp, #32]
-   10eb2:	4013      	ands	r3, r2
-   10eb4:	432b      	orrs	r3, r5
-   10eb6:	6063      	str	r3, [r4, #4]
-   10eb8:	e08c      	b.n	10fd4 <_realloc_r+0x290>
-   10eba:	9b00      	ldr	r3, [sp, #0]
-   10ebc:	18c0      	adds	r0, r0, r3
-   10ebe:	9b01      	ldr	r3, [sp, #4]
-   10ec0:	9009      	str	r0, [sp, #36]
-   10ec2:	4298      	cmp	r0, r3
-   10ec4:	db04      	blt.n	10ed0 <_realloc_r+0x18c>
-   10ec6:	68ca      	ldr	r2, [r1, #12]
-   10ec8:	688b      	ldr	r3, [r1, #8]
-   10eca:	60da      	str	r2, [r3, #12]
-   10ecc:	6093      	str	r3, [r2, #8]
-   10ece:	e004      	b.n	10eda <_realloc_r+0x196>
-   10ed0:	9801      	ldr	r0, [sp, #4]
-   10ed2:	1952      	adds	r2, r2, r5
-   10ed4:	9209      	str	r2, [sp, #36]
-   10ed6:	4282      	cmp	r2, r0
-   10ed8:	db33      	blt.n	10f42 <_realloc_r+0x1fe>
-   10eda:	68e2      	ldr	r2, [r4, #12]
-   10edc:	68a3      	ldr	r3, [r4, #8]
-   10ede:	1f2e      	subs	r6, r5, #4
-   10ee0:	60da      	str	r2, [r3, #12]
-   10ee2:	6093      	str	r3, [r2, #8]
-   10ee4:	1c22      	adds	r2, r4, #0
-   10ee6:	3208      	adds	r2, #8
-   10ee8:	2e24      	cmp	r6, #36
-   10eea:	d824      	bhi.n	10f36 <_realloc_r+0x1f2>
-   10eec:	1c38      	adds	r0, r7, #0
-   10eee:	1c15      	adds	r5, r2, #0
-   10ef0:	2e13      	cmp	r6, #19
-   10ef2:	d917      	bls.n	10f24 <_realloc_r+0x1e0>
-   10ef4:	1c3a      	adds	r2, r7, #0
-   10ef6:	ca08      	ldmia	r2!, {r3}
-   10ef8:	60a3      	str	r3, [r4, #8]
-   10efa:	687b      	ldr	r3, [r7, #4]
-   10efc:	3508      	adds	r5, #8
-   10efe:	60e3      	str	r3, [r4, #12]
-   10f00:	1d10      	adds	r0, r2, #4
-   10f02:	2e1b      	cmp	r6, #27
-   10f04:	d90e      	bls.n	10f24 <_realloc_r+0x1e0>
-   10f06:	6853      	ldr	r3, [r2, #4]
-   10f08:	6123      	str	r3, [r4, #16]
-   10f0a:	6843      	ldr	r3, [r0, #4]
-   10f0c:	1d02      	adds	r2, r0, #4
-   10f0e:	6163      	str	r3, [r4, #20]
-   10f10:	3508      	adds	r5, #8
-   10f12:	1d10      	adds	r0, r2, #4
-   10f14:	2e24      	cmp	r6, #36
-   10f16:	d105      	bne.n	10f24 <_realloc_r+0x1e0>
-   10f18:	6853      	ldr	r3, [r2, #4]
-   10f1a:	61a3      	str	r3, [r4, #24]
-   10f1c:	6843      	ldr	r3, [r0, #4]
-   10f1e:	61e3      	str	r3, [r4, #28]
-   10f20:	3508      	adds	r5, #8
-   10f22:	3008      	adds	r0, #8
-   10f24:	1c01      	adds	r1, r0, #0
-   10f26:	c908      	ldmia	r1!, {r3}
-   10f28:	1c2a      	adds	r2, r5, #0
-   10f2a:	c208      	stmia	r2!, {r3}
-   10f2c:	6843      	ldr	r3, [r0, #4]
-   10f2e:	606b      	str	r3, [r5, #4]
-   10f30:	684b      	ldr	r3, [r1, #4]
-   10f32:	6053      	str	r3, [r2, #4]
-   10f34:	e054      	b.n	10fe0 <_realloc_r+0x29c>
-   10f36:	1c10      	adds	r0, r2, #0
-   10f38:	1c39      	adds	r1, r7, #0
-   10f3a:	1c32      	adds	r2, r6, #0
-   10f3c:	f7ff fac0 	bl	104c0 <memmove>
-   10f40:	e04e      	b.n	10fe0 <_realloc_r+0x29c>
-   10f42:	9803      	ldr	r0, [sp, #12]
-   10f44:	9902      	ldr	r1, [sp, #8]
-   10f46:	f7ff f859 	bl	fffc <_malloc_r>
-   10f4a:	900a      	str	r0, [sp, #40]
-   10f4c:	2800      	cmp	r0, #0
-   10f4e:	d041      	beq.n	10fd4 <_realloc_r+0x290>
-   10f50:	6873      	ldr	r3, [r6, #4]
-   10f52:	990a      	ldr	r1, [sp, #40]
-   10f54:	2201      	movs	r2, #1
-   10f56:	4393      	bics	r3, r2
-   10f58:	3908      	subs	r1, #8
-   10f5a:	18f3      	adds	r3, r6, r3
-   10f5c:	4299      	cmp	r1, r3
-   10f5e:	d106      	bne.n	10f6e <_realloc_r+0x22a>
-   10f60:	684b      	ldr	r3, [r1, #4]
-   10f62:	2203      	movs	r2, #3
-   10f64:	4393      	bics	r3, r2
-   10f66:	18ed      	adds	r5, r5, r3
-   10f68:	9509      	str	r5, [sp, #36]
-   10f6a:	1c34      	adds	r4, r6, #0
-   10f6c:	e038      	b.n	10fe0 <_realloc_r+0x29c>
-   10f6e:	3d04      	subs	r5, #4
-   10f70:	2d24      	cmp	r5, #36
-   10f72:	d826      	bhi.n	10fc2 <_realloc_r+0x27e>
-   10f74:	1c38      	adds	r0, r7, #0
-   10f76:	9c0a      	ldr	r4, [sp, #40]
-   10f78:	2d13      	cmp	r5, #19
-   10f7a:	d919      	bls.n	10fb0 <_realloc_r+0x26c>
-   10f7c:	1c3a      	adds	r2, r7, #0
-   10f7e:	ca08      	ldmia	r2!, {r3}
-   10f80:	1c21      	adds	r1, r4, #0
-   10f82:	c108      	stmia	r1!, {r3}
-   10f84:	687b      	ldr	r3, [r7, #4]
-   10f86:	1d10      	adds	r0, r2, #4
-   10f88:	6063      	str	r3, [r4, #4]
-   10f8a:	1d0c      	adds	r4, r1, #4
-   10f8c:	2d1b      	cmp	r5, #27
-   10f8e:	d90f      	bls.n	10fb0 <_realloc_r+0x26c>
-   10f90:	6853      	ldr	r3, [r2, #4]
-   10f92:	604b      	str	r3, [r1, #4]
-   10f94:	6843      	ldr	r3, [r0, #4]
-   10f96:	1d21      	adds	r1, r4, #4
-   10f98:	1d02      	adds	r2, r0, #4
-   10f9a:	6063      	str	r3, [r4, #4]
-   10f9c:	1d10      	adds	r0, r2, #4
-   10f9e:	1d0c      	adds	r4, r1, #4
-   10fa0:	2d24      	cmp	r5, #36
-   10fa2:	d105      	bne.n	10fb0 <_realloc_r+0x26c>
-   10fa4:	6853      	ldr	r3, [r2, #4]
-   10fa6:	604b      	str	r3, [r1, #4]
-   10fa8:	6843      	ldr	r3, [r0, #4]
-   10faa:	3008      	adds	r0, #8
-   10fac:	6063      	str	r3, [r4, #4]
-   10fae:	3408      	adds	r4, #8
-   10fb0:	1c01      	adds	r1, r0, #0
-   10fb2:	c908      	ldmia	r1!, {r3}
-   10fb4:	1c22      	adds	r2, r4, #0
-   10fb6:	c208      	stmia	r2!, {r3}
-   10fb8:	6843      	ldr	r3, [r0, #4]
-   10fba:	6063      	str	r3, [r4, #4]
-   10fbc:	684b      	ldr	r3, [r1, #4]
-   10fbe:	6053      	str	r3, [r2, #4]
-   10fc0:	e004      	b.n	10fcc <_realloc_r+0x288>
-   10fc2:	980a      	ldr	r0, [sp, #40]
-   10fc4:	1c39      	adds	r1, r7, #0
-   10fc6:	1c2a      	adds	r2, r5, #0
-   10fc8:	f7ff fa7a 	bl	104c0 <memmove>
-   10fcc:	9803      	ldr	r0, [sp, #12]
-   10fce:	1c39      	adds	r1, r7, #0
-   10fd0:	f7fe fd10 	bl	f9f4 <_free_r>
-   10fd4:	9803      	ldr	r0, [sp, #12]
-   10fd6:	f7ff fa99 	bl	1050c <__malloc_unlock>
-   10fda:	e030      	b.n	1103e <_realloc_r+0x2fa>
-   10fdc:	9509      	str	r5, [sp, #36]
-   10fde:	1c34      	adds	r4, r6, #0
-   10fe0:	9909      	ldr	r1, [sp, #36]
-   10fe2:	9a08      	ldr	r2, [sp, #32]
-   10fe4:	1a88      	subs	r0, r1, r2
-   10fe6:	6863      	ldr	r3, [r4, #4]
-   10fe8:	280f      	cmp	r0, #15
-   10fea:	d911      	bls.n	11010 <_realloc_r+0x2cc>
-   10fec:	18a1      	adds	r1, r4, r2
-   10fee:	9d08      	ldr	r5, [sp, #32]
-   10ff0:	2201      	movs	r2, #1
-   10ff2:	4013      	ands	r3, r2
-   10ff4:	432b      	orrs	r3, r5
-   10ff6:	6063      	str	r3, [r4, #4]
-   10ff8:	1c03      	adds	r3, r0, #0
-   10ffa:	4313      	orrs	r3, r2
-   10ffc:	604b      	str	r3, [r1, #4]
-   10ffe:	1808      	adds	r0, r1, r0
-   11000:	6843      	ldr	r3, [r0, #4]
-   11002:	4313      	orrs	r3, r2
-   11004:	6043      	str	r3, [r0, #4]
-   11006:	3108      	adds	r1, #8
-   11008:	9803      	ldr	r0, [sp, #12]
-   1100a:	f7fe fcf3 	bl	f9f4 <_free_r>
-   1100e:	e008      	b.n	11022 <_realloc_r+0x2de>
-   11010:	2101      	movs	r1, #1
-   11012:	9809      	ldr	r0, [sp, #36]
-   11014:	400b      	ands	r3, r1
-   11016:	4303      	orrs	r3, r0
-   11018:	6063      	str	r3, [r4, #4]
-   1101a:	1822      	adds	r2, r4, r0
-   1101c:	6853      	ldr	r3, [r2, #4]
-   1101e:	430b      	orrs	r3, r1
-   11020:	6053      	str	r3, [r2, #4]
-   11022:	9803      	ldr	r0, [sp, #12]
-   11024:	f7ff fa72 	bl	1050c <__malloc_unlock>
-   11028:	3408      	adds	r4, #8
-   1102a:	940a      	str	r4, [sp, #40]
-   1102c:	e007      	b.n	1103e <_realloc_r+0x2fa>
-   1102e:	43a0      	bics	r0, r4
-   11030:	9b01      	ldr	r3, [sp, #4]
-   11032:	1942      	adds	r2, r0, r5
-   11034:	9209      	str	r2, [sp, #36]
-   11036:	429a      	cmp	r2, r3
-   11038:	db00      	blt.n	1103c <_realloc_r+0x2f8>
-   1103a:	e6dd      	b.n	10df8 <_realloc_r+0xb4>
-   1103c:	e6e3      	b.n	10e06 <_realloc_r+0xc2>
-   1103e:	980a      	ldr	r0, [sp, #40]
-   11040:	b00b      	add	sp, #44
-   11042:	bcf0      	pop	{r4, r5, r6, r7}
-   11044:	bc02      	pop	{r1}
-   11046:	4708      	bx	r1
-   11048:	0434      	lsls	r4, r6, #16
-   1104a:	4000      	ands	r0, r0
-
-0001104c <isinf>:
-   1104c:	b510      	push	{r4, lr}
-   1104e:	1c0c      	adds	r4, r1, #0
-   11050:	4262      	negs	r2, r4
-   11052:	4907      	ldr	r1, [pc, #28]	(11070 <.text+0x11070>)
-   11054:	4322      	orrs	r2, r4
-   11056:	4001      	ands	r1, r0
-   11058:	0fd2      	lsrs	r2, r2, #31
-   1105a:	4b06      	ldr	r3, [pc, #24]	(11074 <.text+0x11074>)
-   1105c:	4311      	orrs	r1, r2
-   1105e:	1a5b      	subs	r3, r3, r1
-   11060:	425a      	negs	r2, r3
-   11062:	4313      	orrs	r3, r2
-   11064:	0fdb      	lsrs	r3, r3, #31
-   11066:	2001      	movs	r0, #1
-   11068:	1ac0      	subs	r0, r0, r3
-   1106a:	bc10      	pop	{r4}
-   1106c:	bc02      	pop	{r1}
-   1106e:	4708      	bx	r1
-   11070:	ffff 7fff 	undefined
-   11074:	0000      	lsls	r0, r0, #0
-   11076:	7ff0      	ldrb	r0, [r6, #31]
-
-00011078 <isnan>:
-   11078:	b510      	push	{r4, lr}
-   1107a:	1c0c      	adds	r4, r1, #0
-   1107c:	4262      	negs	r2, r4
-   1107e:	4905      	ldr	r1, [pc, #20]	(11094 <.text+0x11094>)
-   11080:	4322      	orrs	r2, r4
-   11082:	4001      	ands	r1, r0
-   11084:	0fd2      	lsrs	r2, r2, #31
-   11086:	4804      	ldr	r0, [pc, #16]	(11098 <.text+0x11098>)
-   11088:	4311      	orrs	r1, r2
-   1108a:	1a40      	subs	r0, r0, r1
-   1108c:	0fc0      	lsrs	r0, r0, #31
-   1108e:	bc10      	pop	{r4}
-   11090:	bc02      	pop	{r1}
-   11092:	4708      	bx	r1
-   11094:	ffff 7fff 	undefined
-   11098:	0000      	lsls	r0, r0, #0
-   1109a:	7ff0      	ldrb	r0, [r6, #31]
-
-0001109c <__sclose>:
-   1109c:	b500      	push	{lr}
-   1109e:	4b04      	ldr	r3, [pc, #16]	(110b0 <.text+0x110b0>)
-   110a0:	1c02      	adds	r2, r0, #0
-   110a2:	6818      	ldr	r0, [r3, #0]
-   110a4:	230e      	movs	r3, #14
-   110a6:	5ed1      	ldrsh	r1, [r2, r3]
-   110a8:	f004 f8a4 	bl	151f4 <___close_r_from_thumb>
-   110ac:	bc02      	pop	{r1}
-   110ae:	4708      	bx	r1
-   110b0:	0020      	lsls	r0, r4, #0
-   110b2:	4000      	ands	r0, r0
-
-000110b4 <__sseek>:
-   110b4:	b530      	push	{r4, r5, lr}
-   110b6:	1c13      	adds	r3, r2, #0
-   110b8:	4a0b      	ldr	r2, [pc, #44]	(110e8 <.text+0x110e8>)
-   110ba:	1c05      	adds	r5, r0, #0
-   110bc:	1c0c      	adds	r4, r1, #0
-   110be:	6810      	ldr	r0, [r2, #0]
-   110c0:	220e      	movs	r2, #14
-   110c2:	5ea9      	ldrsh	r1, [r5, r2]
-   110c4:	1c22      	adds	r2, r4, #0
-   110c6:	f004 f899 	bl	151fc <___lseek_r_from_thumb>
-   110ca:	89aa      	ldrh	r2, [r5, #12]
-   110cc:	1c43      	adds	r3, r0, #1
-   110ce:	d103      	bne.n	110d8 <__sseek+0x24>
-   110d0:	4b06      	ldr	r3, [pc, #24]	(110ec <.text+0x110ec>)
-   110d2:	4013      	ands	r3, r2
-   110d4:	81ab      	strh	r3, [r5, #12]
-   110d6:	e004      	b.n	110e2 <__sseek+0x2e>
-   110d8:	2380      	movs	r3, #128
-   110da:	015b      	lsls	r3, r3, #5
-   110dc:	4313      	orrs	r3, r2
-   110de:	81ab      	strh	r3, [r5, #12]
-   110e0:	6528      	str	r0, [r5, #80]
-   110e2:	bc30      	pop	{r4, r5}
-   110e4:	bc02      	pop	{r1}
-   110e6:	4708      	bx	r1
-   110e8:	0020      	lsls	r0, r4, #0
-   110ea:	4000      	ands	r0, r0
-   110ec:	efff ffff 	undefined
-
-000110f0 <__swrite>:
-   110f0:	b570      	push	{r4, r5, r6, lr}
-   110f2:	8983      	ldrh	r3, [r0, #12]
-   110f4:	1c04      	adds	r4, r0, #0
-   110f6:	1c0d      	adds	r5, r1, #0
-   110f8:	1c16      	adds	r6, r2, #0
-   110fa:	05da      	lsls	r2, r3, #23
-   110fc:	d507      	bpl.n	1110e <__swrite+0x1e>
-   110fe:	4b0b      	ldr	r3, [pc, #44]	(1112c <.text+0x1112c>)
-   11100:	2200      	movs	r2, #0
-   11102:	6818      	ldr	r0, [r3, #0]
-   11104:	230e      	movs	r3, #14
-   11106:	5ee1      	ldrsh	r1, [r4, r3]
-   11108:	2302      	movs	r3, #2
-   1110a:	f004 f877 	bl	151fc <___lseek_r_from_thumb>
-   1110e:	89a3      	ldrh	r3, [r4, #12]
-   11110:	4a07      	ldr	r2, [pc, #28]	(11130 <.text+0x11130>)
-   11112:	4013      	ands	r3, r2
-   11114:	81a3      	strh	r3, [r4, #12]
-   11116:	4b05      	ldr	r3, [pc, #20]	(1112c <.text+0x1112c>)
-   11118:	220e      	movs	r2, #14
-   1111a:	5ea1      	ldrsh	r1, [r4, r2]
-   1111c:	6818      	ldr	r0, [r3, #0]
-   1111e:	1c2a      	adds	r2, r5, #0
-   11120:	1c33      	adds	r3, r6, #0
-   11122:	f004 f86f 	bl	15204 <___write_r_from_thumb>
-   11126:	bc70      	pop	{r4, r5, r6}
-   11128:	bc02      	pop	{r1}
-   1112a:	4708      	bx	r1
-   1112c:	0020      	lsls	r0, r4, #0
-   1112e:	4000      	ands	r0, r0
-   11130:	efff ffff 	undefined
-
-00011134 <__sread>:
-   11134:	b530      	push	{r4, r5, lr}
-   11136:	1c13      	adds	r3, r2, #0
-   11138:	4a0a      	ldr	r2, [pc, #40]	(11164 <.text+0x11164>)
-   1113a:	1c05      	adds	r5, r0, #0
-   1113c:	1c0c      	adds	r4, r1, #0
-   1113e:	6810      	ldr	r0, [r2, #0]
-   11140:	220e      	movs	r2, #14
-   11142:	5ea9      	ldrsh	r1, [r5, r2]
-   11144:	1c22      	adds	r2, r4, #0
-   11146:	f004 f861 	bl	1520c <___read_r_from_thumb>
-   1114a:	2800      	cmp	r0, #0
-   1114c:	db03      	blt.n	11156 <__sread+0x22>
-   1114e:	6d2b      	ldr	r3, [r5, #80]
-   11150:	181b      	adds	r3, r3, r0
-   11152:	652b      	str	r3, [r5, #80]
-   11154:	e003      	b.n	1115e <__sread+0x2a>
-   11156:	89ab      	ldrh	r3, [r5, #12]
-   11158:	4a03      	ldr	r2, [pc, #12]	(11168 <.text+0x11168>)
-   1115a:	4013      	ands	r3, r2
-   1115c:	81ab      	strh	r3, [r5, #12]
-   1115e:	bc30      	pop	{r4, r5}
-   11160:	bc02      	pop	{r1}
-   11162:	4708      	bx	r1
-   11164:	0020      	lsls	r0, r4, #0
-   11166:	4000      	ands	r0, r0
-   11168:	efff ffff 	undefined
-
-0001116c <strcmp>:
-   1116c:	e001      	b.n	11172 <strcmp+0x6>
-   1116e:	3001      	adds	r0, #1
-   11170:	3101      	adds	r1, #1
-   11172:	7802      	ldrb	r2, [r0, #0]
-   11174:	2a00      	cmp	r2, #0
-   11176:	d002      	beq.n	1117e <strcmp+0x12>
-   11178:	780b      	ldrb	r3, [r1, #0]
-   1117a:	4293      	cmp	r3, r2
-   1117c:	d0f7      	beq.n	1116e <strcmp+0x2>
-   1117e:	7808      	ldrb	r0, [r1, #0]
-   11180:	1a10      	subs	r0, r2, r0
-   11182:	4770      	bx	lr
-
-00011184 <_calloc_r>:
-   11184:	b530      	push	{r4, r5, lr}
-   11186:	4351      	muls	r1, r2
-   11188:	f7fe ff38 	bl	fffc <_malloc_r>
-   1118c:	1c04      	adds	r4, r0, #0
-   1118e:	2800      	cmp	r0, #0
-   11190:	d022      	beq.n	111d8 <_calloc_r+0x54>
-   11192:	1c03      	adds	r3, r0, #0
-   11194:	3b08      	subs	r3, #8
-   11196:	685b      	ldr	r3, [r3, #4]
-   11198:	2203      	movs	r2, #3
-   1119a:	4393      	bics	r3, r2
-   1119c:	1f1a      	subs	r2, r3, #4
-   1119e:	2a24      	cmp	r2, #36
-   111a0:	d817      	bhi.n	111d2 <_calloc_r+0x4e>
-   111a2:	1c01      	adds	r1, r0, #0
-   111a4:	2a13      	cmp	r2, #19
-   111a6:	d90e      	bls.n	111c6 <_calloc_r+0x42>
-   111a8:	2500      	movs	r5, #0
-   111aa:	c020      	stmia	r0!, {r5}
-   111ac:	6065      	str	r5, [r4, #4]
-   111ae:	1d01      	adds	r1, r0, #4
-   111b0:	2a1b      	cmp	r2, #27
-   111b2:	d908      	bls.n	111c6 <_calloc_r+0x42>
-   111b4:	1d0b      	adds	r3, r1, #4
-   111b6:	6045      	str	r5, [r0, #4]
-   111b8:	604d      	str	r5, [r1, #4]
-   111ba:	1d19      	adds	r1, r3, #4
-   111bc:	2a24      	cmp	r2, #36
-   111be:	d102      	bne.n	111c6 <_calloc_r+0x42>
-   111c0:	605d      	str	r5, [r3, #4]
-   111c2:	604d      	str	r5, [r1, #4]
-   111c4:	3108      	adds	r1, #8
-   111c6:	2200      	movs	r2, #0
-   111c8:	1c0b      	adds	r3, r1, #0
-   111ca:	c304      	stmia	r3!, {r2}
-   111cc:	604a      	str	r2, [r1, #4]
-   111ce:	605a      	str	r2, [r3, #4]
-   111d0:	e002      	b.n	111d8 <_calloc_r+0x54>
-   111d2:	2100      	movs	r1, #0
-   111d4:	f7ff f990 	bl	104f8 <memset>
-   111d8:	1c20      	adds	r0, r4, #0
-   111da:	bc30      	pop	{r4, r5}
-   111dc:	bc02      	pop	{r1}
-   111de:	4708      	bx	r1
-
-000111e0 <_fclose_r>:
-   111e0:	b570      	push	{r4, r5, r6, lr}
-   111e2:	1c05      	adds	r5, r0, #0
-   111e4:	1c0c      	adds	r4, r1, #0
-   111e6:	2900      	cmp	r1, #0
-   111e8:	d00e      	beq.n	11208 <_fclose_r+0x28>
-   111ea:	f7fe fb25 	bl	f838 <__sfp_lock_acquire>
-   111ee:	2d00      	cmp	r5, #0
-   111f0:	d005      	beq.n	111fe <_fclose_r+0x1e>
-   111f2:	6bab      	ldr	r3, [r5, #56]
-   111f4:	2b00      	cmp	r3, #0
-   111f6:	d102      	bne.n	111fe <_fclose_r+0x1e>
-   111f8:	1c28      	adds	r0, r5, #0
-   111fa:	f7fe faef 	bl	f7dc <__sinit>
-   111fe:	89a3      	ldrh	r3, [r4, #12]
-   11200:	2b00      	cmp	r3, #0
-   11202:	d103      	bne.n	1120c <_fclose_r+0x2c>
-   11204:	f7fe fb1a 	bl	f83c <__sfp_lock_release>
-   11208:	2600      	movs	r6, #0
-   1120a:	e032      	b.n	11272 <_fclose_r+0x92>
-   1120c:	071a      	lsls	r2, r3, #28
-   1120e:	d401      	bmi.n	11214 <_fclose_r+0x34>
-   11210:	2600      	movs	r6, #0
-   11212:	e003      	b.n	1121c <_fclose_r+0x3c>
-   11214:	1c20      	adds	r0, r4, #0
-   11216:	f7fe fa81 	bl	f71c <fflush>
-   1121a:	1c06      	adds	r6, r0, #0
-   1121c:	6ae3      	ldr	r3, [r4, #44]
-   1121e:	2b00      	cmp	r3, #0
-   11220:	d006      	beq.n	11230 <_fclose_r+0x50>
-   11222:	69e0      	ldr	r0, [r4, #28]
-   11224:	f000 f836 	bl	11294 <.text+0x11294>
-   11228:	2800      	cmp	r0, #0
-   1122a:	da01      	bge.n	11230 <_fclose_r+0x50>
-   1122c:	2601      	movs	r6, #1
-   1122e:	4276      	negs	r6, r6
-   11230:	89a3      	ldrh	r3, [r4, #12]
-   11232:	061a      	lsls	r2, r3, #24
-   11234:	d503      	bpl.n	1123e <_fclose_r+0x5e>
-   11236:	6921      	ldr	r1, [r4, #16]
-   11238:	1c28      	adds	r0, r5, #0
-   1123a:	f7fe fbdb 	bl	f9f4 <_free_r>
-   1123e:	6b21      	ldr	r1, [r4, #48]
-   11240:	2900      	cmp	r1, #0
-   11242:	d009      	beq.n	11258 <_fclose_r+0x78>
-   11244:	1c23      	adds	r3, r4, #0
-   11246:	3340      	adds	r3, #64
-   11248:	4299      	cmp	r1, r3
-   1124a:	d003      	beq.n	11254 <_fclose_r+0x74>
-   1124c:	4b0b      	ldr	r3, [pc, #44]	(1127c <.text+0x1127c>)
-   1124e:	6818      	ldr	r0, [r3, #0]
-   11250:	f7fe fbd0 	bl	f9f4 <_free_r>
-   11254:	2300      	movs	r3, #0
-   11256:	6323      	str	r3, [r4, #48]
-   11258:	6c61      	ldr	r1, [r4, #68]
-   1125a:	2900      	cmp	r1, #0
-   1125c:	d005      	beq.n	1126a <_fclose_r+0x8a>
-   1125e:	4b07      	ldr	r3, [pc, #28]	(1127c <.text+0x1127c>)
-   11260:	6818      	ldr	r0, [r3, #0]
-   11262:	f7fe fbc7 	bl	f9f4 <_free_r>
-   11266:	2300      	movs	r3, #0
-   11268:	6463      	str	r3, [r4, #68]
-   1126a:	2300      	movs	r3, #0
-   1126c:	81a3      	strh	r3, [r4, #12]
-   1126e:	f7fe fae5 	bl	f83c <__sfp_lock_release>
-   11272:	1c30      	adds	r0, r6, #0
-   11274:	bc70      	pop	{r4, r5, r6}
-   11276:	bc02      	pop	{r1}
-   11278:	4708      	bx	r1
-   1127a:	0000      	lsls	r0, r0, #0
-   1127c:	0020      	lsls	r0, r4, #0
-   1127e:	4000      	ands	r0, r0
-
-00011280 <fclose>:
-   11280:	b500      	push	{lr}
-   11282:	4b03      	ldr	r3, [pc, #12]	(11290 <.text+0x11290>)
-   11284:	1c01      	adds	r1, r0, #0
-   11286:	6818      	ldr	r0, [r3, #0]
-   11288:	f7ff ffaa 	bl	111e0 <_fclose_r>
-   1128c:	bc02      	pop	{r1}
-   1128e:	4708      	bx	r1
-   11290:	0020      	lsls	r0, r4, #0
-   11292:	4000      	ands	r0, r0
-   11294:	4718      	bx	r3
-   11296:	46c0      	nop			(mov r8, r8)
-
-00011298 <cos>:
-   11298:	b5f0      	push	{r4, r5, r6, r7, lr}
-   1129a:	4a24      	ldr	r2, [pc, #144]	(1132c <.text+0x1132c>)
-   1129c:	4b24      	ldr	r3, [pc, #144]	(11330 <.text+0x11330>)
-   1129e:	4002      	ands	r2, r0
-   112a0:	b085      	sub	sp, #20
-   112a2:	1c05      	adds	r5, r0, #0
-   112a4:	1c0e      	adds	r6, r1, #0
-   112a6:	429a      	cmp	r2, r3
-   112a8:	dc02      	bgt.n	112b0 <cos+0x18>
-   112aa:	4a22      	ldr	r2, [pc, #136]	(11334 <.text+0x11334>)
-   112ac:	4b22      	ldr	r3, [pc, #136]	(11338 <.text+0x11338>)
-   112ae:	e019      	b.n	112e4 <cos+0x4c>
-   112b0:	4b22      	ldr	r3, [pc, #136]	(1133c <.text+0x1133c>)
-   112b2:	429a      	cmp	r2, r3
-   112b4:	dd04      	ble.n	112c0 <cos+0x28>
-   112b6:	1c2a      	adds	r2, r5, #0
-   112b8:	1c33      	adds	r3, r6, #0
-   112ba:	f003 ff77 	bl	151ac <____subdf3_from_thumb>
-   112be:	e02d      	b.n	1131c <cos+0x84>
-   112c0:	aa01      	add	r2, sp, #4
-   112c2:	f001 f813 	bl	122ec <__ieee754_rem_pio2>
-   112c6:	2303      	movs	r3, #3
-   112c8:	1c05      	adds	r5, r0, #0
-   112ca:	401d      	ands	r5, r3
-   112cc:	2d01      	cmp	r5, #1
-   112ce:	d00c      	beq.n	112ea <cos+0x52>
-   112d0:	2d02      	cmp	r5, #2
-   112d2:	d012      	beq.n	112fa <cos+0x62>
-   112d4:	9801      	ldr	r0, [sp, #4]
-   112d6:	9902      	ldr	r1, [sp, #8]
-   112d8:	9e03      	ldr	r6, [sp, #12]
-   112da:	9f04      	ldr	r7, [sp, #16]
-   112dc:	2d00      	cmp	r5, #0
-   112de:	d117      	bne.n	11310 <cos+0x78>
-   112e0:	1c32      	adds	r2, r6, #0
-   112e2:	1c3b      	adds	r3, r7, #0
-   112e4:	f001 fae2 	bl	128ac <__kernel_cos>
-   112e8:	e018      	b.n	1131c <cos+0x84>
-   112ea:	9801      	ldr	r0, [sp, #4]
-   112ec:	9902      	ldr	r1, [sp, #8]
-   112ee:	9a03      	ldr	r2, [sp, #12]
-   112f0:	9b04      	ldr	r3, [sp, #16]
-   112f2:	9500      	str	r5, [sp, #0]
-   112f4:	f001 ffae 	bl	13254 <__kernel_sin>
-   112f8:	e005      	b.n	11306 <cos+0x6e>
-   112fa:	9801      	ldr	r0, [sp, #4]
-   112fc:	9902      	ldr	r1, [sp, #8]
-   112fe:	9a03      	ldr	r2, [sp, #12]
-   11300:	9b04      	ldr	r3, [sp, #16]
-   11302:	f001 fad3 	bl	128ac <__kernel_cos>
-   11306:	2480      	movs	r4, #128
-   11308:	0624      	lsls	r4, r4, #24
-   1130a:	1902      	adds	r2, r0, r4
-   1130c:	1c0b      	adds	r3, r1, #0
-   1130e:	e007      	b.n	11320 <cos+0x88>
-   11310:	2301      	movs	r3, #1
-   11312:	9300      	str	r3, [sp, #0]
-   11314:	1c32      	adds	r2, r6, #0
-   11316:	1c3b      	adds	r3, r7, #0
-   11318:	f001 ff9c 	bl	13254 <__kernel_sin>
-   1131c:	1c02      	adds	r2, r0, #0
-   1131e:	1c0b      	adds	r3, r1, #0
-   11320:	1c10      	adds	r0, r2, #0
-   11322:	1c19      	adds	r1, r3, #0
-   11324:	b005      	add	sp, #20
-   11326:	bcf0      	pop	{r4, r5, r6, r7}
-   11328:	bc04      	pop	{r2}
-   1132a:	4710      	bx	r2
-   1132c:	ffff 7fff 	undefined
-   11330:	21fb      	movs	r1, #251
-   11332:	3fe9      	subs	r7, #233
-	...
-   1133c:	ffff 7fef 	undefined
-
-00011340 <sin>:
-   11340:	b570      	push	{r4, r5, r6, lr}
-   11342:	4a25      	ldr	r2, [pc, #148]	(113d8 <.text+0x113d8>)
-   11344:	4b25      	ldr	r3, [pc, #148]	(113dc <.text+0x113dc>)
-   11346:	4002      	ands	r2, r0
-   11348:	b085      	sub	sp, #20
-   1134a:	1c05      	adds	r5, r0, #0
-   1134c:	1c0e      	adds	r6, r1, #0
-   1134e:	429a      	cmp	r2, r3
-   11350:	dc04      	bgt.n	1135c <sin+0x1c>
-   11352:	2300      	movs	r3, #0
-   11354:	9300      	str	r3, [sp, #0]
-   11356:	4a22      	ldr	r2, [pc, #136]	(113e0 <.text+0x113e0>)
-   11358:	4b22      	ldr	r3, [pc, #136]	(113e4 <.text+0x113e4>)
-   1135a:	e01c      	b.n	11396 <sin+0x56>
-   1135c:	4b22      	ldr	r3, [pc, #136]	(113e8 <.text+0x113e8>)
-   1135e:	429a      	cmp	r2, r3
-   11360:	dd06      	ble.n	11370 <sin+0x30>
-   11362:	1c2a      	adds	r2, r5, #0
-   11364:	1c33      	adds	r3, r6, #0
-   11366:	f003 ff21 	bl	151ac <____subdf3_from_thumb>
-   1136a:	1c03      	adds	r3, r0, #0
-   1136c:	1c0c      	adds	r4, r1, #0
-   1136e:	e02d      	b.n	113cc <sin+0x8c>
-   11370:	aa01      	add	r2, sp, #4
-   11372:	f000 ffbb 	bl	122ec <__ieee754_rem_pio2>
-   11376:	2303      	movs	r3, #3
-   11378:	4003      	ands	r3, r0
-   1137a:	2b01      	cmp	r3, #1
-   1137c:	d00e      	beq.n	1139c <sin+0x5c>
-   1137e:	2b02      	cmp	r3, #2
-   11380:	d013      	beq.n	113aa <sin+0x6a>
-   11382:	9801      	ldr	r0, [sp, #4]
-   11384:	9902      	ldr	r1, [sp, #8]
-   11386:	9c03      	ldr	r4, [sp, #12]
-   11388:	9d04      	ldr	r5, [sp, #16]
-   1138a:	2b00      	cmp	r3, #0
-   1138c:	d116      	bne.n	113bc <sin+0x7c>
-   1138e:	2301      	movs	r3, #1
-   11390:	9300      	str	r3, [sp, #0]
-   11392:	1c22      	adds	r2, r4, #0
-   11394:	1c2b      	adds	r3, r5, #0
-   11396:	f001 ff5d 	bl	13254 <__kernel_sin>
-   1139a:	e7e6      	b.n	1136a <sin+0x2a>
-   1139c:	9801      	ldr	r0, [sp, #4]
-   1139e:	9902      	ldr	r1, [sp, #8]
-   113a0:	9a03      	ldr	r2, [sp, #12]
-   113a2:	9b04      	ldr	r3, [sp, #16]
-   113a4:	f001 fa82 	bl	128ac <__kernel_cos>
-   113a8:	e7df      	b.n	1136a <sin+0x2a>
-   113aa:	2401      	movs	r4, #1
-   113ac:	9801      	ldr	r0, [sp, #4]
-   113ae:	9902      	ldr	r1, [sp, #8]
-   113b0:	9a03      	ldr	r2, [sp, #12]
-   113b2:	9b04      	ldr	r3, [sp, #16]
-   113b4:	9400      	str	r4, [sp, #0]
-   113b6:	f001 ff4d 	bl	13254 <__kernel_sin>
-   113ba:	e003      	b.n	113c4 <sin+0x84>
-   113bc:	1c22      	adds	r2, r4, #0
-   113be:	1c2b      	adds	r3, r5, #0
-   113c0:	f001 fa74 	bl	128ac <__kernel_cos>
-   113c4:	2280      	movs	r2, #128
-   113c6:	0612      	lsls	r2, r2, #24
-   113c8:	1883      	adds	r3, r0, r2
-   113ca:	1c0c      	adds	r4, r1, #0
-   113cc:	1c18      	adds	r0, r3, #0
-   113ce:	1c21      	adds	r1, r4, #0
-   113d0:	b005      	add	sp, #20
-   113d2:	bc70      	pop	{r4, r5, r6}
-   113d4:	bc04      	pop	{r2}
-   113d6:	4710      	bx	r2
-   113d8:	ffff 7fff 	undefined
-   113dc:	21fb      	movs	r1, #251
-   113de:	3fe9      	subs	r7, #233
-	...
-   113e8:	ffff 7fef 	undefined
-
-000113ec <pow>:
-   113ec:	b5f0      	push	{r4, r5, r6, r7, lr}
-   113ee:	b08e      	sub	sp, #56
-   113f0:	1c1e      	adds	r6, r3, #0
-   113f2:	9000      	str	r0, [sp, #0]
-   113f4:	9101      	str	r1, [sp, #4]
-   113f6:	1c15      	adds	r5, r2, #0
-   113f8:	f000 f9f2 	bl	117e0 <__ieee754_pow>
-   113fc:	4bba      	ldr	r3, [pc, #744]	(116e8 <.text+0x116e8>)
-   113fe:	681f      	ldr	r7, [r3, #0]
-   11400:	9003      	str	r0, [sp, #12]
-   11402:	9104      	str	r1, [sp, #16]
-   11404:	1c7a      	adds	r2, r7, #1
-   11406:	d100      	bne.n	1140a <pow+0x1e>
-   11408:	e167      	b.n	116da <pow+0x2ee>
-   1140a:	1c28      	adds	r0, r5, #0
-   1140c:	1c31      	adds	r1, r6, #0
-   1140e:	f7ff fe33 	bl	11078 <isnan>
-   11412:	1c04      	adds	r4, r0, #0
-   11414:	2800      	cmp	r0, #0
-   11416:	d000      	beq.n	1141a <pow+0x2e>
-   11418:	e15f      	b.n	116da <pow+0x2ee>
-   1141a:	9800      	ldr	r0, [sp, #0]
-   1141c:	9901      	ldr	r1, [sp, #4]
-   1141e:	f7ff fe2b 	bl	11078 <isnan>
-   11422:	9002      	str	r0, [sp, #8]
-   11424:	2800      	cmp	r0, #0
-   11426:	d01f      	beq.n	11468 <pow+0x7c>
-   11428:	1c28      	adds	r0, r5, #0
-   1142a:	1c31      	adds	r1, r6, #0
-   1142c:	4aaf      	ldr	r2, [pc, #700]	(116ec <.text+0x116ec>)
-   1142e:	4bb0      	ldr	r3, [pc, #704]	(116f0 <.text+0x116f0>)
-   11430:	f003 feb0 	bl	15194 <____eqdf2_from_thumb>
-   11434:	2800      	cmp	r0, #0
-   11436:	d000      	beq.n	1143a <pow+0x4e>
-   11438:	e14f      	b.n	116da <pow+0x2ee>
-   1143a:	9a00      	ldr	r2, [sp, #0]
-   1143c:	9b01      	ldr	r3, [sp, #4]
-   1143e:	920b      	str	r2, [sp, #44]
-   11440:	930c      	str	r3, [sp, #48]
-   11442:	2f02      	cmp	r7, #2
-   11444:	d104      	bne.n	11450 <pow+0x64>
-   11446:	4bab      	ldr	r3, [pc, #684]	(116f4 <.text+0x116f4>)
-   11448:	4cab      	ldr	r4, [pc, #684]	(116f8 <.text+0x116f8>)
-   1144a:	930b      	str	r3, [sp, #44]
-   1144c:	940c      	str	r4, [sp, #48]
-   1144e:	e105      	b.n	1165c <pow+0x270>
-   11450:	9a00      	ldr	r2, [sp, #0]
-   11452:	9b01      	ldr	r3, [sp, #4]
-   11454:	9207      	str	r2, [sp, #28]
-   11456:	9308      	str	r3, [sp, #32]
-   11458:	4ba8      	ldr	r3, [pc, #672]	(116fc <.text+0x116fc>)
-   1145a:	9306      	str	r3, [sp, #24]
-   1145c:	2301      	movs	r3, #1
-   1145e:	9509      	str	r5, [sp, #36]
-   11460:	960a      	str	r6, [sp, #40]
-   11462:	940d      	str	r4, [sp, #52]
-   11464:	9305      	str	r3, [sp, #20]
-   11466:	e091      	b.n	1158c <pow+0x1a0>
-   11468:	9800      	ldr	r0, [sp, #0]
-   1146a:	9901      	ldr	r1, [sp, #4]
-   1146c:	4a9f      	ldr	r2, [pc, #636]	(116ec <.text+0x116ec>)
-   1146e:	4ba0      	ldr	r3, [pc, #640]	(116f0 <.text+0x116f0>)
-   11470:	f003 fe90 	bl	15194 <____eqdf2_from_thumb>
-   11474:	2800      	cmp	r0, #0
-   11476:	d151      	bne.n	1151c <pow+0x130>
-   11478:	1c28      	adds	r0, r5, #0
-   1147a:	1c31      	adds	r1, r6, #0
-   1147c:	4a9b      	ldr	r2, [pc, #620]	(116ec <.text+0x116ec>)
-   1147e:	4b9c      	ldr	r3, [pc, #624]	(116f0 <.text+0x116f0>)
-   11480:	f003 fe88 	bl	15194 <____eqdf2_from_thumb>
-   11484:	2800      	cmp	r0, #0
-   11486:	d116      	bne.n	114b6 <pow+0xca>
-   11488:	4a98      	ldr	r2, [pc, #608]	(116ec <.text+0x116ec>)
-   1148a:	4b99      	ldr	r3, [pc, #612]	(116f0 <.text+0x116f0>)
-   1148c:	920b      	str	r2, [sp, #44]
-   1148e:	930c      	str	r3, [sp, #48]
-   11490:	2f00      	cmp	r7, #0
-   11492:	d004      	beq.n	1149e <pow+0xb2>
-   11494:	4b97      	ldr	r3, [pc, #604]	(116f4 <.text+0x116f4>)
-   11496:	4c98      	ldr	r4, [pc, #608]	(116f8 <.text+0x116f8>)
-   11498:	930b      	str	r3, [sp, #44]
-   1149a:	940c      	str	r4, [sp, #48]
-   1149c:	e119      	b.n	116d2 <pow+0x2e6>
-   1149e:	9b00      	ldr	r3, [sp, #0]
-   114a0:	9c01      	ldr	r4, [sp, #4]
-   114a2:	9307      	str	r3, [sp, #28]
-   114a4:	9408      	str	r4, [sp, #32]
-   114a6:	4b95      	ldr	r3, [pc, #596]	(116fc <.text+0x116fc>)
-   114a8:	9306      	str	r3, [sp, #24]
-   114aa:	2301      	movs	r3, #1
-   114ac:	9509      	str	r5, [sp, #36]
-   114ae:	960a      	str	r6, [sp, #40]
-   114b0:	970d      	str	r7, [sp, #52]
-   114b2:	9305      	str	r3, [sp, #20]
-   114b4:	e028      	b.n	11508 <pow+0x11c>
-   114b6:	1c28      	adds	r0, r5, #0
-   114b8:	1c31      	adds	r1, r6, #0
-   114ba:	f001 ff93 	bl	133e4 <finite>
-   114be:	2800      	cmp	r0, #0
-   114c0:	d100      	bne.n	114c4 <pow+0xd8>
-   114c2:	e10a      	b.n	116da <pow+0x2ee>
-   114c4:	1c28      	adds	r0, r5, #0
-   114c6:	1c31      	adds	r1, r6, #0
-   114c8:	4a88      	ldr	r2, [pc, #544]	(116ec <.text+0x116ec>)
-   114ca:	4b89      	ldr	r3, [pc, #548]	(116f0 <.text+0x116f0>)
-   114cc:	f003 fe5a 	bl	15184 <____ltdf2_from_thumb>
-   114d0:	2800      	cmp	r0, #0
-   114d2:	db00      	blt.n	114d6 <pow+0xea>
-   114d4:	e101      	b.n	116da <pow+0x2ee>
-   114d6:	2301      	movs	r3, #1
-   114d8:	9305      	str	r3, [sp, #20]
-   114da:	4b88      	ldr	r3, [pc, #544]	(116fc <.text+0x116fc>)
-   114dc:	9306      	str	r3, [sp, #24]
-   114de:	9b02      	ldr	r3, [sp, #8]
-   114e0:	930d      	str	r3, [sp, #52]
-   114e2:	9a00      	ldr	r2, [sp, #0]
-   114e4:	9b01      	ldr	r3, [sp, #4]
-   114e6:	9509      	str	r5, [sp, #36]
-   114e8:	960a      	str	r6, [sp, #40]
-   114ea:	9207      	str	r2, [sp, #28]
-   114ec:	9308      	str	r3, [sp, #32]
-   114ee:	2f00      	cmp	r7, #0
-   114f0:	d104      	bne.n	114fc <pow+0x110>
-   114f2:	4b7e      	ldr	r3, [pc, #504]	(116ec <.text+0x116ec>)
-   114f4:	4c7e      	ldr	r4, [pc, #504]	(116f0 <.text+0x116f0>)
-   114f6:	930b      	str	r3, [sp, #44]
-   114f8:	940c      	str	r4, [sp, #48]
-   114fa:	e005      	b.n	11508 <pow+0x11c>
-   114fc:	4b80      	ldr	r3, [pc, #512]	(11700 <.text+0x11700>)
-   114fe:	4c81      	ldr	r4, [pc, #516]	(11704 <.text+0x11704>)
-   11500:	930b      	str	r3, [sp, #44]
-   11502:	940c      	str	r4, [sp, #48]
-   11504:	2f02      	cmp	r7, #2
-   11506:	d005      	beq.n	11514 <pow+0x128>
-   11508:	a805      	add	r0, sp, #20
-   1150a:	f002 f80f 	bl	1352c <matherr>
-   1150e:	2800      	cmp	r0, #0
-   11510:	d000      	beq.n	11514 <pow+0x128>
-   11512:	e0d7      	b.n	116c4 <pow+0x2d8>
-   11514:	f002 f94c 	bl	137b0 <__errno>
-   11518:	2321      	movs	r3, #33
-   1151a:	e0d2      	b.n	116c2 <pow+0x2d6>
-   1151c:	9803      	ldr	r0, [sp, #12]
-   1151e:	9904      	ldr	r1, [sp, #16]
-   11520:	f001 ff60 	bl	133e4 <finite>
-   11524:	1c04      	adds	r4, r0, #0
-   11526:	2800      	cmp	r0, #0
-   11528:	d000      	beq.n	1152c <pow+0x140>
-   1152a:	e09c      	b.n	11666 <pow+0x27a>
-   1152c:	9800      	ldr	r0, [sp, #0]
-   1152e:	9901      	ldr	r1, [sp, #4]
-   11530:	f001 ff58 	bl	133e4 <finite>
-   11534:	2800      	cmp	r0, #0
-   11536:	d100      	bne.n	1153a <pow+0x14e>
-   11538:	e095      	b.n	11666 <pow+0x27a>
-   1153a:	1c28      	adds	r0, r5, #0
-   1153c:	1c31      	adds	r1, r6, #0
-   1153e:	f001 ff51 	bl	133e4 <finite>
-   11542:	2800      	cmp	r0, #0
-   11544:	d100      	bne.n	11548 <pow+0x15c>
-   11546:	e08e      	b.n	11666 <pow+0x27a>
-   11548:	9803      	ldr	r0, [sp, #12]
-   1154a:	9904      	ldr	r1, [sp, #16]
-   1154c:	f7ff fd94 	bl	11078 <isnan>
-   11550:	4a6a      	ldr	r2, [pc, #424]	(116fc <.text+0x116fc>)
-   11552:	2800      	cmp	r0, #0
-   11554:	d023      	beq.n	1159e <pow+0x1b2>
-   11556:	2301      	movs	r3, #1
-   11558:	9305      	str	r3, [sp, #20]
-   1155a:	940d      	str	r4, [sp, #52]
-   1155c:	9b00      	ldr	r3, [sp, #0]
-   1155e:	9c01      	ldr	r4, [sp, #4]
-   11560:	9206      	str	r2, [sp, #24]
-   11562:	9307      	str	r3, [sp, #28]
-   11564:	9408      	str	r4, [sp, #32]
-   11566:	9509      	str	r5, [sp, #36]
-   11568:	960a      	str	r6, [sp, #40]
-   1156a:	2f00      	cmp	r7, #0
-   1156c:	d104      	bne.n	11578 <pow+0x18c>
-   1156e:	4a5f      	ldr	r2, [pc, #380]	(116ec <.text+0x116ec>)
-   11570:	4b5f      	ldr	r3, [pc, #380]	(116f0 <.text+0x116f0>)
-   11572:	920b      	str	r2, [sp, #44]
-   11574:	930c      	str	r3, [sp, #48]
-   11576:	e009      	b.n	1158c <pow+0x1a0>
-   11578:	485c      	ldr	r0, [pc, #368]	(116ec <.text+0x116ec>)
-   1157a:	495d      	ldr	r1, [pc, #372]	(116f0 <.text+0x116f0>)
-   1157c:	1c02      	adds	r2, r0, #0
-   1157e:	1c0b      	adds	r3, r1, #0
-   11580:	f003 fe20 	bl	151c4 <____divdf3_from_thumb>
-   11584:	900b      	str	r0, [sp, #44]
-   11586:	910c      	str	r1, [sp, #48]
-   11588:	2f02      	cmp	r7, #2
-   1158a:	d004      	beq.n	11596 <pow+0x1aa>
-   1158c:	a805      	add	r0, sp, #20
-   1158e:	f001 ffcd 	bl	1352c <matherr>
-   11592:	2800      	cmp	r0, #0
-   11594:	d15b      	bne.n	1164e <pow+0x262>
-   11596:	f002 f90b 	bl	137b0 <__errno>
-   1159a:	2321      	movs	r3, #33
-   1159c:	e056      	b.n	1164c <pow+0x260>
-   1159e:	2303      	movs	r3, #3
-   115a0:	9305      	str	r3, [sp, #20]
-   115a2:	9206      	str	r2, [sp, #24]
-   115a4:	9a00      	ldr	r2, [sp, #0]
-   115a6:	9b01      	ldr	r3, [sp, #4]
-   115a8:	900d      	str	r0, [sp, #52]
-   115aa:	9207      	str	r2, [sp, #28]
-   115ac:	9308      	str	r3, [sp, #32]
-   115ae:	9509      	str	r5, [sp, #36]
-   115b0:	960a      	str	r6, [sp, #40]
-   115b2:	2f00      	cmp	r7, #0
-   115b4:	d120      	bne.n	115f8 <pow+0x20c>
-   115b6:	4b54      	ldr	r3, [pc, #336]	(11708 <.text+0x11708>)
-   115b8:	4c54      	ldr	r4, [pc, #336]	(1170c <.text+0x1170c>)
-   115ba:	9800      	ldr	r0, [sp, #0]
-   115bc:	9901      	ldr	r1, [sp, #4]
-   115be:	930b      	str	r3, [sp, #44]
-   115c0:	940c      	str	r4, [sp, #48]
-   115c2:	4a4a      	ldr	r2, [pc, #296]	(116ec <.text+0x116ec>)
-   115c4:	4b4a      	ldr	r3, [pc, #296]	(116f0 <.text+0x116f0>)
-   115c6:	f003 fddd 	bl	15184 <____ltdf2_from_thumb>
-   115ca:	2800      	cmp	r0, #0
-   115cc:	da36      	bge.n	1163c <pow+0x250>
-   115ce:	4a50      	ldr	r2, [pc, #320]	(11710 <.text+0x11710>)
-   115d0:	4b50      	ldr	r3, [pc, #320]	(11714 <.text+0x11714>)
-   115d2:	1c28      	adds	r0, r5, #0
-   115d4:	1c31      	adds	r1, r6, #0
-   115d6:	f003 fded 	bl	151b4 <____muldf3_from_thumb>
-   115da:	1c04      	adds	r4, r0, #0
-   115dc:	1c0d      	adds	r5, r1, #0
-   115de:	f001 ffa7 	bl	13530 <rint>
-   115e2:	1c22      	adds	r2, r4, #0
-   115e4:	1c2b      	adds	r3, r5, #0
-   115e6:	f003 fdd1 	bl	1518c <____nedf2_from_thumb>
-   115ea:	2800      	cmp	r0, #0
-   115ec:	d026      	beq.n	1163c <pow+0x250>
-   115ee:	4b4a      	ldr	r3, [pc, #296]	(11718 <.text+0x11718>)
-   115f0:	4c4a      	ldr	r4, [pc, #296]	(1171c <.text+0x1171c>)
-   115f2:	930b      	str	r3, [sp, #44]
-   115f4:	940c      	str	r4, [sp, #48]
-   115f6:	e021      	b.n	1163c <pow+0x250>
-   115f8:	4b49      	ldr	r3, [pc, #292]	(11720 <.text+0x11720>)
-   115fa:	4c4a      	ldr	r4, [pc, #296]	(11724 <.text+0x11724>)
-   115fc:	9800      	ldr	r0, [sp, #0]
-   115fe:	9901      	ldr	r1, [sp, #4]
-   11600:	930b      	str	r3, [sp, #44]
-   11602:	940c      	str	r4, [sp, #48]
-   11604:	4a39      	ldr	r2, [pc, #228]	(116ec <.text+0x116ec>)
-   11606:	4b3a      	ldr	r3, [pc, #232]	(116f0 <.text+0x116f0>)
-   11608:	f003 fdbc 	bl	15184 <____ltdf2_from_thumb>
-   1160c:	2800      	cmp	r0, #0
-   1160e:	da13      	bge.n	11638 <pow+0x24c>
-   11610:	4a3f      	ldr	r2, [pc, #252]	(11710 <.text+0x11710>)
-   11612:	4b40      	ldr	r3, [pc, #256]	(11714 <.text+0x11714>)
-   11614:	1c28      	adds	r0, r5, #0
-   11616:	1c31      	adds	r1, r6, #0
-   11618:	f003 fdcc 	bl	151b4 <____muldf3_from_thumb>
-   1161c:	1c04      	adds	r4, r0, #0
-   1161e:	1c0d      	adds	r5, r1, #0
-   11620:	f001 ff86 	bl	13530 <rint>
-   11624:	1c22      	adds	r2, r4, #0
-   11626:	1c2b      	adds	r3, r5, #0
-   11628:	f003 fdb0 	bl	1518c <____nedf2_from_thumb>
-   1162c:	2800      	cmp	r0, #0
-   1162e:	d003      	beq.n	11638 <pow+0x24c>
-   11630:	4b33      	ldr	r3, [pc, #204]	(11700 <.text+0x11700>)
-   11632:	4c34      	ldr	r4, [pc, #208]	(11704 <.text+0x11704>)
-   11634:	930b      	str	r3, [sp, #44]
-   11636:	940c      	str	r4, [sp, #48]
-   11638:	2f02      	cmp	r7, #2
-   1163a:	d004      	beq.n	11646 <pow+0x25a>
-   1163c:	a805      	add	r0, sp, #20
-   1163e:	f001 ff75 	bl	1352c <matherr>
-   11642:	2800      	cmp	r0, #0
-   11644:	d103      	bne.n	1164e <pow+0x262>
-   11646:	f002 f8b3 	bl	137b0 <__errno>
-   1164a:	2322      	movs	r3, #34
-   1164c:	6003      	str	r3, [r0, #0]
-   1164e:	9b0d      	ldr	r3, [sp, #52]
-   11650:	2b00      	cmp	r3, #0
-   11652:	d003      	beq.n	1165c <pow+0x270>
-   11654:	f002 f8ac 	bl	137b0 <__errno>
-   11658:	9b0d      	ldr	r3, [sp, #52]
-   1165a:	6003      	str	r3, [r0, #0]
-   1165c:	9b0b      	ldr	r3, [sp, #44]
-   1165e:	9c0c      	ldr	r4, [sp, #48]
-   11660:	9303      	str	r3, [sp, #12]
-   11662:	9404      	str	r4, [sp, #16]
-   11664:	e039      	b.n	116da <pow+0x2ee>
-   11666:	9803      	ldr	r0, [sp, #12]
-   11668:	9904      	ldr	r1, [sp, #16]
-   1166a:	4a20      	ldr	r2, [pc, #128]	(116ec <.text+0x116ec>)
-   1166c:	4b20      	ldr	r3, [pc, #128]	(116f0 <.text+0x116f0>)
-   1166e:	f003 fd91 	bl	15194 <____eqdf2_from_thumb>
-   11672:	2800      	cmp	r0, #0
-   11674:	d131      	bne.n	116da <pow+0x2ee>
-   11676:	9800      	ldr	r0, [sp, #0]
-   11678:	9901      	ldr	r1, [sp, #4]
-   1167a:	f001 feb3 	bl	133e4 <finite>
-   1167e:	2800      	cmp	r0, #0
-   11680:	d02b      	beq.n	116da <pow+0x2ee>
-   11682:	1c28      	adds	r0, r5, #0
-   11684:	1c31      	adds	r1, r6, #0
-   11686:	f001 fead 	bl	133e4 <finite>
-   1168a:	2800      	cmp	r0, #0
-   1168c:	d025      	beq.n	116da <pow+0x2ee>
-   1168e:	2304      	movs	r3, #4
-   11690:	9305      	str	r3, [sp, #20]
-   11692:	4b1a      	ldr	r3, [pc, #104]	(116fc <.text+0x116fc>)
-   11694:	9306      	str	r3, [sp, #24]
-   11696:	2300      	movs	r3, #0
-   11698:	930d      	str	r3, [sp, #52]
-   1169a:	9a00      	ldr	r2, [sp, #0]
-   1169c:	9b01      	ldr	r3, [sp, #4]
-   1169e:	9207      	str	r2, [sp, #28]
-   116a0:	9308      	str	r3, [sp, #32]
-   116a2:	4b12      	ldr	r3, [pc, #72]	(116ec <.text+0x116ec>)
-   116a4:	4c12      	ldr	r4, [pc, #72]	(116f0 <.text+0x116f0>)
-   116a6:	9509      	str	r5, [sp, #36]
-   116a8:	960a      	str	r6, [sp, #40]
-   116aa:	930b      	str	r3, [sp, #44]
-   116ac:	940c      	str	r4, [sp, #48]
-   116ae:	2f02      	cmp	r7, #2
-   116b0:	d004      	beq.n	116bc <pow+0x2d0>
-   116b2:	a805      	add	r0, sp, #20
-   116b4:	f001 ff3a 	bl	1352c <matherr>
-   116b8:	2800      	cmp	r0, #0
-   116ba:	d103      	bne.n	116c4 <pow+0x2d8>
-   116bc:	f002 f878 	bl	137b0 <__errno>
-   116c0:	2322      	movs	r3, #34
-   116c2:	6003      	str	r3, [r0, #0]
-   116c4:	9b0d      	ldr	r3, [sp, #52]
-   116c6:	2b00      	cmp	r3, #0
-   116c8:	d003      	beq.n	116d2 <pow+0x2e6>
-   116ca:	f002 f871 	bl	137b0 <__errno>
-   116ce:	9b0d      	ldr	r3, [sp, #52]
-   116d0:	6003      	str	r3, [r0, #0]
-   116d2:	9a0b      	ldr	r2, [sp, #44]
-   116d4:	9b0c      	ldr	r3, [sp, #48]
-   116d6:	9203      	str	r2, [sp, #12]
-   116d8:	9304      	str	r3, [sp, #16]
-   116da:	9803      	ldr	r0, [sp, #12]
-   116dc:	9904      	ldr	r1, [sp, #16]
-   116de:	b00e      	add	sp, #56
-   116e0:	bcf0      	pop	{r4, r5, r6, r7}
-   116e2:	bc04      	pop	{r2}
-   116e4:	4710      	bx	r2
-   116e6:	0000      	lsls	r0, r0, #0
-   116e8:	5888      	ldr	r0, [r1, r2]
-   116ea:	0001      	lsls	r1, r0, #0
-	...
-   116f4:	0000      	lsls	r0, r0, #0
-   116f6:	3ff0      	subs	r7, #240
-   116f8:	0000      	lsls	r0, r0, #0
-   116fa:	0000      	lsls	r0, r0, #0
-   116fc:	5a44      	ldrh	r4, [r0, r1]
-   116fe:	0001      	lsls	r1, r0, #0
-   11700:	0000      	lsls	r0, r0, #0
-   11702:	fff0 0000 	vrev64.8	d16, d0
-   11706:	0000      	lsls	r0, r0, #0
-   11708:	ffff 47ef 	vcvt.u<illegal width 64>.f<illegal width 64>	q10, <illegal reg q15.5>
-   1170c:	0000      	lsls	r0, r0, #0
-   1170e:	e000      	b.n	11712 <.text+0x11712>
-   11710:	0000      	lsls	r0, r0, #0
-   11712:	3fe0      	subs	r7, #224
-   11714:	0000      	lsls	r0, r0, #0
-   11716:	0000      	lsls	r0, r0, #0
-   11718:	ffff c7ef 	vcvt.u<illegal width 64>.f<illegal width 64>	q14, <illegal reg q15.5>
-   1171c:	0000      	lsls	r0, r0, #0
-   1171e:	e000      	b.n	11722 <.text+0x11722>
-   11720:	0000      	lsls	r0, r0, #0
-   11722:	7ff0      	ldrb	r0, [r6, #31]
-   11724:	0000      	lsls	r0, r0, #0
-	...
-
-00011728 <sqrt>:
-   11728:	b5f0      	push	{r4, r5, r6, r7, lr}
-   1172a:	b08d      	sub	sp, #52
-   1172c:	1c04      	adds	r4, r0, #0
-   1172e:	1c0d      	adds	r5, r1, #0
-   11730:	f000 ffec 	bl	1270c <__ieee754_sqrt>
-   11734:	4b26      	ldr	r3, [pc, #152]	(117d0 <.text+0x117d0>)
-   11736:	681b      	ldr	r3, [r3, #0]
-   11738:	9002      	str	r0, [sp, #8]
-   1173a:	9103      	str	r1, [sp, #12]
-   1173c:	9300      	str	r3, [sp, #0]
-   1173e:	3301      	adds	r3, #1
-   11740:	d03f      	beq.n	117c2 <sqrt+0x9a>
-   11742:	1c20      	adds	r0, r4, #0
-   11744:	1c29      	adds	r1, r5, #0
-   11746:	f7ff fc97 	bl	11078 <isnan>
-   1174a:	9001      	str	r0, [sp, #4]
-   1174c:	2800      	cmp	r0, #0
-   1174e:	d138      	bne.n	117c2 <sqrt+0x9a>
-   11750:	4e20      	ldr	r6, [pc, #128]	(117d4 <.text+0x117d4>)
-   11752:	4f21      	ldr	r7, [pc, #132]	(117d8 <.text+0x117d8>)
-   11754:	1c20      	adds	r0, r4, #0
-   11756:	1c29      	adds	r1, r5, #0
-   11758:	1c32      	adds	r2, r6, #0
-   1175a:	1c3b      	adds	r3, r7, #0
-   1175c:	f003 fd12 	bl	15184 <____ltdf2_from_thumb>
-   11760:	2800      	cmp	r0, #0
-   11762:	da2e      	bge.n	117c2 <sqrt+0x9a>
-   11764:	2301      	movs	r3, #1
-   11766:	9304      	str	r3, [sp, #16]
-   11768:	4b1c      	ldr	r3, [pc, #112]	(117dc <.text+0x117dc>)
-   1176a:	9408      	str	r4, [sp, #32]
-   1176c:	9509      	str	r5, [sp, #36]
-   1176e:	9305      	str	r3, [sp, #20]
-   11770:	9406      	str	r4, [sp, #24]
-   11772:	9507      	str	r5, [sp, #28]
-   11774:	9b01      	ldr	r3, [sp, #4]
-   11776:	9c00      	ldr	r4, [sp, #0]
-   11778:	930c      	str	r3, [sp, #48]
-   1177a:	2c00      	cmp	r4, #0
-   1177c:	d102      	bne.n	11784 <sqrt+0x5c>
-   1177e:	960a      	str	r6, [sp, #40]
-   11780:	970b      	str	r7, [sp, #44]
-   11782:	e00a      	b.n	1179a <sqrt+0x72>
-   11784:	1c3b      	adds	r3, r7, #0
-   11786:	1c30      	adds	r0, r6, #0
-   11788:	1c39      	adds	r1, r7, #0
-   1178a:	1c32      	adds	r2, r6, #0
-   1178c:	f003 fd1a 	bl	151c4 <____divdf3_from_thumb>
-   11790:	9b00      	ldr	r3, [sp, #0]
-   11792:	900a      	str	r0, [sp, #40]
-   11794:	910b      	str	r1, [sp, #44]
-   11796:	2b02      	cmp	r3, #2
-   11798:	d004      	beq.n	117a4 <sqrt+0x7c>
-   1179a:	a804      	add	r0, sp, #16
-   1179c:	f001 fec6 	bl	1352c <matherr>
-   117a0:	2800      	cmp	r0, #0
-   117a2:	d103      	bne.n	117ac <sqrt+0x84>
-   117a4:	f002 f804 	bl	137b0 <__errno>
-   117a8:	2321      	movs	r3, #33
-   117aa:	6003      	str	r3, [r0, #0]
-   117ac:	9b0c      	ldr	r3, [sp, #48]
-   117ae:	2b00      	cmp	r3, #0
-   117b0:	d003      	beq.n	117ba <sqrt+0x92>
-   117b2:	f001 fffd 	bl	137b0 <__errno>
-   117b6:	9b0c      	ldr	r3, [sp, #48]
-   117b8:	6003      	str	r3, [r0, #0]
-   117ba:	9b0a      	ldr	r3, [sp, #40]
-   117bc:	9c0b      	ldr	r4, [sp, #44]
-   117be:	9302      	str	r3, [sp, #8]
-   117c0:	9403      	str	r4, [sp, #12]
-   117c2:	9802      	ldr	r0, [sp, #8]
-   117c4:	9903      	ldr	r1, [sp, #12]
-   117c6:	b00d      	add	sp, #52
-   117c8:	bcf0      	pop	{r4, r5, r6, r7}
-   117ca:	bc04      	pop	{r2}
-   117cc:	4710      	bx	r2
-   117ce:	0000      	lsls	r0, r0, #0
-   117d0:	5888      	ldr	r0, [r1, r2]
-   117d2:	0001      	lsls	r1, r0, #0
-	...
-   117dc:	5a48      	ldrh	r0, [r1, r1]
-   117de:	0001      	lsls	r1, r0, #0
-
-000117e0 <__ieee754_pow>:
-   117e0:	b5f0      	push	{r4, r5, r6, r7, lr}
-   117e2:	b0c1      	sub	sp, #260
-   117e4:	9221      	str	r2, [sp, #132]
-   117e6:	9322      	str	r3, [sp, #136]
-   117e8:	9b21      	ldr	r3, [sp, #132]
-   117ea:	9c22      	ldr	r4, [sp, #136]
-   117ec:	1c1d      	adds	r5, r3, #0
-   117ee:	9336      	str	r3, [sp, #216]
-   117f0:	4bbf      	ldr	r3, [pc, #764]	(11af0 <.text+0x11af0>)
-   117f2:	1c2f      	adds	r7, r5, #0
-   117f4:	401f      	ands	r7, r3
-   117f6:	9023      	str	r0, [sp, #140]
-   117f8:	9124      	str	r1, [sp, #144]
-   117fa:	1c0a      	adds	r2, r1, #0
-   117fc:	1c01      	adds	r1, r0, #0
-   117fe:	1c20      	adds	r0, r4, #0
-   11800:	1c3c      	adds	r4, r7, #0
-   11802:	9237      	str	r2, [sp, #220]
-   11804:	4304      	orrs	r4, r0
-   11806:	d103      	bne.n	11810 <__ieee754_pow+0x30>
-   11808:	48ba      	ldr	r0, [pc, #744]	(11af4 <.text+0x11af4>)
-   1180a:	49bb      	ldr	r1, [pc, #748]	(11af8 <.text+0x11af8>)
-   1180c:	f000 fd11 	bl	12232 <.text+0x12232>
-   11810:	1c0c      	adds	r4, r1, #0
-   11812:	401c      	ands	r4, r3
-   11814:	4bb9      	ldr	r3, [pc, #740]	(11afc <.text+0x11afc>)
-   11816:	9135      	str	r1, [sp, #212]
-   11818:	429c      	cmp	r4, r3
-   1181a:	dc0a      	bgt.n	11832 <__ieee754_pow+0x52>
-   1181c:	429c      	cmp	r4, r3
-   1181e:	d102      	bne.n	11826 <__ieee754_pow+0x46>
-   11820:	9937      	ldr	r1, [sp, #220]
-   11822:	2900      	cmp	r1, #0
-   11824:	d105      	bne.n	11832 <__ieee754_pow+0x52>
-   11826:	429f      	cmp	r7, r3
-   11828:	dc03      	bgt.n	11832 <__ieee754_pow+0x52>
-   1182a:	429f      	cmp	r7, r3
-   1182c:	d109      	bne.n	11842 <__ieee754_pow+0x62>
-   1182e:	2800      	cmp	r0, #0
-   11830:	d007      	beq.n	11842 <__ieee754_pow+0x62>
-   11832:	9821      	ldr	r0, [sp, #132]
-   11834:	9922      	ldr	r1, [sp, #136]
-   11836:	9a23      	ldr	r2, [sp, #140]
-   11838:	9b24      	ldr	r3, [sp, #144]
-   1183a:	f003 fcb3 	bl	151a4 <____adddf3_from_thumb>
-   1183e:	f000 fcf8 	bl	12232 <.text+0x12232>
-   11842:	9a35      	ldr	r2, [sp, #212]
-   11844:	2a00      	cmp	r2, #0
-   11846:	da2c      	bge.n	118a2 <__ieee754_pow+0xc2>
-   11848:	4bad      	ldr	r3, [pc, #692]	(11b00 <.text+0x11b00>)
-   1184a:	429f      	cmp	r7, r3
-   1184c:	dd01      	ble.n	11852 <__ieee754_pow+0x72>
-   1184e:	2302      	movs	r3, #2
-   11850:	e013      	b.n	1187a <__ieee754_pow+0x9a>
-   11852:	4bac      	ldr	r3, [pc, #688]	(11b04 <.text+0x11b04>)
-   11854:	429f      	cmp	r7, r3
-   11856:	dd24      	ble.n	118a2 <__ieee754_pow+0xc2>
-   11858:	49ab      	ldr	r1, [pc, #684]	(11b08 <.text+0x11b08>)
-   1185a:	153b      	asrs	r3, r7, #20
-   1185c:	185a      	adds	r2, r3, r1
-   1185e:	2a14      	cmp	r2, #20
-   11860:	dd0d      	ble.n	1187e <__ieee754_pow+0x9e>
-   11862:	2334      	movs	r3, #52
-   11864:	1a9b      	subs	r3, r3, r2
-   11866:	1c02      	adds	r2, r0, #0
-   11868:	40da      	lsrs	r2, r3
-   1186a:	1c11      	adds	r1, r2, #0
-   1186c:	4099      	lsls	r1, r3
-   1186e:	4281      	cmp	r1, r0
-   11870:	d117      	bne.n	118a2 <__ieee754_pow+0xc2>
-   11872:	2301      	movs	r3, #1
-   11874:	401a      	ands	r2, r3
-   11876:	2302      	movs	r3, #2
-   11878:	1a9b      	subs	r3, r3, r2
-   1187a:	9334      	str	r3, [sp, #208]
-   1187c:	e013      	b.n	118a6 <__ieee754_pow+0xc6>
-   1187e:	2800      	cmp	r0, #0
-   11880:	d157      	bne.n	11932 <__ieee754_pow+0x152>
-   11882:	2314      	movs	r3, #20
-   11884:	1a9b      	subs	r3, r3, r2
-   11886:	1c3a      	adds	r2, r7, #0
-   11888:	411a      	asrs	r2, r3
-   1188a:	1c10      	adds	r0, r2, #0
-   1188c:	4098      	lsls	r0, r3
-   1188e:	42b8      	cmp	r0, r7
-   11890:	d001      	beq.n	11896 <__ieee754_pow+0xb6>
-   11892:	f000 fcd4 	bl	1223e <.text+0x1223e>
-   11896:	2301      	movs	r3, #1
-   11898:	401a      	ands	r2, r3
-   1189a:	2302      	movs	r3, #2
-   1189c:	1a9b      	subs	r3, r3, r2
-   1189e:	9334      	str	r3, [sp, #208]
-   118a0:	e026      	b.n	118f0 <__ieee754_pow+0x110>
-   118a2:	2100      	movs	r1, #0
-   118a4:	9134      	str	r1, [sp, #208]
-   118a6:	2800      	cmp	r0, #0
-   118a8:	d145      	bne.n	11936 <__ieee754_pow+0x156>
-   118aa:	4b94      	ldr	r3, [pc, #592]	(11afc <.text+0x11afc>)
-   118ac:	429f      	cmp	r7, r3
-   118ae:	d11f      	bne.n	118f0 <__ieee754_pow+0x110>
-   118b0:	4a96      	ldr	r2, [pc, #600]	(11b0c <.text+0x11b0c>)
-   118b2:	9d37      	ldr	r5, [sp, #220]
-   118b4:	18a3      	adds	r3, r4, r2
-   118b6:	431d      	orrs	r5, r3
-   118b8:	d107      	bne.n	118ca <__ieee754_pow+0xea>
-   118ba:	9821      	ldr	r0, [sp, #132]
-   118bc:	9922      	ldr	r1, [sp, #136]
-   118be:	1c02      	adds	r2, r0, #0
-   118c0:	1c0b      	adds	r3, r1, #0
-   118c2:	f003 fc73 	bl	151ac <____subdf3_from_thumb>
-   118c6:	f000 fcb4 	bl	12232 <.text+0x12232>
-   118ca:	4b8e      	ldr	r3, [pc, #568]	(11b04 <.text+0x11b04>)
-   118cc:	429c      	cmp	r4, r3
-   118ce:	dd06      	ble.n	118de <__ieee754_pow+0xfe>
-   118d0:	9836      	ldr	r0, [sp, #216]
-   118d2:	2800      	cmp	r0, #0
-   118d4:	db01      	blt.n	118da <__ieee754_pow+0xfa>
-   118d6:	f000 fcb8 	bl	1224a <.text+0x1224a>
-   118da:	f000 fca8 	bl	1222e <.text+0x1222e>
-   118de:	9936      	ldr	r1, [sp, #216]
-   118e0:	2900      	cmp	r1, #0
-   118e2:	db01      	blt.n	118e8 <__ieee754_pow+0x108>
-   118e4:	f000 fca3 	bl	1222e <.text+0x1222e>
-   118e8:	9a22      	ldr	r2, [sp, #136]
-   118ea:	9d21      	ldr	r5, [sp, #132]
-   118ec:	4694      	mov	ip, r2
-   118ee:	e053      	b.n	11998 <__ieee754_pow+0x1b8>
-   118f0:	4b87      	ldr	r3, [pc, #540]	(11b10 <.text+0x11b10>)
-   118f2:	429f      	cmp	r7, r3
-   118f4:	d10a      	bne.n	1190c <__ieee754_pow+0x12c>
-   118f6:	9936      	ldr	r1, [sp, #216]
-   118f8:	2900      	cmp	r1, #0
-   118fa:	db02      	blt.n	11902 <__ieee754_pow+0x122>
-   118fc:	9a23      	ldr	r2, [sp, #140]
-   118fe:	9b24      	ldr	r3, [sp, #144]
-   11900:	e086      	b.n	11a10 <__ieee754_pow+0x230>
-   11902:	487c      	ldr	r0, [pc, #496]	(11af4 <.text+0x11af4>)
-   11904:	497c      	ldr	r1, [pc, #496]	(11af8 <.text+0x11af8>)
-   11906:	9a23      	ldr	r2, [sp, #140]
-   11908:	9b24      	ldr	r3, [sp, #144]
-   1190a:	e05c      	b.n	119c6 <__ieee754_pow+0x1e6>
-   1190c:	2380      	movs	r3, #128
-   1190e:	05db      	lsls	r3, r3, #23
-   11910:	429d      	cmp	r5, r3
-   11912:	d102      	bne.n	1191a <__ieee754_pow+0x13a>
-   11914:	9823      	ldr	r0, [sp, #140]
-   11916:	9924      	ldr	r1, [sp, #144]
-   11918:	e068      	b.n	119ec <__ieee754_pow+0x20c>
-   1191a:	4b7e      	ldr	r3, [pc, #504]	(11b14 <.text+0x11b14>)
-   1191c:	429d      	cmp	r5, r3
-   1191e:	d10a      	bne.n	11936 <__ieee754_pow+0x156>
-   11920:	9b35      	ldr	r3, [sp, #212]
-   11922:	2b00      	cmp	r3, #0
-   11924:	db07      	blt.n	11936 <__ieee754_pow+0x156>
-   11926:	9823      	ldr	r0, [sp, #140]
-   11928:	9924      	ldr	r1, [sp, #144]
-   1192a:	f000 feef 	bl	1270c <__ieee754_sqrt>
-   1192e:	f000 fc80 	bl	12232 <.text+0x12232>
-   11932:	2500      	movs	r5, #0
-   11934:	9534      	str	r5, [sp, #208]
-   11936:	9823      	ldr	r0, [sp, #140]
-   11938:	9924      	ldr	r1, [sp, #144]
-   1193a:	f001 fd47 	bl	133cc <fabs>
-   1193e:	1c05      	adds	r5, r0, #0
-   11940:	9837      	ldr	r0, [sp, #220]
-   11942:	1c0e      	adds	r6, r1, #0
-   11944:	2800      	cmp	r0, #0
-   11946:	d12f      	bne.n	119a8 <__ieee754_pow+0x1c8>
-   11948:	4b6c      	ldr	r3, [pc, #432]	(11afc <.text+0x11afc>)
-   1194a:	429c      	cmp	r4, r3
-   1194c:	d004      	beq.n	11958 <__ieee754_pow+0x178>
-   1194e:	2c00      	cmp	r4, #0
-   11950:	d002      	beq.n	11958 <__ieee754_pow+0x178>
-   11952:	4b6f      	ldr	r3, [pc, #444]	(11b10 <.text+0x11b10>)
-   11954:	429c      	cmp	r4, r3
-   11956:	d127      	bne.n	119a8 <__ieee754_pow+0x1c8>
-   11958:	9936      	ldr	r1, [sp, #216]
-   1195a:	2900      	cmp	r1, #0
-   1195c:	da07      	bge.n	1196e <__ieee754_pow+0x18e>
-   1195e:	1c2a      	adds	r2, r5, #0
-   11960:	1c33      	adds	r3, r6, #0
-   11962:	4864      	ldr	r0, [pc, #400]	(11af4 <.text+0x11af4>)
-   11964:	4964      	ldr	r1, [pc, #400]	(11af8 <.text+0x11af8>)
-   11966:	f003 fc2d 	bl	151c4 <____divdf3_from_thumb>
-   1196a:	1c05      	adds	r5, r0, #0
-   1196c:	1c0e      	adds	r6, r1, #0
-   1196e:	9a35      	ldr	r2, [sp, #212]
-   11970:	2a00      	cmp	r2, #0
-   11972:	db01      	blt.n	11978 <__ieee754_pow+0x198>
-   11974:	f000 fc60 	bl	12238 <.text+0x12238>
-   11978:	4864      	ldr	r0, [pc, #400]	(11b0c <.text+0x11b0c>)
-   1197a:	9934      	ldr	r1, [sp, #208]
-   1197c:	1823      	adds	r3, r4, r0
-   1197e:	4319      	orrs	r1, r3
-   11980:	d104      	bne.n	1198c <__ieee754_pow+0x1ac>
-   11982:	1c28      	adds	r0, r5, #0
-   11984:	1c31      	adds	r1, r6, #0
-   11986:	1c2a      	adds	r2, r5, #0
-   11988:	1c33      	adds	r3, r6, #0
-   1198a:	e018      	b.n	119be <__ieee754_pow+0x1de>
-   1198c:	9a34      	ldr	r2, [sp, #208]
-   1198e:	2a01      	cmp	r2, #1
-   11990:	d001      	beq.n	11996 <__ieee754_pow+0x1b6>
-   11992:	f000 fc51 	bl	12238 <.text+0x12238>
-   11996:	46b4      	mov	ip, r6
-   11998:	2080      	movs	r0, #128
-   1199a:	0600      	lsls	r0, r0, #24
-   1199c:	182b      	adds	r3, r5, r0
-   1199e:	4664      	mov	r4, ip
-   119a0:	9321      	str	r3, [sp, #132]
-   119a2:	9422      	str	r4, [sp, #136]
-   119a4:	f000 fc51 	bl	1224a <.text+0x1224a>
-   119a8:	9935      	ldr	r1, [sp, #212]
-   119aa:	9a34      	ldr	r2, [sp, #208]
-   119ac:	0fcb      	lsrs	r3, r1, #31
-   119ae:	3b01      	subs	r3, #1
-   119b0:	9325      	str	r3, [sp, #148]
-   119b2:	4313      	orrs	r3, r2
-   119b4:	d10b      	bne.n	119ce <__ieee754_pow+0x1ee>
-   119b6:	9823      	ldr	r0, [sp, #140]
-   119b8:	9924      	ldr	r1, [sp, #144]
-   119ba:	1c02      	adds	r2, r0, #0
-   119bc:	1c0b      	adds	r3, r1, #0
-   119be:	f003 fbf5 	bl	151ac <____subdf3_from_thumb>
-   119c2:	1c02      	adds	r2, r0, #0
-   119c4:	1c0b      	adds	r3, r1, #0
-   119c6:	f003 fbfd 	bl	151c4 <____divdf3_from_thumb>
-   119ca:	f000 fc32 	bl	12232 <.text+0x12232>
-   119ce:	4b52      	ldr	r3, [pc, #328]	(11b18 <.text+0x11b18>)
-   119d0:	429f      	cmp	r7, r3
-   119d2:	dc00      	bgt.n	119d6 <__ieee754_pow+0x1f6>
-   119d4:	e086      	b.n	11ae4 <__ieee754_pow+0x304>
-   119d6:	4b51      	ldr	r3, [pc, #324]	(11b1c <.text+0x11b1c>)
-   119d8:	429f      	cmp	r7, r3
-   119da:	dd11      	ble.n	11a00 <__ieee754_pow+0x220>
-   119dc:	4b49      	ldr	r3, [pc, #292]	(11b04 <.text+0x11b04>)
-   119de:	429c      	cmp	r4, r3
-   119e0:	dc08      	bgt.n	119f4 <__ieee754_pow+0x214>
-   119e2:	9b36      	ldr	r3, [sp, #216]
-   119e4:	2b00      	cmp	r3, #0
-   119e6:	da1d      	bge.n	11a24 <__ieee754_pow+0x244>
-   119e8:	484d      	ldr	r0, [pc, #308]	(11b20 <.text+0x11b20>)
-   119ea:	494e      	ldr	r1, [pc, #312]	(11b24 <.text+0x11b24>)
-   119ec:	1c02      	adds	r2, r0, #0
-   119ee:	1c0b      	adds	r3, r1, #0
-   119f0:	f000 fc1a 	bl	12228 <.text+0x12228>
-   119f4:	9d36      	ldr	r5, [sp, #216]
-   119f6:	2d00      	cmp	r5, #0
-   119f8:	dc01      	bgt.n	119fe <__ieee754_pow+0x21e>
-   119fa:	f000 fc18 	bl	1222e <.text+0x1222e>
-   119fe:	e7f3      	b.n	119e8 <__ieee754_pow+0x208>
-   11a00:	4b49      	ldr	r3, [pc, #292]	(11b28 <.text+0x11b28>)
-   11a02:	429c      	cmp	r4, r3
-   11a04:	dc08      	bgt.n	11a18 <__ieee754_pow+0x238>
-   11a06:	9936      	ldr	r1, [sp, #216]
-   11a08:	2900      	cmp	r1, #0
-   11a0a:	dbed      	blt.n	119e8 <__ieee754_pow+0x208>
-   11a0c:	4a47      	ldr	r2, [pc, #284]	(11b2c <.text+0x11b2c>)
-   11a0e:	4b48      	ldr	r3, [pc, #288]	(11b30 <.text+0x11b30>)
-   11a10:	9221      	str	r2, [sp, #132]
-   11a12:	9322      	str	r3, [sp, #136]
-   11a14:	f000 fc19 	bl	1224a <.text+0x1224a>
-   11a18:	4b3d      	ldr	r3, [pc, #244]	(11b10 <.text+0x11b10>)
-   11a1a:	429c      	cmp	r4, r3
-   11a1c:	dd08      	ble.n	11a30 <__ieee754_pow+0x250>
-   11a1e:	9b36      	ldr	r3, [sp, #216]
-   11a20:	2b00      	cmp	r3, #0
-   11a22:	dce1      	bgt.n	119e8 <__ieee754_pow+0x208>
-   11a24:	4c41      	ldr	r4, [pc, #260]	(11b2c <.text+0x11b2c>)
-   11a26:	4d42      	ldr	r5, [pc, #264]	(11b30 <.text+0x11b30>)
-   11a28:	9421      	str	r4, [sp, #132]
-   11a2a:	9522      	str	r5, [sp, #136]
-   11a2c:	f000 fc0d 	bl	1224a <.text+0x1224a>
-   11a30:	1c28      	adds	r0, r5, #0
-   11a32:	1c31      	adds	r1, r6, #0
-   11a34:	4a2f      	ldr	r2, [pc, #188]	(11af4 <.text+0x11af4>)
-   11a36:	4b30      	ldr	r3, [pc, #192]	(11af8 <.text+0x11af8>)
-   11a38:	f003 fbb8 	bl	151ac <____subdf3_from_thumb>
-   11a3c:	4a3d      	ldr	r2, [pc, #244]	(11b34 <.text+0x11b34>)
-   11a3e:	4b3e      	ldr	r3, [pc, #248]	(11b38 <.text+0x11b38>)
-   11a40:	1c04      	adds	r4, r0, #0
-   11a42:	1c0d      	adds	r5, r1, #0
-   11a44:	f003 fbb6 	bl	151b4 <____muldf3_from_thumb>
-   11a48:	4a3c      	ldr	r2, [pc, #240]	(11b3c <.text+0x11b3c>)
-   11a4a:	4b3d      	ldr	r3, [pc, #244]	(11b40 <.text+0x11b40>)
-   11a4c:	901f      	str	r0, [sp, #124]
-   11a4e:	9120      	str	r1, [sp, #128]
-   11a50:	1c20      	adds	r0, r4, #0
-   11a52:	1c29      	adds	r1, r5, #0
-   11a54:	f003 fbae 	bl	151b4 <____muldf3_from_thumb>
-   11a58:	1c22      	adds	r2, r4, #0
-   11a5a:	901d      	str	r0, [sp, #116]
-   11a5c:	911e      	str	r1, [sp, #120]
-   11a5e:	1c2b      	adds	r3, r5, #0
-   11a60:	1c20      	adds	r0, r4, #0
-   11a62:	1c29      	adds	r1, r5, #0
-   11a64:	f003 fba6 	bl	151b4 <____muldf3_from_thumb>
-   11a68:	4a36      	ldr	r2, [pc, #216]	(11b44 <.text+0x11b44>)
-   11a6a:	4b37      	ldr	r3, [pc, #220]	(11b48 <.text+0x11b48>)
-   11a6c:	1c06      	adds	r6, r0, #0
-   11a6e:	1c0f      	adds	r7, r1, #0
-   11a70:	1c20      	adds	r0, r4, #0
-   11a72:	1c29      	adds	r1, r5, #0
-   11a74:	f003 fb9e 	bl	151b4 <____muldf3_from_thumb>
-   11a78:	4a34      	ldr	r2, [pc, #208]	(11b4c <.text+0x11b4c>)
-   11a7a:	4b35      	ldr	r3, [pc, #212]	(11b50 <.text+0x11b50>)
-   11a7c:	f003 fb92 	bl	151a4 <____adddf3_from_thumb>
-   11a80:	1c02      	adds	r2, r0, #0
-   11a82:	1c0b      	adds	r3, r1, #0
-   11a84:	1c20      	adds	r0, r4, #0
-   11a86:	1c29      	adds	r1, r5, #0
-   11a88:	f003 fb94 	bl	151b4 <____muldf3_from_thumb>
-   11a8c:	1c02      	adds	r2, r0, #0
-   11a8e:	1c0b      	adds	r3, r1, #0
-   11a90:	4830      	ldr	r0, [pc, #192]	(11b54 <.text+0x11b54>)
-   11a92:	4931      	ldr	r1, [pc, #196]	(11b58 <.text+0x11b58>)
-   11a94:	f003 fb8a 	bl	151ac <____subdf3_from_thumb>
-   11a98:	1c02      	adds	r2, r0, #0
-   11a9a:	1c0b      	adds	r3, r1, #0
-   11a9c:	1c30      	adds	r0, r6, #0
-   11a9e:	1c39      	adds	r1, r7, #0
-   11aa0:	f003 fb88 	bl	151b4 <____muldf3_from_thumb>
-   11aa4:	4a2d      	ldr	r2, [pc, #180]	(11b5c <.text+0x11b5c>)
-   11aa6:	4b2e      	ldr	r3, [pc, #184]	(11b60 <.text+0x11b60>)
-   11aa8:	f003 fb84 	bl	151b4 <____muldf3_from_thumb>
-   11aac:	1c02      	adds	r2, r0, #0
-   11aae:	1c0b      	adds	r3, r1, #0
-   11ab0:	981d      	ldr	r0, [sp, #116]
-   11ab2:	991e      	ldr	r1, [sp, #120]
-   11ab4:	f003 fb76 	bl	151a4 <____adddf3_from_thumb>
-   11ab8:	1c05      	adds	r5, r0, #0
-   11aba:	1c0e      	adds	r6, r1, #0
-   11abc:	1c2a      	adds	r2, r5, #0
-   11abe:	1c33      	adds	r3, r6, #0
-   11ac0:	981f      	ldr	r0, [sp, #124]
-   11ac2:	9920      	ldr	r1, [sp, #128]
-   11ac4:	f003 fb6e 	bl	151a4 <____adddf3_from_thumb>
-   11ac8:	2400      	movs	r4, #0
-   11aca:	1c03      	adds	r3, r0, #0
-   11acc:	932c      	str	r3, [sp, #176]
-   11ace:	942d      	str	r4, [sp, #180]
-   11ad0:	1c21      	adds	r1, r4, #0
-   11ad2:	9a1f      	ldr	r2, [sp, #124]
-   11ad4:	9b20      	ldr	r3, [sp, #128]
-   11ad6:	f003 fb69 	bl	151ac <____subdf3_from_thumb>
-   11ada:	1c02      	adds	r2, r0, #0
-   11adc:	1c0b      	adds	r3, r1, #0
-   11ade:	1c28      	adds	r0, r5, #0
-   11ae0:	1c31      	adds	r1, r6, #0
-   11ae2:	e1d4      	b.n	11e8e <.text+0x11e8e>
-   11ae4:	4b1f      	ldr	r3, [pc, #124]	(11b64 <.text+0x11b64>)
-   11ae6:	429c      	cmp	r4, r3
-   11ae8:	dd3e      	ble.n	11b68 <.text+0x11b68>
-   11aea:	2200      	movs	r2, #0
-   11aec:	e046      	b.n	11b7c <.text+0x11b7c>
-   11aee:	0000      	lsls	r0, r0, #0
-   11af0:	ffff 7fff 	undefined
-   11af4:	0000      	lsls	r0, r0, #0
-   11af6:	3ff0      	subs	r7, #240
-   11af8:	0000      	lsls	r0, r0, #0
-   11afa:	0000      	lsls	r0, r0, #0
-   11afc:	0000      	lsls	r0, r0, #0
-   11afe:	7ff0      	ldrb	r0, [r6, #31]
-   11b00:	ffff 433f 	vrsra.u32	d20, d31, #1
-   11b04:	ffff 3fef 	undefined
-   11b08:	fc01 ffff 	stc2	15, cr15, [r1], {255}
-   11b0c:	0000      	lsls	r0, r0, #0
-   11b0e:	c010      	stmia	r0!, {r4}
-   11b10:	0000      	lsls	r0, r0, #0
-   11b12:	3ff0      	subs	r7, #240
-   11b14:	0000      	lsls	r0, r0, #0
-   11b16:	3fe0      	subs	r7, #224
-   11b18:	0000      	lsls	r0, r0, #0
-   11b1a:	41e0      	rors	r0, r4
-   11b1c:	0000      	lsls	r0, r0, #0
-   11b1e:	43f0      	mvns	r0, r6
-   11b20:	e43c      	b.n	1139c <sin+0x5c>
-   11b22:	7e37      	ldrb	r7, [r6, #24]
-   11b24:	759c      	strb	r4, [r3, #22]
-   11b26:	8800      	ldrh	r0, [r0, #0]
-   11b28:	fffe 3fef 	undefined
-	...
-   11b34:	1547      	asrs	r7, r0, #21
-   11b36:	3ff7      	subs	r7, #247
-   11b38:	0000      	lsls	r0, r0, #0
-   11b3a:	6000      	str	r0, [r0, #0]
-   11b3c:	ae0b      	add	r6, sp, #44
-   11b3e:	3e54      	subs	r6, #84
-   11b40:	df44      	svc	68
-   11b42:	f85d 0000 	ldr.w	r0, [sp, r0]
-   11b46:	bfd0      	nop	{13}
-   11b48:	0000      	lsls	r0, r0, #0
-   11b4a:	0000      	lsls	r0, r0, #0
-   11b4c:	5555      	strb	r5, [r2, r5]
-   11b4e:	3fd5      	subs	r7, #213
-   11b50:	5555      	strb	r5, [r2, r5]
-   11b52:	5555      	strb	r5, [r2, r5]
-   11b54:	0000      	lsls	r0, r0, #0
-   11b56:	3fe0      	subs	r7, #224
-   11b58:	0000      	lsls	r0, r0, #0
-   11b5a:	0000      	lsls	r0, r0, #0
-   11b5c:	1547      	asrs	r7, r0, #21
-   11b5e:	bff7      	itett	<und>
-   11b60:	82fe      	strh	r6, [r7, #22]
-   11b62:	652b      	str	r3, [r5, #80]
-   11b64:	ffff 000f 	vaddl.u<illegal width 64>	q8, d15, d15
-   11b68:	1c31      	adds	r1, r6, #0
-   11b6a:	4bd1      	ldr	r3, [pc, #836]	(11eb0 <.text+0x11eb0>)
-   11b6c:	4acf      	ldr	r2, [pc, #828]	(11eac <.text+0x11eac>)
-   11b6e:	1c28      	adds	r0, r5, #0
-   11b70:	f003 fb20 	bl	151b4 <____muldf3_from_thumb>
-   11b74:	2235      	movs	r2, #53
-   11b76:	1c0e      	adds	r6, r1, #0
-   11b78:	1c04      	adds	r4, r0, #0
-   11b7a:	4252      	negs	r2, r2
-   11b7c:	1523      	asrs	r3, r4, #20
-   11b7e:	18d2      	adds	r2, r2, r3
-   11b80:	4bcc      	ldr	r3, [pc, #816]	(11eb4 <.text+0x11eb4>)
-   11b82:	1c21      	adds	r1, r4, #0
-   11b84:	4019      	ands	r1, r3
-   11b86:	4bcc      	ldr	r3, [pc, #816]	(11eb8 <.text+0x11eb8>)
-   11b88:	48cc      	ldr	r0, [pc, #816]	(11ebc <.text+0x11ebc>)
-   11b8a:	430b      	orrs	r3, r1
-   11b8c:	9340      	str	r3, [sp, #256]
-   11b8e:	4bcc      	ldr	r3, [pc, #816]	(11ec0 <.text+0x11ec0>)
-   11b90:	1810      	adds	r0, r2, r0
-   11b92:	903e      	str	r0, [sp, #248]
-   11b94:	4299      	cmp	r1, r3
-   11b96:	dd0c      	ble.n	11bb2 <.text+0x11bb2>
-   11b98:	4bca      	ldr	r3, [pc, #808]	(11ec4 <.text+0x11ec4>)
-   11b9a:	4299      	cmp	r1, r3
-   11b9c:	dc02      	bgt.n	11ba4 <.text+0x11ba4>
-   11b9e:	2201      	movs	r2, #1
-   11ba0:	9233      	str	r2, [sp, #204]
-   11ba2:	e008      	b.n	11bb6 <.text+0x11bb6>
-   11ba4:	9c40      	ldr	r4, [sp, #256]
-   11ba6:	4bc8      	ldr	r3, [pc, #800]	(11ec8 <.text+0x11ec8>)
-   11ba8:	48c8      	ldr	r0, [pc, #800]	(11ecc <.text+0x11ecc>)
-   11baa:	18d3      	adds	r3, r2, r3
-   11bac:	1824      	adds	r4, r4, r0
-   11bae:	933e      	str	r3, [sp, #248]
-   11bb0:	9440      	str	r4, [sp, #256]
-   11bb2:	2100      	movs	r1, #0
-   11bb4:	9133      	str	r1, [sp, #204]
-   11bb6:	9b40      	ldr	r3, [sp, #256]
-   11bb8:	1c34      	adds	r4, r6, #0
-   11bba:	9a33      	ldr	r2, [sp, #204]
-   11bbc:	933c      	str	r3, [sp, #240]
-   11bbe:	943d      	str	r4, [sp, #244]
-   11bc0:	4bc3      	ldr	r3, [pc, #780]	(11ed0 <.text+0x11ed0>)
-   11bc2:	00d2      	lsls	r2, r2, #3
-   11bc4:	18d3      	adds	r3, r2, r3
-   11bc6:	681e      	ldr	r6, [r3, #0]
-   11bc8:	685f      	ldr	r7, [r3, #4]
-   11bca:	921c      	str	r2, [sp, #112]
-   11bcc:	1c3b      	adds	r3, r7, #0
-   11bce:	1c32      	adds	r2, r6, #0
-   11bd0:	983c      	ldr	r0, [sp, #240]
-   11bd2:	993d      	ldr	r1, [sp, #244]
-   11bd4:	f003 faea 	bl	151ac <____subdf3_from_thumb>
-   11bd8:	1c32      	adds	r2, r6, #0
-   11bda:	1c3b      	adds	r3, r7, #0
-   11bdc:	901a      	str	r0, [sp, #104]
-   11bde:	911b      	str	r1, [sp, #108]
-   11be0:	983c      	ldr	r0, [sp, #240]
-   11be2:	993d      	ldr	r1, [sp, #244]
-   11be4:	f003 fade 	bl	151a4 <____adddf3_from_thumb>
-   11be8:	1c02      	adds	r2, r0, #0
-   11bea:	1c0b      	adds	r3, r1, #0
-   11bec:	48b9      	ldr	r0, [pc, #740]	(11ed4 <.text+0x11ed4>)
-   11bee:	49ba      	ldr	r1, [pc, #744]	(11ed8 <.text+0x11ed8>)
-   11bf0:	f003 fae8 	bl	151c4 <____divdf3_from_thumb>
-   11bf4:	9018      	str	r0, [sp, #96]
-   11bf6:	9119      	str	r1, [sp, #100]
-   11bf8:	9a18      	ldr	r2, [sp, #96]
-   11bfa:	9b19      	ldr	r3, [sp, #100]
-   11bfc:	981a      	ldr	r0, [sp, #104]
-   11bfe:	991b      	ldr	r1, [sp, #108]
-   11c00:	f003 fad8 	bl	151b4 <____muldf3_from_thumb>
-   11c04:	2400      	movs	r4, #0
-   11c06:	1c03      	adds	r3, r0, #0
-   11c08:	9338      	str	r3, [sp, #224]
-   11c0a:	9439      	str	r4, [sp, #228]
-   11c0c:	9b40      	ldr	r3, [sp, #256]
-   11c0e:	9016      	str	r0, [sp, #88]
-   11c10:	9117      	str	r1, [sp, #92]
-   11c12:	9c33      	ldr	r4, [sp, #204]
-   11c14:	1058      	asrs	r0, r3, #1
-   11c16:	2380      	movs	r3, #128
-   11c18:	059b      	lsls	r3, r3, #22
-   11c1a:	2580      	movs	r5, #128
-   11c1c:	4318      	orrs	r0, r3
-   11c1e:	032d      	lsls	r5, r5, #12
-   11c20:	04a3      	lsls	r3, r4, #18
-   11c22:	49ae      	ldr	r1, [pc, #696]	(11edc <.text+0x11edc>)
-   11c24:	4aae      	ldr	r2, [pc, #696]	(11ee0 <.text+0x11ee0>)
-   11c26:	195b      	adds	r3, r3, r5
-   11c28:	18c1      	adds	r1, r0, r3
-   11c2a:	1c0c      	adds	r4, r1, #0
-   11c2c:	1c15      	adds	r5, r2, #0
-   11c2e:	1c2b      	adds	r3, r5, #0
-   11c30:	1c22      	adds	r2, r4, #0
-   11c32:	9838      	ldr	r0, [sp, #224]
-   11c34:	9939      	ldr	r1, [sp, #228]
-   11c36:	f003 fabd 	bl	151b4 <____muldf3_from_thumb>
-   11c3a:	1c02      	adds	r2, r0, #0
-   11c3c:	1c0b      	adds	r3, r1, #0
-   11c3e:	981a      	ldr	r0, [sp, #104]
-   11c40:	991b      	ldr	r1, [sp, #108]
-   11c42:	f003 fab3 	bl	151ac <____subdf3_from_thumb>
-   11c46:	1c32      	adds	r2, r6, #0
-   11c48:	9014      	str	r0, [sp, #80]
-   11c4a:	9115      	str	r1, [sp, #84]
-   11c4c:	1c3b      	adds	r3, r7, #0
-   11c4e:	1c20      	adds	r0, r4, #0
-   11c50:	1c29      	adds	r1, r5, #0
-   11c52:	f003 faab 	bl	151ac <____subdf3_from_thumb>
-   11c56:	1c02      	adds	r2, r0, #0
-   11c58:	1c0b      	adds	r3, r1, #0
-   11c5a:	983c      	ldr	r0, [sp, #240]
-   11c5c:	993d      	ldr	r1, [sp, #244]
-   11c5e:	f003 faa5 	bl	151ac <____subdf3_from_thumb>
-   11c62:	1c02      	adds	r2, r0, #0
-   11c64:	1c0b      	adds	r3, r1, #0
-   11c66:	9838      	ldr	r0, [sp, #224]
-   11c68:	9939      	ldr	r1, [sp, #228]
-   11c6a:	f003 faa3 	bl	151b4 <____muldf3_from_thumb>
-   11c6e:	1c02      	adds	r2, r0, #0
-   11c70:	1c0b      	adds	r3, r1, #0
-   11c72:	9814      	ldr	r0, [sp, #80]
-   11c74:	9915      	ldr	r1, [sp, #84]
-   11c76:	f003 fa99 	bl	151ac <____subdf3_from_thumb>
-   11c7a:	1c02      	adds	r2, r0, #0
-   11c7c:	1c0b      	adds	r3, r1, #0
-   11c7e:	9818      	ldr	r0, [sp, #96]
-   11c80:	9919      	ldr	r1, [sp, #100]
-   11c82:	f003 fa97 	bl	151b4 <____muldf3_from_thumb>
-   11c86:	9012      	str	r0, [sp, #72]
-   11c88:	9113      	str	r1, [sp, #76]
-   11c8a:	9816      	ldr	r0, [sp, #88]
-   11c8c:	9917      	ldr	r1, [sp, #92]
-   11c8e:	1c02      	adds	r2, r0, #0
-   11c90:	1c0b      	adds	r3, r1, #0
-   11c92:	f003 fa8f 	bl	151b4 <____muldf3_from_thumb>
-   11c96:	1c04      	adds	r4, r0, #0
-   11c98:	1c0d      	adds	r5, r1, #0
-   11c9a:	1c22      	adds	r2, r4, #0
-   11c9c:	1c2b      	adds	r3, r5, #0
-   11c9e:	f003 fa89 	bl	151b4 <____muldf3_from_thumb>
-   11ca2:	4a90      	ldr	r2, [pc, #576]	(11ee4 <.text+0x11ee4>)
-   11ca4:	4b90      	ldr	r3, [pc, #576]	(11ee8 <.text+0x11ee8>)
-   11ca6:	1c06      	adds	r6, r0, #0
-   11ca8:	1c0f      	adds	r7, r1, #0
-   11caa:	1c20      	adds	r0, r4, #0
-   11cac:	1c29      	adds	r1, r5, #0
-   11cae:	f003 fa81 	bl	151b4 <____muldf3_from_thumb>
-   11cb2:	4a8e      	ldr	r2, [pc, #568]	(11eec <.text+0x11eec>)
-   11cb4:	4b8e      	ldr	r3, [pc, #568]	(11ef0 <.text+0x11ef0>)
-   11cb6:	f003 fa75 	bl	151a4 <____adddf3_from_thumb>
-   11cba:	1c02      	adds	r2, r0, #0
-   11cbc:	1c0b      	adds	r3, r1, #0
-   11cbe:	1c20      	adds	r0, r4, #0
-   11cc0:	1c29      	adds	r1, r5, #0
-   11cc2:	f003 fa77 	bl	151b4 <____muldf3_from_thumb>
-   11cc6:	4a8b      	ldr	r2, [pc, #556]	(11ef4 <.text+0x11ef4>)
-   11cc8:	4b8b      	ldr	r3, [pc, #556]	(11ef8 <.text+0x11ef8>)
-   11cca:	f003 fa6b 	bl	151a4 <____adddf3_from_thumb>
-   11cce:	1c02      	adds	r2, r0, #0
-   11cd0:	1c0b      	adds	r3, r1, #0
-   11cd2:	1c20      	adds	r0, r4, #0
-   11cd4:	1c29      	adds	r1, r5, #0
-   11cd6:	f003 fa6d 	bl	151b4 <____muldf3_from_thumb>
-   11cda:	4a88      	ldr	r2, [pc, #544]	(11efc <.text+0x11efc>)
-   11cdc:	4b88      	ldr	r3, [pc, #544]	(11f00 <.text+0x11f00>)
-   11cde:	f003 fa61 	bl	151a4 <____adddf3_from_thumb>
-   11ce2:	1c02      	adds	r2, r0, #0
-   11ce4:	1c0b      	adds	r3, r1, #0
-   11ce6:	1c20      	adds	r0, r4, #0
-   11ce8:	1c29      	adds	r1, r5, #0
-   11cea:	f003 fa63 	bl	151b4 <____muldf3_from_thumb>
-   11cee:	4a85      	ldr	r2, [pc, #532]	(11f04 <.text+0x11f04>)
-   11cf0:	4b85      	ldr	r3, [pc, #532]	(11f08 <.text+0x11f08>)
-   11cf2:	f003 fa57 	bl	151a4 <____adddf3_from_thumb>
-   11cf6:	1c02      	adds	r2, r0, #0
-   11cf8:	1c0b      	adds	r3, r1, #0
-   11cfa:	1c20      	adds	r0, r4, #0
-   11cfc:	1c29      	adds	r1, r5, #0
-   11cfe:	f003 fa59 	bl	151b4 <____muldf3_from_thumb>
-   11d02:	4a82      	ldr	r2, [pc, #520]	(11f0c <.text+0x11f0c>)
-   11d04:	4b82      	ldr	r3, [pc, #520]	(11f10 <.text+0x11f10>)
-   11d06:	f003 fa4d 	bl	151a4 <____adddf3_from_thumb>
-   11d0a:	1c02      	adds	r2, r0, #0
-   11d0c:	1c0b      	adds	r3, r1, #0
-   11d0e:	1c30      	adds	r0, r6, #0
-   11d10:	1c39      	adds	r1, r7, #0
-   11d12:	f003 fa4f 	bl	151b4 <____muldf3_from_thumb>
-   11d16:	9a16      	ldr	r2, [sp, #88]
-   11d18:	9b17      	ldr	r3, [sp, #92]
-   11d1a:	1c04      	adds	r4, r0, #0
-   11d1c:	1c0d      	adds	r5, r1, #0
-   11d1e:	9838      	ldr	r0, [sp, #224]
-   11d20:	9939      	ldr	r1, [sp, #228]
-   11d22:	f003 fa3f 	bl	151a4 <____adddf3_from_thumb>
-   11d26:	1c02      	adds	r2, r0, #0
-   11d28:	1c0b      	adds	r3, r1, #0
-   11d2a:	9812      	ldr	r0, [sp, #72]
-   11d2c:	9913      	ldr	r1, [sp, #76]
-   11d2e:	f003 fa41 	bl	151b4 <____muldf3_from_thumb>
-   11d32:	1c02      	adds	r2, r0, #0
-   11d34:	1c0b      	adds	r3, r1, #0
-   11d36:	1c20      	adds	r0, r4, #0
-   11d38:	1c29      	adds	r1, r5, #0
-   11d3a:	f003 fa33 	bl	151a4 <____adddf3_from_thumb>
-   11d3e:	9010      	str	r0, [sp, #64]
-   11d40:	9111      	str	r1, [sp, #68]
-   11d42:	9838      	ldr	r0, [sp, #224]
-   11d44:	9939      	ldr	r1, [sp, #228]
-   11d46:	1c02      	adds	r2, r0, #0
-   11d48:	1c0b      	adds	r3, r1, #0
-   11d4a:	f003 fa33 	bl	151b4 <____muldf3_from_thumb>
-   11d4e:	4a71      	ldr	r2, [pc, #452]	(11f14 <.text+0x11f14>)
-   11d50:	4b71      	ldr	r3, [pc, #452]	(11f18 <.text+0x11f18>)
-   11d52:	1c06      	adds	r6, r0, #0
-   11d54:	1c0f      	adds	r7, r1, #0
-   11d56:	f003 fa25 	bl	151a4 <____adddf3_from_thumb>
-   11d5a:	9a10      	ldr	r2, [sp, #64]
-   11d5c:	9b11      	ldr	r3, [sp, #68]
-   11d5e:	f003 fa21 	bl	151a4 <____adddf3_from_thumb>
-   11d62:	2400      	movs	r4, #0
-   11d64:	1c25      	adds	r5, r4, #0
-   11d66:	1c03      	adds	r3, r0, #0
-   11d68:	1c04      	adds	r4, r0, #0
-   11d6a:	1c1a      	adds	r2, r3, #0
-   11d6c:	9838      	ldr	r0, [sp, #224]
-   11d6e:	9939      	ldr	r1, [sp, #228]
-   11d70:	1c2b      	adds	r3, r5, #0
-   11d72:	f003 fa1f 	bl	151b4 <____muldf3_from_thumb>
-   11d76:	1c22      	adds	r2, r4, #0
-   11d78:	1c2b      	adds	r3, r5, #0
-   11d7a:	900e      	str	r0, [sp, #56]
-   11d7c:	910f      	str	r1, [sp, #60]
-   11d7e:	9812      	ldr	r0, [sp, #72]
-   11d80:	9913      	ldr	r1, [sp, #76]
-   11d82:	f003 fa17 	bl	151b4 <____muldf3_from_thumb>
-   11d86:	4a63      	ldr	r2, [pc, #396]	(11f14 <.text+0x11f14>)
-   11d88:	4b63      	ldr	r3, [pc, #396]	(11f18 <.text+0x11f18>)
-   11d8a:	900c      	str	r0, [sp, #48]
-   11d8c:	910d      	str	r1, [sp, #52]
-   11d8e:	1c20      	adds	r0, r4, #0
-   11d90:	1c29      	adds	r1, r5, #0
-   11d92:	f003 fa0b 	bl	151ac <____subdf3_from_thumb>
-   11d96:	1c32      	adds	r2, r6, #0
-   11d98:	1c3b      	adds	r3, r7, #0
-   11d9a:	f003 fa07 	bl	151ac <____subdf3_from_thumb>
-   11d9e:	1c02      	adds	r2, r0, #0
-   11da0:	1c0b      	adds	r3, r1, #0
-   11da2:	9810      	ldr	r0, [sp, #64]
-   11da4:	9911      	ldr	r1, [sp, #68]
-   11da6:	f003 fa01 	bl	151ac <____subdf3_from_thumb>
-   11daa:	9a16      	ldr	r2, [sp, #88]
-   11dac:	9b17      	ldr	r3, [sp, #92]
-   11dae:	f003 fa01 	bl	151b4 <____muldf3_from_thumb>
-   11db2:	1c02      	adds	r2, r0, #0
-   11db4:	1c0b      	adds	r3, r1, #0
-   11db6:	980c      	ldr	r0, [sp, #48]
-   11db8:	990d      	ldr	r1, [sp, #52]
-   11dba:	f003 f9f3 	bl	151a4 <____adddf3_from_thumb>
-   11dbe:	1c06      	adds	r6, r0, #0
-   11dc0:	1c0f      	adds	r7, r1, #0
-   11dc2:	1c32      	adds	r2, r6, #0
-   11dc4:	1c3b      	adds	r3, r7, #0
-   11dc6:	980e      	ldr	r0, [sp, #56]
-   11dc8:	990f      	ldr	r1, [sp, #60]
-   11dca:	f003 f9eb 	bl	151a4 <____adddf3_from_thumb>
-   11dce:	2400      	movs	r4, #0
-   11dd0:	1c25      	adds	r5, r4, #0
-   11dd2:	1c29      	adds	r1, r5, #0
-   11dd4:	4a51      	ldr	r2, [pc, #324]	(11f1c <.text+0x11f1c>)
-   11dd6:	4b52      	ldr	r3, [pc, #328]	(11f20 <.text+0x11f20>)
-   11dd8:	1c04      	adds	r4, r0, #0
-   11dda:	f003 f9eb 	bl	151b4 <____muldf3_from_thumb>
-   11dde:	4a51      	ldr	r2, [pc, #324]	(11f24 <.text+0x11f24>)
-   11de0:	4b51      	ldr	r3, [pc, #324]	(11f28 <.text+0x11f28>)
-   11de2:	900a      	str	r0, [sp, #40]
-   11de4:	910b      	str	r1, [sp, #44]
-   11de6:	1c20      	adds	r0, r4, #0
-   11de8:	1c29      	adds	r1, r5, #0
-   11dea:	f003 f9e3 	bl	151b4 <____muldf3_from_thumb>
-   11dee:	9a0e      	ldr	r2, [sp, #56]
-   11df0:	9b0f      	ldr	r3, [sp, #60]
-   11df2:	9008      	str	r0, [sp, #32]
-   11df4:	9109      	str	r1, [sp, #36]
-   11df6:	1c20      	adds	r0, r4, #0
-   11df8:	1c29      	adds	r1, r5, #0
-   11dfa:	f003 f9d7 	bl	151ac <____subdf3_from_thumb>
-   11dfe:	1c02      	adds	r2, r0, #0
-   11e00:	1c0b      	adds	r3, r1, #0
-   11e02:	1c30      	adds	r0, r6, #0
-   11e04:	1c39      	adds	r1, r7, #0
-   11e06:	f003 f9d1 	bl	151ac <____subdf3_from_thumb>
-   11e0a:	4a48      	ldr	r2, [pc, #288]	(11f2c <.text+0x11f2c>)
-   11e0c:	4b48      	ldr	r3, [pc, #288]	(11f30 <.text+0x11f30>)
-   11e0e:	f003 f9d1 	bl	151b4 <____muldf3_from_thumb>
-   11e12:	1c02      	adds	r2, r0, #0
-   11e14:	1c0b      	adds	r3, r1, #0
-   11e16:	9808      	ldr	r0, [sp, #32]
-   11e18:	9909      	ldr	r1, [sp, #36]
-   11e1a:	f003 f9c3 	bl	151a4 <____adddf3_from_thumb>
-   11e1e:	9a1c      	ldr	r2, [sp, #112]
-   11e20:	4b44      	ldr	r3, [pc, #272]	(11f34 <.text+0x11f34>)
-   11e22:	18d3      	adds	r3, r2, r3
-   11e24:	681a      	ldr	r2, [r3, #0]
-   11e26:	685b      	ldr	r3, [r3, #4]
-   11e28:	f003 f9bc 	bl	151a4 <____adddf3_from_thumb>
-   11e2c:	9006      	str	r0, [sp, #24]
-   11e2e:	9107      	str	r1, [sp, #28]
-   11e30:	983e      	ldr	r0, [sp, #248]
-   11e32:	f003 f9b3 	bl	1519c <____floatsidf_from_thumb>
-   11e36:	4b40      	ldr	r3, [pc, #256]	(11f38 <.text+0x11f38>)
-   11e38:	9c1c      	ldr	r4, [sp, #112]
-   11e3a:	18e2      	adds	r2, r4, r3
-   11e3c:	1c05      	adds	r5, r0, #0
-   11e3e:	1c0e      	adds	r6, r1, #0
-   11e40:	6810      	ldr	r0, [r2, #0]
-   11e42:	6851      	ldr	r1, [r2, #4]
-   11e44:	9a06      	ldr	r2, [sp, #24]
-   11e46:	9b07      	ldr	r3, [sp, #28]
-   11e48:	9026      	str	r0, [sp, #152]
-   11e4a:	9127      	str	r1, [sp, #156]
-   11e4c:	980a      	ldr	r0, [sp, #40]
-   11e4e:	990b      	ldr	r1, [sp, #44]
-   11e50:	f003 f9a8 	bl	151a4 <____adddf3_from_thumb>
-   11e54:	9a26      	ldr	r2, [sp, #152]
-   11e56:	9b27      	ldr	r3, [sp, #156]
-   11e58:	f003 f9a4 	bl	151a4 <____adddf3_from_thumb>
-   11e5c:	1c2a      	adds	r2, r5, #0
-   11e5e:	1c33      	adds	r3, r6, #0
-   11e60:	f003 f9a0 	bl	151a4 <____adddf3_from_thumb>
-   11e64:	2400      	movs	r4, #0
-   11e66:	1c03      	adds	r3, r0, #0
-   11e68:	932c      	str	r3, [sp, #176]
-   11e6a:	942d      	str	r4, [sp, #180]
-   11e6c:	1c2a      	adds	r2, r5, #0
-   11e6e:	1c33      	adds	r3, r6, #0
-   11e70:	1c21      	adds	r1, r4, #0
-   11e72:	f003 f99b 	bl	151ac <____subdf3_from_thumb>
-   11e76:	9a26      	ldr	r2, [sp, #152]
-   11e78:	9b27      	ldr	r3, [sp, #156]
-   11e7a:	f003 f997 	bl	151ac <____subdf3_from_thumb>
-   11e7e:	9a0a      	ldr	r2, [sp, #40]
-   11e80:	9b0b      	ldr	r3, [sp, #44]
-   11e82:	f003 f993 	bl	151ac <____subdf3_from_thumb>
-   11e86:	1c02      	adds	r2, r0, #0
-   11e88:	1c0b      	adds	r3, r1, #0
-   11e8a:	9806      	ldr	r0, [sp, #24]
-   11e8c:	9907      	ldr	r1, [sp, #28]
-   11e8e:	f003 f98d 	bl	151ac <____subdf3_from_thumb>
-   11e92:	9b34      	ldr	r3, [sp, #208]
-   11e94:	902e      	str	r0, [sp, #184]
-   11e96:	912f      	str	r1, [sp, #188]
-   11e98:	9925      	ldr	r1, [sp, #148]
-   11e9a:	3b01      	subs	r3, #1
-   11e9c:	4319      	orrs	r1, r3
-   11e9e:	d151      	bne.n	11f44 <.text+0x11f44>
-   11ea0:	4a26      	ldr	r2, [pc, #152]	(11f3c <.text+0x11f3c>)
-   11ea2:	4b27      	ldr	r3, [pc, #156]	(11f40 <.text+0x11f40>)
-   11ea4:	9230      	str	r2, [sp, #192]
-   11ea6:	9331      	str	r3, [sp, #196]
-   11ea8:	e050      	b.n	11f4c <.text+0x11f4c>
-   11eaa:	0000      	lsls	r0, r0, #0
-   11eac:	0000      	lsls	r0, r0, #0
-   11eae:	4340      	muls	r0, r0
-   11eb0:	0000      	lsls	r0, r0, #0
-   11eb2:	0000      	lsls	r0, r0, #0
-   11eb4:	ffff 000f 	vaddl.u<illegal width 64>	q8, d15, d15
-   11eb8:	0000      	lsls	r0, r0, #0
-   11eba:	3ff0      	subs	r7, #240
-   11ebc:	fc01 ffff 	stc2	15, cr15, [r1], {255}
-   11ec0:	988e      	ldr	r0, [sp, #568]
-   11ec2:	0003      	lsls	r3, r0, #0
-   11ec4:	b679      	undefined
-   11ec6:	000b      	lsls	r3, r1, #0
-   11ec8:	fc02 ffff 	stc2	15, cr15, [r2], {255}
-   11ecc:	0000      	lsls	r0, r0, #0
-   11ece:	fff0 5680 	vpadal.u8	d21, d0
-   11ed2:	0001      	lsls	r1, r0, #0
-   11ed4:	0000      	lsls	r0, r0, #0
-   11ed6:	3ff0      	subs	r7, #240
-	...
-   11ee4:	7e28      	ldrb	r0, [r5, #24]
-   11ee6:	3fca      	subs	r7, #202
-   11ee8:	4eef      	ldr	r6, [pc, #956]	(122a8 <.text+0x122a8>)
-   11eea:	4a45      	ldr	r2, [pc, #276]	(12000 <.text+0x12000>)
-   11eec:	864a      	strh	r2, [r1, #50]
-   11eee:	3fcd      	subs	r7, #205
-   11ef0:	db65      	blt.n	11fbe <.text+0x11fbe>
-   11ef2:	93c9      	str	r3, [sp, #804]
-   11ef4:	7460      	strb	r0, [r4, #17]
-   11ef6:	3fd1      	subs	r7, #209
-   11ef8:	4101      	asrs	r1, r0
-   11efa:	a91d      	add	r1, sp, #116
-   11efc:	5555      	strb	r5, [r2, r5]
-   11efe:	3fd5      	subs	r7, #213
-   11f00:	264d      	movs	r6, #77
-   11f02:	518f      	str	r7, [r1, r6]
-   11f04:	6db6      	ldr	r6, [r6, #88]
-   11f06:	3fdb      	subs	r7, #219
-   11f08:	abff      	add	r3, sp, #1020
-   11f0a:	db6f      	blt.n	11fec <.text+0x11fec>
-   11f0c:	3333      	adds	r3, #51
-   11f0e:	3fe3      	subs	r7, #227
-   11f10:	3303      	adds	r3, #3
-   11f12:	3333      	adds	r3, #51
-   11f14:	0000      	lsls	r0, r0, #0
-   11f16:	4008      	ands	r0, r1
-   11f18:	0000      	lsls	r0, r0, #0
-   11f1a:	0000      	lsls	r0, r0, #0
-   11f1c:	c709      	stmia	r7!, {r0, r3}
-   11f1e:	3fee      	subs	r7, #238
-   11f20:	0000      	lsls	r0, r0, #0
-   11f22:	e000      	b.n	11f26 <.text+0x11f26>
-   11f24:	2fe0      	cmp	r7, #224
-   11f26:	be3e      	bkpt	0x003e
-   11f28:	01f5      	lsls	r5, r6, #7
-   11f2a:	145b      	asrs	r3, r3, #17
-   11f2c:	c709      	stmia	r7!, {r0, r3}
-   11f2e:	3fee      	subs	r7, #238
-   11f30:	03fd      	lsls	r5, r7, #15
-   11f32:	dc3a      	bgt.n	11faa <.text+0x11faa>
-   11f34:	5690      	ldrsb	r0, [r2, r2]
-   11f36:	0001      	lsls	r1, r0, #0
-   11f38:	56a0      	ldrsb	r0, [r4, r2]
-   11f3a:	0001      	lsls	r1, r0, #0
-   11f3c:	0000      	lsls	r0, r0, #0
-   11f3e:	bff0      	nop	{15}
-   11f40:	0000      	lsls	r0, r0, #0
-   11f42:	0000      	lsls	r0, r0, #0
-   11f44:	4cc5      	ldr	r4, [pc, #788]	(1225c <.text+0x1225c>)
-   11f46:	4bc4      	ldr	r3, [pc, #784]	(12258 <.text+0x12258>)
-   11f48:	9330      	str	r3, [sp, #192]
-   11f4a:	9431      	str	r4, [sp, #196]
-   11f4c:	9b21      	ldr	r3, [sp, #132]
-   11f4e:	9c22      	ldr	r4, [sp, #136]
-   11f50:	2400      	movs	r4, #0
-   11f52:	1c1e      	adds	r6, r3, #0
-   11f54:	1c1a      	adds	r2, r3, #0
-   11f56:	9821      	ldr	r0, [sp, #132]
-   11f58:	9922      	ldr	r1, [sp, #136]
-   11f5a:	1c23      	adds	r3, r4, #0
-   11f5c:	f003 f926 	bl	151ac <____subdf3_from_thumb>
-   11f60:	9a2c      	ldr	r2, [sp, #176]
-   11f62:	9b2d      	ldr	r3, [sp, #180]
-   11f64:	f003 f926 	bl	151b4 <____muldf3_from_thumb>
-   11f68:	1c27      	adds	r7, r4, #0
-   11f6a:	9a2e      	ldr	r2, [sp, #184]
-   11f6c:	9b2f      	ldr	r3, [sp, #188]
-   11f6e:	1c04      	adds	r4, r0, #0
-   11f70:	1c0d      	adds	r5, r1, #0
-   11f72:	9821      	ldr	r0, [sp, #132]
-   11f74:	9922      	ldr	r1, [sp, #136]
-   11f76:	f003 f91d 	bl	151b4 <____muldf3_from_thumb>
-   11f7a:	1c02      	adds	r2, r0, #0
-   11f7c:	1c0b      	adds	r3, r1, #0
-   11f7e:	1c20      	adds	r0, r4, #0
-   11f80:	1c29      	adds	r1, r5, #0
-   11f82:	f003 f90f 	bl	151a4 <____adddf3_from_thumb>
-   11f86:	9a2c      	ldr	r2, [sp, #176]
-   11f88:	9b2d      	ldr	r3, [sp, #180]
-   11f8a:	902a      	str	r0, [sp, #168]
-   11f8c:	912b      	str	r1, [sp, #172]
-   11f8e:	1c30      	adds	r0, r6, #0
-   11f90:	1c39      	adds	r1, r7, #0
-   11f92:	f003 f90f 	bl	151b4 <____muldf3_from_thumb>
-   11f96:	9028      	str	r0, [sp, #160]
-   11f98:	9129      	str	r1, [sp, #164]
-   11f9a:	9a28      	ldr	r2, [sp, #160]
-   11f9c:	9b29      	ldr	r3, [sp, #164]
-   11f9e:	982a      	ldr	r0, [sp, #168]
-   11fa0:	992b      	ldr	r1, [sp, #172]
-   11fa2:	f003 f8ff 	bl	151a4 <____adddf3_from_thumb>
-   11fa6:	9032      	str	r0, [sp, #200]
-   11fa8:	4bad      	ldr	r3, [pc, #692]	(12260 <.text+0x12260>)
-   11faa:	9c32      	ldr	r4, [sp, #200]
-   11fac:	1c06      	adds	r6, r0, #0
-   11fae:	1c0f      	adds	r7, r1, #0
-   11fb0:	429c      	cmp	r4, r3
-   11fb2:	dd22      	ble.n	11ffa <.text+0x11ffa>
-   11fb4:	4dab      	ldr	r5, [pc, #684]	(12264 <.text+0x12264>)
-   11fb6:	1963      	adds	r3, r4, r5
-   11fb8:	430b      	orrs	r3, r1
-   11fba:	d115      	bne.n	11fe8 <.text+0x11fe8>
-   11fbc:	4aaa      	ldr	r2, [pc, #680]	(12268 <.text+0x12268>)
-   11fbe:	4bab      	ldr	r3, [pc, #684]	(1226c <.text+0x1226c>)
-   11fc0:	982a      	ldr	r0, [sp, #168]
-   11fc2:	992b      	ldr	r1, [sp, #172]
-   11fc4:	f003 f8ee 	bl	151a4 <____adddf3_from_thumb>
-   11fc8:	9a28      	ldr	r2, [sp, #160]
-   11fca:	9b29      	ldr	r3, [sp, #164]
-   11fcc:	1c04      	adds	r4, r0, #0
-   11fce:	1c0d      	adds	r5, r1, #0
-   11fd0:	1c30      	adds	r0, r6, #0
-   11fd2:	1c39      	adds	r1, r7, #0
-   11fd4:	f003 f8ea 	bl	151ac <____subdf3_from_thumb>
-   11fd8:	1c02      	adds	r2, r0, #0
-   11fda:	1c0b      	adds	r3, r1, #0
-   11fdc:	1c20      	adds	r0, r4, #0
-   11fde:	1c29      	adds	r1, r5, #0
-   11fe0:	f003 f8f4 	bl	151cc <____gtdf2_from_thumb>
-   11fe4:	2800      	cmp	r0, #0
-   11fe6:	dd2b      	ble.n	12040 <.text+0x12040>
-   11fe8:	4aa1      	ldr	r2, [pc, #644]	(12270 <.text+0x12270>)
-   11fea:	4ba2      	ldr	r3, [pc, #648]	(12274 <.text+0x12274>)
-   11fec:	9830      	ldr	r0, [sp, #192]
-   11fee:	9931      	ldr	r1, [sp, #196]
-   11ff0:	f003 f8e0 	bl	151b4 <____muldf3_from_thumb>
-   11ff4:	4a9e      	ldr	r2, [pc, #632]	(12270 <.text+0x12270>)
-   11ff6:	4b9f      	ldr	r3, [pc, #636]	(12274 <.text+0x12274>)
-   11ff8:	e116      	b.n	12228 <.text+0x12228>
-   11ffa:	4b9f      	ldr	r3, [pc, #636]	(12278 <.text+0x12278>)
-   11ffc:	9c32      	ldr	r4, [sp, #200]
-   11ffe:	401c      	ands	r4, r3
-   12000:	4b9e      	ldr	r3, [pc, #632]	(1227c <.text+0x1227c>)
-   12002:	429c      	cmp	r4, r3
-   12004:	dd1c      	ble.n	12040 <.text+0x12040>
-   12006:	9832      	ldr	r0, [sp, #200]
-   12008:	499d      	ldr	r1, [pc, #628]	(12280 <.text+0x12280>)
-   1200a:	1843      	adds	r3, r0, r1
-   1200c:	433b      	orrs	r3, r7
-   1200e:	d10e      	bne.n	1202e <.text+0x1202e>
-   12010:	9a28      	ldr	r2, [sp, #160]
-   12012:	9b29      	ldr	r3, [sp, #164]
-   12014:	1c30      	adds	r0, r6, #0
-   12016:	1c39      	adds	r1, r7, #0
-   12018:	f003 f8c8 	bl	151ac <____subdf3_from_thumb>
-   1201c:	1c02      	adds	r2, r0, #0
-   1201e:	1c0b      	adds	r3, r1, #0
-   12020:	982a      	ldr	r0, [sp, #168]
-   12022:	992b      	ldr	r1, [sp, #172]
-   12024:	f003 f8f6 	bl	15214 <____ledf2_from_thumb>
-   12028:	2800      	cmp	r0, #0
-   1202a:	dd00      	ble.n	1202e <.text+0x1202e>
-   1202c:	e10b      	b.n	12246 <.text+0x12246>
-   1202e:	4a95      	ldr	r2, [pc, #596]	(12284 <.text+0x12284>)
-   12030:	4b95      	ldr	r3, [pc, #596]	(12288 <.text+0x12288>)
-   12032:	9830      	ldr	r0, [sp, #192]
-   12034:	9931      	ldr	r1, [sp, #196]
-   12036:	f003 f8bd 	bl	151b4 <____muldf3_from_thumb>
-   1203a:	4a92      	ldr	r2, [pc, #584]	(12284 <.text+0x12284>)
-   1203c:	4b92      	ldr	r3, [pc, #584]	(12288 <.text+0x12288>)
-   1203e:	e0f3      	b.n	12228 <.text+0x12228>
-   12040:	4b8d      	ldr	r3, [pc, #564]	(12278 <.text+0x12278>)
-   12042:	9a32      	ldr	r2, [sp, #200]
-   12044:	401a      	ands	r2, r3
-   12046:	4b91      	ldr	r3, [pc, #580]	(1228c <.text+0x1228c>)
-   12048:	429a      	cmp	r2, r3
-   1204a:	dc02      	bgt.n	12052 <.text+0x12052>
-   1204c:	2200      	movs	r2, #0
-   1204e:	923f      	str	r2, [sp, #252]
-   12050:	e029      	b.n	120a6 <.text+0x120a6>
-   12052:	1512      	asrs	r2, r2, #20
-   12054:	4b8e      	ldr	r3, [pc, #568]	(12290 <.text+0x12290>)
-   12056:	2580      	movs	r5, #128
-   12058:	036d      	lsls	r5, r5, #13
-   1205a:	18d2      	adds	r2, r2, r3
-   1205c:	9832      	ldr	r0, [sp, #200]
-   1205e:	1c2c      	adds	r4, r5, #0
-   12060:	4114      	asrs	r4, r2
-   12062:	1902      	adds	r2, r0, r4
-   12064:	0050      	lsls	r0, r2, #1
-   12066:	498b      	ldr	r1, [pc, #556]	(12294 <.text+0x12294>)
-   12068:	4e8b      	ldr	r6, [pc, #556]	(12298 <.text+0x12298>)
-   1206a:	0d40      	lsrs	r0, r0, #21
-   1206c:	1840      	adds	r0, r0, r1
-   1206e:	1c31      	adds	r1, r6, #0
-   12070:	4b8a      	ldr	r3, [pc, #552]	(1229c <.text+0x1229c>)
-   12072:	4c8b      	ldr	r4, [pc, #556]	(122a0 <.text+0x122a0>)
-   12074:	4101      	asrs	r1, r0
-   12076:	1c13      	adds	r3, r2, #0
-   12078:	438b      	bics	r3, r1
-   1207a:	933a      	str	r3, [sp, #232]
-   1207c:	943b      	str	r4, [sp, #236]
-   1207e:	4032      	ands	r2, r6
-   12080:	2314      	movs	r3, #20
-   12082:	432a      	orrs	r2, r5
-   12084:	1a1b      	subs	r3, r3, r0
-   12086:	411a      	asrs	r2, r3
-   12088:	923f      	str	r2, [sp, #252]
-   1208a:	9a32      	ldr	r2, [sp, #200]
-   1208c:	2a00      	cmp	r2, #0
-   1208e:	da02      	bge.n	12096 <.text+0x12096>
-   12090:	9b3f      	ldr	r3, [sp, #252]
-   12092:	425b      	negs	r3, r3
-   12094:	933f      	str	r3, [sp, #252]
-   12096:	9828      	ldr	r0, [sp, #160]
-   12098:	9929      	ldr	r1, [sp, #164]
-   1209a:	9a3a      	ldr	r2, [sp, #232]
-   1209c:	9b3b      	ldr	r3, [sp, #236]
-   1209e:	f003 f885 	bl	151ac <____subdf3_from_thumb>
-   120a2:	9028      	str	r0, [sp, #160]
-   120a4:	9129      	str	r1, [sp, #164]
-   120a6:	9a28      	ldr	r2, [sp, #160]
-   120a8:	9b29      	ldr	r3, [sp, #164]
-   120aa:	982a      	ldr	r0, [sp, #168]
-   120ac:	992b      	ldr	r1, [sp, #172]
-   120ae:	f003 f879 	bl	151a4 <____adddf3_from_thumb>
-   120b2:	2400      	movs	r4, #0
-   120b4:	1c25      	adds	r5, r4, #0
-   120b6:	1c29      	adds	r1, r5, #0
-   120b8:	4a7a      	ldr	r2, [pc, #488]	(122a4 <.text+0x122a4>)
-   120ba:	4b7b      	ldr	r3, [pc, #492]	(122a8 <.text+0x122a8>)
-   120bc:	1c04      	adds	r4, r0, #0
-   120be:	f003 f879 	bl	151b4 <____muldf3_from_thumb>
-   120c2:	9a28      	ldr	r2, [sp, #160]
-   120c4:	9b29      	ldr	r3, [sp, #164]
-   120c6:	9004      	str	r0, [sp, #16]
-   120c8:	9105      	str	r1, [sp, #20]
-   120ca:	1c20      	adds	r0, r4, #0
-   120cc:	1c29      	adds	r1, r5, #0
-   120ce:	f003 f86d 	bl	151ac <____subdf3_from_thumb>
-   120d2:	1c02      	adds	r2, r0, #0
-   120d4:	1c0b      	adds	r3, r1, #0
-   120d6:	982a      	ldr	r0, [sp, #168]
-   120d8:	992b      	ldr	r1, [sp, #172]
-   120da:	f003 f867 	bl	151ac <____subdf3_from_thumb>
-   120de:	4a73      	ldr	r2, [pc, #460]	(122ac <.text+0x122ac>)
-   120e0:	4b73      	ldr	r3, [pc, #460]	(122b0 <.text+0x122b0>)
-   120e2:	f003 f867 	bl	151b4 <____muldf3_from_thumb>
-   120e6:	4a73      	ldr	r2, [pc, #460]	(122b4 <.text+0x122b4>)
-   120e8:	4b73      	ldr	r3, [pc, #460]	(122b8 <.text+0x122b8>)
-   120ea:	1c06      	adds	r6, r0, #0
-   120ec:	1c0f      	adds	r7, r1, #0
-   120ee:	1c20      	adds	r0, r4, #0
-   120f0:	1c29      	adds	r1, r5, #0
-   120f2:	f003 f85f 	bl	151b4 <____muldf3_from_thumb>
-   120f6:	1c02      	adds	r2, r0, #0
-   120f8:	1c0b      	adds	r3, r1, #0
-   120fa:	1c30      	adds	r0, r6, #0
-   120fc:	1c39      	adds	r1, r7, #0
-   120fe:	f003 f851 	bl	151a4 <____adddf3_from_thumb>
-   12102:	1c04      	adds	r4, r0, #0
-   12104:	1c0d      	adds	r5, r1, #0
-   12106:	1c22      	adds	r2, r4, #0
-   12108:	1c2b      	adds	r3, r5, #0
-   1210a:	9804      	ldr	r0, [sp, #16]
-   1210c:	9905      	ldr	r1, [sp, #20]
-   1210e:	f003 f849 	bl	151a4 <____adddf3_from_thumb>
-   12112:	9a04      	ldr	r2, [sp, #16]
-   12114:	9b05      	ldr	r3, [sp, #20]
-   12116:	9002      	str	r0, [sp, #8]
-   12118:	9103      	str	r1, [sp, #12]
-   1211a:	f003 f847 	bl	151ac <____subdf3_from_thumb>
-   1211e:	1c02      	adds	r2, r0, #0
-   12120:	1c0b      	adds	r3, r1, #0
-   12122:	1c20      	adds	r0, r4, #0
-   12124:	1c29      	adds	r1, r5, #0
-   12126:	f003 f841 	bl	151ac <____subdf3_from_thumb>
-   1212a:	9000      	str	r0, [sp, #0]
-   1212c:	9101      	str	r1, [sp, #4]
-   1212e:	9802      	ldr	r0, [sp, #8]
-   12130:	9903      	ldr	r1, [sp, #12]
-   12132:	1c02      	adds	r2, r0, #0
-   12134:	1c0b      	adds	r3, r1, #0
-   12136:	f003 f83d 	bl	151b4 <____muldf3_from_thumb>
-   1213a:	4a60      	ldr	r2, [pc, #384]	(122bc <.text+0x122bc>)
-   1213c:	4b60      	ldr	r3, [pc, #384]	(122c0 <.text+0x122c0>)
-   1213e:	1c04      	adds	r4, r0, #0
-   12140:	1c0d      	adds	r5, r1, #0
-   12142:	f003 f837 	bl	151b4 <____muldf3_from_thumb>
-   12146:	4a5f      	ldr	r2, [pc, #380]	(122c4 <.text+0x122c4>)
-   12148:	4b5f      	ldr	r3, [pc, #380]	(122c8 <.text+0x122c8>)
-   1214a:	f003 f82f 	bl	151ac <____subdf3_from_thumb>
-   1214e:	1c02      	adds	r2, r0, #0
-   12150:	1c0b      	adds	r3, r1, #0
-   12152:	1c20      	adds	r0, r4, #0
-   12154:	1c29      	adds	r1, r5, #0
-   12156:	f003 f82d 	bl	151b4 <____muldf3_from_thumb>
-   1215a:	4a5c      	ldr	r2, [pc, #368]	(122cc <.text+0x122cc>)
-   1215c:	4b5c      	ldr	r3, [pc, #368]	(122d0 <.text+0x122d0>)
-   1215e:	f003 f821 	bl	151a4 <____adddf3_from_thumb>
-   12162:	1c02      	adds	r2, r0, #0
-   12164:	1c0b      	adds	r3, r1, #0
-   12166:	1c20      	adds	r0, r4, #0
-   12168:	1c29      	adds	r1, r5, #0
-   1216a:	f003 f823 	bl	151b4 <____muldf3_from_thumb>
-   1216e:	4a59      	ldr	r2, [pc, #356]	(122d4 <.text+0x122d4>)
-   12170:	4b59      	ldr	r3, [pc, #356]	(122d8 <.text+0x122d8>)
-   12172:	f003 f81b 	bl	151ac <____subdf3_from_thumb>
-   12176:	1c02      	adds	r2, r0, #0
-   12178:	1c0b      	adds	r3, r1, #0
-   1217a:	1c20      	adds	r0, r4, #0
-   1217c:	1c29      	adds	r1, r5, #0
-   1217e:	f003 f819 	bl	151b4 <____muldf3_from_thumb>
-   12182:	4a56      	ldr	r2, [pc, #344]	(122dc <.text+0x122dc>)
-   12184:	4b56      	ldr	r3, [pc, #344]	(122e0 <.text+0x122e0>)
-   12186:	f003 f80d 	bl	151a4 <____adddf3_from_thumb>
-   1218a:	1c02      	adds	r2, r0, #0
-   1218c:	1c0b      	adds	r3, r1, #0
-   1218e:	1c20      	adds	r0, r4, #0
-   12190:	1c29      	adds	r1, r5, #0
-   12192:	f003 f80f 	bl	151b4 <____muldf3_from_thumb>
-   12196:	1c02      	adds	r2, r0, #0
-   12198:	1c0b      	adds	r3, r1, #0
-   1219a:	9802      	ldr	r0, [sp, #8]
-   1219c:	9903      	ldr	r1, [sp, #12]
-   1219e:	f003 f805 	bl	151ac <____subdf3_from_thumb>
-   121a2:	1c04      	adds	r4, r0, #0
-   121a4:	1c0d      	adds	r5, r1, #0
-   121a6:	1c22      	adds	r2, r4, #0
-   121a8:	1c2b      	adds	r3, r5, #0
-   121aa:	9802      	ldr	r0, [sp, #8]
-   121ac:	9903      	ldr	r1, [sp, #12]
-   121ae:	f003 f801 	bl	151b4 <____muldf3_from_thumb>
-   121b2:	4a4c      	ldr	r2, [pc, #304]	(122e4 <.text+0x122e4>)
-   121b4:	4b4c      	ldr	r3, [pc, #304]	(122e8 <.text+0x122e8>)
-   121b6:	1c06      	adds	r6, r0, #0
-   121b8:	1c0f      	adds	r7, r1, #0
-   121ba:	1c20      	adds	r0, r4, #0
-   121bc:	1c29      	adds	r1, r5, #0
-   121be:	f002 fff5 	bl	151ac <____subdf3_from_thumb>
-   121c2:	1c02      	adds	r2, r0, #0
-   121c4:	1c0b      	adds	r3, r1, #0
-   121c6:	1c30      	adds	r0, r6, #0
-   121c8:	1c39      	adds	r1, r7, #0
-   121ca:	f002 fffb 	bl	151c4 <____divdf3_from_thumb>
-   121ce:	9a00      	ldr	r2, [sp, #0]
-   121d0:	9b01      	ldr	r3, [sp, #4]
-   121d2:	1c0d      	adds	r5, r1, #0
-   121d4:	1c04      	adds	r4, r0, #0
-   121d6:	9802      	ldr	r0, [sp, #8]
-   121d8:	9903      	ldr	r1, [sp, #12]
-   121da:	f002 ffeb 	bl	151b4 <____muldf3_from_thumb>
-   121de:	1c02      	adds	r2, r0, #0
-   121e0:	1c0b      	adds	r3, r1, #0
-   121e2:	9800      	ldr	r0, [sp, #0]
-   121e4:	9901      	ldr	r1, [sp, #4]
-   121e6:	f002 ffdd 	bl	151a4 <____adddf3_from_thumb>
-   121ea:	1c02      	adds	r2, r0, #0
-   121ec:	1c0b      	adds	r3, r1, #0
-   121ee:	1c20      	adds	r0, r4, #0
-   121f0:	1c29      	adds	r1, r5, #0
-   121f2:	f002 ffdb 	bl	151ac <____subdf3_from_thumb>
-   121f6:	9a02      	ldr	r2, [sp, #8]
-   121f8:	9b03      	ldr	r3, [sp, #12]
-   121fa:	f002 ffd7 	bl	151ac <____subdf3_from_thumb>
-   121fe:	1c02      	adds	r2, r0, #0
-   12200:	1c0b      	adds	r3, r1, #0
-   12202:	4916      	ldr	r1, [pc, #88]	(1225c <.text+0x1225c>)
-   12204:	4814      	ldr	r0, [pc, #80]	(12258 <.text+0x12258>)
-   12206:	f002 ffd1 	bl	151ac <____subdf3_from_thumb>
-   1220a:	9d3f      	ldr	r5, [sp, #252]
-   1220c:	052a      	lsls	r2, r5, #20
-   1220e:	1812      	adds	r2, r2, r0
-   12210:	1513      	asrs	r3, r2, #20
-   12212:	2b00      	cmp	r3, #0
-   12214:	dc05      	bgt.n	12222 <.text+0x12222>
-   12216:	1c2a      	adds	r2, r5, #0
-   12218:	f001 fa30 	bl	1367c <scalbn>
-   1221c:	1c02      	adds	r2, r0, #0
-   1221e:	1c0b      	adds	r3, r1, #0
-   12220:	e000      	b.n	12224 <.text+0x12224>
-   12222:	1c0b      	adds	r3, r1, #0
-   12224:	9830      	ldr	r0, [sp, #192]
-   12226:	9931      	ldr	r1, [sp, #196]
-   12228:	f002 ffc4 	bl	151b4 <____muldf3_from_thumb>
-   1222c:	e001      	b.n	12232 <.text+0x12232>
-   1222e:	481b      	ldr	r0, [pc, #108]	(1229c <.text+0x1229c>)
-   12230:	491b      	ldr	r1, [pc, #108]	(122a0 <.text+0x122a0>)
-   12232:	9021      	str	r0, [sp, #132]
-   12234:	9122      	str	r1, [sp, #136]
-   12236:	e008      	b.n	1224a <.text+0x1224a>
-   12238:	9521      	str	r5, [sp, #132]
-   1223a:	9622      	str	r6, [sp, #136]
-   1223c:	e005      	b.n	1224a <.text+0x1224a>
-   1223e:	2100      	movs	r1, #0
-   12240:	9134      	str	r1, [sp, #208]
-   12242:	f7ff fb55 	bl	118f0 <__ieee754_pow+0x110>
-   12246:	1522      	asrs	r2, r4, #20
-   12248:	e704      	b.n	12054 <.text+0x12054>
-   1224a:	9821      	ldr	r0, [sp, #132]
-   1224c:	9922      	ldr	r1, [sp, #136]
-   1224e:	b041      	add	sp, #260
-   12250:	bcf0      	pop	{r4, r5, r6, r7}
-   12252:	bc04      	pop	{r2}
-   12254:	4710      	bx	r2
-   12256:	0000      	lsls	r0, r0, #0
-   12258:	0000      	lsls	r0, r0, #0
-   1225a:	3ff0      	subs	r7, #240
-   1225c:	0000      	lsls	r0, r0, #0
-   1225e:	0000      	lsls	r0, r0, #0
-   12260:	ffff 408f 	vaddl.u<illegal width 64>	q10, d31, d15
-   12264:	0000      	lsls	r0, r0, #0
-   12266:	bf70      	nop	{7}
-   12268:	1547      	asrs	r7, r0, #21
-   1226a:	3c97      	subs	r4, #151
-   1226c:	82fe      	strh	r6, [r7, #22]
-   1226e:	652b      	str	r3, [r5, #80]
-   12270:	e43c      	b.n	11aec <__ieee754_pow+0x30c>
-   12272:	7e37      	ldrb	r7, [r6, #24]
-   12274:	759c      	strb	r4, [r3, #22]
-   12276:	8800      	ldrh	r0, [r0, #0]
-   12278:	ffff 7fff 	undefined
-   1227c:	cbff      	ldmia	r3!, {r0, r1, r2, r3, r4, r5, r6, r7}
-   1227e:	4090      	lsls	r0, r2
-   12280:	3400      	adds	r4, #0
-   12282:	3f6f      	subs	r7, #111
-   12284:	6e1f      	ldr	r7, [r3, #96]
-   12286:	01a5      	lsls	r5, r4, #6
-   12288:	f359 c2f8 	blx	f6b87c <__ctors_end__+0xf55e2c>
-   1228c:	0000      	lsls	r0, r0, #0
-   1228e:	3fe0      	subs	r7, #224
-   12290:	fc02 ffff 	stc2	15, cr15, [r2], {255}
-   12294:	fc01 ffff 	stc2	15, cr15, [r1], {255}
-   12298:	ffff 000f 	vaddl.u<illegal width 64>	q8, d15, d15
-	...
-   122a4:	2e43      	cmp	r6, #67
-   122a6:	3fe6      	subs	r7, #230
-   122a8:	0000      	lsls	r0, r0, #0
-   122aa:	0000      	lsls	r0, r0, #0
-   122ac:	2e42      	cmp	r6, #66
-   122ae:	3fe6      	subs	r7, #230
-   122b0:	39ef      	subs	r1, #239
-   122b2:	fefa 5c61 	cdp2	12, 15, cr5, cr10, cr1, {3}
-   122b6:	be20      	bkpt	0x0020
-   122b8:	6c39      	ldr	r1, [r7, #64]
-   122ba:	0ca8      	lsrs	r0, r5, #18
-   122bc:	3769      	adds	r7, #105
-   122be:	3e66      	subs	r6, #102
-   122c0:	a4d0      	add	r4, pc, #832	(adr r4,12604 <__ieee754_rem_pio2+0x318>)
-   122c2:	72be      	strb	r6, [r7, #10]
-   122c4:	bd41      	pop	{r0, r6, pc}
-   122c6:	3ebb      	subs	r6, #187
-   122c8:	6bf1      	ldr	r1, [r6, #60]
-   122ca:	c5d2      	stmia	r5!, {r1, r4, r6, r7}
-   122cc:	566a      	ldrsb	r2, [r5, r1]
-   122ce:	3f11      	subs	r7, #17
-   122d0:	de2c      	bal.n	1232c <__ieee754_rem_pio2+0x40>
-   122d2:	af25      	add	r7, sp, #148
-   122d4:	c16c      	stmia	r1!, {r2, r3, r5, r6}
-   122d6:	3f66      	subs	r7, #102
-   122d8:	bd93      	pop	{r0, r1, r4, r7, pc}
-   122da:	16be      	asrs	r6, r7, #26
-   122dc:	5555      	strb	r5, [r2, r5]
-   122de:	3fc5      	subs	r7, #197
-   122e0:	553e      	strb	r6, [r7, r4]
-   122e2:	5555      	strb	r5, [r2, r5]
-   122e4:	0000      	lsls	r0, r0, #0
-   122e6:	4000      	ands	r0, r0
-   122e8:	0000      	lsls	r0, r0, #0
-	...
-
-000122ec <__ieee754_rem_pio2>:
-   122ec:	b5f0      	push	{r4, r5, r6, r7, lr}
-   122ee:	b093      	sub	sp, #76
-   122f0:	9009      	str	r0, [sp, #36]
-   122f2:	4bd7      	ldr	r3, [pc, #860]	(12650 <.text+0x12650>)
-   122f4:	9f09      	ldr	r7, [sp, #36]
-   122f6:	401f      	ands	r7, r3
-   122f8:	4bd6      	ldr	r3, [pc, #856]	(12654 <.text+0x12654>)
-   122fa:	1c05      	adds	r5, r0, #0
-   122fc:	1c0e      	adds	r6, r1, #0
-   122fe:	9202      	str	r2, [sp, #8]
-   12300:	429f      	cmp	r7, r3
-   12302:	dc07      	bgt.n	12314 <__ieee754_rem_pio2+0x28>
-   12304:	4bd4      	ldr	r3, [pc, #848]	(12658 <.text+0x12658>)
-   12306:	4cd5      	ldr	r4, [pc, #852]	(1265c <.text+0x1265c>)
-   12308:	6093      	str	r3, [r2, #8]
-   1230a:	60d4      	str	r4, [r2, #12]
-   1230c:	2300      	movs	r3, #0
-   1230e:	6015      	str	r5, [r2, #0]
-   12310:	6056      	str	r6, [r2, #4]
-   12312:	e023      	b.n	1235c <__ieee754_rem_pio2+0x70>
-   12314:	4bd2      	ldr	r3, [pc, #840]	(12660 <.text+0x12660>)
-   12316:	429f      	cmp	r7, r3
-   12318:	dc6e      	bgt.n	123f8 <__ieee754_rem_pio2+0x10c>
-   1231a:	9b09      	ldr	r3, [sp, #36]
-   1231c:	2b00      	cmp	r3, #0
-   1231e:	dd35      	ble.n	1238c <__ieee754_rem_pio2+0xa0>
-   12320:	4ad0      	ldr	r2, [pc, #832]	(12664 <.text+0x12664>)
-   12322:	4bd1      	ldr	r3, [pc, #836]	(12668 <.text+0x12668>)
-   12324:	f002 ff42 	bl	151ac <____subdf3_from_thumb>
-   12328:	4bd0      	ldr	r3, [pc, #832]	(1266c <.text+0x1266c>)
-   1232a:	1c04      	adds	r4, r0, #0
-   1232c:	1c0d      	adds	r5, r1, #0
-   1232e:	429f      	cmp	r7, r3
-   12330:	d016      	beq.n	12360 <__ieee754_rem_pio2+0x74>
-   12332:	4acf      	ldr	r2, [pc, #828]	(12670 <.text+0x12670>)
-   12334:	4bcf      	ldr	r3, [pc, #828]	(12674 <.text+0x12674>)
-   12336:	f002 ff39 	bl	151ac <____subdf3_from_thumb>
-   1233a:	1c0b      	adds	r3, r1, #0
-   1233c:	9902      	ldr	r1, [sp, #8]
-   1233e:	1c02      	adds	r2, r0, #0
-   12340:	600a      	str	r2, [r1, #0]
-   12342:	604b      	str	r3, [r1, #4]
-   12344:	1c20      	adds	r0, r4, #0
-   12346:	1c29      	adds	r1, r5, #0
-   12348:	f002 ff30 	bl	151ac <____subdf3_from_thumb>
-   1234c:	4ac8      	ldr	r2, [pc, #800]	(12670 <.text+0x12670>)
-   1234e:	4bc9      	ldr	r3, [pc, #804]	(12674 <.text+0x12674>)
-   12350:	f002 ff2c 	bl	151ac <____subdf3_from_thumb>
-   12354:	9a02      	ldr	r2, [sp, #8]
-   12356:	6090      	str	r0, [r2, #8]
-   12358:	60d1      	str	r1, [r2, #12]
-   1235a:	2301      	movs	r3, #1
-   1235c:	9308      	str	r3, [sp, #32]
-   1235e:	e1ce      	b.n	126fe <.text+0x126fe>
-   12360:	4ac5      	ldr	r2, [pc, #788]	(12678 <.text+0x12678>)
-   12362:	4bc6      	ldr	r3, [pc, #792]	(1267c <.text+0x1267c>)
-   12364:	f002 ff22 	bl	151ac <____subdf3_from_thumb>
-   12368:	4ac5      	ldr	r2, [pc, #788]	(12680 <.text+0x12680>)
-   1236a:	4bc6      	ldr	r3, [pc, #792]	(12684 <.text+0x12684>)
-   1236c:	1c04      	adds	r4, r0, #0
-   1236e:	1c0d      	adds	r5, r1, #0
-   12370:	f002 ff1c 	bl	151ac <____subdf3_from_thumb>
-   12374:	1c0b      	adds	r3, r1, #0
-   12376:	9902      	ldr	r1, [sp, #8]
-   12378:	1c02      	adds	r2, r0, #0
-   1237a:	600a      	str	r2, [r1, #0]
-   1237c:	604b      	str	r3, [r1, #4]
-   1237e:	1c20      	adds	r0, r4, #0
-   12380:	1c29      	adds	r1, r5, #0
-   12382:	f002 ff13 	bl	151ac <____subdf3_from_thumb>
-   12386:	4abe      	ldr	r2, [pc, #760]	(12680 <.text+0x12680>)
-   12388:	4bbe      	ldr	r3, [pc, #760]	(12684 <.text+0x12684>)
-   1238a:	e7e1      	b.n	12350 <__ieee754_rem_pio2+0x64>
-   1238c:	4ab5      	ldr	r2, [pc, #724]	(12664 <.text+0x12664>)
-   1238e:	4bb6      	ldr	r3, [pc, #728]	(12668 <.text+0x12668>)
-   12390:	f002 ff08 	bl	151a4 <____adddf3_from_thumb>
-   12394:	4bb5      	ldr	r3, [pc, #724]	(1266c <.text+0x1266c>)
-   12396:	1c04      	adds	r4, r0, #0
-   12398:	1c0d      	adds	r5, r1, #0
-   1239a:	429f      	cmp	r7, r3
-   1239c:	d00f      	beq.n	123be <__ieee754_rem_pio2+0xd2>
-   1239e:	4ab4      	ldr	r2, [pc, #720]	(12670 <.text+0x12670>)
-   123a0:	4bb4      	ldr	r3, [pc, #720]	(12674 <.text+0x12674>)
-   123a2:	f002 feff 	bl	151a4 <____adddf3_from_thumb>
-   123a6:	1c0b      	adds	r3, r1, #0
-   123a8:	9902      	ldr	r1, [sp, #8]
-   123aa:	1c02      	adds	r2, r0, #0
-   123ac:	600a      	str	r2, [r1, #0]
-   123ae:	604b      	str	r3, [r1, #4]
-   123b0:	1c20      	adds	r0, r4, #0
-   123b2:	1c29      	adds	r1, r5, #0
-   123b4:	f002 fefa 	bl	151ac <____subdf3_from_thumb>
-   123b8:	4aad      	ldr	r2, [pc, #692]	(12670 <.text+0x12670>)
-   123ba:	4bae      	ldr	r3, [pc, #696]	(12674 <.text+0x12674>)
-   123bc:	e014      	b.n	123e8 <__ieee754_rem_pio2+0xfc>
-   123be:	4aae      	ldr	r2, [pc, #696]	(12678 <.text+0x12678>)
-   123c0:	4bae      	ldr	r3, [pc, #696]	(1267c <.text+0x1267c>)
-   123c2:	f002 feef 	bl	151a4 <____adddf3_from_thumb>
-   123c6:	4aae      	ldr	r2, [pc, #696]	(12680 <.text+0x12680>)
-   123c8:	4bae      	ldr	r3, [pc, #696]	(12684 <.text+0x12684>)
-   123ca:	1c04      	adds	r4, r0, #0
-   123cc:	1c0d      	adds	r5, r1, #0
-   123ce:	f002 fee9 	bl	151a4 <____adddf3_from_thumb>
-   123d2:	1c0b      	adds	r3, r1, #0
-   123d4:	9902      	ldr	r1, [sp, #8]
-   123d6:	1c02      	adds	r2, r0, #0
-   123d8:	600a      	str	r2, [r1, #0]
-   123da:	604b      	str	r3, [r1, #4]
-   123dc:	1c20      	adds	r0, r4, #0
-   123de:	1c29      	adds	r1, r5, #0
-   123e0:	f002 fee4 	bl	151ac <____subdf3_from_thumb>
-   123e4:	4aa6      	ldr	r2, [pc, #664]	(12680 <.text+0x12680>)
-   123e6:	4ba7      	ldr	r3, [pc, #668]	(12684 <.text+0x12684>)
-   123e8:	f002 fedc 	bl	151a4 <____adddf3_from_thumb>
-   123ec:	9a02      	ldr	r2, [sp, #8]
-   123ee:	2301      	movs	r3, #1
-   123f0:	425b      	negs	r3, r3
-   123f2:	6090      	str	r0, [r2, #8]
-   123f4:	60d1      	str	r1, [r2, #12]
-   123f6:	e7b1      	b.n	1235c <__ieee754_rem_pio2+0x70>
-   123f8:	4ba3      	ldr	r3, [pc, #652]	(12688 <.text+0x12688>)
-   123fa:	429f      	cmp	r7, r3
-   123fc:	dd00      	ble.n	12400 <__ieee754_rem_pio2+0x114>
-   123fe:	e0dc      	b.n	125ba <__ieee754_rem_pio2+0x2ce>
-   12400:	f000 ffe4 	bl	133cc <fabs>
-   12404:	4aa1      	ldr	r2, [pc, #644]	(1268c <.text+0x1268c>)
-   12406:	4ba2      	ldr	r3, [pc, #648]	(12690 <.text+0x12690>)
-   12408:	1c04      	adds	r4, r0, #0
-   1240a:	1c0d      	adds	r5, r1, #0
-   1240c:	f002 fed2 	bl	151b4 <____muldf3_from_thumb>
-   12410:	4aa0      	ldr	r2, [pc, #640]	(12694 <.text+0x12694>)
-   12412:	4ba1      	ldr	r3, [pc, #644]	(12698 <.text+0x12698>)
-   12414:	f002 fec6 	bl	151a4 <____adddf3_from_thumb>
-   12418:	f002 fed0 	bl	151bc <____fixdfsi_from_thumb>
-   1241c:	9008      	str	r0, [sp, #32]
-   1241e:	f002 febd 	bl	1519c <____floatsidf_from_thumb>
-   12422:	4a9e      	ldr	r2, [pc, #632]	(1269c <.text+0x1269c>)
-   12424:	4b9e      	ldr	r3, [pc, #632]	(126a0 <.text+0x126a0>)
-   12426:	9006      	str	r0, [sp, #24]
-   12428:	9107      	str	r1, [sp, #28]
-   1242a:	f002 fec3 	bl	151b4 <____muldf3_from_thumb>
-   1242e:	1c02      	adds	r2, r0, #0
-   12430:	1c0b      	adds	r3, r1, #0
-   12432:	1c20      	adds	r0, r4, #0
-   12434:	1c29      	adds	r1, r5, #0
-   12436:	f002 feb5 	bl	151a4 <____adddf3_from_thumb>
-   1243a:	4a8d      	ldr	r2, [pc, #564]	(12670 <.text+0x12670>)
-   1243c:	4b8d      	ldr	r3, [pc, #564]	(12674 <.text+0x12674>)
-   1243e:	9004      	str	r0, [sp, #16]
-   12440:	9105      	str	r1, [sp, #20]
-   12442:	9806      	ldr	r0, [sp, #24]
-   12444:	9907      	ldr	r1, [sp, #28]
-   12446:	f002 feb5 	bl	151b4 <____muldf3_from_thumb>
-   1244a:	9c08      	ldr	r4, [sp, #32]
-   1244c:	1c05      	adds	r5, r0, #0
-   1244e:	1c0e      	adds	r6, r1, #0
-   12450:	2c1f      	cmp	r4, #31
-   12452:	dc10      	bgt.n	12476 <__ieee754_rem_pio2+0x18a>
-   12454:	4b93      	ldr	r3, [pc, #588]	(126a4 <.text+0x126a4>)
-   12456:	00a2      	lsls	r2, r4, #2
-   12458:	18d2      	adds	r2, r2, r3
-   1245a:	3a04      	subs	r2, #4
-   1245c:	6813      	ldr	r3, [r2, #0]
-   1245e:	429f      	cmp	r7, r3
-   12460:	d009      	beq.n	12476 <__ieee754_rem_pio2+0x18a>
-   12462:	1c2a      	adds	r2, r5, #0
-   12464:	9804      	ldr	r0, [sp, #16]
-   12466:	9905      	ldr	r1, [sp, #20]
-   12468:	1c33      	adds	r3, r6, #0
-   1246a:	f002 fe9f 	bl	151ac <____subdf3_from_thumb>
-   1246e:	9a02      	ldr	r2, [sp, #8]
-   12470:	6010      	str	r0, [r2, #0]
-   12472:	6051      	str	r1, [r2, #4]
-   12474:	e083      	b.n	1257e <__ieee754_rem_pio2+0x292>
-   12476:	1c33      	adds	r3, r6, #0
-   12478:	9804      	ldr	r0, [sp, #16]
-   1247a:	9905      	ldr	r1, [sp, #20]
-   1247c:	1c2a      	adds	r2, r5, #0
-   1247e:	f002 fe95 	bl	151ac <____subdf3_from_thumb>
-   12482:	9b02      	ldr	r3, [sp, #8]
-   12484:	4c88      	ldr	r4, [pc, #544]	(126a8 <.text+0x126a8>)
-   12486:	6018      	str	r0, [r3, #0]
-   12488:	6059      	str	r1, [r3, #4]
-   1248a:	0d03      	lsrs	r3, r0, #20
-   1248c:	153f      	asrs	r7, r7, #20
-   1248e:	4023      	ands	r3, r4
-   12490:	1afb      	subs	r3, r7, r3
-   12492:	9703      	str	r7, [sp, #12]
-   12494:	2b10      	cmp	r3, #16
-   12496:	dc00      	bgt.n	1249a <__ieee754_rem_pio2+0x1ae>
-   12498:	e071      	b.n	1257e <__ieee754_rem_pio2+0x292>
-   1249a:	4a77      	ldr	r2, [pc, #476]	(12678 <.text+0x12678>)
-   1249c:	4b77      	ldr	r3, [pc, #476]	(1267c <.text+0x1267c>)
-   1249e:	9806      	ldr	r0, [sp, #24]
-   124a0:	9907      	ldr	r1, [sp, #28]
-   124a2:	f002 fe87 	bl	151b4 <____muldf3_from_thumb>
-   124a6:	1c06      	adds	r6, r0, #0
-   124a8:	1c0f      	adds	r7, r1, #0
-   124aa:	1c32      	adds	r2, r6, #0
-   124ac:	1c3b      	adds	r3, r7, #0
-   124ae:	9804      	ldr	r0, [sp, #16]
-   124b0:	9905      	ldr	r1, [sp, #20]
-   124b2:	f002 fe7b 	bl	151ac <____subdf3_from_thumb>
-   124b6:	4a72      	ldr	r2, [pc, #456]	(12680 <.text+0x12680>)
-   124b8:	4b72      	ldr	r3, [pc, #456]	(12684 <.text+0x12684>)
-   124ba:	900b      	str	r0, [sp, #44]
-   124bc:	910c      	str	r1, [sp, #48]
-   124be:	9806      	ldr	r0, [sp, #24]
-   124c0:	9907      	ldr	r1, [sp, #28]
-   124c2:	f002 fe77 	bl	151b4 <____muldf3_from_thumb>
-   124c6:	9a0b      	ldr	r2, [sp, #44]
-   124c8:	9b0c      	ldr	r3, [sp, #48]
-   124ca:	1c04      	adds	r4, r0, #0
-   124cc:	1c0d      	adds	r5, r1, #0
-   124ce:	9804      	ldr	r0, [sp, #16]
-   124d0:	9905      	ldr	r1, [sp, #20]
-   124d2:	f002 fe6b 	bl	151ac <____subdf3_from_thumb>
-   124d6:	1c32      	adds	r2, r6, #0
-   124d8:	1c3b      	adds	r3, r7, #0
-   124da:	f002 fe67 	bl	151ac <____subdf3_from_thumb>
-   124de:	1c02      	adds	r2, r0, #0
-   124e0:	1c0b      	adds	r3, r1, #0
-   124e2:	1c20      	adds	r0, r4, #0
-   124e4:	1c29      	adds	r1, r5, #0
-   124e6:	f002 fe61 	bl	151ac <____subdf3_from_thumb>
-   124ea:	1c05      	adds	r5, r0, #0
-   124ec:	1c0e      	adds	r6, r1, #0
-   124ee:	1c2a      	adds	r2, r5, #0
-   124f0:	1c33      	adds	r3, r6, #0
-   124f2:	980b      	ldr	r0, [sp, #44]
-   124f4:	990c      	ldr	r1, [sp, #48]
-   124f6:	f002 fe59 	bl	151ac <____subdf3_from_thumb>
-   124fa:	9a02      	ldr	r2, [sp, #8]
-   124fc:	4c6a      	ldr	r4, [pc, #424]	(126a8 <.text+0x126a8>)
-   124fe:	6010      	str	r0, [r2, #0]
-   12500:	6051      	str	r1, [r2, #4]
-   12502:	0d03      	lsrs	r3, r0, #20
-   12504:	9903      	ldr	r1, [sp, #12]
-   12506:	4023      	ands	r3, r4
-   12508:	1acb      	subs	r3, r1, r3
-   1250a:	2b31      	cmp	r3, #49
-   1250c:	dc04      	bgt.n	12518 <__ieee754_rem_pio2+0x22c>
-   1250e:	9a0b      	ldr	r2, [sp, #44]
-   12510:	9b0c      	ldr	r3, [sp, #48]
-   12512:	9204      	str	r2, [sp, #16]
-   12514:	9305      	str	r3, [sp, #20]
-   12516:	e032      	b.n	1257e <__ieee754_rem_pio2+0x292>
-   12518:	4a64      	ldr	r2, [pc, #400]	(126ac <.text+0x126ac>)
-   1251a:	4b65      	ldr	r3, [pc, #404]	(126b0 <.text+0x126b0>)
-   1251c:	9806      	ldr	r0, [sp, #24]
-   1251e:	9907      	ldr	r1, [sp, #28]
-   12520:	f002 fe48 	bl	151b4 <____muldf3_from_thumb>
-   12524:	1c06      	adds	r6, r0, #0
-   12526:	1c0f      	adds	r7, r1, #0
-   12528:	1c32      	adds	r2, r6, #0
-   1252a:	1c3b      	adds	r3, r7, #0
-   1252c:	980b      	ldr	r0, [sp, #44]
-   1252e:	990c      	ldr	r1, [sp, #48]
-   12530:	f002 fe3c 	bl	151ac <____subdf3_from_thumb>
-   12534:	4a5f      	ldr	r2, [pc, #380]	(126b4 <.text+0x126b4>)
-   12536:	4b60      	ldr	r3, [pc, #384]	(126b8 <.text+0x126b8>)
-   12538:	9004      	str	r0, [sp, #16]
-   1253a:	9105      	str	r1, [sp, #20]
-   1253c:	9806      	ldr	r0, [sp, #24]
-   1253e:	9907      	ldr	r1, [sp, #28]
-   12540:	f002 fe38 	bl	151b4 <____muldf3_from_thumb>
-   12544:	9a04      	ldr	r2, [sp, #16]
-   12546:	9b05      	ldr	r3, [sp, #20]
-   12548:	1c0d      	adds	r5, r1, #0
-   1254a:	1c04      	adds	r4, r0, #0
-   1254c:	980b      	ldr	r0, [sp, #44]
-   1254e:	990c      	ldr	r1, [sp, #48]
-   12550:	f002 fe2c 	bl	151ac <____subdf3_from_thumb>
-   12554:	1c32      	adds	r2, r6, #0
-   12556:	1c3b      	adds	r3, r7, #0
-   12558:	f002 fe28 	bl	151ac <____subdf3_from_thumb>
-   1255c:	1c02      	adds	r2, r0, #0
-   1255e:	1c0b      	adds	r3, r1, #0
-   12560:	1c20      	adds	r0, r4, #0
-   12562:	1c29      	adds	r1, r5, #0
-   12564:	f002 fe22 	bl	151ac <____subdf3_from_thumb>
-   12568:	1c05      	adds	r5, r0, #0
-   1256a:	1c0e      	adds	r6, r1, #0
-   1256c:	1c33      	adds	r3, r6, #0
-   1256e:	9804      	ldr	r0, [sp, #16]
-   12570:	9905      	ldr	r1, [sp, #20]
-   12572:	1c2a      	adds	r2, r5, #0
-   12574:	f002 fe1a 	bl	151ac <____subdf3_from_thumb>
-   12578:	9b02      	ldr	r3, [sp, #8]
-   1257a:	6018      	str	r0, [r3, #0]
-   1257c:	6059      	str	r1, [r3, #4]
-   1257e:	9c02      	ldr	r4, [sp, #8]
-   12580:	9804      	ldr	r0, [sp, #16]
-   12582:	9905      	ldr	r1, [sp, #20]
-   12584:	6822      	ldr	r2, [r4, #0]
-   12586:	6863      	ldr	r3, [r4, #4]
-   12588:	f002 fe10 	bl	151ac <____subdf3_from_thumb>
-   1258c:	1c2a      	adds	r2, r5, #0
-   1258e:	1c33      	adds	r3, r6, #0
-   12590:	f002 fe0c 	bl	151ac <____subdf3_from_thumb>
-   12594:	9b09      	ldr	r3, [sp, #36]
-   12596:	1c22      	adds	r2, r4, #0
-   12598:	60a0      	str	r0, [r4, #8]
-   1259a:	60e1      	str	r1, [r4, #12]
-   1259c:	2b00      	cmp	r3, #0
-   1259e:	db00      	blt.n	125a2 <__ieee754_rem_pio2+0x2b6>
-   125a0:	e0ad      	b.n	126fe <.text+0x126fe>
-   125a2:	6823      	ldr	r3, [r4, #0]
-   125a4:	2480      	movs	r4, #128
-   125a6:	0624      	lsls	r4, r4, #24
-   125a8:	191b      	adds	r3, r3, r4
-   125aa:	9908      	ldr	r1, [sp, #32]
-   125ac:	6013      	str	r3, [r2, #0]
-   125ae:	6893      	ldr	r3, [r2, #8]
-   125b0:	4249      	negs	r1, r1
-   125b2:	191b      	adds	r3, r3, r4
-   125b4:	6093      	str	r3, [r2, #8]
-   125b6:	9108      	str	r1, [sp, #32]
-   125b8:	e0a1      	b.n	126fe <.text+0x126fe>
-   125ba:	4b40      	ldr	r3, [pc, #256]	(126bc <.text+0x126bc>)
-   125bc:	429f      	cmp	r7, r3
-   125be:	dd0b      	ble.n	125d8 <__ieee754_rem_pio2+0x2ec>
-   125c0:	1c2a      	adds	r2, r5, #0
-   125c2:	1c33      	adds	r3, r6, #0
-   125c4:	f002 fdf2 	bl	151ac <____subdf3_from_thumb>
-   125c8:	9a02      	ldr	r2, [sp, #8]
-   125ca:	2400      	movs	r4, #0
-   125cc:	6090      	str	r0, [r2, #8]
-   125ce:	60d1      	str	r1, [r2, #12]
-   125d0:	6010      	str	r0, [r2, #0]
-   125d2:	6051      	str	r1, [r2, #4]
-   125d4:	9408      	str	r4, [sp, #32]
-   125d6:	e092      	b.n	126fe <.text+0x126fe>
-   125d8:	4939      	ldr	r1, [pc, #228]	(126c0 <.text+0x126c0>)
-   125da:	153a      	asrs	r2, r7, #20
-   125dc:	1851      	adds	r1, r2, r1
-   125de:	050a      	lsls	r2, r1, #20
-   125e0:	1abb      	subs	r3, r7, r2
-   125e2:	1c18      	adds	r0, r3, #0
-   125e4:	910a      	str	r1, [sp, #40]
-   125e6:	1c31      	adds	r1, r6, #0
-   125e8:	1c1c      	adds	r4, r3, #0
-   125ea:	f002 fde7 	bl	151bc <____fixdfsi_from_thumb>
-   125ee:	f002 fdd5 	bl	1519c <____floatsidf_from_thumb>
-   125f2:	1c02      	adds	r2, r0, #0
-   125f4:	1c0b      	adds	r3, r1, #0
-   125f6:	1c20      	adds	r0, r4, #0
-   125f8:	1c31      	adds	r1, r6, #0
-   125fa:	920d      	str	r2, [sp, #52]
-   125fc:	930e      	str	r3, [sp, #56]
-   125fe:	f002 fdd5 	bl	151ac <____subdf3_from_thumb>
-   12602:	4a30      	ldr	r2, [pc, #192]	(126c4 <.text+0x126c4>)
-   12604:	4b30      	ldr	r3, [pc, #192]	(126c8 <.text+0x126c8>)
-   12606:	f002 fdd5 	bl	151b4 <____muldf3_from_thumb>
-   1260a:	1c0d      	adds	r5, r1, #0
-   1260c:	1c04      	adds	r4, r0, #0
-   1260e:	f002 fdd5 	bl	151bc <____fixdfsi_from_thumb>
-   12612:	f002 fdc3 	bl	1519c <____floatsidf_from_thumb>
-   12616:	1c02      	adds	r2, r0, #0
-   12618:	1c0b      	adds	r3, r1, #0
-   1261a:	1c20      	adds	r0, r4, #0
-   1261c:	1c29      	adds	r1, r5, #0
-   1261e:	920f      	str	r2, [sp, #60]
-   12620:	9310      	str	r3, [sp, #64]
-   12622:	f002 fdc3 	bl	151ac <____subdf3_from_thumb>
-   12626:	4a27      	ldr	r2, [pc, #156]	(126c4 <.text+0x126c4>)
-   12628:	4b27      	ldr	r3, [pc, #156]	(126c8 <.text+0x126c8>)
-   1262a:	f002 fdc3 	bl	151b4 <____muldf3_from_thumb>
-   1262e:	9011      	str	r0, [sp, #68]
-   12630:	9112      	str	r1, [sp, #72]
-   12632:	2503      	movs	r5, #3
-   12634:	1e6c      	subs	r4, r5, #1
-   12636:	ae0d      	add	r6, sp, #52
-   12638:	00e3      	lsls	r3, r4, #3
-   1263a:	18f3      	adds	r3, r6, r3
-   1263c:	6818      	ldr	r0, [r3, #0]
-   1263e:	6859      	ldr	r1, [r3, #4]
-   12640:	4a05      	ldr	r2, [pc, #20]	(12658 <.text+0x12658>)
-   12642:	4b06      	ldr	r3, [pc, #24]	(1265c <.text+0x1265c>)
-   12644:	f002 fda6 	bl	15194 <____eqdf2_from_thumb>
-   12648:	2800      	cmp	r0, #0
-   1264a:	d13f      	bne.n	126cc <.text+0x126cc>
-   1264c:	1c25      	adds	r5, r4, #0
-   1264e:	e7f1      	b.n	12634 <__ieee754_rem_pio2+0x348>
-   12650:	ffff 7fff 	undefined
-   12654:	21fb      	movs	r1, #251
-   12656:	3fe9      	subs	r7, #233
-	...
-   12660:	d97b      	bls.n	1275a <__ieee754_sqrt+0x4e>
-   12662:	4002      	ands	r2, r0
-   12664:	21fb      	movs	r1, #251
-   12666:	3ff9      	subs	r7, #249
-   12668:	0000      	lsls	r0, r0, #0
-   1266a:	5440      	strb	r0, [r0, r1]
-   1266c:	21fb      	movs	r1, #251
-   1266e:	3ff9      	subs	r7, #249
-   12670:	b461      	push	{r0, r5, r6}
-   12672:	3dd0      	subs	r5, #208
-   12674:	6331      	str	r1, [r6, #48]
-   12676:	1a62      	subs	r2, r4, r1
-   12678:	b461      	push	{r0, r5, r6}
-   1267a:	3dd0      	subs	r5, #208
-   1267c:	0000      	lsls	r0, r0, #0
-   1267e:	1a60      	subs	r0, r4, r1
-   12680:	198a      	adds	r2, r1, r6
-   12682:	3ba3      	subs	r3, #163
-   12684:	7073      	strb	r3, [r6, #1]
-   12686:	2e03      	cmp	r6, #3
-   12688:	21fb      	movs	r1, #251
-   1268a:	4139      	asrs	r1, r7
-   1268c:	5f30      	ldrsh	r0, [r6, r4]
-   1268e:	3fe4      	subs	r7, #228
-   12690:	c883      	ldmia	r0!, {r0, r1, r7}
-   12692:	6dc9      	ldr	r1, [r1, #92]
-   12694:	0000      	lsls	r0, r0, #0
-   12696:	3fe0      	subs	r7, #224
-   12698:	0000      	lsls	r0, r0, #0
-   1269a:	0000      	lsls	r0, r0, #0
-   1269c:	21fb      	movs	r1, #251
-   1269e:	bff9      	ittee	<und>
-   126a0:	0000      	lsls	r0, r0, #0
-   126a2:	5440      	strb	r0, [r0, r1]
-   126a4:	56b0      	ldrsb	r0, [r6, r2]
-   126a6:	0001      	lsls	r1, r0, #0
-   126a8:	07ff      	lsls	r7, r7, #31
-   126aa:	0000      	lsls	r0, r0, #0
-   126ac:	198a      	adds	r2, r1, r6
-   126ae:	3ba3      	subs	r3, #163
-   126b0:	0000      	lsls	r0, r0, #0
-   126b2:	2e00      	cmp	r6, #0
-   126b4:	839a      	strh	r2, [r3, #28]
-   126b6:	397b      	subs	r1, #123
-   126b8:	49c1      	ldr	r1, [pc, #772]	(129c0 <__kernel_cos+0x114>)
-   126ba:	2520      	movs	r5, #32
-   126bc:	ffff 7fef 	undefined
-   126c0:	fbea ffff 	undefined
-   126c4:	0000      	lsls	r0, r0, #0
-   126c6:	4170      	adcs	r0, r6
-   126c8:	0000      	lsls	r0, r0, #0
-   126ca:	0000      	lsls	r0, r0, #0
-   126cc:	2302      	movs	r3, #2
-   126ce:	9300      	str	r3, [sp, #0]
-   126d0:	4b0d      	ldr	r3, [pc, #52]	(12708 <.text+0x12708>)
-   126d2:	9a0a      	ldr	r2, [sp, #40]
-   126d4:	9301      	str	r3, [sp, #4]
-   126d6:	1c30      	adds	r0, r6, #0
-   126d8:	9902      	ldr	r1, [sp, #8]
-   126da:	1c2b      	adds	r3, r5, #0
-   126dc:	f000 fa18 	bl	12b10 <__kernel_rem_pio2>
-   126e0:	9a09      	ldr	r2, [sp, #36]
-   126e2:	9008      	str	r0, [sp, #32]
-   126e4:	2a00      	cmp	r2, #0
-   126e6:	da0a      	bge.n	126fe <.text+0x126fe>
-   126e8:	9c02      	ldr	r4, [sp, #8]
-   126ea:	2180      	movs	r1, #128
-   126ec:	6823      	ldr	r3, [r4, #0]
-   126ee:	0609      	lsls	r1, r1, #24
-   126f0:	185b      	adds	r3, r3, r1
-   126f2:	6023      	str	r3, [r4, #0]
-   126f4:	68a3      	ldr	r3, [r4, #8]
-   126f6:	4242      	negs	r2, r0
-   126f8:	185b      	adds	r3, r3, r1
-   126fa:	60a3      	str	r3, [r4, #8]
-   126fc:	9208      	str	r2, [sp, #32]
-   126fe:	9808      	ldr	r0, [sp, #32]
-   12700:	b013      	add	sp, #76
-   12702:	bcf0      	pop	{r4, r5, r6, r7}
-   12704:	bc02      	pop	{r1}
-   12706:	4708      	bx	r1
-   12708:	5730      	ldrsb	r0, [r6, r4]
-   1270a:	0001      	lsls	r1, r0, #0
-
-0001270c <__ieee754_sqrt>:
-   1270c:	b5f0      	push	{r4, r5, r6, r7, lr}
-   1270e:	2300      	movs	r3, #0
-   12710:	2400      	movs	r4, #0
-   12712:	1c05      	adds	r5, r0, #0
-   12714:	b085      	sub	sp, #20
-   12716:	4a60      	ldr	r2, [pc, #384]	(12898 <.text+0x12898>)
-   12718:	9300      	str	r3, [sp, #0]
-   1271a:	9401      	str	r4, [sp, #4]
-   1271c:	1c2b      	adds	r3, r5, #0
-   1271e:	1c0e      	adds	r6, r1, #0
-   12720:	4013      	ands	r3, r2
-   12722:	1c01      	adds	r1, r0, #0
-   12724:	1c30      	adds	r0, r6, #0
-   12726:	4293      	cmp	r3, r2
-   12728:	d10c      	bne.n	12744 <__ieee754_sqrt+0x38>
-   1272a:	1c2a      	adds	r2, r5, #0
-   1272c:	1c33      	adds	r3, r6, #0
-   1272e:	1c28      	adds	r0, r5, #0
-   12730:	1c31      	adds	r1, r6, #0
-   12732:	f002 fd3f 	bl	151b4 <____muldf3_from_thumb>
-   12736:	1c02      	adds	r2, r0, #0
-   12738:	1c0b      	adds	r3, r1, #0
-   1273a:	1c28      	adds	r0, r5, #0
-   1273c:	1c31      	adds	r1, r6, #0
-   1273e:	f002 fd31 	bl	151a4 <____adddf3_from_thumb>
-   12742:	e012      	b.n	1276a <__ieee754_sqrt+0x5e>
-   12744:	2d00      	cmp	r5, #0
-   12746:	dc13      	bgt.n	12770 <__ieee754_sqrt+0x64>
-   12748:	4b54      	ldr	r3, [pc, #336]	(1289c <.text+0x1289c>)
-   1274a:	402b      	ands	r3, r5
-   1274c:	4333      	orrs	r3, r6
-   1274e:	d100      	bne.n	12752 <__ieee754_sqrt+0x46>
-   12750:	e09b      	b.n	1288a <__ieee754_sqrt+0x17e>
-   12752:	2d00      	cmp	r5, #0
-   12754:	d00c      	beq.n	12770 <__ieee754_sqrt+0x64>
-   12756:	1c2a      	adds	r2, r5, #0
-   12758:	1c33      	adds	r3, r6, #0
-   1275a:	1c28      	adds	r0, r5, #0
-   1275c:	1c31      	adds	r1, r6, #0
-   1275e:	f002 fd25 	bl	151ac <____subdf3_from_thumb>
-   12762:	1c02      	adds	r2, r0, #0
-   12764:	1c0b      	adds	r3, r1, #0
-   12766:	f002 fd2d 	bl	151c4 <____divdf3_from_thumb>
-   1276a:	1c05      	adds	r5, r0, #0
-   1276c:	1c0e      	adds	r6, r1, #0
-   1276e:	e08c      	b.n	1288a <__ieee754_sqrt+0x17e>
-   12770:	150a      	asrs	r2, r1, #20
-   12772:	2a00      	cmp	r2, #0
-   12774:	d003      	beq.n	1277e <__ieee754_sqrt+0x72>
-   12776:	e012      	b.n	1279e <__ieee754_sqrt+0x92>
-   12778:	0ac1      	lsrs	r1, r0, #11
-   1277a:	3a15      	subs	r2, #21
-   1277c:	0540      	lsls	r0, r0, #21
-   1277e:	2900      	cmp	r1, #0
-   12780:	d0fa      	beq.n	12778 <__ieee754_sqrt+0x6c>
-   12782:	2500      	movs	r5, #0
-   12784:	e001      	b.n	1278a <__ieee754_sqrt+0x7e>
-   12786:	0049      	lsls	r1, r1, #1
-   12788:	3501      	adds	r5, #1
-   1278a:	02cc      	lsls	r4, r1, #11
-   1278c:	d5fb      	bpl.n	12786 <__ieee754_sqrt+0x7a>
-   1278e:	1b53      	subs	r3, r2, r5
-   12790:	1c5a      	adds	r2, r3, #1
-   12792:	2320      	movs	r3, #32
-   12794:	1c04      	adds	r4, r0, #0
-   12796:	1b5b      	subs	r3, r3, r5
-   12798:	40dc      	lsrs	r4, r3
-   1279a:	4321      	orrs	r1, r4
-   1279c:	40a8      	lsls	r0, r5
-   1279e:	4b40      	ldr	r3, [pc, #256]	(128a0 <.text+0x128a0>)
-   127a0:	18d3      	adds	r3, r2, r3
-   127a2:	9303      	str	r3, [sp, #12]
-   127a4:	4b3f      	ldr	r3, [pc, #252]	(128a4 <.text+0x128a4>)
-   127a6:	1c0a      	adds	r2, r1, #0
-   127a8:	401a      	ands	r2, r3
-   127aa:	9c03      	ldr	r4, [sp, #12]
-   127ac:	2380      	movs	r3, #128
-   127ae:	035b      	lsls	r3, r3, #13
-   127b0:	431a      	orrs	r2, r3
-   127b2:	07e4      	lsls	r4, r4, #31
-   127b4:	d503      	bpl.n	127be <__ieee754_sqrt+0xb2>
-   127b6:	0fc3      	lsrs	r3, r0, #31
-   127b8:	18d3      	adds	r3, r2, r3
-   127ba:	18d2      	adds	r2, r2, r3
-   127bc:	0040      	lsls	r0, r0, #1
-   127be:	0fc3      	lsrs	r3, r0, #31
-   127c0:	2400      	movs	r4, #0
-   127c2:	18d3      	adds	r3, r2, r3
-   127c4:	2180      	movs	r1, #128
-   127c6:	9404      	str	r4, [sp, #16]
-   127c8:	18d2      	adds	r2, r2, r3
-   127ca:	0045      	lsls	r5, r0, #1
-   127cc:	0389      	lsls	r1, r1, #14
-   127ce:	2600      	movs	r6, #0
-   127d0:	1863      	adds	r3, r4, r1
-   127d2:	4293      	cmp	r3, r2
-   127d4:	dc04      	bgt.n	127e0 <__ieee754_sqrt+0xd4>
-   127d6:	9804      	ldr	r0, [sp, #16]
-   127d8:	1840      	adds	r0, r0, r1
-   127da:	9004      	str	r0, [sp, #16]
-   127dc:	185c      	adds	r4, r3, r1
-   127de:	1ad2      	subs	r2, r2, r3
-   127e0:	0feb      	lsrs	r3, r5, #31
-   127e2:	2080      	movs	r0, #128
-   127e4:	18d3      	adds	r3, r2, r3
-   127e6:	3601      	adds	r6, #1
-   127e8:	0600      	lsls	r0, r0, #24
-   127ea:	18d2      	adds	r2, r2, r3
-   127ec:	006d      	lsls	r5, r5, #1
-   127ee:	0849      	lsrs	r1, r1, #1
-   127f0:	2e16      	cmp	r6, #22
-   127f2:	d1ed      	bne.n	127d0 <__ieee754_sqrt+0xc4>
-   127f4:	2300      	movs	r3, #0
-   127f6:	2600      	movs	r6, #0
-   127f8:	9302      	str	r3, [sp, #8]
-   127fa:	1c07      	adds	r7, r0, #0
-   127fc:	46b4      	mov	ip, r6
-   127fe:	9b02      	ldr	r3, [sp, #8]
-   12800:	19d8      	adds	r0, r3, r7
-   12802:	4294      	cmp	r4, r2
-   12804:	db03      	blt.n	1280e <__ieee754_sqrt+0x102>
-   12806:	4294      	cmp	r4, r2
-   12808:	d116      	bne.n	12838 <__ieee754_sqrt+0x12c>
-   1280a:	42a8      	cmp	r0, r5
-   1280c:	d814      	bhi.n	12838 <__ieee754_sqrt+0x12c>
-   1280e:	19c3      	adds	r3, r0, r7
-   12810:	9302      	str	r3, [sp, #8]
-   12812:	2380      	movs	r3, #128
-   12814:	061b      	lsls	r3, r3, #24
-   12816:	1c01      	adds	r1, r0, #0
-   12818:	4019      	ands	r1, r3
-   1281a:	4299      	cmp	r1, r3
-   1281c:	d104      	bne.n	12828 <__ieee754_sqrt+0x11c>
-   1281e:	9b02      	ldr	r3, [sp, #8]
-   12820:	420b      	tst	r3, r1
-   12822:	d101      	bne.n	12828 <__ieee754_sqrt+0x11c>
-   12824:	1c63      	adds	r3, r4, #1
-   12826:	e000      	b.n	1282a <__ieee754_sqrt+0x11e>
-   12828:	1c23      	adds	r3, r4, #0
-   1282a:	1b12      	subs	r2, r2, r4
-   1282c:	4285      	cmp	r5, r0
-   1282e:	d200      	bcs.n	12832 <__ieee754_sqrt+0x126>
-   12830:	3a01      	subs	r2, #1
-   12832:	1a2d      	subs	r5, r5, r0
-   12834:	19f6      	adds	r6, r6, r7
-   12836:	1c1c      	adds	r4, r3, #0
-   12838:	0feb      	lsrs	r3, r5, #31
-   1283a:	2001      	movs	r0, #1
-   1283c:	18d3      	adds	r3, r2, r3
-   1283e:	4484      	add	ip, r0
-   12840:	18d2      	adds	r2, r2, r3
-   12842:	4663      	mov	r3, ip
-   12844:	006d      	lsls	r5, r5, #1
-   12846:	087f      	lsrs	r7, r7, #1
-   12848:	2b20      	cmp	r3, #32
-   1284a:	d1d8      	bne.n	127fe <__ieee754_sqrt+0xf2>
-   1284c:	432a      	orrs	r2, r5
-   1284e:	d009      	beq.n	12864 <__ieee754_sqrt+0x158>
-   12850:	1c74      	adds	r4, r6, #1
-   12852:	d104      	bne.n	1285e <__ieee754_sqrt+0x152>
-   12854:	9804      	ldr	r0, [sp, #16]
-   12856:	2600      	movs	r6, #0
-   12858:	3001      	adds	r0, #1
-   1285a:	9004      	str	r0, [sp, #16]
-   1285c:	e002      	b.n	12864 <__ieee754_sqrt+0x158>
-   1285e:	2301      	movs	r3, #1
-   12860:	4033      	ands	r3, r6
-   12862:	18f6      	adds	r6, r6, r3
-   12864:	9b04      	ldr	r3, [sp, #16]
-   12866:	0871      	lsrs	r1, r6, #1
-   12868:	07db      	lsls	r3, r3, #31
-   1286a:	d502      	bpl.n	12872 <__ieee754_sqrt+0x166>
-   1286c:	2380      	movs	r3, #128
-   1286e:	061b      	lsls	r3, r3, #24
-   12870:	4319      	orrs	r1, r3
-   12872:	9c04      	ldr	r4, [sp, #16]
-   12874:	1062      	asrs	r2, r4, #1
-   12876:	9c03      	ldr	r4, [sp, #12]
-   12878:	480b      	ldr	r0, [pc, #44]	(128a8 <.text+0x128a8>)
-   1287a:	1063      	asrs	r3, r4, #1
-   1287c:	1812      	adds	r2, r2, r0
-   1287e:	051b      	lsls	r3, r3, #20
-   12880:	18d3      	adds	r3, r2, r3
-   12882:	9300      	str	r3, [sp, #0]
-   12884:	9101      	str	r1, [sp, #4]
-   12886:	9d00      	ldr	r5, [sp, #0]
-   12888:	9e01      	ldr	r6, [sp, #4]
-   1288a:	1c28      	adds	r0, r5, #0
-   1288c:	1c31      	adds	r1, r6, #0
-   1288e:	b005      	add	sp, #20
-   12890:	bcf0      	pop	{r4, r5, r6, r7}
-   12892:	bc04      	pop	{r2}
-   12894:	4710      	bx	r2
-   12896:	0000      	lsls	r0, r0, #0
-   12898:	0000      	lsls	r0, r0, #0
-   1289a:	7ff0      	ldrb	r0, [r6, #31]
-   1289c:	ffff 7fff 	undefined
-   128a0:	fc01 ffff 	stc2	15, cr15, [r1], {255}
-   128a4:	ffff 000f 	vaddl.u<illegal width 64>	q8, d15, d15
-   128a8:	0000      	lsls	r0, r0, #0
-   128aa:	3fe0      	subs	r7, #224
-
-000128ac <__kernel_cos>:
-   128ac:	b5f0      	push	{r4, r5, r6, r7, lr}
-   128ae:	b089      	sub	sp, #36
-   128b0:	9202      	str	r2, [sp, #8]
-   128b2:	9303      	str	r3, [sp, #12]
-   128b4:	4a7f      	ldr	r2, [pc, #508]	(12ab4 <.text+0x12ab4>)
-   128b6:	4b80      	ldr	r3, [pc, #512]	(12ab8 <.text+0x12ab8>)
-   128b8:	4002      	ands	r2, r0
-   128ba:	9004      	str	r0, [sp, #16]
-   128bc:	9105      	str	r1, [sp, #20]
-   128be:	9208      	str	r2, [sp, #32]
-   128c0:	429a      	cmp	r2, r3
-   128c2:	dc07      	bgt.n	128d4 <__kernel_cos+0x28>
-   128c4:	f002 fc7a 	bl	151bc <____fixdfsi_from_thumb>
-   128c8:	2800      	cmp	r0, #0
-   128ca:	d000      	beq.n	128ce <__kernel_cos+0x22>
-   128cc:	e0ad      	b.n	12a2a <__kernel_cos+0x17e>
-   128ce:	487b      	ldr	r0, [pc, #492]	(12abc <.text+0x12abc>)
-   128d0:	497b      	ldr	r1, [pc, #492]	(12ac0 <.text+0x12ac0>)
-   128d2:	e0eb      	b.n	12aac <__kernel_cos+0x200>
-   128d4:	9804      	ldr	r0, [sp, #16]
-   128d6:	9905      	ldr	r1, [sp, #20]
-   128d8:	1c02      	adds	r2, r0, #0
-   128da:	1c0b      	adds	r3, r1, #0
-   128dc:	f002 fc6a 	bl	151b4 <____muldf3_from_thumb>
-   128e0:	4a78      	ldr	r2, [pc, #480]	(12ac4 <.text+0x12ac4>)
-   128e2:	4b79      	ldr	r3, [pc, #484]	(12ac8 <.text+0x12ac8>)
-   128e4:	1c04      	adds	r4, r0, #0
-   128e6:	1c0d      	adds	r5, r1, #0
-   128e8:	f002 fc64 	bl	151b4 <____muldf3_from_thumb>
-   128ec:	4a77      	ldr	r2, [pc, #476]	(12acc <.text+0x12acc>)
-   128ee:	4b78      	ldr	r3, [pc, #480]	(12ad0 <.text+0x12ad0>)
-   128f0:	f002 fc58 	bl	151a4 <____adddf3_from_thumb>
-   128f4:	1c02      	adds	r2, r0, #0
-   128f6:	1c0b      	adds	r3, r1, #0
-   128f8:	1c20      	adds	r0, r4, #0
-   128fa:	1c29      	adds	r1, r5, #0
-   128fc:	f002 fc5a 	bl	151b4 <____muldf3_from_thumb>
-   12900:	4a74      	ldr	r2, [pc, #464]	(12ad4 <.text+0x12ad4>)
-   12902:	4b75      	ldr	r3, [pc, #468]	(12ad8 <.text+0x12ad8>)
-   12904:	f002 fc52 	bl	151ac <____subdf3_from_thumb>
-   12908:	1c02      	adds	r2, r0, #0
-   1290a:	1c0b      	adds	r3, r1, #0
-   1290c:	1c20      	adds	r0, r4, #0
-   1290e:	1c29      	adds	r1, r5, #0
-   12910:	f002 fc50 	bl	151b4 <____muldf3_from_thumb>
-   12914:	4a71      	ldr	r2, [pc, #452]	(12adc <.text+0x12adc>)
-   12916:	4b72      	ldr	r3, [pc, #456]	(12ae0 <.text+0x12ae0>)
-   12918:	f002 fc44 	bl	151a4 <____adddf3_from_thumb>
-   1291c:	1c02      	adds	r2, r0, #0
-   1291e:	1c0b      	adds	r3, r1, #0
-   12920:	1c20      	adds	r0, r4, #0
-   12922:	1c29      	adds	r1, r5, #0
-   12924:	f002 fc46 	bl	151b4 <____muldf3_from_thumb>
-   12928:	4a6e      	ldr	r2, [pc, #440]	(12ae4 <.text+0x12ae4>)
-   1292a:	4b6f      	ldr	r3, [pc, #444]	(12ae8 <.text+0x12ae8>)
-   1292c:	f002 fc3e 	bl	151ac <____subdf3_from_thumb>
-   12930:	1c02      	adds	r2, r0, #0
-   12932:	1c0b      	adds	r3, r1, #0
-   12934:	1c20      	adds	r0, r4, #0
-   12936:	1c29      	adds	r1, r5, #0
-   12938:	f002 fc3c 	bl	151b4 <____muldf3_from_thumb>
-   1293c:	4a6b      	ldr	r2, [pc, #428]	(12aec <.text+0x12aec>)
-   1293e:	4b6c      	ldr	r3, [pc, #432]	(12af0 <.text+0x12af0>)
-   12940:	f002 fc30 	bl	151a4 <____adddf3_from_thumb>
-   12944:	1c02      	adds	r2, r0, #0
-   12946:	1c0b      	adds	r3, r1, #0
-   12948:	1c20      	adds	r0, r4, #0
-   1294a:	1c29      	adds	r1, r5, #0
-   1294c:	f002 fc32 	bl	151b4 <____muldf3_from_thumb>
-   12950:	4b68      	ldr	r3, [pc, #416]	(12af4 <.text+0x12af4>)
-   12952:	9a08      	ldr	r2, [sp, #32]
-   12954:	9006      	str	r0, [sp, #24]
-   12956:	9107      	str	r1, [sp, #28]
-   12958:	429a      	cmp	r2, r3
-   1295a:	dc26      	bgt.n	129aa <__kernel_cos+0xfe>
-   1295c:	1c20      	adds	r0, r4, #0
-   1295e:	1c29      	adds	r1, r5, #0
-   12960:	4a65      	ldr	r2, [pc, #404]	(12af8 <.text+0x12af8>)
-   12962:	4b66      	ldr	r3, [pc, #408]	(12afc <.text+0x12afc>)
-   12964:	f002 fc26 	bl	151b4 <____muldf3_from_thumb>
-   12968:	9a06      	ldr	r2, [sp, #24]
-   1296a:	9b07      	ldr	r3, [sp, #28]
-   1296c:	1c06      	adds	r6, r0, #0
-   1296e:	1c0f      	adds	r7, r1, #0
-   12970:	1c20      	adds	r0, r4, #0
-   12972:	1c29      	adds	r1, r5, #0
-   12974:	f002 fc1e 	bl	151b4 <____muldf3_from_thumb>
-   12978:	9a02      	ldr	r2, [sp, #8]
-   1297a:	9b03      	ldr	r3, [sp, #12]
-   1297c:	1c04      	adds	r4, r0, #0
-   1297e:	1c0d      	adds	r5, r1, #0
-   12980:	9804      	ldr	r0, [sp, #16]
-   12982:	9905      	ldr	r1, [sp, #20]
-   12984:	f002 fc16 	bl	151b4 <____muldf3_from_thumb>
-   12988:	1c02      	adds	r2, r0, #0
-   1298a:	1c0b      	adds	r3, r1, #0
-   1298c:	1c20      	adds	r0, r4, #0
-   1298e:	1c29      	adds	r1, r5, #0
-   12990:	f002 fc0c 	bl	151ac <____subdf3_from_thumb>
-   12994:	1c02      	adds	r2, r0, #0
-   12996:	1c0b      	adds	r3, r1, #0
-   12998:	1c30      	adds	r0, r6, #0
-   1299a:	1c39      	adds	r1, r7, #0
-   1299c:	f002 fc06 	bl	151ac <____subdf3_from_thumb>
-   129a0:	1c02      	adds	r2, r0, #0
-   129a2:	1c0b      	adds	r3, r1, #0
-   129a4:	4845      	ldr	r0, [pc, #276]	(12abc <.text+0x12abc>)
-   129a6:	4946      	ldr	r1, [pc, #280]	(12ac0 <.text+0x12ac0>)
-   129a8:	e03c      	b.n	12a24 <__kernel_cos+0x178>
-   129aa:	4b55      	ldr	r3, [pc, #340]	(12b00 <.text+0x12b00>)
-   129ac:	9a08      	ldr	r2, [sp, #32]
-   129ae:	429a      	cmp	r2, r3
-   129b0:	dd02      	ble.n	129b8 <__kernel_cos+0x10c>
-   129b2:	4e54      	ldr	r6, [pc, #336]	(12b04 <.text+0x12b04>)
-   129b4:	4f54      	ldr	r7, [pc, #336]	(12b08 <.text+0x12b08>)
-   129b6:	e003      	b.n	129c0 <__kernel_cos+0x114>
-   129b8:	9b08      	ldr	r3, [sp, #32]
-   129ba:	4a54      	ldr	r2, [pc, #336]	(12b0c <.text+0x12b0c>)
-   129bc:	2700      	movs	r7, #0
-   129be:	189e      	adds	r6, r3, r2
-   129c0:	1c32      	adds	r2, r6, #0
-   129c2:	1c3b      	adds	r3, r7, #0
-   129c4:	483d      	ldr	r0, [pc, #244]	(12abc <.text+0x12abc>)
-   129c6:	493e      	ldr	r1, [pc, #248]	(12ac0 <.text+0x12ac0>)
-   129c8:	f002 fbf0 	bl	151ac <____subdf3_from_thumb>
-   129cc:	4a4a      	ldr	r2, [pc, #296]	(12af8 <.text+0x12af8>)
-   129ce:	4b4b      	ldr	r3, [pc, #300]	(12afc <.text+0x12afc>)
-   129d0:	9000      	str	r0, [sp, #0]
-   129d2:	9101      	str	r1, [sp, #4]
-   129d4:	1c20      	adds	r0, r4, #0
-   129d6:	1c29      	adds	r1, r5, #0
-   129d8:	f002 fbec 	bl	151b4 <____muldf3_from_thumb>
-   129dc:	1c32      	adds	r2, r6, #0
-   129de:	1c3b      	adds	r3, r7, #0
-   129e0:	f002 fbe4 	bl	151ac <____subdf3_from_thumb>
-   129e4:	9a06      	ldr	r2, [sp, #24]
-   129e6:	9b07      	ldr	r3, [sp, #28]
-   129e8:	1c06      	adds	r6, r0, #0
-   129ea:	1c0f      	adds	r7, r1, #0
-   129ec:	1c20      	adds	r0, r4, #0
-   129ee:	1c29      	adds	r1, r5, #0
-   129f0:	f002 fbe0 	bl	151b4 <____muldf3_from_thumb>
-   129f4:	9a02      	ldr	r2, [sp, #8]
-   129f6:	9b03      	ldr	r3, [sp, #12]
-   129f8:	1c04      	adds	r4, r0, #0
-   129fa:	1c0d      	adds	r5, r1, #0
-   129fc:	9804      	ldr	r0, [sp, #16]
-   129fe:	9905      	ldr	r1, [sp, #20]
-   12a00:	f002 fbd8 	bl	151b4 <____muldf3_from_thumb>
-   12a04:	1c02      	adds	r2, r0, #0
-   12a06:	1c0b      	adds	r3, r1, #0
-   12a08:	1c20      	adds	r0, r4, #0
-   12a0a:	1c29      	adds	r1, r5, #0
-   12a0c:	f002 fbce 	bl	151ac <____subdf3_from_thumb>
-   12a10:	1c02      	adds	r2, r0, #0
-   12a12:	1c0b      	adds	r3, r1, #0
-   12a14:	1c30      	adds	r0, r6, #0
-   12a16:	1c39      	adds	r1, r7, #0
-   12a18:	f002 fbc8 	bl	151ac <____subdf3_from_thumb>
-   12a1c:	1c02      	adds	r2, r0, #0
-   12a1e:	1c0b      	adds	r3, r1, #0
-   12a20:	9800      	ldr	r0, [sp, #0]
-   12a22:	9901      	ldr	r1, [sp, #4]
-   12a24:	f002 fbc2 	bl	151ac <____subdf3_from_thumb>
-   12a28:	e040      	b.n	12aac <__kernel_cos+0x200>
-   12a2a:	9804      	ldr	r0, [sp, #16]
-   12a2c:	9905      	ldr	r1, [sp, #20]
-   12a2e:	1c02      	adds	r2, r0, #0
-   12a30:	1c0b      	adds	r3, r1, #0
-   12a32:	f002 fbbf 	bl	151b4 <____muldf3_from_thumb>
-   12a36:	4a23      	ldr	r2, [pc, #140]	(12ac4 <.text+0x12ac4>)
-   12a38:	4b23      	ldr	r3, [pc, #140]	(12ac8 <.text+0x12ac8>)
-   12a3a:	1c04      	adds	r4, r0, #0
-   12a3c:	1c0d      	adds	r5, r1, #0
-   12a3e:	f002 fbb9 	bl	151b4 <____muldf3_from_thumb>
-   12a42:	4a22      	ldr	r2, [pc, #136]	(12acc <.text+0x12acc>)
-   12a44:	4b22      	ldr	r3, [pc, #136]	(12ad0 <.text+0x12ad0>)
-   12a46:	f002 fbad 	bl	151a4 <____adddf3_from_thumb>
-   12a4a:	1c02      	adds	r2, r0, #0
-   12a4c:	1c0b      	adds	r3, r1, #0
-   12a4e:	1c20      	adds	r0, r4, #0
-   12a50:	1c29      	adds	r1, r5, #0
-   12a52:	f002 fbaf 	bl	151b4 <____muldf3_from_thumb>
-   12a56:	4a1f      	ldr	r2, [pc, #124]	(12ad4 <.text+0x12ad4>)
-   12a58:	4b1f      	ldr	r3, [pc, #124]	(12ad8 <.text+0x12ad8>)
-   12a5a:	f002 fba7 	bl	151ac <____subdf3_from_thumb>
-   12a5e:	1c02      	adds	r2, r0, #0
-   12a60:	1c0b      	adds	r3, r1, #0
-   12a62:	1c20      	adds	r0, r4, #0
-   12a64:	1c29      	adds	r1, r5, #0
-   12a66:	f002 fba5 	bl	151b4 <____muldf3_from_thumb>
-   12a6a:	4a1c      	ldr	r2, [pc, #112]	(12adc <.text+0x12adc>)
-   12a6c:	4b1c      	ldr	r3, [pc, #112]	(12ae0 <.text+0x12ae0>)
-   12a6e:	f002 fb99 	bl	151a4 <____adddf3_from_thumb>
-   12a72:	1c02      	adds	r2, r0, #0
-   12a74:	1c0b      	adds	r3, r1, #0
-   12a76:	1c20      	adds	r0, r4, #0
-   12a78:	1c29      	adds	r1, r5, #0
-   12a7a:	f002 fb9b 	bl	151b4 <____muldf3_from_thumb>
-   12a7e:	4a19      	ldr	r2, [pc, #100]	(12ae4 <.text+0x12ae4>)
-   12a80:	4b19      	ldr	r3, [pc, #100]	(12ae8 <.text+0x12ae8>)
-   12a82:	f002 fb93 	bl	151ac <____subdf3_from_thumb>
-   12a86:	1c02      	adds	r2, r0, #0
-   12a88:	1c0b      	adds	r3, r1, #0
-   12a8a:	1c20      	adds	r0, r4, #0
-   12a8c:	1c29      	adds	r1, r5, #0
-   12a8e:	f002 fb91 	bl	151b4 <____muldf3_from_thumb>
-   12a92:	4a16      	ldr	r2, [pc, #88]	(12aec <.text+0x12aec>)
-   12a94:	4b16      	ldr	r3, [pc, #88]	(12af0 <.text+0x12af0>)
-   12a96:	f002 fb85 	bl	151a4 <____adddf3_from_thumb>
-   12a9a:	1c02      	adds	r2, r0, #0
-   12a9c:	1c0b      	adds	r3, r1, #0
-   12a9e:	1c20      	adds	r0, r4, #0
-   12aa0:	1c29      	adds	r1, r5, #0
-   12aa2:	f002 fb87 	bl	151b4 <____muldf3_from_thumb>
-   12aa6:	9006      	str	r0, [sp, #24]
-   12aa8:	9107      	str	r1, [sp, #28]
-   12aaa:	e757      	b.n	1295c <__kernel_cos+0xb0>
-   12aac:	b009      	add	sp, #36
-   12aae:	bcf0      	pop	{r4, r5, r6, r7}
-   12ab0:	bc04      	pop	{r2}
-   12ab2:	4710      	bx	r2
-   12ab4:	ffff 7fff 	undefined
-   12ab8:	ffff 3e3f 	vcvt.f32.u32	d19, d31, #1
-   12abc:	0000      	lsls	r0, r0, #0
-   12abe:	3ff0      	subs	r7, #240
-   12ac0:	0000      	lsls	r0, r0, #0
-   12ac2:	0000      	lsls	r0, r0, #0
-   12ac4:	fae9 bda8 	undefined
-   12ac8:	38d4      	subs	r0, #212
-   12aca:	be88      	bkpt	0x0088
-   12acc:	ee9e 3e21 	cdp	14, 9, cr3, cr14, cr1, {1}
-   12ad0:	b1c4      	cbz	r4, 12b04 <.text+0x12b04>
-   12ad2:	bdb4      	pop	{r2, r4, r5, r7, pc}
-   12ad4:	7e4f      	ldrb	r7, [r1, #25]
-   12ad6:	3e92      	subs	r6, #146
-   12ad8:	52ad      	strh	r5, [r5, r2]
-   12ada:	809c      	strh	r4, [r3, #4]
-   12adc:	01a0      	lsls	r0, r4, #6
-   12ade:	3efa      	subs	r6, #250
-   12ae0:	1590      	asrs	r0, r2, #22
-   12ae2:	19cb      	adds	r3, r1, r7
-   12ae4:	c16c      	stmia	r1!, {r2, r3, r5, r6}
-   12ae6:	3f56      	subs	r7, #86
-   12ae8:	5177      	str	r7, [r6, r5]
-   12aea:	16c1      	asrs	r1, r0, #27
-   12aec:	5555      	strb	r5, [r2, r5]
-   12aee:	3fa5      	subs	r7, #165
-   12af0:	554c      	strb	r4, [r1, r5]
-   12af2:	5555      	strb	r5, [r2, r5]
-   12af4:	3332      	adds	r3, #50
-   12af6:	3fd3      	subs	r7, #211
-   12af8:	0000      	lsls	r0, r0, #0
-   12afa:	3fe0      	subs	r7, #224
-   12afc:	0000      	lsls	r0, r0, #0
-   12afe:	0000      	lsls	r0, r0, #0
-   12b00:	0000      	lsls	r0, r0, #0
-   12b02:	3fe9      	subs	r7, #233
-   12b04:	0000      	lsls	r0, r0, #0
-   12b06:	3fd2      	subs	r7, #210
-   12b08:	0000      	lsls	r0, r0, #0
-   12b0a:	0000      	lsls	r0, r0, #0
-   12b0c:	0000      	lsls	r0, r0, #0
-   12b0e:	ffe0 b5f0 	vsli.64	<illegal reg q13.5>, q8, #32
-
-00012b10 <__kernel_rem_pio2>:
-   12b10:	b5f0      	push	{r4, r5, r6, r7, lr}
-   12b12:	4ccf      	ldr	r4, [pc, #828]	(12e50 <.text+0x12e50>)
-   12b14:	44a5      	add	sp, r4
-   12b16:	9302      	str	r3, [sp, #8]
-   12b18:	9004      	str	r0, [sp, #16]
-   12b1a:	98b3      	ldr	r0, [sp, #716]
-   12b1c:	9103      	str	r1, [sp, #12]
-   12b1e:	4bcd      	ldr	r3, [pc, #820]	(12e54 <.text+0x12e54>)
-   12b20:	9902      	ldr	r1, [sp, #8]
-   12b22:	1c14      	adds	r4, r2, #0
-   12b24:	0082      	lsls	r2, r0, #2
-   12b26:	58d2      	ldr	r2, [r2, r3]
-   12b28:	3901      	subs	r1, #1
-   12b2a:	9107      	str	r1, [sp, #28]
-   12b2c:	1ee0      	subs	r0, r4, #3
-   12b2e:	2118      	movs	r1, #24
-   12b30:	9208      	str	r2, [sp, #32]
-   12b32:	f000 fe89 	bl	13848 <__aeabi_idiv>
-   12b36:	9021      	str	r0, [sp, #132]
-   12b38:	2800      	cmp	r0, #0
-   12b3a:	da01      	bge.n	12b40 <__kernel_rem_pio2+0x30>
-   12b3c:	2200      	movs	r2, #0
-   12b3e:	9221      	str	r2, [sp, #132]
-   12b40:	9f21      	ldr	r7, [sp, #132]
-   12b42:	06fb      	lsls	r3, r7, #27
-   12b44:	1bdb      	subs	r3, r3, r7
-   12b46:	009b      	lsls	r3, r3, #2
-   12b48:	19db      	adds	r3, r3, r7
-   12b4a:	00db      	lsls	r3, r3, #3
-   12b4c:	18e4      	adds	r4, r4, r3
-   12b4e:	9807      	ldr	r0, [sp, #28]
-   12b50:	9405      	str	r4, [sp, #20]
-   12b52:	3c18      	subs	r4, #24
-   12b54:	940b      	str	r4, [sp, #44]
-   12b56:	9908      	ldr	r1, [sp, #32]
-   12b58:	1a3c      	subs	r4, r7, r0
-   12b5a:	9ab4      	ldr	r2, [sp, #720]
-   12b5c:	00a3      	lsls	r3, r4, #2
-   12b5e:	1847      	adds	r7, r0, r1
-   12b60:	18d5      	adds	r5, r2, r3
-   12b62:	2600      	movs	r6, #0
-   12b64:	e00f      	b.n	12b86 <__kernel_rem_pio2+0x76>
-   12b66:	2c00      	cmp	r4, #0
-   12b68:	da02      	bge.n	12b70 <__kernel_rem_pio2+0x60>
-   12b6a:	48bb      	ldr	r0, [pc, #748]	(12e58 <.text+0x12e58>)
-   12b6c:	49bb      	ldr	r1, [pc, #748]	(12e5c <.text+0x12e5c>)
-   12b6e:	e002      	b.n	12b76 <__kernel_rem_pio2+0x66>
-   12b70:	6828      	ldr	r0, [r5, #0]
-   12b72:	f002 fb13 	bl	1519c <____floatsidf_from_thumb>
-   12b76:	00f2      	lsls	r2, r6, #3
-   12b78:	ab22      	add	r3, sp, #136
-   12b7a:	189b      	adds	r3, r3, r2
-   12b7c:	6018      	str	r0, [r3, #0]
-   12b7e:	6059      	str	r1, [r3, #4]
-   12b80:	3601      	adds	r6, #1
-   12b82:	3401      	adds	r4, #1
-   12b84:	3504      	adds	r5, #4
-   12b86:	42be      	cmp	r6, r7
-   12b88:	dded      	ble.n	12b66 <__kernel_rem_pio2+0x56>
-   12b8a:	9b07      	ldr	r3, [sp, #28]
-   12b8c:	2400      	movs	r4, #0
-   12b8e:	9317      	str	r3, [sp, #92]
-   12b90:	9418      	str	r4, [sp, #96]
-   12b92:	e01e      	b.n	12bd2 <__kernel_rem_pio2+0xc2>
-   12b94:	9a16      	ldr	r2, [sp, #88]
-   12b96:	ca03      	ldmia	r2!, {r0, r1}
-   12b98:	9216      	str	r2, [sp, #88]
-   12b9a:	683a      	ldr	r2, [r7, #0]
-   12b9c:	687b      	ldr	r3, [r7, #4]
-   12b9e:	f002 fb09 	bl	151b4 <____muldf3_from_thumb>
-   12ba2:	1c02      	adds	r2, r0, #0
-   12ba4:	1c0b      	adds	r3, r1, #0
-   12ba6:	1c20      	adds	r0, r4, #0
-   12ba8:	1c29      	adds	r1, r5, #0
-   12baa:	f002 fafb 	bl	151a4 <____adddf3_from_thumb>
-   12bae:	3601      	adds	r6, #1
-   12bb0:	1c04      	adds	r4, r0, #0
-   12bb2:	1c0d      	adds	r5, r1, #0
-   12bb4:	3f08      	subs	r7, #8
-   12bb6:	9b07      	ldr	r3, [sp, #28]
-   12bb8:	429e      	cmp	r6, r3
-   12bba:	ddeb      	ble.n	12b94 <__kernel_rem_pio2+0x84>
-   12bbc:	9f18      	ldr	r7, [sp, #96]
-   12bbe:	9817      	ldr	r0, [sp, #92]
-   12bc0:	00fa      	lsls	r2, r7, #3
-   12bc2:	ab4a      	add	r3, sp, #296
-   12bc4:	189b      	adds	r3, r3, r2
-   12bc6:	3701      	adds	r7, #1
-   12bc8:	3001      	adds	r0, #1
-   12bca:	601c      	str	r4, [r3, #0]
-   12bcc:	605d      	str	r5, [r3, #4]
-   12bce:	9718      	str	r7, [sp, #96]
-   12bd0:	9017      	str	r0, [sp, #92]
-   12bd2:	9918      	ldr	r1, [sp, #96]
-   12bd4:	9a08      	ldr	r2, [sp, #32]
-   12bd6:	4291      	cmp	r1, r2
-   12bd8:	dc09      	bgt.n	12bee <__kernel_rem_pio2+0xde>
-   12bda:	9b04      	ldr	r3, [sp, #16]
-   12bdc:	9c17      	ldr	r4, [sp, #92]
-   12bde:	9316      	str	r3, [sp, #88]
-   12be0:	00e2      	lsls	r2, r4, #3
-   12be2:	ab22      	add	r3, sp, #136
-   12be4:	4c9c      	ldr	r4, [pc, #624]	(12e58 <.text+0x12e58>)
-   12be6:	4d9d      	ldr	r5, [pc, #628]	(12e5c <.text+0x12e5c>)
-   12be8:	189f      	adds	r7, r3, r2
-   12bea:	2600      	movs	r6, #0
-   12bec:	e7e3      	b.n	12bb6 <__kernel_rem_pio2+0xa6>
-   12bee:	9f08      	ldr	r7, [sp, #32]
-   12bf0:	9706      	str	r7, [sp, #24]
-   12bf2:	9806      	ldr	r0, [sp, #24]
-   12bf4:	ab4a      	add	r3, sp, #296
-   12bf6:	00c2      	lsls	r2, r0, #3
-   12bf8:	18d2      	adds	r2, r2, r3
-   12bfa:	3801      	subs	r0, #1
-   12bfc:	6816      	ldr	r6, [r2, #0]
-   12bfe:	6857      	ldr	r7, [r2, #4]
-   12c00:	00c2      	lsls	r2, r0, #3
-   12c02:	189b      	adds	r3, r3, r2
-   12c04:	229a      	movs	r2, #154
-   12c06:	9906      	ldr	r1, [sp, #24]
-   12c08:	0092      	lsls	r2, r2, #2
-   12c0a:	446a      	add	r2, sp
-   12c0c:	9019      	str	r0, [sp, #100]
-   12c0e:	9315      	str	r3, [sp, #84]
-   12c10:	911a      	str	r1, [sp, #104]
-   12c12:	9214      	str	r2, [sp, #80]
-   12c14:	e028      	b.n	12c68 <__kernel_rem_pio2+0x158>
-   12c16:	4a92      	ldr	r2, [pc, #584]	(12e60 <.text+0x12e60>)
-   12c18:	4b92      	ldr	r3, [pc, #584]	(12e64 <.text+0x12e64>)
-   12c1a:	1c30      	adds	r0, r6, #0
-   12c1c:	1c39      	adds	r1, r7, #0
-   12c1e:	f002 fac9 	bl	151b4 <____muldf3_from_thumb>
-   12c22:	f002 facb 	bl	151bc <____fixdfsi_from_thumb>
-   12c26:	f002 fab9 	bl	1519c <____floatsidf_from_thumb>
-   12c2a:	4a8f      	ldr	r2, [pc, #572]	(12e68 <.text+0x12e68>)
-   12c2c:	4b8f      	ldr	r3, [pc, #572]	(12e6c <.text+0x12e6c>)
-   12c2e:	1c04      	adds	r4, r0, #0
-   12c30:	1c0d      	adds	r5, r1, #0
-   12c32:	f002 fabf 	bl	151b4 <____muldf3_from_thumb>
-   12c36:	1c02      	adds	r2, r0, #0
-   12c38:	1c0b      	adds	r3, r1, #0
-   12c3a:	1c30      	adds	r0, r6, #0
-   12c3c:	1c39      	adds	r1, r7, #0
-   12c3e:	f002 fab1 	bl	151a4 <____adddf3_from_thumb>
-   12c42:	f002 fabb 	bl	151bc <____fixdfsi_from_thumb>
-   12c46:	9b14      	ldr	r3, [sp, #80]
-   12c48:	9f1a      	ldr	r7, [sp, #104]
-   12c4a:	c301      	stmia	r3!, {r0}
-   12c4c:	1c20      	adds	r0, r4, #0
-   12c4e:	9c15      	ldr	r4, [sp, #84]
-   12c50:	9314      	str	r3, [sp, #80]
-   12c52:	3f01      	subs	r7, #1
-   12c54:	6822      	ldr	r2, [r4, #0]
-   12c56:	6863      	ldr	r3, [r4, #4]
-   12c58:	1c29      	adds	r1, r5, #0
-   12c5a:	971a      	str	r7, [sp, #104]
-   12c5c:	f002 faa2 	bl	151a4 <____adddf3_from_thumb>
-   12c60:	3c08      	subs	r4, #8
-   12c62:	9415      	str	r4, [sp, #84]
-   12c64:	1c06      	adds	r6, r0, #0
-   12c66:	1c0f      	adds	r7, r1, #0
-   12c68:	981a      	ldr	r0, [sp, #104]
-   12c6a:	2800      	cmp	r0, #0
-   12c6c:	dcd3      	bgt.n	12c16 <__kernel_rem_pio2+0x106>
-   12c6e:	1c30      	adds	r0, r6, #0
-   12c70:	9a0b      	ldr	r2, [sp, #44]
-   12c72:	1c39      	adds	r1, r7, #0
-   12c74:	f000 fd02 	bl	1367c <scalbn>
-   12c78:	4a7d      	ldr	r2, [pc, #500]	(12e70 <.text+0x12e70>)
-   12c7a:	4b7e      	ldr	r3, [pc, #504]	(12e74 <.text+0x12e74>)
-   12c7c:	1c04      	adds	r4, r0, #0
-   12c7e:	1c0d      	adds	r5, r1, #0
-   12c80:	f002 fa98 	bl	151b4 <____muldf3_from_thumb>
-   12c84:	f000 fbbc 	bl	13400 <floor>
-   12c88:	4a7b      	ldr	r2, [pc, #492]	(12e78 <.text+0x12e78>)
-   12c8a:	4b7c      	ldr	r3, [pc, #496]	(12e7c <.text+0x12e7c>)
-   12c8c:	f002 fa92 	bl	151b4 <____muldf3_from_thumb>
-   12c90:	1c02      	adds	r2, r0, #0
-   12c92:	1c0b      	adds	r3, r1, #0
-   12c94:	1c20      	adds	r0, r4, #0
-   12c96:	1c29      	adds	r1, r5, #0
-   12c98:	f002 fa84 	bl	151a4 <____adddf3_from_thumb>
-   12c9c:	1c0d      	adds	r5, r1, #0
-   12c9e:	1c04      	adds	r4, r0, #0
-   12ca0:	f002 fa8c 	bl	151bc <____fixdfsi_from_thumb>
-   12ca4:	9009      	str	r0, [sp, #36]
-   12ca6:	f002 fa79 	bl	1519c <____floatsidf_from_thumb>
-   12caa:	1c02      	adds	r2, r0, #0
-   12cac:	1c0b      	adds	r3, r1, #0
-   12cae:	1c20      	adds	r0, r4, #0
-   12cb0:	1c29      	adds	r1, r5, #0
-   12cb2:	f002 fa7b 	bl	151ac <____subdf3_from_thumb>
-   12cb6:	1c0e      	adds	r6, r1, #0
-   12cb8:	990b      	ldr	r1, [sp, #44]
-   12cba:	1c05      	adds	r5, r0, #0
-   12cbc:	2900      	cmp	r1, #0
-   12cbe:	dd14      	ble.n	12cea <__kernel_rem_pio2+0x1da>
-   12cc0:	9a19      	ldr	r2, [sp, #100]
-   12cc2:	ac9a      	add	r4, sp, #616
-   12cc4:	0090      	lsls	r0, r2, #2
-   12cc6:	5901      	ldr	r1, [r0, r4]
-   12cc8:	9b0b      	ldr	r3, [sp, #44]
-   12cca:	2218      	movs	r2, #24
-   12ccc:	1ad2      	subs	r2, r2, r3
-   12cce:	9f09      	ldr	r7, [sp, #36]
-   12cd0:	1c0b      	adds	r3, r1, #0
-   12cd2:	4113      	asrs	r3, r2
-   12cd4:	18ff      	adds	r7, r7, r3
-   12cd6:	4093      	lsls	r3, r2
-   12cd8:	1ac9      	subs	r1, r1, r3
-   12cda:	5101      	str	r1, [r0, r4]
-   12cdc:	980b      	ldr	r0, [sp, #44]
-   12cde:	2317      	movs	r3, #23
-   12ce0:	1a1b      	subs	r3, r3, r0
-   12ce2:	4119      	asrs	r1, r3
-   12ce4:	9709      	str	r7, [sp, #36]
-   12ce6:	910c      	str	r1, [sp, #48]
-   12ce8:	e017      	b.n	12d1a <__kernel_rem_pio2+0x20a>
-   12cea:	990b      	ldr	r1, [sp, #44]
-   12cec:	2900      	cmp	r1, #0
-   12cee:	d106      	bne.n	12cfe <__kernel_rem_pio2+0x1ee>
-   12cf0:	9a19      	ldr	r2, [sp, #100]
-   12cf2:	0093      	lsls	r3, r2, #2
-   12cf4:	aa9a      	add	r2, sp, #616
-   12cf6:	589b      	ldr	r3, [r3, r2]
-   12cf8:	15db      	asrs	r3, r3, #23
-   12cfa:	930c      	str	r3, [sp, #48]
-   12cfc:	e00d      	b.n	12d1a <__kernel_rem_pio2+0x20a>
-   12cfe:	1c28      	adds	r0, r5, #0
-   12d00:	1c31      	adds	r1, r6, #0
-   12d02:	4a5f      	ldr	r2, [pc, #380]	(12e80 <.text+0x12e80>)
-   12d04:	4b5f      	ldr	r3, [pc, #380]	(12e84 <.text+0x12e84>)
-   12d06:	f002 fa65 	bl	151d4 <____gedf2_from_thumb>
-   12d0a:	2800      	cmp	r0, #0
-   12d0c:	da02      	bge.n	12d14 <__kernel_rem_pio2+0x204>
-   12d0e:	2300      	movs	r3, #0
-   12d10:	930c      	str	r3, [sp, #48]
-   12d12:	e04e      	b.n	12db2 <__kernel_rem_pio2+0x2a2>
-   12d14:	2402      	movs	r4, #2
-   12d16:	940c      	str	r4, [sp, #48]
-   12d18:	e002      	b.n	12d20 <__kernel_rem_pio2+0x210>
-   12d1a:	9f0c      	ldr	r7, [sp, #48]
-   12d1c:	2f00      	cmp	r7, #0
-   12d1e:	dd48      	ble.n	12db2 <__kernel_rem_pio2+0x2a2>
-   12d20:	9809      	ldr	r0, [sp, #36]
-   12d22:	3001      	adds	r0, #1
-   12d24:	9009      	str	r0, [sp, #36]
-   12d26:	2400      	movs	r4, #0
-   12d28:	2000      	movs	r0, #0
-   12d2a:	a99a      	add	r1, sp, #616
-   12d2c:	e00f      	b.n	12d4e <__kernel_rem_pio2+0x23e>
-   12d2e:	680a      	ldr	r2, [r1, #0]
-   12d30:	2c00      	cmp	r4, #0
-   12d32:	d107      	bne.n	12d44 <__kernel_rem_pio2+0x234>
-   12d34:	2a00      	cmp	r2, #0
-   12d36:	d008      	beq.n	12d4a <__kernel_rem_pio2+0x23a>
-   12d38:	2380      	movs	r3, #128
-   12d3a:	045b      	lsls	r3, r3, #17
-   12d3c:	1a9b      	subs	r3, r3, r2
-   12d3e:	2401      	movs	r4, #1
-   12d40:	600b      	str	r3, [r1, #0]
-   12d42:	e002      	b.n	12d4a <__kernel_rem_pio2+0x23a>
-   12d44:	4b50      	ldr	r3, [pc, #320]	(12e88 <.text+0x12e88>)
-   12d46:	1a9b      	subs	r3, r3, r2
-   12d48:	600b      	str	r3, [r1, #0]
-   12d4a:	3001      	adds	r0, #1
-   12d4c:	3104      	adds	r1, #4
-   12d4e:	9a06      	ldr	r2, [sp, #24]
-   12d50:	4290      	cmp	r0, r2
-   12d52:	dbec      	blt.n	12d2e <__kernel_rem_pio2+0x21e>
-   12d54:	9b0b      	ldr	r3, [sp, #44]
-   12d56:	2b00      	cmp	r3, #0
-   12d58:	dd11      	ble.n	12d7e <__kernel_rem_pio2+0x26e>
-   12d5a:	2b01      	cmp	r3, #1
-   12d5c:	d002      	beq.n	12d64 <__kernel_rem_pio2+0x254>
-   12d5e:	2b02      	cmp	r3, #2
-   12d60:	d10d      	bne.n	12d7e <__kernel_rem_pio2+0x26e>
-   12d62:	e005      	b.n	12d70 <__kernel_rem_pio2+0x260>
-   12d64:	9f19      	ldr	r7, [sp, #100]
-   12d66:	a89a      	add	r0, sp, #616
-   12d68:	00b9      	lsls	r1, r7, #2
-   12d6a:	580b      	ldr	r3, [r1, r0]
-   12d6c:	4a47      	ldr	r2, [pc, #284]	(12e8c <.text+0x12e8c>)
-   12d6e:	e004      	b.n	12d7a <__kernel_rem_pio2+0x26a>
-   12d70:	9a19      	ldr	r2, [sp, #100]
-   12d72:	a89a      	add	r0, sp, #616
-   12d74:	0091      	lsls	r1, r2, #2
-   12d76:	580b      	ldr	r3, [r1, r0]
-   12d78:	4a45      	ldr	r2, [pc, #276]	(12e90 <.text+0x12e90>)
-   12d7a:	4013      	ands	r3, r2
-   12d7c:	500b      	str	r3, [r1, r0]
-   12d7e:	9b0c      	ldr	r3, [sp, #48]
-   12d80:	2b02      	cmp	r3, #2
-   12d82:	d116      	bne.n	12db2 <__kernel_rem_pio2+0x2a2>
-   12d84:	1c2a      	adds	r2, r5, #0
-   12d86:	1c33      	adds	r3, r6, #0
-   12d88:	4842      	ldr	r0, [pc, #264]	(12e94 <.text+0x12e94>)
-   12d8a:	4943      	ldr	r1, [pc, #268]	(12e98 <.text+0x12e98>)
-   12d8c:	f002 fa0e 	bl	151ac <____subdf3_from_thumb>
-   12d90:	1c05      	adds	r5, r0, #0
-   12d92:	1c0e      	adds	r6, r1, #0
-   12d94:	2c00      	cmp	r4, #0
-   12d96:	d00c      	beq.n	12db2 <__kernel_rem_pio2+0x2a2>
-   12d98:	9a0b      	ldr	r2, [sp, #44]
-   12d9a:	483e      	ldr	r0, [pc, #248]	(12e94 <.text+0x12e94>)
-   12d9c:	493e      	ldr	r1, [pc, #248]	(12e98 <.text+0x12e98>)
-   12d9e:	f000 fc6d 	bl	1367c <scalbn>
-   12da2:	1c02      	adds	r2, r0, #0
-   12da4:	1c0b      	adds	r3, r1, #0
-   12da6:	1c28      	adds	r0, r5, #0
-   12da8:	1c31      	adds	r1, r6, #0
-   12daa:	f002 f9ff 	bl	151ac <____subdf3_from_thumb>
-   12dae:	1c05      	adds	r5, r0, #0
-   12db0:	1c0e      	adds	r6, r1, #0
-   12db2:	1c28      	adds	r0, r5, #0
-   12db4:	1c31      	adds	r1, r6, #0
-   12db6:	4a28      	ldr	r2, [pc, #160]	(12e58 <.text+0x12e58>)
-   12db8:	4b28      	ldr	r3, [pc, #160]	(12e5c <.text+0x12e5c>)
-   12dba:	f002 f9eb 	bl	15194 <____eqdf2_from_thumb>
-   12dbe:	2800      	cmp	r0, #0
-   12dc0:	d000      	beq.n	12dc4 <__kernel_rem_pio2+0x2b4>
-   12dc2:	e097      	b.n	12ef4 <.text+0x12ef4>
-   12dc4:	9c19      	ldr	r4, [sp, #100]
-   12dc6:	ab9a      	add	r3, sp, #616
-   12dc8:	00a2      	lsls	r2, r4, #2
-   12dca:	189a      	adds	r2, r3, r2
-   12dcc:	2100      	movs	r1, #0
-   12dce:	e005      	b.n	12ddc <__kernel_rem_pio2+0x2cc>
-   12dd0:	9f19      	ldr	r7, [sp, #100]
-   12dd2:	6813      	ldr	r3, [r2, #0]
-   12dd4:	3f01      	subs	r7, #1
-   12dd6:	9719      	str	r7, [sp, #100]
-   12dd8:	4319      	orrs	r1, r3
-   12dda:	3a04      	subs	r2, #4
-   12ddc:	9819      	ldr	r0, [sp, #100]
-   12dde:	9b08      	ldr	r3, [sp, #32]
-   12de0:	4298      	cmp	r0, r3
-   12de2:	daf5      	bge.n	12dd0 <__kernel_rem_pio2+0x2c0>
-   12de4:	2900      	cmp	r1, #0
-   12de6:	d000      	beq.n	12dea <__kernel_rem_pio2+0x2da>
-   12de8:	e08c      	b.n	12f04 <.text+0x12f04>
-   12dea:	009b      	lsls	r3, r3, #2
-   12dec:	acae      	add	r4, sp, #696
-   12dee:	191b      	adds	r3, r3, r4
-   12df0:	1c1a      	adds	r2, r3, #0
-   12df2:	2701      	movs	r7, #1
-   12df4:	3a54      	subs	r2, #84
-   12df6:	970a      	str	r7, [sp, #40]
-   12df8:	e002      	b.n	12e00 <__kernel_rem_pio2+0x2f0>
-   12dfa:	980a      	ldr	r0, [sp, #40]
-   12dfc:	3001      	adds	r0, #1
-   12dfe:	900a      	str	r0, [sp, #40]
-   12e00:	6813      	ldr	r3, [r2, #0]
-   12e02:	3a04      	subs	r2, #4
-   12e04:	2b00      	cmp	r3, #0
-   12e06:	d0f8      	beq.n	12dfa <__kernel_rem_pio2+0x2ea>
-   12e08:	9921      	ldr	r1, [sp, #132]
-   12e0a:	9a06      	ldr	r2, [sp, #24]
-   12e0c:	9cb4      	ldr	r4, [sp, #720]
-   12e0e:	188b      	adds	r3, r1, r2
-   12e10:	009b      	lsls	r3, r3, #2
-   12e12:	18e3      	adds	r3, r4, r3
-   12e14:	3304      	adds	r3, #4
-   12e16:	2700      	movs	r7, #0
-   12e18:	9313      	str	r3, [sp, #76]
-   12e1a:	9712      	str	r7, [sp, #72]
-   12e1c:	e060      	b.n	12ee0 <.text+0x12ee0>
-   12e1e:	9802      	ldr	r0, [sp, #8]
-   12e20:	9913      	ldr	r1, [sp, #76]
-   12e22:	ad22      	add	r5, sp, #136
-   12e24:	00e4      	lsls	r4, r4, #3
-   12e26:	00c3      	lsls	r3, r0, #3
-   12e28:	192c      	adds	r4, r5, r4
-   12e2a:	6808      	ldr	r0, [r1, #0]
-   12e2c:	18e4      	adds	r4, r4, r3
-   12e2e:	f002 f9b5 	bl	1519c <____floatsidf_from_thumb>
-   12e32:	9f06      	ldr	r7, [sp, #24]
-   12e34:	6020      	str	r0, [r4, #0]
-   12e36:	6061      	str	r1, [r4, #4]
-   12e38:	9c02      	ldr	r4, [sp, #8]
-   12e3a:	9812      	ldr	r0, [sp, #72]
-   12e3c:	19e3      	adds	r3, r4, r7
-   12e3e:	181b      	adds	r3, r3, r0
-   12e40:	9a04      	ldr	r2, [sp, #16]
-   12e42:	00db      	lsls	r3, r3, #3
-   12e44:	4e04      	ldr	r6, [pc, #16]	(12e58 <.text+0x12e58>)
-   12e46:	4f05      	ldr	r7, [pc, #20]	(12e5c <.text+0x12e5c>)
-   12e48:	18ed      	adds	r5, r5, r3
-   12e4a:	2400      	movs	r4, #0
-   12e4c:	9211      	str	r2, [sp, #68]
-   12e4e:	e036      	b.n	12ebe <.text+0x12ebe>
-   12e50:	fd48 ffff 	stc2l	15, cr15, [r8, #-1020]
-   12e54:	5838      	ldr	r0, [r7, r0]
-   12e56:	0001      	lsls	r1, r0, #0
-	...
-   12e60:	0000      	lsls	r0, r0, #0
-   12e62:	3e70      	subs	r6, #112
-   12e64:	0000      	lsls	r0, r0, #0
-   12e66:	0000      	lsls	r0, r0, #0
-   12e68:	0000      	lsls	r0, r0, #0
-   12e6a:	c170      	stmia	r1!, {r4, r5, r6}
-   12e6c:	0000      	lsls	r0, r0, #0
-   12e6e:	0000      	lsls	r0, r0, #0
-   12e70:	0000      	lsls	r0, r0, #0
-   12e72:	3fc0      	subs	r7, #192
-   12e74:	0000      	lsls	r0, r0, #0
-   12e76:	0000      	lsls	r0, r0, #0
-   12e78:	0000      	lsls	r0, r0, #0
-   12e7a:	c020      	stmia	r0!, {r5}
-   12e7c:	0000      	lsls	r0, r0, #0
-   12e7e:	0000      	lsls	r0, r0, #0
-   12e80:	0000      	lsls	r0, r0, #0
-   12e82:	3fe0      	subs	r7, #224
-   12e84:	0000      	lsls	r0, r0, #0
-   12e86:	0000      	lsls	r0, r0, #0
-   12e88:	ffff 00ff 	vshr.u64	q8, <illegal reg q15.5>, #1
-   12e8c:	ffff 007f 	vshr.u32	q8, <illegal reg q15.5>, #1
-   12e90:	ffff 003f 	vshr.u32	d16, d31, #1
-   12e94:	0000      	lsls	r0, r0, #0
-   12e96:	3ff0      	subs	r7, #240
-   12e98:	0000      	lsls	r0, r0, #0
-   12e9a:	0000      	lsls	r0, r0, #0
-   12e9c:	9a11      	ldr	r2, [sp, #68]
-   12e9e:	ca03      	ldmia	r2!, {r0, r1}
-   12ea0:	9211      	str	r2, [sp, #68]
-   12ea2:	682a      	ldr	r2, [r5, #0]
-   12ea4:	686b      	ldr	r3, [r5, #4]
-   12ea6:	f002 f985 	bl	151b4 <____muldf3_from_thumb>
-   12eaa:	1c02      	adds	r2, r0, #0
-   12eac:	1c0b      	adds	r3, r1, #0
-   12eae:	1c30      	adds	r0, r6, #0
-   12eb0:	1c39      	adds	r1, r7, #0
-   12eb2:	f002 f977 	bl	151a4 <____adddf3_from_thumb>
-   12eb6:	3401      	adds	r4, #1
-   12eb8:	1c06      	adds	r6, r0, #0
-   12eba:	1c0f      	adds	r7, r1, #0
-   12ebc:	3d08      	subs	r5, #8
-   12ebe:	9b07      	ldr	r3, [sp, #28]
-   12ec0:	429c      	cmp	r4, r3
-   12ec2:	ddeb      	ble.n	12e9c <.text+0x12e9c>
-   12ec4:	9c12      	ldr	r4, [sp, #72]
-   12ec6:	9806      	ldr	r0, [sp, #24]
-   12ec8:	00e3      	lsls	r3, r4, #3
-   12eca:	aa4a      	add	r2, sp, #296
-   12ecc:	18d2      	adds	r2, r2, r3
-   12ece:	9913      	ldr	r1, [sp, #76]
-   12ed0:	00c3      	lsls	r3, r0, #3
-   12ed2:	18d2      	adds	r2, r2, r3
-   12ed4:	3401      	adds	r4, #1
-   12ed6:	3104      	adds	r1, #4
-   12ed8:	6096      	str	r6, [r2, #8]
-   12eda:	60d7      	str	r7, [r2, #12]
-   12edc:	9412      	str	r4, [sp, #72]
-   12ede:	9113      	str	r1, [sp, #76]
-   12ee0:	9b06      	ldr	r3, [sp, #24]
-   12ee2:	9c0a      	ldr	r4, [sp, #40]
-   12ee4:	9f12      	ldr	r7, [sp, #72]
-   12ee6:	191a      	adds	r2, r3, r4
-   12ee8:	19dc      	adds	r4, r3, r7
-   12eea:	1c63      	adds	r3, r4, #1
-   12eec:	4293      	cmp	r3, r2
-   12eee:	dd96      	ble.n	12e1e <__kernel_rem_pio2+0x30e>
-   12ef0:	9206      	str	r2, [sp, #24]
-   12ef2:	e67e      	b.n	12bf2 <__kernel_rem_pio2+0xe2>
-   12ef4:	1c28      	adds	r0, r5, #0
-   12ef6:	1c31      	adds	r1, r6, #0
-   12ef8:	4bbf      	ldr	r3, [pc, #764]	(131f8 <.text+0x131f8>)
-   12efa:	4abe      	ldr	r2, [pc, #760]	(131f4 <.text+0x131f4>)
-   12efc:	f002 f94a 	bl	15194 <____eqdf2_from_thumb>
-   12f00:	2800      	cmp	r0, #0
-   12f02:	d116      	bne.n	12f32 <.text+0x12f32>
-   12f04:	9806      	ldr	r0, [sp, #24]
-   12f06:	a9ae      	add	r1, sp, #696
-   12f08:	0083      	lsls	r3, r0, #2
-   12f0a:	185b      	adds	r3, r3, r1
-   12f0c:	1c1a      	adds	r2, r3, #0
-   12f0e:	3a54      	subs	r2, #84
-   12f10:	2100      	movs	r1, #0
-   12f12:	6813      	ldr	r3, [r2, #0]
-   12f14:	3101      	adds	r1, #1
-   12f16:	3a04      	subs	r2, #4
-   12f18:	2b00      	cmp	r3, #0
-   12f1a:	d0fa      	beq.n	12f12 <.text+0x12f12>
-   12f1c:	004b      	lsls	r3, r1, #1
-   12f1e:	185b      	adds	r3, r3, r1
-   12f20:	9c05      	ldr	r4, [sp, #20]
-   12f22:	9a06      	ldr	r2, [sp, #24]
-   12f24:	00db      	lsls	r3, r3, #3
-   12f26:	1ae3      	subs	r3, r4, r3
-   12f28:	1a52      	subs	r2, r2, r1
-   12f2a:	3b18      	subs	r3, #24
-   12f2c:	9206      	str	r2, [sp, #24]
-   12f2e:	930b      	str	r3, [sp, #44]
-   12f30:	e038      	b.n	12fa4 <.text+0x12fa4>
-   12f32:	9f0b      	ldr	r7, [sp, #44]
-   12f34:	1c28      	adds	r0, r5, #0
-   12f36:	427a      	negs	r2, r7
-   12f38:	1c31      	adds	r1, r6, #0
-   12f3a:	f000 fb9f 	bl	1367c <scalbn>
-   12f3e:	4aaf      	ldr	r2, [pc, #700]	(131fc <.text+0x131fc>)
-   12f40:	4baf      	ldr	r3, [pc, #700]	(13200 <.text+0x13200>)
-   12f42:	901b      	str	r0, [sp, #108]
-   12f44:	911c      	str	r1, [sp, #112]
-   12f46:	f002 f945 	bl	151d4 <____gedf2_from_thumb>
-   12f4a:	9906      	ldr	r1, [sp, #24]
-   12f4c:	af9a      	add	r7, sp, #616
-   12f4e:	008c      	lsls	r4, r1, #2
-   12f50:	2800      	cmp	r0, #0
-   12f52:	db22      	blt.n	12f9a <.text+0x12f9a>
-   12f54:	4aab      	ldr	r2, [pc, #684]	(13204 <.text+0x13204>)
-   12f56:	4bac      	ldr	r3, [pc, #688]	(13208 <.text+0x13208>)
-   12f58:	981b      	ldr	r0, [sp, #108]
-   12f5a:	991c      	ldr	r1, [sp, #112]
-   12f5c:	f002 f92a 	bl	151b4 <____muldf3_from_thumb>
-   12f60:	f002 f92c 	bl	151bc <____fixdfsi_from_thumb>
-   12f64:	f002 f91a 	bl	1519c <____floatsidf_from_thumb>
-   12f68:	4aa8      	ldr	r2, [pc, #672]	(1320c <.text+0x1320c>)
-   12f6a:	4ba9      	ldr	r3, [pc, #676]	(13210 <.text+0x13210>)
-   12f6c:	1c05      	adds	r5, r0, #0
-   12f6e:	1c0e      	adds	r6, r1, #0
-   12f70:	f002 f920 	bl	151b4 <____muldf3_from_thumb>
-   12f74:	1c02      	adds	r2, r0, #0
-   12f76:	1c0b      	adds	r3, r1, #0
-   12f78:	981b      	ldr	r0, [sp, #108]
-   12f7a:	991c      	ldr	r1, [sp, #112]
-   12f7c:	f002 f912 	bl	151a4 <____adddf3_from_thumb>
-   12f80:	f002 f91c 	bl	151bc <____fixdfsi_from_thumb>
-   12f84:	9a06      	ldr	r2, [sp, #24]
-   12f86:	9b0b      	ldr	r3, [sp, #44]
-   12f88:	3201      	adds	r2, #1
-   12f8a:	51e0      	str	r0, [r4, r7]
-   12f8c:	3318      	adds	r3, #24
-   12f8e:	0094      	lsls	r4, r2, #2
-   12f90:	1c28      	adds	r0, r5, #0
-   12f92:	1c31      	adds	r1, r6, #0
-   12f94:	9206      	str	r2, [sp, #24]
-   12f96:	930b      	str	r3, [sp, #44]
-   12f98:	e001      	b.n	12f9e <.text+0x12f9e>
-   12f9a:	981b      	ldr	r0, [sp, #108]
-   12f9c:	991c      	ldr	r1, [sp, #112]
-   12f9e:	f002 f90d 	bl	151bc <____fixdfsi_from_thumb>
-   12fa2:	51e0      	str	r0, [r4, r7]
-   12fa4:	9a0b      	ldr	r2, [sp, #44]
-   12fa6:	489b      	ldr	r0, [pc, #620]	(13214 <.text+0x13214>)
-   12fa8:	499b      	ldr	r1, [pc, #620]	(13218 <.text+0x13218>)
-   12faa:	f000 fb67 	bl	1367c <scalbn>
-   12fae:	9f06      	ldr	r7, [sp, #24]
-   12fb0:	ab9a      	add	r3, sp, #616
-   12fb2:	00ba      	lsls	r2, r7, #2
-   12fb4:	189b      	adds	r3, r3, r2
-   12fb6:	9310      	str	r3, [sp, #64]
-   12fb8:	00fa      	lsls	r2, r7, #3
-   12fba:	ab4a      	add	r3, sp, #296
-   12fbc:	9e06      	ldr	r6, [sp, #24]
-   12fbe:	1c04      	adds	r4, r0, #0
-   12fc0:	1c0d      	adds	r5, r1, #0
-   12fc2:	189f      	adds	r7, r3, r2
-   12fc4:	e018      	b.n	12ff8 <.text+0x12ff8>
-   12fc6:	9910      	ldr	r1, [sp, #64]
-   12fc8:	6808      	ldr	r0, [r1, #0]
-   12fca:	f002 f8e7 	bl	1519c <____floatsidf_from_thumb>
-   12fce:	1c02      	adds	r2, r0, #0
-   12fd0:	1c0b      	adds	r3, r1, #0
-   12fd2:	1c20      	adds	r0, r4, #0
-   12fd4:	1c29      	adds	r1, r5, #0
-   12fd6:	f002 f8ed 	bl	151b4 <____muldf3_from_thumb>
-   12fda:	4a8a      	ldr	r2, [pc, #552]	(13204 <.text+0x13204>)
-   12fdc:	4b8a      	ldr	r3, [pc, #552]	(13208 <.text+0x13208>)
-   12fde:	6038      	str	r0, [r7, #0]
-   12fe0:	6079      	str	r1, [r7, #4]
-   12fe2:	1c20      	adds	r0, r4, #0
-   12fe4:	1c29      	adds	r1, r5, #0
-   12fe6:	f002 f8e5 	bl	151b4 <____muldf3_from_thumb>
-   12fea:	9a10      	ldr	r2, [sp, #64]
-   12fec:	3a04      	subs	r2, #4
-   12fee:	9210      	str	r2, [sp, #64]
-   12ff0:	1c04      	adds	r4, r0, #0
-   12ff2:	1c0d      	adds	r5, r1, #0
-   12ff4:	3e01      	subs	r6, #1
-   12ff6:	3f08      	subs	r7, #8
-   12ff8:	2e00      	cmp	r6, #0
-   12ffa:	dae4      	bge.n	12fc6 <.text+0x12fc6>
-   12ffc:	9f06      	ldr	r7, [sp, #24]
-   12ffe:	2300      	movs	r3, #0
-   13000:	930f      	str	r3, [sp, #60]
-   13002:	e024      	b.n	1304e <.text+0x1304e>
-   13004:	4a85      	ldr	r2, [pc, #532]	(1321c <.text+0x1321c>)
-   13006:	00f3      	lsls	r3, r6, #3
-   13008:	9c0e      	ldr	r4, [sp, #56]
-   1300a:	189b      	adds	r3, r3, r2
-   1300c:	6818      	ldr	r0, [r3, #0]
-   1300e:	6859      	ldr	r1, [r3, #4]
-   13010:	cc0c      	ldmia	r4!, {r2, r3}
-   13012:	940e      	str	r4, [sp, #56]
-   13014:	f002 f8ce 	bl	151b4 <____muldf3_from_thumb>
-   13018:	1c02      	adds	r2, r0, #0
-   1301a:	1c0b      	adds	r3, r1, #0
-   1301c:	9800      	ldr	r0, [sp, #0]
-   1301e:	9901      	ldr	r1, [sp, #4]
-   13020:	f002 f8c0 	bl	151a4 <____adddf3_from_thumb>
-   13024:	9000      	str	r0, [sp, #0]
-   13026:	9101      	str	r1, [sp, #4]
-   13028:	3601      	adds	r6, #1
-   1302a:	9808      	ldr	r0, [sp, #32]
-   1302c:	4286      	cmp	r6, r0
-   1302e:	dc02      	bgt.n	13036 <.text+0x13036>
-   13030:	990f      	ldr	r1, [sp, #60]
-   13032:	428e      	cmp	r6, r1
-   13034:	dde6      	ble.n	13004 <.text+0x13004>
-   13036:	9b0f      	ldr	r3, [sp, #60]
-   13038:	9800      	ldr	r0, [sp, #0]
-   1303a:	9901      	ldr	r1, [sp, #4]
-   1303c:	00da      	lsls	r2, r3, #3
-   1303e:	ab72      	add	r3, sp, #456
-   13040:	189b      	adds	r3, r3, r2
-   13042:	6018      	str	r0, [r3, #0]
-   13044:	6059      	str	r1, [r3, #4]
-   13046:	990f      	ldr	r1, [sp, #60]
-   13048:	3101      	adds	r1, #1
-   1304a:	910f      	str	r1, [sp, #60]
-   1304c:	3f01      	subs	r7, #1
-   1304e:	2f00      	cmp	r7, #0
-   13050:	db09      	blt.n	13066 <.text+0x13066>
-   13052:	00fa      	lsls	r2, r7, #3
-   13054:	ab4a      	add	r3, sp, #296
-   13056:	189b      	adds	r3, r3, r2
-   13058:	930e      	str	r3, [sp, #56]
-   1305a:	4b67      	ldr	r3, [pc, #412]	(131f8 <.text+0x131f8>)
-   1305c:	4a65      	ldr	r2, [pc, #404]	(131f4 <.text+0x131f4>)
-   1305e:	2600      	movs	r6, #0
-   13060:	9200      	str	r2, [sp, #0]
-   13062:	9301      	str	r3, [sp, #4]
-   13064:	e7e1      	b.n	1302a <.text+0x1302a>
-   13066:	9bb3      	ldr	r3, [sp, #716]
-   13068:	2b02      	cmp	r3, #2
-   1306a:	dc04      	bgt.n	13076 <.text+0x13076>
-   1306c:	2b01      	cmp	r3, #1
-   1306e:	da0e      	bge.n	1308e <.text+0x1308e>
-   13070:	2b00      	cmp	r3, #0
-   13072:	d014      	beq.n	1309e <.text+0x1309e>
-   13074:	e0e4      	b.n	13240 <.text+0x13240>
-   13076:	9cb3      	ldr	r4, [sp, #716]
-   13078:	2c03      	cmp	r4, #3
-   1307a:	d000      	beq.n	1307e <.text+0x1307e>
-   1307c:	e0e0      	b.n	13240 <.text+0x13240>
-   1307e:	9f06      	ldr	r7, [sp, #24]
-   13080:	3f01      	subs	r7, #1
-   13082:	00fa      	lsls	r2, r7, #3
-   13084:	970d      	str	r7, [sp, #52]
-   13086:	ab72      	add	r3, sp, #456
-   13088:	9f06      	ldr	r7, [sp, #24]
-   1308a:	189e      	adds	r6, r3, r2
-   1308c:	e06d      	b.n	1316a <.text+0x1316a>
-   1308e:	9806      	ldr	r0, [sp, #24]
-   13090:	ab72      	add	r3, sp, #456
-   13092:	00c2      	lsls	r2, r0, #3
-   13094:	1c04      	adds	r4, r0, #0
-   13096:	4958      	ldr	r1, [pc, #352]	(131f8 <.text+0x131f8>)
-   13098:	4856      	ldr	r0, [pc, #344]	(131f4 <.text+0x131f4>)
-   1309a:	189d      	adds	r5, r3, r2
-   1309c:	e01f      	b.n	130de <.text+0x130de>
-   1309e:	9906      	ldr	r1, [sp, #24]
-   130a0:	ab72      	add	r3, sp, #456
-   130a2:	00ca      	lsls	r2, r1, #3
-   130a4:	1c0c      	adds	r4, r1, #0
-   130a6:	4954      	ldr	r1, [pc, #336]	(131f8 <.text+0x131f8>)
-   130a8:	4852      	ldr	r0, [pc, #328]	(131f4 <.text+0x131f4>)
-   130aa:	189d      	adds	r5, r3, r2
-   130ac:	e005      	b.n	130ba <.text+0x130ba>
-   130ae:	682a      	ldr	r2, [r5, #0]
-   130b0:	686b      	ldr	r3, [r5, #4]
-   130b2:	f002 f877 	bl	151a4 <____adddf3_from_thumb>
-   130b6:	3c01      	subs	r4, #1
-   130b8:	3d08      	subs	r5, #8
-   130ba:	2c00      	cmp	r4, #0
-   130bc:	daf7      	bge.n	130ae <.text+0x130ae>
-   130be:	9a0c      	ldr	r2, [sp, #48]
-   130c0:	2a00      	cmp	r2, #0
-   130c2:	d002      	beq.n	130ca <.text+0x130ca>
-   130c4:	2780      	movs	r7, #128
-   130c6:	063f      	lsls	r7, r7, #24
-   130c8:	19c0      	adds	r0, r0, r7
-   130ca:	9a03      	ldr	r2, [sp, #12]
-   130cc:	6010      	str	r0, [r2, #0]
-   130ce:	6051      	str	r1, [r2, #4]
-   130d0:	e0b6      	b.n	13240 <.text+0x13240>
-   130d2:	682a      	ldr	r2, [r5, #0]
-   130d4:	686b      	ldr	r3, [r5, #4]
-   130d6:	f002 f865 	bl	151a4 <____adddf3_from_thumb>
-   130da:	3c01      	subs	r4, #1
-   130dc:	3d08      	subs	r5, #8
-   130de:	2c00      	cmp	r4, #0
-   130e0:	daf7      	bge.n	130d2 <.text+0x130d2>
-   130e2:	9c0c      	ldr	r4, [sp, #48]
-   130e4:	1c02      	adds	r2, r0, #0
-   130e6:	1c0b      	adds	r3, r1, #0
-   130e8:	2c00      	cmp	r4, #0
-   130ea:	d002      	beq.n	130f2 <.text+0x130f2>
-   130ec:	2780      	movs	r7, #128
-   130ee:	063f      	lsls	r7, r7, #24
-   130f0:	19c0      	adds	r0, r0, r7
-   130f2:	9c03      	ldr	r4, [sp, #12]
-   130f4:	6020      	str	r0, [r4, #0]
-   130f6:	6061      	str	r1, [r4, #4]
-   130f8:	9872      	ldr	r0, [sp, #456]
-   130fa:	9973      	ldr	r1, [sp, #460]
-   130fc:	f002 f856 	bl	151ac <____subdf3_from_thumb>
-   13100:	2401      	movs	r4, #1
-   13102:	e007      	b.n	13114 <.text+0x13114>
-   13104:	00e2      	lsls	r2, r4, #3
-   13106:	ab72      	add	r3, sp, #456
-   13108:	189b      	adds	r3, r3, r2
-   1310a:	681a      	ldr	r2, [r3, #0]
-   1310c:	685b      	ldr	r3, [r3, #4]
-   1310e:	f002 f849 	bl	151a4 <____adddf3_from_thumb>
-   13112:	3401      	adds	r4, #1
-   13114:	9f06      	ldr	r7, [sp, #24]
-   13116:	42bc      	cmp	r4, r7
-   13118:	ddf4      	ble.n	13104 <.text+0x13104>
-   1311a:	9a0c      	ldr	r2, [sp, #48]
-   1311c:	2a00      	cmp	r2, #0
-   1311e:	d002      	beq.n	13126 <.text+0x13126>
-   13120:	2780      	movs	r7, #128
-   13122:	063f      	lsls	r7, r7, #24
-   13124:	19c0      	adds	r0, r0, r7
-   13126:	9a03      	ldr	r2, [sp, #12]
-   13128:	6090      	str	r0, [r2, #8]
-   1312a:	60d1      	str	r1, [r2, #12]
-   1312c:	e088      	b.n	13240 <.text+0x13240>
-   1312e:	68b0      	ldr	r0, [r6, #8]
-   13130:	68f1      	ldr	r1, [r6, #12]
-   13132:	6834      	ldr	r4, [r6, #0]
-   13134:	6875      	ldr	r5, [r6, #4]
-   13136:	901f      	str	r0, [sp, #124]
-   13138:	9120      	str	r1, [sp, #128]
-   1313a:	9a1f      	ldr	r2, [sp, #124]
-   1313c:	9b20      	ldr	r3, [sp, #128]
-   1313e:	1c20      	adds	r0, r4, #0
-   13140:	1c29      	adds	r1, r5, #0
-   13142:	f002 f82f 	bl	151a4 <____adddf3_from_thumb>
-   13146:	6030      	str	r0, [r6, #0]
-   13148:	6071      	str	r1, [r6, #4]
-   1314a:	1c20      	adds	r0, r4, #0
-   1314c:	6832      	ldr	r2, [r6, #0]
-   1314e:	6873      	ldr	r3, [r6, #4]
-   13150:	1c29      	adds	r1, r5, #0
-   13152:	f002 f82b 	bl	151ac <____subdf3_from_thumb>
-   13156:	1c02      	adds	r2, r0, #0
-   13158:	1c0b      	adds	r3, r1, #0
-   1315a:	981f      	ldr	r0, [sp, #124]
-   1315c:	9920      	ldr	r1, [sp, #128]
-   1315e:	f002 f821 	bl	151a4 <____adddf3_from_thumb>
-   13162:	3f01      	subs	r7, #1
-   13164:	60b0      	str	r0, [r6, #8]
-   13166:	60f1      	str	r1, [r6, #12]
-   13168:	3e08      	subs	r6, #8
-   1316a:	2f00      	cmp	r7, #0
-   1316c:	dcdf      	bgt.n	1312e <.text+0x1312e>
-   1316e:	990d      	ldr	r1, [sp, #52]
-   13170:	ab72      	add	r3, sp, #456
-   13172:	00ca      	lsls	r2, r1, #3
-   13174:	9f06      	ldr	r7, [sp, #24]
-   13176:	189e      	adds	r6, r3, r2
-   13178:	e01b      	b.n	131b2 <.text+0x131b2>
-   1317a:	6834      	ldr	r4, [r6, #0]
-   1317c:	6875      	ldr	r5, [r6, #4]
-   1317e:	68b2      	ldr	r2, [r6, #8]
-   13180:	68f3      	ldr	r3, [r6, #12]
-   13182:	1c20      	adds	r0, r4, #0
-   13184:	1c29      	adds	r1, r5, #0
-   13186:	921d      	str	r2, [sp, #116]
-   13188:	931e      	str	r3, [sp, #120]
-   1318a:	f002 f80b 	bl	151a4 <____adddf3_from_thumb>
-   1318e:	6030      	str	r0, [r6, #0]
-   13190:	6071      	str	r1, [r6, #4]
-   13192:	1c20      	adds	r0, r4, #0
-   13194:	6832      	ldr	r2, [r6, #0]
-   13196:	6873      	ldr	r3, [r6, #4]
-   13198:	1c29      	adds	r1, r5, #0
-   1319a:	f002 f807 	bl	151ac <____subdf3_from_thumb>
-   1319e:	1c02      	adds	r2, r0, #0
-   131a0:	1c0b      	adds	r3, r1, #0
-   131a2:	981d      	ldr	r0, [sp, #116]
-   131a4:	991e      	ldr	r1, [sp, #120]
-   131a6:	f001 fffd 	bl	151a4 <____adddf3_from_thumb>
-   131aa:	3f01      	subs	r7, #1
-   131ac:	60b0      	str	r0, [r6, #8]
-   131ae:	60f1      	str	r1, [r6, #12]
-   131b0:	3e08      	subs	r6, #8
-   131b2:	2f01      	cmp	r7, #1
-   131b4:	dce1      	bgt.n	1317a <.text+0x1317a>
-   131b6:	9b06      	ldr	r3, [sp, #24]
-   131b8:	9c06      	ldr	r4, [sp, #24]
-   131ba:	00da      	lsls	r2, r3, #3
-   131bc:	490e      	ldr	r1, [pc, #56]	(131f8 <.text+0x131f8>)
-   131be:	480d      	ldr	r0, [pc, #52]	(131f4 <.text+0x131f4>)
-   131c0:	ab72      	add	r3, sp, #456
-   131c2:	189d      	adds	r5, r3, r2
-   131c4:	e005      	b.n	131d2 <.text+0x131d2>
-   131c6:	682a      	ldr	r2, [r5, #0]
-   131c8:	686b      	ldr	r3, [r5, #4]
-   131ca:	f001 ffeb 	bl	151a4 <____adddf3_from_thumb>
-   131ce:	3c01      	subs	r4, #1
-   131d0:	3d08      	subs	r5, #8
-   131d2:	2c01      	cmp	r4, #1
-   131d4:	dcf7      	bgt.n	131c6 <.text+0x131c6>
-   131d6:	9c0c      	ldr	r4, [sp, #48]
-   131d8:	2c00      	cmp	r4, #0
-   131da:	d121      	bne.n	13220 <.text+0x13220>
-   131dc:	9b72      	ldr	r3, [sp, #456]
-   131de:	9c73      	ldr	r4, [sp, #460]
-   131e0:	9f03      	ldr	r7, [sp, #12]
-   131e2:	603b      	str	r3, [r7, #0]
-   131e4:	607c      	str	r4, [r7, #4]
-   131e6:	9b74      	ldr	r3, [sp, #464]
-   131e8:	9c75      	ldr	r4, [sp, #468]
-   131ea:	6138      	str	r0, [r7, #16]
-   131ec:	6179      	str	r1, [r7, #20]
-   131ee:	60bb      	str	r3, [r7, #8]
-   131f0:	60fc      	str	r4, [r7, #12]
-   131f2:	e025      	b.n	13240 <.text+0x13240>
-	...
-   131fc:	0000      	lsls	r0, r0, #0
-   131fe:	4170      	adcs	r0, r6
-   13200:	0000      	lsls	r0, r0, #0
-   13202:	0000      	lsls	r0, r0, #0
-   13204:	0000      	lsls	r0, r0, #0
-   13206:	3e70      	subs	r6, #112
-   13208:	0000      	lsls	r0, r0, #0
-   1320a:	0000      	lsls	r0, r0, #0
-   1320c:	0000      	lsls	r0, r0, #0
-   1320e:	c170      	stmia	r1!, {r4, r5, r6}
-   13210:	0000      	lsls	r0, r0, #0
-   13212:	0000      	lsls	r0, r0, #0
-   13214:	0000      	lsls	r0, r0, #0
-   13216:	3ff0      	subs	r7, #240
-   13218:	0000      	lsls	r0, r0, #0
-   1321a:	0000      	lsls	r0, r0, #0
-   1321c:	5848      	ldr	r0, [r1, r1]
-   1321e:	0001      	lsls	r1, r0, #0
-   13220:	9b72      	ldr	r3, [sp, #456]
-   13222:	2480      	movs	r4, #128
-   13224:	9f03      	ldr	r7, [sp, #12]
-   13226:	0624      	lsls	r4, r4, #24
-   13228:	191b      	adds	r3, r3, r4
-   1322a:	603b      	str	r3, [r7, #0]
-   1322c:	9b73      	ldr	r3, [sp, #460]
-   1322e:	607b      	str	r3, [r7, #4]
-   13230:	9b74      	ldr	r3, [sp, #464]
-   13232:	191b      	adds	r3, r3, r4
-   13234:	60bb      	str	r3, [r7, #8]
-   13236:	9b75      	ldr	r3, [sp, #468]
-   13238:	60fb      	str	r3, [r7, #12]
-   1323a:	1903      	adds	r3, r0, r4
-   1323c:	613b      	str	r3, [r7, #16]
-   1323e:	6179      	str	r1, [r7, #20]
-   13240:	9809      	ldr	r0, [sp, #36]
-   13242:	2307      	movs	r3, #7
-   13244:	4018      	ands	r0, r3
-   13246:	23ae      	movs	r3, #174
-   13248:	009b      	lsls	r3, r3, #2
-   1324a:	449d      	add	sp, r3
-   1324c:	bcf0      	pop	{r4, r5, r6, r7}
-   1324e:	bc02      	pop	{r1}
-   13250:	4708      	bx	r1
-   13252:	46c0      	nop			(mov r8, r8)
-
-00013254 <__kernel_sin>:
-   13254:	b5f0      	push	{r4, r5, r6, r7, lr}
-   13256:	b088      	sub	sp, #32
-   13258:	9200      	str	r2, [sp, #0]
-   1325a:	9301      	str	r3, [sp, #4]
-   1325c:	4a4b      	ldr	r2, [pc, #300]	(1338c <.text+0x1338c>)
-   1325e:	4b4c      	ldr	r3, [pc, #304]	(13390 <.text+0x13390>)
-   13260:	4002      	ands	r2, r0
-   13262:	9002      	str	r0, [sp, #8]
-   13264:	9103      	str	r1, [sp, #12]
-   13266:	429a      	cmp	r2, r3
-   13268:	dc04      	bgt.n	13274 <__kernel_sin+0x20>
-   1326a:	f001 ffa7 	bl	151bc <____fixdfsi_from_thumb>
-   1326e:	2800      	cmp	r0, #0
-   13270:	d100      	bne.n	13274 <__kernel_sin+0x20>
-   13272:	e085      	b.n	13380 <__kernel_sin+0x12c>
-   13274:	9802      	ldr	r0, [sp, #8]
-   13276:	9903      	ldr	r1, [sp, #12]
-   13278:	1c02      	adds	r2, r0, #0
-   1327a:	1c0b      	adds	r3, r1, #0
-   1327c:	f001 ff9a 	bl	151b4 <____muldf3_from_thumb>
-   13280:	9a02      	ldr	r2, [sp, #8]
-   13282:	9b03      	ldr	r3, [sp, #12]
-   13284:	1c06      	adds	r6, r0, #0
-   13286:	1c0f      	adds	r7, r1, #0
-   13288:	f001 ff94 	bl	151b4 <____muldf3_from_thumb>
-   1328c:	4a41      	ldr	r2, [pc, #260]	(13394 <.text+0x13394>)
-   1328e:	4b42      	ldr	r3, [pc, #264]	(13398 <.text+0x13398>)
-   13290:	9006      	str	r0, [sp, #24]
-   13292:	9107      	str	r1, [sp, #28]
-   13294:	1c30      	adds	r0, r6, #0
-   13296:	1c39      	adds	r1, r7, #0
-   13298:	f001 ff8c 	bl	151b4 <____muldf3_from_thumb>
-   1329c:	4a3f      	ldr	r2, [pc, #252]	(1339c <.text+0x1339c>)
-   1329e:	4b40      	ldr	r3, [pc, #256]	(133a0 <.text+0x133a0>)
-   132a0:	f001 ff84 	bl	151ac <____subdf3_from_thumb>
-   132a4:	1c02      	adds	r2, r0, #0
-   132a6:	1c0b      	adds	r3, r1, #0
-   132a8:	1c30      	adds	r0, r6, #0
-   132aa:	1c39      	adds	r1, r7, #0
-   132ac:	f001 ff82 	bl	151b4 <____muldf3_from_thumb>
-   132b0:	4a3c      	ldr	r2, [pc, #240]	(133a4 <.text+0x133a4>)
-   132b2:	4b3d      	ldr	r3, [pc, #244]	(133a8 <.text+0x133a8>)
-   132b4:	f001 ff76 	bl	151a4 <____adddf3_from_thumb>
-   132b8:	1c02      	adds	r2, r0, #0
-   132ba:	1c0b      	adds	r3, r1, #0
-   132bc:	1c30      	adds	r0, r6, #0
-   132be:	1c39      	adds	r1, r7, #0
-   132c0:	f001 ff78 	bl	151b4 <____muldf3_from_thumb>
-   132c4:	4a39      	ldr	r2, [pc, #228]	(133ac <.text+0x133ac>)
-   132c6:	4b3a      	ldr	r3, [pc, #232]	(133b0 <.text+0x133b0>)
-   132c8:	f001 ff70 	bl	151ac <____subdf3_from_thumb>
-   132cc:	1c02      	adds	r2, r0, #0
-   132ce:	1c0b      	adds	r3, r1, #0
-   132d0:	1c30      	adds	r0, r6, #0
-   132d2:	1c39      	adds	r1, r7, #0
-   132d4:	f001 ff6e 	bl	151b4 <____muldf3_from_thumb>
-   132d8:	4a36      	ldr	r2, [pc, #216]	(133b4 <.text+0x133b4>)
-   132da:	4b37      	ldr	r3, [pc, #220]	(133b8 <.text+0x133b8>)
-   132dc:	f001 ff62 	bl	151a4 <____adddf3_from_thumb>
-   132e0:	9b0d      	ldr	r3, [sp, #52]
-   132e2:	9004      	str	r0, [sp, #16]
-   132e4:	9105      	str	r1, [sp, #20]
-   132e6:	2b00      	cmp	r3, #0
-   132e8:	d116      	bne.n	13318 <__kernel_sin+0xc4>
-   132ea:	9a04      	ldr	r2, [sp, #16]
-   132ec:	9b05      	ldr	r3, [sp, #20]
-   132ee:	1c30      	adds	r0, r6, #0
-   132f0:	1c39      	adds	r1, r7, #0
-   132f2:	f001 ff5f 	bl	151b4 <____muldf3_from_thumb>
-   132f6:	4a31      	ldr	r2, [pc, #196]	(133bc <.text+0x133bc>)
-   132f8:	4b31      	ldr	r3, [pc, #196]	(133c0 <.text+0x133c0>)
-   132fa:	f001 ff57 	bl	151ac <____subdf3_from_thumb>
-   132fe:	1c02      	adds	r2, r0, #0
-   13300:	1c0b      	adds	r3, r1, #0
-   13302:	9806      	ldr	r0, [sp, #24]
-   13304:	9907      	ldr	r1, [sp, #28]
-   13306:	f001 ff55 	bl	151b4 <____muldf3_from_thumb>
-   1330a:	1c02      	adds	r2, r0, #0
-   1330c:	1c0b      	adds	r3, r1, #0
-   1330e:	9802      	ldr	r0, [sp, #8]
-   13310:	9903      	ldr	r1, [sp, #12]
-   13312:	f001 ff47 	bl	151a4 <____adddf3_from_thumb>
-   13316:	e031      	b.n	1337c <__kernel_sin+0x128>
-   13318:	4a2a      	ldr	r2, [pc, #168]	(133c4 <.text+0x133c4>)
-   1331a:	4b2b      	ldr	r3, [pc, #172]	(133c8 <.text+0x133c8>)
-   1331c:	9800      	ldr	r0, [sp, #0]
-   1331e:	9901      	ldr	r1, [sp, #4]
-   13320:	f001 ff48 	bl	151b4 <____muldf3_from_thumb>
-   13324:	9a04      	ldr	r2, [sp, #16]
-   13326:	9b05      	ldr	r3, [sp, #20]
-   13328:	1c04      	adds	r4, r0, #0
-   1332a:	1c0d      	adds	r5, r1, #0
-   1332c:	9806      	ldr	r0, [sp, #24]
-   1332e:	9907      	ldr	r1, [sp, #28]
-   13330:	f001 ff40 	bl	151b4 <____muldf3_from_thumb>
-   13334:	1c02      	adds	r2, r0, #0
-   13336:	1c0b      	adds	r3, r1, #0
-   13338:	1c20      	adds	r0, r4, #0
-   1333a:	1c29      	adds	r1, r5, #0
-   1333c:	f001 ff36 	bl	151ac <____subdf3_from_thumb>
-   13340:	1c02      	adds	r2, r0, #0
-   13342:	1c0b      	adds	r3, r1, #0
-   13344:	1c30      	adds	r0, r6, #0
-   13346:	1c39      	adds	r1, r7, #0
-   13348:	f001 ff34 	bl	151b4 <____muldf3_from_thumb>
-   1334c:	9a00      	ldr	r2, [sp, #0]
-   1334e:	9b01      	ldr	r3, [sp, #4]
-   13350:	f001 ff2c 	bl	151ac <____subdf3_from_thumb>
-   13354:	4a19      	ldr	r2, [pc, #100]	(133bc <.text+0x133bc>)
-   13356:	4b1a      	ldr	r3, [pc, #104]	(133c0 <.text+0x133c0>)
-   13358:	1c04      	adds	r4, r0, #0
-   1335a:	1c0d      	adds	r5, r1, #0
-   1335c:	9806      	ldr	r0, [sp, #24]
-   1335e:	9907      	ldr	r1, [sp, #28]
-   13360:	f001 ff28 	bl	151b4 <____muldf3_from_thumb>
-   13364:	1c02      	adds	r2, r0, #0
-   13366:	1c0b      	adds	r3, r1, #0
-   13368:	1c20      	adds	r0, r4, #0
-   1336a:	1c29      	adds	r1, r5, #0
-   1336c:	f001 ff1a 	bl	151a4 <____adddf3_from_thumb>
-   13370:	1c02      	adds	r2, r0, #0
-   13372:	1c0b      	adds	r3, r1, #0
-   13374:	9802      	ldr	r0, [sp, #8]
-   13376:	9903      	ldr	r1, [sp, #12]
-   13378:	f001 ff18 	bl	151ac <____subdf3_from_thumb>
-   1337c:	9002      	str	r0, [sp, #8]
-   1337e:	9103      	str	r1, [sp, #12]
-   13380:	9802      	ldr	r0, [sp, #8]
-   13382:	9903      	ldr	r1, [sp, #12]
-   13384:	b008      	add	sp, #32
-   13386:	bcf0      	pop	{r4, r5, r6, r7}
-   13388:	bc04      	pop	{r2}
-   1338a:	4710      	bx	r2
-   1338c:	ffff 7fff 	undefined
-   13390:	ffff 3e3f 	vcvt.f32.u32	d19, d31, #1
-   13394:	d93a      	bls.n	1340c <floor+0xc>
-   13396:	3de5      	subs	r5, #229
-   13398:	d57c      	bpl.n	13494 <floor+0x94>
-   1339a:	5acf      	ldrh	r7, [r1, r3]
-   1339c:	e5e6      	b.n	12f6c <.text+0x12f6c>
-   1339e:	3e5a      	subs	r6, #90
-   133a0:	9ceb      	ldr	r4, [sp, #940]
-   133a2:	8a2b      	ldrh	r3, [r5, #16]
-   133a4:	1de3      	adds	r3, r4, #7
-   133a6:	3ec7      	subs	r6, #199
-   133a8:	fe7d 57b1 	mrc2	7, 3, r5, cr13, cr1, {5}
-   133ac:	01a0      	lsls	r0, r4, #6
-   133ae:	3f2a      	subs	r7, #42
-   133b0:	61d5      	str	r5, [r2, #28]
-   133b2:	19c1      	adds	r1, r0, r7
-   133b4:	1111      	asrs	r1, r2, #4
-   133b6:	3f81      	subs	r7, #129
-   133b8:	f8a6 1110 	strh.w	r1, [r6, #272]
-   133bc:	5555      	strb	r5, [r2, r5]
-   133be:	3fc5      	subs	r7, #197
-   133c0:	5549      	strb	r1, [r1, r5]
-   133c2:	5555      	strb	r5, [r2, r5]
-   133c4:	0000      	lsls	r0, r0, #0
-   133c6:	3fe0      	subs	r7, #224
-   133c8:	0000      	lsls	r0, r0, #0
-	...
-
-000133cc <fabs>:
-   133cc:	b510      	push	{r4, lr}
-   133ce:	1c03      	adds	r3, r0, #0
-   133d0:	4803      	ldr	r0, [pc, #12]	(133e0 <.text+0x133e0>)
-   133d2:	1c0a      	adds	r2, r1, #0
-   133d4:	4003      	ands	r3, r0
-   133d6:	1c18      	adds	r0, r3, #0
-   133d8:	1c11      	adds	r1, r2, #0
-   133da:	bc10      	pop	{r4}
-   133dc:	bc04      	pop	{r2}
-   133de:	4710      	bx	r2
-   133e0:	ffff 7fff 	undefined
-
-000133e4 <finite>:
-   133e4:	b510      	push	{r4, lr}
-   133e6:	1c03      	adds	r3, r0, #0
-   133e8:	4803      	ldr	r0, [pc, #12]	(133f8 <.text+0x133f8>)
-   133ea:	4018      	ands	r0, r3
-   133ec:	4b03      	ldr	r3, [pc, #12]	(133fc <.text+0x133fc>)
-   133ee:	18c0      	adds	r0, r0, r3
-   133f0:	0fc0      	lsrs	r0, r0, #31
-   133f2:	bc10      	pop	{r4}
-   133f4:	bc02      	pop	{r1}
-   133f6:	4708      	bx	r1
-   133f8:	ffff 7fff 	undefined
-   133fc:	0000      	lsls	r0, r0, #0
-   133fe:	8010      	strh	r0, [r2, #0]
-
-00013400 <floor>:
-   13400:	b5f0      	push	{r4, r5, r6, r7, lr}
-   13402:	2200      	movs	r2, #0
-   13404:	2300      	movs	r3, #0
-   13406:	b085      	sub	sp, #20
-   13408:	9200      	str	r2, [sp, #0]
-   1340a:	9301      	str	r3, [sp, #4]
-   1340c:	0043      	lsls	r3, r0, #1
-   1340e:	0d5a      	lsrs	r2, r3, #21
-   13410:	4b3d      	ldr	r3, [pc, #244]	(13508 <.text+0x13508>)
-   13412:	18d4      	adds	r4, r2, r3
-   13414:	1c05      	adds	r5, r0, #0
-   13416:	1c0e      	adds	r6, r1, #0
-   13418:	1c07      	adds	r7, r0, #0
-   1341a:	9102      	str	r1, [sp, #8]
-   1341c:	2c13      	cmp	r4, #19
-   1341e:	dc34      	bgt.n	1348a <floor+0x8a>
-   13420:	2c00      	cmp	r4, #0
-   13422:	da16      	bge.n	13452 <floor+0x52>
-   13424:	4a39      	ldr	r2, [pc, #228]	(1350c <.text+0x1350c>)
-   13426:	4b3a      	ldr	r3, [pc, #232]	(13510 <.text+0x13510>)
-   13428:	f001 febc 	bl	151a4 <____adddf3_from_thumb>
-   1342c:	4a39      	ldr	r2, [pc, #228]	(13514 <.text+0x13514>)
-   1342e:	4b3a      	ldr	r3, [pc, #232]	(13518 <.text+0x13518>)
-   13430:	f001 fecc 	bl	151cc <____gtdf2_from_thumb>
-   13434:	2800      	cmp	r0, #0
-   13436:	dd5c      	ble.n	134f2 <floor+0xf2>
-   13438:	2d00      	cmp	r5, #0
-   1343a:	db02      	blt.n	13442 <floor+0x42>
-   1343c:	2700      	movs	r7, #0
-   1343e:	9702      	str	r7, [sp, #8]
-   13440:	e057      	b.n	134f2 <floor+0xf2>
-   13442:	4b36      	ldr	r3, [pc, #216]	(1351c <.text+0x1351c>)
-   13444:	9c02      	ldr	r4, [sp, #8]
-   13446:	402b      	ands	r3, r5
-   13448:	431c      	orrs	r4, r3
-   1344a:	d052      	beq.n	134f2 <floor+0xf2>
-   1344c:	4f34      	ldr	r7, [pc, #208]	(13520 <.text+0x13520>)
-   1344e:	2200      	movs	r2, #0
-   13450:	e04e      	b.n	134f0 <floor+0xf0>
-   13452:	4b34      	ldr	r3, [pc, #208]	(13524 <.text+0x13524>)
-   13454:	9a02      	ldr	r2, [sp, #8]
-   13456:	4123      	asrs	r3, r4
-   13458:	9304      	str	r3, [sp, #16]
-   1345a:	4003      	ands	r3, r0
-   1345c:	431a      	orrs	r2, r3
-   1345e:	d04d      	beq.n	134fc <floor+0xfc>
-   13460:	4a2a      	ldr	r2, [pc, #168]	(1350c <.text+0x1350c>)
-   13462:	4b2b      	ldr	r3, [pc, #172]	(13510 <.text+0x13510>)
-   13464:	f001 fe9e 	bl	151a4 <____adddf3_from_thumb>
-   13468:	4a2a      	ldr	r2, [pc, #168]	(13514 <.text+0x13514>)
-   1346a:	4b2b      	ldr	r3, [pc, #172]	(13518 <.text+0x13518>)
-   1346c:	f001 feae 	bl	151cc <____gtdf2_from_thumb>
-   13470:	2800      	cmp	r0, #0
-   13472:	dd3e      	ble.n	134f2 <floor+0xf2>
-   13474:	2d00      	cmp	r5, #0
-   13476:	da03      	bge.n	13480 <floor+0x80>
-   13478:	2380      	movs	r3, #128
-   1347a:	035b      	lsls	r3, r3, #13
-   1347c:	4123      	asrs	r3, r4
-   1347e:	18ef      	adds	r7, r5, r3
-   13480:	9b04      	ldr	r3, [sp, #16]
-   13482:	2400      	movs	r4, #0
-   13484:	439f      	bics	r7, r3
-   13486:	9402      	str	r4, [sp, #8]
-   13488:	e033      	b.n	134f2 <floor+0xf2>
-   1348a:	2c33      	cmp	r4, #51
-   1348c:	dd0a      	ble.n	134a4 <floor+0xa4>
-   1348e:	2380      	movs	r3, #128
-   13490:	00db      	lsls	r3, r3, #3
-   13492:	429c      	cmp	r4, r3
-   13494:	d132      	bne.n	134fc <floor+0xfc>
-   13496:	1c2a      	adds	r2, r5, #0
-   13498:	1c33      	adds	r3, r6, #0
-   1349a:	f001 fe83 	bl	151a4 <____adddf3_from_thumb>
-   1349e:	1c05      	adds	r5, r0, #0
-   134a0:	1c0e      	adds	r6, r1, #0
-   134a2:	e02b      	b.n	134fc <floor+0xfc>
-   134a4:	4b20      	ldr	r3, [pc, #128]	(13528 <.text+0x13528>)
-   134a6:	18d2      	adds	r2, r2, r3
-   134a8:	2301      	movs	r3, #1
-   134aa:	425b      	negs	r3, r3
-   134ac:	40d3      	lsrs	r3, r2
-   134ae:	9a02      	ldr	r2, [sp, #8]
-   134b0:	9303      	str	r3, [sp, #12]
-   134b2:	421a      	tst	r2, r3
-   134b4:	d022      	beq.n	134fc <floor+0xfc>
-   134b6:	4a15      	ldr	r2, [pc, #84]	(1350c <.text+0x1350c>)
-   134b8:	4b15      	ldr	r3, [pc, #84]	(13510 <.text+0x13510>)
-   134ba:	f001 fe73 	bl	151a4 <____adddf3_from_thumb>
-   134be:	4a15      	ldr	r2, [pc, #84]	(13514 <.text+0x13514>)
-   134c0:	4b15      	ldr	r3, [pc, #84]	(13518 <.text+0x13518>)
-   134c2:	f001 fe83 	bl	151cc <____gtdf2_from_thumb>
-   134c6:	2800      	cmp	r0, #0
-   134c8:	dd13      	ble.n	134f2 <floor+0xf2>
-   134ca:	2d00      	cmp	r5, #0
-   134cc:	da0d      	bge.n	134ea <floor+0xea>
-   134ce:	2c14      	cmp	r4, #20
-   134d0:	d101      	bne.n	134d6 <floor+0xd6>
-   134d2:	3701      	adds	r7, #1
-   134d4:	e009      	b.n	134ea <floor+0xea>
-   134d6:	2234      	movs	r2, #52
-   134d8:	1b12      	subs	r2, r2, r4
-   134da:	2301      	movs	r3, #1
-   134dc:	9c02      	ldr	r4, [sp, #8]
-   134de:	4093      	lsls	r3, r2
-   134e0:	18e3      	adds	r3, r4, r3
-   134e2:	42a3      	cmp	r3, r4
-   134e4:	d200      	bcs.n	134e8 <floor+0xe8>
-   134e6:	3701      	adds	r7, #1
-   134e8:	9302      	str	r3, [sp, #8]
-   134ea:	9a02      	ldr	r2, [sp, #8]
-   134ec:	9b03      	ldr	r3, [sp, #12]
-   134ee:	439a      	bics	r2, r3
-   134f0:	9202      	str	r2, [sp, #8]
-   134f2:	9c02      	ldr	r4, [sp, #8]
-   134f4:	9700      	str	r7, [sp, #0]
-   134f6:	9401      	str	r4, [sp, #4]
-   134f8:	9d00      	ldr	r5, [sp, #0]
-   134fa:	9e01      	ldr	r6, [sp, #4]
-   134fc:	1c28      	adds	r0, r5, #0
-   134fe:	1c31      	adds	r1, r6, #0
-   13500:	b005      	add	sp, #20
-   13502:	bcf0      	pop	{r4, r5, r6, r7}
-   13504:	bc04      	pop	{r2}
-   13506:	4710      	bx	r2
-   13508:	fc01 ffff 	stc2	15, cr15, [r1], {255}
-   1350c:	e43c      	b.n	12d88 <__kernel_rem_pio2+0x278>
-   1350e:	7e37      	ldrb	r7, [r6, #24]
-   13510:	759c      	strb	r4, [r3, #22]
-   13512:	8800      	ldrh	r0, [r0, #0]
-	...
-   1351c:	ffff 7fff 	undefined
-   13520:	0000      	lsls	r0, r0, #0
-   13522:	bff0      	nop	{15}
-   13524:	ffff 000f 	vaddl.u<illegal width 64>	q8, d15, d15
-   13528:	fbed ffff 	undefined
-
-0001352c <matherr>:
-   1352c:	2000      	movs	r0, #0
-   1352e:	4770      	bx	lr
-
-00013530 <rint>:
-   13530:	b5f0      	push	{r4, r5, r6, r7, lr}
-   13532:	2200      	movs	r2, #0
-   13534:	2300      	movs	r3, #0
-   13536:	b085      	sub	sp, #20
-   13538:	9200      	str	r2, [sp, #0]
-   1353a:	9301      	str	r3, [sp, #4]
-   1353c:	0fc3      	lsrs	r3, r0, #31
-   1353e:	9302      	str	r3, [sp, #8]
-   13540:	4a48      	ldr	r2, [pc, #288]	(13664 <.text+0x13664>)
-   13542:	0043      	lsls	r3, r0, #1
-   13544:	0d5b      	lsrs	r3, r3, #21
-   13546:	1c05      	adds	r5, r0, #0
-   13548:	1c0e      	adds	r6, r1, #0
-   1354a:	1c0c      	adds	r4, r1, #0
-   1354c:	1c01      	adds	r1, r0, #0
-   1354e:	1898      	adds	r0, r3, r2
-   13550:	2813      	cmp	r0, #19
-   13552:	dc4a      	bgt.n	135ea <rint+0xba>
-   13554:	2800      	cmp	r0, #0
-   13556:	da31      	bge.n	135bc <rint+0x8c>
-   13558:	4b43      	ldr	r3, [pc, #268]	(13668 <.text+0x13668>)
-   1355a:	402b      	ands	r3, r5
-   1355c:	4333      	orrs	r3, r6
-   1355e:	d07a      	beq.n	13656 <rint+0x126>
-   13560:	4b42      	ldr	r3, [pc, #264]	(1366c <.text+0x1366c>)
-   13562:	1c32      	adds	r2, r6, #0
-   13564:	402b      	ands	r3, r5
-   13566:	431a      	orrs	r2, r3
-   13568:	4b41      	ldr	r3, [pc, #260]	(13670 <.text+0x13670>)
-   1356a:	4019      	ands	r1, r3
-   1356c:	4253      	negs	r3, r2
-   1356e:	431a      	orrs	r2, r3
-   13570:	2380      	movs	r3, #128
-   13572:	031b      	lsls	r3, r3, #12
-   13574:	0b12      	lsrs	r2, r2, #12
-   13576:	401a      	ands	r2, r3
-   13578:	1c0c      	adds	r4, r1, #0
-   1357a:	9802      	ldr	r0, [sp, #8]
-   1357c:	4314      	orrs	r4, r2
-   1357e:	4a3d      	ldr	r2, [pc, #244]	(13674 <.text+0x13674>)
-   13580:	00c3      	lsls	r3, r0, #3
-   13582:	189b      	adds	r3, r3, r2
-   13584:	1c35      	adds	r5, r6, #0
-   13586:	681e      	ldr	r6, [r3, #0]
-   13588:	685f      	ldr	r7, [r3, #4]
-   1358a:	1c22      	adds	r2, r4, #0
-   1358c:	1c2b      	adds	r3, r5, #0
-   1358e:	1c30      	adds	r0, r6, #0
-   13590:	1c39      	adds	r1, r7, #0
-   13592:	f001 fe07 	bl	151a4 <____adddf3_from_thumb>
-   13596:	9003      	str	r0, [sp, #12]
-   13598:	9104      	str	r1, [sp, #16]
-   1359a:	1c32      	adds	r2, r6, #0
-   1359c:	1c3b      	adds	r3, r7, #0
-   1359e:	9803      	ldr	r0, [sp, #12]
-   135a0:	9904      	ldr	r1, [sp, #16]
-   135a2:	f001 fe03 	bl	151ac <____subdf3_from_thumb>
-   135a6:	1c0c      	adds	r4, r1, #0
-   135a8:	492f      	ldr	r1, [pc, #188]	(13668 <.text+0x13668>)
-   135aa:	1c05      	adds	r5, r0, #0
-   135ac:	9802      	ldr	r0, [sp, #8]
-   135ae:	4029      	ands	r1, r5
-   135b0:	07c2      	lsls	r2, r0, #31
-   135b2:	1c0b      	adds	r3, r1, #0
-   135b4:	4313      	orrs	r3, r2
-   135b6:	1c1d      	adds	r5, r3, #0
-   135b8:	1c26      	adds	r6, r4, #0
-   135ba:	e04c      	b.n	13656 <rint+0x126>
-   135bc:	4b2b      	ldr	r3, [pc, #172]	(1366c <.text+0x1366c>)
-   135be:	1c1a      	adds	r2, r3, #0
-   135c0:	4102      	asrs	r2, r0
-   135c2:	1c2b      	adds	r3, r5, #0
-   135c4:	4013      	ands	r3, r2
-   135c6:	4333      	orrs	r3, r6
-   135c8:	d045      	beq.n	13656 <rint+0x126>
-   135ca:	0852      	lsrs	r2, r2, #1
-   135cc:	1c2b      	adds	r3, r5, #0
-   135ce:	4013      	ands	r3, r2
-   135d0:	4333      	orrs	r3, r6
-   135d2:	d028      	beq.n	13626 <rint+0xf6>
-   135d4:	2813      	cmp	r0, #19
-   135d6:	d102      	bne.n	135de <rint+0xae>
-   135d8:	2480      	movs	r4, #128
-   135da:	05e4      	lsls	r4, r4, #23
-   135dc:	e023      	b.n	13626 <rint+0xf6>
-   135de:	2380      	movs	r3, #128
-   135e0:	029b      	lsls	r3, r3, #10
-   135e2:	4391      	bics	r1, r2
-   135e4:	4103      	asrs	r3, r0
-   135e6:	4319      	orrs	r1, r3
-   135e8:	e01d      	b.n	13626 <rint+0xf6>
-   135ea:	2833      	cmp	r0, #51
-   135ec:	dd0a      	ble.n	13604 <rint+0xd4>
-   135ee:	2380      	movs	r3, #128
-   135f0:	00db      	lsls	r3, r3, #3
-   135f2:	4298      	cmp	r0, r3
-   135f4:	d12f      	bne.n	13656 <rint+0x126>
-   135f6:	1c28      	adds	r0, r5, #0
-   135f8:	1c31      	adds	r1, r6, #0
-   135fa:	1c2a      	adds	r2, r5, #0
-   135fc:	1c33      	adds	r3, r6, #0
-   135fe:	f001 fdd1 	bl	151a4 <____adddf3_from_thumb>
-   13602:	e026      	b.n	13652 <rint+0x122>
-   13604:	4a1c      	ldr	r2, [pc, #112]	(13678 <.text+0x13678>)
-   13606:	1898      	adds	r0, r3, r2
-   13608:	2301      	movs	r3, #1
-   1360a:	425b      	negs	r3, r3
-   1360c:	40c3      	lsrs	r3, r0
-   1360e:	421e      	tst	r6, r3
-   13610:	d021      	beq.n	13656 <rint+0x126>
-   13612:	085b      	lsrs	r3, r3, #1
-   13614:	421e      	tst	r6, r3
-   13616:	d006      	beq.n	13626 <rint+0xf6>
-   13618:	1c32      	adds	r2, r6, #0
-   1361a:	439a      	bics	r2, r3
-   1361c:	2380      	movs	r3, #128
-   1361e:	05db      	lsls	r3, r3, #23
-   13620:	4103      	asrs	r3, r0
-   13622:	1c14      	adds	r4, r2, #0
-   13624:	431c      	orrs	r4, r3
-   13626:	9401      	str	r4, [sp, #4]
-   13628:	9c02      	ldr	r4, [sp, #8]
-   1362a:	4a12      	ldr	r2, [pc, #72]	(13674 <.text+0x13674>)
-   1362c:	00e3      	lsls	r3, r4, #3
-   1362e:	189b      	adds	r3, r3, r2
-   13630:	681c      	ldr	r4, [r3, #0]
-   13632:	685d      	ldr	r5, [r3, #4]
-   13634:	9100      	str	r1, [sp, #0]
-   13636:	9a00      	ldr	r2, [sp, #0]
-   13638:	9b01      	ldr	r3, [sp, #4]
-   1363a:	1c20      	adds	r0, r4, #0
-   1363c:	1c29      	adds	r1, r5, #0
-   1363e:	f001 fdb1 	bl	151a4 <____adddf3_from_thumb>
-   13642:	9003      	str	r0, [sp, #12]
-   13644:	9104      	str	r1, [sp, #16]
-   13646:	9803      	ldr	r0, [sp, #12]
-   13648:	9904      	ldr	r1, [sp, #16]
-   1364a:	1c22      	adds	r2, r4, #0
-   1364c:	1c2b      	adds	r3, r5, #0
-   1364e:	f001 fdad 	bl	151ac <____subdf3_from_thumb>
-   13652:	1c05      	adds	r5, r0, #0
-   13654:	1c0e      	adds	r6, r1, #0
-   13656:	1c28      	adds	r0, r5, #0
-   13658:	1c31      	adds	r1, r6, #0
-   1365a:	b005      	add	sp, #20
-   1365c:	bcf0      	pop	{r4, r5, r6, r7}
-   1365e:	bc04      	pop	{r2}
-   13660:	4710      	bx	r2
-   13662:	0000      	lsls	r0, r0, #0
-   13664:	fc01 ffff 	stc2	15, cr15, [r1], {255}
-   13668:	ffff 7fff 	undefined
-   1366c:	ffff 000f 	vaddl.u<illegal width 64>	q8, d15, d15
-   13670:	0000      	lsls	r0, r0, #0
-   13672:	fffe 588c 	vtbl.8	d21, {d30}, d12
-   13676:	0001      	lsls	r1, r0, #0
-   13678:	fbed ffff 	undefined
-
-0001367c <scalbn>:
-   1367c:	b5f0      	push	{r4, r5, r6, r7, lr}
-   1367e:	4f34      	ldr	r7, [pc, #208]	(13750 <.text+0x13750>)
-   13680:	1c03      	adds	r3, r0, #0
-   13682:	b081      	sub	sp, #4
-   13684:	403b      	ands	r3, r7
-   13686:	9200      	str	r2, [sp, #0]
-   13688:	151a      	asrs	r2, r3, #20
-   1368a:	1c05      	adds	r5, r0, #0
-   1368c:	1c0e      	adds	r6, r1, #0
-   1368e:	2a00      	cmp	r2, #0
-   13690:	d117      	bne.n	136c2 <scalbn+0x46>
-   13692:	4b30      	ldr	r3, [pc, #192]	(13754 <.text+0x13754>)
-   13694:	4003      	ands	r3, r0
-   13696:	4319      	orrs	r1, r3
-   13698:	d054      	beq.n	13744 <scalbn+0xc8>
-   1369a:	4a2f      	ldr	r2, [pc, #188]	(13758 <.text+0x13758>)
-   1369c:	4b2f      	ldr	r3, [pc, #188]	(1375c <.text+0x1375c>)
-   1369e:	1c28      	adds	r0, r5, #0
-   136a0:	1c31      	adds	r1, r6, #0
-   136a2:	f001 fd87 	bl	151b4 <____muldf3_from_thumb>
-   136a6:	4b2e      	ldr	r3, [pc, #184]	(13760 <.text+0x13760>)
-   136a8:	9a00      	ldr	r2, [sp, #0]
-   136aa:	1c05      	adds	r5, r0, #0
-   136ac:	1c0e      	adds	r6, r1, #0
-   136ae:	429a      	cmp	r2, r3
-   136b0:	db05      	blt.n	136be <scalbn+0x42>
-   136b2:	1c03      	adds	r3, r0, #0
-   136b4:	403b      	ands	r3, r7
-   136b6:	151b      	asrs	r3, r3, #20
-   136b8:	1c1a      	adds	r2, r3, #0
-   136ba:	3a36      	subs	r2, #54
-   136bc:	e001      	b.n	136c2 <scalbn+0x46>
-   136be:	1c28      	adds	r0, r5, #0
-   136c0:	e02e      	b.n	13720 <scalbn+0xa4>
-   136c2:	4b28      	ldr	r3, [pc, #160]	(13764 <.text+0x13764>)
-   136c4:	429a      	cmp	r2, r3
-   136c6:	d106      	bne.n	136d6 <scalbn+0x5a>
-   136c8:	1c28      	adds	r0, r5, #0
-   136ca:	1c31      	adds	r1, r6, #0
-   136cc:	1c2a      	adds	r2, r5, #0
-   136ce:	1c33      	adds	r3, r6, #0
-   136d0:	f001 fd68 	bl	151a4 <____adddf3_from_thumb>
-   136d4:	e034      	b.n	13740 <scalbn+0xc4>
-   136d6:	9b00      	ldr	r3, [sp, #0]
-   136d8:	18d7      	adds	r7, r2, r3
-   136da:	4b23      	ldr	r3, [pc, #140]	(13768 <.text+0x13768>)
-   136dc:	429f      	cmp	r7, r3
-   136de:	dc10      	bgt.n	13702 <scalbn+0x86>
-   136e0:	2f00      	cmp	r7, #0
-   136e2:	dd07      	ble.n	136f4 <scalbn+0x78>
-   136e4:	4a21      	ldr	r2, [pc, #132]	(1376c <.text+0x1376c>)
-   136e6:	1c01      	adds	r1, r0, #0
-   136e8:	4011      	ands	r1, r2
-   136ea:	1c0b      	adds	r3, r1, #0
-   136ec:	053a      	lsls	r2, r7, #20
-   136ee:	4313      	orrs	r3, r2
-   136f0:	1c1d      	adds	r5, r3, #0
-   136f2:	e027      	b.n	13744 <scalbn+0xc8>
-   136f4:	1c3a      	adds	r2, r7, #0
-   136f6:	3236      	adds	r2, #54
-   136f8:	dc15      	bgt.n	13726 <scalbn+0xaa>
-   136fa:	4b1d      	ldr	r3, [pc, #116]	(13770 <.text+0x13770>)
-   136fc:	9a00      	ldr	r2, [sp, #0]
-   136fe:	429a      	cmp	r2, r3
-   13700:	dd08      	ble.n	13714 <scalbn+0x98>
-   13702:	1c2a      	adds	r2, r5, #0
-   13704:	1c33      	adds	r3, r6, #0
-   13706:	481b      	ldr	r0, [pc, #108]	(13774 <.text+0x13774>)
-   13708:	491b      	ldr	r1, [pc, #108]	(13778 <.text+0x13778>)
-   1370a:	f000 f83f 	bl	1378c <copysign>
-   1370e:	4a19      	ldr	r2, [pc, #100]	(13774 <.text+0x13774>)
-   13710:	4b19      	ldr	r3, [pc, #100]	(13778 <.text+0x13778>)
-   13712:	e013      	b.n	1373c <scalbn+0xc0>
-   13714:	4819      	ldr	r0, [pc, #100]	(1377c <.text+0x1377c>)
-   13716:	491a      	ldr	r1, [pc, #104]	(13780 <.text+0x13780>)
-   13718:	1c2a      	adds	r2, r5, #0
-   1371a:	1c33      	adds	r3, r6, #0
-   1371c:	f000 f836 	bl	1378c <copysign>
-   13720:	4a16      	ldr	r2, [pc, #88]	(1377c <.text+0x1377c>)
-   13722:	4b17      	ldr	r3, [pc, #92]	(13780 <.text+0x13780>)
-   13724:	e00a      	b.n	1373c <scalbn+0xc0>
-   13726:	4b11      	ldr	r3, [pc, #68]	(1376c <.text+0x1376c>)
-   13728:	4018      	ands	r0, r3
-   1372a:	1c3b      	adds	r3, r7, #0
-   1372c:	3336      	adds	r3, #54
-   1372e:	051b      	lsls	r3, r3, #20
-   13730:	1c01      	adds	r1, r0, #0
-   13732:	4319      	orrs	r1, r3
-   13734:	4a13      	ldr	r2, [pc, #76]	(13784 <.text+0x13784>)
-   13736:	4b14      	ldr	r3, [pc, #80]	(13788 <.text+0x13788>)
-   13738:	1c08      	adds	r0, r1, #0
-   1373a:	1c31      	adds	r1, r6, #0
-   1373c:	f001 fd3a 	bl	151b4 <____muldf3_from_thumb>
-   13740:	1c05      	adds	r5, r0, #0
-   13742:	1c0e      	adds	r6, r1, #0
-   13744:	1c28      	adds	r0, r5, #0
-   13746:	1c31      	adds	r1, r6, #0
-   13748:	b001      	add	sp, #4
-   1374a:	bcf0      	pop	{r4, r5, r6, r7}
-   1374c:	bc04      	pop	{r2}
-   1374e:	4710      	bx	r2
-   13750:	0000      	lsls	r0, r0, #0
-   13752:	7ff0      	ldrb	r0, [r6, #31]
-   13754:	ffff 7fff 	undefined
-   13758:	0000      	lsls	r0, r0, #0
-   1375a:	4350      	muls	r0, r2
-   1375c:	0000      	lsls	r0, r0, #0
-   1375e:	0000      	lsls	r0, r0, #0
-   13760:	3cb0      	subs	r4, #176
-   13762:	ffff 07ff 	vqshl.u64	q8, <illegal reg q15.5>, #63
-   13766:	0000      	lsls	r0, r0, #0
-   13768:	07fe      	lsls	r6, r7, #31
-   1376a:	0000      	lsls	r0, r0, #0
-   1376c:	ffff 800f 	vaddl.u<illegal width 64>	q12, d15, d15
-   13770:	c350      	stmia	r3!, {r4, r6}
-   13772:	0000      	lsls	r0, r0, #0
-   13774:	e43c      	b.n	12ff0 <.text+0x12ff0>
-   13776:	7e37      	ldrb	r7, [r6, #24]
-   13778:	759c      	strb	r4, [r3, #22]
-   1377a:	8800      	ldrh	r0, [r0, #0]
-   1377c:	6e1f      	ldr	r7, [r3, #96]
-   1377e:	01a5      	lsls	r5, r4, #6
-   13780:	f359 c2f8 	blx	f6cd74 <__ctors_end__+0xf57324>
-   13784:	0000      	lsls	r0, r0, #0
-   13786:	3c90      	subs	r4, #144
-   13788:	0000      	lsls	r0, r0, #0
-	...
-
-0001378c <copysign>:
-   1378c:	b530      	push	{r4, r5, lr}
-   1378e:	4b07      	ldr	r3, [pc, #28]	(137ac <.text+0x137ac>)
-   13790:	1c04      	adds	r4, r0, #0
-   13792:	401c      	ands	r4, r3
-   13794:	2380      	movs	r3, #128
-   13796:	1c15      	adds	r5, r2, #0
-   13798:	061b      	lsls	r3, r3, #24
-   1379a:	402b      	ands	r3, r5
-   1379c:	1c0a      	adds	r2, r1, #0
-   1379e:	431c      	orrs	r4, r3
-   137a0:	1c20      	adds	r0, r4, #0
-   137a2:	1c11      	adds	r1, r2, #0
-   137a4:	bc30      	pop	{r4, r5}
-   137a6:	bc04      	pop	{r2}
-   137a8:	4710      	bx	r2
-   137aa:	0000      	lsls	r0, r0, #0
-   137ac:	ffff 7fff 	undefined
-
-000137b0 <__errno>:
-   137b0:	4b01      	ldr	r3, [pc, #4]	(137b8 <.text+0x137b8>)
-   137b2:	6818      	ldr	r0, [r3, #0]
-   137b4:	4770      	bx	lr
-   137b6:	0000      	lsls	r0, r0, #0
-   137b8:	0020      	lsls	r0, r4, #0
-   137ba:	4000      	ands	r0, r0
-
-000137bc <__aeabi_uidiv>:
-   137bc:	2900      	cmp	r1, #0
-   137be:	d034      	beq.n	1382a <__aeabi_uidiv+0x6e>
-   137c0:	2301      	movs	r3, #1
-   137c2:	2200      	movs	r2, #0
-   137c4:	b410      	push	{r4}
-   137c6:	4288      	cmp	r0, r1
-   137c8:	d32c      	bcc.n	13824 <__aeabi_uidiv+0x68>
-   137ca:	2401      	movs	r4, #1
-   137cc:	0724      	lsls	r4, r4, #28
-   137ce:	42a1      	cmp	r1, r4
-   137d0:	d204      	bcs.n	137dc <__aeabi_uidiv+0x20>
-   137d2:	4281      	cmp	r1, r0
-   137d4:	d202      	bcs.n	137dc <__aeabi_uidiv+0x20>
-   137d6:	0109      	lsls	r1, r1, #4
-   137d8:	011b      	lsls	r3, r3, #4
-   137da:	e7f8      	b.n	137ce <__aeabi_uidiv+0x12>
-   137dc:	00e4      	lsls	r4, r4, #3
-   137de:	42a1      	cmp	r1, r4
-   137e0:	d204      	bcs.n	137ec <__aeabi_uidiv+0x30>
-   137e2:	4281      	cmp	r1, r0
-   137e4:	d202      	bcs.n	137ec <__aeabi_uidiv+0x30>
-   137e6:	0049      	lsls	r1, r1, #1
-   137e8:	005b      	lsls	r3, r3, #1
-   137ea:	e7f8      	b.n	137de <__aeabi_uidiv+0x22>
-   137ec:	4288      	cmp	r0, r1
-   137ee:	d301      	bcc.n	137f4 <__aeabi_uidiv+0x38>
-   137f0:	1a40      	subs	r0, r0, r1
-   137f2:	431a      	orrs	r2, r3
-   137f4:	084c      	lsrs	r4, r1, #1
-   137f6:	42a0      	cmp	r0, r4
-   137f8:	d302      	bcc.n	13800 <__aeabi_uidiv+0x44>
-   137fa:	1b00      	subs	r0, r0, r4
-   137fc:	085c      	lsrs	r4, r3, #1
-   137fe:	4322      	orrs	r2, r4
-   13800:	088c      	lsrs	r4, r1, #2
-   13802:	42a0      	cmp	r0, r4
-   13804:	d302      	bcc.n	1380c <__aeabi_uidiv+0x50>
-   13806:	1b00      	subs	r0, r0, r4
-   13808:	089c      	lsrs	r4, r3, #2
-   1380a:	4322      	orrs	r2, r4
-   1380c:	08cc      	lsrs	r4, r1, #3
-   1380e:	42a0      	cmp	r0, r4
-   13810:	d302      	bcc.n	13818 <__aeabi_uidiv+0x5c>
-   13812:	1b00      	subs	r0, r0, r4
-   13814:	08dc      	lsrs	r4, r3, #3
-   13816:	4322      	orrs	r2, r4
-   13818:	2800      	cmp	r0, #0
-   1381a:	d003      	beq.n	13824 <__aeabi_uidiv+0x68>
-   1381c:	091b      	lsrs	r3, r3, #4
-   1381e:	d001      	beq.n	13824 <__aeabi_uidiv+0x68>
-   13820:	0909      	lsrs	r1, r1, #4
-   13822:	e7e3      	b.n	137ec <__aeabi_uidiv+0x30>
-   13824:	1c10      	adds	r0, r2, #0
-   13826:	bc10      	pop	{r4}
-   13828:	4770      	bx	lr
-   1382a:	b502      	push	{r1, lr}
-   1382c:	f000 f92e 	bl	13a8c <__aeabi_idiv0>
-   13830:	2000      	movs	r0, #0
-   13832:	bc06      	pop	{r1, r2}
-   13834:	4710      	bx	r2
-	...
-
-00013838 <__aeabi_uidivmod>:
-   13838:	b503      	push	{r0, r1, lr}
-   1383a:	f7ff ffbf 	bl	137bc <__aeabi_uidiv>
-   1383e:	bc0e      	pop	{r1, r2, r3}
-   13840:	4342      	muls	r2, r0
-   13842:	1a89      	subs	r1, r1, r2
-   13844:	4718      	bx	r3
-   13846:	46c0      	nop			(mov r8, r8)
-
-00013848 <__aeabi_idiv>:
-   13848:	2900      	cmp	r1, #0
-   1384a:	d041      	beq.n	138d0 <__aeabi_idiv+0x88>
-   1384c:	b410      	push	{r4}
-   1384e:	1c04      	adds	r4, r0, #0
-   13850:	404c      	eors	r4, r1
-   13852:	46a4      	mov	ip, r4
-   13854:	2301      	movs	r3, #1
-   13856:	2200      	movs	r2, #0
-   13858:	2900      	cmp	r1, #0
-   1385a:	d500      	bpl.n	1385e <__aeabi_idiv+0x16>
-   1385c:	4249      	negs	r1, r1
-   1385e:	2800      	cmp	r0, #0
-   13860:	d500      	bpl.n	13864 <__aeabi_idiv+0x1c>
-   13862:	4240      	negs	r0, r0
-   13864:	4288      	cmp	r0, r1
-   13866:	d32c      	bcc.n	138c2 <__aeabi_idiv+0x7a>
-   13868:	2401      	movs	r4, #1
-   1386a:	0724      	lsls	r4, r4, #28
-   1386c:	42a1      	cmp	r1, r4
-   1386e:	d204      	bcs.n	1387a <__aeabi_idiv+0x32>
-   13870:	4281      	cmp	r1, r0
-   13872:	d202      	bcs.n	1387a <__aeabi_idiv+0x32>
-   13874:	0109      	lsls	r1, r1, #4
-   13876:	011b      	lsls	r3, r3, #4
-   13878:	e7f8      	b.n	1386c <__aeabi_idiv+0x24>
-   1387a:	00e4      	lsls	r4, r4, #3
-   1387c:	42a1      	cmp	r1, r4
-   1387e:	d204      	bcs.n	1388a <__aeabi_idiv+0x42>
-   13880:	4281      	cmp	r1, r0
-   13882:	d202      	bcs.n	1388a <__aeabi_idiv+0x42>
-   13884:	0049      	lsls	r1, r1, #1
-   13886:	005b      	lsls	r3, r3, #1
-   13888:	e7f8      	b.n	1387c <__aeabi_idiv+0x34>
-   1388a:	4288      	cmp	r0, r1
-   1388c:	d301      	bcc.n	13892 <__aeabi_idiv+0x4a>
-   1388e:	1a40      	subs	r0, r0, r1
-   13890:	431a      	orrs	r2, r3
-   13892:	084c      	lsrs	r4, r1, #1
-   13894:	42a0      	cmp	r0, r4
-   13896:	d302      	bcc.n	1389e <__aeabi_idiv+0x56>
-   13898:	1b00      	subs	r0, r0, r4
-   1389a:	085c      	lsrs	r4, r3, #1
-   1389c:	4322      	orrs	r2, r4
-   1389e:	088c      	lsrs	r4, r1, #2
-   138a0:	42a0      	cmp	r0, r4
-   138a2:	d302      	bcc.n	138aa <__aeabi_idiv+0x62>
-   138a4:	1b00      	subs	r0, r0, r4
-   138a6:	089c      	lsrs	r4, r3, #2
-   138a8:	4322      	orrs	r2, r4
-   138aa:	08cc      	lsrs	r4, r1, #3
-   138ac:	42a0      	cmp	r0, r4
-   138ae:	d302      	bcc.n	138b6 <__aeabi_idiv+0x6e>
-   138b0:	1b00      	subs	r0, r0, r4
-   138b2:	08dc      	lsrs	r4, r3, #3
-   138b4:	4322      	orrs	r2, r4
-   138b6:	2800      	cmp	r0, #0
-   138b8:	d003      	beq.n	138c2 <__aeabi_idiv+0x7a>
-   138ba:	091b      	lsrs	r3, r3, #4
-   138bc:	d001      	beq.n	138c2 <__aeabi_idiv+0x7a>
-   138be:	0909      	lsrs	r1, r1, #4
-   138c0:	e7e3      	b.n	1388a <__aeabi_idiv+0x42>
-   138c2:	1c10      	adds	r0, r2, #0
-   138c4:	4664      	mov	r4, ip
-   138c6:	2c00      	cmp	r4, #0
-   138c8:	d500      	bpl.n	138cc <__aeabi_idiv+0x84>
-   138ca:	4240      	negs	r0, r0
-   138cc:	bc10      	pop	{r4}
-   138ce:	4770      	bx	lr
-   138d0:	b502      	push	{r1, lr}
-   138d2:	f000 f8db 	bl	13a8c <__aeabi_idiv0>
-   138d6:	2000      	movs	r0, #0
-   138d8:	bc06      	pop	{r1, r2}
-   138da:	4710      	bx	r2
-
-000138dc <__aeabi_idivmod>:
-   138dc:	b503      	push	{r0, r1, lr}
-   138de:	f7ff ffb3 	bl	13848 <__aeabi_idiv>
-   138e2:	bc0e      	pop	{r1, r2, r3}
-   138e4:	4342      	muls	r2, r0
-   138e6:	1a89      	subs	r1, r1, r2
-   138e8:	4718      	bx	r3
-   138ea:	46c0      	nop			(mov r8, r8)
-
-000138ec <__umodsi3>:
-   138ec:	2900      	cmp	r1, #0
-   138ee:	d05a      	beq.n	139a6 <__umodsi3+0xba>
-   138f0:	2301      	movs	r3, #1
-   138f2:	4288      	cmp	r0, r1
-   138f4:	d200      	bcs.n	138f8 <__umodsi3+0xc>
-   138f6:	4770      	bx	lr
-   138f8:	b410      	push	{r4}
-   138fa:	2401      	movs	r4, #1
-   138fc:	0724      	lsls	r4, r4, #28
-   138fe:	42a1      	cmp	r1, r4
-   13900:	d204      	bcs.n	1390c <__umodsi3+0x20>
-   13902:	4281      	cmp	r1, r0
-   13904:	d202      	bcs.n	1390c <__umodsi3+0x20>
-   13906:	0109      	lsls	r1, r1, #4
-   13908:	011b      	lsls	r3, r3, #4
-   1390a:	e7f8      	b.n	138fe <__umodsi3+0x12>
-   1390c:	00e4      	lsls	r4, r4, #3
-   1390e:	42a1      	cmp	r1, r4
-   13910:	d204      	bcs.n	1391c <__umodsi3+0x30>
-   13912:	4281      	cmp	r1, r0
-   13914:	d202      	bcs.n	1391c <__umodsi3+0x30>
-   13916:	0049      	lsls	r1, r1, #1
-   13918:	005b      	lsls	r3, r3, #1
-   1391a:	e7f8      	b.n	1390e <__umodsi3+0x22>
-   1391c:	2200      	movs	r2, #0
-   1391e:	4288      	cmp	r0, r1
-   13920:	d300      	bcc.n	13924 <__umodsi3+0x38>
-   13922:	1a40      	subs	r0, r0, r1
-   13924:	084c      	lsrs	r4, r1, #1
-   13926:	42a0      	cmp	r0, r4
-   13928:	d305      	bcc.n	13936 <__umodsi3+0x4a>
-   1392a:	1b00      	subs	r0, r0, r4
-   1392c:	469c      	mov	ip, r3
-   1392e:	2401      	movs	r4, #1
-   13930:	41e3      	rors	r3, r4
-   13932:	431a      	orrs	r2, r3
-   13934:	4663      	mov	r3, ip
-   13936:	088c      	lsrs	r4, r1, #2
-   13938:	42a0      	cmp	r0, r4
-   1393a:	d305      	bcc.n	13948 <__umodsi3+0x5c>
-   1393c:	1b00      	subs	r0, r0, r4
-   1393e:	469c      	mov	ip, r3
-   13940:	2402      	movs	r4, #2
-   13942:	41e3      	rors	r3, r4
-   13944:	431a      	orrs	r2, r3
-   13946:	4663      	mov	r3, ip
-   13948:	08cc      	lsrs	r4, r1, #3
-   1394a:	42a0      	cmp	r0, r4
-   1394c:	d305      	bcc.n	1395a <__umodsi3+0x6e>
-   1394e:	1b00      	subs	r0, r0, r4
-   13950:	469c      	mov	ip, r3
-   13952:	2403      	movs	r4, #3
-   13954:	41e3      	rors	r3, r4
-   13956:	431a      	orrs	r2, r3
-   13958:	4663      	mov	r3, ip
-   1395a:	469c      	mov	ip, r3
-   1395c:	2800      	cmp	r0, #0
-   1395e:	d003      	beq.n	13968 <__umodsi3+0x7c>
-   13960:	091b      	lsrs	r3, r3, #4
-   13962:	d001      	beq.n	13968 <__umodsi3+0x7c>
-   13964:	0909      	lsrs	r1, r1, #4
-   13966:	e7d9      	b.n	1391c <__umodsi3+0x30>
-   13968:	240e      	movs	r4, #14
-   1396a:	0724      	lsls	r4, r4, #28
-   1396c:	4022      	ands	r2, r4
-   1396e:	d018      	beq.n	139a2 <__umodsi3+0xb6>
-   13970:	4663      	mov	r3, ip
-   13972:	2407      	movs	r4, #7
-   13974:	4223      	tst	r3, r4
-   13976:	d014      	beq.n	139a2 <__umodsi3+0xb6>
-   13978:	4663      	mov	r3, ip
-   1397a:	2403      	movs	r4, #3
-   1397c:	41e3      	rors	r3, r4
-   1397e:	421a      	tst	r2, r3
-   13980:	d001      	beq.n	13986 <__umodsi3+0x9a>
-   13982:	08cc      	lsrs	r4, r1, #3
-   13984:	1900      	adds	r0, r0, r4
-   13986:	4663      	mov	r3, ip
-   13988:	2402      	movs	r4, #2
-   1398a:	41e3      	rors	r3, r4
-   1398c:	421a      	tst	r2, r3
-   1398e:	d001      	beq.n	13994 <__umodsi3+0xa8>
-   13990:	088c      	lsrs	r4, r1, #2
-   13992:	1900      	adds	r0, r0, r4
-   13994:	4663      	mov	r3, ip
-   13996:	2401      	movs	r4, #1
-   13998:	41e3      	rors	r3, r4
-   1399a:	421a      	tst	r2, r3
-   1399c:	d001      	beq.n	139a2 <__umodsi3+0xb6>
-   1399e:	084c      	lsrs	r4, r1, #1
-   139a0:	1900      	adds	r0, r0, r4
-   139a2:	bc10      	pop	{r4}
-   139a4:	4770      	bx	lr
-   139a6:	b502      	push	{r1, lr}
-   139a8:	f000 f870 	bl	13a8c <__aeabi_idiv0>
-   139ac:	2000      	movs	r0, #0
-   139ae:	bc06      	pop	{r1, r2}
-   139b0:	4710      	bx	r2
-   139b2:	46c0      	nop			(mov r8, r8)
-
-000139b4 <__modsi3>:
-   139b4:	2301      	movs	r3, #1
-   139b6:	2900      	cmp	r1, #0
-   139b8:	d062      	beq.n	13a80 <__modsi3+0xcc>
-   139ba:	d500      	bpl.n	139be <__modsi3+0xa>
-   139bc:	4249      	negs	r1, r1
-   139be:	b410      	push	{r4}
-   139c0:	b401      	push	{r0}
-   139c2:	2800      	cmp	r0, #0
-   139c4:	d500      	bpl.n	139c8 <__modsi3+0x14>
-   139c6:	4240      	negs	r0, r0
-   139c8:	4288      	cmp	r0, r1
-   139ca:	d353      	bcc.n	13a74 <__modsi3+0xc0>
-   139cc:	2401      	movs	r4, #1
-   139ce:	0724      	lsls	r4, r4, #28
-   139d0:	42a1      	cmp	r1, r4
-   139d2:	d204      	bcs.n	139de <__modsi3+0x2a>
-   139d4:	4281      	cmp	r1, r0
-   139d6:	d202      	bcs.n	139de <__modsi3+0x2a>
-   139d8:	0109      	lsls	r1, r1, #4
-   139da:	011b      	lsls	r3, r3, #4
-   139dc:	e7f8      	b.n	139d0 <__modsi3+0x1c>
-   139de:	00e4      	lsls	r4, r4, #3
-   139e0:	42a1      	cmp	r1, r4
-   139e2:	d204      	bcs.n	139ee <__modsi3+0x3a>
-   139e4:	4281      	cmp	r1, r0
-   139e6:	d202      	bcs.n	139ee <__modsi3+0x3a>
-   139e8:	0049      	lsls	r1, r1, #1
-   139ea:	005b      	lsls	r3, r3, #1
-   139ec:	e7f8      	b.n	139e0 <__modsi3+0x2c>
-   139ee:	2200      	movs	r2, #0
-   139f0:	4288      	cmp	r0, r1
-   139f2:	d300      	bcc.n	139f6 <__modsi3+0x42>
-   139f4:	1a40      	subs	r0, r0, r1
-   139f6:	084c      	lsrs	r4, r1, #1
-   139f8:	42a0      	cmp	r0, r4
-   139fa:	d305      	bcc.n	13a08 <__modsi3+0x54>
-   139fc:	1b00      	subs	r0, r0, r4
-   139fe:	469c      	mov	ip, r3
-   13a00:	2401      	movs	r4, #1
-   13a02:	41e3      	rors	r3, r4
-   13a04:	431a      	orrs	r2, r3
-   13a06:	4663      	mov	r3, ip
-   13a08:	088c      	lsrs	r4, r1, #2
-   13a0a:	42a0      	cmp	r0, r4
-   13a0c:	d305      	bcc.n	13a1a <__modsi3+0x66>
-   13a0e:	1b00      	subs	r0, r0, r4
-   13a10:	469c      	mov	ip, r3
-   13a12:	2402      	movs	r4, #2
-   13a14:	41e3      	rors	r3, r4
-   13a16:	431a      	orrs	r2, r3
-   13a18:	4663      	mov	r3, ip
-   13a1a:	08cc      	lsrs	r4, r1, #3
-   13a1c:	42a0      	cmp	r0, r4
-   13a1e:	d305      	bcc.n	13a2c <__modsi3+0x78>
-   13a20:	1b00      	subs	r0, r0, r4
-   13a22:	469c      	mov	ip, r3
-   13a24:	2403      	movs	r4, #3
-   13a26:	41e3      	rors	r3, r4
-   13a28:	431a      	orrs	r2, r3
-   13a2a:	4663      	mov	r3, ip
-   13a2c:	469c      	mov	ip, r3
-   13a2e:	2800      	cmp	r0, #0
-   13a30:	d003      	beq.n	13a3a <__modsi3+0x86>
-   13a32:	091b      	lsrs	r3, r3, #4
-   13a34:	d001      	beq.n	13a3a <__modsi3+0x86>
-   13a36:	0909      	lsrs	r1, r1, #4
-   13a38:	e7d9      	b.n	139ee <__modsi3+0x3a>
-   13a3a:	240e      	movs	r4, #14
-   13a3c:	0724      	lsls	r4, r4, #28
-   13a3e:	4022      	ands	r2, r4
-   13a40:	d018      	beq.n	13a74 <__modsi3+0xc0>
-   13a42:	4663      	mov	r3, ip
-   13a44:	2407      	movs	r4, #7
-   13a46:	4223      	tst	r3, r4
-   13a48:	d014      	beq.n	13a74 <__modsi3+0xc0>
-   13a4a:	4663      	mov	r3, ip
-   13a4c:	2403      	movs	r4, #3
-   13a4e:	41e3      	rors	r3, r4
-   13a50:	421a      	tst	r2, r3
-   13a52:	d001      	beq.n	13a58 <__modsi3+0xa4>
-   13a54:	08cc      	lsrs	r4, r1, #3
-   13a56:	1900      	adds	r0, r0, r4
-   13a58:	4663      	mov	r3, ip
-   13a5a:	2402      	movs	r4, #2
-   13a5c:	41e3      	rors	r3, r4
-   13a5e:	421a      	tst	r2, r3
-   13a60:	d001      	beq.n	13a66 <__modsi3+0xb2>
-   13a62:	088c      	lsrs	r4, r1, #2
-   13a64:	1900      	adds	r0, r0, r4
-   13a66:	4663      	mov	r3, ip
-   13a68:	2401      	movs	r4, #1
-   13a6a:	41e3      	rors	r3, r4
-   13a6c:	421a      	tst	r2, r3
-   13a6e:	d001      	beq.n	13a74 <__modsi3+0xc0>
-   13a70:	084c      	lsrs	r4, r1, #1
-   13a72:	1900      	adds	r0, r0, r4
-   13a74:	bc10      	pop	{r4}
-   13a76:	2c00      	cmp	r4, #0
-   13a78:	d500      	bpl.n	13a7c <__modsi3+0xc8>
-   13a7a:	4240      	negs	r0, r0
-   13a7c:	bc10      	pop	{r4}
-   13a7e:	4770      	bx	lr
-   13a80:	b502      	push	{r1, lr}
-   13a82:	f000 f803 	bl	13a8c <__aeabi_idiv0>
-   13a86:	2000      	movs	r0, #0
-   13a88:	bc06      	pop	{r1, r2}
-   13a8a:	4710      	bx	r2
-
-00013a8c <__aeabi_idiv0>:
-   13a8c:	4770      	bx	lr
-   13a8e:	46c0      	nop			(mov r8, r8)
-
-00013a90 <__aeabi_drsub>:
-   13a90:	e2200102 	eor	r0, r0, #-2147483648	; 0x80000000
-   13a94:	ea000000 	b	13a9c <__adddf3>
-
-00013a98 <__aeabi_dsub>:
-   13a98:	e2222102 	eor	r2, r2, #-2147483648	; 0x80000000
-
-00013a9c <__adddf3>:
-   13a9c:	e92d4030 	stmdb	sp!, {r4, r5, lr}
-   13aa0:	e1a04080 	mov	r4, r0, lsl #1
-   13aa4:	e1a05082 	mov	r5, r2, lsl #1
-   13aa8:	e1340005 	teq	r4, r5
-   13aac:	01310003 	teqeq	r1, r3
-   13ab0:	1194c001 	orrnes	ip, r4, r1
-   13ab4:	1195c003 	orrnes	ip, r5, r3
-   13ab8:	11f0cac4 	mvnnes	ip, r4, asr #21
-   13abc:	11f0cac5 	mvnnes	ip, r5, asr #21
-   13ac0:	0a00008c 	beq	13cf8 <__adddf3+0x25c>
-   13ac4:	e1a04aa4 	mov	r4, r4, lsr #21
-   13ac8:	e0745aa5 	rsbs	r5, r4, r5, lsr #21
-   13acc:	b2655000 	rsblt	r5, r5, #0	; 0x0
-   13ad0:	da000006 	ble	13af0 <__adddf3+0x54>
-   13ad4:	e0844005 	add	r4, r4, r5
-   13ad8:	e0213003 	eor	r3, r1, r3
-   13adc:	e0202002 	eor	r2, r0, r2
-   13ae0:	e0231001 	eor	r1, r3, r1
-   13ae4:	e0220000 	eor	r0, r2, r0
-   13ae8:	e0213003 	eor	r3, r1, r3
-   13aec:	e0202002 	eor	r2, r0, r2
-   13af0:	e3550036 	cmp	r5, #54	; 0x36
-   13af4:	88bd4030 	ldmhiia	sp!, {r4, r5, lr}
-   13af8:	812fff1e 	bxhi	lr
-   13afc:	e3100102 	tst	r0, #-2147483648	; 0x80000000
-   13b00:	e1a00600 	mov	r0, r0, lsl #12
-   13b04:	e3a0c601 	mov	ip, #1048576	; 0x100000
-   13b08:	e18c0620 	orr	r0, ip, r0, lsr #12
-   13b0c:	0a000001 	beq	13b18 <__adddf3+0x7c>
-   13b10:	e2711000 	rsbs	r1, r1, #0	; 0x0
-   13b14:	e2e00000 	rsc	r0, r0, #0	; 0x0
-   13b18:	e3120102 	tst	r2, #-2147483648	; 0x80000000
-   13b1c:	e1a02602 	mov	r2, r2, lsl #12
-   13b20:	e18c2622 	orr	r2, ip, r2, lsr #12
-   13b24:	0a000001 	beq	13b30 <__adddf3+0x94>
-   13b28:	e2733000 	rsbs	r3, r3, #0	; 0x0
-   13b2c:	e2e22000 	rsc	r2, r2, #0	; 0x0
-   13b30:	e1340005 	teq	r4, r5
-   13b34:	0a000069 	beq	13ce0 <__adddf3+0x244>
-   13b38:	e2444001 	sub	r4, r4, #1	; 0x1
-   13b3c:	e275e020 	rsbs	lr, r5, #32	; 0x20
-   13b40:	ba000005 	blt	13b5c <__adddf3+0xc0>
-   13b44:	e1a0ce13 	mov	ip, r3, lsl lr
-   13b48:	e0911533 	adds	r1, r1, r3, lsr r5
-   13b4c:	e2a00000 	adc	r0, r0, #0	; 0x0
-   13b50:	e0911e12 	adds	r1, r1, r2, lsl lr
-   13b54:	e0b00552 	adcs	r0, r0, r2, asr r5
-   13b58:	ea000006 	b	13b78 <__adddf3+0xdc>
-   13b5c:	e2455020 	sub	r5, r5, #32	; 0x20
-   13b60:	e28ee020 	add	lr, lr, #32	; 0x20
-   13b64:	e3530001 	cmp	r3, #1	; 0x1
-   13b68:	e1a0ce12 	mov	ip, r2, lsl lr
-   13b6c:	238cc002 	orrcs	ip, ip, #2	; 0x2
-   13b70:	e0911552 	adds	r1, r1, r2, asr r5
-   13b74:	e0b00fc2 	adcs	r0, r0, r2, asr #31
-   13b78:	e2005102 	and	r5, r0, #-2147483648	; 0x80000000
-   13b7c:	5a000002 	bpl	13b8c <__adddf3+0xf0>
-   13b80:	e27cc000 	rsbs	ip, ip, #0	; 0x0
-   13b84:	e2f11000 	rscs	r1, r1, #0	; 0x0
-   13b88:	e2e00000 	rsc	r0, r0, #0	; 0x0
-   13b8c:	e3500601 	cmp	r0, #1048576	; 0x100000
-   13b90:	3a00000f 	bcc	13bd4 <__adddf3+0x138>
-   13b94:	e3500602 	cmp	r0, #2097152	; 0x200000
-   13b98:	3a000006 	bcc	13bb8 <__adddf3+0x11c>
-   13b9c:	e1b000a0 	movs	r0, r0, lsr #1
-   13ba0:	e1b01061 	movs	r1, r1, rrx
-   13ba4:	e1a0c06c 	mov	ip, ip, rrx
-   13ba8:	e2844001 	add	r4, r4, #1	; 0x1
-   13bac:	e1a02a84 	mov	r2, r4, lsl #21
-   13bb0:	e3720501 	cmn	r2, #4194304	; 0x400000
-   13bb4:	2a00006b 	bcs	13d68 <__adddf3+0x2cc>
-   13bb8:	e35c0102 	cmp	ip, #-2147483648	; 0x80000000
-   13bbc:	01b0c0a1 	moveqs	ip, r1, lsr #1
-   13bc0:	e2b11000 	adcs	r1, r1, #0	; 0x0
-   13bc4:	e0a00a04 	adc	r0, r0, r4, lsl #20
-   13bc8:	e1800005 	orr	r0, r0, r5
-   13bcc:	e8bd4030 	ldmia	sp!, {r4, r5, lr}
-   13bd0:	e12fff1e 	bx	lr
-   13bd4:	e1b0c08c 	movs	ip, ip, lsl #1
-   13bd8:	e0b11001 	adcs	r1, r1, r1
-   13bdc:	e0a00000 	adc	r0, r0, r0
-   13be0:	e3100601 	tst	r0, #1048576	; 0x100000
-   13be4:	e2444001 	sub	r4, r4, #1	; 0x1
-   13be8:	1afffff2 	bne	13bb8 <__adddf3+0x11c>
-   13bec:	e3300000 	teq	r0, #0	; 0x0
-   13bf0:	13a03014 	movne	r3, #20	; 0x14
-   13bf4:	03a03034 	moveq	r3, #52	; 0x34
-   13bf8:	01a00001 	moveq	r0, r1
-   13bfc:	03a01000 	moveq	r1, #0	; 0x0
-   13c00:	e1a02000 	mov	r2, r0
-   13c04:	e3520801 	cmp	r2, #65536	; 0x10000
-   13c08:	21a02822 	movcs	r2, r2, lsr #16
-   13c0c:	22433010 	subcs	r3, r3, #16	; 0x10
-   13c10:	e3520c01 	cmp	r2, #256	; 0x100
-   13c14:	21a02422 	movcs	r2, r2, lsr #8
-   13c18:	22433008 	subcs	r3, r3, #8	; 0x8
-   13c1c:	e3520010 	cmp	r2, #16	; 0x10
-   13c20:	21a02222 	movcs	r2, r2, lsr #4
-   13c24:	22433004 	subcs	r3, r3, #4	; 0x4
-   13c28:	e3520004 	cmp	r2, #4	; 0x4
-   13c2c:	22433002 	subcs	r3, r3, #2	; 0x2
-   13c30:	304330a2 	subcc	r3, r3, r2, lsr #1
-   13c34:	e04331a2 	sub	r3, r3, r2, lsr #3
-   13c38:	e2532020 	subs	r2, r3, #32	; 0x20
-   13c3c:	aa000007 	bge	13c60 <__adddf3+0x1c4>
-   13c40:	e292200c 	adds	r2, r2, #12	; 0xc
-   13c44:	da000004 	ble	13c5c <__adddf3+0x1c0>
-   13c48:	e282c014 	add	ip, r2, #20	; 0x14
-   13c4c:	e262200c 	rsb	r2, r2, #12	; 0xc
-   13c50:	e1a01c10 	mov	r1, r0, lsl ip
-   13c54:	e1a00230 	mov	r0, r0, lsr r2
-   13c58:	ea000004 	b	13c70 <__adddf3+0x1d4>
-   13c5c:	e2822014 	add	r2, r2, #20	; 0x14
-   13c60:	d262c020 	rsble	ip, r2, #32	; 0x20
-   13c64:	e1a00210 	mov	r0, r0, lsl r2
-   13c68:	d1800c31 	orrle	r0, r0, r1, lsr ip
-   13c6c:	d1a01211 	movle	r1, r1, lsl r2
-   13c70:	e0544003 	subs	r4, r4, r3
-   13c74:	a0800a04 	addge	r0, r0, r4, lsl #20
-   13c78:	a1800005 	orrge	r0, r0, r5
-   13c7c:	a8bd4030 	ldmgeia	sp!, {r4, r5, lr}
-   13c80:	a12fff1e 	bxge	lr
-   13c84:	e1e04004 	mvn	r4, r4
-   13c88:	e254401f 	subs	r4, r4, #31	; 0x1f
-   13c8c:	aa00000f 	bge	13cd0 <__adddf3+0x234>
-   13c90:	e294400c 	adds	r4, r4, #12	; 0xc
-   13c94:	ca000006 	bgt	13cb4 <__adddf3+0x218>
-   13c98:	e2844014 	add	r4, r4, #20	; 0x14
-   13c9c:	e2642020 	rsb	r2, r4, #32	; 0x20
-   13ca0:	e1a01431 	mov	r1, r1, lsr r4
-   13ca4:	e1811210 	orr	r1, r1, r0, lsl r2
-   13ca8:	e1850430 	orr	r0, r5, r0, lsr r4
-   13cac:	e8bd4030 	ldmia	sp!, {r4, r5, lr}
-   13cb0:	e12fff1e 	bx	lr
-   13cb4:	e264400c 	rsb	r4, r4, #12	; 0xc
-   13cb8:	e2642020 	rsb	r2, r4, #32	; 0x20
-   13cbc:	e1a01231 	mov	r1, r1, lsr r2
-   13cc0:	e1811410 	orr	r1, r1, r0, lsl r4
-   13cc4:	e1a00005 	mov	r0, r5
-   13cc8:	e8bd4030 	ldmia	sp!, {r4, r5, lr}
-   13ccc:	e12fff1e 	bx	lr
-   13cd0:	e1a01430 	mov	r1, r0, lsr r4
-   13cd4:	e1a00005 	mov	r0, r5
-   13cd8:	e8bd4030 	ldmia	sp!, {r4, r5, lr}
-   13cdc:	e12fff1e 	bx	lr
-   13ce0:	e3340000 	teq	r4, #0	; 0x0
-   13ce4:	e2222601 	eor	r2, r2, #1048576	; 0x100000
-   13ce8:	02200601 	eoreq	r0, r0, #1048576	; 0x100000
-   13cec:	02844001 	addeq	r4, r4, #1	; 0x1
-   13cf0:	12455001 	subne	r5, r5, #1	; 0x1
-   13cf4:	eaffff8f 	b	13b38 <__adddf3+0x9c>
-   13cf8:	e1f0cac4 	mvns	ip, r4, asr #21
-   13cfc:	11f0cac5 	mvnnes	ip, r5, asr #21
-   13d00:	0a00001d 	beq	13d7c <__adddf3+0x2e0>
-   13d04:	e1340005 	teq	r4, r5
-   13d08:	01310003 	teqeq	r1, r3
-   13d0c:	0a000004 	beq	13d24 <__adddf3+0x288>
-   13d10:	e3340000 	teq	r4, #0	; 0x0
-   13d14:	01a00002 	moveq	r0, r2
-   13d18:	01a01003 	moveq	r1, r3
-   13d1c:	e8bd4030 	ldmia	sp!, {r4, r5, lr}
-   13d20:	e12fff1e 	bx	lr
-   13d24:	e1300002 	teq	r0, r2
-   13d28:	13a00000 	movne	r0, #0	; 0x0
-   13d2c:	13a01000 	movne	r1, #0	; 0x0
-   13d30:	18bd4030 	ldmneia	sp!, {r4, r5, lr}
-   13d34:	112fff1e 	bxne	lr
-   13d38:	e1b0caa4 	movs	ip, r4, lsr #21
-   13d3c:	1a000004 	bne	13d54 <__adddf3+0x2b8>
-   13d40:	e1b01081 	movs	r1, r1, lsl #1
-   13d44:	e0b00000 	adcs	r0, r0, r0
-   13d48:	23800102 	orrcs	r0, r0, #-2147483648	; 0x80000000
-   13d4c:	e8bd4030 	ldmia	sp!, {r4, r5, lr}
-   13d50:	e12fff1e 	bx	lr
-   13d54:	e2944501 	adds	r4, r4, #4194304	; 0x400000
-   13d58:	32800601 	addcc	r0, r0, #1048576	; 0x100000
-   13d5c:	38bd4030 	ldmccia	sp!, {r4, r5, lr}
-   13d60:	312fff1e 	bxcc	lr
-   13d64:	e2005102 	and	r5, r0, #-2147483648	; 0x80000000
-   13d68:	e385047f 	orr	r0, r5, #2130706432	; 0x7f000000
-   13d6c:	e380060f 	orr	r0, r0, #15728640	; 0xf00000
-   13d70:	e3a01000 	mov	r1, #0	; 0x0
-   13d74:	e8bd4030 	ldmia	sp!, {r4, r5, lr}
-   13d78:	e12fff1e 	bx	lr
-   13d7c:	e1f0cac4 	mvns	ip, r4, asr #21
-   13d80:	11a00002 	movne	r0, r2
-   13d84:	11a01003 	movne	r1, r3
-   13d88:	01f0cac5 	mvneqs	ip, r5, asr #21
-   13d8c:	11a02000 	movne	r2, r0
-   13d90:	11a03001 	movne	r3, r1
-   13d94:	e1914600 	orrs	r4, r1, r0, lsl #12
-   13d98:	01935602 	orreqs	r5, r3, r2, lsl #12
-   13d9c:	01300002 	teqeq	r0, r2
-   13da0:	13800702 	orrne	r0, r0, #524288	; 0x80000
-   13da4:	e8bd4030 	ldmia	sp!, {r4, r5, lr}
-   13da8:	e12fff1e 	bx	lr
-
-00013dac <__aeabi_ui2d>:
-   13dac:	e3300000 	teq	r0, #0	; 0x0
-   13db0:	03a01000 	moveq	r1, #0	; 0x0
-   13db4:	012fff1e 	bxeq	lr
-   13db8:	e92d4030 	stmdb	sp!, {r4, r5, lr}
-   13dbc:	e3a04b01 	mov	r4, #1024	; 0x400
-   13dc0:	e2844032 	add	r4, r4, #50	; 0x32
-   13dc4:	e3a05000 	mov	r5, #0	; 0x0
-   13dc8:	e1a01000 	mov	r1, r0
-   13dcc:	e3a00000 	mov	r0, #0	; 0x0
-   13dd0:	eaffff85 	b	13bec <__adddf3+0x150>
-
-00013dd4 <__aeabi_i2d>:
-   13dd4:	e3300000 	teq	r0, #0	; 0x0
-   13dd8:	03a01000 	moveq	r1, #0	; 0x0
-   13ddc:	012fff1e 	bxeq	lr
-   13de0:	e92d4030 	stmdb	sp!, {r4, r5, lr}
-   13de4:	e3a04b01 	mov	r4, #1024	; 0x400
-   13de8:	e2844032 	add	r4, r4, #50	; 0x32
-   13dec:	e2105102 	ands	r5, r0, #-2147483648	; 0x80000000
-   13df0:	42600000 	rsbmi	r0, r0, #0	; 0x0
-   13df4:	e1a01000 	mov	r1, r0
-   13df8:	e3a00000 	mov	r0, #0	; 0x0
-   13dfc:	eaffff7a 	b	13bec <__adddf3+0x150>
-
-00013e00 <__aeabi_f2d>:
-   13e00:	e1b02080 	movs	r2, r0, lsl #1
-   13e04:	e1a001c2 	mov	r0, r2, asr #3
-   13e08:	e1a00060 	mov	r0, r0, rrx
-   13e0c:	e1a01e02 	mov	r1, r2, lsl #28
-   13e10:	121234ff 	andnes	r3, r2, #-16777216	; 0xff000000
-   13e14:	133304ff 	teqne	r3, #-16777216	; 0xff000000
-   13e18:	1220030e 	eorne	r0, r0, #939524096	; 0x38000000
-   13e1c:	112fff1e 	bxne	lr
-   13e20:	e3320000 	teq	r2, #0	; 0x0
-   13e24:	133304ff 	teqne	r3, #-16777216	; 0xff000000
-   13e28:	012fff1e 	bxeq	lr
-   13e2c:	e92d4030 	stmdb	sp!, {r4, r5, lr}
-   13e30:	e3a04d0e 	mov	r4, #896	; 0x380
-   13e34:	e2005102 	and	r5, r0, #-2147483648	; 0x80000000
-   13e38:	e3c00102 	bic	r0, r0, #-2147483648	; 0x80000000
-   13e3c:	eaffff6a 	b	13bec <__adddf3+0x150>
-
-00013e40 <__aeabi_ul2d>:
-   13e40:	e1902001 	orrs	r2, r0, r1
-   13e44:	012fff1e 	bxeq	lr
-   13e48:	e92d4030 	stmdb	sp!, {r4, r5, lr}
-   13e4c:	e3a05000 	mov	r5, #0	; 0x0
-   13e50:	ea000006 	b	13e70 <__aeabi_l2d+0x1c>
-
-00013e54 <__aeabi_l2d>:
-   13e54:	e1902001 	orrs	r2, r0, r1
-   13e58:	012fff1e 	bxeq	lr
-   13e5c:	e92d4030 	stmdb	sp!, {r4, r5, lr}
-   13e60:	e2115102 	ands	r5, r1, #-2147483648	; 0x80000000
-   13e64:	5a000001 	bpl	13e70 <__aeabi_l2d+0x1c>
-   13e68:	e2700000 	rsbs	r0, r0, #0	; 0x0
-   13e6c:	e2e11000 	rsc	r1, r1, #0	; 0x0
-   13e70:	e3a04b01 	mov	r4, #1024	; 0x400
-   13e74:	e2844032 	add	r4, r4, #50	; 0x32
-   13e78:	e1a0c000 	mov	ip, r0
-   13e7c:	e1a00001 	mov	r0, r1
-   13e80:	e1a0100c 	mov	r1, ip
-   13e84:	e1b0cb20 	movs	ip, r0, lsr #22
-   13e88:	0affff3f 	beq	13b8c <__adddf3+0xf0>
-   13e8c:	e3a02003 	mov	r2, #3	; 0x3
-   13e90:	e1b0c1ac 	movs	ip, ip, lsr #3
-   13e94:	12822003 	addne	r2, r2, #3	; 0x3
-   13e98:	e1b0c1ac 	movs	ip, ip, lsr #3
-   13e9c:	12822003 	addne	r2, r2, #3	; 0x3
-   13ea0:	e08221ac 	add	r2, r2, ip, lsr #3
-   13ea4:	e2623020 	rsb	r3, r2, #32	; 0x20
-   13ea8:	e1a0c311 	mov	ip, r1, lsl r3
-   13eac:	e1a01231 	mov	r1, r1, lsr r2
-   13eb0:	e1811310 	orr	r1, r1, r0, lsl r3
-   13eb4:	e1a00230 	mov	r0, r0, lsr r2
-   13eb8:	e0844002 	add	r4, r4, r2
-   13ebc:	eaffff32 	b	13b8c <__adddf3+0xf0>
-
-00013ec0 <__aeabi_dmul>:
-   13ec0:	e92d4070 	stmdb	sp!, {r4, r5, r6, lr}
-   13ec4:	e3a0c0ff 	mov	ip, #255	; 0xff
-   13ec8:	e38ccc07 	orr	ip, ip, #1792	; 0x700
-   13ecc:	e01c4a20 	ands	r4, ip, r0, lsr #20
-   13ed0:	101c5a22 	andnes	r5, ip, r2, lsr #20
-   13ed4:	1134000c 	teqne	r4, ip
-   13ed8:	1135000c 	teqne	r5, ip
-   13edc:	0b000075 	bleq	140b8 <__aeabi_dmul+0x1f8>
-   13ee0:	e0844005 	add	r4, r4, r5
-   13ee4:	e0206002 	eor	r6, r0, r2
-   13ee8:	e1c00a8c 	bic	r0, r0, ip, lsl #21
-   13eec:	e1c22a8c 	bic	r2, r2, ip, lsl #21
-   13ef0:	e1915600 	orrs	r5, r1, r0, lsl #12
-   13ef4:	11935602 	orrnes	r5, r3, r2, lsl #12
-   13ef8:	e3800601 	orr	r0, r0, #1048576	; 0x100000
-   13efc:	e3822601 	orr	r2, r2, #1048576	; 0x100000
-   13f00:	0a00001d 	beq	13f7c <__aeabi_dmul+0xbc>
-   13f04:	e08ec391 	umull	ip, lr, r1, r3
-   13f08:	e3a05000 	mov	r5, #0	; 0x0
-   13f0c:	e0a5e390 	umlal	lr, r5, r0, r3
-   13f10:	e2063102 	and	r3, r6, #-2147483648	; 0x80000000
-   13f14:	e0a5e291 	umlal	lr, r5, r1, r2
-   13f18:	e3a06000 	mov	r6, #0	; 0x0
-   13f1c:	e0a65290 	umlal	r5, r6, r0, r2
-   13f20:	e33c0000 	teq	ip, #0	; 0x0
-   13f24:	138ee001 	orrne	lr, lr, #1	; 0x1
-   13f28:	e24440ff 	sub	r4, r4, #255	; 0xff
-   13f2c:	e3560c02 	cmp	r6, #512	; 0x200
-   13f30:	e2c44c03 	sbc	r4, r4, #768	; 0x300
-   13f34:	2a000002 	bcs	13f44 <__aeabi_dmul+0x84>
-   13f38:	e1b0e08e 	movs	lr, lr, lsl #1
-   13f3c:	e0b55005 	adcs	r5, r5, r5
-   13f40:	e0a66006 	adc	r6, r6, r6
-   13f44:	e1830586 	orr	r0, r3, r6, lsl #11
-   13f48:	e1800aa5 	orr	r0, r0, r5, lsr #21
-   13f4c:	e1a01585 	mov	r1, r5, lsl #11
-   13f50:	e1811aae 	orr	r1, r1, lr, lsr #21
-   13f54:	e1a0e58e 	mov	lr, lr, lsl #11
-   13f58:	e254c0fd 	subs	ip, r4, #253	; 0xfd
-   13f5c:	835c0c07 	cmphi	ip, #1792	; 0x700
-   13f60:	8a000011 	bhi	13fac <__aeabi_dmul+0xec>
-   13f64:	e35e0102 	cmp	lr, #-2147483648	; 0x80000000
-   13f68:	01b0e0a1 	moveqs	lr, r1, lsr #1
-   13f6c:	e2b11000 	adcs	r1, r1, #0	; 0x0
-   13f70:	e0a00a04 	adc	r0, r0, r4, lsl #20
-   13f74:	e8bd4070 	ldmia	sp!, {r4, r5, r6, lr}
-   13f78:	e12fff1e 	bx	lr
-   13f7c:	e2066102 	and	r6, r6, #-2147483648	; 0x80000000
-   13f80:	e1860000 	orr	r0, r6, r0
-   13f84:	e1811003 	orr	r1, r1, r3
-   13f88:	e0200002 	eor	r0, r0, r2
-   13f8c:	e05440ac 	subs	r4, r4, ip, lsr #1
-   13f90:	c074500c 	rsbgts	r5, r4, ip
-   13f94:	c1800a04 	orrgt	r0, r0, r4, lsl #20
-   13f98:	c8bd4070 	ldmgtia	sp!, {r4, r5, r6, lr}
-   13f9c:	c12fff1e 	bxgt	lr
-   13fa0:	e3800601 	orr	r0, r0, #1048576	; 0x100000
-   13fa4:	e3a0e000 	mov	lr, #0	; 0x0
-   13fa8:	e2544001 	subs	r4, r4, #1	; 0x1
-   13fac:	ca00005d 	bgt	14128 <__aeabi_dmul+0x268>
-   13fb0:	e3740036 	cmn	r4, #54	; 0x36
-   13fb4:	d3a01000 	movle	r1, #0	; 0x0
-   13fb8:	d2000102 	andle	r0, r0, #-2147483648	; 0x80000000
-   13fbc:	d8bd4070 	ldmleia	sp!, {r4, r5, r6, lr}
-   13fc0:	d12fff1e 	bxle	lr
-   13fc4:	e2644000 	rsb	r4, r4, #0	; 0x0
-   13fc8:	e2544020 	subs	r4, r4, #32	; 0x20
-   13fcc:	aa00001a 	bge	1403c <__aeabi_dmul+0x17c>
-   13fd0:	e294400c 	adds	r4, r4, #12	; 0xc
-   13fd4:	ca00000c 	bgt	1400c <__aeabi_dmul+0x14c>
-   13fd8:	e2844014 	add	r4, r4, #20	; 0x14
-   13fdc:	e2645020 	rsb	r5, r4, #32	; 0x20
-   13fe0:	e1a03511 	mov	r3, r1, lsl r5
-   13fe4:	e1a01431 	mov	r1, r1, lsr r4
-   13fe8:	e1811510 	orr	r1, r1, r0, lsl r5
-   13fec:	e2002102 	and	r2, r0, #-2147483648	; 0x80000000
-   13ff0:	e3c00102 	bic	r0, r0, #-2147483648	; 0x80000000
-   13ff4:	e0911fa3 	adds	r1, r1, r3, lsr #31
-   13ff8:	e0a20430 	adc	r0, r2, r0, lsr r4
-   13ffc:	e19ee083 	orrs	lr, lr, r3, lsl #1
-   14000:	01c11fa3 	biceq	r1, r1, r3, lsr #31
-   14004:	e8bd4070 	ldmia	sp!, {r4, r5, r6, lr}
-   14008:	e12fff1e 	bx	lr
-   1400c:	e264400c 	rsb	r4, r4, #12	; 0xc
-   14010:	e2645020 	rsb	r5, r4, #32	; 0x20
-   14014:	e1a03411 	mov	r3, r1, lsl r4
-   14018:	e1a01531 	mov	r1, r1, lsr r5
-   1401c:	e1811410 	orr	r1, r1, r0, lsl r4
-   14020:	e2000102 	and	r0, r0, #-2147483648	; 0x80000000
-   14024:	e0911fa3 	adds	r1, r1, r3, lsr #31
-   14028:	e2a00000 	adc	r0, r0, #0	; 0x0
-   1402c:	e19ee083 	orrs	lr, lr, r3, lsl #1
-   14030:	01c11fa3 	biceq	r1, r1, r3, lsr #31
-   14034:	e8bd4070 	ldmia	sp!, {r4, r5, r6, lr}
-   14038:	e12fff1e 	bx	lr
-   1403c:	e2645020 	rsb	r5, r4, #32	; 0x20
-   14040:	e18ee511 	orr	lr, lr, r1, lsl r5
-   14044:	e1a03431 	mov	r3, r1, lsr r4
-   14048:	e1833510 	orr	r3, r3, r0, lsl r5
-   1404c:	e1a01430 	mov	r1, r0, lsr r4
-   14050:	e2000102 	and	r0, r0, #-2147483648	; 0x80000000
-   14054:	e1c11430 	bic	r1, r1, r0, lsr r4
-   14058:	e0811fa3 	add	r1, r1, r3, lsr #31
-   1405c:	e19ee083 	orrs	lr, lr, r3, lsl #1
-   14060:	01c11fa3 	biceq	r1, r1, r3, lsr #31
-   14064:	e8bd4070 	ldmia	sp!, {r4, r5, r6, lr}
-   14068:	e12fff1e 	bx	lr
-   1406c:	e3340000 	teq	r4, #0	; 0x0
-   14070:	1a000008 	bne	14098 <__aeabi_dmul+0x1d8>
-   14074:	e2006102 	and	r6, r0, #-2147483648	; 0x80000000
-   14078:	e1b01081 	movs	r1, r1, lsl #1
-   1407c:	e0a00000 	adc	r0, r0, r0
-   14080:	e3100601 	tst	r0, #1048576	; 0x100000
-   14084:	02444001 	subeq	r4, r4, #1	; 0x1
-   14088:	0afffffa 	beq	14078 <__aeabi_dmul+0x1b8>
-   1408c:	e1800006 	orr	r0, r0, r6
-   14090:	e3350000 	teq	r5, #0	; 0x0
-   14094:	11a0f00e 	movne	pc, lr
-   14098:	e2026102 	and	r6, r2, #-2147483648	; 0x80000000
-   1409c:	e1b03083 	movs	r3, r3, lsl #1
-   140a0:	e0a22002 	adc	r2, r2, r2
-   140a4:	e3120601 	tst	r2, #1048576	; 0x100000
-   140a8:	02455001 	subeq	r5, r5, #1	; 0x1
-   140ac:	0afffffa 	beq	1409c <__aeabi_dmul+0x1dc>
-   140b0:	e1822006 	orr	r2, r2, r6
-   140b4:	e1a0f00e 	mov	pc, lr
-   140b8:	e134000c 	teq	r4, ip
-   140bc:	e00c5a22 	and	r5, ip, r2, lsr #20
-   140c0:	1135000c 	teqne	r5, ip
-   140c4:	0a000007 	beq	140e8 <__aeabi_dmul+0x228>
-   140c8:	e1916080 	orrs	r6, r1, r0, lsl #1
-   140cc:	11936082 	orrnes	r6, r3, r2, lsl #1
-   140d0:	1affffe5 	bne	1406c <__aeabi_dmul+0x1ac>
-   140d4:	e0200002 	eor	r0, r0, r2
-   140d8:	e2000102 	and	r0, r0, #-2147483648	; 0x80000000
-   140dc:	e3a01000 	mov	r1, #0	; 0x0
-   140e0:	e8bd4070 	ldmia	sp!, {r4, r5, r6, lr}
-   140e4:	e12fff1e 	bx	lr
-   140e8:	e1916080 	orrs	r6, r1, r0, lsl #1
-   140ec:	01a01003 	moveq	r1, r3
-   140f0:	01a00002 	moveq	r0, r2
-   140f4:	11936082 	orrnes	r6, r3, r2, lsl #1
-   140f8:	0a000010 	beq	14140 <__aeabi_dmul+0x280>
-   140fc:	e134000c 	teq	r4, ip
-   14100:	1a000001 	bne	1410c <__aeabi_dmul+0x24c>
-   14104:	e1916600 	orrs	r6, r1, r0, lsl #12
-   14108:	1a00000c 	bne	14140 <__aeabi_dmul+0x280>
-   1410c:	e135000c 	teq	r5, ip
-   14110:	1a000003 	bne	14124 <__aeabi_dmul+0x264>
-   14114:	e1936602 	orrs	r6, r3, r2, lsl #12
-   14118:	11a01003 	movne	r1, r3
-   1411c:	11a00002 	movne	r0, r2
-   14120:	1a000006 	bne	14140 <__aeabi_dmul+0x280>
-   14124:	e0200002 	eor	r0, r0, r2
-   14128:	e2000102 	and	r0, r0, #-2147483648	; 0x80000000
-   1412c:	e380047f 	orr	r0, r0, #2130706432	; 0x7f000000
-   14130:	e380060f 	orr	r0, r0, #15728640	; 0xf00000
-   14134:	e3a01000 	mov	r1, #0	; 0x0
-   14138:	e8bd4070 	ldmia	sp!, {r4, r5, r6, lr}
-   1413c:	e12fff1e 	bx	lr
-   14140:	e380047f 	orr	r0, r0, #2130706432	; 0x7f000000
-   14144:	e380073e 	orr	r0, r0, #16252928	; 0xf80000
-   14148:	e8bd4070 	ldmia	sp!, {r4, r5, r6, lr}
-   1414c:	e12fff1e 	bx	lr
-
-00014150 <__aeabi_ddiv>:
-   14150:	e92d4070 	stmdb	sp!, {r4, r5, r6, lr}
-   14154:	e3a0c0ff 	mov	ip, #255	; 0xff
-   14158:	e38ccc07 	orr	ip, ip, #1792	; 0x700
-   1415c:	e01c4a20 	ands	r4, ip, r0, lsr #20
-   14160:	101c5a22 	andnes	r5, ip, r2, lsr #20
-   14164:	1134000c 	teqne	r4, ip
-   14168:	1135000c 	teqne	r5, ip
-   1416c:	0b00005e 	bleq	142ec <__aeabi_ddiv+0x19c>
-   14170:	e0444005 	sub	r4, r4, r5
-   14174:	e020e002 	eor	lr, r0, r2
-   14178:	e1935602 	orrs	r5, r3, r2, lsl #12
-   1417c:	e1a00600 	mov	r0, r0, lsl #12
-   14180:	0a00004c 	beq	142b8 <__aeabi_ddiv+0x168>
-   14184:	e1a02602 	mov	r2, r2, lsl #12
-   14188:	e3a05201 	mov	r5, #268435456	; 0x10000000
-   1418c:	e1852222 	orr	r2, r5, r2, lsr #4
-   14190:	e1822c23 	orr	r2, r2, r3, lsr #24
-   14194:	e1a03403 	mov	r3, r3, lsl #8
-   14198:	e1855220 	orr	r5, r5, r0, lsr #4
-   1419c:	e1855c21 	orr	r5, r5, r1, lsr #24
-   141a0:	e1a06401 	mov	r6, r1, lsl #8
-   141a4:	e20e0102 	and	r0, lr, #-2147483648	; 0x80000000
-   141a8:	e1550002 	cmp	r5, r2
-   141ac:	01560003 	cmpeq	r6, r3
-   141b0:	e2a440fd 	adc	r4, r4, #253	; 0xfd
-   141b4:	e2844c03 	add	r4, r4, #768	; 0x300
-   141b8:	2a000001 	bcs	141c4 <__aeabi_ddiv+0x74>
-   141bc:	e1b020a2 	movs	r2, r2, lsr #1
-   141c0:	e1a03063 	mov	r3, r3, rrx
-   141c4:	e0566003 	subs	r6, r6, r3
-   141c8:	e0c55002 	sbc	r5, r5, r2
-   141cc:	e1b020a2 	movs	r2, r2, lsr #1
-   141d0:	e1a03063 	mov	r3, r3, rrx
-   141d4:	e3a01601 	mov	r1, #1048576	; 0x100000
-   141d8:	e3a0c702 	mov	ip, #524288	; 0x80000
-   141dc:	e056e003 	subs	lr, r6, r3
-   141e0:	e0d5e002 	sbcs	lr, r5, r2
-   141e4:	20466003 	subcs	r6, r6, r3
-   141e8:	21a0500e 	movcs	r5, lr
-   141ec:	2181100c 	orrcs	r1, r1, ip
-   141f0:	e1b020a2 	movs	r2, r2, lsr #1
-   141f4:	e1a03063 	mov	r3, r3, rrx
-   141f8:	e056e003 	subs	lr, r6, r3
-   141fc:	e0d5e002 	sbcs	lr, r5, r2
-   14200:	20466003 	subcs	r6, r6, r3
-   14204:	21a0500e 	movcs	r5, lr
-   14208:	218110ac 	orrcs	r1, r1, ip, lsr #1
-   1420c:	e1b020a2 	movs	r2, r2, lsr #1
-   14210:	e1a03063 	mov	r3, r3, rrx
-   14214:	e056e003 	subs	lr, r6, r3
-   14218:	e0d5e002 	sbcs	lr, r5, r2
-   1421c:	20466003 	subcs	r6, r6, r3
-   14220:	21a0500e 	movcs	r5, lr
-   14224:	2181112c 	orrcs	r1, r1, ip, lsr #2
-   14228:	e1b020a2 	movs	r2, r2, lsr #1
-   1422c:	e1a03063 	mov	r3, r3, rrx
-   14230:	e056e003 	subs	lr, r6, r3
-   14234:	e0d5e002 	sbcs	lr, r5, r2
-   14238:	20466003 	subcs	r6, r6, r3
-   1423c:	21a0500e 	movcs	r5, lr
-   14240:	218111ac 	orrcs	r1, r1, ip, lsr #3
-   14244:	e195e006 	orrs	lr, r5, r6
-   14248:	0a00000d 	beq	14284 <__aeabi_ddiv+0x134>
-   1424c:	e1a05205 	mov	r5, r5, lsl #4
-   14250:	e1855e26 	orr	r5, r5, r6, lsr #28
-   14254:	e1a06206 	mov	r6, r6, lsl #4
-   14258:	e1a02182 	mov	r2, r2, lsl #3
-   1425c:	e1822ea3 	orr	r2, r2, r3, lsr #29
-   14260:	e1a03183 	mov	r3, r3, lsl #3
-   14264:	e1b0c22c 	movs	ip, ip, lsr #4
-   14268:	1affffdb 	bne	141dc <__aeabi_ddiv+0x8c>
-   1426c:	e3100601 	tst	r0, #1048576	; 0x100000
-   14270:	1a000006 	bne	14290 <__aeabi_ddiv+0x140>
-   14274:	e1800001 	orr	r0, r0, r1
-   14278:	e3a01000 	mov	r1, #0	; 0x0
-   1427c:	e3a0c102 	mov	ip, #-2147483648	; 0x80000000
-   14280:	eaffffd5 	b	141dc <__aeabi_ddiv+0x8c>
-   14284:	e3100601 	tst	r0, #1048576	; 0x100000
-   14288:	01800001 	orreq	r0, r0, r1
-   1428c:	03a01000 	moveq	r1, #0	; 0x0
-   14290:	e254c0fd 	subs	ip, r4, #253	; 0xfd
-   14294:	835c0c07 	cmphi	ip, #1792	; 0x700
-   14298:	8affff43 	bhi	13fac <__aeabi_dmul+0xec>
-   1429c:	e055c002 	subs	ip, r5, r2
-   142a0:	0056c003 	subeqs	ip, r6, r3
-   142a4:	01b0c0a1 	moveqs	ip, r1, lsr #1
-   142a8:	e2b11000 	adcs	r1, r1, #0	; 0x0
-   142ac:	e0a00a04 	adc	r0, r0, r4, lsl #20
-   142b0:	e8bd4070 	ldmia	sp!, {r4, r5, r6, lr}
-   142b4:	e12fff1e 	bx	lr
-   142b8:	e20ee102 	and	lr, lr, #-2147483648	; 0x80000000
-   142bc:	e18e0620 	orr	r0, lr, r0, lsr #12
-   142c0:	e09440ac 	adds	r4, r4, ip, lsr #1
-   142c4:	c074500c 	rsbgts	r5, r4, ip
-   142c8:	c1800a04 	orrgt	r0, r0, r4, lsl #20
-   142cc:	c8bd4070 	ldmgtia	sp!, {r4, r5, r6, lr}
-   142d0:	c12fff1e 	bxgt	lr
-   142d4:	e3800601 	orr	r0, r0, #1048576	; 0x100000
-   142d8:	e3a0e000 	mov	lr, #0	; 0x0
-   142dc:	e2544001 	subs	r4, r4, #1	; 0x1
-   142e0:	eaffff31 	b	13fac <__aeabi_dmul+0xec>
-   142e4:	e185e006 	orr	lr, r5, r6
-   142e8:	eaffff2f 	b	13fac <__aeabi_dmul+0xec>
-   142ec:	e00c5a22 	and	r5, ip, r2, lsr #20
-   142f0:	e134000c 	teq	r4, ip
-   142f4:	0135000c 	teqeq	r5, ip
-   142f8:	0affff90 	beq	14140 <__aeabi_dmul+0x280>
-   142fc:	e134000c 	teq	r4, ip
-   14300:	1a000006 	bne	14320 <__aeabi_ddiv+0x1d0>
-   14304:	e1914600 	orrs	r4, r1, r0, lsl #12
-   14308:	1affff8c 	bne	14140 <__aeabi_dmul+0x280>
-   1430c:	e135000c 	teq	r5, ip
-   14310:	1affff83 	bne	14124 <__aeabi_dmul+0x264>
-   14314:	e1a01003 	mov	r1, r3
-   14318:	e1a00002 	mov	r0, r2
-   1431c:	eaffff87 	b	14140 <__aeabi_dmul+0x280>
-   14320:	e135000c 	teq	r5, ip
-   14324:	1a000004 	bne	1433c <__aeabi_ddiv+0x1ec>
-   14328:	e1935602 	orrs	r5, r3, r2, lsl #12
-   1432c:	0affff68 	beq	140d4 <__aeabi_dmul+0x214>
-   14330:	e1a01003 	mov	r1, r3
-   14334:	e1a00002 	mov	r0, r2
-   14338:	eaffff80 	b	14140 <__aeabi_dmul+0x280>
-   1433c:	e1916080 	orrs	r6, r1, r0, lsl #1
-   14340:	11936082 	orrnes	r6, r3, r2, lsl #1
-   14344:	1affff48 	bne	1406c <__aeabi_dmul+0x1ac>
-   14348:	e1914080 	orrs	r4, r1, r0, lsl #1
-   1434c:	1affff74 	bne	14124 <__aeabi_dmul+0x264>
-   14350:	e1935082 	orrs	r5, r3, r2, lsl #1
-   14354:	1affff5e 	bne	140d4 <__aeabi_dmul+0x214>
-   14358:	eaffff78 	b	14140 <__aeabi_dmul+0x280>
-
-0001435c <__gedf2>:
-   1435c:	e3e0c000 	mvn	ip, #0	; 0x0
-   14360:	ea000002 	b	14370 <__cmpdf2+0x4>
-
-00014364 <__ledf2>:
-   14364:	e3a0c001 	mov	ip, #1	; 0x1
-   14368:	ea000000 	b	14370 <__cmpdf2+0x4>
-
-0001436c <__cmpdf2>:
-   1436c:	e3a0c001 	mov	ip, #1	; 0x1
-   14370:	e50dc004 	str	ip, [sp, #-4]
-   14374:	e1a0c080 	mov	ip, r0, lsl #1
-   14378:	e1f0cacc 	mvns	ip, ip, asr #21
-   1437c:	e1a0c082 	mov	ip, r2, lsl #1
-   14380:	11f0cacc 	mvnnes	ip, ip, asr #21
-   14384:	0a00000d 	beq	143c0 <__cmpdf2+0x54>
-   14388:	e191c080 	orrs	ip, r1, r0, lsl #1
-   1438c:	0193c082 	orreqs	ip, r3, r2, lsl #1
-   14390:	11300002 	teqne	r0, r2
-   14394:	01310003 	teqeq	r1, r3
-   14398:	03a00000 	moveq	r0, #0	; 0x0
-   1439c:	012fff1e 	bxeq	lr
-   143a0:	e3700000 	cmn	r0, #0	; 0x0
-   143a4:	e1300002 	teq	r0, r2
-   143a8:	51500002 	cmppl	r0, r2
-   143ac:	01510003 	cmpeq	r1, r3
-   143b0:	21a00fc2 	movcs	r0, r2, asr #31
-   143b4:	31e00fc2 	mvncc	r0, r2, asr #31
-   143b8:	e3800001 	orr	r0, r0, #1	; 0x1
-   143bc:	e12fff1e 	bx	lr
-   143c0:	e1a0c080 	mov	ip, r0, lsl #1
-   143c4:	e1f0cacc 	mvns	ip, ip, asr #21
-   143c8:	1a000001 	bne	143d4 <__cmpdf2+0x68>
-   143cc:	e191c600 	orrs	ip, r1, r0, lsl #12
-   143d0:	1a000004 	bne	143e8 <__cmpdf2+0x7c>
-   143d4:	e1a0c082 	mov	ip, r2, lsl #1
-   143d8:	e1f0cacc 	mvns	ip, ip, asr #21
-   143dc:	1affffe9 	bne	14388 <__cmpdf2+0x1c>
-   143e0:	e193c602 	orrs	ip, r3, r2, lsl #12
-   143e4:	0affffe7 	beq	14388 <__cmpdf2+0x1c>
-   143e8:	e51d0004 	ldr	r0, [sp, #-4]
-   143ec:	e12fff1e 	bx	lr
-
-000143f0 <__aeabi_cdrcmple>:
-   143f0:	e1a0c000 	mov	ip, r0
-   143f4:	e1a00002 	mov	r0, r2
-   143f8:	e1a0200c 	mov	r2, ip
-   143fc:	e1a0c001 	mov	ip, r1
-   14400:	e1a01003 	mov	r1, r3
-   14404:	e1a0300c 	mov	r3, ip
-   14408:	eaffffff 	b	1440c <__aeabi_cdcmpeq>
-
-0001440c <__aeabi_cdcmpeq>:
-   1440c:	e92d4001 	stmdb	sp!, {r0, lr}
-   14410:	ebffffd5 	bl	1436c <__cmpdf2>
-   14414:	e3500000 	cmp	r0, #0	; 0x0
-   14418:	43700000 	cmnmi	r0, #0	; 0x0
-   1441c:	e8bd4001 	ldmia	sp!, {r0, lr}
-   14420:	e12fff1e 	bx	lr
-
-00014424 <__aeabi_dcmpeq>:
-   14424:	e52de008 	str	lr, [sp, #-8]!
-   14428:	ebfffff7 	bl	1440c <__aeabi_cdcmpeq>
-   1442c:	03a00001 	moveq	r0, #1	; 0x1
-   14430:	13a00000 	movne	r0, #0	; 0x0
-   14434:	e49de008 	ldr	lr, [sp], #8
-   14438:	e12fff1e 	bx	lr
-
-0001443c <__aeabi_dcmplt>:
-   1443c:	e52de008 	str	lr, [sp, #-8]!
-   14440:	ebfffff1 	bl	1440c <__aeabi_cdcmpeq>
-   14444:	33a00001 	movcc	r0, #1	; 0x1
-   14448:	23a00000 	movcs	r0, #0	; 0x0
-   1444c:	e49de008 	ldr	lr, [sp], #8
-   14450:	e12fff1e 	bx	lr
-
-00014454 <__aeabi_dcmple>:
-   14454:	e52de008 	str	lr, [sp, #-8]!
-   14458:	ebffffeb 	bl	1440c <__aeabi_cdcmpeq>
-   1445c:	93a00001 	movls	r0, #1	; 0x1
-   14460:	83a00000 	movhi	r0, #0	; 0x0
-   14464:	e49de008 	ldr	lr, [sp], #8
-   14468:	e12fff1e 	bx	lr
-
-0001446c <__aeabi_dcmpge>:
-   1446c:	e52de008 	str	lr, [sp, #-8]!
-   14470:	ebffffde 	bl	143f0 <__aeabi_cdrcmple>
-   14474:	93a00001 	movls	r0, #1	; 0x1
-   14478:	83a00000 	movhi	r0, #0	; 0x0
-   1447c:	e49de008 	ldr	lr, [sp], #8
-   14480:	e12fff1e 	bx	lr
-
-00014484 <__aeabi_dcmpgt>:
-   14484:	e52de008 	str	lr, [sp, #-8]!
-   14488:	ebffffd8 	bl	143f0 <__aeabi_cdrcmple>
-   1448c:	33a00001 	movcc	r0, #1	; 0x1
-   14490:	23a00000 	movcs	r0, #0	; 0x0
-   14494:	e49de008 	ldr	lr, [sp], #8
-   14498:	e12fff1e 	bx	lr
-
-0001449c <__aeabi_d2iz>:
-   1449c:	e1a02080 	mov	r2, r0, lsl #1
-   144a0:	e2922602 	adds	r2, r2, #2097152	; 0x200000
-   144a4:	2a00000c 	bcs	144dc <__aeabi_d2iz+0x40>
-   144a8:	5a000009 	bpl	144d4 <__aeabi_d2iz+0x38>
-   144ac:	e3e03e3e 	mvn	r3, #992	; 0x3e0
-   144b0:	e0532ac2 	subs	r2, r3, r2, asr #21
-   144b4:	9a00000a 	bls	144e4 <__aeabi_d2iz+0x48>
-   144b8:	e1a03580 	mov	r3, r0, lsl #11
-   144bc:	e3833102 	orr	r3, r3, #-2147483648	; 0x80000000
-   144c0:	e1833aa1 	orr	r3, r3, r1, lsr #21
-   144c4:	e3100102 	tst	r0, #-2147483648	; 0x80000000
-   144c8:	e1a00233 	mov	r0, r3, lsr r2
-   144cc:	12600000 	rsbne	r0, r0, #0	; 0x0
-   144d0:	e12fff1e 	bx	lr
-   144d4:	e3a00000 	mov	r0, #0	; 0x0
-   144d8:	e12fff1e 	bx	lr
-   144dc:	e1911600 	orrs	r1, r1, r0, lsl #12
-   144e0:	1a000002 	bne	144f0 <__aeabi_d2iz+0x54>
-   144e4:	e2100102 	ands	r0, r0, #-2147483648	; 0x80000000
-   144e8:	03e00102 	mvneq	r0, #-2147483648	; 0x80000000
-   144ec:	e12fff1e 	bx	lr
-   144f0:	e3a00000 	mov	r0, #0	; 0x0
-   144f4:	e12fff1e 	bx	lr
-
-000144f8 <__aeabi_d2f>:
-   144f8:	e1a02080 	mov	r2, r0, lsl #1
-   144fc:	e2523207 	subs	r3, r2, #1879048192	; 0x70000000
-   14500:	2253c602 	subcss	ip, r3, #2097152	; 0x200000
-   14504:	227cc57f 	rsbcss	ip, ip, #532676608	; 0x1fc00000
-   14508:	9a000006 	bls	14528 <__aeabi_d2f+0x30>
-   1450c:	e200c102 	and	ip, r0, #-2147483648	; 0x80000000
-   14510:	e1a02181 	mov	r2, r1, lsl #3
-   14514:	e18c1ea1 	orr	r1, ip, r1, lsr #29
-   14518:	e3520102 	cmp	r2, #-2147483648	; 0x80000000
-   1451c:	e0a10103 	adc	r0, r1, r3, lsl #2
-   14520:	03c00001 	biceq	r0, r0, #1	; 0x1
-   14524:	e12fff1e 	bx	lr
-   14528:	e3100101 	tst	r0, #1073741824	; 0x40000000
-   1452c:	1a00000f 	bne	14570 <__aeabi_d2f+0x78>
-   14530:	e293262e 	adds	r2, r3, #48234496	; 0x2e00000
-   14534:	b2000102 	andlt	r0, r0, #-2147483648	; 0x80000000
-   14538:	b12fff1e 	bxlt	lr
-   1453c:	e3800601 	orr	r0, r0, #1048576	; 0x100000
-   14540:	e1a02aa2 	mov	r2, r2, lsr #21
-   14544:	e2622018 	rsb	r2, r2, #24	; 0x18
-   14548:	e262c020 	rsb	ip, r2, #32	; 0x20
-   1454c:	e1b03c11 	movs	r3, r1, lsl ip
-   14550:	e1a01231 	mov	r1, r1, lsr r2
-   14554:	13811001 	orrne	r1, r1, #1	; 0x1
-   14558:	e1a03580 	mov	r3, r0, lsl #11
-   1455c:	e1a035a3 	mov	r3, r3, lsr #11
-   14560:	e1811c13 	orr	r1, r1, r3, lsl ip
-   14564:	e1a03233 	mov	r3, r3, lsr r2
-   14568:	e1a03083 	mov	r3, r3, lsl #1
-   1456c:	eaffffe6 	b	1450c <__aeabi_d2f+0x14>
-   14570:	e1f03ac2 	mvns	r3, r2, asr #21
-   14574:	1a000003 	bne	14588 <__aeabi_d2f+0x90>
-   14578:	e1913600 	orrs	r3, r1, r0, lsl #12
-   1457c:	13a0047f 	movne	r0, #2130706432	; 0x7f000000
-   14580:	13800503 	orrne	r0, r0, #12582912	; 0xc00000
-   14584:	112fff1e 	bxne	lr
-   14588:	e2000102 	and	r0, r0, #-2147483648	; 0x80000000
-   1458c:	e380047f 	orr	r0, r0, #2130706432	; 0x7f000000
-   14590:	e3800502 	orr	r0, r0, #8388608	; 0x800000
-   14594:	e12fff1e 	bx	lr
-
-00014598 <__aeabi_frsub>:
-   14598:	e2200102 	eor	r0, r0, #-2147483648	; 0x80000000
-   1459c:	ea000000 	b	145a4 <__addsf3>
-
-000145a0 <__aeabi_fsub>:
-   145a0:	e2211102 	eor	r1, r1, #-2147483648	; 0x80000000
-
-000145a4 <__addsf3>:
-   145a4:	e1b02080 	movs	r2, r0, lsl #1
-   145a8:	11b03081 	movnes	r3, r1, lsl #1
-   145ac:	11320003 	teqne	r2, r3
-   145b0:	11f0cc42 	mvnnes	ip, r2, asr #24
-   145b4:	11f0cc43 	mvnnes	ip, r3, asr #24
-   145b8:	0a000047 	beq	146dc <__addsf3+0x138>
-   145bc:	e1a02c22 	mov	r2, r2, lsr #24
-   145c0:	e0723c23 	rsbs	r3, r2, r3, lsr #24
-   145c4:	c0822003 	addgt	r2, r2, r3
-   145c8:	c0201001 	eorgt	r1, r0, r1
-   145cc:	c0210000 	eorgt	r0, r1, r0
-   145d0:	c0201001 	eorgt	r1, r0, r1
-   145d4:	b2633000 	rsblt	r3, r3, #0	; 0x0
-   145d8:	e3530019 	cmp	r3, #25	; 0x19
-   145dc:	812fff1e 	bxhi	lr
-   145e0:	e3100102 	tst	r0, #-2147483648	; 0x80000000
-   145e4:	e3800502 	orr	r0, r0, #8388608	; 0x800000
-   145e8:	e3c004ff 	bic	r0, r0, #-16777216	; 0xff000000
-   145ec:	12600000 	rsbne	r0, r0, #0	; 0x0
-   145f0:	e3110102 	tst	r1, #-2147483648	; 0x80000000
-   145f4:	e3811502 	orr	r1, r1, #8388608	; 0x800000
-   145f8:	e3c114ff 	bic	r1, r1, #-16777216	; 0xff000000
-   145fc:	12611000 	rsbne	r1, r1, #0	; 0x0
-   14600:	e1320003 	teq	r2, r3
-   14604:	0a00002e 	beq	146c4 <__addsf3+0x120>
-   14608:	e2422001 	sub	r2, r2, #1	; 0x1
-   1460c:	e0900351 	adds	r0, r0, r1, asr r3
-   14610:	e2633020 	rsb	r3, r3, #32	; 0x20
-   14614:	e1a01311 	mov	r1, r1, lsl r3
-   14618:	e2003102 	and	r3, r0, #-2147483648	; 0x80000000
-   1461c:	5a000001 	bpl	14628 <__addsf3+0x84>
-   14620:	e2711000 	rsbs	r1, r1, #0	; 0x0
-   14624:	e2e00000 	rsc	r0, r0, #0	; 0x0
-   14628:	e3500502 	cmp	r0, #8388608	; 0x800000
-   1462c:	3a00000b 	bcc	14660 <__addsf3+0xbc>
-   14630:	e3500401 	cmp	r0, #16777216	; 0x1000000
-   14634:	3a000004 	bcc	1464c <__addsf3+0xa8>
-   14638:	e1b000a0 	movs	r0, r0, lsr #1
-   1463c:	e1a01061 	mov	r1, r1, rrx
-   14640:	e2822001 	add	r2, r2, #1	; 0x1
-   14644:	e35200fe 	cmp	r2, #254	; 0xfe
-   14648:	2a000038 	bcs	14730 <__addsf3+0x18c>
-   1464c:	e3510102 	cmp	r1, #-2147483648	; 0x80000000
-   14650:	e0a00b82 	adc	r0, r0, r2, lsl #23
-   14654:	03c00001 	biceq	r0, r0, #1	; 0x1
-   14658:	e1800003 	orr	r0, r0, r3
-   1465c:	e12fff1e 	bx	lr
-   14660:	e1b01081 	movs	r1, r1, lsl #1
-   14664:	e0a00000 	adc	r0, r0, r0
-   14668:	e3100502 	tst	r0, #8388608	; 0x800000
-   1466c:	e2422001 	sub	r2, r2, #1	; 0x1
-   14670:	1afffff5 	bne	1464c <__addsf3+0xa8>
-   14674:	e1b0c620 	movs	ip, r0, lsr #12
-   14678:	01a00600 	moveq	r0, r0, lsl #12
-   1467c:	0242200c 	subeq	r2, r2, #12	; 0xc
-   14680:	e31008ff 	tst	r0, #16711680	; 0xff0000
-   14684:	01a00400 	moveq	r0, r0, lsl #8
-   14688:	02422008 	subeq	r2, r2, #8	; 0x8
-   1468c:	e310060f 	tst	r0, #15728640	; 0xf00000
-   14690:	01a00200 	moveq	r0, r0, lsl #4
-   14694:	02422004 	subeq	r2, r2, #4	; 0x4
-   14698:	e3100503 	tst	r0, #12582912	; 0xc00000
-   1469c:	01a00100 	moveq	r0, r0, lsl #2
-   146a0:	02422002 	subeq	r2, r2, #2	; 0x2
-   146a4:	e3500502 	cmp	r0, #8388608	; 0x800000
-   146a8:	31a00080 	movcc	r0, r0, lsl #1
-   146ac:	e2d22000 	sbcs	r2, r2, #0	; 0x0
-   146b0:	a0800b82 	addge	r0, r0, r2, lsl #23
-   146b4:	b2622000 	rsblt	r2, r2, #0	; 0x0
-   146b8:	a1800003 	orrge	r0, r0, r3
-   146bc:	b1830230 	orrlt	r0, r3, r0, lsr r2
-   146c0:	e12fff1e 	bx	lr
-   146c4:	e3320000 	teq	r2, #0	; 0x0
-   146c8:	e2211502 	eor	r1, r1, #8388608	; 0x800000
-   146cc:	02200502 	eoreq	r0, r0, #8388608	; 0x800000
-   146d0:	02822001 	addeq	r2, r2, #1	; 0x1
-   146d4:	12433001 	subne	r3, r3, #1	; 0x1
-   146d8:	eaffffca 	b	14608 <__addsf3+0x64>
-   146dc:	e1a03081 	mov	r3, r1, lsl #1
-   146e0:	e1f0cc42 	mvns	ip, r2, asr #24
-   146e4:	11f0cc43 	mvnnes	ip, r3, asr #24
-   146e8:	0a000013 	beq	1473c <__addsf3+0x198>
-   146ec:	e1320003 	teq	r2, r3
-   146f0:	0a000002 	beq	14700 <__addsf3+0x15c>
-   146f4:	e3320000 	teq	r2, #0	; 0x0
-   146f8:	01a00001 	moveq	r0, r1
-   146fc:	e12fff1e 	bx	lr
-   14700:	e1300001 	teq	r0, r1
-   14704:	13a00000 	movne	r0, #0	; 0x0
-   14708:	112fff1e 	bxne	lr
-   1470c:	e31204ff 	tst	r2, #-16777216	; 0xff000000
-   14710:	1a000002 	bne	14720 <__addsf3+0x17c>
-   14714:	e1b00080 	movs	r0, r0, lsl #1
-   14718:	23800102 	orrcs	r0, r0, #-2147483648	; 0x80000000
-   1471c:	e12fff1e 	bx	lr
-   14720:	e2922402 	adds	r2, r2, #33554432	; 0x2000000
-   14724:	32800502 	addcc	r0, r0, #8388608	; 0x800000
-   14728:	312fff1e 	bxcc	lr
-   1472c:	e2003102 	and	r3, r0, #-2147483648	; 0x80000000
-   14730:	e383047f 	orr	r0, r3, #2130706432	; 0x7f000000
-   14734:	e3800502 	orr	r0, r0, #8388608	; 0x800000
-   14738:	e12fff1e 	bx	lr
-   1473c:	e1f02c42 	mvns	r2, r2, asr #24
-   14740:	11a00001 	movne	r0, r1
-   14744:	01f03c43 	mvneqs	r3, r3, asr #24
-   14748:	11a01000 	movne	r1, r0
-   1474c:	e1b02480 	movs	r2, r0, lsl #9
-   14750:	01b03481 	moveqs	r3, r1, lsl #9
-   14754:	01300001 	teqeq	r0, r1
-   14758:	13800501 	orrne	r0, r0, #4194304	; 0x400000
-   1475c:	e12fff1e 	bx	lr
-
-00014760 <__aeabi_ui2f>:
-   14760:	e3a03000 	mov	r3, #0	; 0x0
-   14764:	ea000001 	b	14770 <__aeabi_i2f+0x8>
-
-00014768 <__aeabi_i2f>:
-   14768:	e2103102 	ands	r3, r0, #-2147483648	; 0x80000000
-   1476c:	42600000 	rsbmi	r0, r0, #0	; 0x0
-   14770:	e1b0c000 	movs	ip, r0
-   14774:	012fff1e 	bxeq	lr
-   14778:	e383344b 	orr	r3, r3, #1258291200	; 0x4b000000
-   1477c:	e1a01000 	mov	r1, r0
-   14780:	e3a00000 	mov	r0, #0	; 0x0
-   14784:	ea00000f 	b	147c8 <__aeabi_l2f+0x30>
-
-00014788 <__aeabi_ul2f>:
-   14788:	e1902001 	orrs	r2, r0, r1
-   1478c:	012fff1e 	bxeq	lr
-   14790:	e3a03000 	mov	r3, #0	; 0x0
-   14794:	ea000005 	b	147b0 <__aeabi_l2f+0x18>
-
-00014798 <__aeabi_l2f>:
-   14798:	e1902001 	orrs	r2, r0, r1
-   1479c:	012fff1e 	bxeq	lr
-   147a0:	e2113102 	ands	r3, r1, #-2147483648	; 0x80000000
-   147a4:	5a000001 	bpl	147b0 <__aeabi_l2f+0x18>
-   147a8:	e2700000 	rsbs	r0, r0, #0	; 0x0
-   147ac:	e2e11000 	rsc	r1, r1, #0	; 0x0
-   147b0:	e1b0c001 	movs	ip, r1
-   147b4:	01a0c000 	moveq	ip, r0
-   147b8:	01a01000 	moveq	r1, r0
-   147bc:	03a00000 	moveq	r0, #0	; 0x0
-   147c0:	e383345b 	orr	r3, r3, #1526726656	; 0x5b000000
-   147c4:	02433201 	subeq	r3, r3, #268435456	; 0x10000000
-   147c8:	e2433502 	sub	r3, r3, #8388608	; 0x800000
-   147cc:	e3a02017 	mov	r2, #23	; 0x17
-   147d0:	e35c0801 	cmp	ip, #65536	; 0x10000
-   147d4:	21a0c82c 	movcs	ip, ip, lsr #16
-   147d8:	22422010 	subcs	r2, r2, #16	; 0x10
-   147dc:	e35c0c01 	cmp	ip, #256	; 0x100
-   147e0:	21a0c42c 	movcs	ip, ip, lsr #8
-   147e4:	22422008 	subcs	r2, r2, #8	; 0x8
-   147e8:	e35c0010 	cmp	ip, #16	; 0x10
-   147ec:	21a0c22c 	movcs	ip, ip, lsr #4
-   147f0:	22422004 	subcs	r2, r2, #4	; 0x4
-   147f4:	e35c0004 	cmp	ip, #4	; 0x4
-   147f8:	22422002 	subcs	r2, r2, #2	; 0x2
-   147fc:	304220ac 	subcc	r2, r2, ip, lsr #1
-   14800:	e05221ac 	subs	r2, r2, ip, lsr #3
-   14804:	e0433b82 	sub	r3, r3, r2, lsl #23
-   14808:	ba000006 	blt	14828 <__aeabi_l2f+0x90>
-   1480c:	e0833211 	add	r3, r3, r1, lsl r2
-   14810:	e1a0c210 	mov	ip, r0, lsl r2
-   14814:	e2622020 	rsb	r2, r2, #32	; 0x20
-   14818:	e35c0102 	cmp	ip, #-2147483648	; 0x80000000
-   1481c:	e0a30230 	adc	r0, r3, r0, lsr r2
-   14820:	03c00001 	biceq	r0, r0, #1	; 0x1
-   14824:	e12fff1e 	bx	lr
-   14828:	e2822020 	add	r2, r2, #32	; 0x20
-   1482c:	e1a0c211 	mov	ip, r1, lsl r2
-   14830:	e2622020 	rsb	r2, r2, #32	; 0x20
-   14834:	e190008c 	orrs	r0, r0, ip, lsl #1
-   14838:	e0a30231 	adc	r0, r3, r1, lsr r2
-   1483c:	01c00fac 	biceq	r0, r0, ip, lsr #31
-   14840:	e12fff1e 	bx	lr
-
-00014844 <__aeabi_fmul>:
-   14844:	e3a0c0ff 	mov	ip, #255	; 0xff
-   14848:	e01c2ba0 	ands	r2, ip, r0, lsr #23
-   1484c:	101c3ba1 	andnes	r3, ip, r1, lsr #23
-   14850:	1132000c 	teqne	r2, ip
-   14854:	1133000c 	teqne	r3, ip
-   14858:	0a00003e 	beq	14958 <__aeabi_fmul+0x114>
-   1485c:	e0822003 	add	r2, r2, r3
-   14860:	e020c001 	eor	ip, r0, r1
-   14864:	e1b00480 	movs	r0, r0, lsl #9
-   14868:	11b01481 	movnes	r1, r1, lsl #9
-   1486c:	0a000010 	beq	148b4 <__aeabi_fmul+0x70>
-   14870:	e3a03302 	mov	r3, #134217728	; 0x8000000
-   14874:	e18302a0 	orr	r0, r3, r0, lsr #5
-   14878:	e18312a1 	orr	r1, r3, r1, lsr #5
-   1487c:	e0813190 	umull	r3, r1, r0, r1
-   14880:	e20c0102 	and	r0, ip, #-2147483648	; 0x80000000
-   14884:	e3510502 	cmp	r1, #8388608	; 0x800000
-   14888:	31a01081 	movcc	r1, r1, lsl #1
-   1488c:	31811fa3 	orrcc	r1, r1, r3, lsr #31
-   14890:	31a03083 	movcc	r3, r3, lsl #1
-   14894:	e1800001 	orr	r0, r0, r1
-   14898:	e2c2207f 	sbc	r2, r2, #127	; 0x7f
-   1489c:	e35200fd 	cmp	r2, #253	; 0xfd
-   148a0:	8a00000f 	bhi	148e4 <__aeabi_fmul+0xa0>
-   148a4:	e3530102 	cmp	r3, #-2147483648	; 0x80000000
-   148a8:	e0a00b82 	adc	r0, r0, r2, lsl #23
-   148ac:	03c00001 	biceq	r0, r0, #1	; 0x1
-   148b0:	e12fff1e 	bx	lr
-   148b4:	e3300000 	teq	r0, #0	; 0x0
-   148b8:	e20cc102 	and	ip, ip, #-2147483648	; 0x80000000
-   148bc:	01a01481 	moveq	r1, r1, lsl #9
-   148c0:	e18c04a0 	orr	r0, ip, r0, lsr #9
-   148c4:	e18004a1 	orr	r0, r0, r1, lsr #9
-   148c8:	e252207f 	subs	r2, r2, #127	; 0x7f
-   148cc:	c27230ff 	rsbgts	r3, r2, #255	; 0xff
-   148d0:	c1800b82 	orrgt	r0, r0, r2, lsl #23
-   148d4:	c12fff1e 	bxgt	lr
-   148d8:	e3800502 	orr	r0, r0, #8388608	; 0x800000
-   148dc:	e3a03000 	mov	r3, #0	; 0x0
-   148e0:	e2522001 	subs	r2, r2, #1	; 0x1
-   148e4:	ca000035 	bgt	149c0 <__aeabi_fmul+0x17c>
-   148e8:	e3720019 	cmn	r2, #25	; 0x19
-   148ec:	d2000102 	andle	r0, r0, #-2147483648	; 0x80000000
-   148f0:	d12fff1e 	bxle	lr
-   148f4:	e2622000 	rsb	r2, r2, #0	; 0x0
-   148f8:	e1b01080 	movs	r1, r0, lsl #1
-   148fc:	e1a01231 	mov	r1, r1, lsr r2
-   14900:	e2622020 	rsb	r2, r2, #32	; 0x20
-   14904:	e1a0c210 	mov	ip, r0, lsl r2
-   14908:	e1b00061 	movs	r0, r1, rrx
-   1490c:	e2a00000 	adc	r0, r0, #0	; 0x0
-   14910:	e193308c 	orrs	r3, r3, ip, lsl #1
-   14914:	01c00fac 	biceq	r0, r0, ip, lsr #31
-   14918:	e12fff1e 	bx	lr
-   1491c:	e3320000 	teq	r2, #0	; 0x0
-   14920:	e200c102 	and	ip, r0, #-2147483648	; 0x80000000
-   14924:	01a00080 	moveq	r0, r0, lsl #1
-   14928:	03100502 	tsteq	r0, #8388608	; 0x800000
-   1492c:	02422001 	subeq	r2, r2, #1	; 0x1
-   14930:	0afffffb 	beq	14924 <__aeabi_fmul+0xe0>
-   14934:	e180000c 	orr	r0, r0, ip
-   14938:	e3330000 	teq	r3, #0	; 0x0
-   1493c:	e201c102 	and	ip, r1, #-2147483648	; 0x80000000
-   14940:	01a01081 	moveq	r1, r1, lsl #1
-   14944:	03110502 	tsteq	r1, #8388608	; 0x800000
-   14948:	02433001 	subeq	r3, r3, #1	; 0x1
-   1494c:	0afffffb 	beq	14940 <__aeabi_fmul+0xfc>
-   14950:	e181100c 	orr	r1, r1, ip
-   14954:	eaffffc0 	b	1485c <__aeabi_fmul+0x18>
-   14958:	e00c3ba1 	and	r3, ip, r1, lsr #23
-   1495c:	e132000c 	teq	r2, ip
-   14960:	1133000c 	teqne	r3, ip
-   14964:	0a000005 	beq	14980 <__aeabi_fmul+0x13c>
-   14968:	e3d0c102 	bics	ip, r0, #-2147483648	; 0x80000000
-   1496c:	13d1c102 	bicnes	ip, r1, #-2147483648	; 0x80000000
-   14970:	1affffe9 	bne	1491c <__aeabi_fmul+0xd8>
-   14974:	e0200001 	eor	r0, r0, r1
-   14978:	e2000102 	and	r0, r0, #-2147483648	; 0x80000000
-   1497c:	e12fff1e 	bx	lr
-   14980:	e3300000 	teq	r0, #0	; 0x0
-   14984:	13300102 	teqne	r0, #-2147483648	; 0x80000000
-   14988:	01a00001 	moveq	r0, r1
-   1498c:	13310000 	teqne	r1, #0	; 0x0
-   14990:	13310102 	teqne	r1, #-2147483648	; 0x80000000
-   14994:	0a00000d 	beq	149d0 <__aeabi_fmul+0x18c>
-   14998:	e132000c 	teq	r2, ip
-   1499c:	1a000001 	bne	149a8 <__aeabi_fmul+0x164>
-   149a0:	e1b02480 	movs	r2, r0, lsl #9
-   149a4:	1a000009 	bne	149d0 <__aeabi_fmul+0x18c>
-   149a8:	e133000c 	teq	r3, ip
-   149ac:	1a000002 	bne	149bc <__aeabi_fmul+0x178>
-   149b0:	e1b03481 	movs	r3, r1, lsl #9
-   149b4:	11a00001 	movne	r0, r1
-   149b8:	1a000004 	bne	149d0 <__aeabi_fmul+0x18c>
-   149bc:	e0200001 	eor	r0, r0, r1
-   149c0:	e2000102 	and	r0, r0, #-2147483648	; 0x80000000
-   149c4:	e380047f 	orr	r0, r0, #2130706432	; 0x7f000000
-   149c8:	e3800502 	orr	r0, r0, #8388608	; 0x800000
-   149cc:	e12fff1e 	bx	lr
-   149d0:	e380047f 	orr	r0, r0, #2130706432	; 0x7f000000
-   149d4:	e3800503 	orr	r0, r0, #12582912	; 0xc00000
-   149d8:	e12fff1e 	bx	lr
-
-000149dc <__aeabi_fdiv>:
-   149dc:	e3a0c0ff 	mov	ip, #255	; 0xff
-   149e0:	e01c2ba0 	ands	r2, ip, r0, lsr #23
-   149e4:	101c3ba1 	andnes	r3, ip, r1, lsr #23
-   149e8:	1132000c 	teqne	r2, ip
-   149ec:	1133000c 	teqne	r3, ip
-   149f0:	0a00003a 	beq	14ae0 <__aeabi_fdiv+0x104>
-   149f4:	e0422003 	sub	r2, r2, r3
-   149f8:	e020c001 	eor	ip, r0, r1
-   149fc:	e1b01481 	movs	r1, r1, lsl #9
-   14a00:	e1a00480 	mov	r0, r0, lsl #9
-   14a04:	0a00001c 	beq	14a7c <__aeabi_fdiv+0xa0>
-   14a08:	e3a03201 	mov	r3, #268435456	; 0x10000000
-   14a0c:	e1831221 	orr	r1, r3, r1, lsr #4
-   14a10:	e1833220 	orr	r3, r3, r0, lsr #4
-   14a14:	e20c0102 	and	r0, ip, #-2147483648	; 0x80000000
-   14a18:	e1530001 	cmp	r3, r1
-   14a1c:	31a03083 	movcc	r3, r3, lsl #1
-   14a20:	e2a2207d 	adc	r2, r2, #125	; 0x7d
-   14a24:	e3a0c502 	mov	ip, #8388608	; 0x800000
-   14a28:	e1530001 	cmp	r3, r1
-   14a2c:	20433001 	subcs	r3, r3, r1
-   14a30:	2180000c 	orrcs	r0, r0, ip
-   14a34:	e15300a1 	cmp	r3, r1, lsr #1
-   14a38:	204330a1 	subcs	r3, r3, r1, lsr #1
-   14a3c:	218000ac 	orrcs	r0, r0, ip, lsr #1
-   14a40:	e1530121 	cmp	r3, r1, lsr #2
-   14a44:	20433121 	subcs	r3, r3, r1, lsr #2
-   14a48:	2180012c 	orrcs	r0, r0, ip, lsr #2
-   14a4c:	e15301a1 	cmp	r3, r1, lsr #3
-   14a50:	204331a1 	subcs	r3, r3, r1, lsr #3
-   14a54:	218001ac 	orrcs	r0, r0, ip, lsr #3
-   14a58:	e1b03203 	movs	r3, r3, lsl #4
-   14a5c:	11b0c22c 	movnes	ip, ip, lsr #4
-   14a60:	1afffff0 	bne	14a28 <__aeabi_fdiv+0x4c>
-   14a64:	e35200fd 	cmp	r2, #253	; 0xfd
-   14a68:	8affff9d 	bhi	148e4 <__aeabi_fmul+0xa0>
-   14a6c:	e1530001 	cmp	r3, r1
-   14a70:	e0a00b82 	adc	r0, r0, r2, lsl #23
-   14a74:	03c00001 	biceq	r0, r0, #1	; 0x1
-   14a78:	e12fff1e 	bx	lr
-   14a7c:	e20cc102 	and	ip, ip, #-2147483648	; 0x80000000
-   14a80:	e18c04a0 	orr	r0, ip, r0, lsr #9
-   14a84:	e292207f 	adds	r2, r2, #127	; 0x7f
-   14a88:	c27230ff 	rsbgts	r3, r2, #255	; 0xff
-   14a8c:	c1800b82 	orrgt	r0, r0, r2, lsl #23
-   14a90:	c12fff1e 	bxgt	lr
-   14a94:	e3800502 	orr	r0, r0, #8388608	; 0x800000
-   14a98:	e3a03000 	mov	r3, #0	; 0x0
-   14a9c:	e2522001 	subs	r2, r2, #1	; 0x1
-   14aa0:	eaffff8f 	b	148e4 <__aeabi_fmul+0xa0>
-   14aa4:	e3320000 	teq	r2, #0	; 0x0
-   14aa8:	e200c102 	and	ip, r0, #-2147483648	; 0x80000000
-   14aac:	01a00080 	moveq	r0, r0, lsl #1
-   14ab0:	03100502 	tsteq	r0, #8388608	; 0x800000
-   14ab4:	02422001 	subeq	r2, r2, #1	; 0x1
-   14ab8:	0afffffb 	beq	14aac <__aeabi_fdiv+0xd0>
-   14abc:	e180000c 	orr	r0, r0, ip
-   14ac0:	e3330000 	teq	r3, #0	; 0x0
-   14ac4:	e201c102 	and	ip, r1, #-2147483648	; 0x80000000
-   14ac8:	01a01081 	moveq	r1, r1, lsl #1
-   14acc:	03110502 	tsteq	r1, #8388608	; 0x800000
-   14ad0:	02433001 	subeq	r3, r3, #1	; 0x1
-   14ad4:	0afffffb 	beq	14ac8 <__aeabi_fdiv+0xec>
-   14ad8:	e181100c 	orr	r1, r1, ip
-   14adc:	eaffffc4 	b	149f4 <__aeabi_fdiv+0x18>
-   14ae0:	e00c3ba1 	and	r3, ip, r1, lsr #23
-   14ae4:	e132000c 	teq	r2, ip
-   14ae8:	1a000005 	bne	14b04 <__aeabi_fdiv+0x128>
-   14aec:	e1b02480 	movs	r2, r0, lsl #9
-   14af0:	1affffb6 	bne	149d0 <__aeabi_fmul+0x18c>
-   14af4:	e133000c 	teq	r3, ip
-   14af8:	1affffaf 	bne	149bc <__aeabi_fmul+0x178>
-   14afc:	e1a00001 	mov	r0, r1
-   14b00:	eaffffb2 	b	149d0 <__aeabi_fmul+0x18c>
-   14b04:	e133000c 	teq	r3, ip
-   14b08:	1a000003 	bne	14b1c <__aeabi_fdiv+0x140>
-   14b0c:	e1b03481 	movs	r3, r1, lsl #9
-   14b10:	0affff97 	beq	14974 <__aeabi_fmul+0x130>
-   14b14:	e1a00001 	mov	r0, r1
-   14b18:	eaffffac 	b	149d0 <__aeabi_fmul+0x18c>
-   14b1c:	e3d0c102 	bics	ip, r0, #-2147483648	; 0x80000000
-   14b20:	13d1c102 	bicnes	ip, r1, #-2147483648	; 0x80000000
-   14b24:	1affffde 	bne	14aa4 <__aeabi_fdiv+0xc8>
-   14b28:	e3d02102 	bics	r2, r0, #-2147483648	; 0x80000000
-   14b2c:	1affffa2 	bne	149bc <__aeabi_fmul+0x178>
-   14b30:	e3d13102 	bics	r3, r1, #-2147483648	; 0x80000000
-   14b34:	1affff8e 	bne	14974 <__aeabi_fmul+0x130>
-   14b38:	eaffffa4 	b	149d0 <__aeabi_fmul+0x18c>
-
-00014b3c <__gesf2>:
-   14b3c:	e3e0c000 	mvn	ip, #0	; 0x0
-   14b40:	ea000002 	b	14b50 <__cmpsf2+0x4>
-
-00014b44 <__lesf2>:
-   14b44:	e3a0c001 	mov	ip, #1	; 0x1
-   14b48:	ea000000 	b	14b50 <__cmpsf2+0x4>
-
-00014b4c <__cmpsf2>:
-   14b4c:	e3a0c001 	mov	ip, #1	; 0x1
-   14b50:	e50dc004 	str	ip, [sp, #-4]
-   14b54:	e1a02080 	mov	r2, r0, lsl #1
-   14b58:	e1a03081 	mov	r3, r1, lsl #1
-   14b5c:	e1f0cc42 	mvns	ip, r2, asr #24
-   14b60:	11f0cc43 	mvnnes	ip, r3, asr #24
-   14b64:	0a000006 	beq	14b84 <__cmpsf2+0x38>
-   14b68:	e192c0a3 	orrs	ip, r2, r3, lsr #1
-   14b6c:	11300001 	teqne	r0, r1
-   14b70:	50520003 	subpls	r0, r2, r3
-   14b74:	81a00fc1 	movhi	r0, r1, asr #31
-   14b78:	31e00fc1 	mvncc	r0, r1, asr #31
-   14b7c:	13800001 	orrne	r0, r0, #1	; 0x1
-   14b80:	e12fff1e 	bx	lr
-   14b84:	e1f0cc42 	mvns	ip, r2, asr #24
-   14b88:	1a000001 	bne	14b94 <__cmpsf2+0x48>
-   14b8c:	e1b0c480 	movs	ip, r0, lsl #9
-   14b90:	1a000003 	bne	14ba4 <__cmpsf2+0x58>
-   14b94:	e1f0cc43 	mvns	ip, r3, asr #24
-   14b98:	1afffff2 	bne	14b68 <__cmpsf2+0x1c>
-   14b9c:	e1b0c481 	movs	ip, r1, lsl #9
-   14ba0:	0afffff0 	beq	14b68 <__cmpsf2+0x1c>
-   14ba4:	e51d0004 	ldr	r0, [sp, #-4]
-   14ba8:	e12fff1e 	bx	lr
-
-00014bac <__aeabi_cfrcmple>:
-   14bac:	e1a0c000 	mov	ip, r0
-   14bb0:	e1a00001 	mov	r0, r1
-   14bb4:	e1a0100c 	mov	r1, ip
-   14bb8:	eaffffff 	b	14bbc <__aeabi_cfcmpeq>
-
-00014bbc <__aeabi_cfcmpeq>:
-   14bbc:	e92d400f 	stmdb	sp!, {r0, r1, r2, r3, lr}
-   14bc0:	ebffffe1 	bl	14b4c <__cmpsf2>
-   14bc4:	e3500000 	cmp	r0, #0	; 0x0
-   14bc8:	43700000 	cmnmi	r0, #0	; 0x0
-   14bcc:	e8bd400f 	ldmia	sp!, {r0, r1, r2, r3, lr}
-   14bd0:	e12fff1e 	bx	lr
-
-00014bd4 <__aeabi_fcmpeq>:
-   14bd4:	e52de008 	str	lr, [sp, #-8]!
-   14bd8:	ebfffff7 	bl	14bbc <__aeabi_cfcmpeq>
-   14bdc:	03a00001 	moveq	r0, #1	; 0x1
-   14be0:	13a00000 	movne	r0, #0	; 0x0
-   14be4:	e49de008 	ldr	lr, [sp], #8
-   14be8:	e12fff1e 	bx	lr
-
-00014bec <__aeabi_fcmplt>:
-   14bec:	e52de008 	str	lr, [sp, #-8]!
-   14bf0:	ebfffff1 	bl	14bbc <__aeabi_cfcmpeq>
-   14bf4:	33a00001 	movcc	r0, #1	; 0x1
-   14bf8:	23a00000 	movcs	r0, #0	; 0x0
-   14bfc:	e49de008 	ldr	lr, [sp], #8
-   14c00:	e12fff1e 	bx	lr
-
-00014c04 <__aeabi_fcmple>:
-   14c04:	e52de008 	str	lr, [sp, #-8]!
-   14c08:	ebffffeb 	bl	14bbc <__aeabi_cfcmpeq>
-   14c0c:	93a00001 	movls	r0, #1	; 0x1
-   14c10:	83a00000 	movhi	r0, #0	; 0x0
-   14c14:	e49de008 	ldr	lr, [sp], #8
-   14c18:	e12fff1e 	bx	lr
-
-00014c1c <__aeabi_fcmpge>:
-   14c1c:	e52de008 	str	lr, [sp, #-8]!
-   14c20:	ebffffe1 	bl	14bac <__aeabi_cfrcmple>
-   14c24:	93a00001 	movls	r0, #1	; 0x1
-   14c28:	83a00000 	movhi	r0, #0	; 0x0
-   14c2c:	e49de008 	ldr	lr, [sp], #8
-   14c30:	e12fff1e 	bx	lr
-
-00014c34 <__aeabi_fcmpgt>:
-   14c34:	e52de008 	str	lr, [sp, #-8]!
-   14c38:	ebffffdb 	bl	14bac <__aeabi_cfrcmple>
-   14c3c:	33a00001 	movcc	r0, #1	; 0x1
-   14c40:	23a00000 	movcs	r0, #0	; 0x0
-   14c44:	e49de008 	ldr	lr, [sp], #8
-   14c48:	e12fff1e 	bx	lr
-
-00014c4c <__aeabi_f2iz>:
-   14c4c:	e1a02080 	mov	r2, r0, lsl #1
-   14c50:	e352047f 	cmp	r2, #2130706432	; 0x7f000000
-   14c54:	3a000008 	bcc	14c7c <__aeabi_f2iz+0x30>
-   14c58:	e3a0309e 	mov	r3, #158	; 0x9e
-   14c5c:	e0532c22 	subs	r2, r3, r2, lsr #24
-   14c60:	9a000007 	bls	14c84 <__aeabi_f2iz+0x38>
-   14c64:	e1a03400 	mov	r3, r0, lsl #8
-   14c68:	e3833102 	orr	r3, r3, #-2147483648	; 0x80000000
-   14c6c:	e3100102 	tst	r0, #-2147483648	; 0x80000000
-   14c70:	e1a00233 	mov	r0, r3, lsr r2
-   14c74:	12600000 	rsbne	r0, r0, #0	; 0x0
-   14c78:	e12fff1e 	bx	lr
-   14c7c:	e3a00000 	mov	r0, #0	; 0x0
-   14c80:	e12fff1e 	bx	lr
-   14c84:	e3720061 	cmn	r2, #97	; 0x61
-   14c88:	1a000001 	bne	14c94 <__aeabi_f2iz+0x48>
-   14c8c:	e1b02480 	movs	r2, r0, lsl #9
-   14c90:	1a000002 	bne	14ca0 <__aeabi_f2iz+0x54>
-   14c94:	e2100102 	ands	r0, r0, #-2147483648	; 0x80000000
-   14c98:	03e00102 	mvneq	r0, #-2147483648	; 0x80000000
-   14c9c:	e12fff1e 	bx	lr
-   14ca0:	e3a00000 	mov	r0, #0	; 0x0
-   14ca4:	e12fff1e 	bx	lr
-
-00014ca8 <__divdi3>:
-   14ca8:	b5f0      	push	{r4, r5, r6, r7, lr}
-   14caa:	465f      	mov	r7, fp
-   14cac:	4656      	mov	r6, sl
-   14cae:	464d      	mov	r5, r9
-   14cb0:	4644      	mov	r4, r8
-   14cb2:	b4f0      	push	{r4, r5, r6, r7}
-   14cb4:	2400      	movs	r4, #0
-   14cb6:	2500      	movs	r5, #0
-   14cb8:	b088      	sub	sp, #32
-   14cba:	9400      	str	r4, [sp, #0]
-   14cbc:	9501      	str	r5, [sp, #4]
-   14cbe:	1c14      	adds	r4, r2, #0
-   14cc0:	1c1d      	adds	r5, r3, #0
-   14cc2:	2900      	cmp	r1, #0
-   14cc4:	da00      	bge.n	14cc8 <__divdi3+0x20>
-   14cc6:	e0ff      	b.n	14ec8 <__divdi3+0x220>
-   14cc8:	2600      	movs	r6, #0
-   14cca:	9602      	str	r6, [sp, #8]
-   14ccc:	2b00      	cmp	r3, #0
-   14cce:	da00      	bge.n	14cd2 <__divdi3+0x2a>
-   14cd0:	e0f3      	b.n	14eba <__divdi3+0x212>
-   14cd2:	1c26      	adds	r6, r4, #0
-   14cd4:	4681      	mov	r9, r0
-   14cd6:	1c0f      	adds	r7, r1, #0
-   14cd8:	2d00      	cmp	r5, #0
-   14cda:	d15c      	bne.n	14d96 <__divdi3+0xee>
-   14cdc:	42bc      	cmp	r4, r7
-   14cde:	d900      	bls.n	14ce2 <__divdi3+0x3a>
-   14ce0:	e074      	b.n	14dcc <__divdi3+0x124>
-   14ce2:	2c00      	cmp	r4, #0
-   14ce4:	d100      	bne.n	14ce8 <__divdi3+0x40>
-   14ce6:	e10d      	b.n	14f04 <__divdi3+0x25c>
-   14ce8:	4bbf      	ldr	r3, [pc, #764]	(14fe8 <.text+0x14fe8>)
-   14cea:	429e      	cmp	r6, r3
-   14cec:	d900      	bls.n	14cf0 <__divdi3+0x48>
-   14cee:	e0f4      	b.n	14eda <__divdi3+0x232>
-   14cf0:	2eff      	cmp	r6, #255
-   14cf2:	d900      	bls.n	14cf6 <__divdi3+0x4e>
-   14cf4:	e1df      	b.n	150b6 <.text+0x150b6>
-   14cf6:	2100      	movs	r1, #0
-   14cf8:	2300      	movs	r3, #0
-   14cfa:	4abc      	ldr	r2, [pc, #752]	(14fec <.text+0x14fec>)
-   14cfc:	1c34      	adds	r4, r6, #0
-   14cfe:	40dc      	lsrs	r4, r3
-   14d00:	5d13      	ldrb	r3, [r2, r4]
-   14d02:	2220      	movs	r2, #32
-   14d04:	18cb      	adds	r3, r1, r3
-   14d06:	1ad3      	subs	r3, r2, r3
-   14d08:	469a      	mov	sl, r3
-   14d0a:	2b00      	cmp	r3, #0
-   14d0c:	d000      	beq.n	14d10 <__divdi3+0x68>
-   14d0e:	e171      	b.n	14ff4 <.text+0x14ff4>
-   14d10:	4bb5      	ldr	r3, [pc, #724]	(14fe8 <.text+0x14fe8>)
-   14d12:	2001      	movs	r0, #1
-   14d14:	4033      	ands	r3, r6
-   14d16:	9004      	str	r0, [sp, #16]
-   14d18:	1bbd      	subs	r5, r7, r6
-   14d1a:	469b      	mov	fp, r3
-   14d1c:	0c37      	lsrs	r7, r6, #16
-   14d1e:	1c39      	adds	r1, r7, #0
-   14d20:	1c28      	adds	r0, r5, #0
-   14d22:	f7fe fd4b 	bl	137bc <__aeabi_uidiv>
-   14d26:	4659      	mov	r1, fp
-   14d28:	4680      	mov	r8, r0
-   14d2a:	4644      	mov	r4, r8
-   14d2c:	434c      	muls	r4, r1
-   14d2e:	1c28      	adds	r0, r5, #0
-   14d30:	1c39      	adds	r1, r7, #0
-   14d32:	f7fe fddb 	bl	138ec <__umodsi3>
-   14d36:	464a      	mov	r2, r9
-   14d38:	0400      	lsls	r0, r0, #16
-   14d3a:	0c13      	lsrs	r3, r2, #16
-   14d3c:	4318      	orrs	r0, r3
-   14d3e:	4284      	cmp	r4, r0
-   14d40:	d908      	bls.n	14d54 <__divdi3+0xac>
-   14d42:	2301      	movs	r3, #1
-   14d44:	425b      	negs	r3, r3
-   14d46:	1980      	adds	r0, r0, r6
-   14d48:	4498      	add	r8, r3
-   14d4a:	4286      	cmp	r6, r0
-   14d4c:	d802      	bhi.n	14d54 <__divdi3+0xac>
-   14d4e:	4284      	cmp	r4, r0
-   14d50:	d900      	bls.n	14d54 <__divdi3+0xac>
-   14d52:	e1d5      	b.n	15100 <.text+0x15100>
-   14d54:	1b04      	subs	r4, r0, r4
-   14d56:	1c39      	adds	r1, r7, #0
-   14d58:	1c20      	adds	r0, r4, #0
-   14d5a:	f7fe fd2f 	bl	137bc <__aeabi_uidiv>
-   14d5e:	1c05      	adds	r5, r0, #0
-   14d60:	4658      	mov	r0, fp
-   14d62:	4368      	muls	r0, r5
-   14d64:	1c39      	adds	r1, r7, #0
-   14d66:	4682      	mov	sl, r0
-   14d68:	1c20      	adds	r0, r4, #0
-   14d6a:	f7fe fdbf 	bl	138ec <__umodsi3>
-   14d6e:	4b9e      	ldr	r3, [pc, #632]	(14fe8 <.text+0x14fe8>)
-   14d70:	4649      	mov	r1, r9
-   14d72:	0400      	lsls	r0, r0, #16
-   14d74:	400b      	ands	r3, r1
-   14d76:	4318      	orrs	r0, r3
-   14d78:	4582      	cmp	sl, r0
-   14d7a:	d906      	bls.n	14d8a <__divdi3+0xe2>
-   14d7c:	1830      	adds	r0, r6, r0
-   14d7e:	3d01      	subs	r5, #1
-   14d80:	4286      	cmp	r6, r0
-   14d82:	d802      	bhi.n	14d8a <__divdi3+0xe2>
-   14d84:	4582      	cmp	sl, r0
-   14d86:	d900      	bls.n	14d8a <__divdi3+0xe2>
-   14d88:	e1b3      	b.n	150f2 <.text+0x150f2>
-   14d8a:	4642      	mov	r2, r8
-   14d8c:	0413      	lsls	r3, r2, #16
-   14d8e:	1c28      	adds	r0, r5, #0
-   14d90:	4318      	orrs	r0, r3
-   14d92:	9b04      	ldr	r3, [sp, #16]
-   14d94:	e005      	b.n	14da2 <__divdi3+0xfa>
-   14d96:	1c29      	adds	r1, r5, #0
-   14d98:	42bd      	cmp	r5, r7
-   14d9a:	d800      	bhi.n	14d9e <__divdi3+0xf6>
-   14d9c:	e073      	b.n	14e86 <__divdi3+0x1de>
-   14d9e:	2000      	movs	r0, #0
-   14da0:	2300      	movs	r3, #0
-   14da2:	9a02      	ldr	r2, [sp, #8]
-   14da4:	9000      	str	r0, [sp, #0]
-   14da6:	9301      	str	r3, [sp, #4]
-   14da8:	9800      	ldr	r0, [sp, #0]
-   14daa:	9901      	ldr	r1, [sp, #4]
-   14dac:	2a00      	cmp	r2, #0
-   14dae:	d004      	beq.n	14dba <__divdi3+0x112>
-   14db0:	1c03      	adds	r3, r0, #0
-   14db2:	1c0c      	adds	r4, r1, #0
-   14db4:	2100      	movs	r1, #0
-   14db6:	4258      	negs	r0, r3
-   14db8:	41a1      	sbcs	r1, r4
-   14dba:	b008      	add	sp, #32
-   14dbc:	bc3c      	pop	{r2, r3, r4, r5}
-   14dbe:	4690      	mov	r8, r2
-   14dc0:	4699      	mov	r9, r3
-   14dc2:	46a2      	mov	sl, r4
-   14dc4:	46ab      	mov	fp, r5
-   14dc6:	bcf0      	pop	{r4, r5, r6, r7}
-   14dc8:	bc04      	pop	{r2}
-   14dca:	4710      	bx	r2
-   14dcc:	4b86      	ldr	r3, [pc, #536]	(14fe8 <.text+0x14fe8>)
-   14dce:	429c      	cmp	r4, r3
-   14dd0:	d900      	bls.n	14dd4 <__divdi3+0x12c>
-   14dd2:	e090      	b.n	14ef6 <__divdi3+0x24e>
-   14dd4:	2cff      	cmp	r4, #255
-   14dd6:	d900      	bls.n	14dda <__divdi3+0x132>
-   14dd8:	e167      	b.n	150aa <.text+0x150aa>
-   14dda:	2100      	movs	r1, #0
-   14ddc:	2300      	movs	r3, #0
-   14dde:	4a83      	ldr	r2, [pc, #524]	(14fec <.text+0x14fec>)
-   14de0:	1c35      	adds	r5, r6, #0
-   14de2:	40dd      	lsrs	r5, r3
-   14de4:	5d53      	ldrb	r3, [r2, r5]
-   14de6:	18cb      	adds	r3, r1, r3
-   14de8:	2120      	movs	r1, #32
-   14dea:	1acd      	subs	r5, r1, r3
-   14dec:	2d00      	cmp	r5, #0
-   14dee:	d00b      	beq.n	14e08 <__divdi3+0x160>
-   14df0:	1c3a      	adds	r2, r7, #0
-   14df2:	1b4b      	subs	r3, r1, r5
-   14df4:	464f      	mov	r7, r9
-   14df6:	40df      	lsrs	r7, r3
-   14df8:	4648      	mov	r0, r9
-   14dfa:	40aa      	lsls	r2, r5
-   14dfc:	1c3b      	adds	r3, r7, #0
-   14dfe:	40a8      	lsls	r0, r5
-   14e00:	1c17      	adds	r7, r2, #0
-   14e02:	40ae      	lsls	r6, r5
-   14e04:	431f      	orrs	r7, r3
-   14e06:	4681      	mov	r9, r0
-   14e08:	4b77      	ldr	r3, [pc, #476]	(14fe8 <.text+0x14fe8>)
-   14e0a:	0c31      	lsrs	r1, r6, #16
-   14e0c:	4033      	ands	r3, r6
-   14e0e:	1c38      	adds	r0, r7, #0
-   14e10:	469b      	mov	fp, r3
-   14e12:	4688      	mov	r8, r1
-   14e14:	f7fe fcd2 	bl	137bc <__aeabi_uidiv>
-   14e18:	465a      	mov	r2, fp
-   14e1a:	4682      	mov	sl, r0
-   14e1c:	4641      	mov	r1, r8
-   14e1e:	1c38      	adds	r0, r7, #0
-   14e20:	4654      	mov	r4, sl
-   14e22:	4354      	muls	r4, r2
-   14e24:	f7fe fd62 	bl	138ec <__umodsi3>
-   14e28:	464d      	mov	r5, r9
-   14e2a:	0400      	lsls	r0, r0, #16
-   14e2c:	0c2b      	lsrs	r3, r5, #16
-   14e2e:	4318      	orrs	r0, r3
-   14e30:	4284      	cmp	r4, r0
-   14e32:	d908      	bls.n	14e46 <__divdi3+0x19e>
-   14e34:	2701      	movs	r7, #1
-   14e36:	427f      	negs	r7, r7
-   14e38:	1980      	adds	r0, r0, r6
-   14e3a:	44ba      	add	sl, r7
-   14e3c:	4286      	cmp	r6, r0
-   14e3e:	d802      	bhi.n	14e46 <__divdi3+0x19e>
-   14e40:	4284      	cmp	r4, r0
-   14e42:	d900      	bls.n	14e46 <__divdi3+0x19e>
-   14e44:	e159      	b.n	150fa <.text+0x150fa>
-   14e46:	1b04      	subs	r4, r0, r4
-   14e48:	4641      	mov	r1, r8
-   14e4a:	1c20      	adds	r0, r4, #0
-   14e4c:	f7fe fcb6 	bl	137bc <__aeabi_uidiv>
-   14e50:	4641      	mov	r1, r8
-   14e52:	1c05      	adds	r5, r0, #0
-   14e54:	465f      	mov	r7, fp
-   14e56:	4347      	muls	r7, r0
-   14e58:	1c20      	adds	r0, r4, #0
-   14e5a:	f7fe fd47 	bl	138ec <__umodsi3>
-   14e5e:	4b62      	ldr	r3, [pc, #392]	(14fe8 <.text+0x14fe8>)
-   14e60:	4649      	mov	r1, r9
-   14e62:	0400      	lsls	r0, r0, #16
-   14e64:	400b      	ands	r3, r1
-   14e66:	4318      	orrs	r0, r3
-   14e68:	4287      	cmp	r7, r0
-   14e6a:	d906      	bls.n	14e7a <__divdi3+0x1d2>
-   14e6c:	1830      	adds	r0, r6, r0
-   14e6e:	3d01      	subs	r5, #1
-   14e70:	4286      	cmp	r6, r0
-   14e72:	d802      	bhi.n	14e7a <__divdi3+0x1d2>
-   14e74:	4287      	cmp	r7, r0
-   14e76:	d900      	bls.n	14e7a <__divdi3+0x1d2>
-   14e78:	e13d      	b.n	150f6 <.text+0x150f6>
-   14e7a:	4652      	mov	r2, sl
-   14e7c:	0413      	lsls	r3, r2, #16
-   14e7e:	1c28      	adds	r0, r5, #0
-   14e80:	4318      	orrs	r0, r3
-   14e82:	2300      	movs	r3, #0
-   14e84:	e78d      	b.n	14da2 <__divdi3+0xfa>
-   14e86:	4b58      	ldr	r3, [pc, #352]	(14fe8 <.text+0x14fe8>)
-   14e88:	429d      	cmp	r5, r3
-   14e8a:	d82d      	bhi.n	14ee8 <__divdi3+0x240>
-   14e8c:	2dff      	cmp	r5, #255
-   14e8e:	d900      	bls.n	14e92 <__divdi3+0x1ea>
-   14e90:	e114      	b.n	150bc <.text+0x150bc>
-   14e92:	2000      	movs	r0, #0
-   14e94:	2300      	movs	r3, #0
-   14e96:	4a55      	ldr	r2, [pc, #340]	(14fec <.text+0x14fec>)
-   14e98:	1c0c      	adds	r4, r1, #0
-   14e9a:	40dc      	lsrs	r4, r3
-   14e9c:	5d13      	ldrb	r3, [r2, r4]
-   14e9e:	2220      	movs	r2, #32
-   14ea0:	18c3      	adds	r3, r0, r3
-   14ea2:	1ad3      	subs	r3, r2, r3
-   14ea4:	469a      	mov	sl, r3
-   14ea6:	2b00      	cmp	r3, #0
-   14ea8:	d135      	bne.n	14f16 <__divdi3+0x26e>
-   14eaa:	42b9      	cmp	r1, r7
-   14eac:	d302      	bcc.n	14eb4 <__divdi3+0x20c>
-   14eae:	454e      	cmp	r6, r9
-   14eb0:	d900      	bls.n	14eb4 <__divdi3+0x20c>
-   14eb2:	e774      	b.n	14d9e <__divdi3+0xf6>
-   14eb4:	2001      	movs	r0, #1
-   14eb6:	2300      	movs	r3, #0
-   14eb8:	e773      	b.n	14da2 <__divdi3+0xfa>
-   14eba:	9c02      	ldr	r4, [sp, #8]
-   14ebc:	43e4      	mvns	r4, r4
-   14ebe:	9402      	str	r4, [sp, #8]
-   14ec0:	2500      	movs	r5, #0
-   14ec2:	4254      	negs	r4, r2
-   14ec4:	419d      	sbcs	r5, r3
-   14ec6:	e704      	b.n	14cd2 <__divdi3+0x2a>
-   14ec8:	1c0f      	adds	r7, r1, #0
-   14eca:	1c06      	adds	r6, r0, #0
-   14ecc:	2100      	movs	r1, #0
-   14ece:	4270      	negs	r0, r6
-   14ed0:	41b9      	sbcs	r1, r7
-   14ed2:	2701      	movs	r7, #1
-   14ed4:	427f      	negs	r7, r7
-   14ed6:	9702      	str	r7, [sp, #8]
-   14ed8:	e6f8      	b.n	14ccc <__divdi3+0x24>
-   14eda:	4b45      	ldr	r3, [pc, #276]	(14ff0 <.text+0x14ff0>)
-   14edc:	429e      	cmp	r6, r3
-   14ede:	d900      	bls.n	14ee2 <__divdi3+0x23a>
-   14ee0:	e0ef      	b.n	150c2 <.text+0x150c2>
-   14ee2:	2110      	movs	r1, #16
-   14ee4:	2310      	movs	r3, #16
-   14ee6:	e708      	b.n	14cfa <__divdi3+0x52>
-   14ee8:	4b41      	ldr	r3, [pc, #260]	(14ff0 <.text+0x14ff0>)
-   14eea:	429d      	cmp	r5, r3
-   14eec:	d900      	bls.n	14ef0 <__divdi3+0x248>
-   14eee:	e0df      	b.n	150b0 <.text+0x150b0>
-   14ef0:	2010      	movs	r0, #16
-   14ef2:	2310      	movs	r3, #16
-   14ef4:	e7cf      	b.n	14e96 <__divdi3+0x1ee>
-   14ef6:	4b3e      	ldr	r3, [pc, #248]	(14ff0 <.text+0x14ff0>)
-   14ef8:	429c      	cmp	r4, r3
-   14efa:	d900      	bls.n	14efe <__divdi3+0x256>
-   14efc:	e0e4      	b.n	150c8 <.text+0x150c8>
-   14efe:	2110      	movs	r1, #16
-   14f00:	2310      	movs	r3, #16
-   14f02:	e76c      	b.n	14dde <__divdi3+0x136>
-   14f04:	2001      	movs	r0, #1
-   14f06:	2100      	movs	r1, #0
-   14f08:	f7fe fc58 	bl	137bc <__aeabi_uidiv>
-   14f0c:	4b36      	ldr	r3, [pc, #216]	(14fe8 <.text+0x14fe8>)
-   14f0e:	1c06      	adds	r6, r0, #0
-   14f10:	429e      	cmp	r6, r3
-   14f12:	d8e2      	bhi.n	14eda <__divdi3+0x232>
-   14f14:	e6ec      	b.n	14cf0 <__divdi3+0x48>
-   14f16:	1ad2      	subs	r2, r2, r3
-   14f18:	1c1d      	adds	r5, r3, #0
-   14f1a:	4099      	lsls	r1, r3
-   14f1c:	1c33      	adds	r3, r6, #0
-   14f1e:	40d3      	lsrs	r3, r2
-   14f20:	40ae      	lsls	r6, r5
-   14f22:	4319      	orrs	r1, r3
-   14f24:	9607      	str	r6, [sp, #28]
-   14f26:	1c3b      	adds	r3, r7, #0
-   14f28:	464e      	mov	r6, r9
-   14f2a:	40d6      	lsrs	r6, r2
-   14f2c:	40ab      	lsls	r3, r5
-   14f2e:	4333      	orrs	r3, r6
-   14f30:	1c3c      	adds	r4, r7, #0
-   14f32:	40d4      	lsrs	r4, r2
-   14f34:	9305      	str	r3, [sp, #20]
-   14f36:	0c0f      	lsrs	r7, r1, #16
-   14f38:	4b2b      	ldr	r3, [pc, #172]	(14fe8 <.text+0x14fe8>)
-   14f3a:	1c0e      	adds	r6, r1, #0
-   14f3c:	4688      	mov	r8, r1
-   14f3e:	1c20      	adds	r0, r4, #0
-   14f40:	1c39      	adds	r1, r7, #0
-   14f42:	401e      	ands	r6, r3
-   14f44:	f7fe fc3a 	bl	137bc <__aeabi_uidiv>
-   14f48:	1c39      	adds	r1, r7, #0
-   14f4a:	4683      	mov	fp, r0
-   14f4c:	1c20      	adds	r0, r4, #0
-   14f4e:	f7fe fccd 	bl	138ec <__umodsi3>
-   14f52:	465d      	mov	r5, fp
-   14f54:	4375      	muls	r5, r6
-   14f56:	9905      	ldr	r1, [sp, #20]
-   14f58:	0400      	lsls	r0, r0, #16
-   14f5a:	0c0b      	lsrs	r3, r1, #16
-   14f5c:	4318      	orrs	r0, r3
-   14f5e:	4285      	cmp	r5, r0
-   14f60:	d906      	bls.n	14f70 <__divdi3+0x2c8>
-   14f62:	2201      	movs	r2, #1
-   14f64:	4252      	negs	r2, r2
-   14f66:	4440      	add	r0, r8
-   14f68:	4493      	add	fp, r2
-   14f6a:	4580      	cmp	r8, r0
-   14f6c:	d800      	bhi.n	14f70 <__divdi3+0x2c8>
-   14f6e:	e0ba      	b.n	150e6 <.text+0x150e6>
-   14f70:	1b44      	subs	r4, r0, r5
-   14f72:	1c20      	adds	r0, r4, #0
-   14f74:	1c39      	adds	r1, r7, #0
-   14f76:	f7fe fc21 	bl	137bc <__aeabi_uidiv>
-   14f7a:	1c39      	adds	r1, r7, #0
-   14f7c:	1c05      	adds	r5, r0, #0
-   14f7e:	4346      	muls	r6, r0
-   14f80:	1c20      	adds	r0, r4, #0
-   14f82:	f7fe fcb3 	bl	138ec <__umodsi3>
-   14f86:	4b18      	ldr	r3, [pc, #96]	(14fe8 <.text+0x14fe8>)
-   14f88:	9c05      	ldr	r4, [sp, #20]
-   14f8a:	0400      	lsls	r0, r0, #16
-   14f8c:	4023      	ands	r3, r4
-   14f8e:	4318      	orrs	r0, r3
-   14f90:	4286      	cmp	r6, r0
-   14f92:	d904      	bls.n	14f9e <__divdi3+0x2f6>
-   14f94:	4440      	add	r0, r8
-   14f96:	3d01      	subs	r5, #1
-   14f98:	4580      	cmp	r8, r0
-   14f9a:	d800      	bhi.n	14f9e <__divdi3+0x2f6>
-   14f9c:	e09d      	b.n	150da <.text+0x150da>
-   14f9e:	1b80      	subs	r0, r0, r6
-   14fa0:	465e      	mov	r6, fp
-   14fa2:	0433      	lsls	r3, r6, #16
-   14fa4:	431d      	orrs	r5, r3
-   14fa6:	4e10      	ldr	r6, [pc, #64]	(14fe8 <.text+0x14fe8>)
-   14fa8:	9f07      	ldr	r7, [sp, #28]
-   14faa:	9b07      	ldr	r3, [sp, #28]
-   14fac:	1c2a      	adds	r2, r5, #0
-   14fae:	4033      	ands	r3, r6
-   14fb0:	0c39      	lsrs	r1, r7, #16
-   14fb2:	4032      	ands	r2, r6
-   14fb4:	0c2c      	lsrs	r4, r5, #16
-   14fb6:	1c1f      	adds	r7, r3, #0
-   14fb8:	4357      	muls	r7, r2
-   14fba:	4684      	mov	ip, r0
-   14fbc:	434a      	muls	r2, r1
-   14fbe:	1c18      	adds	r0, r3, #0
-   14fc0:	4360      	muls	r0, r4
-   14fc2:	0c3b      	lsrs	r3, r7, #16
-   14fc4:	1812      	adds	r2, r2, r0
-   14fc6:	189a      	adds	r2, r3, r2
-   14fc8:	4361      	muls	r1, r4
-   14fca:	4290      	cmp	r0, r2
-   14fcc:	d902      	bls.n	14fd4 <__divdi3+0x32c>
-   14fce:	2080      	movs	r0, #128
-   14fd0:	0240      	lsls	r0, r0, #9
-   14fd2:	1809      	adds	r1, r1, r0
-   14fd4:	0c13      	lsrs	r3, r2, #16
-   14fd6:	18c8      	adds	r0, r1, r3
-   14fd8:	4584      	cmp	ip, r0
-   14fda:	d363      	bcc.n	150a4 <.text+0x150a4>
-   14fdc:	4584      	cmp	ip, r0
-   14fde:	d058      	beq.n	15092 <.text+0x15092>
-   14fe0:	1c28      	adds	r0, r5, #0
-   14fe2:	2300      	movs	r3, #0
-   14fe4:	e6dd      	b.n	14da2 <__divdi3+0xfa>
-   14fe6:	0000      	lsls	r0, r0, #0
-   14fe8:	ffff 0000 	vaddl.u<illegal width 64>	q8, d15, d0
-   14fec:	589c      	ldr	r4, [r3, r2]
-   14fee:	0001      	lsls	r1, r0, #0
-   14ff0:	ffff 00ff 	vshr.u64	q8, <illegal reg q15.5>, #1
-   14ff4:	1c19      	adds	r1, r3, #0
-   14ff6:	409e      	lsls	r6, r3
-   14ff8:	1c3c      	adds	r4, r7, #0
-   14ffa:	1ad3      	subs	r3, r2, r3
-   14ffc:	464d      	mov	r5, r9
-   14ffe:	40dc      	lsrs	r4, r3
-   15000:	40dd      	lsrs	r5, r3
-   15002:	1c3a      	adds	r2, r7, #0
-   15004:	4b40      	ldr	r3, [pc, #256]	(15108 <.text+0x15108>)
-   15006:	408a      	lsls	r2, r1
-   15008:	0c37      	lsrs	r7, r6, #16
-   1500a:	432a      	orrs	r2, r5
-   1500c:	4033      	ands	r3, r6
-   1500e:	1c39      	adds	r1, r7, #0
-   15010:	1c20      	adds	r0, r4, #0
-   15012:	469b      	mov	fp, r3
-   15014:	9206      	str	r2, [sp, #24]
-   15016:	f7fe fbd1 	bl	137bc <__aeabi_uidiv>
-   1501a:	1c39      	adds	r1, r7, #0
-   1501c:	9003      	str	r0, [sp, #12]
-   1501e:	465d      	mov	r5, fp
-   15020:	4345      	muls	r5, r0
-   15022:	1c20      	adds	r0, r4, #0
-   15024:	f7fe fc62 	bl	138ec <__umodsi3>
-   15028:	9906      	ldr	r1, [sp, #24]
-   1502a:	0400      	lsls	r0, r0, #16
-   1502c:	0c0b      	lsrs	r3, r1, #16
-   1502e:	4318      	orrs	r0, r3
-   15030:	4285      	cmp	r5, r0
-   15032:	d905      	bls.n	15040 <.text+0x15040>
-   15034:	9a03      	ldr	r2, [sp, #12]
-   15036:	1980      	adds	r0, r0, r6
-   15038:	3a01      	subs	r2, #1
-   1503a:	9203      	str	r2, [sp, #12]
-   1503c:	4286      	cmp	r6, r0
-   1503e:	d946      	bls.n	150ce <.text+0x150ce>
-   15040:	1b44      	subs	r4, r0, r5
-   15042:	1c20      	adds	r0, r4, #0
-   15044:	1c39      	adds	r1, r7, #0
-   15046:	f7fe fbb9 	bl	137bc <__aeabi_uidiv>
-   1504a:	465b      	mov	r3, fp
-   1504c:	4680      	mov	r8, r0
-   1504e:	1c39      	adds	r1, r7, #0
-   15050:	1c20      	adds	r0, r4, #0
-   15052:	4645      	mov	r5, r8
-   15054:	435d      	muls	r5, r3
-   15056:	f7fe fc49 	bl	138ec <__umodsi3>
-   1505a:	4b2b      	ldr	r3, [pc, #172]	(15108 <.text+0x15108>)
-   1505c:	9c06      	ldr	r4, [sp, #24]
-   1505e:	0400      	lsls	r0, r0, #16
-   15060:	4023      	ands	r3, r4
-   15062:	4318      	orrs	r0, r3
-   15064:	4285      	cmp	r5, r0
-   15066:	d909      	bls.n	1507c <.text+0x1507c>
-   15068:	2101      	movs	r1, #1
-   1506a:	4249      	negs	r1, r1
-   1506c:	1980      	adds	r0, r0, r6
-   1506e:	4488      	add	r8, r1
-   15070:	4286      	cmp	r6, r0
-   15072:	d803      	bhi.n	1507c <.text+0x1507c>
-   15074:	4285      	cmp	r5, r0
-   15076:	d901      	bls.n	1507c <.text+0x1507c>
-   15078:	4488      	add	r8, r1
-   1507a:	1980      	adds	r0, r0, r6
-   1507c:	9c03      	ldr	r4, [sp, #12]
-   1507e:	464a      	mov	r2, r9
-   15080:	4653      	mov	r3, sl
-   15082:	409a      	lsls	r2, r3
-   15084:	1b45      	subs	r5, r0, r5
-   15086:	0423      	lsls	r3, r4, #16
-   15088:	4640      	mov	r0, r8
-   1508a:	4318      	orrs	r0, r3
-   1508c:	4691      	mov	r9, r2
-   1508e:	9004      	str	r0, [sp, #16]
-   15090:	e645      	b.n	14d1e <__divdi3+0x76>
-   15092:	4651      	mov	r1, sl
-   15094:	464b      	mov	r3, r9
-   15096:	408b      	lsls	r3, r1
-   15098:	1c39      	adds	r1, r7, #0
-   1509a:	0412      	lsls	r2, r2, #16
-   1509c:	4031      	ands	r1, r6
-   1509e:	1852      	adds	r2, r2, r1
-   150a0:	4293      	cmp	r3, r2
-   150a2:	d29d      	bcs.n	14fe0 <__divdi3+0x338>
-   150a4:	1e68      	subs	r0, r5, #1
-   150a6:	2300      	movs	r3, #0
-   150a8:	e67b      	b.n	14da2 <__divdi3+0xfa>
-   150aa:	2108      	movs	r1, #8
-   150ac:	2308      	movs	r3, #8
-   150ae:	e696      	b.n	14dde <__divdi3+0x136>
-   150b0:	2018      	movs	r0, #24
-   150b2:	2318      	movs	r3, #24
-   150b4:	e6ef      	b.n	14e96 <__divdi3+0x1ee>
-   150b6:	2108      	movs	r1, #8
-   150b8:	2308      	movs	r3, #8
-   150ba:	e61e      	b.n	14cfa <__divdi3+0x52>
-   150bc:	2008      	movs	r0, #8
-   150be:	2308      	movs	r3, #8
-   150c0:	e6e9      	b.n	14e96 <__divdi3+0x1ee>
-   150c2:	2118      	movs	r1, #24
-   150c4:	2318      	movs	r3, #24
-   150c6:	e618      	b.n	14cfa <__divdi3+0x52>
-   150c8:	2118      	movs	r1, #24
-   150ca:	2318      	movs	r3, #24
-   150cc:	e687      	b.n	14dde <__divdi3+0x136>
-   150ce:	4285      	cmp	r5, r0
-   150d0:	d9b6      	bls.n	15040 <.text+0x15040>
-   150d2:	3a01      	subs	r2, #1
-   150d4:	1980      	adds	r0, r0, r6
-   150d6:	9203      	str	r2, [sp, #12]
-   150d8:	e7b2      	b.n	15040 <.text+0x15040>
-   150da:	4286      	cmp	r6, r0
-   150dc:	d800      	bhi.n	150e0 <.text+0x150e0>
-   150de:	e75e      	b.n	14f9e <__divdi3+0x2f6>
-   150e0:	3d01      	subs	r5, #1
-   150e2:	4440      	add	r0, r8
-   150e4:	e75b      	b.n	14f9e <__divdi3+0x2f6>
-   150e6:	4285      	cmp	r5, r0
-   150e8:	d800      	bhi.n	150ec <.text+0x150ec>
-   150ea:	e741      	b.n	14f70 <__divdi3+0x2c8>
-   150ec:	4493      	add	fp, r2
-   150ee:	4440      	add	r0, r8
-   150f0:	e73e      	b.n	14f70 <__divdi3+0x2c8>
-   150f2:	3d01      	subs	r5, #1
-   150f4:	e649      	b.n	14d8a <__divdi3+0xe2>
-   150f6:	3d01      	subs	r5, #1
-   150f8:	e6bf      	b.n	14e7a <__divdi3+0x1d2>
-   150fa:	44ba      	add	sl, r7
-   150fc:	1980      	adds	r0, r0, r6
-   150fe:	e6a2      	b.n	14e46 <__divdi3+0x19e>
-   15100:	4498      	add	r8, r3
-   15102:	1980      	adds	r0, r0, r6
-   15104:	e626      	b.n	14d54 <__divdi3+0xac>
-   15106:	0000      	lsls	r0, r0, #0
-   15108:	ffff 0000 	vaddl.u<illegal width 64>	q8, d15, d0
-
-0001510c <__cos_from_arm>:
-   1510c:	e59fc000 	ldr	ip, [pc, #0]	; 15114 <__cos_from_arm+0x8>
-   15110:	e12fff1c 	bx	ip
-   15114:	00011299 	muleq	r1, r9, r2
-
-00015118 <____umodsi3_from_arm>:
-   15118:	e59fc000 	ldr	ip, [pc, #0]	; 15120 <____umodsi3_from_arm+0x8>
-   1511c:	e12fff1c 	bx	ip
-   15120:	000138ed 	andeq	r3, r1, sp, ror #17
-
-00015124 <____divdi3_from_arm>:
-   15124:	e59fc000 	ldr	ip, [pc, #0]	; 1512c <____divdi3_from_arm+0x8>
-   15128:	e12fff1c 	bx	ip
-   1512c:	00014ca9 	andeq	r4, r1, r9, lsr #25
-
-00015130 <__pow_from_arm>:
-   15130:	e59fc000 	ldr	ip, [pc, #0]	; 15138 <__pow_from_arm+0x8>
-   15134:	e12fff1c 	bx	ip
-   15138:	000113ed 	andeq	r1, r1, sp, ror #7
-
-0001513c <__sin_from_arm>:
-   1513c:	e59fc000 	ldr	ip, [pc, #0]	; 15144 <__sin_from_arm+0x8>
-   15140:	e12fff1c 	bx	ip
-   15144:	00011341 	andeq	r1, r1, r1, asr #6
-
-00015148 <__puts_from_arm>:
-   15148:	e59fc000 	ldr	ip, [pc, #0]	; 15150 <__puts_from_arm+0x8>
-   1514c:	e12fff1c 	bx	ip
-   15150:	0000d0fd 	streqd	sp, [r0], -sp
-
-00015154 <__printf_from_arm>:
-   15154:	e59fc000 	ldr	ip, [pc, #0]	; 1515c <__printf_from_arm+0x8>
-   15158:	e12fff1c 	bx	ip
-   1515c:	0000d075 	andeq	sp, r0, r5, ror r0
-
-00015160 <__sqrt_from_arm>:
-   15160:	e59fc000 	ldr	ip, [pc, #0]	; 15168 <__sqrt_from_arm+0x8>
-   15164:	e12fff1c 	bx	ip
-   15168:	00011729 	andeq	r1, r1, r9, lsr #14
-
-0001516c <____udivsi3_from_arm>:
-   1516c:	e59fc000 	ldr	ip, [pc, #0]	; 15174 <____udivsi3_from_arm+0x8>
-   15170:	e12fff1c 	bx	ip
-   15174:	000137bd 	streqh	r3, [r1], -sp
-
-00015178 <__memcpy_from_arm>:
-   15178:	e59fc000 	ldr	ip, [pc, #0]	; 15180 <__memcpy_from_arm+0x8>
-   1517c:	e12fff1c 	bx	ip
-   15180:	0000d055 	andeq	sp, r0, r5, asr r0
-
-00015184 <____ltdf2_from_thumb>:
-   15184:	4778      	bx	pc
-   15186:	46c0      	nop			(mov r8, r8)
-
-00015188 <____ltdf2_change_to_arm>:
-   15188:	eafffc75 	b	14364 <__ledf2>
-
-0001518c <____nedf2_from_thumb>:
-   1518c:	4778      	bx	pc
-   1518e:	46c0      	nop			(mov r8, r8)
-
-00015190 <____nedf2_change_to_arm>:
-   15190:	eafffc75 	b	1436c <__cmpdf2>
-
-00015194 <____eqdf2_from_thumb>:
-   15194:	4778      	bx	pc
-   15196:	46c0      	nop			(mov r8, r8)
-
-00015198 <____eqdf2_change_to_arm>:
-   15198:	eafffc73 	b	1436c <__cmpdf2>
-
-0001519c <____floatsidf_from_thumb>:
-   1519c:	4778      	bx	pc
-   1519e:	46c0      	nop			(mov r8, r8)
-
-000151a0 <____floatsidf_change_to_arm>:
-   151a0:	eafffb0b 	b	13dd4 <__aeabi_i2d>
-
-000151a4 <____adddf3_from_thumb>:
-   151a4:	4778      	bx	pc
-   151a6:	46c0      	nop			(mov r8, r8)
-
-000151a8 <____adddf3_change_to_arm>:
-   151a8:	eafffa3b 	b	13a9c <__adddf3>
-
-000151ac <____subdf3_from_thumb>:
-   151ac:	4778      	bx	pc
-   151ae:	46c0      	nop			(mov r8, r8)
-
-000151b0 <____subdf3_change_to_arm>:
-   151b0:	eafffa38 	b	13a98 <__aeabi_dsub>
-
-000151b4 <____muldf3_from_thumb>:
-   151b4:	4778      	bx	pc
-   151b6:	46c0      	nop			(mov r8, r8)
-
-000151b8 <____muldf3_change_to_arm>:
-   151b8:	eafffb40 	b	13ec0 <__aeabi_dmul>
-
-000151bc <____fixdfsi_from_thumb>:
-   151bc:	4778      	bx	pc
-   151be:	46c0      	nop			(mov r8, r8)
-
-000151c0 <____fixdfsi_change_to_arm>:
-   151c0:	eafffcb5 	b	1449c <__aeabi_d2iz>
-
-000151c4 <____divdf3_from_thumb>:
-   151c4:	4778      	bx	pc
-   151c6:	46c0      	nop			(mov r8, r8)
-
-000151c8 <____divdf3_change_to_arm>:
-   151c8:	eafffbe0 	b	14150 <__aeabi_ddiv>
-
-000151cc <____gtdf2_from_thumb>:
-   151cc:	4778      	bx	pc
-   151ce:	46c0      	nop			(mov r8, r8)
-
-000151d0 <____gtdf2_change_to_arm>:
-   151d0:	eafffc61 	b	1435c <__gedf2>
-
-000151d4 <____gedf2_from_thumb>:
-   151d4:	4778      	bx	pc
-   151d6:	46c0      	nop			(mov r8, r8)
-
-000151d8 <____gedf2_change_to_arm>:
-   151d8:	eafffc5f 	b	1435c <__gedf2>
-
-000151dc <___sbrk_r_from_thumb>:
-   151dc:	4778      	bx	pc
-   151de:	46c0      	nop			(mov r8, r8)
-
-000151e0 <___sbrk_r_change_to_arm>:
-   151e0:	eaffdabe 	b	bce0 <_sbrk_r>
-
-000151e4 <___fstat_r_from_thumb>:
-   151e4:	4778      	bx	pc
-   151e6:	46c0      	nop			(mov r8, r8)
-
-000151e8 <___fstat_r_change_to_arm>:
-   151e8:	eaffdaa3 	b	bc7c <_fstat_r>
-
-000151ec <__isatty_from_thumb>:
-   151ec:	4778      	bx	pc
-   151ee:	46c0      	nop			(mov r8, r8)
-
-000151f0 <__isatty_change_to_arm>:
-   151f0:	eaffdab0 	b	bcb8 <isatty>
-
-000151f4 <___close_r_from_thumb>:
-   151f4:	4778      	bx	pc
-   151f6:	46c0      	nop			(mov r8, r8)
-
-000151f8 <___close_r_change_to_arm>:
-   151f8:	eaffda87 	b	bc1c <_close_r>
-
-000151fc <___lseek_r_from_thumb>:
-   151fc:	4778      	bx	pc
-   151fe:	46c0      	nop			(mov r8, r8)
-
-00015200 <___lseek_r_change_to_arm>:
-   15200:	eaffda90 	b	bc48 <_lseek_r>
-
-00015204 <___write_r_from_thumb>:
-   15204:	4778      	bx	pc
-   15206:	46c0      	nop			(mov r8, r8)
-
-00015208 <___write_r_change_to_arm>:
-   15208:	eaffda5c 	b	bb80 <_write_r>
-
-0001520c <___read_r_from_thumb>:
-   1520c:	4778      	bx	pc
-   1520e:	46c0      	nop			(mov r8, r8)
-
-00015210 <___read_r_change_to_arm>:
-   15210:	eaffda22 	b	baa0 <_read_r>
-
-00015214 <____ledf2_from_thumb>:
-   15214:	4778      	bx	pc
-   15216:	46c0      	nop			(mov r8, r8)
-
-00015218 <____ledf2_change_to_arm>:
-   15218:	eafffc51 	b	14364 <__ledf2>
-   1521c:	72500a0a 	subvcs	r0, r0, #40960	; 0xa000
-   15220:	6172676f 	cmnvs	r2, pc, ror #14
-   15224:	69206d6d 	stmvsdb	r0!, {r0, r2, r3, r5, r6, r8, sl, fp, sp, lr}
-   15228:	75722073 	ldrvcb	r2, [r2, #-115]!
-   1522c:	6e696e6e 	cdpvs	14, 6, cr6, cr9, cr14, {3}
-   15230:	2e2e2067 	cdpcs	0, 2, cr2, cr14, cr7, {3}
-   15234:	0000202e 	andeq	r2, r0, lr, lsr #32
-   15238:	636f7250 	cmnvs	pc, #5	; 0x5
-   1523c:	6f737365 	svcvs	0x00737365
-   15240:	6c432072 	mcrrvs	0, 7, r2, r3, cr2
-   15244:	206b636f 	rsbcs	r6, fp, pc, ror #6
-   15248:	71657246 	cmnvc	r5, r6, asr #4
-   1524c:	636e6575 	cmnvs	lr, #490733568	; 0x1d400000
-   15250:	25203a79 	strcs	r3, [r0, #-2681]!
-   15254:	7a482064 	bvc	121d3ec <__ctors_end__+0x120799c>
-   15258:	0000000a 	andeq	r0, r0, sl
-   1525c:	69726550 	ldmvsdb	r2!, {r4, r6, r8, sl, sp, lr}^
-   15260:	72656870 	rsbvc	r6, r5, #7340032	; 0x700000
-   15264:	43206c61 	teqmi	r0, #24832	; 0x6100
-   15268:	6b636f6c 	blvs	18f1020 <__ctors_end__+0x18db5d0>
-   1526c:	65724620 	ldrvsb	r4, [r2, #-1568]!
-   15270:	6e657571 	mcrvs	5, 3, r7, cr5, cr1, {3}
-   15274:	203a7963 	eorcss	r7, sl, r3, ror #18
-   15278:	48206425 	stmmida	r0!, {r0, r2, r5, sl, sp, lr}
-   1527c:	00000a7a 	andeq	r0, r0, sl, ror sl
-
-00015280 <GPS_CFG_PRT>:
-   15280:	00140006 00000001 000808d0 0000e100     ................
-   15290:	00010007 00000000 13062de4                       .........-
-
-0001529a <GPS_CFG_ANT>:
-   1529a:	00041306 380f000b 01064f6f                       .......8oO
-
-000152a4 <GPS_CFG_MSG>:
-   152a4:	00060106 00000101 800f0000 00060106     ................
-   152b4:	01000201 88110000 00060106 01000301     ................
-   152c4:	8d120000 00060106 00000401 8f120000     ................
-   152d4:	00060106 01000601 9c150000 00060106     ................
-   152e4:	00001101 d01f0000 00060106 01001201     ................
-   152f4:	d8210000 00060106 00002001 1b2e0000     ..!...... ......
-   15304:	00060106 00002101 202f0000 00060106     .....!..../ ....
-   15314:	00002201 25300000 00060106 00003001     ."....0%.....0..
-   15324:	6b3e0000                                ..>k
-
-00015328 <GPS_CFG_SBAS>:
-   15328:	00081606 00010000 00000000 1a069025              ............%.
-
-00015336 <GPS_CFG_NAV2>:
-   15336:	00281a06 00000005 020a0304 0000c350     ..(.........P...
-   15346:	3c0a0a0f 00000100 00fa00fa 012c0064     ...<........d.,.
-	...
-   15362:	08066458                                         Xd
-
-00015364 <GPS_CFG_RATE>:
-   15364:	00060806 000100c8 68dd0000              ...........h
-
-00015370 <GPS_CFG_CFG>:
-   15370:	000d0906 00000000 0000ffff 00000000     ................
-   15380:	b5af2107                                         .!.
-
-00015383 <gps_startstring.2574>:
-   15383:	000062b5 00d30800 00dace00 00dace00     .b..............
-   15393:	00d31800 00dace00 00dace00 00dace00     ................
-   153a3:	00dace00 00dace00 00dace00 00d31c00     ................
-   153b3:	00d33600 00dace00 00d32c00 00d34000     .6.......,...@..
-   153c3:	00dace00 00d39000 00d39a00 00d39a00     ................
-   153d3:	00d39a00 00d39a00 00d39a00 00d39a00     ................
-   153e3:	00d39a00 00d39a00 00d39a00 00dace00     ................
-   153f3:	00dace00 00dace00 00dace00 00dace00     ................
-   15403:	00dace00 00dace00 00dace00 00dace00     ................
-   15413:	00d3ec00 00d43c00 00d47a00 00d47a00     .....<...z...z..
-   15423:	00d47a00 00dace00 00dace00 00dace00     .z..............
-   15433:	00dace00 00d3c000 00dace00 00dace00     ................
-   15443:	00d7da00 00dace00 00dace00 00dace00     ................
-   15453:	00d85400 00dace00 00d98800 00dace00     .T..............
-   15463:	00dace00 00d9b800 00dace00 00dace00     ................
-   15473:	00dace00 00dace00 00dace00 00dace00     ................
-   15483:	00dace00 00dace00 00dace00 00dace00     ................
-   15493:	00d3ec00 00d44400 00d47a00 00d47a00     .....D...z...z..
-   154a3:	00d47a00 00d3c400 00d44400 00dace00     .z.......D......
-   154b3:	00dace00 00d3c800 00dace00 00d7aa00     ................
-   154c3:	00d7e200 00d83c00 00d3e200 00dace00     .....<..........
-   154d3:	00d85400 00dace00 00d99000 00dace00     .T..............
-   154e3:	00dace00 00d30200 30303000                       .........
-
-000154ec <zeroes.3063>:
-   154ec:	30303030 30303030 30303030 30303030     0000000000000000
-
-000154fc <blanks.3062>:
-   154fc:	20202020 20202020 20202020 20202020                     
-   1550c:	0000ed6a 0000ed6a 0000ed7e 0000ed9c     j...j...~.......
-   1551c:	0000ed5e 0000ed58                       ^...X...
-
-00015524 <_global_impure_ptr>:
-   15524:	40000024                                $..@
-
-00015528 <lconv>:
-   15528:	000159f8 000159d4 000159d4 000159d4     .Y...Y...Y...Y..
-   15538:	000159d4 000159d4 000159d4 000159d4     .Y...Y...Y...Y..
-   15548:	000159d4 000159d4 ffffffff ffffffff     .Y...Y..........
-
-00015558 <charset>:
-   15558:	00015a38                                8Z..
-
-0001555c <__mprec_tens>:
-   1555c:	3ff00000 00000000 40240000 00000000     ...?......$@....
-   1556c:	40590000 00000000 408f4000 00000000     ..Y@.....@.@....
-   1557c:	40c38800 00000000 40f86a00 00000000     ...@.....j.@....
-   1558c:	412e8480 00000000 416312d0 00000000     ...A......cA....
-   1559c:	4197d784 00000000 41cdcd65 00000000     ...A....e..A....
-   155ac:	4202a05f 20000000 42374876 e8000000     _..B... vH7B....
-   155bc:	426d1a94 a2000000 42a2309c e5400000     ..mB.....0.B..@.
-   155cc:	42d6bcc4 1e900000 430c6bf5 26340000     ...B.....k.C..4&
-   155dc:	4341c379 37e08000 43763457 85d8a000     y.AC...7W4vC....
-   155ec:	43abc16d 674ec800 43e158e4 60913d00     m..C..Ng.X.C.=.`
-   155fc:	4415af1d 78b58c40 444b1ae4 d6e2ef50     ...D@..x..KDP...
-   1560c:	4480f0cf 064dd592 44b52d02 c7e14af6     ...D..M..-.D.J..
-   1561c:	44ea7843 79d99db4                       Cx.D...y
-
-00015624 <__mprec_bigtens>:
-   15624:	4341c379 37e08000 4693b8b5 b5056e17     y.AC...7...F.n..
-   15634:	4d384f03 e93ff9f5 5a827748 f9301d32     .O8M..?.Hw.Z2.0.
-   15644:	75154fdd 7f73bf3c                       .O.u<.s.
-
-0001564c <__mprec_tinytens>:
-   1564c:	3c9cd2b2 97d889bc 3949f623 d5a8a733     ...<....#.I93...
-   1565c:	32a50ffd 44f4a73d 255bba08 cf8c979d     ...2=..D..[%....
-   1566c:	0ac80628 64ac6f43                       (...Co.d
-
-00015674 <p05.2298>:
-   15674:	00000005 00000019 0000007d              ........}...
-
-00015680 <bp>:
-   15680:	3ff00000 00000000 3ff80000 00000000     ...?.......?....
-
-00015690 <dp_l>:
-	...
-   15698:	3e4cfdeb 43cfd006                       ..L>...C
-
-000156a0 <dp_h>:
-	...
-   156a8:	3fe2b803 40000000                       ...?...@
-
-000156b0 <npio2_hw>:
-   156b0:	3ff921fb 400921fb 4012d97c 401921fb     .!.?.!.@|..@.!.@
-   156c0:	401f6a7a 4022d97c 4025fdbb 402921fb     zj.@|."@..%@.!)@
-   156d0:	402c463a 402f6a7a 4031475c 4032d97c     :F,@zj/@\G1@|.2@
-   156e0:	40346b9c 4035fdbb 40378fdb 403921fb     .k4@..5@..7@.!9@
-   156f0:	403ab41b 403c463a 403dd85a 403f6a7a     ..:@:F<@Z.=@zj?@
-   15700:	40407e4c 4041475c 4042106c 4042d97c     L~@@\GA@l.B@|.B@
-   15710:	4043a28c 40446b9c 404534ac 4045fdbb     ..C@.kD@.4E@..E@
-   15720:	4046c6cb 40478fdb 404858eb 404921fb     ..F@..G@.XH@.!I@
-
-00015730 <two_over_pi>:
-   15730:	00a2f983 006e4e44 001529fc 002757d1     ....DNn..)...W'.
-   15740:	00f534dd 00c0db62 0095993c 00439041     .4..b...<...A.C.
-   15750:	00fe5163 00abdebb 00c561b7 00246e3a     cQ.......a..:n$.
-   15760:	00424dd2 00e00649 002eea09 00d1921c     .MB.I...........
-   15770:	00fe1deb 001cb129 00a73ee8 008235f5     ....)....>...5..
-   15780:	002ebb44 0084e99c 007026b4 005f7e41     D........&p.A~_.
-   15790:	003991d6 00398353 0039f49c 00845f8b     ..9.S.9...9.._..
-   157a0:	00bdf928 003b1ff8 0097ffde 0005980f     (.....;.........
-   157b0:	00ef2f11 008b5a0a 006d1f6d 00367ecf     ./...Z..m.m..~6.
-   157c0:	0027cb09 00b74f46 003f669e 005fea2d     ..'.FO...f?.-._.
-   157d0:	007527ba 00c7ebe5 00f17b3d 000739f7     .'u.....={...9..
-   157e0:	008a5292 00ea6bfb 005fb11f 008d5d08     .R...k...._..]..
-   157f0:	00560330 0046fc7b 006babf0 00cfbc20     0.V.{.F...k. ...
-   15800:	009af436 001da9e3 0091615e 00e61b08     6.......^a......
-   15810:	00659985 005f14a0 0068408d 00ffd880     ..e..._..@h.....
-   15820:	004d7327 00310606 001556ca 0073a8c9     'sM...1..V....s.
-   15830:	0060e27b 00c08c6b                       {.`.k...
-
-00015838 <init_jk>:
-   15838:	00000002 00000003 00000004 00000006     ................
-
-00015848 <PIo2>:
-   15848:	3ff921fb 40000000 3e74442d 00000000     .!.?...@-Dt>....
-   15858:	3cf84698 80000000 3b78cc51 60000000     .F.<....Q.x;...`
-   15868:	39f01b83 80000000 387a2520 40000000     ...9.... %z8...@
-   15878:	36e38222 80000000 3569f31d 00000000     "..6......i5....
-
-00015888 <__fdlib_version>:
-   15888:	00000001                                ....
-
-0001588c <TWO52>:
-   1588c:	43300000 00000000 c3300000 00000000     ..0C......0.....
-
-0001589c <__clz_tab>:
-   1589c:	02020100 03030303 04040404 04040404     ................
-   158ac:	05050505 05050505 05050505 05050505     ................
-   158bc:	06060606 06060606 06060606 06060606     ................
-   158cc:	06060606 06060606 06060606 06060606     ................
-   158dc:	07070707 07070707 07070707 07070707     ................
-   158ec:	07070707 07070707 07070707 07070707     ................
-   158fc:	07070707 07070707 07070707 07070707     ................
-   1590c:	07070707 07070707 07070707 07070707     ................
-   1591c:	08080808 08080808 08080808 08080808     ................
-   1592c:	08080808 08080808 08080808 08080808     ................
-   1593c:	08080808 08080808 08080808 08080808     ................
-   1594c:	08080808 08080808 08080808 08080808     ................
-   1595c:	08080808 08080808 08080808 08080808     ................
-   1596c:	08080808 08080808 08080808 08080808     ................
-   1597c:	08080808 08080808 08080808 08080808     ................
-   1598c:	08080808 08080808 08080808 08080808     ................
-   1599c:	0000000a 33323130 37363534 62613938     ....0123456789ab
-   159ac:	66656463 00000000 00666e69 00464e49     cdef....inf.INF.
-   159bc:	004e414e 006e616e 33323130 37363534     NAN.nan.01234567
-   159cc:	42413938 46454443 00000000 20677562     89ABCDEF....bug 
-   159dc:	76206e69 69727066 3a66746e 64616220     in vfprintf: bad
-   159ec:	73616220 00000065 00000030 0000002e      base...0.......
-   159fc:	6c756e28 0000296c 54552d43 00382d46     (null)..C-UTF-8.
-   15a0c:	4a532d43 00005349 55452d43 00504a43     C-SJIS..C-EUCJP.
-   15a1c:	494a2d43 00000053 69666e49 7974696e     C-JIS...Infinity
-   15a2c:	00000000 004e614e 00000043 2d4f5349     ....NaN.C...ISO-
-   15a3c:	39353838 0000312d 00776f70 74727173     8859-1..pow.sqrt
-   15a4c:	00000000                                ....
diff --git a/ccny_asctec_firmware_2/main.map b/ccny_asctec_firmware_2/main.map
deleted file mode 100644
index 48dbabb..0000000
--- a/ccny_asctec_firmware_2/main.map
+++ /dev/null
@@ -1,2844 +0,0 @@
-Archive member included because of file (symbol)
-
-c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(memcpy.o)
-                              src/uart.o (memcpy)
-c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(printf.o)
-                              src/main.o (printf)
-c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(puts.o)
-                              src/main.o (puts)
-c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(strlen.o)
-                              c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(puts.o) (strlen)
-c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(vfprintf.o)
-                              c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(printf.o) (_vfprintf_r)
-c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(wcrtomb.o)
-                              c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(vfprintf.o) (_wcrtomb_r)
-c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(wcsrtombs.o)
-                              c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(vfprintf.o) (_wcsrtombs_r)
-c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(wctomb_r.o)
-                              c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(wcrtomb.o) (_wctomb_r)
-c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(wsetup.o)
-                              c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(vfprintf.o) (__swsetup)
-c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(dtoa.o)
-                              c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(vfprintf.o) (_dtoa_r)
-c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(fflush.o)
-                              c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(vfprintf.o) (fflush)
-c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(findfp.o)
-                              c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(vfprintf.o) (__sinit)
-c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(freer.o)
-                              c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(vfprintf.o) (_free_r)
-c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(fvwrite.o)
-                              c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(puts.o) (__sfvwrite)
-c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(fwalk.o)
-                              c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(fflush.o) (_fwalk)
-c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(impure.o)
-                              c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(printf.o) (_impure_ptr)
-c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(locale.o)
-                              c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(vfprintf.o) (localeconv)
-c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(makebuf.o)
-                              c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(wsetup.o) (__smakebuf)
-c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(mallocr.o)
-                              c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(vfprintf.o) (_malloc_r)
-c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(memchr.o)
-                              c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(vfprintf.o) (memchr)
-c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(memmove.o)
-                              c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(fvwrite.o) (memmove)
-c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(memset.o)
-                              c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(vfprintf.o) (memset)
-c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(mlock.o)
-                              c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(freer.o) (__malloc_lock)
-c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(mprec.o)
-                              c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(dtoa.o) (_Bfree)
-c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(reallocr.o)
-                              c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(fvwrite.o) (_realloc_r)
-c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(s_isinf.o)
-                              c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(vfprintf.o) (isinf)
-c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(s_isnan.o)
-                              c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(vfprintf.o) (isnan)
-c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(stdio.o)
-                              c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(findfp.o) (__sclose)
-c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(strcmp.o)
-                              c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(wctomb_r.o) (strcmp)
-c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(callocr.o)
-                              c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(mprec.o) (_calloc_r)
-c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(fclose.o)
-                              c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(findfp.o) (fclose)
-c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(s_cos.o)
-                              src/gpsmath.o (cos)
-c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(s_sin.o)
-                              src/pid.o (sin)
-c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(w_pow.o)
-                              src/pid.o (pow)
-c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(w_sqrt.o)
-                              src/main.o (sqrt)
-c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(e_pow.o)
-                              c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(w_pow.o) (__ieee754_pow)
-c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(e_rem_pio2.o)
-                              c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(s_cos.o) (__ieee754_rem_pio2)
-c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(e_sqrt.o)
-                              c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(w_sqrt.o) (__ieee754_sqrt)
-c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(k_cos.o)
-                              c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(s_cos.o) (__kernel_cos)
-c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(k_rem_pio2.o)
-                              c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(e_rem_pio2.o) (__kernel_rem_pio2)
-c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(k_sin.o)
-                              c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(s_cos.o) (__kernel_sin)
-c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(s_fabs.o)
-                              c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(e_pow.o) (fabs)
-c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(s_finite.o)
-                              c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(w_pow.o) (finite)
-c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(s_floor.o)
-                              c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(k_rem_pio2.o) (floor)
-c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(s_lib_ver.o)
-                              c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(w_pow.o) (__fdlib_version)
-c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(s_matherr.o)
-                              c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(w_pow.o) (matherr)
-c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(s_rint.o)
-                              c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(w_pow.o) (rint)
-c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(s_scalbn.o)
-                              c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(e_pow.o) (scalbn)
-c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(s_copysign.o)
-                              c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(s_scalbn.o) (copysign)
-c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(errno.o)
-                              c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(w_pow.o) (__errno)
-c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_udivsi3.o)
-                              src/system.o (__udivsi3)
-c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_divsi3.o)
-                              c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(vfprintf.o) (__divsi3)
-c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_umodsi3.o)
-                              src/sdk.o (__umodsi3)
-c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_modsi3.o)
-                              c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(vfprintf.o) (__modsi3)
-c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_dvmd_tls.o)
-                              c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_udivsi3.o) (__div0)
-c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_addsubdf3.o)
-                              src/sdk.o (__subdf3)
-c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_muldivdf3.o)
-                              src/gpsmath.o (__muldf3)
-c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_cmpdf2.o)
-                              src/sdk.o (__gtdf2)
-c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_fixdfsi.o)
-                              src/comm_util_LL.o (__fixdfsi)
-c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_truncdfsf2.o)
-                              src/sdk.o (__truncdfsf2)
-c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_addsubsf3.o)
-                              src/pid.o (__subsf3)
-c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_muldivsf3.o)
-                              src/pid.o (__mulsf3)
-c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_cmpsf2.o)
-                              src/sdk.o (__gtsf2)
-c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_fixsfsi.o)
-                              src/pid.o (__fixsfsi)
-c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_divdi3.o)
-                              src/sdk.o (__divdi3)
-c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_clz.o)
-                              c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_divdi3.o) (__clz_tab)
-
-Allocating common symbols
-Common symbol       size              file
-
-LL_1khz_attitude_data
-                    0x5c              src/LL_HL_comm.o
-pid_vy              0x24              src/pid.o
-g_kf_z_enabled      0x1               src/sdk.o
-WO_CTRL_Input       0xc               src/sdk.o
-I2CReadLength       0x4               src/i2c.o
-g_ctrl_debug_pkt    0x72              src/sdk.o
-GPS_Time            0x8               src/main.o
-I2CSlaveBuffer      0x20              src/i2c.o
-g_dummy_pkt_info    0x4               src/sdk.o
-g_imu_pkt           0x24              src/sdk.o
-g_tx_freq_cfg_pkt_info
-                    0x4               src/sdk.o
-g_ctrl_cfg_pkt_info
-                    0x4               src/sdk.o
-g_accel_z           0x4               src/kalman.o
-estimatedDeclination
-                    0x4               src/LL_HL_comm.o
-CurrentRxIndex      0x4               src/ssp.o
-uart0_tx_cpsr       0x4               src/uart.o
-g_tx_freq_cfg_pkt   0x18              src/sdk.o
-covariance          0x38              src/LL_HL_comm.o
-WO_Direct_Motor_Control
-                    0x4               src/sdk.o
-g_motors_running    0x2               src/sdk.o
-SPIWR_num_bytes     0x4               src/ssp.o
-g_timesync_pkt_info
-                    0x4               src/sdk.o
-estimatedInclination
-                    0x4               src/LL_HL_comm.o
-g_accel_x           0x4               src/kalman.o
-packetInfo          0x300             src/uart.o
-g_des_pose_pkt_info
-                    0x4               src/sdk.o
-kal_yaw             0x28              src/LL_HL_comm.o
-g_rcdata_pkt        0x18              src/sdk.o
-g_dummy_pkt         0x1               src/sdk.o
-IMU_CalcData_updated
-                    0x1               src/LL_HL_comm.o
-g_mav_kf_cfg_pkt    0x41              src/sdk.o
-pid_yaw             0x24              src/pid.o
-g_des_vel_pkt       0x10              src/sdk.o
-CurrentTxIndex      0x4               src/ssp.o
-g_sin_psi           0x4               src/kalman.o
-WO_Direct_Individual_Motor_Control
-                    0x8               src/LL_HL_comm.o
-IMU_CalcData        0x5c              src/main.o
-WO_SDK              0x4               src/sdk.o
-rxParseBuffer       0x200             src/uart.o
-g_flight_state_pkt  0x1               src/sdk.o
-uart0_rx_cpsr       0x4               src/uart.o
-g_kf_x_enabled      0x1               src/sdk.o
-UART_rxptr          0x4               src/uart.o
-g_imu_gravity       0x4               src/main.o
-g_ctrl_cfg_pkt      0x24              src/sdk.o
-GPS_init_status     0x1               src/LL_HL_comm.o
-txFifo              0x1c              src/uart.o
-g_ctrl_input_pkt_info
-                    0x4               src/sdk.o
-g_toggle_motors_start_time
-                    0x8               src/sdk.o
-g_accel_y           0x4               src/kalman.o
-I2CMode             0x4               src/i2c.o
-kal_y               0xc4              src/LL_HL_comm.o
-pid_x               0x24              src/pid.o
-IMU_RawData         0x1c              src/main.o
-LL_1khz_control_input
-                    0x38              src/LL_HL_comm.o
-declinationAvailable
-                    0x1               src/LL_HL_comm.o
-I2CMasterBuffer     0x20              src/i2c.o
-I2CCmd              0x4               src/i2c.o
-g_sdk_loops         0x4               src/sdk.o
-g_motors_status_counter
-                    0x2               src/sdk.o
-g_des_pose_pkt      0x10              src/sdk.o
-send_buffer         0x10              src/uart1.o
-kal_out             0x1c              src/LL_HL_comm.o
-iap_entry           0x4               src/LPC2k_ee.o
-g_status_pkt        0x18              src/sdk.o
-current_chksum      0x2               src/uart1.o
-RO_RC_Data          0x10              src/sdk.o
-pid_z               0x24              src/pid.o
-g_mav_height_pkt_info
-                    0x4               src/sdk.o
-rxBuffer            0x200             src/uart.o
-g_flight_action_pkt_info
-                    0x4               src/sdk.o
-rxFifo              0x1c              src/uart.o
-g_mav_kf_cfg_pkt_info
-                    0x4               src/sdk.o
-txBuffer            0x200             src/uart.o
-pid_vx              0x24              src/pid.o
-g_pid_cfg_pkt       0xbc              src/sdk.o
-I2CWriteLength      0x4               src/i2c.o
-wpToLL              0x1c              src/LL_HL_comm.o
-SPIWRData           0x80              src/ssp.o
-GPS_Data            0x2c              src/gpsmath.o
-tx_buff             0x4               src/uart1.o
-RO_ALL_Data         0x8c              src/LL_HL_comm.o
-SYSTEM_Permanent_Data
-                    0x14              src/main.o
-g_ctrl_cmd          0x10              src/sdk.o
-g_timesync_pkt      0x10              src/sdk.o
-g_mav_pose2D_pkt_info
-                    0x4               src/sdk.o
-packetsTemp         0x1               src/main.o
-g_pose_pkt          0x24              src/sdk.o
-g_flight_action_pkt
-                    0x1               src/sdk.o
-HL_Status           0x18              src/main.o
-UART1_rxptr         0x4               src/uart1.o
-g_mav_pose2D_pkt    0x14              src/sdk.o
-g_pid_cfg_pkt_info  0x4               src/sdk.o
-gps_data_temp       0x2c              src/gpsmath.o
-SPIRDData           0x80              src/ssp.o
-g_cos_psi           0x4               src/kalman.o
-ADC0Value           0x20              src/adc.o
-uart_cnt            0x4               src/main.o
-IMU_CalcData_tmp    0x5c              src/main.o
-g_des_vel_pkt_info  0x4               src/sdk.o
-ADC1Value           0x20              src/adc.o
-kal_x               0xc4              src/LL_HL_comm.o
-pid_y               0x24              src/pid.o
-g_ctrl_input_pkt    0x10              src/sdk.o
-pid_vz              0x24              src/pid.o
-kal_z               0xc4              src/LL_HL_comm.o
-g_mav_height_pkt    0x8               src/sdk.o
-g_kf_y_enabled      0x1               src/sdk.o
-g_kf_yaw_enabled    0x1               src/sdk.o
-
-Memory Configuration
-
-Name             Origin             Length             Attributes
-ROM              0x00000000         0x00080000         xr
-RAM              0x40000000         0x00008000         rw
-*default*        0x00000000         0xffffffff
-
-Linker script and memory map
-
-LOAD external/Common_WinARM/src/Startup.o
-LOAD external/Common_WinARM/src/swi_handler.o
-LOAD src/LL_HL_comm.o
-LOAD src/gpsmath.o
-LOAD src/buzzer.o
-LOAD src/sdk.o
-LOAD src/comm_util_LL.o
-LOAD src/util.o
-LOAD src/pid.o
-LOAD src/kalman.o
-LOAD src/matrices.o
-LOAD mav_common/src/comm_util.o
-LOAD src/main.o
-LOAD src/hardware.o
-LOAD src/LPC2k_ee.o
-LOAD src/system.o
-LOAD src/uart.o
-LOAD src/uart1.o
-LOAD src/syscalls.o
-LOAD src/i2c.o
-LOAD src/adc.o
-LOAD src/ssp.o
-LOAD external/Common_WinARM/src/irq.o
-LOAD external/Common_WinARM/src/interrupt_utils.o
-LOAD c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a
-LOAD c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a
-LOAD c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a
-LOAD c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a
-LOAD c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a
-START GROUP
-LOAD c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a
-LOAD c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a
-END GROUP
-
-.text           0x00000000    0x15a50
- *(.vectorg)
- .vectorg       0x00000000       0x98 external/Common_WinARM/src/Startup.o
-                0x00000050                __IRQ_Wrapper
- .vectorg       0x00000098       0xd0 external/Common_WinARM/src/swi_handler.o
-                0x00000098                SoftwareInterrupt
-                0x00000168                . = ALIGN (0x4)
- *(.init)
- .init          0x00000168      0x168 external/Common_WinARM/src/Startup.o
-                0x00000294                __exit_THUMB
-                0x00000168                __startup
-                0x00000290                __exit_ARM
- *(.text .text.*)
- .text          0x000002d0        0x0 external/Common_WinARM/src/Startup.o
- .text          0x000002d0       0x38 external/Common_WinARM/src/swi_handler.o
-                0x000002e0                IntGetCPSR
-                0x00000300                FiqDisable
-                0x000002d0                IntRestore
-                0x000002f0                IntDisable
-                0x000002d8                FiqRestore
-                0x000002e8                IntEnable
-                0x000002f8                FiqEnable
- .text          0x00000308      0xbc4 src/LL_HL_comm.o
-                0x00000308                SSP_data_distribution_HL
-                0x0000058c                LL_write_ctrl_data
-                0x000006a8                HL2LL_write_cycle
-                0x00000ae4                SSP_rx_handler_HL
- .text          0x00000ecc      0x104 src/gpsmath.o
-                0x00000ecc                xy2latlon
- .text          0x00000fd0      0x158 src/buzzer.o
-                0x00000ff8                buzzer_handler
-                0x00000fd0                buzzer
- .text          0x00001128     0x2c78 src/sdk.o
-                0x00001fa8                sendRcData
-                0x00001128                writeCommand
-                0x00002b68                SDK_mainloop
-                0x0000254c                sdkInit
-                0x00002430                sendImuData
-                0x000011b4                processMotorStateChanges
-                0x0000182c                processKF
-                0x00001270                processEngageDisengageTimeouts
-                0x0000203c                synchronizeTime
-                0x0000201c                sendMavPoseData
-                0x00001e38                sendCtrlDebugData
-                0x00001174                checkTxPeriod
-                0x00001164                isSerialEnabled
-                0x000015dc                processFlightActionRequests
-                0x00001ffc                sendFlightStateData
-                0x00002740                processSendData
-                0x0000136c                processMotorCommands
-                0x000016d4                feedbackBeep
-                0x00001f88                sendStatusData
-                0x000012e4                processLandingThrust
- .text          0x00003da0      0x454 src/comm_util_LL.o
-                0x000041a4                LLToSIAnglePitch
-                0x00004090                LLToSIAngleRatePitch
-                0x00003e3c                LLToSIAccX
-                0x00003e18                LLToSIClimb
-                0x00003f4c                SIToLLCmdPitch
-                0x000040f0                LLToSIAngleRateRoll
-                0x00003fe4                LLToSIAngleRoll
-                0x00003ed0                LLToSIAccZ
-                0x00003f1c                SIToLLCmdRoll
-                0x0000414c                LLToSIAngleYaw
-                0x00004030                LLToSIAngleRateYaw
-                0x00003f80                SIToLLCmdYawRate
-                0x00003fb4                SIToLLCmdThrust
-                0x00003e84                LLToSIAccY
-                0x00003da0                degreesToRadians
-                0x00003ddc                radiansToDegrees
- .text          0x000041f4       0x54 src/util.o
-                0x000041f4                wait
- .text          0x00004248     0x1864 src/pid.o
-                0x0000434c                pidParamUpdate
-                0x00004ce4                pidCalc
-                0x00004e38                processCtrl
-                0x00004248                pidReset
- .text          0x00005aac      0xcd0 src/kalman.o
-                0x00005bf0                resetKalmanFilter
-                0x00005cfc                CorrectPos
-                0x00005e64                KFilter
-                0x00005c28                CorrectYaw
-                0x00005bc0                InitKalYaw
-                0x00005aac                InitKalPos
-                0x00005db4                PredictPos
-                0x00005cb8                PredictYaw
- .text          0x0000677c      0xd0c src/matrices.o
-                0x00006a34                negMatrix
-                0x000070dc                determinant
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-Cross Reference Table
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-Symbol                                            File
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-                                                  src/main.o
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-                                                  src/system.o
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-                                                  src/uart1.o
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-Fifo_reset                                        src/uart.o
-Fifo_writeBlock                                   src/uart.o
-Fifo_writeByte                                    src/uart.o
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-FiqEnable                                         external/Common_WinARM/src/swi_handler.o
-FiqRestore                                        external/Common_WinARM/src/swi_handler.o
-GPS_CFG_ANT                                       src/uart1.o
-GPS_CFG_CFG                                       src/uart1.o
-GPS_CFG_MSG                                       src/uart1.o
-GPS_CFG_NAV2                                      src/uart1.o
-GPS_CFG_PRT                                       src/uart1.o
-GPS_CFG_RATE                                      src/uart1.o
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-GPS_Data                                          src/uart1.o
-                                                  src/gpsmath.o
-                                                  src/LL_HL_comm.o
-GPS_Time                                          src/uart1.o
-                                                  src/main.o
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-                                                  src/uart1.o
-                                                  src/uart.o
-                                                  src/system.o
-                                                  src/hardware.o
-                                                  src/main.o
-                                                  src/kalman.o
-                                                  src/pid.o
-                                                  src/sdk.o
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-                                                  src/ssp.o
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-                                                  src/system.o
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-                                                  src/sdk.o
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-                                                  src/LL_HL_comm.o
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-                                                  src/uart1.o
-                                                  src/uart.o
-                                                  src/system.o
-                                                  src/main.o
-                                                  src/kalman.o
-                                                  src/pid.o
-                                                  src/sdk.o
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-IMU_RawData                                       src/main.o
-InitKalPos                                        src/kalman.o
-InitKalYaw                                        src/kalman.o
-IntDisable                                        external/Common_WinARM/src/swi_handler.o
-IntEnable                                         external/Common_WinARM/src/swi_handler.o
-IntGetCPSR                                        external/Common_WinARM/src/swi_handler.o
-IntRestore                                        external/Common_WinARM/src/swi_handler.o
-KFilter                                           src/kalman.o
-                                                  src/sdk.o
-LED                                               src/hardware.o
-                                                  src/main.o
-LLToSIAccX                                        src/comm_util_LL.o
-                                                  src/kalman.o
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-                                                  src/kalman.o
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-                                                  src/kalman.o
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-                                                  src/kalman.o
-                                                  src/pid.o
-                                                  src/sdk.o
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-                                                  src/sdk.o
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-                                                  src/sdk.o
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-                                                  src/kalman.o
-                                                  src/pid.o
-                                                  src/sdk.o
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-                                                  src/kalman.o
-                                                  src/pid.o
-                                                  src/sdk.o
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-                                                  src/kalman.o
-                                                  src/sdk.o
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-                                                  src/kalman.o
-LL_1khz_attitude_data                             src/sdk.o
-                                                  src/LL_HL_comm.o
-LL_1khz_control_input                             src/LL_HL_comm.o
-LL_write                                          src/ssp.o
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-LL_write_init                                     src/ssp.o
-                                                  src/main.o
-PWM_Init                                          src/system.o
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-RO_ALL_Data                                       src/ssp.o
-                                                  src/system.o
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-                                                  src/LL_HL_comm.o
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-                                                  src/sdk.o
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-                                                  src/system.o
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-                                                  src/ssp.o
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-                                                  src/uart1.o
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-                                                  src/system.o
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-                                                  src/ssp.o
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-                                                  src/system.o
-                                                  src/hardware.o
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-                                                  src/pid.o
-                                                  src/sdk.o
-                                                  src/buzzer.o
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-                                                  src/sdk.o
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-                                                  src/sdk.o
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-                                                  src/system.o
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-                                                  src/system.o
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-                                                  src/syscalls.o
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-                                                  src/syscalls.o
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-                                                  src/sdk.o
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-                                                  src/kalman.o
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-                                                  src/LL_HL_comm.o
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-                                                  src/system.o
-                                                  src/main.o
-                                                  src/kalman.o
-                                                  src/pid.o
-                                                  src/sdk.o
-                                                  src/LL_HL_comm.o
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-                                                  src/LL_HL_comm.o
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-                                                  src/LL_HL_comm.o
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-__divsf3                                          c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_muldivsf3.o)
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-__exit_ARM                                        external/Common_WinARM/src/Startup.o
-__exit_THUMB                                      external/Common_WinARM/src/Startup.o
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-                                                  c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(dtoa.o)
-                                                  mav_common/src/comm_util.o
-__gesf2                                           c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_cmpsf2.o)
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-                                                  c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(dtoa.o)
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-__gtsf2                                           c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_cmpsf2.o)
-                                                  src/pid.o
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-                                                  c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(w_pow.o)
-__ieee754_rem_pio2                                c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(e_rem_pio2.o)
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-__ieee754_sqrt                                    c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(e_sqrt.o)
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-                                                  c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(w_sqrt.o)
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-__isatty_from_thumb                               c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_clz.o)
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-                                                  c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(s_cos.o)
-__kernel_rem_pio2                                 c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(k_rem_pio2.o)
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-                                                  c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(vfprintf.o)
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-                                                  src/kalman.o
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-                                                  c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(vfprintf.o)
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-__printf_from_arm                                 c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_clz.o)
-__putchar                                         src/uart.o
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-                                                  c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(puts.o)
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-                                                  c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(vfprintf.o)
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-                                                  c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(wsetup.o)
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-                                                  c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(findfp.o)
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-                                                  c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(k_rem_pio2.o)
-                                                  c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(k_cos.o)
-                                                  c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(e_sqrt.o)
-                                                  c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(e_rem_pio2.o)
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-                                                  c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(dtoa.o)
-                                                  mav_common/src/comm_util.o
-                                                  src/kalman.o
-                                                  src/pid.o
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-__subsf3                                          c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/thumb/interwork\libgcc.a(_addsubsf3.o)
-                                                  src/matrices.o
-                                                  src/kalman.o
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-                                                  src/main.o
-                                                  mav_common/src/comm_util.o
-                                                  src/kalman.o
-                                                  src/pid.o
-                                                  src/comm_util_LL.o
-                                                  src/sdk.o
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-                                                  c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(vfprintf.o)
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-                                                  src/uart1.o
-                                                  src/uart.o
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-                                                  c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(vfprintf.o)
-                                                  src/sdk.o
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-_edata                                            external/Common_WinARM/src/Startup.o
-_end                                              src/syscalls.o
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-                                                  c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(fvwrite.o)
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-                                                  c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(makebuf.o)
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-                                                  c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(fflush.o)
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-                                                  c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(reallocr.o)
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-                                                  c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(findfp.o)
-                                                  c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(vfprintf.o)
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-                                                  src/kalman.o
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-g_vz_p_f                                          src/kalman.o
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-                                                  src/uart1.o
-                                                  src/LL_HL_comm.o
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-                                                  src/kalman.o
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-                                                  c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(vfprintf.o)
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-                                                  external/Common_WinARM/src/Startup.o
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-multMatVec                                        src/matrices.o
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-                                                  src/uart1.o
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-printf                                            c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(printf.o)
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-processEngageDisengageTimeouts                    src/sdk.o
-processFlightActionRequests                       src/sdk.o
-processKF                                         src/sdk.o
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-processSendData                                   src/sdk.o
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-                                                  src/main.o
-                                                  src/sdk.o
-puts                                              c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(puts.o)
-                                                  src/main.o
-radiansToDegrees                                  src/comm_util_LL.o
-registerPacket                                    src/uart.o
-                                                  src/sdk.o
-registeredPacketCnt                               src/uart.o
-resetKalmanFilter                                 src/kalman.o
-                                                  src/sdk.o
-restoreFIQ                                        external/Common_WinARM/src/interrupt_utils.o
-restoreIRQ                                        external/Common_WinARM/src/interrupt_utils.o
-                                                  src/uart.o
-ringbuffer1                                       src/uart1.o
-rint                                              c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(s_rint.o)
-                                                  c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(w_pow.o)
-rxBuffer                                          src/uart.o
-rxFifo                                            src/uart.o
-rxParseBuffer                                     src/uart.o
-scalbn                                            c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(s_scalbn.o)
-                                                  c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(k_rem_pio2.o)
-                                                  c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(e_pow.o)
-sdkInit                                           src/sdk.o
-                                                  src/main.o
-sendCtrlDebugData                                 src/sdk.o
-sendFlightStateData                               src/sdk.o
-sendImuData                                       src/sdk.o
-sendMavPoseData                                   src/sdk.o
-sendRcData                                        src/sdk.o
-sendStatusData                                    src/sdk.o
-send_buffer                                       src/uart1.o
-setlocale                                         c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(locale.o)
-sin                                               c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(s_sin.o)
-                                                  src/kalman.o
-                                                  src/pid.o
-sqrt                                              c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libm.a(w_sqrt.o)
-                                                  src/main.o
-startAutoBaud                                     src/uart.o
-                                                  src/sdk.o
-startstring                                       src/uart1.o
-stopstring                                        src/uart1.o
-strcmp                                            c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(strcmp.o)
-                                                  c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(locale.o)
-                                                  c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(wctomb_r.o)
-strlen                                            c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(strlen.o)
-                                                  c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(wctomb_r.o)
-                                                  c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(vfprintf.o)
-                                                  c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(puts.o)
-subMatrix                                         src/matrices.o
-subMatrix2                                        src/matrices.o
-                                                  src/kalman.o
-subVector                                         src/matrices.o
-subVector2                                        src/matrices.o
-                                                  src/kalman.o
-synchronizeTime                                   src/sdk.o
-timeOffset                                        src/sdk.o
-time_correction                                   src/sdk.o
-time_step                                         src/sdk.o
-timer0ISR                                         src/main.o
-                                                  src/system.o
-timer1ISR                                         src/main.o
-                                                  src/system.o
-total_logs_per_second                             src/main.o
-transmission1_running                             src/uart1.o
-transmission_running                              src/uart.o
-transpose                                         src/matrices.o
-trigger_cnt                                       src/main.o
-trigger_transmission                              src/uart1.o
-txBuffer                                          src/uart.o
-txFifo                                            src/uart.o
-tx_buff                                           src/uart1.o
-uart0ISR                                          src/uart.o
-                                                  src/system.o
-uart0_min_rx_buffer                               src/uart.o
-uart0_min_tx_buffer                               src/uart.o
-uart0_rx_cpsr                                     src/uart.o
-uart0_tx_cpsr                                     src/uart.o
-uart1ISR                                          src/uart1.o
-                                                  src/system.o
-uart_cnt                                          src/uart1.o
-                                                  src/main.o
-uninstall_irq                                     external/Common_WinARM/src/irq.o
-vfprintf                                          c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(vfprintf.o)
-                                                  c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(printf.o)
-wait                                              src/util.o
-                                                  src/main.o
-wcrtomb                                           c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(wcrtomb.o)
-wcsrtombs                                         c:/asctec_arm_sdk/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/thumb/interwork\libc.a(wcsrtombs.o)
-wpCtrlAckTrigger                                  src/LL_HL_comm.o
-wpCtrlDistToWp                                    src/LL_HL_comm.o
-wpCtrlNavStatus                                   src/LL_HL_comm.o
-wpCtrlWpCmd                                       src/LL_HL_comm.o
-wpCtrlWpCmdUpdated                                src/LL_HL_comm.o
-wpToLL                                            src/LL_HL_comm.o
-writeCommand                                      src/sdk.o
-writePacket2Ringbuffer                            src/uart.o
-                                                  src/sdk.o
-xy2latlon                                         src/gpsmath.o
diff --git a/ccny_asctec_firmware_2/makefile b/ccny_asctec_firmware_2/makefile
deleted file mode 100644
index 43f58b5..0000000
--- a/ccny_asctec_firmware_2/makefile
+++ /dev/null
@@ -1,569 +0,0 @@
-# Hey Emacs, this is a -*- makefile -*-
-#
-# WinARM template makefile 
-# by Martin Thomas, Kaiserslautern, Germany 
-# <eversmith@heizung-thomas.de>
-#
-# based on the WinAVR makefile written by Eric B. Weddington, Jörg Wunsch, et al.
-# Released to the Public Domain
-# Please read the make user manual!
-#
-#
-# On command line:
-#
-# make all = Make software.
-#
-# make clean = Clean out built project files.
-#
-# make program = Download the hex file to the device
-#
-# (TODO: make filename.s = Just compile filename.c into the assembler code only)
-#
-# To rebuild project do "make clean" then "make all".
-#
-# Changelog:
-# - 17. Feb. 2005  - added thumb-interwork support (mth)
-# - 28. Apr. 2005  - added C++ support (mth)
-# - 29. Arp. 2005  - changed handling for lst-Filename (mth)
-# -  1. Nov. 2005  - exception-vector placement options (mth)
-# - 15. Nov. 2005  - added library-search-path (EXTRA_LIB...) (mth)
-# -  2. Dec. 2005  - fixed ihex and binary file extensions (mth)
-# - 22. Feb. 2006  - added AT91LIBNOWARN setting (mth)
-# - 19. Apr. 2006  - option FLASH_TOOL (default lpc21isp); variable IMGEXT (mth)
-#
-
-//FLASH_TOOL = UVISION
-FLASH_TOOL = OPENOCD
-
-# MCU name and submodel
-MCU      = arm7tdmi-s
-SUBMDL   = LPC2146
-THUMB    = -mthumb
-THUMB_IW = -mthumb-interwork
-
-## Create ROM-Image (final)
-RUN_MODE=ROM_RUN
-## Create RAM-Image (debugging) - not used in this example
-#RUN_MODE=RAM_RUN
-
-# not supported in this example:
-## Exception-Vector placement only supported for "ROM_RUN"
-## (placement settings ignored when using "RAM_RUN")
-## - Exception vectors in ROM:
-##VECTOR_LOCATION=VECTORS_IN_ROM
-## - Exception vectors in RAM:
-##VECTOR_LOCATION=VECTORS_IN_RAM
-
-
-# Target file name (without extension).
-##TARGET = uarttest
-TARGET = main
-
-# List C source files here. (C dependencies are automatically generated.)
-# use file-extension c for "c-only"-files
-##SRC = $(TARGET).c 
-
-# List C source files here which must be compiled in ARM-Mode.
-# use file-extension c for "c-only"-files
-#SRCARM = $(TARGET).c
-SRCARM = src/LL_HL_comm.c
-SRCARM += src/gpsmath.c
-SRCARM += src/buzzer.c
-SRCARM += src/sdk.c
-SRCARM += src/comm_util_LL.c
-SRCARM += src/util.c
-SRCARM += src/pid.c
-SRCARM += src/kalman.c
-SRCARM += src/matrices.c
-SRCARM += mav_common/src/comm_util.c
-
-#Sources with interrupt routines in them
-SRCARMINT = src/$(TARGET).c
-SRCARMINT += src/hardware.c
-SRCARMINT += src/LPC2k_ee.c
-SRCARMINT += src/system.c
-SRCARMINT += src/uart.c
-SRCARMINT += src/uart1.c
-SRCARMINT += src/syscalls.c
-SRCARMINT += src/i2c.c
-SRCARMINT += src/adc.c
-SRCARMINT += src/ssp.c
-
-SRCARMINT += external/Common_WinARM/src/irq.c
-SRCARMINT += external/Common_WinARM/src/interrupt_utils.c
-
-
-# List C++ source files here.
-# use file-extension cpp for C++-files (use extension .cpp)
-CPPSRC = 
-
-# List C++ source files here which must be compiled in ARM-Mode.
-# use file-extension cpp for C++-files (use extension .cpp)
-#CPPSRCARM = $(TARGET).cpp
-CPPSRCARM = 
-
-# List Assembler source files here.
-# Make them always end in a capital .S.  Files ending in a lowercase .s
-# will not be considered source files but generated files (assembler
-# output from the compiler), and will be deleted upon "make clean"!
-# Even though the DOS/Win* filesystem matches both .s and .S the same,
-# it will preserve the spelling of the filenames, and gcc itself does
-# care about how the name is spelled on its command-line.
-ASRC = 
-
-# List Assembler source files here which must be assembled in ARM-Mode..
-ASRCARM = external/Common_WinARM/src/Startup.S
-#ASRCARM = crt.S
-ASRCARM += external/Common_WinARM/src/swi_handler.S
-
-## Output format. (can be ihex or binary)
-## (binary i.e. for openocd and SAM-BA, hex i.e. for lpc21isp and uVision)
-FORMATHEX = ihex
-FORMAT = binary
-
-# Optimization level, can be [0, 1, 2, 3, s]. 
-# 0 = turn off optimization. s = optimize for size.
-# (Note: 3 is not always the best optimization level. See avr-libc FAQ.)
-OPT = 2
-OPTINT = 0
-#OPT = 0
-
-## Using the Atmel AT91_lib produces warning with
-## the default warning-levels. 
-## yes - disable these warnings; no - keep default settings
-#AT91LIBNOWARN = yes
-AT91LIBNOWARN = no
-
-# Debugging format.
-# Native formats for AVR-GCC's -g are stabs [default], or dwarf-2.
-# AVR (extended) COFF requires stabs, plus an avr-objcopy run.
-#DEBUG = stabs
-DEBUG = dwarf-2
-
-# List any extra directories to look for include files here.
-#     Each directory must be seperated by a space.
-
-#C:/OpenOCD/workspace/hlfirm1/asctec_hl_comm/include/asctec_hl_comm 
-#ssdk/include 
-
-### changed this!!
-EXTRAINCDIRS = external/Common_WinARM/inc C:\WinARM\arm-elf\include include/ccny_asctec_firmware /mav_common/include/mav_common
-
-# List any extra directories to look for library files here.
-#     Each directory must be seperated by a space.
-#EXTRA_LIBDIRS = ../arm7_efsl_0_2_4
-#EXTRA_LIBDIRS = C:/OpenOCD/workspace/hlfirm1/ssdk/lib
-#EXTRA_LIBDIRS = C:/OpenOCD/workspace/hlfirm1/asctec_hl_comm/include/asctec_hl_comm
-#EXTRA_LIBDIRS = C:\WinARM\arm-elf\include
-# Compiler flag to set the C Standard level.
-# c89   - "ANSI" C
-# gnu89 - c89 plus GCC extensions
-# c99   - ISO C99 standard (not yet fully implemented)
-# gnu99 - c99 plus GCC extensions
-CSTANDARD = -std=gnu99
-
-# Place -D or -U options for C here
-CDEFS =  -D$(RUN_MODE)
-
-# Place -I options here
-CINCS =
-
-# Place -D or -U options for ASM here
-ADEFS =  -D$(RUN_MODE)
-
-ifdef VECTOR_LOCATION
-CDEFS += -D$(VECTOR_LOCATION)
-ADEFS += -D$(VECTOR_LOCATION)
-endif
-
-CDEFS += -D__WinARM__
-ADEFS += -D__WinARM__
-
-# Compiler flags.
-#  -g*:          generate debugging information
-#  -O*:          optimization level
-#  -f...:        tuning, see GCC manual and avr-libc documentation
-#  -Wall...:     warning level
-#  -Wa,...:      tell GCC to pass this to the assembler.
-#    -adhlns...: create assembler listing
-#
-# Flags for C and C++ (arm-elf-gcc/arm-elf-g++)
-#CFLAGS = -g$(DEBUG)
-CFLAGS += $(CDEFS) $(CINCS)
-CFLAGS += -O$(OPT)
-CFLAGS += -Wall -Wcast-align -Wimplicit 
-CFLAGS += -Wpointer-arith -Wswitch
-CFLAGS += -Wredundant-decls -Wreturn-type -Wshadow -Wunused
-CFLAGS += -Wa,-adhlns=$(subst $(suffix $<),.lst,$<) 
-CFLAGS += $(patsubst %,-I%,$(EXTRAINCDIRS))
-
-# Flags for C and C++ (arm-elf-gcc/arm-elf-g++) files containing interrupt routines
-#INTCFLAGS = -g$(DEBUG)
-INTCFLAGS += $(CDEFS) $(CINCS)
-INTCFLAGS += -O$(OPTINT)
-INTCFLAGS += -Wall -Wcast-align -Wimplicit 
-INTCFLAGS += -Wpointer-arith -Wswitch
-INTCFLAGS += -Wredundant-decls -Wreturn-type -Wshadow -Wunused
-INTCFLAGS += -Wa,-adhlns=$(subst $(suffix $<),.lst,$<) 
-INTCFLAGS += $(patsubst %,-I%,$(EXTRAINCDIRS))
-
-# flags only for C
-CONLYFLAGS += -Wnested-externs 
-CONLYFLAGS += $(CSTANDARD)
-ifneq ($(AT91LIBNOWARN),yes)
-#AT91-lib warnings with:
-CFLAGS += -Wcast-qual
-CONLYFLAGS += -Wmissing-prototypes 
-CONLYFLAGS += -Wstrict-prototypes
-CONLYFLAGS += -Wmissing-declarations
-endif
-
-# flags only for C++ (arm-elf-g++)
-# CPPFLAGS = -fno-rtti -fno-exceptions
-CPPFLAGS = 
-
-# Assembler flags.
-#  -Wa,...:    tell GCC to pass this to the assembler.
-#  -ahlns:     create listing
-#  -g$(DEBUG): have the assembler create line number information
-#ASFLAGS = $(ADEFS) -Wa,-adhlns=$(<:.S=.lst),-g$(DEBUG)
-
-
-#Additional libraries.
-
-# Extra libraries
-#    Each library-name must be seperated by a space.
-#    To add libxyz.a, libabc.a and libefsl.a: 
-#    EXTRA_LIBS = xyz abc efsl
-#EXTRA_LIBS = efsl
-#EXTRA_LIBS = ssdk
-EXTRA_LIBS = c
-#Support for newlibc-lpc (file: libnewlibc-lpc.a)
-#NEWLIBLPC = -lnewlib-lpc
-
-MATH_LIB = -lm
-
-# CPLUSPLUS_LIB = -lstdc++
-
-
-# Linker flags.
-#  -Wl,...:     tell GCC to pass this to linker.
-#    -Map:      create map file
-#    --cref:    add cross reference to  map file
-LDFLAGS = -nostartfiles -Wl,-Map=$(TARGET).map,--cref
-LDFLAGS += -lc
-#LDFLAGS += -lc -lgcc -ldeclination -lublox 
-LDFLAGS += $(NEWLIBLPC) $(MATH_LIB)
-LDFLAGS += -lc -lgcc 
-LDFLAGS += $(CPLUSPLUS_LIB)
-LDFLAGS += $(patsubst %,-L%,$(EXTRA_LIBDIRS))
-LDFLAGS += $(patsubst %,-l%,$(EXTRA_LIBS))
-
-# Set Linker-Script Depending On Selected Memory and Controller
-ifeq ($(RUN_MODE),RAM_RUN)
-LDFLAGS +=-Texternal/Common_WinARM/$(SUBMDL)-RAM.ld
-else 
-LINKSCRIPT =-Texternal/Common_WinARM/$(SUBMDL)-ROM.ld
-LINKSCRIPTBL =-Texternal/Common_WinARM/$(SUBMDL)bl-ROM.ld
-endif
-
-
-# ---------------------------------------------------------------------------
-# Flash-Programming support using lpc21isp by Martin Maurer 
-# only for Philips LPC and Analog ADuC ARMs
-#
-# Settings and variables:
-#LPC21ISP = lpc21isp
-LPC21ISP = lpc21isp
-LPC21ISP_PORT = com1
-LPC21ISP_BAUD = 38400
-LPC21ISP_XTAL = 12000
-LPC21ISP_FLASHFILE = $(TARGET).hex
-# verbose output:
-#LPC21ISP_DEBUG = -debug
-# enter bootloader via RS232 DTR/RTS (only if hardware supports this
-# feature - see Philips AppNote):
-LPC21ISP_CONTROL = -control
-# ---------------------------------------------------------------------------
-
-
-# Define directories, if needed.
-## DIRARM = c:/WinARM/
-## DIRARMBIN = $(DIRAVR)/bin/
-## DIRAVRUTILS = $(DIRAVR)/utils/bin/
-
-# Define programs and commands.
-SHELL = sh
-CC = arm-elf-gcc
-CPP = arm-elf-g++
-OBJCOPY = arm-elf-objcopy
-OBJDUMP = arm-elf-objdump
-SIZE = arm-elf-size
-NM = arm-elf-nm
-REMOVE = rm -f
-COPY = cp
-
-# Define Messages
-# English
-MSG_ERRORS_NONE = Errors: none
-MSG_BEGIN = "-------- begin (mode: $(RUN_MODE)) --------"
-MSG_END = --------  end  --------
-MSG_SIZE_BEFORE = Size before: 
-MSG_SIZE_AFTER = Size after:
-MSG_FLASH = Creating load file for Flash:
-MSG_EXTENDED_LISTING = Creating Extended Listing:
-MSG_SYMBOL_TABLE = Creating Symbol Table:
-MSG_LINKING = Linking:
-MSG_COMPILING = Compiling C:
-MSG_COMPILING_ARM_INT = "Compiling C (ARM-only):"
-MSG_COMPILING_ARM_INT = "Compiling C (ARM-only) including Interrupts:"
-MSG_COMPILINGCPP = Compiling C++:
-MSG_COMPILINGCPP_ARM = "Compiling C++ (ARM-only):"
-MSG_ASSEMBLING = Assembling:
-MSG_ASSEMBLING_ARM = "Assembling (ARM-only):"
-MSG_CLEANING = Cleaning project:
-MSG_FORMATERROR = Can not handle output-format
-MSG_LPC21_RESETREMINDER = You may have to bring the target in bootloader-mode now.
-
-# Define all object files.
-COBJ      = $(SRC:.c=.o) 
-AOBJ      = $(ASRC:.S=.o)
-COBJARM   = $(SRCARM:.c=.o)
-COBJARMINT =$(SRCARMINT:.c=.o)
-AOBJARM   = $(ASRCARM:.S=.o)
-CPPOBJ    = $(CPPSRC:.cpp=.o) 
-CPPOBJARM = $(CPPSRCARM:.cpp=.o)
-
-# Define all listing files.
-LST = $(ASRC:.S=.lst) $(ASRCARM:.S=.lst) $(SRC:.c=.lst) $(SRCARM:.c=.lst) $(SRCARMINT:.c=.lst)
-LST += $(CPPSRC:.cpp=.lst) $(CPPSRCARM:.cpp=.lst)
-
-# Compiler flags to generate dependency files.
-### GENDEPFLAGS = -Wp,-M,-MP,-MT,$(*F).o,-MF,.dep/$(@F).d
-GENDEPFLAGS = -MD -MP -MF .dep/$(@F).d
-
-# Combine all necessary flags and optional flags.
-# Add target processor to flags.
-ALL_CFLAGS  = -mcpu=$(MCU) $(THUMB_IW) -I. $(CFLAGS) $(GENDEPFLAGS)
-INT_CFLAGS = -mcpu=$(MCU) $(THUMB_IW) -I. $(INTCFLAGS) $(GENDEPFLAGS)
-ALL_ASFLAGS = -mcpu=$(MCU) $(THUMB_IW) -I. -x assembler-with-cpp $(ASFLAGS)
-INT_ASFLAGS = -mcpu=$(MCU) $(THUMB_IW) -I. -x assembler-with-cpp $(ASFLAGS)
-
-
-# Default target.
-all: begin gccversion sizebefore bld sizeafter finished end
-
-ifeq ($(FORMAT),ihex)
-bld: elf hex lss
-hex: $(TARGET).hex
-IMGEXT=hex
-else 
-ifeq ($(FORMAT),binary)
-bld: elf bin hex lss 
-bin: $(TARGET).bin
-hex: $(TARGET).hex
-elb: $(TARGET).elb
-hbl: $(TARGET).hbl
-atp: $(TARGET).atp
-IMGEXT=bin
-else 
-$(error "$(MSG_FORMATERROR) $(FORMAT)")
-endif
-endif
-
-elf: $(TARGET).elf
-lss: $(TARGET).lss 
-sym: $(TARGET).sym
-
-# Eye candy.
-begin:
-	@echo
-	@echo $(MSG_BEGIN)
-	
-finished:
-	@echo $(MSG_ERRORS_NONE)
-
-end:
-	@echo $(MSG_END)
-	@echo
-
-
-# Display size of file.
-HEXSIZE = $(SIZE) --target=$(FORMAT) $(TARGET).hex
-ELFSIZE = $(SIZE) -A $(TARGET).elf
-sizebefore:
-	@if [ -f $(TARGET).elf ]; then echo; echo $(MSG_SIZE_BEFORE); $(ELFSIZE); echo; fi
-
-sizeafter:
-	@if [ -f $(TARGET).elf ]; then echo; echo $(MSG_SIZE_AFTER); $(ELFSIZE); echo; fi
-
-
-# Display compiler version information.
-gccversion : 
-	@$(CC) --version
-
-
-# Program the device.
-ifeq ($(FLASH_TOOL),UVISION)
-# Program the device with Keil's uVision (needs configured uVision-Workspace). 
-program: $(TARGET).$(IMGEXT)
-	@echo
-	@echo "Programming with uVision"
-#	C:\Keil\uv3\Uv3.exe -f uvisionflash.Uv2 -ouvisionflash.txt
-	$(REMOVE) external/Common_WinARM/$(TARGET).hex
-	$(COPY) $(TARGET).hex external/Common_WinARM/
-	C:\Keil\uv3\Uv3.exe -f external/Common_WinARM\uvisionflash.Uv2
-else
-ifeq ($(FLASH_TOOL),OPENOCD)
-# Program the device with Dominic Rath's OPENOCD in "batch-mode", needs cfg and "reset-script".
-program: $(TARGET).$(IMGEXT)
-	@echo
-	@echo "Programming with OPENOCD"
-	C:\WinARM\utils\OpenOCD\openocd.exe -f arm7_ft2232.cfg
-
-else
-# Program the device.  - lpc21isp will not work for SAM7
-program: $(TARGET).$(IMGEXT)
-	@echo
-	@echo $(MSG_LPC21_RESETREMINDER)
-	$(LPC21ISP) $(LPC21ISP_OPTIONS) $(LPC21ISP_DEBUG) $(LPC21ISP_FLASHFILE) $(LPC21ISP_PORT) $(LPC21ISP_BAUD) $(LPC21ISP_XTAL)
-endif
-endif
-
-# Create final output file (.hex) from ELF output file.
-%.hex: %.elf
-	@echo
-	@echo $(MSG_FLASH) $@
-	$(OBJCOPY) -O $(FORMATHEX) $< $@
-	
-# Create final output file (.bin) from ELF output file.
-%.bin: %.elf
-	@echo
-	@echo $(MSG_FLASH) $@
-	$(OBJCOPY) -O $(FORMAT) $< $@
-
-
-# Create extended listing file from ELF output file.
-# testing: option -C
-%.lss: %.elf
-	@echo
-	@echo $(MSG_EXTENDED_LISTING) $@
-	$(OBJDUMP) -h -S -C $< > $@
-
-
-# Create a symbol table from ELF output file.
-%.sym: %.elf
-	@echo
-	@echo $(MSG_SYMBOL_TABLE) $@
-	$(NM) -n $< > $@
-
-
-# Link: create ELF output file from object files.
-.SECONDARY : $(TARGET).elf
-.PRECIOUS : $(AOBJARM) $(AOBJ) $(COBJARM) $(COBJ) $(CPPOBJ) $(CPPOBJARM) $(COBJARMINT)
-%.elf:  $(AOBJARM) $(AOBJ) $(COBJARM) $(COBJ) $(CPPOBJ) $(CPPOBJARM) $(COBJARMINT)
-	@echo
-	@echo $(MSG_LINKING) $@
-	$(CC) $(THUMB) $(ALL_CFLAGS) $(AOBJARM) $(AOBJ) $(COBJARM) $(COBJARMINT) $(COBJ) $(CPPOBJ) $(CPPOBJARM) --output $@ $(LDFLAGS) $(LINKSCRIPT)
-#	$(CPP) $(THUMB) $(ALL_CFLAGS) $(AOBJARM) $(AOBJ) $(COBJARM) $(COBJARMINT) $(COBJ) $(CPPOBJ) $(CPPOBJARM) --output $@ $(LDFLAGS)
-
-# Compile: create object files from C source files. ARM/Thumb
-$(COBJ) : %.o : %.c
-	@echo
-	@echo $(MSG_COMPILING) $<
-	$(CC) -c $(THUMB) $(ALL_CFLAGS) $(CONLYFLAGS) $< -o $@ 
-
-# Compile: create object files from C source files. ARM-only
-$(COBJARM) : %.o : %.c
-	@echo
-	@echo $(MSG_COMPILING_ARM) $<
-	$(CC) -c $(ALL_CFLAGS) $(CONLYFLAGS) $< -o $@ 
-	
-# Compile: create object files from C source files with interrupts. ARM-only
-$(COBJARMINT) : %.o : %.c
-	@echo
-	@echo $(MSG_COMPILING_ARM_INT) $<
-	$(CC) -c $(INT_CFLAGS) $(CONLYFLAGS) $< -o $@ 
-
-# Compile: create object files from C++ source files. ARM/Thumb
-$(CPPOBJ) : %.o : %.cpp
-	@echo
-	@echo $(MSG_COMPILINGCPP) $<
-	$(CPP) -c $(THUMB) $(ALL_CFLAGS) $(CPPFLAGS) $< -o $@ 
-
-# Compile: create object files from C++ source files. ARM-only
-$(CPPOBJARM) : %.o : %.cpp
-	@echo
-	@echo $(MSG_COMPILINGCPP_ARM) $<
-	$(CPP) -c $(ALL_CFLAGS) $(CPPFLAGS) $< -o $@ 
-
-
-# Compile: create assembler files from C source files. ARM/Thumb
-## does not work - TODO - hints welcome
-##$(COBJ) : %.s : %.c
-##	$(CC) $(THUMB) -S $(ALL_CFLAGS) $< -o $@
-
-
-# Assemble: create object files from assembler source files. ARM/Thumb
-$(AOBJ) : %.o : %.S
-	@echo
-	@echo $(MSG_ASSEMBLING) $<
-	$(CC) -c $(THUMB) $(ALL_ASFLAGS) $< -o $@
-
-
-# Assemble: create object files from assembler source files. ARM-only
-$(AOBJARM) : %.o : %.S
-	@echo
-	@echo $(MSG_ASSEMBLING_ARM) $<
-	$(CC) -c $(ALL_ASFLAGS) $< -o $@
-
-
-# Target: clean project.
-clean: begin clean_list finished end
-
-
-
-clean_list :
-	@echo
-	@echo $(MSG_CLEANING)
-	$(REMOVE) external/Common_WinARM/$(TARGET).hex
-	$(REMOVE) $(TARGET).hex
-	$(REMOVE) $(TARGET).bin
-	$(REMOVE) $(TARGET).obj
-	$(REMOVE) $(TARGET).elf
-	$(REMOVE) $(TARGET).map
-	$(REMOVE) $(TARGET).obj
-	$(REMOVE) $(TARGET).a90
-	$(REMOVE) $(TARGET).sym
-	$(REMOVE) $(TARGET).lnk
-	$(REMOVE) $(TARGET).lss
-	$(REMOVE) $(COBJ)
-	$(REMOVE) $(CPPOBJ)
-	$(REMOVE) $(AOBJ)
-	$(REMOVE) $(COBJARM)
-	$(REMOVE) $(COBJARMINT)
-	$(REMOVE) $(CPPOBJARM)
-	$(REMOVE) $(AOBJARM)
-	$(REMOVE) $(LST)
-	$(REMOVE) $(SRC:.c=.s)
-	$(REMOVE) $(SRC:.c=.d)
-	$(REMOVE) $(SRCARM:.c=.s)
-	$(REMOVE) $(SRCARM:.c=.d)
-	$(REMOVE) $(SRCARMINT:.c=.s)
-	$(REMOVE) $(SRCARMINT:.c=.d)
-	$(REMOVE) $(CPPSRC:.cpp=.s) 
-	$(REMOVE) $(CPPSRC:.cpp=.d)
-	$(REMOVE) $(CPPSRCARM:.cpp=.s) 
-	$(REMOVE) $(CPPSRCARM:.cpp=.d)
-	$(REMOVE) .dep/*
-
-
-# Include the dependency files.
--include $(shell mkdir .dep 2>/dev/null) $(wildcard .dep/*)
-
-
-# Listing of phony targets.
-.PHONY : all begin finish end sizebefore sizeafter gccversion \
-bld elf hex bin lss sym clean clean_list program
-
-
diff --git a/ccny_asctec_firmware_2/manifest.xml b/ccny_asctec_firmware_2/manifest.xml
deleted file mode 100644
index c3a0282..0000000
--- a/ccny_asctec_firmware_2/manifest.xml
+++ /dev/null
@@ -1,13 +0,0 @@
-<package>
-  <description brief="ccny_asctec_firmware_2">
-
-     Firmware for the Asctec Autopilot HighLevel Processor, in part based on asctec_hl_firmware by Achtelik et al. For the 2012 version of the asctec HL/LL SDK.
-
-  </description>
-  <author>Ivan Dryanovski, Roberto G. Valenti</author>
-  <license>BSD</license>
-  <review status="unreviewed" notes="Under active development"/>
-  <url>http://ros.org/wiki/ccny_asctec_firmware_2</url>
-</package>
-
-
diff --git a/ccny_asctec_firmware_2/src/LL_HL_comm.c b/ccny_asctec_firmware_2/src/LL_HL_comm.c
deleted file mode 100644
index 7919ad2..0000000
--- a/ccny_asctec_firmware_2/src/LL_HL_comm.c
+++ /dev/null
@@ -1,633 +0,0 @@
-/*
-
-Copyright (c) 2011, Ascending Technologies GmbH
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
- * Redistributions of source code must retain the above copyright notice,
-   this list of conditions and the following disclaimer.
- * Redistributions in binary form must reproduce the above copyright
-   notice, this list of conditions and the following disclaimer in the
-   documentation and/or other materials provided with the distribution.
-
-THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND ANY
-EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY
-DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
-OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
-DAMAGE.
-
- */
-
-#include "main.h"
-#include "LL_HL_comm.h"
-#include "system.h"
-#include "gpsmath.h"
-#include "sdk.h"
-#include "declination.h"
-
-unsigned short SSP_ack=0;
-extern char SPIWRData[128];
-extern char data_sent_to_HL;
-extern char data_sent_to_LL;
-extern unsigned int SPIWR_num_bytes;
-
-struct LL_ATTITUDE_DATA LL_1khz_attitude_data;
-struct LL_CONTROL_INPUT LL_1khz_control_input;
-
-unsigned char wpCtrlWpCmd=0;
-unsigned char wpCtrlWpCmdUpdated=0;
-
-unsigned char wpCtrlAckTrigger=0;
-
-unsigned short wpCtrlNavStatus=0;
-unsigned short wpCtrlDistToWp=0;
-
-struct WAYPOINT wpToLL;
-
-void SSP_data_distribution_HL(void)
-{
-	unsigned char i;
-	unsigned char current_page=LL_1khz_attitude_data.system_flags&0x03;
-
-	if(LL_1khz_attitude_data.system_flags&SF_GPS_NEW) gpsDataOkTrigger=0;
-
-	IMU_CalcData.angle_nick=LL_1khz_attitude_data.angle_pitch*10;
-	IMU_CalcData.angle_roll=LL_1khz_attitude_data.angle_roll*10;
-	IMU_CalcData.angle_yaw=LL_1khz_attitude_data.angle_yaw*10;
-
-	IMU_CalcData.angvel_nick=LL_1khz_attitude_data.angvel_pitch;
-	IMU_CalcData.angvel_roll=LL_1khz_attitude_data.angvel_roll;
-	IMU_CalcData.angvel_yaw=LL_1khz_attitude_data.angvel_yaw;
-
-	RO_ALL_Data.angle_pitch=IMU_CalcData.angle_nick;
-	RO_ALL_Data.angle_roll=IMU_CalcData.angle_roll;
-	RO_ALL_Data.angle_yaw=IMU_CalcData.angle_yaw;
-
-	RO_ALL_Data.angvel_pitch=LL_1khz_attitude_data.angvel_pitch;
-	RO_ALL_Data.angvel_roll=LL_1khz_attitude_data.angvel_roll;
-	RO_ALL_Data.angvel_yaw=LL_1khz_attitude_data.angvel_yaw;
-
-	if(!current_page)	//page 0
-	{
-		for(i=0;i<8;i++)
-		{
-			RO_RC_Data.channel[i]=LL_1khz_attitude_data.RC_data[i]*16;
-			RO_ALL_Data.channel[i]=RO_RC_Data.channel[i];
-		}
-		IMU_CalcData.acc_x_calib=LL_1khz_attitude_data.acc_x*10;
-		IMU_CalcData.acc_y_calib=LL_1khz_attitude_data.acc_y*10;
-		IMU_CalcData.acc_z_calib=LL_1khz_attitude_data.acc_z*10;
-
-		//system is initialized as soon as values differ from 0
-		if(IMU_CalcData.acc_z_calib&&(SYSTEM_initialized<10)) SYSTEM_initialized++;
-
-		RO_ALL_Data.acc_x=LL_1khz_attitude_data.acc_x*10;
-		RO_ALL_Data.acc_y=LL_1khz_attitude_data.acc_y*10;
-		RO_ALL_Data.acc_z=LL_1khz_attitude_data.acc_z*10;
-
-		RO_ALL_Data.fusion_latitude=LL_1khz_attitude_data.latitude_best_estimate;
-		RO_ALL_Data.fusion_longitude=LL_1khz_attitude_data.longitude_best_estimate;
-
-	}
-	else if(current_page==1)	//page 1
-	{
-		IMU_CalcData.height=LL_1khz_attitude_data.height;
-		IMU_CalcData.dheight=LL_1khz_attitude_data.dheight;
-
-		RO_ALL_Data.fusion_height=LL_1khz_attitude_data.height;
-		RO_ALL_Data.fusion_dheight=LL_1khz_attitude_data.dheight;
-
-		RO_ALL_Data.fusion_speed_x=LL_1khz_attitude_data.speed_x_best_estimate;
-		RO_ALL_Data.fusion_speed_y=LL_1khz_attitude_data.speed_y_best_estimate;
-		for(i=0;i<6;i++)
-		{
-			RO_ALL_Data.motor_rpm[i]=LL_1khz_attitude_data.motor_data[i];
-		}
-	}
-	else if(current_page==2)
-	{
-		IMU_CalcData.Hx=LL_1khz_attitude_data.mag_x;
-		IMU_CalcData.Hy=LL_1khz_attitude_data.mag_y;
-		IMU_CalcData.Hz=LL_1khz_attitude_data.mag_z;
-
-		RO_ALL_Data.Hx=LL_1khz_attitude_data.mag_x;
-		RO_ALL_Data.Hy=LL_1khz_attitude_data.mag_y;
-		RO_ALL_Data.Hz=LL_1khz_attitude_data.mag_z;
-
-		unsigned char slowDataUpChannelSelect=(LL_1khz_attitude_data.status2>>1)&0x7F;
-		switch (slowDataUpChannelSelect)
-		{
-		case SUDC_FLIGHTTIME:
-
-			HL_Status.flight_time=LL_1khz_attitude_data.slowDataUpChannelDataShort;
-			break;
-		case SUDC_NAVSTATUS:
-			wpCtrlNavStatus=LL_1khz_attitude_data.slowDataUpChannelDataShort;
-		break;
-		case SUDC_DISTTOWP:
-			wpCtrlDistToWp=LL_1khz_attitude_data.slowDataUpChannelDataShort;
-		break;
-		case SUDC_WPACKTRIGGER:
-			wpCtrlAckTrigger=LL_1khz_attitude_data.slowDataUpChannelDataShort;
-		break;
-
-		}
-
-	}
-}
-
-int HL2LL_write_cycle(void)	//write data to low-level processor
-{
-	static char pageselect=0;
-	unsigned char i;
-
-	if(!data_sent_to_LL) return(0);
-
-	//update 1kHz data
-	LL_1khz_control_input.system_flags=0|pageselect;
-	//SSP_ack=0;	//reset ack
-
-	if(gpsDataOkTrigger) LL_1khz_control_input.system_flags|=SF_GPS_NEW;
-
-	if(WO_SDK.ctrl_enabled)  LL_1khz_control_input.system_flags|=SF_HL_CONTROL_ENABLED|SF_NEW_SDK;
-	else LL_1khz_control_input.system_flags&=~(SF_HL_CONTROL_ENABLED|SF_NEW_SDK);
-
-	if(WO_SDK.disable_motor_onoff_by_stick) LL_1khz_control_input.system_flags|=SF_SDK_DISABLE_MOTORONOFF_BY_STICK;
-	else LL_1khz_control_input.system_flags&=~SF_SDK_DISABLE_MOTORONOFF_BY_STICK;
-
-	if(WO_SDK.ctrl_mode==0x00) //direct individual motor control
-	{
-		LL_1khz_control_input.system_flags|=SF_DIRECT_MOTOR_CONTROL_INDIVIDUAL;
-		for(i=0;i<8;i++)
-		{
-			LL_1khz_control_input.direct_motor_control[i]=WO_Direct_Individual_Motor_Control.motor[i];
-		}
-	}
-	else if(WO_SDK.ctrl_mode==0x01) //direct motor control with standard output mapping
-	{
-		LL_1khz_control_input.system_flags|=SF_DIRECT_MOTOR_CONTROL;
-		LL_1khz_control_input.direct_motor_control[0]=WO_Direct_Motor_Control.pitch;
-		LL_1khz_control_input.direct_motor_control[1]=WO_Direct_Motor_Control.roll;
-		LL_1khz_control_input.direct_motor_control[2]=WO_Direct_Motor_Control.yaw;
-		LL_1khz_control_input.direct_motor_control[3]=WO_Direct_Motor_Control.thrust;
-	}
-	else if (WO_SDK.ctrl_mode==0x02) //attitude control
-	{
-		LL_1khz_control_input.system_flags&=~(SF_DIRECT_MOTOR_CONTROL|SF_DIRECT_MOTOR_CONTROL_INDIVIDUAL|SF_WAYPOINT_MODE); //no additional system flag => attitude control is "standard mode"
-		LL_1khz_control_input.ctrl_flags=WO_CTRL_Input.ctrl;
-		LL_1khz_control_input.pitch=WO_CTRL_Input.pitch;
-		LL_1khz_control_input.roll=WO_CTRL_Input.roll;
-		LL_1khz_control_input.yaw=WO_CTRL_Input.yaw;
-		LL_1khz_control_input.thrust=WO_CTRL_Input.thrust;
-	}
-	else if (WO_SDK.ctrl_mode==0x03) //gps waypoint control
-	{
-			LL_1khz_control_input.system_flags|=SF_WAYPOINT_MODE;
-
-			//check if new command should be send
-
-			if (wpCtrlWpCmdUpdated)
-			{
-
-				if (wpCtrlWpCmd==WP_CMD_SINGLE_WP)
-				{
-					if (wpCtrlWpCmdUpdated==1)
-					{
-						LL_1khz_control_input.ctrl_flags&=0x00FF;
-						LL_1khz_control_input.ctrl_flags|=WP_CMD_SINGLE_WP_PART1<<8;
-
-						LL_1khz_control_input.pitch=wpToLL.X&0xFFFF;
-						LL_1khz_control_input.roll=wpToLL.X>>16;
-						LL_1khz_control_input.thrust=wpToLL.Y&0xFFFF;
-						LL_1khz_control_input.yaw=wpToLL.Y>>16;
-						LL_1khz_control_input.direct_motor_control[0]=wpToLL.height;
-						LL_1khz_control_input.direct_motor_control[1]=wpToLL.height>>8;
-						LL_1khz_control_input.direct_motor_control[2]=wpToLL.height>>16;
-						LL_1khz_control_input.direct_motor_control[3]=wpToLL.height>>24;
-						LL_1khz_control_input.direct_motor_control[4]=wpToLL.yaw;
-						LL_1khz_control_input.direct_motor_control[5]=wpToLL.yaw>>8;
-						LL_1khz_control_input.direct_motor_control[6]=wpToLL.yaw>>16;
-						LL_1khz_control_input.direct_motor_control[7]=wpToLL.yaw>>24;
-
-						wpCtrlWpCmdUpdated++;
-					}else if (wpCtrlWpCmdUpdated==2)
-					{
-						LL_1khz_control_input.ctrl_flags&=0x00FF;
-						LL_1khz_control_input.ctrl_flags|=WP_CMD_SINGLE_WP_PART2<<8;
-
-						LL_1khz_control_input.pitch=wpToLL.time;
-						LL_1khz_control_input.roll=0; //wpToLL.cam_angle_pitch;
-						LL_1khz_control_input.thrust=wpToLL.pos_acc;
-						LL_1khz_control_input.yaw=wpToLL.chksum;
-						LL_1khz_control_input.direct_motor_control[0]=0; //wpToLL.cam_angle_roll;
-						LL_1khz_control_input.direct_motor_control[1]=wpToLL.max_speed;
-						LL_1khz_control_input.direct_motor_control[2]=wpToLL.properties;
-						LL_1khz_control_input.direct_motor_control[3]=wpToLL.wp_activated;
-						LL_1khz_control_input.direct_motor_control[4]=0;
-						LL_1khz_control_input.direct_motor_control[5]=0;
-						LL_1khz_control_input.direct_motor_control[6]=0;
-						LL_1khz_control_input.direct_motor_control[7]=0;
-						wpCtrlWpCmdUpdated=0;
-						wpCtrlNavStatus=0;
-					}
-				}else
-				{
-						LL_1khz_control_input.ctrl_flags&=0x00FF;
-						LL_1khz_control_input.ctrl_flags|=wpCtrlWpCmd<<8;
-					wpCtrlWpCmdUpdated=0;
-				}
-			}else
-			{
-				LL_1khz_control_input.ctrl_flags&=0x00FF;
-			}
-	}
-	else LL_1khz_control_input.system_flags&=~(SF_DIRECT_MOTOR_CONTROL|SF_DIRECT_MOTOR_CONTROL_INDIVIDUAL|SF_WAYPOINT_MODE);
-
-	if(pageselect==0)
-	{
-		//fill struct with 500Hz data
-		LL_1khz_control_input.latitude=GPS_Data.latitude;
-		LL_1khz_control_input.longitude=GPS_Data.longitude;
-		LL_1khz_control_input.height=GPS_Data.height;
-		LL_1khz_control_input.speed_x=GPS_Data.speed_x;
-		LL_1khz_control_input.speed_y=GPS_Data.speed_y;
-		LL_1khz_control_input.heading=GPS_Data.heading;
-		LL_1khz_control_input.status=GPS_Data.status;
-
-		//write data
-		LL_write_ctrl_data(pageselect);
-		//set pageselect to other page for next cycle
-		pageselect=1;
-	}
-	else //pageselect=1
-	{
-		//fill struct with 500Hz data
-		LL_1khz_control_input.hor_accuracy=GPS_Data.horizontal_accuracy;
-		LL_1khz_control_input.vert_accuracy=GPS_Data.vertical_accuracy;
-		LL_1khz_control_input.speed_accuracy=GPS_Data.speed_accuracy;
-		LL_1khz_control_input.numSV=GPS_Data.numSV;
-		LL_1khz_control_input.battery_voltage_1=HL_Status.battery_voltage_1;
-		LL_1khz_control_input.battery_voltage_2=HL_Status.battery_voltage_2;
-		if (declinationAvailable==1)
-		{
-			declinationAvailable=2;
-			LL_1khz_control_input.slowDataChannelSelect=SDC_DECLINATION;
-			LL_1khz_control_input.slowDataChannelDataShort=estimatedDeclination;
-
-		}
-		else if (declinationAvailable==2)
-		{
-			declinationAvailable=3;
-			LL_1khz_control_input.slowDataChannelSelect=SDC_INCLINATION;
-			LL_1khz_control_input.slowDataChannelDataShort=estimatedInclination;
-
-		}
-		else
-		{
-			LL_1khz_control_input.slowDataChannelDataShort=0;
-			LL_1khz_control_input.slowDataChannelSelect=0;
-			LL_1khz_control_input.slowDataChannelDataChar=0;
-		}
-
-
-		//write data
-		LL_write_ctrl_data(pageselect);
-		//set pageselect to other page for next cycle
-		pageselect=0;
-	}
-	return(1);
-}
-
-void LL_write_ctrl_data(char page)
-{
-	unsigned int i;
-	unsigned char *dataptr;
-	static volatile short spi_chksum;
-
-	dataptr=(unsigned char *)&LL_1khz_control_input;
-
-	//initialize syncbytes
-	SPIWRData[0]='>';
-	SPIWRData[1]='*';
-
-	spi_chksum=0xAAAA;
-
-	if(!page)
-	{
-		for(i=2;i<40;i++)
-		{
-			SPIWRData[i]=*dataptr++;
-			spi_chksum+=SPIWRData[i];
-		}
-	}
-	else
-	{
-		for(i=2;i<22;i++)
-		{
-			SPIWRData[i]=*dataptr++;
-			spi_chksum+=SPIWRData[i];
-		}
-		dataptr+=18;
-		for(i=22;i<40;i++)
-		{
-			SPIWRData[i]=*dataptr++;
-			spi_chksum+=SPIWRData[i];
-		}
-	}
-
-	SPIWRData[40]=spi_chksum;		//chksum LSB
-	SPIWRData[41]=(spi_chksum>>8);	//chksum MSB
-
-	SPIWR_num_bytes=42;
-	data_sent_to_LL=0;
-}
-
-
-inline void SSP_rx_handler_HL(unsigned char SPI_rxdata)	//rx_handler @ high-level processor
-{
-	static volatile unsigned char SPI_syncstate=0;
-	static volatile unsigned char SPI_rxcount=0;
-	static volatile unsigned char *SPI_rxptr;
-	static volatile unsigned char incoming_page;
-
-        //receive handler
-        if (SPI_syncstate==0)
-		{
-			if (SPI_rxdata=='>') SPI_syncstate++; else SPI_syncstate=0;
-		}
-		else if (SPI_syncstate==1)
-		{
-			if (SPI_rxdata=='*')
-			{
-				SPI_syncstate++;
-				SPI_rxptr=(unsigned char *)&LL_1khz_attitude_data;
-				SPI_rxcount=40;
-			}
-			else SPI_syncstate=0;
-		}
-		else if (SPI_syncstate==2)
-		{
-			if(SPI_rxcount==26) //14 bytes transmitted => select 500Hz page
-			{
-				incoming_page=LL_1khz_attitude_data.system_flags&0x03;	//system flags were already received
-				if(incoming_page==1) SPI_rxptr+=26;
-				else if(incoming_page==2) SPI_rxptr+=52;
-			}
-			SPI_rxcount--;
-			*SPI_rxptr=SPI_rxdata;
-			SPI_rxptr++;
-			if (SPI_rxcount==0)
-        	{
-             	SPI_syncstate++;
-        	}
-		}
-		else if (SPI_syncstate==3)
-		{
-			if(SPI_rxdata=='<')	//last byte ok => data should be valid
-			{
-				SSP_data_distribution_HL();	//only distribute data to other structs, if it was received correctly
-											//ack data receiption
-			}
-			SPI_syncstate=0;
-		}
-		else SPI_syncstate=0;
-}
-
-
-
-/* old file
-#include "main.h"
-#include "LL_HL_comm.h"
-#include "system.h"
-#include "gpsmath.h"
-#include "sdk.h"
-
-unsigned short SSP_ack=0;
-extern char SPIWRData[128];
-extern char data_sent_to_LL;
-extern unsigned int SPIWR_num_bytes;
-
-struct LL_ATTITUDE_DATA LL_1khz_attitude_data;
-struct LL_CONTROL_INPUT LL_1khz_control_input;
-
-void SSP_data_distribution_HL(void)
-{
-	unsigned char i;
-	unsigned char current_page=LL_1khz_attitude_data.system_flags&0x03;
-
-	if(LL_1khz_attitude_data.system_flags&SF_GPS_NEW) gpsDataOkTrigger=0;
-
-	IMU_CalcData.angle_nick=LL_1khz_attitude_data.angle_pitch*10;
-	IMU_CalcData.angle_roll=LL_1khz_attitude_data.angle_roll*10;
-	IMU_CalcData.angle_yaw=LL_1khz_attitude_data.angle_yaw*10;
-
-	IMU_CalcData.angvel_nick=LL_1khz_attitude_data.angvel_pitch;
-	IMU_CalcData.angvel_roll=LL_1khz_attitude_data.angvel_roll;
-	IMU_CalcData.angvel_yaw=LL_1khz_attitude_data.angvel_yaw;
-
-	if(!current_page)	//page 0
-	{
-		for(i=0;i<8;i++)
-		{
-			RO_RC_Data.channel[i]=LL_1khz_attitude_data.RC_data[i]*16;
-		}
-		IMU_CalcData.acc_x_calib=LL_1khz_attitude_data.acc_x*10;
-		IMU_CalcData.acc_y_calib=LL_1khz_attitude_data.acc_y*10;
-		IMU_CalcData.acc_z_calib=LL_1khz_attitude_data.acc_z*10;
-	}
-	else if(current_page==1)	//page 1
-	{
-		IMU_CalcData.height=LL_1khz_attitude_data.height;
-		IMU_CalcData.dheight=LL_1khz_attitude_data.dheight;
-	}
-	else if(current_page==2)
-	{
-		IMU_CalcData.Hx=LL_1khz_attitude_data.mag_x;
-		IMU_CalcData.Hy=LL_1khz_attitude_data.mag_y;
-		IMU_CalcData.Hz=LL_1khz_attitude_data.mag_z;
-	}
-}
-
-int HL2LL_write_cycle(void)	//write data to low-level processor
-{
-	static char pageselect=0;
-
-	if(!data_sent_to_LL) return(0);
-
-	//update 1kHz data
-	LL_1khz_control_input.system_flags=0|pageselect;
-	//SSP_ack=0;	//reset ack
-
-	if(gpsDataOkTrigger) LL_1khz_control_input.system_flags|=SF_GPS_NEW;
-
-#ifndef FALCON
-	if(WO_SDK.ctrl_enabled)  LL_1khz_control_input.system_flags|=SF_HL_CONTROL_ENABLED;
-	else LL_1khz_control_input.system_flags&=~SF_HL_CONTROL_ENABLED;
-
-	if(WO_SDK.ctrl_mode==0x01) LL_1khz_control_input.system_flags|=SF_DIRECT_MOTOR_CONTROL;
-	else LL_1khz_control_input.system_flags&=~SF_DIRECT_MOTOR_CONTROL;
-#else //Disable Control Input if system is a FALCON
-	LL_1khz_control_input.system_flags&=~SF_HL_CONTROL_ENABLED;
-	LL_1khz_control_input.system_flags&=~SF_DIRECT_MOTOR_CONTROL;
-#endif
-
-
-
-	LL_1khz_control_input.ctrl_flags=WO_CTRL_Input.ctrl;
-	LL_1khz_control_input.pitch=WO_CTRL_Input.pitch;
-	LL_1khz_control_input.roll=WO_CTRL_Input.roll;
-	LL_1khz_control_input.yaw=WO_CTRL_Input.yaw;
-	LL_1khz_control_input.thrust=WO_CTRL_Input.thrust;
-
-	if(WO_SDK.ctrl_mode==0x01)
-	{
-		LL_1khz_control_input.direct_motor_control[0]=WO_Direct_Motor_Control.pitch;
-		LL_1khz_control_input.direct_motor_control[1]=WO_Direct_Motor_Control.roll;
-		LL_1khz_control_input.direct_motor_control[2]=WO_Direct_Motor_Control.yaw;
-		LL_1khz_control_input.direct_motor_control[3]=WO_Direct_Motor_Control.thrust;
-	}
-
-//	for(i=0;i<8;i++)
-//	{
-//		LL_1khz_control_input.direct_motor_control[i]=0;
-//	}
-
-	if(pageselect==0)
-	{
-		//fill struct with 500Hz data
-		LL_1khz_control_input.latitude=GPS_Data.latitude;
-		LL_1khz_control_input.longitude=GPS_Data.longitude;
-		LL_1khz_control_input.height=GPS_Data.height;
-		LL_1khz_control_input.speed_x=GPS_Data.speed_x;
-		LL_1khz_control_input.speed_y=GPS_Data.speed_y;
-		LL_1khz_control_input.heading=GPS_Data.heading;
-		LL_1khz_control_input.status=GPS_Data.status;
-
-		//write data
-		LL_write_ctrl_data(pageselect);
-		//set pageselect to other page for next cycle
-		pageselect=1;
-	}
-	else //pageselect=1
-	{
-		//fill struct with 500Hz data
-		LL_1khz_control_input.hor_accuracy=GPS_Data.horizontal_accuracy;
-		LL_1khz_control_input.vert_accuracy=GPS_Data.vertical_accuracy;
-		LL_1khz_control_input.speed_accuracy=GPS_Data.speed_accuracy;
-		LL_1khz_control_input.numSV=GPS_Data.numSV;
-		LL_1khz_control_input.battery_voltage_1=HL_Status.battery_voltage_1;
-		LL_1khz_control_input.battery_voltage_2=HL_Status.battery_voltage_2;
-		LL_1khz_control_input.dummy_500Hz_2=0;
-		LL_1khz_control_input.dummy_500Hz_3=0;
-
-		//write data
-		LL_write_ctrl_data(pageselect);
-		//set pageselect to other page for next cycle
-		pageselect=0;
-	}
-	return(1);
-}
-
-void LL_write_ctrl_data(char page)
-{
-	unsigned int i;
-	unsigned char *dataptr;
-	static volatile short spi_chksum;
-
-	dataptr=(unsigned char *)&LL_1khz_control_input;
-
-	//initialize syncbytes
-	SPIWRData[0]='>';
-	SPIWRData[1]='*';
-
-	spi_chksum=0xAAAA;
-
-	if(!page)
-	{
-		for(i=2;i<40;i++)
-		{
-			SPIWRData[i]=*dataptr++;
-			spi_chksum+=SPIWRData[i];
-		}
-	}
-	else
-	{
-		for(i=2;i<22;i++)
-		{
-			SPIWRData[i]=*dataptr++;
-			spi_chksum+=SPIWRData[i];
-		}
-		dataptr+=18;
-		for(i=22;i<40;i++)
-		{
-			SPIWRData[i]=*dataptr++;
-			spi_chksum+=SPIWRData[i];
-		}
-	}
-
-	SPIWRData[40]=spi_chksum;		//chksum LSB
-	SPIWRData[41]=(spi_chksum>>8);	//chksum MSB
-
-	SPIWR_num_bytes=42;
-	data_sent_to_LL=0;
-}
-
-
-inline void SSP_rx_handler_HL(unsigned char SPI_rxdata)	//rx_handler @ high-level processor
-{
-	static volatile unsigned char SPI_syncstate=0;
-	static volatile unsigned char SPI_rxcount=0;
-	static volatile unsigned char *SPI_rxptr;
-	static volatile unsigned char incoming_page;
-
-        //receive handler
-        if (SPI_syncstate==0)
-		{
-			if (SPI_rxdata=='>') SPI_syncstate++; else SPI_syncstate=0;
-		}
-		else if (SPI_syncstate==1)
-		{
-			if (SPI_rxdata=='*')
-			{
-				SPI_syncstate++;
-				SPI_rxptr=(unsigned char *)&LL_1khz_attitude_data;
-				SPI_rxcount=40;
-			}
-			else SPI_syncstate=0;
-		}
-		else if (SPI_syncstate==2)
-		{
-			if(SPI_rxcount==26) //14 bytes transmitted => select 500Hz page
-			{
-				incoming_page=LL_1khz_attitude_data.system_flags&0x03;	//system flags were already received
-				if(incoming_page==1) SPI_rxptr+=26;
-				else if(incoming_page==2) SPI_rxptr+=52;
-			}
-			SPI_rxcount--;
-			*SPI_rxptr=SPI_rxdata;
-			SPI_rxptr++;
-			if (SPI_rxcount==0)
-        	{
-             	SPI_syncstate++;
-        	}
-		}
-		else if (SPI_syncstate==3)
-		{
-			if(SPI_rxdata=='<')	//last byte ok => data should be valid
-			{
-				SSP_data_distribution_HL();	//only distribute data to other structs, if it was received correctly
-											//ack data receiption
-			}
-			SPI_syncstate=0;
-		}
-		else SPI_syncstate=0;
-}
-end old file */
diff --git a/ccny_asctec_firmware_2/src/LPC2k_ee.c b/ccny_asctec_firmware_2/src/LPC2k_ee.c
deleted file mode 100644
index 8551b3c..0000000
--- a/ccny_asctec_firmware_2/src/LPC2k_ee.c
+++ /dev/null
@@ -1,374 +0,0 @@
-/****************************************************************************************/
-/*                                                                            			*/
-/*  LPC2k_ee.C:  basic LPC213x EEPROM routines (rev 1.1, Jan 27th, 2006.)				*/
-/*                                                                            			*/
-/* Functions provided here:																*/
-/*   	                                                    		                    */
-/* ee_erase(command_ee, result_ee[]):	erases all EEPROM								*/
-/* ee_write(command_ee, result_ee[]):	writes record of ee_data (defined in LPC2k_ee.h)*/
-/* ee_read(command_ee, result_ee[]) :	reads the last record added into EEPROM			*/
-/* ee_readn(command_ee, result_ee[]):	reads the n-th record in EEPROM					*/
-/* ee_count(command_ee, result_ee[]):	counts records of ee_data type in EEPROM		*/
-/*			   	                                                                        */
-/****************************************************************************************/
-
-#include "LPC214x.h"
-#define _EEPROM_
-#include "LPC2k_ee.h"					/* LPC2000 EEPROM definitions */
-#undef _EEPROM_
-#define IAP_LOCATION 			0x7ffffff1
-
-//const unsigned char eeprom[EE_SIZE] _at_ EE_ADDR_L;
-void ee_erase(unsigned int ,unsigned int[]);	//function erases EEPROM
-void ee_write(unsigned int ,unsigned int[]);	//function adds a record in EEPROM
-void ee_read (unsigned int ,unsigned int[]);	//function reads the latest valid record in EEPROM
-void ee_count(unsigned int ,unsigned int[]);	//function counts records in EEPROM
-void ee_readn(unsigned int ,unsigned int[]);	//function reads n-th record in EEPROM
-int ee_locate(void);							   	//function locates the next available location
-
-typedef void (*IAP)(unsigned int [],unsigned int[]);
-IAP iap_entry;
-
-/************************************************************************/
-/*                                                                    	*/
-/* function: 															*/
-/*  void ee_erase(unsigned int command_ee,unsigned int result_ee[])		*/
-/*                                                                     	*/
-/* type: void                                                          	*/
-/*                                                                     	*/
-/* parameters: 															*/
-/* 	command_ee   - Not used.  	                              			*/
-/*  result_ee[0] - Returns a response to the last IAP command used.		*/
-/*                 0 - EEPROM successfully erased.						*/
-/*                 For all other response values, see microcontroller 	*/
-/*				   User Manual, IAP Commands and Status Codes Summary.	*/
-/*  result_ee[1] - Not used.  	                              			*/
-/*                                                                     	*/
-/* version: 1.1 (01/27/2006)                                           	*/
-/*                                                                     	*/
-/* constants defined in LPC2k_ee.h used in this function:              	*/
-/*  EE_SEC_L 	 - microcontroller's Flash sector where EEPROM begins	*/
-/*  EE_SEC_H 	 - microcontroller's Flash sector where EEPROM ends		*/
-/*  EE_CCLK		 - microcontroller's system clock (cclk)                */
-/*                                                                     	*/
-/* description:															*/
-/*  This function erases LPC2000 on-chip Flash sectors selected to act 	*/
-/*  as an EEPROM. All Flash sectors between EE_SEC_L abd EE_SEC_H		*/
-/*  (including these sectors) will be erased using the In Application	*/
-/*  Programming (IAP) routines (see User Manual for more details). 		*/
-/*  Also, this function disables all interrupts while erasing the       */
-/*  EEPROM. If this is not needed, three lines of the ee_erase          */
-/*  subroutine can simply be commented-out without affecting the        */
-/*  routine performance at all.                                         */
-/*                                                                     	*/
-/* revision history:                                                   	*/
-/* - Rev. 1.1 adds interrupt disable feature.							*/
-/*                                                                     	*/
-/************************************************************************/
-void ee_erase(unsigned int command_ee,unsigned int result_ee[]){
-	unsigned int command_iap[5];
-	unsigned int result_iap[3];
-	unsigned long int enabled_interrupts;
-
-	enabled_interrupts = VICIntEnable;  //disable all interrupts
-	VICIntEnClr        = enabled_interrupts;
-
-	command_iap[0]=50;					//prepare sectors from EE_SEC_L to EE_SEC_H for erase
-	command_iap[1]=EE_SEC_L;
-	command_iap[2]=EE_SEC_H;
-	iap_entry=(IAP) IAP_LOCATION;
-	iap_entry(command_iap,result_iap);
-
-	command_iap[0]=52;					//erase sectors from EE_SEC_L to EE_SEC_H
-	command_iap[1]=EE_SEC_L;
-	command_iap[2]=EE_SEC_H;
-	command_iap[3]=EE_CCLK;
-	iap_entry=(IAP) IAP_LOCATION;
-	iap_entry(command_iap,result_iap);
-
-	command_iap[0]=53;					//blankcheck sectors from EE_SEC_L to EE_SEC_H
-	command_iap[1]=EE_SEC_L;
-	command_iap[2]=EE_SEC_H;
-	iap_entry=(IAP) IAP_LOCATION;
-	iap_entry(command_iap,result_iap);
-
-	VICIntEnable = enabled_interrupts;  //restore interrupt enable register
-
-	result_ee[0]=result_iap[0];
-	return;
-}
-
-/************************************************************************/
-/*                                                                    	*/
-/* function: 															*/
-/*  void ee_write(unsigned int command_ee,unsigned int result_ee[])		*/
-/*                                                                     	*/
-/* type: void                                                          	*/
-/*                                                                     	*/
-/* parameters: 															*/
-/* 	command_ee   - An address of a content of ee_data type that has		*/
-/*                 to be programmed into EEPROM.                       	*/
-/*  result_ee[0] - Returns a response to the last IAP command used.		*/
-/*                 0 - data successfully programmed in EEPROM.			*/
-/*               501 - no space in EEPROM to program data.             	*/
-/*                 For all other response values, see microcontroller 	*/
-/*				   User Manual, IAP Commands and Status Codes Summary.	*/
-/*  result_ee[1] - Not used.  	                              			*/
-/*                                                                     	*/
-/* version: 1.1 (01/27/2006)                                           	*/
-/*                                                                     	*/
-/* constants defined in LPC2k_ee.h used in this function:              	*/
-/*  EE_BUFFER_SIZE 	   - IAP buffer size; must be 256 or 512 			*/
-/*  NO_SPACE_IN_EEPROM - EEPROM is full and no data can be programmed	*/
-/*  EE_BUFFER_MASK	   - parameter used for interfacing with IAP		*/
-/*  EE_REC_SIZE   	   - ee_data structure size in bytes        		*/
-/*  EE_SEC_L 	 	   - micro's Flash sector where EEPROM begins		*/
-/*  EE_SEC_H 	 	   - micro's Flash sector where EEPROM ends			*/
-/*  EE_CCLK		 	   - micro's system clock (cclk)                	*/
-/*                                                                     	*/
-/* description:															*/
-/*  This function writes a single structure of ee_data type into the	*/
-/*  EEPROM using an In Application	Programming (IAP) routines (see 	*/
-/*  User Manual for more details). command_ee contains an address of	*/
-/*  this structure. EEPROM is scanned for the last (if any) record 		*/
-/*  identifier (EE_REC_ID), and a new record is added next to it.      	*/
-/*  Also, this function disables all interrupts while erasing the       */
-/*  EEPROM. If this is not needed, three lines of the ee_write          */
-/*  subroutine can simply be commented-out without affecting the        */
-/*  routine performance at all.                                         */
-/*                                                                     	*/
-/* revision history:                                                   	*/
-/* - Rev. 1.1 fixes a bug related to verifying a content written into	*/
-/*   the EEPROM. 1.0 was reporting missmatch even when there were no	*/
-/*   problems at all.													*/
-/*   Rev. 1.1 adds interrupt disable feature.							*/
-/*                                                                     	*/
-/************************************************************************/
-void ee_write(unsigned int command_ee,unsigned int result_ee[]){
-	int location;
-	unsigned int *source, *destination, i;
-	unsigned char ee_buffer[EE_BUFFER_SIZE];
-	unsigned int command_iap[5], result_iap[3];
-	unsigned long int enabled_interrupts;
-
-	location = ee_locate();
-	if (location == -1){
-		result_ee[0]=NO_SPACE_IN_EEPROM;
-	}
-	else{
-		for (i=0;i<EE_BUFFER_SIZE;i++) ee_buffer[i]=0xFF;
-
-		destination = (unsigned int *) ((&ee_buffer[0])+((unsigned int)location & EE_BUFFER_MASK));
-		source = (unsigned int *) command_ee;
-		for(i=0;i!=EE_REC_SIZE/4;i++) *(destination+i) = *(source+i);
-
-		enabled_interrupts = VICIntEnable;  //disable all interrupts
-		VICIntEnClr        = enabled_interrupts;
-
-		command_iap[0]=50;					//prepare sectors from EE_SEC_L to EE_SEC_H for erase
-		command_iap[1]=EE_SEC_L;
-		command_iap[2]=EE_SEC_H;
-		iap_entry=(IAP) IAP_LOCATION;
-		iap_entry(command_iap,result_iap);
-
-		command_iap[0]=51;					//copy RAM to flash/eeprom
-		command_iap[1]=(unsigned int) (location & EE_START_MASK);
-		command_iap[2]=(unsigned int) (&ee_buffer[0]);
-		command_iap[3]=EE_BUFFER_SIZE;
-		command_iap[4]=EE_CCLK;
-		iap_entry=(IAP) IAP_LOCATION;
-		iap_entry(command_iap,result_iap);
-
-		command_iap[0]=56;					//compare RAM and flash/eeprom
-		command_iap[1]=(unsigned int) source;
-		command_iap[2]=(unsigned int) location;
-		command_iap[3]=EE_REC_SIZE;
-		iap_entry=(IAP) IAP_LOCATION;
-		iap_entry(command_iap,result_iap);
-
-		VICIntEnable = enabled_interrupts;  //restore interrupt enable register
-
-		result_ee[0]=result_iap[0];
-	}
-	return;
-}
-
-/************************************************************************/
-/*                                                                    	*/
-/* function: 															*/
-/*  void ee_read(unsigned int command_ee,unsigned int result_ee[])		*/
-/*                                                                     	*/
-/* type: void                                                          	*/
-/*                                                                     	*/
-/* parameters: 															*/
-/* 	command_ee   - Not used.											*/
-/*  result_ee[0] - Returns a response.									*/
-/*                 0 - data successfully found in EEPROM.				*/
-/*               500 - no data/records available in EEPROM.				*/
-/*  result_ee[1] - an address of the last record of ee_data type		*/
-/*				   in EEPROM.  	                              			*/
-/*                                                                     	*/
-/* version: 1.1 (01/27/2006)                                           	*/
-/*                                                                     	*/
-/* constants defined in LPC2k_ee.h used in this function:              	*/
-/*  NO_RECORDS_AVAILABLE - EEPROM is empty/no records identifiable		*/
-/*						   with a record identifier (EE_REC_ID) found	*/
-/*  EE_ADR_L 	 	   - micro's Flash address from where EEPROM begins	*/
-/*  EE_REC_SIZE 	   - size (in bytes) of a ee_data structure        	*/
-/*                                                                     	*/
-/* description:															*/
-/*  This function scans an EEPROM content looking for the last record 	*/
-/*  that can be identified with a record identifier (EE_REC_ID). When 	*/
-/*  such data is found, its address is passed as result_ee[1].			*/
-/*                                                                     	*/
-/* revision history:                                                   	*/
-/* - Rev. 1.0 had problems with accessing the last record in a fully	*/
-/*   occupied EEPROM. Rev. 1.1 fixes this.								*/
-/*                                                                     	*/
-/************************************************************************/
-void ee_read(unsigned int command_ee,unsigned int result_ee[]){
-	int location;
-
-	location = ee_locate();
-	if (location == EE_ADDR_L){
-		result_ee[0]=NO_RECORDS_AVAILABLE;
-	}
-	else{
-		result_ee[0]=0;
-		if (location == -1)
-			result_ee[1]=(unsigned int)(EE_ADDR_H+1 - EE_REC_SIZE);
-		else
-			result_ee[1]=(unsigned int)(location - EE_REC_SIZE);
-	}
-	return;
-}
-
-/************************************************************************/
-/*                                                                    	*/
-/* function: 															*/
-/*  void ee_readn(unsigned int command_ee,unsigned int result_ee[])		*/
-/*                                                                     	*/
-/* type: void                                                          	*/
-/*                                                                     	*/
-/* parameters: 															*/
-/* 	command_ee   - An index of a record in EEPROM that should be read.	*/
-/*  result_ee[0] - Returns a response.									*/
-/*                 0 - data successfully found in EEPROM.				*/
-/*               502 - requested index of record in EEPROM is out of 	*/
-/*                     EEPROM's memory.                                	*/
-/*  result_ee[1] - an address of the specified record of ee_data type	*/
-/*				   in EEPROM.  	                              			*/
-/*                                                                     	*/
-/* version: 1.0 (initial release 05/13/2005)                           	*/
-/*                                                                     	*/
-/* constants defined in LPC2k_ee.h used in this function:              	*/
-/*  INDEX_OUT_OF_RANGE - index of a record in EEPROM specified by 		*/
-/*						 command_ee is out of EEPROM's range			*/
-/*  EE_ADR_L 	 	   - micro's Flash address from where EEPROM begins	*/
-/*  EE_ADR_H 	 	   - micro's Flash address where EEPROM ends		*/
-/*  EE_REC_SIZE 	   - size (in bytes) of a ee_data structure        	*/
-/*                                                                     	*/
-/* description:															*/
-/*  This function returns in result_ee[1] an address of an EEPROM 		*/
-/*  record index specified in command_ee. Index can not be less than 0.	*/
-/*                                                                     	*/
-/************************************************************************/
-void ee_readn(unsigned int command_ee,unsigned int result_ee[]){
-	if(command_ee>((EE_ADDR_H+1-EE_ADDR_L)/EE_REC_SIZE)){
-		result_ee[0]=INDEX_OUT_OF_RANGE;}
-	else{
-		result_ee[0]=0;
-		result_ee[1]=(unsigned int)(EE_ADDR_L+EE_REC_SIZE*command_ee);
-	}
-	return;
-}
-
-/************************************************************************/
-/*                                                                    	*/
-/* function: 															*/
-/*  void ee_count(unsigned int command_ee,unsigned int result_ee[])		*/
-/*                                                                     	*/
-/* type: void                                                          	*/
-/*                                                                     	*/
-/* parameters: 															*/
-/* 	command_ee   - Not used.											*/
-/*  result_ee[0] - Returns a response. Always 0.						*/
-/*  result_ee[1] - number of records of ee_data type in EEPROM.			*/
-/*                                                                     	*/
-/* version: 1.1 (01/27/2006)                                           	*/
-/*                                                                     	*/
-/* constants defined in LPC2k_ee.h used in this function:              	*/
-/*  EE_ADR_L 	 	   - micro's Flash address from where EEPROM begins	*/
-/*  EE_REC_SIZE 	   - size (in bytes) of a ee_data structure        	*/
-/*                                                                     	*/
-/* description:															*/
-/*  This function returns number of records of ee_data type in EEPROM.	*/
-/*                                                                     	*/
-/* revision history:                                                   	*/
-/* - Initial release (1.0) was not supplying the right feedback in case */
-/*   of counting records in a full EEPROM. Rev. 1.1 fixes this.         */
-/*                                                                     	*/
-/************************************************************************/
-void ee_count(unsigned int command_ee,unsigned int result_ee[]){
-	int location;
-	result_ee[0]=0;
-	location = ee_locate();
-	if (location == -1) location = EE_ADDR_H+1;
-	result_ee[1]=(unsigned int)((location-EE_ADDR_L)/EE_REC_SIZE);
-	return;
-}
-
-/************************************************************************/
-/*                                                                    	*/
-/* function: 															*/
-/*  void ee_locate()													*/
-/*                                                                     	*/
-/* type: int                                                          	*/
-/*                                                                     	*/
-/* parameters: none														*/
-/*                                                                     	*/
-/* version: 1.1 (01/27/2006)                                           	*/
-/*                                                                     	*/
-/* constants defined in LPC2k_ee.h used in this function:              	*/
-/*  EE_ADR_L 	 	   - micro's Flash address from where EEPROM begins	*/
-/*  EE_ADR_H 	 	   - micro's Flash address where EEPROM ends		*/
-/*  EE_REC_ID 	 	   - a record indicator used to identify valid data	*/
-/*  EE_REC_SIZE 	   - size (in bytes) of a ee_data structure        	*/
-/*                                                                     	*/
-/* description:															*/
-/*  This function returns an address as of which new record can be 		*/
-/*	added into Flash/EEPROM. In case of EEPROM being full, function     */
-/*  returns -1. Searching is based on divide by two method that         */
-/*  provides the fastest processing time.                               */
-/*                                                                     	*/
-/* revision history:                                                   	*/
-/* - Rev. 1.1 fixes a bug related to identifying an unused byte of 		*/
-/*   EEPROM in an EEPROM with size not equal to EE_REC_SIZE * 2^k (k>=0)*/
-/*                                                                     	*/
-/************************************************************************/
-int ee_locate(void){
-	unsigned int addr_l, addr_m, addr_r, size, slice_limit;
-	addr_l = EE_ADDR_L;
-	if ((*((unsigned char *)addr_l))==0xFF) return(addr_l);
-	addr_r = EE_ADDR_H+1;
-	if ((*((unsigned char *)(addr_r-EE_REC_SIZE)))==EE_REC_ID) return(-1);
-	size = addr_r - addr_l;
-	slice_limit = EE_REC_SIZE - 1;
-	while(size != EE_REC_SIZE){
-		addr_m = (addr_r+addr_l)/2;
-		if ((addr_m & slice_limit)!=0x00000000){
-			if ((*((unsigned char *)(addr_r - EE_REC_SIZE)))==0xFF) 
-				addr_r = addr_r - EE_REC_SIZE;
-			else
-				addr_l = addr_l + EE_REC_SIZE;
-			addr_m = (addr_r+addr_l)/2;
-			size = size - EE_REC_SIZE;
-		}
-		if ((*((unsigned char *)addr_m))==0xFF)
-			addr_r = addr_m;
-		else
-			addr_l = addr_m;
-		size = size/2;
-	}
-	return(addr_r);
-}
diff --git a/ccny_asctec_firmware_2/src/adc.c b/ccny_asctec_firmware_2/src/adc.c
deleted file mode 100644
index eda2d3f..0000000
--- a/ccny_asctec_firmware_2/src/adc.c
+++ /dev/null
@@ -1,361 +0,0 @@
-/*****************************************************************************
- *   adc.c:  ADC module file for Philips LPC214x Family Microprocessors
- *
- *   Copyright(C) 2006, Philips Semiconductor
- *   All rights reserved.
- *
- *   History
- *   2005.10.01  ver 1.00    Prelimnary version, first Release
- *
-******************************************************************************/
-#include "LPC214x.h"                        /* LPC21xx definitions */
-#include "type.h"
-#include "irq.h"
-#include "target.h"
-#include "adc.h"
-
-volatile unsigned int ADC0Value[ADC_NUM], ADC1Value[ADC_NUM];
-volatile unsigned int ADC0IntDone = 0, ADC1IntDone = 0;
-
-#if ADC_INTERRUPT_FLAG
-/******************************************************************************
-** Function name:		ADC0Handler
-**
-** Descriptions:		ADC0 interrupt handler
-**
-** parameters:			None
-** Returned value:		None
-** 
-******************************************************************************/
-void ADC0Handler (void) __irq 
-{
-    unsigned int regVal;
-  
-    IENABLE;			/* handles nested interrupt */
-
-    regVal = AD0STAT;		/* Read ADC will clear the interrupt */
-    if ( regVal & 0x0000FF00 )	/* check OVERRUN error first */
-    {
-	regVal = (regVal & 0x0000FF00) >> 0x08;
-				/* if overrun, just read ADDR to clear */
-				/* regVal variable has been reused. */
-	switch ( regVal )
-	{
-	    case 0x01:
-		regVal = AD0DR0;
-		break;
-	    case 0x02:
-		regVal = AD0DR1;
-		break;
-	    case 0x04:
-		regVal = AD0DR2;
-		break;
-	    case 0x08:
-		regVal = AD0DR3;
-		break;
-	    case 0x10:
-		regVal = AD0DR4;
-		break;
-	    case 0x20:
-		regVal = AD0DR5;
-		break;
-	    case 0x40:
-		regVal = AD0DR6;
-		break;
-	    case 0x80:
-		regVal = AD0DR7;
-		break;
-	    default:
-		break;
-	}
-	AD0CR &= 0xF8FFFFFF;	/* stop ADC now */ 
-	ADC0IntDone = 1;
-	return;	
-    }
-    
-    if ( regVal & ADC_ADINT )
-    {
-	switch ( regVal & 0xFF )	/* check DONE bit */
-	{
-	    case 0x01:
-		ADC0Value[0] = ( AD0DR0 >> 6 ) & 0x3FF;
-		break;
-	    case 0x02:
-		ADC0Value[1] = ( AD0DR1 >> 6 ) & 0x3FF;
-		break;
-	    case 0x04:
-		ADC0Value[2] = ( AD0DR2 >> 6 ) & 0x3FF;
-		break;
-	    case 0x08:
-		ADC0Value[3] = ( AD0DR3 >> 6 ) & 0x3FF;
-		break;
-	    case 0x10:
-		ADC0Value[4] = ( AD0DR4 >> 6 ) & 0x3FF;
-		break;
-	    case 0x20:
-		ADC0Value[5] = ( AD0DR5 >> 6 ) & 0x3FF;
-		break;
-	    case 0x40:
-		ADC0Value[6] = ( AD0DR6 >> 6 ) & 0x3FF;
-		break;
-	    case 0x80:
-		ADC0Value[7] = ( AD0DR7 >> 6 ) & 0x3FF;
-		break;		
-	    default:
-		break;
-	}
-	AD0CR &= 0xF8FFFFFF;	/* stop ADC now */ 
-	ADC0IntDone = 1;
-    }
-
-    IDISABLE;
-    VICVectAddr = 0;		/* Acknowledge Interrupt */
-}
-
-/******************************************************************************
-** Function name:		ADC1Handler
-**
-** Descriptions:		ADC1 interrupt handler
-**
-** parameters:			None
-** Returned value:		None
-** 
-******************************************************************************/
-void ADC1Handler (void) __irq 
-{
-    unsigned int regVal;
-  
-    IENABLE;			/* handles nested interrupt */
-
-    regVal = AD1STAT;		/* Read ADC will clear the interrupt */
-    if ( regVal & 0x0000FF00 )	/* check OVERRUN error first */
-    {
-	regVal = (regVal & 0x0000FF00) >> 0x08;
-				/* if overrun, just read AD1DRx to clear */
-				/* regVal variable has been reused. */
-	switch ( regVal )
-	{
-	    case 0x01:
-		regVal = AD1DR0;
-		break;
-	    case 0x02:
-		regVal = AD1DR1;
-		break;
-	    case 0x04:
-		regVal = AD1DR2;
-		break;
-	    case 0x08:
-		regVal = AD1DR3;
-		break;
-	    case 0x10:
-		regVal = AD1DR4;
-		break;
-	    case 0x20:
-		regVal = AD1DR5;
-		break;
-	    case 0x40:
-		regVal = AD1DR6;
-		break;
-	    case 0x80:
-		regVal = AD1DR7;
-		break;
-	    default:
-		break;
-	}
-	AD1CR &= 0xF8FFFFFF;	/* stop ADC now */ 
-	ADC1IntDone = 1;
-	return;	
-    }
-    
-    if ( regVal & ADC_ADINT )
-    {
-	switch ( regVal & 0xFF )	/* check DONE bit */
-	{
-	    case 0x01:
-		ADC1Value[0] = ( AD1DR0 >> 6 ) & 0x3FF;
-		break;
-	    case 0x02:
-		ADC1Value[1] = ( AD1DR1 >> 6 ) & 0x3FF;
-		break;
-	    case 0x04:
-		ADC1Value[2] = ( AD1DR2 >> 6 ) & 0x3FF;
-		break;
-	    case 0x08:
-		ADC1Value[3] = ( AD1DR3 >> 6 ) & 0x3FF;
-		break;
-	    case 0x10:
-		ADC1Value[4] = ( AD1DR4 >> 6 ) & 0x3FF;
-		break;		
-	    case 0x20:
-		ADC1Value[5] = ( AD1DR5 >> 6 ) & 0x3FF;
-		break;
-	    case 0x40:
-		ADC1Value[6] = ( AD1DR6 >> 6 ) & 0x3FF;
-		break;
-	    case 0x80:
-		ADC1Value[7] = ( AD1DR7 >> 6 ) & 0x3FF;
-		break;		
-	    default:
-		break;
-	}
-	AD1CR &= 0xF8FFFFFF;	/* stop ADC now */ 
-	ADC1IntDone = 1;
-    }
-
-    IDISABLE;
-    VICVectAddr = 0;		/* Acknowledge Interrupt */
-}
-#endif
-
-/*****************************************************************************
-** Function name:		ADCInit
-**
-** Descriptions:		initialize ADC channel
-**
-** parameters:			ADC clock rate
-** Returned value:		true or false
-** 
-*****************************************************************************/
-unsigned int ADCInit( unsigned int ADC_Clk )
-{
-      AD0CR = ( 0x01 << 0 ) | 	// SEL=1,select channel 0, 1 to 4 on ADC0
-	( ( Fpclk / ADC_Clk - 1 ) << 8 ) |  // CLKDIV = Fpclk / 1000000 - 1 
-	( 0 << 16 ) | 		// BURST = 0, no BURST, software controlled
-	( 0 << 17 ) |  		// CLKS = 0, 11 clocks/10 bits 
-	( 1 << 21 ) |  		// PDN = 1, normal operation 
-	( 0 << 22 ) |  		// TEST1:0 = 00 
-	( 0 << 24 ) |  		// START = 0 A/D conversion stops
-	( 0 << 27 );		/* EDGE = 0 (CAP/MAT singal falling,trigger A/D 
-				conversion) */
-    AD1CR = ( 0x01 << 0 ) | 	// SEL=1,select channel 0, 0 to 7 on ADC1
-	( ( Fpclk / ADC_Clk - 1 ) << 8 ) |  // CLKDIV = Fpclk / 1000000 - 1 
-	( 0 << 16 ) | 		// BURST = 0, no BURST, software controlled 
-	( 0 << 17 ) |  		// CLKS = 0, 11 clocks/10 bits 
-	( 1 << 21 ) |  		// PDN = 1, normal operation 
-	( 0 << 22 ) |  		// TEST1:0 = 00 
-	( 0 << 24 ) |  		// START = 0 A/D conversion stops
-	( 0 << 27 );		/* EDGE = 0 (CAP/MAT singal falling,trigger A/D 
-				conversion) */
-
-    /* If POLLING, no need to do the following */
-#if ADC_INTERRUPT_FLAG
-    AD0INTEN = 0x11E;		// Enable all interrupts 
-    AD1INTEN = 0x1FF;
-
-    if ( install_irq( ADC0_INT, (void *)ADC0Handler ) == FALSE )
-    {
-	return (FALSE);
-    }
-    if ( install_irq( ADC1_INT, (void *)ADC1Handler ) == FALSE )
-    {
-	return (FALSE);
-    }
-#endif
-
-    return (TRUE);
-}
-
-/*****************************************************************************
-** Function name:		ADC0Read
-**
-** Descriptions:		Read ADC0 channel
-**
-** parameters:			Channel number
-** Returned value:		Value read, if interrupt driven, return channel #
-** 
-*****************************************************************************/
-unsigned int ADC0Read( unsigned char channelNum )
-{
-#if !ADC_INTERRUPT_FLAG
-    unsigned int regVal, ADC_Data;
-    volatile unsigned int timeout=0;
-#endif
-
-    /* channel number is 0 through 7 */
-    if ( channelNum >= ADC_NUM )
-    {
-	channelNum = 0;		/* reset channel number to 0 */
-    }
-    AD0CR &= 0xFFFFFF00;
-    AD0CR |= (1 << 24) | (1 << channelNum);	
-				/* switch channel,start A/D convert */
-#if !ADC_INTERRUPT_FLAG
-    while ( timeout++<5000 )			/* wait until end of A/D convert */
-    {
-	regVal = *(volatile unsigned long *)(AD0_BASE_ADDR 
-			+ ADC_OFFSET + ADC_INDEX * channelNum);
-				/* read result of A/D conversion */
-	if ( regVal & ADC_DONE )
-	{
-	    break;
-	}
-    }	
-        
-    AD0CR &= 0xF8FFFFFF;	/* stop ADC now */    
-    if ( regVal & ADC_OVERRUN )	/* save data when it's not overrun
-				otherwise, return zero */
-    {
-	return ( 0 );
-    }
-    ADC_Data = ( regVal >> 6 ) & 0x3FF;
-    return ( ADC_Data );	/* return A/D conversion value */
-#else
-    return ( channelNum );	/* if it's interrupt driven, the 
-				ADC reading is done inside the handler.
-				so, return channel number */
-#endif
-}
-
-/*****************************************************************************
-** Function name:		ADC1Read
-**
-** Descriptions:		Read ADC1 channel
-**
-** parameters:			Channel number
-** Returned value:		Value read, if interrupt driven, return channel #
-** 
-*****************************************************************************/
-unsigned int ADC1Read( unsigned char channelNum )
-{
-#if !ADC_INTERRUPT_FLAG
-    unsigned int regVal;
-	unsigned int ADC_Data;
-#endif
-
-    /* channel number is 0 through 7 */
-    if ( channelNum >= ADC_NUM )
-    {
-	channelNum = 0;		/* reset channel number to 0 */
-    }
-    AD1CR &= 0xFFFFFF00;
-    AD1CR |= (1 << 24) | (1 << channelNum);	
-				/* switch channel,start A/D convert */
-#if !ADC_INTERRUPT_FLAG
-    while ( 1 )			/* wait until end of A/D convert */
-    {
-	regVal = *(volatile unsigned long *)(AD1_BASE_ADDR 
-			+ ADC_OFFSET + ADC_INDEX * channelNum);
-				/* read result of A/D conversion */
-	if ( regVal & ADC_DONE )
-	{
-	    break;
-	}
-    }	
-        
-    AD1CR &= 0xF8FFFFFF;	/* stop ADC now */
-    if ( regVal & ADC_OVERRUN )	/* save data when it's not overrun
-				otherwise, return zero */
-    {
-	return ( 0 );
-    }
-    
-    ADC_Data = ( regVal >> 6 ) & 0x3FF;
-    return ( ADC_Data );	/* return A/D conversion value */
-#else
-    return ( channelNum );
-#endif
-}
-
-/*********************************************************************************
-**                            End Of File
-*********************************************************************************/
diff --git a/ccny_asctec_firmware_2/src/buzzer.c b/ccny_asctec_firmware_2/src/buzzer.c
deleted file mode 100644
index 5a87876..0000000
--- a/ccny_asctec_firmware_2/src/buzzer.c
+++ /dev/null
@@ -1,252 +0,0 @@
-/*
- * buzzer.c
- *
- *  Created on: 14.09.2011
- *      Author: daniel
- */
-
-#include "buzzer.h"
-#include "main.h"
-#include "hardware.h"
-#include "system.h"
-#include "LL_HL_comm.h"
-#include "gpsmath.h"
-#include "LPC214x.h"
-
-//Buzzer active defines
-#define BU_INIT				0x01
-#define BU_ERROR_GYRO 		0x02
-#define BU_ERROR_ACC  		0x04
-#define BU_ERROR_ADC		0x08
-#define BU_BATTERY			0x10
-#define BU_COMPASS_FAILURE	0x20
-#define BU_WARNING_MAG_FS	0x40
-#define BU_WARNING_MAG_INC	0x80
-#define BU_GPS_BEEP			0x100
-
-#define BUZZ_LENGTH		5	//50 ms
-#define BUZZ_PAUSE		5 //50 ms
-#define BUZZ_INTERVAL	200 //2 s
-#define BUZZ_MAG_WARNING_TIMEOUT 500 //mag warning for 5 seconds only
-#define BUZZ_NR_OF_WARNINGS		9 //total number of different buzzer signals (see BU_ defines above)
-
-void buzzer_handler(unsigned int vbat)	//needs to be triggered at 100 Hz
-{
-	unsigned int buz_active=0;
-	static unsigned short error_cnt_mag_fs;
-	static unsigned short error_cnt_mag_inc;
-	static unsigned short error_cnt_compass;
-
-	unsigned int buz_priority=0;
-	static unsigned short buz_cnt=0;
-
-	static int bat_cnt=0, bat_warning=0;
-	static char bat_warning_enabled=0;
-
-	if(++buz_cnt>=BUZZ_INTERVAL) buz_cnt=0;
-
-	//battery warning
-	if(++bat_cnt==100) bat_cnt=0;
-	if(vbat<10001) vbat=10001;
-
-	if(vbat<BATTERY_WARNING_VOLTAGE)	//decide if it's really an empty battery
-	{
-		if(bat_warning<ControllerCyclesPerSecond/5) bat_warning++;
-		else bat_warning_enabled=1;
-	}
-	else
-	{
-		if(bat_warning>10) bat_warning-=2;
-		else
-		{
-			bat_warning_enabled=0;
-			buz_active&=~BU_BATTERY;
-		}
-	}
-	if(bat_warning_enabled)
-	{
-		if(bat_cnt>((vbat-10000)/BAT_DIV)) buz_active|=BU_BATTERY; //Beeper on
-		else buz_active&=~BU_BATTERY; //Beeper off
-		buz_priority|=BU_BATTERY;
-	}
-	else
-	{
-		buz_active&=~BU_BATTERY;
-		buz_priority&=~BU_BATTERY;
-	}
-
-#ifdef GPS_BEEP
-	if(((GPS_Data.status&0xFF)!=3)&&(LL_1khz_attitude_data.RC_data[5]>200))	//no lock and in GPS mode
-	{
-		buz_priority|=BU_GPS_BEEP;
-		if(buz_cnt<5) buz_active|=BU_GPS_BEEP;
-		else buz_active&=~BU_GPS_BEEP;
-	}
-	else
-	{
-		buz_active&=~BU_GPS_BEEP;
-		buz_priority&=~BU_GPS_BEEP;
-	}
-#endif
-
-#ifdef ERROR_BEEP
-	//gyro error
-	if((LL_1khz_attitude_data.flightMode&FM_CALIBRATION_ERROR_GYROS)&&(SYSTEM_initialized))
-	{
-		buz_priority|=BU_ERROR_GYRO;
-		if(buz_cnt<155) buz_active|=BU_ERROR_GYRO;
-		else if(buz_cnt<160) buz_active&=~BU_ERROR_GYRO;
-		else if(buz_cnt<165) buz_active|=BU_ERROR_GYRO;
-		else buz_active&=~BU_ERROR_GYRO;
-	}
-	else
-	{
-		buz_priority&=~BU_ERROR_GYRO;
-		buz_active&=~BU_ERROR_GYRO;
-	}
-
-	//ACC error
-	if((LL_1khz_attitude_data.flightMode&FM_CALIBRATION_ERROR_ACC)&&(SYSTEM_initialized))
-	{
-		buz_priority|=BU_ERROR_ACC;
-		if(buz_cnt<145) buz_active|=BU_ERROR_ACC;
-		else if(buz_cnt<150) buz_active&=~BU_ERROR_ACC;
-		else if(buz_cnt<155) buz_active|=BU_ERROR_ACC;
-		else if(buz_cnt<160) buz_active&=~BU_ERROR_ACC;
-		else if(buz_cnt<165) buz_active|=BU_ERROR_ACC;
-		else buz_active&=~BU_ERROR_ACC;
-	}
-	else
-	{
-		buz_priority&=~BU_ERROR_ACC;
-		buz_active&=~BU_ERROR_ACC;
-	}
-
-	//ADC error
-	if((LL_1khz_attitude_data.flightMode&FM_ADC_STARTUP_ERROR)&&(SYSTEM_initialized))
-	{
-		buz_priority|=BU_ERROR_ADC;
-		if(buz_cnt<135) buz_active|=BU_ERROR_ADC;
-		else if(buz_cnt<140) buz_active&=~BU_ERROR_ADC;
-		else if(buz_cnt<145) buz_active|=BU_ERROR_ADC;
-		else if(buz_cnt<150) buz_active&=~BU_ERROR_ADC;
-		else if(buz_cnt<155) buz_active|=BU_ERROR_ADC;
-		else if(buz_cnt<160) buz_active&=~BU_ERROR_ADC;
-		else if(buz_cnt<165) buz_active|=BU_ERROR_ADC;
-		else buz_active&=~BU_ERROR_ADC;
-	}
-	else
-	{
-		buz_priority&=~BU_ERROR_ADC;
-		buz_active&=~BU_ERROR_ADC;
-	}
-
-	//compass failure: warn 3 seconds only
-	if((LL_1khz_attitude_data.flightMode&FM_COMPASS_FAILURE)&&(SYSTEM_initialized)&&(error_cnt_compass++<400))
-	{
-		buz_priority|=BU_COMPASS_FAILURE;
-		if(buz_cnt%100<5) buz_active|=BU_COMPASS_FAILURE;
-		else if(buz_cnt%100<10) buz_active&=~BU_COMPASS_FAILURE;
-		else if(buz_cnt%100<15) buz_active|=BU_COMPASS_FAILURE;
-		else if(buz_cnt%100<20) buz_active&=~BU_COMPASS_FAILURE;
-		else if(buz_cnt%100<25) buz_active|=BU_COMPASS_FAILURE;
-		else if(buz_cnt%100<30) buz_active&=~BU_COMPASS_FAILURE;
-		else if(buz_cnt%100<35) buz_active|=BU_COMPASS_FAILURE;
-		else if(buz_cnt%100<40) buz_active&=~BU_COMPASS_FAILURE;
-		else if(buz_cnt%100<45) buz_active|=BU_COMPASS_FAILURE;
-		else if(buz_cnt%100<50) buz_active&=~BU_COMPASS_FAILURE;
-		else buz_active&=~BU_COMPASS_FAILURE;
-	}
-	else
-	{
-		buz_priority&=~BU_COMPASS_FAILURE;
-		buz_active&=~BU_COMPASS_FAILURE;
-	}
-
-	//mag fieldstrength warning: warn 3 times only
-	if((LL_1khz_attitude_data.flightMode&FM_MAG_FIELD_STRENGTH_ERROR)&&(SYSTEM_initialized)&&(error_cnt_mag_fs++<400))
-	{
-		buz_priority|=BU_WARNING_MAG_FS;
-		if(buz_cnt%100<5) buz_active|=BU_WARNING_MAG_FS;
-		else if(buz_cnt%100<10) buz_active&=~BU_WARNING_MAG_FS;
-		else if(buz_cnt%100<15) buz_active|=BU_WARNING_MAG_FS;
-		else if(buz_cnt%100<20) buz_active&=~BU_WARNING_MAG_FS;
-		else if(buz_cnt%100<25) buz_active|=BU_WARNING_MAG_FS;
-		else if(buz_cnt%100<30) buz_active&=~BU_WARNING_MAG_FS;
-		else buz_active&=~BU_WARNING_MAG_FS;
-	}
-	else
-	{
-		buz_priority&=~BU_WARNING_MAG_FS;
-		buz_active&=~BU_WARNING_MAG_FS;
-	}
-
-	//mag inclination warning: warn 3 times only
-	if((LL_1khz_attitude_data.flightMode&FM_MAG_INCLINATION_ERROR)&&(SYSTEM_initialized)&&(error_cnt_mag_inc++<400))
-	{
-		buz_priority|=BU_WARNING_MAG_INC;
-		if(buz_cnt%100<5) buz_active|=BU_WARNING_MAG_INC;
-		else if(buz_cnt%100<10) buz_active&=~BU_WARNING_MAG_INC;
-		else if(buz_cnt%100<15) buz_active|=BU_WARNING_MAG_INC;
-		else if(buz_cnt%100<20) buz_active&=~BU_WARNING_MAG_INC;
-		else if(buz_cnt%100<25) buz_active|=BU_WARNING_MAG_INC;
-		else if(buz_cnt%100<30) buz_active&=~BU_WARNING_MAG_INC;
-		else if(buz_cnt%100<35) buz_active|=BU_WARNING_MAG_INC;
-		else if(buz_cnt%100<40) buz_active&=~BU_WARNING_MAG_INC;
-		else buz_active&=~BU_WARNING_MAG_INC;
-	}
-	else
-	{
-		buz_priority&=~BU_WARNING_MAG_INC;
-		buz_active&=~BU_WARNING_MAG_INC;
-	}
-
-
-#endif
-
-#ifdef INIT_BEEP
-
-		if(!SYSTEM_initialized)
-		{
-			buz_priority|=BU_INIT;
-			if(buz_cnt%100<5) buz_active|=BU_INIT;
-			else if(buz_cnt%100<10) buz_active&=~BU_INIT;
-			else if(buz_cnt%100<15) buz_active|=BU_INIT;
-			else buz_active&=~BU_INIT;
-		}
-		else
-		{
-			buz_active&=~BU_INIT;
-			buz_priority&=~BU_INIT;
-		}
-#endif
-
-	//buzzer control
-	unsigned char i;
-	for(i=0;i<BUZZ_NR_OF_WARNINGS; i++)
-	{
-		if(buz_priority&(1<<i))
-		{
-			buz_active&=(1<<i);
-			i=BUZZ_NR_OF_WARNINGS;
-		}
-	}
-
-	if(buz_active) buzzer(ON);
-	else buzzer(OFF);
-}
-
-
-void buzzer(unsigned char offon)
-{
-
-	if(offon)	//beeper on
-	{
-		IOSET1 = (1<<17);
-	}
-	else
-	{
-		IOCLR1 = (1<<17);
-	}
-}
-
diff --git a/ccny_asctec_firmware_2/src/comm_util_LL.c b/ccny_asctec_firmware_2/src/comm_util_LL.c
deleted file mode 100644
index 247fe7b..0000000
--- a/ccny_asctec_firmware_2/src/comm_util_LL.c
+++ /dev/null
@@ -1,154 +0,0 @@
-#include "comm_util_LL.h"
-
-inline float degreesToRadians(float angle)
-{
-  return angle * M_PI / 180.0;
-}
-
-inline float radiansToDegrees(float angle)
-{
-  return angle * 180.0 / M_PI;
-}
-
-inline float LLToSIClimb(int16_t climb)
-{
-  return ((float)(climb)) / 1000.0;
-}
-
-// ****************** accel ***********************
-
-float LLToSIAccX(int16_t acc)
-{
-  return   (float)(acc) / 10000.0 * GRAVITY_SI ;
-}
-
-float LLToSIAccY(int16_t acc)
-{
-  return ( -(float)(acc)  ) / 10000.0 * GRAVITY_SI ;
-}
-
-float LLToSIAccZ(int16_t acc)
-{
-  return ( -(float)(acc)  ) / 10000.0 * GRAVITY_SI ;
-}
-
-/*
-int32_t LLtoCommAccX(int16_t acc, float g)
-{
-  return - (int32_t)((float)(acc) / g * GRAVITY_COMM);
-}
-
-int32_t LLtoCommAccY(int16_t acc, float g)
-{
-  return - (int32_t)((float)(acc) / g * GRAVITY_COMM);
-}
-
-int32_t LLtoCommAccZ(int16_t acc, float g)
-{
-  return - (int32_t)((float)(acc) / g * GRAVITY_COMM);
-}
-*/
-// ****************** angle ***********************
-
-float LLToSIAngleRoll(int angle)
-{
-  float ta =  degreesToRadians(((float)(angle)) / 1000.0);
-  //normalizeSIAngle2Pi(&ta);
-  return ta;
-}
-
-float LLToSIAnglePitch(int angle)
-{
-  float ta = degreesToRadians(((float)(-angle)) / 1000.0);
-  //normalizeSIAngle2Pi(&ta);
-  return ta;
-}
-
-float LLToSIAngleYaw(int angle)
-{
-  float ta = degreesToRadians(((float)(360000-angle)) / 1000.0);
-  //normalizeSIAngle2Pi(&ta);
-  return ta;
-}
-/*
-uint16_t LLtoCommAngleRoll(int16_t angle)
-{
-  return (int)((-(float)(angle)) / 36000.0  * 65535.0);
-}
-
-uint16_t LLtoCommAnglePitch(int16_t angle)
-{
-  return (int)(((float)(angle)) / 36000.0  * 65535.0);
-}
-
-uint16_t LLtoCommAngleYaw(uint16_t angle)
-{
-  return (int)((36000.0 - (float)(angle)) / 36000.0  * 65535.0);
-}
-*/
-// ****************** angle rate ***********************
-
-float LLToSIAngleRateRoll(int angle_rate)
-{
-  return degreesToRadians( (float)(angle_rate) * 0.0154 );
-}
-
-float LLToSIAngleRatePitch(int angle_rate)
-{
-  return degreesToRadians( (float)(-angle_rate) * 0.0154 );
-}
-
-float LLToSIAngleRateYaw(int angle_rate)
-{
-  return degreesToRadians( (float)(-angle_rate) * 0.0154 );
-}
-
-/*
-int32_t LLtoCommAngleRateYaw(int16_t angle_rate)
-{
-  return (int32_t)((float)(-angle_rate) * 0.015 / 360.0 * 65535.0);
-}
-*/
-// ******* motor commands ***
-
-short SIToLLCmdRoll (float angle_cmd)
-{
-  return ((short)(angle_cmd * 2293.578 )); // minus to invert roll because of the frame conversion (ASCTEC coordinate frame(??) to ENU)
-}
-
-short SIToLLCmdPitch (float angle_cmd)
-{
-  return -((short)(angle_cmd * 2293.578 ));
-}
-
-short SIToLLCmdYawRate (float yaw_rate_cmd)
-{
-  return -((short)(yaw_rate_cmd * 460.37235)); // minus to invert yaw rate because of the frame conversion (ASCTEC coordinate frame(??) to ENU)
-}
-
-short SIToLLCmdThrust (float thrust_cmd)
-{
-  return (short)(thrust_cmd * 40.95 );
-}
-/*
-short commToLLCmdRoll    (int16_t cmd_roll)
-{
-  return -(short) ( ((float)(cmd_roll)) / 65535 * (2.0 * M_PI) * 2293.578);
-  //return -((short)((float) cmd_roll / 1000.0 * 2293.578 ));
-}
-short commToLLCmdPitch   (int16_t cmd_pitch)
-{
-  return (short) ( ((float)(cmd_pitch)) / 65535 * (2.0 * M_PI) * 2293.578);
-  //return ((short)((float) cmd_pitch/ 1000.0 * 2293.578 ));
-}
-short commToLLCmdYawRate (int32_t cmd_yaw_rate)
-{
-  return -((short)((float)(cmd_yaw_rate)) / 65535 * (2.0 * M_PI) * 460.37235);
-  //return -((short)((float) cmd_yaw_rate / 1000.0 * 460.37235));
-}
-
-short commToLLCmdThrust  (int16_t cmd_thrust)
-{
-  return (short)((float)(cmd_thrust) / 10000.0 * 4095 );
-}
-*/
diff --git a/ccny_asctec_firmware_2/src/gpsmath.c b/ccny_asctec_firmware_2/src/gpsmath.c
deleted file mode 100644
index 94475c4..0000000
--- a/ccny_asctec_firmware_2/src/gpsmath.c
+++ /dev/null
@@ -1,15 +0,0 @@
-#include "math.h"
-#include "gpsmath.h"
-
-struct GPS_DATA GPS_Data;
-struct GPS_DATA gps_data_temp;
-
-unsigned int gpsDataOkTrigger=0;
-
-void xy2latlon(double lat0, double lon0, double X, double Y, double *lat, double *lon)	//X: East, Y: North in m; lat0,lon0: Reference coordinates; lat,lon: current GPS measurement
-{
-        *lat=lat0+Y/MEAN_EARTH_DIAMETER*360./M_PI;
-        *lon=lon0+X/MEAN_EARTH_DIAMETER*360./M_PI/cos(lat0*UMR);
-}
-
-
diff --git a/ccny_asctec_firmware_2/src/hardware.c b/ccny_asctec_firmware_2/src/hardware.c
deleted file mode 100644
index e03ddfa..0000000
--- a/ccny_asctec_firmware_2/src/hardware.c
+++ /dev/null
@@ -1,27 +0,0 @@
-#include "hardware.h"
-
-void LED(unsigned char nr, unsigned char onoff) //set or reset LED 0..3
-{
-  if (nr>=2)
-  	return;
-  if(onoff == OFF)
-  {
-    IOSET1 = (1<<(24+nr));
-  }
-  else
-  {
-    IOCLR1 = (1<<(24+nr));
-  }
-}
-
-void beeper(unsigned char offon)
-{
-  if (offon) //beeper on
-  {
-    IOSET1 = (1 << 17);
-  }
-  else
-  {
-    IOCLR1 = (1 << 17);
-  }
-}
diff --git a/ccny_asctec_firmware_2/src/i2c.c b/ccny_asctec_firmware_2/src/i2c.c
deleted file mode 100644
index 762444d..0000000
--- a/ccny_asctec_firmware_2/src/i2c.c
+++ /dev/null
@@ -1,300 +0,0 @@
-/*****************************************************************************
- *   i2c.c:  I2C C file for Philips LPC214x Family Microprocessors
- *
- *   Copyright(C) 2006, Philips Semiconductor
- *   All rights reserved.
- *
- *   History
- *   2005.10.01  ver 1.00    Prelimnary version, first Release
- *
-*****************************************************************************/
-#include "LPC214x.h"                        /* LPC21xx definitions */
-#include "type.h"
-#include "irq.h"
-#include "i2c.h"
-
-DWORD I2CMasterState = I2C_IDLE;
-DWORD I2CSlaveState = I2C_IDLE;
-
-DWORD I2CCmd;
-DWORD I2CMode;
-
-BYTE I2CMasterBuffer[BUFSIZE];
-BYTE I2CSlaveBuffer[BUFSIZE];
-DWORD I2CCount = 0;
-DWORD I2CReadLength;
-DWORD I2CWriteLength;
-
-DWORD RdIndex = 0;
-DWORD WrIndex = 0;
-
-/* 
-From device to device, the I2C communication protocol may vary, 
-in the example below, the protocol uses repeated start to read data from or 
-write to the device:
-For master read: the sequence is: STA,Addr(W),offset,RE-STA,Addr(w),data...STO 
-for master write: the sequence is: STA,Addr(W),length,RE-STA,Addr(r),data...STO
-Thus, in state 8, the address is always WRITE. in state 10, the address could 
-be READ or WRITE depending on the I2CCmd.
-*/   
-
-/*****************************************************************************
-** Function name:		I2C0MasterHandler
-**
-** Descriptions:		I2C0 interrupt handler, deal with master mode
-**				only.
-**
-** parameters:			None
-** Returned value:		None
-** 
-*****************************************************************************/
-void I2C0MasterHandler (void) __irq 
-{
-    BYTE StatValue;
-
-    /* this handler deals with master read and master write only */
-    StatValue = I20STAT;
-    
-    IENABLE;   
-    switch ( StatValue )
-    {
-	case 0x08:			/* A Start condition is issued. */
-	I20DAT = I2CMasterBuffer[0];
-	I20CONCLR = (I2CONCLR_SIC | I2CONCLR_STAC);
-	I2CMasterState = I2C_STARTED;
-	break;
-	
-	case 0x10:			/* A repeated started is issued */
-	if (  I2CCmd == GET_DEVICE_ID || I2CCmd == GET_TEMPERATURE )
-	{
-	    I20DAT = I2CMasterBuffer[2];
-	}
-	I20CONCLR = (I2CONCLR_SIC | I2CONCLR_STAC);
-	I2CMasterState = I2C_RESTARTED;
-	break;
-	
-	case 0x18:			/* Regardless, it's a ACK */
-	if ( I2CMasterState == I2C_STARTED )
-	{
-	    I20DAT = I2CMasterBuffer[1+WrIndex];
-	    WrIndex++;
-	    I2CMasterState = DATA_ACK;
-	}
-	I20CONCLR = I2CONCLR_SIC;
-	break;
-	
-	case 0x28:	/* Data byte has been transmitted, regardless ACK or NACK */
-	case 0x30:
-	if ( WrIndex != I2CWriteLength )
-	{   
-	    I20DAT = I2CMasterBuffer[1+WrIndex]; /* this should be the last one */
-	    WrIndex++;
-	    if ( WrIndex != I2CWriteLength )
-	    {   
-		I2CMasterState = DATA_ACK;
-	    }
-	    else
-	    {
-		I2CMasterState = DATA_NACK;
-		if ( I2CReadLength != 0 )
-		{
-		    I20CONSET = I2CONSET_STA;	/* Set Repeated-start flag */
-		    I2CMasterState = I2C_REPEATED_START;
-		}
-	    }
-	}
-	else
-	{
-	    if ( I2CReadLength != 0 )
-	    {
-		I20CONSET = I2CONSET_STA;	/* Set Repeated-start flag */
-		I2CMasterState = I2C_REPEATED_START;
-	    }
-	    else
-	    {
-		I2CMasterState = DATA_NACK;
-	    }
-	}
-	I20CONCLR = I2CONCLR_SIC;
-	break;
-	
-	case 0x40:	/* Master Receive, SLA_R has been sent */
-	I20CONCLR = I2CONCLR_SIC;
-	break;
-	
-	case 0x50:	/* Data byte has been received, regardless following ACK or NACK */
-	case 0x58:
-	I2CMasterBuffer[3+RdIndex] = I20DAT;
-	RdIndex++;
-	if ( RdIndex != I2CReadLength )
-	{   
-	    I2CMasterState = DATA_ACK;
-	}
-	else
-	{
-	    RdIndex = 0;
-	    I2CMasterState = DATA_NACK;
-	}
-	I20CONSET = I2CONSET_AA;	/* assert ACK after data is received */
-	I20CONCLR = I2CONCLR_SIC;
-	break;
-	
-	case 0x20:			/* regardless, it's a NACK */
-	case 0x48:
-	I20CONCLR = I2CONCLR_SIC;
-	I2CMasterState = DATA_NACK;
-	break;
-	
-	case 0x38:			/* Arbitration lost, in this example, we don't
-					deal with multiple master situation */
-	default:
-	I20CONCLR = I2CONCLR_SIC;	
-	break;
-    }
-    
-    IDISABLE;
-    VICVectAddr = 0;		/* Acknowledge Interrupt */
-
-}
-
-
-void I2C0_send_motordata(void)
-{
-	WrIndex=0;
-	RdIndex=0;
-	I2CWriteLength = 5;
-	I2CReadLength = 0;
-    I2CMasterBuffer[0] = 0x02;
-    I2CMasterBuffer[1] = 100;
-    I2CMasterBuffer[2] = 100;
-    I2CMasterBuffer[3] = 100;
-    I2CMasterBuffer[4] = 1;
-
-    //I20CONSET = I2CONSET_STA;	/* Set Start flag */
-    //if ( !I2CStart() ) I2CStop();
-    I2CCmd = GET_TEMPERATURE;
-	I2CEngine();
-}
-
-/*****************************************************************************
-** Function name:		I2CStart
-**
-** Descriptions:		Create I2C start condition, a timeout
-**				value is set if the I2C never gets started,
-**				and timed out. It's a fatal error. 
-**
-** parameters:			None
-** Returned value:		true or false, return false if timed out
-** 
-*****************************************************************************/
-unsigned int I2CStart( void )
-{
-    unsigned int timeout = 0;
-    unsigned int returnValue = FALSE;
- 
-    /*--- Issue a start condition ---*/
-    I20CONSET = I2CONSET_STA;	/* Set Start flag */
-    
-    /*--- Wait until START transmitted ---*/
-    while( 1 )
-    {
-	if ( I2CMasterState == I2C_STARTED )
-	{
-	    returnValue = TRUE;
-	    break;	
-	}
-	if ( timeout >= MAX_TIMEOUT )
-	{
-	    returnValue = FALSE;
-	    break;
-	}
-	timeout++;
-    }
-    return( returnValue );
-}
-
-/*****************************************************************************
-** Function name:		I2CStop
-**
-** Descriptions:		Set the I2C stop condition, if the routine
-**				never exit, it's a fatal bus error.
-**
-** parameters:			None
-** Returned value:		true or never return
-** 
-*****************************************************************************/
-unsigned int I2CStop( void )
-{
-    I20CONSET = I2CONSET_STO;      /* Set Stop flag */ 
-    I20CONCLR = I2CONCLR_SIC;  /* Clear SI flag */ 
-            
-    /*--- Wait for STOP detected ---*/
-    while( I20CONSET & I2CONSET_STO );
-    return TRUE;
-}
-
-/*****************************************************************************
-** Function name:		I2CInit
-**
-** Descriptions:		Initialize I2C controller
-**
-** parameters:			I2c mode is either MASTER or SLAVE
-** Returned value:		true or false, return false if the I2C
-**				interrupt handler was not installed correctly
-** 
-*****************************************************************************/
-void I2CInit( unsigned int I2cMode ) 
-{
-    IODIR0|= 0x0C;	/* set port 0.2 and port 0.3 to output, high */
-    IOSET0 = 0x0C;
-
-    /*--- Clear flags ---*/
-    I20CONCLR = I2CONCLR_AAC | I2CONCLR_SIC | I2CONCLR_STAC | I2CONCLR_I2ENC;    
-
-    /*--- Reset registers ---*/
-    I20SCLL   = I2SCLL_SCLL;
-    I20SCLH   = I2SCLH_SCLH;
-}
-
-/*****************************************************************************
-** Function name:		I2CEngine
-**
-** Descriptions:		The routine to complete a I2C transaction
-**				from start to stop. All the intermitten
-**				steps are handled in the interrupt handler.
-**				Before this routine is called, the read
-**				length, write length, I2C master buffer,
-**				and I2C command fields need to be filled.
-**				see i2cmst.c for more details. 
-**
-** parameters:			None
-** Returned value:		true or false, return false only if the
-**				start condition can never be generated and
-**				timed out. 
-** 
-*****************************************************************************/
-unsigned int I2CEngine( void ) 
-{
-    I2CMasterState = I2C_IDLE;
-    RdIndex = 0;
-    WrIndex = 0;
-    if ( I2CStart() != TRUE )
-    {
-		I2CStop();
-	return ( FALSE );
-    }
-    while ( 1 )
-    {
-	if ( I2CMasterState == DATA_NACK )
-	{
-	    I2CStop();
-	    break;
-	}
-    }    
-    return ( TRUE );      
-}
-
-/******************************************************************************
-**                            End Of File
-******************************************************************************/
-
diff --git a/ccny_asctec_firmware_2/src/kalman.c b/ccny_asctec_firmware_2/src/kalman.c
deleted file mode 100644
index 10ff6fe..0000000
--- a/ccny_asctec_firmware_2/src/kalman.c
+++ /dev/null
@@ -1,296 +0,0 @@
-#include "kalman.h"
-
-//volatile int64_t g_latest_kf_time = 0;
-volatile int64_t g_last_height_pkt_time = 0;
-
-float g_cos_psi;
-float g_sin_psi;
-float g_vz_p_f = 0;
-
-float g_accel_x;
-float g_accel_y;
-float g_accel_z;
-
-extern uint8_t g_kf_x_enabled;
-extern uint8_t g_kf_y_enabled;
-extern uint8_t g_kf_z_enabled;
-extern uint8_t g_kf_yaw_enabled;
-extern float g_imu_gravity;
-extern MAV_IMU_PKT g_imu_pkt;
-
-extern MAV_POSE2D_PKT        g_mav_pose2D_pkt;
-extern PacketInfo *          g_mav_pose2D_pkt_info;
-
-extern MAV_HEIGHT_PKT        g_mav_height_pkt;
-extern PacketInfo *          g_mav_height_pkt_info;
-
-extern MAV_KF_CFG_PKT        g_mav_kf_cfg_pkt;
-
-extern MAV_CTRL_DEBUG_PKT    g_ctrl_debug_pkt;
-
-extern unsigned int g_sdk_loops;
-
-void InitKalPos(KalPos *k)
-{
-  k->Input = 0;
-
-  unsigned int i;
-  unsigned int j;
-  for (i=0; i<2; i++)
-  {
-    for (j=0; j<2; j++)
-    {
-      if (i==j)
-        k->A[i][j] = k->At[i][j] = k->P[i][j] = k->T[i][j] = k->I[i][j] = 1;
-      else
-        k->A[i][j] = k->At[i][j] = k->P[i][j] = k->T[i][j] = k->I[i][j] = 0;
-    }
-  }
-
-  for (i=0; i<2; i++)
-  {
-    for (j=0; j<2; j++)
-    {
-        k->K[i][j] = k->Q[i][j] = k->R[i][j] = 0;
-    }
-  }
-
-  for (i=0; i<2; i++)
-  {
-    k->Correction[i] = k->Res[i] = 0;//KalPos->Est_out[i] =
-  }
-
-  k->Q[0][0] = k->Sigma2Q1;
-  k->Q[1][1] = k->Sigma2Q2;
-
-  k->R[0][0] = k->Sigma2R1;
-  k->R[1][1] = k->Sigma2R2;
-}
-
-void InitKalYaw(KalYaw *k)
-{
-  k->Q = k->Sigma2Q;
-  k->R = k->Sigma2R;
-  k->P = k->T = 1;
-  k->Input = k->State = k->Correction  = 0;//KalYaw->Est_out = KalYaw->Res KalYaw->B =
-}
-
-void PredictPos(KalPos *k, float dt)
-{
-  float dt2;
-  float Est[2];
-  float tmpA[2][2];
-  float tmpB[2];
-  float tmpA1[2][2];
-
-  dt2 = (dt*dt)/2;
-
-  k->A[0][1] = dt;
-  k->At[1][0] = dt;
-  k->B[0] = dt2;
-  k->B[1] = dt;
-
-  VectmultSc2(k->B, k->Input,tmpB);
-  multMatVec2(k->A, k->State, Est);
-  addVector2(Est,tmpB,k->State);
-
-  // propagate covariances
-  multMatrix2(k->A, k->T, tmpA); //mtmpA=A*T  2x2
-  multMatrix2(tmpA, k->At, tmpA1);//mtmpC=A*T*A'  2x2
-  addMatrix2(k->Q, tmpA1, k->P);// P = A*T*A'+ Q  2x2 matrix
-}
-
-void CorrectPos(KalPos *k)
-{
-  // Compute Kalman gains: K = P*C'*inv(C*P*C'+R)
-  // C matrix = Identity matrix so: K = P*inv(P + R)
-  float tmpP[2][2];
-  float tmpP1[2][2];
-  float tmpVect[2];
-
-  addMatrix2(k->P, k->R, tmpP); // P + R
-  invert2(tmpP, tmpP1); // (P + R)^-1
-  multMatrix2(k->P, tmpP1, k->K); // K = P*(P + R)^-1
-
-  // compute residual as difference between sensor output and estimated output (state)
-  subVector2(k->Correction, k->State, k->Res);
-  multMatVec2(k->K, k->Res, tmpVect); //K*residual
-
-  //apply correction
-  k->State[0] += tmpVect[0];
-  k->State[1] += tmpVect[1];
-
-  //Compute "a posteriori " covariance matrix T = (I-K*C)*P
-  subMatrix2(k->I, k->K,tmpP); //I-K*C
-  multMatrix2(tmpP, k->P, k->T); //(I-K*C)*P
-}
-
-void PredictYaw(KalYaw *k, float dt)
-{
-  float Est_yaw;
-  Est_yaw = k->State + dt * k->Input;
-  k->State = Est_yaw;
-  normalizeSIAngle2Pi(&k->State);
-  k->P = k->T + k->Q; // P = T + Q
-}
-
-void CorrectYaw(KalYaw *k)
-{
-  k->K = (k->P) / (k->P + k->R);
-
-  float Res = k->Correction - k->State;
-  normalizeSIAnglePi(&Res);
-
-  k->State += k->K * Res;
-  normalizeSIAngle2Pi(&k->State);
-
-  //Compute "a posteriori " covariance T = (I-K*C)*P
-  k->T = (1 - k->K) * k->P;
-}
-
-void KFilter (void)
-{
-  static unsigned short first_time = 1;
-  //float accel_x, accel_y, accel_z;
-  float roll, pitch, yaw, yaw_rate;
-  float accel_x_wf, accel_y_wf, accel_z_wf;
-  float dt = 0.001;
-  float vz_p;
-
-  vz_p = LLToSIClimb(RO_ALL_Data.fusion_dheight); //LL_1khz_attitude_data.dheight);  // z velocity from pressure, SI
-
-  g_vz_p_f = 0.995 * g_vz_p_f + 0.005 * vz_p;   // simple smoothing filter
-
-  roll     = LLToSIAngleRoll (RO_ALL_Data.angle_roll);//LL_1khz_attitude_data.angle_roll);
-  pitch    = LLToSIAnglePitch(RO_ALL_Data.angle_pitch);//LL_1khz_attitude_data.angle_pitch);
-
-  yaw_rate = LLToSIAngleRateYaw(RO_ALL_Data.angvel_yaw);//LL_1khz_attitude_data.angvel_yaw);
-
-  if (first_time == 1)
-  {
-    first_time = 0;
-    resetKalmanFilter();
-  }
-
-  float cos_phi   = cos(roll);    float sin_phi   = sin(roll);
-  float cos_theta = cos(pitch);   float sin_theta = sin(pitch);
-
-  if (g_kf_yaw_enabled != 0)
-  {
-    yaw = kal_yaw.State;
-  }
-  else
-  {
-    yaw = LLToSIAngleYaw (RO_ALL_Data.angle_yaw);
-  }
-
-  g_cos_psi = cos(yaw);
-  g_sin_psi = sin(yaw);
-
-  g_accel_x = LLToSIAccX(RO_ALL_Data.acc_x);
-  g_accel_y = LLToSIAccY(RO_ALL_Data.acc_y);
-  g_accel_z = LLToSIAccZ(RO_ALL_Data.acc_z);
-
-  // body frame to world frame transform
-
-  float accel_x_cos_theta = g_accel_x*cos_theta;
-  float sin_phi_sin_theta = sin_phi*sin_theta;
-  float cos_phi_sin_theta = cos_phi*sin_theta;
-
-  accel_x_wf =  accel_x_cos_theta*g_cos_psi + g_accel_y*(sin_phi_sin_theta*g_cos_psi - cos_phi*g_sin_psi) + g_accel_z*(cos_phi_sin_theta*g_cos_psi + sin_phi*g_sin_psi);
-  accel_y_wf =  accel_x_cos_theta*g_sin_psi + g_accel_y*(sin_phi_sin_theta*g_sin_psi + cos_phi*g_cos_psi) + g_accel_z*(cos_phi_sin_theta*g_sin_psi - sin_phi*g_cos_psi);
-  accel_z_wf = -g_accel_x*sin_theta         + g_accel_y*sin_phi*cos_theta                                 + g_accel_z*cos_phi*cos_theta - GRAVITY_SI;
-
-  g_imu_pkt.acc_x = g_accel_x;
-  g_imu_pkt.acc_y = g_accel_y;
-  g_imu_pkt.acc_z = g_accel_z;
-
-  // debug purposes
-  g_ctrl_debug_pkt.acc_x_wf = accel_x_wf;
-  g_ctrl_debug_pkt.acc_y_wf = accel_y_wf;
-  g_ctrl_debug_pkt.acc_z_wf = accel_z_wf;
-
-  //dt  = (g_timestamp - g_latest_kf_time) * 0.000001;
-  //g_latest_kf_time = g_timestamp;
-
-  if (g_kf_yaw_enabled != 0)
-  {
-    kal_yaw.Input = yaw_rate;
-    PredictYaw(&kal_yaw, dt);
-    if (g_mav_pose2D_pkt_info->updated == 1)
-    {
-      kal_yaw.Correction = g_mav_pose2D_pkt.yaw;
-      CorrectYaw(&kal_yaw);
-    }
-    kal_out.yaw_filtered = kal_yaw.State;
-  }
-
-  if (g_kf_x_enabled != 0)
-  {
-    kal_x.Input = accel_x_wf;
-    PredictPos(&kal_x, dt);
-    if (g_mav_pose2D_pkt_info->updated == 1)
-    {
-      kal_x.Correction[0] = g_mav_pose2D_pkt.x;
-      kal_x.Correction[1] = g_mav_pose2D_pkt.vx;
-      CorrectPos(&kal_x);
-    }
-    kal_out.pos_filtered[0] = kal_x.State[0];
-    kal_out.vel_filtered[0] = kal_x.State[1];
-  }
-
-  if (g_kf_y_enabled != 0)
-  {
-    kal_y.Input = accel_y_wf;
-    PredictPos(&kal_y, dt);
-    if (g_mav_pose2D_pkt_info->updated==1)
-    {
-      kal_y.Correction[0] = g_mav_pose2D_pkt.y;
-      kal_y.Correction[1] = g_mav_pose2D_pkt.vy;
-      CorrectPos(&kal_y);
-    }
-    kal_out.pos_filtered[1] = kal_y.State[0];
-    kal_out.vel_filtered[1] = kal_y.State[1];
-  }
-
-  if (g_kf_z_enabled != 0  )
-  {
-    kal_z.Input = accel_z_wf;
-    PredictPos(&kal_z, dt);
-
-    // correct z, vz from laser
-    if (g_mav_height_pkt_info->updated == 1)
-    {
-      g_last_height_pkt_time = g_timestamp;
-      kal_z.Sigma2R1 = g_mav_kf_cfg_pkt.R_z;
-      kal_z.Sigma2R2 = g_mav_kf_cfg_pkt.R_vz;
-      kal_z.Correction[0] = g_mav_height_pkt.z;
-      kal_z.Correction[1] = g_mav_height_pkt.vz;
-      CorrectPos(&kal_z);
-    }
-    //if (g_sdk_loops % 200 == 0 ) // old
-    if (g_last_height_pkt_time - g_timestamp > HEIGHT_PKT_TIMEOUT)
-    {
-      // correct vz from pressure
-      kal_z.Sigma2R1 = 100.00e6;//(float) g_mav_kf_cfg_pkt.R_z;
-      kal_z.Sigma2R2 = g_mav_kf_cfg_pkt.R_vz_p;
-      kal_z.Correction[0] = kal_z.State[0]; //force residual to zero to have the predicted state as output
-      kal_z.Correction[1] = g_vz_p_f;
-      CorrectPos(&kal_z);
-    }
-
-    kal_out.pos_filtered[2] = kal_z.State[0];
-    kal_out.vel_filtered[2] = kal_z.State[1];
-  }
-
-  g_mav_pose2D_pkt_info->updated = 0;
-  g_mav_height_pkt_info->updated = 0;
-}
-
-void resetKalmanFilter()
-{
-  InitKalPos(&kal_x);
-  InitKalPos(&kal_y);
-  InitKalPos(&kal_z);
-  InitKalYaw(&kal_yaw);
-}
diff --git a/ccny_asctec_firmware_2/src/main.c b/ccny_asctec_firmware_2/src/main.c
deleted file mode 100644
index 64e322a..0000000
--- a/ccny_asctec_firmware_2/src/main.c
+++ /dev/null
@@ -1,195 +0,0 @@
-/**********************************************************
- Header files
- **********************************************************/
-
-#include "stdio.h"
-#include "main.h"
-#include "system.h"
-#include "uart.h"
-#include <math.h>
-#include "hardware.h"
-#include "irq.h"
-#include "i2c.h"
-#include "gpsmath.h"
-#include "adc.h"
-#include "uart.h"
-#include "uart1.h"
-#include "ssp.h"
-#include "LL_HL_comm.h"
-#include "sdk.h"
-#include <unistd.h>
-
-/* *********************************************************
- Function declarations
- ********************************************************* */
-
-//void Initialize(void);
-//void feed(void);
-
-/**********************************************************
- Global Variables
- **********************************************************/
-struct HL_STATUS HL_Status;
-struct IMU_RAWDATA IMU_RawData;
-volatile unsigned int int_cnt = 0, cnt = 0, mainloop_cnt = 0;
-volatile unsigned char mainloop_trigger = 0;
-volatile unsigned int GPS_timeout = 0;
-volatile char SYSTEM_initialized=0; //new
-
-//extern unsigned char data_requested;
-//extern int ZeroDepth;
-
-volatile unsigned int trigger_cnt = 0;
-unsigned int logs_per_second = 0, total_logs_per_second = 0;
-
-unsigned char packets = 0x00;
-unsigned char packetsTemp;
-unsigned int uart_cnt;
-unsigned char DataOutputsPerSecond = 20;
-
-struct IMU_CALCDATA IMU_CalcData, IMU_CalcData_tmp;
-struct GPS_TIME GPS_Time;
-struct SYSTEM_PERMANENT_DATA SYSTEM_Permanent_Data;
-
-float g_imu_gravity; // as reported in LL units (not exactly mg)
-
-void timer0ISR(void) __irq
-{
-  T0IR = 0x01; //Clear the timer 0 interrupt
-  IENABLE;
-  trigger_cnt++;
-  if (trigger_cnt == ControllerCyclesPerSecond)
-  {
-    trigger_cnt = 0;
-    HL_Status.up_time++;
-    HL_Status.cpu_load = mainloop_cnt;
-
-    mainloop_cnt = 0;
-  }
-
-  if (mainloop_trigger < 10)
-    mainloop_trigger++;
-  g_timestamp += ControllerCyclesPerSecond;
-
-  IDISABLE;
-  VICVectAddr = 0; // Acknowledge Interrupt
-}
-
-void timer1ISR(void) __irq
-{
-  T1IR = 0x01; //Clear the timer 1 interrupt
-  IENABLE;
-
-  IDISABLE;
-  VICVectAddr = 0; // Acknowledge Interrupt
-}
-
-/**********************************************************
- MAIN
- **********************************************************/
-int main(void)
-{
-  static int vbat1, vbat2;
-  int vbat;
-  static int bat_cnt = 0, bat_warning = 1000;
-  static char bat_warning_enabled = 1;
-
-  IDISABLE;
-
-  init();
-  LL_write_init();
-
-  HL_Status.up_time = 0;
-
-  printf("\n\nProgramm is running ... \n");
-  printf("Processor Clock Frequency: %d Hz\n", processorClockFrequency());
-  printf("Peripheral Clock Frequency: %d Hz\n", peripheralClockFrequency());
-
-  IENABLE;
-
-  packetsTemp = packets;
-
-  LED(1, ON);
-
-  sdkInit();
-
-  beeper(OFF);
-  wait(5000000);
-  calibrate();
-  //g_imu_gravity = 1022.0; // TODO it this correct??
-  while (1)
-  {
-    if (mainloop_trigger > 0)
-    {
-      mainloop_cnt++;
-      if (++bat_cnt == 100)
-        bat_cnt = 0;
-
-      //battery monitoring
-      vbat1 = (vbat1 * 29 + (ADC0Read(VOLTAGE_1) * 9872 / 579)) / 30; //voltage in mV //*9872/579
-
-      HL_Status.battery_voltage_1 = vbat1;
-      HL_Status.battery_voltage_2 = vbat2;
-
-      vbat = vbat1;
-
-      if (vbat < BATTERY_WARNING_VOLTAGE) //decide if it's really an empty battery
-      {
-        if (bat_warning < ControllerCyclesPerSecond * 2)
-          bat_warning++;
-        else
-          bat_warning_enabled = 1;
-      }
-      else
-      {
-        if (bat_warning > 10)
-          bat_warning -= 5;
-        else
-        {
-          bat_warning_enabled = 0;
-          beeper(OFF);
-        }
-      }
-      if (bat_warning_enabled)
-      {
-        if (bat_cnt > ((vbat - 9000) / BAT_DIV))
-          beeper(ON);
-        else
-          beeper(OFF);
-      }
-
-      if (mainloop_trigger)
-        mainloop_trigger--;
-      mainloop();
-    }
-  }
-  return 0;
-}
-
-
-void mainloop(void)
-{
-  SDK_mainloop();
-
-  HL2LL_write_cycle(); //write data to transmit buffer for immediate transfer to LL processor
-}
-
-void calibrate()
-{
-  double sum = 0.0;
-  unsigned int i;
-  for (i = 0; i < 2000; ++i)
-  {
-    wait(1200); // wait 1 ms
-    HL2LL_write_cycle();
-    double ax = RO_ALL_Data.acc_x;
-    double ay = RO_ALL_Data.acc_y;
-    double az = RO_ALL_Data.acc_z;
-
-    double a = sqrt(ax*ax + ay*ay + az*az);
-    sum +=a;
-  }
-
-  g_imu_gravity  = sum / 2000.0;
-}
-
diff --git a/ccny_asctec_firmware_2/src/matrices.c b/ccny_asctec_firmware_2/src/matrices.c
deleted file mode 100644
index 9f4b0bd..0000000
--- a/ccny_asctec_firmware_2/src/matrices.c
+++ /dev/null
@@ -1,294 +0,0 @@
-#include "matrices.h"
-
-void addMatrix2 (float A[2][2], float B[2][2], float C[2][2]){
-    /*C= A+B;
-     * A,B and C need to be the same size (m by n); function does not check*/
-    int i, j;
-    for(i=0; i<2; ++i){
-        for(j=0; j<2; ++j){
-            C[i][j] = A[i][j] + B[i][j];
-        }//inner for
-    }//outer for
-}//add matrices
-
-void addMatrix (matrix A, matrix B, matrix C, int m, int n){
-    /*C= A+B;
-     * A,B and C need to be the same size (m by n); function does not check*/
-    int i, j;
-    for(i=0; i<m; ++i){
-        for(j=0; j<n; ++j){
-            C[i][j] = A[i][j] + B[i][j];
-        }//inner for
-    }//outer for
-}//add matrices
-
-void addVector (float* A, float* B, float* C, int m){
-    /*C= A+B;
-     *  A,B and C need to be the same size (m); function does not check*/
-    int i;
-    for(i=0; i<m; ++i){
-        C[i] = A[i] + B[i];
-    }//for
-}//add Vectors
-
-void addVector2(float V[2], float V1[2], float V2[2])
-{
-    V2[0] = V[0] + V1[0];
-    V2[1] = V[1] + V1[1];
-}
-
-void subMatrix2 (float A[2][2], float B[2][2], float C[2][2]){
-    /*C= A-B;
-     * A,B and C need to be the same size (m by n); function does not check*/
-    int i, j;
-    for(i=0; i<2; ++i){
-            for(j=0; j<2; ++j){
-                C[i][j] = A[i][j] - B[i][j];
-            }//inner for
-    }//outer for
-}//sub matrices
-
-
-void subMatrix (matrix A, matrix B, matrix C, int m, int n){
-    /*C= A-B;
-     * A,B and C need to be the same size (m by n); function does not check*/
-    int i, j;
-    for(i=0; i<m; ++i){
-            for(j=0; j<n; ++j){
-                C[i][j] = A[i][j] - B[i][j];
-            }//inner for
-    }//outer for
-}//sub matrices
-
-void subVector (float* A, float* B, float* C, int m){
-    /*C= A-B;
-     * A,B and C need to be the same size (m); function does not check*/
-    int i;
-    for(i=0; i<m; ++i){
-        C[i] = A[i] - B[i];
-    }//for
-}//add Vectors
-
-void subVector2 (float A[2], float B[2], float C[2]){
-    /*C= A-B;
-     * A,B and C need to be the same size (m); function does not check*/
-    int i;
-    for(i=0; i<2; ++i){
-        C[i] = A[i] - B[i];
-    }//for
-}//add Vectors
-
-
-void negMatrix(matrix A, int m, int n){
-    /*negate matrix*/
-    int i,j;
-    for(i=0; i<m; ++i){
-        for(j=0; j<n; ++j){
-            A[i][j] = -A[i][j];
-        }//inner for
-    }//outer for
-}//negMAtrix
-
-
-void multMatrix(matrix A, matrix B, matrix C, int Am, int An, int Bn){
-    //C = A*B
-    //A,B and C need to be of correct dimensions, function does not check
-    int i,j,k;
-    float sum;
-
-    for(i=0; i < Bn; i++){
-        for(j=0; j < Am; j++){
-            sum=0;
-            for(k=0; k < An; k++)
-                sum += A[j][k] * B[k][i];
-            C[j][i] = sum;
-        }//inner for
-    }//outer for
-}
-
-void multMatrix2(float A[2][2], float B[2][2], float C[2][2]){
-    //C = A*B
-    //A,B and C need to be of correct dimensions, function does not check
-    int i,j,k;
-    float sum;
-
-    for(i=0; i < 2; i++){
-        for(j=0; j < 2; j++){
-            sum=0;
-            for(k=0; k < 2; k++)
-                sum += A[j][k] * B[k][i];
-            C[j][i] = sum;
-        }//inner for
-    }//outer for
-}
-void multMatVec(matrix A, float* B, float* C, int Am, int Bn){
-    /*C = A*B
-     *A,B and C need to be of correct dimensions, function does not check */
-
-
-    int j,k;
-    float sum;
-    for(j=0; j < Am; j++){
-        sum=0;
-        for(k=0; k < Bn; k++)
-            sum += A[j][k] * B[k];
-        C[j] = sum;
-        }//for
-}//multMatVec
-
-void multMatVec2(float A[2][2], float B[2], float C[2]){
-    /*C = A*B
-     *A,B and C need to be of correct dimensions, function does not check */
-
-    int j,k;
-    float sum;
-    for(j=0; j < 2; j++){
-        sum=0;
-        for(k=0; k < 2; k++)
-            sum += A[j][k] * B[k];
-        C[j] = sum;
-        }//for
-}//multMatVec
-
-
-void transpose(matrix A, matrix B, int Am, int An){
-    /*B = A'*/
-    int i,j;
-     for(i=0; i < Am; i++)
-        for(j=0; j < An; j++)
-            B[j][i] = A[i][j];
-
-}
-
-void invert3(matrix A, matrix B){
-/* B = A^-1 for 3x3 matrices*/
-    float det = (A[0][0]*A[1][1]*A[2][2]-A[0][0]*A[1][2]*A[2][1]-A[1][0]*A[0][1]*A[2][2]+A[1][0]*A[0][2]*A[2][1]+A[2][0]*A[0][1]*A[1][2]-A[2][0]*A[0][2]*A[1][1]);
-
-    B[0][0]=(A[1][1]*A[2][2]-A[1][2]*A[2][1])/det;
-    B[0][1]=(-A[0][1]*A[2][2]+A[0][2]*A[2][1])/det;
-    B[0][2]=(A[0][1]*A[1][2]-A[0][2]*A[1][1])/det;
-    B[1][0]=(-A[1][0]*A[2][2]+A[1][2]*A[2][0])/det;
-    B[1][1]=(A[0][0]*A[2][2]-A[0][2]*A[2][0])/det;
-    B[1][2]=(-A[0][0]*A[1][2]+A[0][2]*A[1][0])/det;
-    B[2][0]=(A[1][0]*A[2][1]-A[1][1]*A[2][0])/det;
-    B[2][1]=(-A[0][0]*A[2][1]+A[0][1]*A[2][0])/det;
-    B[2][2]=(A[0][0]*A[1][1]-A[0][1]*A[1][0])/det;
-}//invert3
-
-void invert2(float A[2][2], float B[2][2]){
-/* B = A^-1 for 2x2 matrices*/
-    float det = (A[0][0]*A[1][1]-A[0][1]*A[1][0]);
-
-    B[0][0]=(A[1][1])/det;
-    B[0][1]=(-A[0][1])/det;
-    B[1][0]=(-A[1][0])/det;
-    B[1][1]=(A[0][0])/det;
-}//invert2
-
-float determinant(matrix A,matrix tmp, int n){
-    /*returns determinant of n x n matrix*/
-    int i,j,k;
-    float q;
-    float dtr=1;
-    /* copy A to tmp*/
-    for(i=0; i < n; i++)
-        for(j=0; j < n; j++)
-            tmp[i][j] = A[j][i];
-
-    /*compute determinant*/
-    for(i=0;i < n;i++){
-        for(j=0;j < n;j++){
-            q=tmp[j][i]/tmp[i][i];
-            for(k=0;k < n;k++){
-                if(i==j) break;
-                tmp[j][k]=(tmp[j][k]-tmp[i][k])*q;
-            }//innermost for
-        }//middle for
-    }//outer for
-    for(i=0;i < n;i++){
-        dtr=dtr*tmp[i][i];
-    }//for
-    return(dtr);
-}//det
-
-
-void getMinor(matrix A, matrix B,int An, int m, int n){
-    /*  use this function to generate a matrix B that is the mn minor of A; A must be square
-     *  m>=1, n>=1, An is the size of A*/
-    int i,j;
-    int k=0;
-    for(i=0; i < An; i++){
-        if(i!=(m-1)){
-            for(j=0; j < (An-1); j++){
-                if(j<(n-1)){
-                    B[k][j] = A[i][j];
-                }
-                else{
-                    B[k][j] = A[i][j+1];
-                }
-            }//inner for (column)
-            k++;
-        }//if
-    }//outer for
-}//get minor
-
-
-void invt(matrix A, matrix B, matrix tmp1, matrix tmp2, int An){
-    /*B =  A^-1 ; tmp1 & tmp2 must be at least of size (An-1)x(An-1)
-     * function does not check if matrix is singular, tried, but even if det(A)==0, it did not escape,
-     * just reutrned "nan" for some elements, and garbage for others
-     *  */
-    int i,j;
-    float detA = determinant(A,tmp2,An);
-    for(i=0; i < An; i++){
-        for(j=0; j < An; j++){
-            getMinor(A,tmp1,An,i+1,j+1);
-            if(((i+j)%2)==0){
-                B[j][i]= determinant(tmp1,tmp2,(An-1))/detA;
-            }
-            else{
-                B[j][i]= -determinant(tmp1,tmp2,(An-1))/detA;
-            }
-             //problem if an element is zero (returns "nan" for zero element)
-        }//inner for
-    }//outer for
-}//invert
-
-float BhQhBhT(matrix Qh, float* Bh, float* tmp){
-    //function returns the value for Bh*Qh*Bh', where Qh is an  3x3 matrix, and Bh is a vector of length 3
-
-
-
-    //Bh*Qh
-    int i,j;
-    float sum;
-    for(i=0; i < 3; i++){
-        sum=0;
-        for(j=0; j < 3; j++)
-            sum += Bh[j]*Qh[j][i];
-        tmp[i] = sum;
-     }//outer for
-
-    //tmp*BhT
-    sum = 0;
-    for(i=0; i < 3; i++)
-        sum += tmp[i]*Bh[i];
-
-
-
-    return sum;
-}
-
-void VectdivSc(float* V, float scl){
-    //function returns the value of Vector/scalar where vector is 3x1
-
-    int i;
-    for(i=0; i < 3; i++){
-        V[i] = V[i]/scl;
-     }// for
-}
-void VectmultSc2(float V[2], float scl, float V1[2])
-{
-     V1[0] = V[0] * scl;
-     V1[1] = V[1] * scl;
-}
diff --git a/ccny_asctec_firmware_2/src/pid.c b/ccny_asctec_firmware_2/src/pid.c
deleted file mode 100644
index 513bac1..0000000
--- a/ccny_asctec_firmware_2/src/pid.c
+++ /dev/null
@@ -1,334 +0,0 @@
-#include "pid.h"
-
-//volatile int64_t g_latest_ctrl_time = 0;
-
-PID pid_x, pid_y, pid_z, pid_yaw, pid_vx, pid_vy, pid_vz;
-
-extern float g_cos_psi;
-extern float g_sin_psi;
-
-extern float g_accel_x;
-extern float g_accel_y;
-extern float g_accel_z;
-
-extern MAV_POSE_PKT          g_pose_pkt;
-extern MAV_CTRL_CMD          g_ctrl_cmd;
-extern MAV_FLIGHT_STATE_PKT  g_flight_state_pkt;
-extern MAV_CTRL_DEBUG_PKT    g_ctrl_debug_pkt;
-extern MAV_CTRL_INPUT_PKT    g_ctrl_input_pkt;
-extern MAV_CTRL_CFG_PKT      g_ctrl_cfg_pkt;
-extern MAV_DES_VEL_PKT       g_des_vel_pkt;
-
-extern MAV_DES_POSE_PKT      g_des_pose_pkt;
-extern PacketInfo *          g_des_pose_pkt_info;
-
-extern MAV_PID_CFG_PKT       g_pid_cfg_pkt;
-extern PacketInfo *          g_pid_cfg_pkt_info;
-
-//float g_vel_x_bf_last = 0;
-//float g_vel_y_bf_last = 0;
-//float g_vel_z_last = 0;
-void pidReset(void)
-{
-  // Check if there's a new packet with desired pose, if not set des_pose to zero
-  if (g_des_pose_pkt_info->updated == 0)
-  {
-    g_des_pose_pkt.x         = 0.0;
-    g_des_pose_pkt.y         = 0.0;
-    g_des_pose_pkt.z         = 0.0;
-    g_des_vel_pkt.vx         = 0.0;
-    g_des_vel_pkt.vy         = 0.0;
-    g_des_vel_pkt.vz         = 0.0;
-    g_des_vel_pkt.yaw_rate   = 0.0;
-    g_des_pose_pkt.yaw       = 0.0;
-  }
-
-  //initialize PID variables
-  pid_x.sum_error   = 0.0;
-  pid_y.sum_error   = 0.0;
-  pid_z.sum_error   = 0.0;
-  pid_vx.sum_error  = 0.0;
-  pid_vy.sum_error  = 0.0;
-  pid_vz.sum_error  = 0.0;
-  pid_yaw.sum_error = 0.0;
-}
-
-float pidCalc(PID * pid, float error, float d_term, float d_base, float dt)
-{
-  // clamp error
-  if      (error >  pid->max_error) error =  pid->max_error;
-  else if (error < -pid->max_error) error = -pid->max_error;
-
-  pid->sum_error += error * dt;
-
-  // prevent integral windup through clamping
-  if      (pid->sum_error >  pid->max_sum_error) pid->sum_error =  pid->max_sum_error;
-  else if (pid->sum_error < -pid->max_sum_error) pid->sum_error = -pid->max_sum_error;
-
-  float error_pow = pow((1.0/d_base),abs(error));
-  return  (pid->bias + pid->kp * error + (pid->kd *error_pow)* d_term + pid->ki * pid->sum_error);
-}
-
-void pidParamUpdate()
-{
-  // *************** X axis par *******************
-
-  pid_x.kp            = g_pid_cfg_pkt.k_p_x;
-  pid_x.ki            = g_pid_cfg_pkt.k_i_x;
-  pid_x.kd            = g_pid_cfg_pkt.k_d_x;
-  pid_x.d_base        = g_pid_cfg_pkt.d_base_x;
-  pid_x.kd2           = g_pid_cfg_pkt.k_d2_x;
-  pid_x.bias          = g_pid_cfg_pkt.bias_x;
-  pid_x.max_error     = g_pid_cfg_pkt.max_err_x;
-  pid_x.max_sum_error = g_pid_cfg_pkt.max_i_x;
-
-  pid_vx.kp            = g_pid_cfg_pkt.k_p_vx;
-  pid_vx.ki            = g_pid_cfg_pkt.k_i_vx;
-  pid_vx.kd            = g_pid_cfg_pkt.k_d_vx;
-  pid_vx.bias          = g_pid_cfg_pkt.bias_vx;
-  pid_vx.max_error     = g_pid_cfg_pkt.max_err_vx;
-  pid_vx.max_sum_error = g_pid_cfg_pkt.max_i_vx;
-
-  // *************** Y axis par *******************
-
-  pid_y.kp          = g_pid_cfg_pkt.k_p_y;
-  pid_y.ki          = g_pid_cfg_pkt.k_i_y;
-  pid_y.kd          = g_pid_cfg_pkt.k_d_y;
-  pid_y.d_base      = g_pid_cfg_pkt.d_base_y;
-  pid_y.kd2         = g_pid_cfg_pkt.k_d2_y;
-  pid_y.bias        = g_pid_cfg_pkt.bias_y;
-  pid_y.max_error     = g_pid_cfg_pkt.max_err_y;
-  pid_y.max_sum_error = g_pid_cfg_pkt.max_i_y;
-
-  pid_vy.kp         = g_pid_cfg_pkt.k_p_vy;
-  pid_vy.ki         = g_pid_cfg_pkt.k_i_vy;
-  pid_vy.kd         = g_pid_cfg_pkt.k_d_vy;
-  pid_vy.bias       = g_pid_cfg_pkt.bias_vy;
-  pid_vy.max_error     = g_pid_cfg_pkt.max_err_vy;
-  pid_vy.max_sum_error = g_pid_cfg_pkt.max_i_vy;
-
-  // *************** Z axis par *******************
-
-  pid_z.kp             = g_pid_cfg_pkt.k_p_z;
-  pid_z.ki             = g_pid_cfg_pkt.k_i_z;
-  pid_z.kd             = g_pid_cfg_pkt.k_d_z;
-  pid_z.kd2            = g_pid_cfg_pkt.k_d2_z;
-  pid_z.bias           = g_pid_cfg_pkt.bias_z;
-  pid_z.max_error      = g_pid_cfg_pkt.max_err_z;
-  pid_z.max_sum_error  = g_pid_cfg_pkt.max_i_z;
-
-
-  pid_vz.kp         = g_pid_cfg_pkt.k_p_vz;
-  pid_vz.ki         = g_pid_cfg_pkt.k_i_vz;
-  pid_vz.kd         = g_pid_cfg_pkt.k_d_vz;
-  pid_vz.bias       = g_pid_cfg_pkt.bias_vz;
-  pid_vz.max_error     = g_pid_cfg_pkt.max_err_vz;
-  pid_vz.max_sum_error = g_pid_cfg_pkt.max_i_vz;
-
-  // ****************** Yaw par *******************
-
-  pid_yaw.kp             = g_pid_cfg_pkt.k_p_yaw;
-  pid_yaw.ki             = g_pid_cfg_pkt.k_i_yaw;
-  pid_yaw.kd             = g_pid_cfg_pkt.k_d_yaw;
-  pid_yaw.bias           = g_pid_cfg_pkt.bias_yaw;
-  pid_yaw.max_error      = g_pid_cfg_pkt.max_err_yaw;
-  pid_yaw.max_sum_error  = g_pid_cfg_pkt.max_i_yaw;
-}
-
-void processCtrl(void)
-{
-  float dt = 0.001;//(g_timestamp - g_latest_ctrl_time) * 0.000001; //dt in sec
-  //g_latest_ctrl_time = g_timestamp;
-  // **** Check if there's a new packet with PID parameters ***************
-
-  if (g_pid_cfg_pkt_info->updated != 0)
-  {
-    g_pid_cfg_pkt_info->updated = 0;
-    pidParamUpdate();
-  }
-
-  if (g_flight_state_pkt.state == MAV_STATE_FLYING)
-  {
-    float roll     = LLToSIAngleRoll (RO_ALL_Data.angle_roll);//LL_1khz_attitude_data.angle_roll);
-    float pitch    = LLToSIAnglePitch(RO_ALL_Data.angle_pitch);//LL_1khz_attitude_data.angle_pitch);
-
-    float a_x = g_accel_x * cos(pitch) + g_accel_y * sin(pitch)*sin(roll) + g_accel_z * sin(pitch)*cos(roll);
-    float a_y = g_accel_y * cos(roll)  - g_accel_z * sin(roll);
-
-    float vel_x_bf  = g_pose_pkt.vx * g_cos_psi + g_pose_pkt.vy * g_sin_psi;
-    float vel_y_bf  = g_pose_pkt.vy * g_cos_psi - g_pose_pkt.vx * g_sin_psi;
-    float vel_z = g_pose_pkt.vz;
-
-    //float dv_x = (vel_x_bf - g_vel_x_bf_last)/dt;
-    //float dv_y = (vel_y_bf - g_vel_y_bf_last)/dt;
-    //float dv_z = (g_pose_pkt.vz - g_vel_z_last )/dt;
-
-    //g_vel_x_bf_last = vel_x_bf;
-    //g_vel_y_bf_last = vel_y_bf;
-    //g_vel_z_last = vel_z;
-
-    g_ctrl_debug_pkt.vel_x_bf = vel_x_bf;
-    g_ctrl_debug_pkt.vel_y_bf = vel_y_bf;
-    g_ctrl_debug_pkt.ax_bf = a_x;
-    g_ctrl_debug_pkt.ay_bf = a_y;
-    //g_ctrl_debug_pkt.az    = dv_z;
-
-    // *************************** X axis ctrl*********************************
-
-    if (g_ctrl_cfg_pkt.ctrl_mode_pitch == MAV_CTRL_MODE_POSITION)
-    {
-      float des_x_bf   = (g_des_pose_pkt.x - g_pose_pkt.x) * g_cos_psi + (g_des_pose_pkt.y - g_pose_pkt.y) * g_sin_psi;
-      //float vel_x_bf   = g_pose_pkt.vx * g_cos_psi + g_pose_pkt.vy * g_sin_psi;
-      //float pitch_rate = LLToSIAngleRatePitch (LL_1khz_attitude_data.angvel_pitch);
-
-      g_ctrl_cmd.cmd_pitch = pidCalc(&pid_x, des_x_bf, -vel_x_bf, pid_x.d_base, dt);
-      g_ctrl_debug_pkt.pid_error_x_bf = des_x_bf;
-    }
-
-    else if (g_ctrl_cfg_pkt.ctrl_mode_pitch == MAV_CTRL_MODE_VELOCITY)
-    {
-      //float des_vx_bf   = (g_des_pose_pkt.vx - g_pose_pkt.vx) * g_cos_psi + (g_des_pose_pkt.vy - g_pose_pkt.vy) * g_sin_psi;
-      //float des_vx     = (float) g_des_pose_pkt.vx;
-      //float current_vx = (float) g_pose_pkt.vx;
-      float vx_error = g_des_vel_pkt.vx - vel_x_bf;
-      g_ctrl_debug_pkt.pid_error_vx_bf = vx_error;
-
-      g_ctrl_cmd.cmd_pitch = pidCalc(&pid_vx, vx_error, -a_x, 1.0, dt);
-    }
-
-    else if (g_ctrl_cfg_pkt.ctrl_mode_pitch == MAV_CTRL_MODE_DIRECT)
-      g_ctrl_cmd.cmd_pitch = g_ctrl_input_pkt.cmd_pitch;
-
-    else if (g_ctrl_cfg_pkt.ctrl_mode_pitch == MAV_CTRL_MODE_DISABLED)
-      g_ctrl_cmd.cmd_pitch = 0;
-
-    // set debug info
-    g_ctrl_debug_pkt.pid_x_i_term = pid_x.sum_error;
-
-    // *************************** Y axis ctrl *********************************
-
-    if (g_ctrl_cfg_pkt.ctrl_mode_roll == MAV_CTRL_MODE_POSITION)
-    {
-      float des_y_bf  = (g_des_pose_pkt.y - g_pose_pkt.y)* g_cos_psi - (g_des_pose_pkt.x - g_pose_pkt.x) * g_sin_psi;
-      //float vel_y_bf  = g_pose_pkt.vy * g_cos_psi - g_pose_pkt.vx * g_sin_psi;
-      //float roll_rate = LLToSIAngleRateRoll (LL_1khz_attitude_data.angvel_roll);
-
-      g_ctrl_cmd.cmd_roll = -pidCalc(&pid_y, des_y_bf, -vel_y_bf, pid_y.d_base, dt); // positive roll gives you negative y
-      g_ctrl_debug_pkt.pid_error_y_bf = des_y_bf;
-    }
-    else if (g_ctrl_cfg_pkt.ctrl_mode_roll == MAV_CTRL_MODE_VELOCITY)
-    {
-      //float des_vy     = (float) g_des_pose_pkt.vy;
-      //float current_vy = (float) g_pose_pkt.vy;
-
-      float vy_error = g_des_vel_pkt.vy - vel_y_bf;
-      g_ctrl_debug_pkt.pid_error_vy_bf = vy_error;
-      g_ctrl_cmd.cmd_roll = -pidCalc(&pid_vy, vy_error, -a_y, 1.0, dt);
-    }
-
-    else if (g_ctrl_cfg_pkt.ctrl_mode_roll == MAV_CTRL_MODE_DIRECT)
-      g_ctrl_cmd.cmd_roll = g_ctrl_input_pkt.cmd_roll;
-
-    else if (g_ctrl_cfg_pkt.ctrl_mode_roll == MAV_CTRL_MODE_DISABLED)
-      g_ctrl_cmd.cmd_roll = 0;
-
-    // set debug info
-    g_ctrl_debug_pkt.pid_y_i_term = pid_y.sum_error;
-
-    // **************************** Z axis ctrl *********************************
-
-    if (g_ctrl_cfg_pkt.ctrl_mode_thrust == MAV_CTRL_MODE_DISABLED)
-    {
-      g_ctrl_cmd.cmd_thrust = 0;
-    }
-    else
-    {
-      Thrust new_cmd_thrust = g_ctrl_cmd.cmd_thrust;
-
-      if (g_ctrl_cfg_pkt.ctrl_mode_thrust == MAV_CTRL_MODE_POSITION)
-      {
-        float des_z     = g_des_pose_pkt.z;
-        float current_z = g_pose_pkt.z;
-
-        new_cmd_thrust = pidCalc(&pid_z, des_z - current_z, -vel_z, 1.0, dt);// - pid_z.kd2 * g_accel_z;
-      }
-
-      else if (g_ctrl_cfg_pkt.ctrl_mode_thrust == MAV_CTRL_MODE_VELOCITY)
-            {
-              float des_vz     = g_des_vel_pkt.vz;
-
-              new_cmd_thrust = pidCalc(&pid_vz, des_vz - vel_z, -g_accel_z, 1.0, dt);
-            }
-
-      else if (g_ctrl_cfg_pkt.ctrl_mode_thrust == MAV_CTRL_MODE_DIRECT)
-      {
-        new_cmd_thrust = g_ctrl_input_pkt.cmd_thrust;
-      }
-
-      // spike guard
-      double delta_cmd_thrust = new_cmd_thrust - g_ctrl_cmd.cmd_thrust;
-
-      if      (delta_cmd_thrust > g_ctrl_cfg_pkt.cmd_thrust_delta_limit)
-        g_ctrl_cmd.cmd_thrust += g_ctrl_cfg_pkt.cmd_thrust_delta_limit;
-      else if (delta_cmd_thrust < -g_ctrl_cfg_pkt.cmd_thrust_delta_limit)
-        g_ctrl_cmd.cmd_thrust -= g_ctrl_cfg_pkt.cmd_thrust_delta_limit;
-      else
-        g_ctrl_cmd.cmd_thrust = new_cmd_thrust;
-
-      // set debug info
-      g_ctrl_debug_pkt.pid_z_i_term = pid_z.sum_error;
-    }
-
-    // ****************************** YAW ctrl *********************************
-
-    if (g_ctrl_cfg_pkt.ctrl_mode_yaw_rate == MAV_CTRL_MODE_POSITION)
-    {
-      float des_yaw     = g_des_pose_pkt.yaw;
-      float current_yaw = g_pose_pkt.yaw;
-      float yaw_rate    = LLToSIAngleRateYaw(RO_ALL_Data.angvel_yaw);//LL_1khz_attitude_data.angvel_yaw);
-
-      float error =  des_yaw - current_yaw;
-      normalizeSIAnglePi(&error);
-
-      g_ctrl_cmd.cmd_yaw_rate = pidCalc(&pid_yaw, error, -yaw_rate, 1, dt);
-    }
-    if (g_ctrl_cfg_pkt.ctrl_mode_yaw_rate == MAV_CTRL_MODE_VELOCITY)
-      g_ctrl_cmd.cmd_yaw_rate = g_des_vel_pkt.yaw_rate;
-
-    else if (g_ctrl_cfg_pkt.ctrl_mode_yaw_rate == MAV_CTRL_MODE_DIRECT)
-      g_ctrl_cmd.cmd_yaw_rate = g_ctrl_input_pkt.cmd_yaw_rate;
-
-    else if (g_ctrl_cfg_pkt.ctrl_mode_yaw_rate == MAV_CTRL_MODE_DISABLED)
-      g_ctrl_cmd.cmd_yaw_rate = 0;
-
-    // set debug info
-    g_ctrl_debug_pkt.pid_yaw_i_term = pid_yaw.sum_error;
-
-  }
-
-  // **************************** CLAMP ********************************
-
-  // Clamp roll command
-  if      (g_ctrl_cmd.cmd_roll >  g_ctrl_cfg_pkt.cmd_roll_limit)
-    g_ctrl_cmd.cmd_roll =  g_ctrl_cfg_pkt.cmd_roll_limit;
-  else if (g_ctrl_cmd.cmd_roll < -g_ctrl_cfg_pkt.cmd_roll_limit)
-    g_ctrl_cmd.cmd_roll = -g_ctrl_cfg_pkt.cmd_roll_limit;
-
-  // Clamp pitch command
-  if      (g_ctrl_cmd.cmd_pitch >  g_ctrl_cfg_pkt.cmd_pitch_limit)
-    g_ctrl_cmd.cmd_pitch =  g_ctrl_cfg_pkt.cmd_pitch_limit;
-  else if (g_ctrl_cmd.cmd_pitch < -g_ctrl_cfg_pkt.cmd_pitch_limit)
-    g_ctrl_cmd.cmd_pitch = -g_ctrl_cfg_pkt.cmd_pitch_limit;
-
-  // Clamp yaw rate command
-  if      (g_ctrl_cmd.cmd_yaw_rate > g_ctrl_cfg_pkt.cmd_yaw_rate_limit)
-    g_ctrl_cmd.cmd_yaw_rate =  g_ctrl_cfg_pkt.cmd_yaw_rate_limit;
-  else if (g_ctrl_cmd.cmd_yaw_rate < -g_ctrl_cfg_pkt.cmd_yaw_rate_limit)
-    g_ctrl_cmd.cmd_yaw_rate = -g_ctrl_cfg_pkt.cmd_yaw_rate_limit;
-
-  // Clamp thrust command
-  if      (g_ctrl_cmd.cmd_thrust > g_ctrl_cfg_pkt.cmd_thrust_limit)
-    g_ctrl_cmd.cmd_thrust = g_ctrl_cfg_pkt.cmd_thrust_limit;
-  else if (g_ctrl_cmd.cmd_thrust < 0)
-    g_ctrl_cmd.cmd_thrust = 0;
-}
diff --git a/ccny_asctec_firmware_2/src/sdk.c b/ccny_asctec_firmware_2/src/sdk.c
deleted file mode 100644
index 148178e..0000000
--- a/ccny_asctec_firmware_2/src/sdk.c
+++ /dev/null
@@ -1,754 +0,0 @@
-/*
-
-Copyright (c) 2011, Markus Achtelik, ASL, ETH Zurich, Switzerland
-You can contact the author at <markus dot achtelik at mavt dot ethz dot ch>
-
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-* Redistributions of source code must retain the above copyright
-notice, this list of conditions and the following disclaimer.
-* Redistributions in binary form must reproduce the above copyright
-notice, this list of conditions and the following disclaimer in the
-documentation and/or other materials provided with the distribution.
-* Neither the name of ETHZ-ASL nor the
-names of its contributors may be used to endorse or promote products
-derived from this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
-ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL ETHZ-ASL BE LIABLE FOR ANY
-DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-
-*/
-
-#include <mav_common/comm_packets.h>
-#include <mav_common/comm.h>
-#include <mav_common/comm_types.h>
-
-#include "sdk.h"
-#include "main.h"
-
-#include "system.h"
-#include "LL_HL_comm.h"
-#include "uart.h"
-#include "time.h"
-#include "irq.h"
-#include "LPC214x.h"
-#include "gpsmath.h"
-
-struct WO_SDK_STRUCT WO_SDK;
-struct WO_CTRL_INPUT WO_CTRL_Input;
-struct RO_RC_DATA RO_RC_Data;
-struct WO_DIRECT_MOTOR_CONTROL WO_Direct_Motor_Control;
-
-volatile int64_t g_timestamp  = 0;
-
-int64_t timeOffset = 0;
-unsigned short time_step = 2000;
-int64_t time_correction = 0;
-extern float g_vz_p_f;
-#define MAX_TOGGLE_CMD_TIME 2000000  // maximum toggle time allowed - 2s
-
-unsigned int g_sdk_loops;             // SDK loops counter
-float g_cpu_load_sum = 0.0;           // for filtered CPU load
-
-MAV_STATUS_PKT        g_status_pkt;         // Pose + vel of MAV, from output of KF or directly from computer updates
-MAV_CTRL_CMD          g_ctrl_cmd;
-MAV_FLIGHT_STATE_PKT  g_flight_state_pkt;
-MAV_RCDATA_PKT        g_rcdata_pkt;
-MAV_CTRL_DEBUG_PKT    g_ctrl_debug_pkt;
-MAV_POSE_PKT          g_pose_pkt;           // 9D state (pose + vel) of MAV in Comm unit
-MAV_IMU_PKT           g_imu_pkt;            // imu (angles and linear accelerations)
-
-MAV_DUMMY_PKT         g_dummy_pkt;
-PacketInfo *          g_dummy_pkt_info;
-
-MAV_FLIGHT_ACTION_PKT g_flight_action_pkt;
-PacketInfo *          g_flight_action_pkt_info;
-
-MAV_TIMESYNC_PKT      g_timesync_pkt;
-PacketInfo *          g_timesync_pkt_info;
-
-MAV_TX_FREQ_CFG_PKT   g_tx_freq_cfg_pkt;
-PacketInfo *          g_tx_freq_cfg_pkt_info;
-
-MAV_PID_CFG_PKT       g_pid_cfg_pkt;
-PacketInfo *          g_pid_cfg_pkt_info;
-
-MAV_CTRL_CFG_PKT      g_ctrl_cfg_pkt;
-PacketInfo *          g_ctrl_cfg_pkt_info;
-
-MAV_CTRL_INPUT_PKT    g_ctrl_input_pkt;
-PacketInfo *          g_ctrl_input_pkt_info;
-
-MAV_DES_POSE_PKT      g_des_pose_pkt;
-PacketInfo *          g_des_pose_pkt_info;
-
-MAV_DES_VEL_PKT       g_des_vel_pkt;
-PacketInfo *          g_des_vel_pkt_info;
-
-MAV_POSE2D_PKT        g_mav_pose2D_pkt;
-PacketInfo *          g_mav_pose2D_pkt_info;
-
-MAV_HEIGHT_PKT        g_mav_height_pkt;
-PacketInfo *          g_mav_height_pkt_info;
-
-MAV_KF_CFG_PKT        g_mav_kf_cfg_pkt;
-PacketInfo *          g_mav_kf_cfg_pkt_info;
-
-// *** for MAV state machine
-
-short   g_motors_running;             // are the motors on?
-short   g_motors_status_counter;      // counts motor statuses to avoid spurios toggles
-int64_t g_toggle_motors_start_time;   // when we started toggling the motors
-//int16_t g_land_thrust;                // while landing, this is the current thrust  // TODO: type
-
-// *** for KF state estimation
-
-uint8_t g_kf_x_enabled;
-uint8_t g_kf_y_enabled;
-uint8_t g_kf_z_enabled;
-uint8_t g_kf_yaw_enabled;
-
-void sdkInit(void)
-{
-  g_sdk_loops = 0;
-  g_motors_running  = 0;
-  g_motors_status_counter = 0;
-
-  // **** these should be sent by the CPU upon successful connection
-
-  g_tx_freq_cfg_pkt.imu_period          = 0;
-  g_tx_freq_cfg_pkt.rcdata_period       = 0;
-  g_tx_freq_cfg_pkt.flight_state_period = 0;
-  g_tx_freq_cfg_pkt.pose_period         = 0;
-  g_tx_freq_cfg_pkt.status_period       = 0;
-  g_tx_freq_cfg_pkt.ctrl_debug_period   = 0;
-
-  g_tx_freq_cfg_pkt.imu_phase           = 0;
-  g_tx_freq_cfg_pkt.rcdata_phase        = 0;
-  g_tx_freq_cfg_pkt.flight_state_phase  = 0;
-  g_tx_freq_cfg_pkt.pose_phase          = 0;
-  g_tx_freq_cfg_pkt.status_phase        = 0;
-  g_tx_freq_cfg_pkt.ctrl_debug_phase    = 0;
-
-  // **** register packets to receive
-
-  g_dummy_pkt_info         = registerPacket(MAV_DUMMY_PKT_ID,         &g_dummy_pkt);
-  g_mav_pose2D_pkt_info    = registerPacket(MAV_POSE2D_PKT_ID,        &g_mav_pose2D_pkt);
-  g_mav_height_pkt_info    = registerPacket(MAV_HEIGHT_PKT_ID,        &g_mav_height_pkt);
-  g_mav_kf_cfg_pkt_info    = registerPacket(MAV_KF_CFG_PKT_ID,        &g_mav_kf_cfg_pkt);
-  g_timesync_pkt_info      = registerPacket(MAV_TIMESYNC_PKT_ID,      &g_timesync_pkt);
-  g_ctrl_cfg_pkt_info      = registerPacket(MAV_CTRL_CFG_PKT_ID,      &g_ctrl_cfg_pkt);
-  g_pid_cfg_pkt_info       = registerPacket(MAV_PID_CFG_PKT_ID,       &g_pid_cfg_pkt);
-  g_flight_action_pkt_info = registerPacket(MAV_FLIGHT_ACTION_PKT_ID, &g_flight_action_pkt);
-  g_des_pose_pkt_info      = registerPacket(MAV_DES_POSE_PKT_ID,      &g_des_pose_pkt);
-  g_ctrl_input_pkt_info    = registerPacket(MAV_CTRL_INPUT_PKT_ID,    &g_ctrl_input_pkt);
-  g_tx_freq_cfg_pkt_info   = registerPacket(MAV_TX_FREQ_CFG_PKT_ID,   &g_tx_freq_cfg_pkt);
-  g_des_vel_pkt_info       = registerPacket(MAV_DES_VEL_PKT_ID,      &g_des_vel_pkt);
-
-  UART0_rxFlush();
-  UART0_txFlush();
-
-  startAutoBaud();
-}
-
-/** SDK_mainloop(void) is triggered @ 1kHz.
- *
- * WO_(Write Only) data is written to the LL processor after
- * execution of this function.
- *
- * RO_(Read Only) data is updated before entering this function
- * and can be read to obtain information for supervision or control
- *
- * WO_ and RO_ structs are defined in sdk.h
- *
- * The struct LL_1khz_attitude_data (defined in LL_HL_comm.h) can
- * be used to read all sensor data, results of the data fusion
- * and R/C inputs transmitted from the LL-processor. This struct is
- * automatically updated at 1 kHz.
- * */
-
-void SDK_mainloop(void)
-{
-  unsigned int sdk_cycle_start_time = T1TC;
-  WO_SDK.ctrl_mode = 0x02; //0x02: absolute angle and throttle control
-
-  ++g_sdk_loops;
-
-  // add beeping to mark stay-alive
-
-  feedbackBeep();
-
-  // parse serial port for data
-
-  parseRxFifo();
-
-  // process pose updates and fusion using KalmanFilter
-
-  processKF();
-
-  // process control commands - from PID or direct motor control
-
-  processCtrl();
-
-  // process changes of motor state - if motors change from ON to OFF, or
-  // from OFF to ON (from LL read only structs) then the flight state of the
-  // vehicle is updated accordingly
-
-  processMotorStateChanges();
-
-  // process Flight action requests
-  // only when serial is enabled (rcdata[4])
-
-  processFlightActionRequests();
-
-  // process engage/disengage timeouts
-  // only allow toggle motors commands to be sent for a certain period of time
-  // after a timeout, go to error state
-
-  processEngageDisengageTimeouts();
-
-  // process landing speed
-  // gradual landing, thrust decreases over time
-
-  processLandingThrust();
-
-  // determine motor commands based on the flight state
-
-  processMotorCommands();
-
-  // check to send packet data over serial port
-
-  processSendData();
-
-  // *************************************************************************
-
-  UART_send_ringbuffer();
-
-  //synchronizeTime();
-
-  // ------------------------------------------------------------------------
-
-  unsigned int dt;
-  if (T1TC < sdk_cycle_start_time)
-    dt = (processorClockFrequency() - sdk_cycle_start_time) + T1TC;
-  else
-    dt = T1TC - sdk_cycle_start_time;
-
-  // calculate average cpu load in %
-  float cpu_load = ControllerCyclesPerSecond * ((dt * 1e2) / processorClockFrequency());
-  g_cpu_load_sum += cpu_load;
-  
-  if (g_sdk_loops % 100 == 0)
-  {
-    g_status_pkt.cpu_load = g_cpu_load_sum / 100.0;
-    g_cpu_load_sum = 0.0;
-  }
-
-  g_status_pkt.battery_voltage = HL_Status.battery_voltage_1 / 1000.0; //mv to volts
-  g_status_pkt.timestamp = g_timestamp;
-
-  //watchdog();
-}
-
-inline void writeCommand(short pitch, short roll, short yaw, short thrust, short ctrl, short enable)
-{
-  WO_CTRL_Input.pitch  = pitch;
-  WO_CTRL_Input.roll   = roll;
-  WO_CTRL_Input.thrust = thrust;
-  WO_CTRL_Input.yaw    = yaw;
-  WO_CTRL_Input.ctrl   = ctrl;
-  WO_SDK.ctrl_enabled  = enable;
-}
-
-inline void sendMavPoseData(void)
-{
-  writePacket2Ringbuffer(MAV_POSE_PKT_ID, (unsigned char*)&g_pose_pkt, sizeof(g_pose_pkt));
-}
-
-inline void sendImuData(void)
-{
-  g_imu_pkt.roll  = LLToSIAngleRoll (RO_ALL_Data.angle_roll); //LL_1khz_attitude_data.angle_roll);
-  g_imu_pkt.pitch = LLToSIAnglePitch(RO_ALL_Data.angle_pitch); //LL_1khz_attitude_data.angle_pitch);
-  g_imu_pkt.yaw   = LLToSIAngleYaw  (RO_ALL_Data.angle_yaw); //LL_1khz_attitude_data.angle_yaw);
-  g_imu_pkt.roll_rate  = LLToSIAngleRateRoll (RO_ALL_Data.angvel_roll); //LL_1khz_attitude_data.angvel_roll);
-  g_imu_pkt.pitch_rate = LLToSIAngleRatePitch(RO_ALL_Data.angvel_pitch);//LL_1khz_attitude_data.angvel_pitch);
-  g_imu_pkt.yaw_rate   = LLToSIAngleRateYaw  (RO_ALL_Data.angvel_yaw);//LL_1khz_attitude_data.angvel_yaw);
-  writePacket2Ringbuffer(MAV_IMU_PKT_ID, (unsigned char*)&g_imu_pkt, sizeof(g_imu_pkt));
-}
-
-inline void sendFlightStateData(void)
-{
-  writePacket2Ringbuffer(MAV_FLIGHT_STATE_PKT_ID, (unsigned char*)&g_flight_state_pkt, sizeof(g_flight_state_pkt));
-}
-
-inline void sendRcData(void)
-{
-  unsigned int i;
-  for (i = 0; i < 8; ++i)
-    g_rcdata_pkt.channel[i] = RO_RC_Data.channel[i];
-
-  writePacket2Ringbuffer(MAV_RCDATA_PKT_ID, (unsigned char*)&g_rcdata_pkt, sizeof(g_rcdata_pkt));
-}
-
-inline void sendStatusData(void)
-{
-  writePacket2Ringbuffer(MAV_STATUS_PKT_ID, (unsigned char*)&g_status_pkt, sizeof(g_status_pkt));
-}
-
-inline void sendCtrlDebugData(void)
-{
-  // debug packet - takes commands that were written to control
-  // and sends back up to CPU
-
-  g_ctrl_debug_pkt.cmd_roll_LL           = WO_CTRL_Input.roll ;
-  g_ctrl_debug_pkt.cmd_pitch_LL          = WO_CTRL_Input.pitch ;
-  g_ctrl_debug_pkt.cmd_yaw_rate_LL       = WO_CTRL_Input.yaw ;
-  g_ctrl_debug_pkt.cmd_thrust_LL         = WO_CTRL_Input.thrust;
-
-  g_ctrl_debug_pkt.roll_limit     = - SIToLLCmdRoll(g_ctrl_cfg_pkt.cmd_roll_limit); // -1 for coordinate system
-  g_ctrl_debug_pkt.pitch_limit    =   SIToLLCmdPitch(g_ctrl_cfg_pkt.cmd_pitch_limit);
-  g_ctrl_debug_pkt.yaw_rate_limit =   SIToLLCmdYawRate(g_ctrl_cfg_pkt.cmd_yaw_rate_limit);
-  g_ctrl_debug_pkt.thrust_limit   =   SIToLLCmdThrust(g_ctrl_cfg_pkt.cmd_thrust_limit);
-
-  g_ctrl_debug_pkt.ctrl_mode_roll = g_ctrl_cfg_pkt.ctrl_mode_roll;
-  g_ctrl_debug_pkt.ctrl_mode_pitch = g_ctrl_cfg_pkt.ctrl_mode_pitch;
-  g_ctrl_debug_pkt.ctrl_mode_yaw_rate  = g_ctrl_cfg_pkt.ctrl_mode_yaw_rate;
-  g_ctrl_debug_pkt.ctrl_mode_thrust =  g_ctrl_cfg_pkt.ctrl_mode_thrust;
-
-  writePacket2Ringbuffer(MAV_CTRL_DEBUG_PKT_ID, (unsigned char*)&g_ctrl_debug_pkt, sizeof(g_ctrl_debug_pkt));
-}
-
-inline unsigned short isSerialEnabled(void)
-{
-  return RO_RC_Data.channel[4];
-}
-
-inline void synchronizeTime(void)
-{
-  // check for timesync packet
-  if (g_timesync_pkt_info->updated)
-  {
-    timeOffset = (900*timeOffset + 100 * (g_timesync_pkt.ts1 * 2 - g_timesync_pkt.tc1 - g_timestamp) / 2) / 1000;
-    g_status_pkt.timesync_offset = timeOffset;
-
-    if (timeOffset > 1e7 || timeOffset < -1e7)
-    {
-      g_timestamp = g_timesync_pkt.ts1;
-      timeOffset = 0;
-    }
-    else if (timeOffset > 2000)
-      timeOffset = 2000;
-    else if (timeOffset < -2000)
-      timeOffset = -2000;
-
-    if (timeOffset > 0)
-    {
-      time_step = 4000 / timeOffset;
-      time_correction = 1;
-    }
-    else if (timeOffset < 0)
-    {
-      time_step = -4000 / timeOffset;
-      time_correction = -1;
-    }
-    else
-    {
-      time_step = 4000;
-      time_correction = 0;
-    }
-
-    g_timesync_pkt_info->updated = 0;
-  }
-
-  // correct timestamp every step sdkloops by one us
-  if (g_sdk_loops % time_step == 0)
-  {
-    g_timestamp += time_correction;
-  }
-
-  if (g_sdk_loops % 2000 == 0)
-  {
-    g_timesync_pkt.tc1 = g_timestamp;
-    g_timesync_pkt.ts1 = 0;
-    writePacket2Ringbuffer(MAV_TIMESYNC_PKT_ID, (unsigned char*)&g_timesync_pkt, sizeof(g_timesync_pkt));
-    UART_send_ringbuffer();
-  }
-}
-/*
-inline void watchdog(void)
-{
-  static uint32_t lastTxPackets = 0;
-
-  // check if a valid packet arrived in the HLI_COMMUNICATION_TIMEOUT s
-  if ((g_sdk_loops % (ControllerCyclesPerSecond  * HLI_COMMUNICATION_TIMEOUT )) == 0)
-  {
-    if (UART_rxGoodPacketCount == lastTxPackets)
-    {
-      startAutoBaud();
-    }
-    lastTxPackets = UART_rxGoodPacketCount;
-  }
-}
-*/
-
-inline int checkTxPeriod(uint16_t period, uint16_t phase)
-{
-  if (period == 0)
-    return 0;
-  else
-    return g_sdk_loops % period == phase;
-}
-
-inline void processKF()
-{
-  if (g_mav_kf_cfg_pkt_info->updated)
-  {
-    g_mav_kf_cfg_pkt_info->updated = 0;
-
-    uint8_t kf_reset = 0;
-
-    kf_reset         = g_mav_kf_cfg_pkt.enable_mask & (1<<MAV_KF_RESET_BIT);
-    g_kf_x_enabled   = g_mav_kf_cfg_pkt.enable_mask & (1<<MAV_KF_X_BIT);
-    g_kf_y_enabled   = g_mav_kf_cfg_pkt.enable_mask & (1<<MAV_KF_Y_BIT);
-    g_kf_z_enabled   = g_mav_kf_cfg_pkt.enable_mask & (1<<MAV_KF_Z_BIT);
-    g_kf_yaw_enabled = g_mav_kf_cfg_pkt.enable_mask & (1<<MAV_KF_YAW_BIT);
-
-    kal_x.Sigma2Q1 = g_mav_kf_cfg_pkt.Q_x;
-    kal_x.Sigma2Q2 = g_mav_kf_cfg_pkt.Q_x;
-    kal_x.Sigma2R1 = g_mav_kf_cfg_pkt.R_x;
-    kal_x.Sigma2R2 = g_mav_kf_cfg_pkt.R_vx;
-
-    kal_y.Sigma2Q1 = g_mav_kf_cfg_pkt.Q_y;
-    kal_y.Sigma2Q2 = g_mav_kf_cfg_pkt.Q_y;
-    kal_y.Sigma2R1 = g_mav_kf_cfg_pkt.R_y;
-    kal_y.Sigma2R2 = g_mav_kf_cfg_pkt.R_vy;
-
-    kal_z.Sigma2Q1 = g_mav_kf_cfg_pkt.Q_z;
-    kal_z.Sigma2Q2 = g_mav_kf_cfg_pkt.Q_z;
-    kal_z.Sigma2R1 = g_mav_kf_cfg_pkt.R_z;
-    kal_z.Sigma2R2 = g_mav_kf_cfg_pkt.R_vz_p;
-
-    kal_yaw.Sigma2Q = g_mav_kf_cfg_pkt.Q_yaw;
-    kal_yaw.Sigma2R = g_mav_kf_cfg_pkt.R_yaw;
-
-    if (kf_reset != 0) resetKalmanFilter();
-  }
-
-  KFilter();
-
-  // **** Update pose based on Kalman Filter (or direct CPU updates)
-
-  if (g_kf_yaw_enabled != 0)
-  {
-    g_pose_pkt.yaw = kal_out.yaw_filtered;
-  }
-  else
-  {
-    g_pose_pkt.yaw = g_mav_pose2D_pkt.yaw;
-  }
-
-  if (g_kf_x_enabled != 0)
-  {
-    g_pose_pkt.x  = kal_out.pos_filtered[0];
-    g_pose_pkt.vx = kal_out.vel_filtered[0];
-  }
-  else
-  {
-    g_pose_pkt.x  = g_mav_pose2D_pkt.x;
-    g_pose_pkt.vx = g_mav_pose2D_pkt.vx;
-  }
-
-  if (g_kf_y_enabled != 0)
-  {
-    g_pose_pkt.y  = kal_out.pos_filtered[1];
-    g_pose_pkt.vy = kal_out.vel_filtered[1];
-  }
-  else
-  {
-    g_pose_pkt.y  = g_mav_pose2D_pkt.y;
-    g_pose_pkt.vy = g_mav_pose2D_pkt.vy;
-  }
-
-  if (g_kf_z_enabled != 0)
-  {
-    g_pose_pkt.z  = kal_out.pos_filtered[2];
-    g_pose_pkt.vz = kal_out.vel_filtered[2];
-  }
-  else
-  {
-    g_pose_pkt.z  = g_mav_height_pkt.z;
-    g_pose_pkt.vz = g_mav_height_pkt.vz;
-  }
-
-  g_pose_pkt.roll  = LLToSIAngleRoll (RO_ALL_Data.angle_roll);
-  g_pose_pkt.pitch = LLToSIAnglePitch(RO_ALL_Data.angle_pitch);
-}
-
-
-inline void feedbackBeep()
-{
-  if (g_flight_state_pkt.state == MAV_STATE_ERROR)
-  {
-    // High frequency ERROR beep
-    if (g_sdk_loops % 100 == 0)
-      beeper(ON);
-    if (g_sdk_loops % 100 == 50)
-      beeper(OFF);
-  }
-  else if (isSerialEnabled() != 0)
-  {
-    // Double beep, serial is enabled
-    if (g_sdk_loops % 1000 ==  0 || g_sdk_loops % 1000 == 100)
-      beeper(ON);
-    if (g_sdk_loops % 1000 == 50 || g_sdk_loops % 1000 == 150)
-      beeper(OFF);
-  }
-  else
-  {
-    // Single beep, serial disable
-    if (g_sdk_loops % 1000 == 0)
-      beeper(ON);
-    if (g_sdk_loops % 1000 == 50)
-      beeper(OFF);
-  }
-}
-/*
-inline void processMotorStateChanges()
-{
-  short motors_running = LL_1khz_attitude_data.status2 & 0x1;
-
-  if (g_motors_running == 0 && motors_running != 0)
-  {
-    // motors just changed from to ON from Remote command
-    g_flight_state_pkt.state = MAV_STATE_IDLE;
-  }
-  else if (g_motors_running != 0 && motors_running == 0)
-  {
-    if (g_flight_state_pkt.state != MAV_STATE_ERROR)
-    {
-      // motors just changed from ON to OFF
-      g_flight_state_pkt.state = MAV_STATE_OFF;
-    }
-  }
-
-  g_motors_running = motors_running;
-}
-*/
-
-inline void processMotorStateChanges()
-{
-  int MOTOR_COUNTER_MAX = 5;
-  short motors_status = LL_1khz_attitude_data.status2 & 0x1;
-
-  // counter to avoid spurious changes
-  if (motors_status == 0) g_motors_status_counter--;
-  else g_motors_status_counter++;
-
-  // save prev state
-  int prev_motors_running = g_motors_running;
-
-  // constrain counter to [0, MOTOR_COUNTER_MAX]
-  if (g_motors_status_counter >= MOTOR_COUNTER_MAX)
-  {
-    g_motors_status_counter = MOTOR_COUNTER_MAX;
-    g_motors_running = 1;
-  }
-  if (g_motors_status_counter < 0)
-  {
-    g_motors_status_counter = 0;
-    g_motors_running = 0;
-  }
-
-  if (prev_motors_running == 0 && g_motors_running == 1)
-  {
-    // motors just changed from to ON from Remote command
-    g_flight_state_pkt.state = MAV_STATE_IDLE;
-  }
-  else if (prev_motors_running == 1 && g_motors_running == 0)
-  {
-    if (g_flight_state_pkt.state != MAV_STATE_ERROR)
-    {
-      // motors just changed from ON to OFF
-      g_flight_state_pkt.state = MAV_STATE_OFF;
-    }
-  }
-}
-
-inline void processFlightActionRequests()
-{
-  if (g_flight_action_pkt_info->updated)
-  {
-    if(isSerialEnabled() != 0)
-    {
-      if (g_flight_action_pkt.action == MAV_ACTION_TOGGLE_ENGAGE)
-      {
-        if (g_flight_state_pkt.state == MAV_STATE_OFF)
-        {
-          g_flight_state_pkt.state = MAV_STATE_ENGAGING;
-          g_toggle_motors_start_time = g_timestamp;
-        }
-        else if (g_flight_state_pkt.state == MAV_STATE_IDLE)
-        {
-          g_flight_state_pkt.state = MAV_STATE_DISENGAGING;
-          g_toggle_motors_start_time = g_timestamp;
-        }
-      }
-      else if (g_flight_action_pkt.action == MAV_ACTION_ESTOP)
-      {
-        // estop
-        g_flight_state_pkt.state = MAV_STATE_ERROR;
-      }
-      else if (g_flight_action_pkt.action == MAV_ACTION_TAKEOFF)
-      {
-        if (g_flight_state_pkt.state == MAV_STATE_IDLE)
-        {
-          // takeoff
-          g_flight_state_pkt.state = MAV_STATE_FLYING;
-
-          // reset the PID controls
-          pidReset();
-        }
-      }
-      else if (g_flight_action_pkt.action == MAV_ACTION_LAND)
-      {
-        if (g_flight_state_pkt.state == MAV_STATE_FLYING)
-        {
-          // land
-          g_flight_state_pkt.state = MAV_STATE_LANDING;
-
-          //g_land_thrust = g_ctrl_cmd.cmd_thrust;
-        }
-      }
-    }
-
-    g_flight_action_pkt_info->updated = 0;
-  }
-}
-
-inline void processEngageDisengageTimeouts()
-{
-  if (g_flight_state_pkt.state == MAV_STATE_ENGAGING || g_flight_state_pkt.state == MAV_STATE_DISENGAGING)
-  {
-    if (g_timestamp - g_toggle_motors_start_time >= MAX_TOGGLE_CMD_TIME)
-    {
-      // go to error state
-      g_flight_state_pkt.state = MAV_STATE_ERROR;
-    }
-  }
-}
-
-inline void processLandingThrust()
-{
-  if (g_flight_state_pkt.state == MAV_STATE_LANDING)
-  {
-   /* while (g_pose_pkt.z > 0.30) //TODO include desired landing height in the packet
-    {
-      g_ctrl_cfg_pkt.ctrl_mode_pitch = MAV_CTRL_MODE_POSITION;
-      g_ctrl_cfg_pkt.ctrl_mode_roll = MAV_CTRL_MODE_POSITION;
-      g_des_vel_pkt.vz = 0.3; // TODO include desired landing velocity in the packet
-      processCtrl();
-    }*/
-
-    if (g_ctrl_cmd.cmd_thrust > 0)
-    {
-      // still landing - decrease thrust
-
-      if (g_sdk_loops % LAND_THRUST_DECREASE_PERIOD == 0)
-        g_ctrl_cmd.cmd_thrust -= LAND_THRUST_DECREASE_STEP;
-
-      if (g_ctrl_cmd.cmd_thrust < 0) g_ctrl_cmd.cmd_thrust = 0; // prevent from going under 0
-    }
-    else
-    {
-      g_flight_state_pkt.state = MAV_STATE_IDLE;
-    }
-  }
-}
-
-inline void processMotorCommands()
-{
-  if (g_flight_state_pkt.state == MAV_STATE_ERROR)
-  {
-    // TODO: real estop here!
-    writeCommand(0, 0, 0, 0, 0, 0);
-  }
-  else if (g_flight_state_pkt.state == MAV_STATE_ENGAGING || g_flight_state_pkt.state == MAV_STATE_DISENGAGING )
-  {
-    writeCommand(0, 0, 2047, 0, MAV_LL_CMD_YAW_RATE_MASK | MAV_LL_CMD_THRUST_MASK, 1);
-  }
-  else if (g_flight_state_pkt.state == MAV_STATE_IDLE || g_flight_state_pkt.state == MAV_STATE_OFF)
-  {
-    writeCommand(0, 0, 0, 0, MAV_LL_CMD_RPYT_MASK, 1);
-  }
-  else if (g_flight_state_pkt.state == MAV_STATE_LANDING)
-  {
-    writeCommand(0, 0, 0, SIToLLCmdThrust(g_ctrl_cmd.cmd_thrust), MAV_LL_CMD_THRUST_MASK, 1);
-  }
-  else if (g_flight_state_pkt.state == MAV_STATE_FLYING)
-  {
-    // fill out debug packet
-    g_ctrl_debug_pkt.cmd_roll     = g_ctrl_cmd.cmd_roll;
-    g_ctrl_debug_pkt.cmd_pitch    = g_ctrl_cmd.cmd_pitch;
-    g_ctrl_debug_pkt.cmd_yaw_rate = g_ctrl_cmd.cmd_yaw_rate;
-    g_ctrl_debug_pkt.cmd_thrust   = g_ctrl_cmd.cmd_thrust;
-
-    WO_CTRL_Input.roll   = SIToLLCmdRoll   (g_ctrl_cmd.cmd_roll);
-    WO_CTRL_Input.pitch  = SIToLLCmdPitch  (g_ctrl_cmd.cmd_pitch);
-    WO_CTRL_Input.yaw    = SIToLLCmdYawRate(g_ctrl_cmd.cmd_yaw_rate);
-    WO_CTRL_Input.thrust = SIToLLCmdThrust (g_ctrl_cmd.cmd_thrust);
-
-    short ctrl_mask = 0x00;
-
-    if (g_ctrl_cfg_pkt.ctrl_mode_roll     != MAV_CTRL_MODE_DISABLED) ctrl_mask |= MAV_LL_CMD_ROLL_MASK;
-    if (g_ctrl_cfg_pkt.ctrl_mode_pitch    != MAV_CTRL_MODE_DISABLED) ctrl_mask |= MAV_LL_CMD_PITCH_MASK;
-    if (g_ctrl_cfg_pkt.ctrl_mode_yaw_rate != MAV_CTRL_MODE_DISABLED) ctrl_mask |= MAV_LL_CMD_YAW_RATE_MASK;
-    if (g_ctrl_cfg_pkt.ctrl_mode_thrust   != MAV_CTRL_MODE_DISABLED) ctrl_mask |= MAV_LL_CMD_THRUST_MASK;
-
-    WO_CTRL_Input.ctrl  = ctrl_mask;
-    WO_SDK.ctrl_enabled = 0x01;
-  }
-}
-
-inline void processSendData()
-{
-  if (checkTxPeriod(g_tx_freq_cfg_pkt.rcdata_period, g_tx_freq_cfg_pkt.rcdata_phase))
-  {
-    sendRcData();
-  }
-
-  if (checkTxPeriod(g_tx_freq_cfg_pkt.imu_period, g_tx_freq_cfg_pkt.imu_phase))
-  {
-    sendImuData();
-  }
-
-  if (checkTxPeriod(g_tx_freq_cfg_pkt.flight_state_period, g_tx_freq_cfg_pkt.flight_state_phase))
-  {
-    sendFlightStateData();
-  }
-
-  if (checkTxPeriod(g_tx_freq_cfg_pkt.pose_period, g_tx_freq_cfg_pkt.pose_phase))
-  {
-    sendMavPoseData();
-  }
-
-  if (checkTxPeriod(g_tx_freq_cfg_pkt.status_period, g_tx_freq_cfg_pkt.status_phase ))
-  {
-    sendStatusData();
-  }
-
-  if (checkTxPeriod(g_tx_freq_cfg_pkt.ctrl_debug_period, g_tx_freq_cfg_pkt.ctrl_debug_phase))
-  {
-    sendCtrlDebugData();
-  }
-}
-
diff --git a/ccny_asctec_firmware_2/src/ssp.c b/ccny_asctec_firmware_2/src/ssp.c
deleted file mode 100644
index 5ca326a..0000000
--- a/ccny_asctec_firmware_2/src/ssp.c
+++ /dev/null
@@ -1,379 +0,0 @@
-/*
-
-Copyright (c) 2011, Ascending Technologies GmbH
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
- * Redistributions of source code must retain the above copyright notice,
-   this list of conditions and the following disclaimer.
- * Redistributions in binary form must reproduce the above copyright
-   notice, this list of conditions and the following disclaimer in the
-   documentation and/or other materials provided with the distribution.
-
-THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND ANY
-EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY
-DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
-OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
-DAMAGE.
-
- */
-
-#include "LPC214x.h"			/* LPC21XX Peripheral Registers	*/
-#include "type.h"
-#include "irq.h"
-#include "ssp.h"
-#include "main.h"
-#include "system.h"
-#include "LL_HL_comm.h"
-#include "sdk.h"
-
-char SPIWRData[128];
-char SPIRDData[128];
-int CurrentTxIndex;
-int CurrentRxIndex;
-unsigned int SPIWR_num_bytes;
-
-volatile unsigned int SSP_trans_cnt=0;
-
-unsigned char data_sent_to_LL=1;
-
-unsigned char SSP_receiption_complete=1;
-
-char data_sent_to_HL=1;
-
-inline void SSPReceive(unsigned char);
-
-void SSPHandler (void) __irq
-{
-    int regValue;
-    unsigned short input_data;
-//    unsigned char timeout=0;
-
-    IENABLE;				/* handles nested interrupt */
-
-    regValue = SSPMIS;
-    if ( regValue & SSPMIS_RORMIS )	/* Receive overrun interrupt */
-    {
-		SSPICR = SSPICR_RORIC;		/* clear interrupt */
-    }
-    if ( regValue & SSPMIS_RTMIS )	/* Receive timeout interrupt */
-    {
-		SSPICR = SSPICR_RTIC;		/* clear interrupt */
-    }
-
-    if ( regValue & SSPMIS_RXMIS )	/* Rx at least half full */
-    {
-    			/* receive until it's empty */
-	while ( SSPSR & SSPSR_RNE )
-	{
-		input_data=SSPDR;
-	    //SSPReceive(input_data&0xFF);
-	    //SSPReceive(input_data>>8);
-
-		SSP_rx_handler_HL(input_data&0xFF);
-		SSP_rx_handler_HL(input_data>>8);
-
-		//SSP_trans_cnt+=2;
-	    /* Wait until the Busy bit is cleared */
-	//    while ( (!(SSPSR & SSPSR_BSY) )&&(timeout++<50) );
-	}				/* interrupt will be cleared when */
-					/* data register is read or written */
-    }
-
-    if ( regValue & SSPMIS_TXMIS )	/* Tx at least half empty */
-    {
-	/* transmit until it's full */
-	while ( (SSPSR & SSPSR_TNF) )
-	{
-	    if(CurrentTxIndex<SPIWR_num_bytes)
-	    {
-	    	SSPDR = SPIWRData[CurrentTxIndex]|(SPIWRData[CurrentTxIndex+1]<<8);
-	    	CurrentTxIndex+=2;
-	    }
-	    else
-	    {
-	    	CurrentTxIndex=0;
-	    	SPIWR_num_bytes=0;
-	    	data_sent_to_LL=1;
-			SSPDR=0;
-	    }
-
-	    /* Wait until the Busy bit is cleared */
-	//    while ( !(SSPSR & SSPSR_BSY) );
-	}				/* interrupt will be cleared when */
-					/* data register is read or written */
-    }
-
-    IDISABLE;
-    VICVectAddr = 0;		/* Acknowledge Interrupt */
-}
-
-void LL_write_init(void)
-{
-		SPIWRData[0]='>';
-		SPIWRData[1]='*';
-		SPIWRData[2]='>';
-}
-
-int LL_write(unsigned char *data, unsigned short cnt, unsigned char PD )	//write data to high-level processor
-{
-	unsigned int i;
-
-	if(data_sent_to_LL)
-	{
-		SPIWRData[3]=PD;
-		for(i=0; i<cnt; i++)
-		{
-			SPIWRData[i+4]=data[i];
-		}
-		SPIWRData[cnt+4]=0;
-		SPIWR_num_bytes=cnt+5;
-	}
-	else if(SPIWR_num_bytes+cnt<127)
-	{
-		SPIWRData[SPIWR_num_bytes-1]='>';
-		SPIWRData[0+SPIWR_num_bytes]='*';
-		SPIWRData[1+SPIWR_num_bytes]='>';
-		SPIWRData[2+SPIWR_num_bytes]=PD;
-		for(i=SPIWR_num_bytes; i<cnt+SPIWR_num_bytes; i++)
-		{
-			SPIWRData[i+3]=data[i-SPIWR_num_bytes];
-		}
-		SPIWR_num_bytes+=cnt+5;
-		SPIWRData[SPIWR_num_bytes-1]=0;
-	}
-	else return(0);
-	data_sent_to_LL=0;
-
-	return(1);
-}
-
-
-
-
-
-/* old file
-#include "LPC214x.h"			 //LPC21XX Peripheral Registers
-#include "type.h"
-#include "irq.h"
-#include "ssp.h"
-#include "main.h"
-#include "system.h"
-#include "LL_HL_comm.h"
-
-char SPIWRData[128];
-char SPIRDData[128];
-int CurrentTxIndex;
-int CurrentRxIndex;
-unsigned int SPIWR_num_bytes;
-
-volatile unsigned int SSP_trans_cnt=0;
-
-unsigned char data_sent_to_LL=1;
-
-unsigned char SSP_receiption_complete=1;
-unsigned char IMU_CalcData_updated=0;
-
-
-char data_sent_to_HL=1;
-
-inline void SSPReceive(unsigned char);
-
-void SSPHandler (void) __irq
-{
-    int regValue;
-    unsigned short input_data;
-//    unsigned char timeout=0;
-
-    IENABLE;				// handles nested interrupt
-
-    regValue = SSPMIS;
-    if ( regValue & SSPMIS_RORMIS )	// Receive overrun interrupt
-    {
-		SSPICR = SSPICR_RORIC;		// clear interrupt
-    }
-    if ( regValue & SSPMIS_RTMIS )	// Receive timeout interrupt
-    {
-		SSPICR = SSPICR_RTIC;		// clear interrupt
-    }
-
-    if ( regValue & SSPMIS_RXMIS )	// Rx at least half full
-    {
-    			// receive until it's empty
-	while ( SSPSR & SSPSR_RNE )
-	{
-		input_data=SSPDR;
-	    //SSPReceive(input_data&0xFF);
-	    //SSPReceive(input_data>>8);
-
-		SSP_rx_handler_HL(input_data&0xFF);
-		SSP_rx_handler_HL(input_data>>8);
-
-		//SSP_trans_cnt+=2;
-	    // Wait until the Busy bit is cleared
-	//    while ( (!(SSPSR & SSPSR_BSY) )&&(timeout++<50) );
-	}				// interrupt will be cleared when
-					// data register is read or written
-    }
-
-    if ( regValue & SSPMIS_TXMIS )	// Tx at least half empty
-    {
-	// transmit until it's full
-	while ( (SSPSR & SSPSR_TNF) )
-	{
-	    if(CurrentTxIndex<SPIWR_num_bytes)
-	    {
-	    	SSPDR = SPIWRData[CurrentTxIndex]|(SPIWRData[CurrentTxIndex+1]<<8);
-	    	CurrentTxIndex+=2;
-	    }
-	    else
-	    {
-	    	CurrentTxIndex=0;
-	    	SPIWR_num_bytes=0;
-	    	data_sent_to_LL=1;
-			SSPDR=0;
-	    }
-
-	    // Wait until the Busy bit is cleared
-	//    while ( !(SSPSR & SSPSR_BSY) );
-	}				// interrupt will be cleared when
-					// data register is read or written
-    }
-
-    IDISABLE;
-    VICVectAddr = 0;		// Acknowledge Interrupt
-}
-
-
-inline void SSPReceive(unsigned char SPI_rxdata)
-{
-	static unsigned char SPI_syncstate=0;
-	static unsigned char SPI_rxcount=0;
-	static unsigned char *SPI_rxptr;
-	static volatile unsigned char incoming_data;
-
-        //receive handler
-        if (SPI_syncstate==0)
-		{
-			if (SPI_rxdata=='>') SPI_syncstate++; else SPI_syncstate=0;
-		}
-		else if (SPI_syncstate==1)
-		{
-			if (SPI_rxdata=='*') SPI_syncstate++; else SPI_syncstate=0;
-		}
-		else if (SPI_syncstate==2)
-		{
-			if (SPI_rxdata=='>') SPI_syncstate++; else SPI_syncstate=0;
-		}
-		else if (SPI_syncstate==3)
-		{
-			if (SPI_rxdata==PD_IMUCALCDATA) //IMU CalcData
-			{
-				SPI_rxcount=sizeof(IMU_CalcData);
-				SPI_rxptr=(unsigned char *)&IMU_CalcData_tmp;
-				SPI_syncstate=4;
-				incoming_data=PD_IMUCALCDATA;
-			}
-			else if (SPI_rxdata==PD_IMURAWDATA) //IMU CalcData
-			{
-				SPI_rxcount=sizeof(IMU_RawData);
-				SPI_rxptr=(unsigned char *)&IMU_RawData;
-				SPI_syncstate=4;
-				incoming_data=PD_IMURAWDATA;
-			}
-            else SPI_syncstate=0;
-        }
-        else if (SPI_syncstate==4)
-		{
-			SPI_rxcount--;
-			*SPI_rxptr=SPI_rxdata;
-			SPI_rxptr++;
-			if (SPI_rxcount==0)
-        	{
-             	SPI_syncstate=5;
-             	if(incoming_data==PD_IMUCALCDATA)
-             	{
-             		IMU_CalcData_updated=1;
-             	}
-             	incoming_data=0;
-        	}
-		}
-		else if(SPI_syncstate==5) //check if another packet is pending
-		{
-			if(SPI_rxdata==0)
-			{
-				SPI_syncstate=0;
-			}
-			else SPI_syncstate=1;
-		}
-		else SPI_syncstate=0;
-
-		if(!SPI_syncstate) SSP_receiption_complete=1;
-		else SSP_receiption_complete=0;
-}
-
-void LL_write_init(void)
-{
-		SPIWRData[0]='>';
-		SPIWRData[1]='*';
-		SPIWRData[2]='>';
-}
-
-int LL_write(unsigned char *data, unsigned short cnt, unsigned char PD )	//write data to high-level processor
-{
-	unsigned int i;
-//
-//	if(data_sent_to_LL)
-//	{
-		//SSP_trans_cnt++;
-//		if(!SPIWR_num_bytes)
-//		{
-//			SPIWRData[3]=PD;
-//			for(i=0; i<cnt; i++)
-//			{
-//				SPIWRData[i+4]=data[i];
-//			}
-//			SPIWRData[cnt+4]=0;
-//			SPIWR_num_bytes=cnt+5;
-
-//		}
-//	}
-
-	if(data_sent_to_LL)
-	{
-		SPIWRData[3]=PD;
-		for(i=0; i<cnt; i++)
-		{
-			SPIWRData[i+4]=data[i];
-		}
-		SPIWRData[cnt+4]=0;
-		SPIWR_num_bytes=cnt+5;
-	}
-	else if(SPIWR_num_bytes+cnt<127)
-	{
-		SPIWRData[SPIWR_num_bytes-1]='>';
-		SPIWRData[0+SPIWR_num_bytes]='*';
-		SPIWRData[1+SPIWR_num_bytes]='>';
-		SPIWRData[2+SPIWR_num_bytes]=PD;
-		for(i=SPIWR_num_bytes; i<cnt+SPIWR_num_bytes; i++)
-		{
-			SPIWRData[i+3]=data[i-SPIWR_num_bytes];
-		}
-		SPIWR_num_bytes+=cnt+5;
-		SPIWRData[SPIWR_num_bytes-1]=0;
-	}
-	else return(0);
-	data_sent_to_LL=0;
-
-	return(1);
-}
- //end old file */
-
diff --git a/ccny_asctec_firmware_2/src/syscalls.c b/ccny_asctec_firmware_2/src/syscalls.c
deleted file mode 100644
index b44bf00..0000000
--- a/ccny_asctec_firmware_2/src/syscalls.c
+++ /dev/null
@@ -1,169 +0,0 @@
-/***********************************************************************/
-/*                                                                     */
-/*  SYSCALLS.C:  System Calls Remapping                                */
-/*  most of this is from newlib-lpc and a Keil-demo                    */
-/*                                                                     */
-/*  these are "reentrant functions" as needed by                       */
-/*  the WinARM-newlib-config, see newlib-manual                        */
-/*  collected and modified by Martin Thomas                            */
-/*  TODO: some more work has to be done on this                        */
-/***********************************************************************/
-
-#include <stdlib.h>
-#include <reent.h>
-#include <sys/stat.h>
-#include "uart.h"
-
-// new code for _read_r provided by Alexey Shusharin - Thanks
-_ssize_t _read_r(struct _reent *r, int file, void *ptr, size_t len)
-{
-  char c;
-  int  i;
-  unsigned char *p;
-
-  p = (unsigned char*)ptr;
-
-  for (i = 0; i < len; i++)
-  {
-    c = UARTReadChar();
-
-    *p++ = c;
-    UARTWriteChar(c);
-
-    if (c == 0x0D && i <= (len - 2))
-    {
-      *p = 0x0A;
-      UARTWriteChar(0x0A);
-      return i + 2;
-    }
-  }
-  return i;
-}
-
-
-#if 0
-// old version - no longer in use
-_ssize_t _read_r(
-    struct _reent *r, 
-    int file, 
-    void *ptr, 
-    size_t len)
-{
-	char c;
-	int  i;
-	unsigned char *p;
-	
-	p = (unsigned char*)ptr;
-	
-	for (i = 0; i < len; i++) {
-		// c = uart0Getch();
-		c = UARTReadChar();
-		if (c == 0x0D) {
-			*p='\0';
-			break;
-		}
-		*p++ = c;
-		UARTWriteChar(c);
-	}
-	return len - i;
-}
-#endif
-
-_ssize_t _write_r (
-    struct _reent *r, 
-    int file, 
-    const void *ptr, 
-    size_t len)
-{
-	int i;
-	const unsigned char *p;
-	
-	p = (const unsigned char*) ptr;
-	
-	for (i = 0; i < len; i++) {
-		if (*p == '\n' ) UARTWriteChar('\r');
-		UARTWriteChar(*p++);
-	}
-	
-	return len;
-}
-
-int _close_r(
-    struct _reent *r, 
-    int file)
-{
-	return 0;
-}
-
-_off_t _lseek_r(
-    struct _reent *r, 
-    int file, 
-    _off_t ptr, 
-    int dir)
-{
-	return (_off_t)0;	/*  Always indicate we are at file beginning.	*/
-}
-
-
-int _fstat_r(
-    struct _reent *r, 
-    int file, 
-    struct stat *st)
-{
-	/*  Always set as character device.				*/
-	st->st_mode = S_IFCHR;	
-		/* assigned to strong type with implicit 	*/
-		/* signed/unsigned conversion.  Required by 	*/
-		/* newlib.					*/
-
-	return 0;
-}
-
-int isatty(int file); /* avoid warning */
-
-int isatty(int file)
-{
-	return 1;
-}
-
-#if 0
-static void _exit (int n) {
-label:  goto label; /* endless loop */
-}
-#endif 
-
-/* "malloc clue function" */
-
-	/**** Locally used variables. ****/
-extern char _end[];              /*  end is set in the linker command 	*/
-				/* file and is the end of statically 	*/
-				/* allocated data (thus start of heap).	*/
-
-static char *heap_ptr;		/* Points to current end of the heap.	*/
-
-/************************** _sbrk_r *************************************/
-/*  Support function.  Adjusts end of heap to provide more memory to	*/
-/* memory allocator. Simple and dumb with no sanity checks.		*/
-/*  struct _reent *r	-- re-entrancy structure, used by newlib to 	*/
-/*			support multiple threads of operation.		*/
-/*  ptrdiff_t nbytes	-- number of bytes to add.			*/
-/*  Returns pointer to start of new heap area.				*/
-/*  Note:  This implementation is not thread safe (despite taking a	*/
-/* _reent structure as a parameter).  					*/
-/*  Since _s_r is not used in the current implementation, the following	*/
-/* messages must be suppressed.						*/
-
-void * _sbrk_r(
-    struct _reent *_s_r, 
-    ptrdiff_t nbytes)
-{
-	char  *base;		/*  errno should be set to  ENOMEM on error	*/
-
-	if (!heap_ptr) {	/*  Initialize if first time through.		*/
-		heap_ptr = _end;
-	}
-	base = heap_ptr;	/*  Point to end of heap.			*/
-	heap_ptr += nbytes;	/*  Increase heap.				*/
-	
-	return base;		/*  Return pointer to start of new heap area.	*/
-}
diff --git a/ccny_asctec_firmware_2/src/system.c b/ccny_asctec_firmware_2/src/system.c
deleted file mode 100644
index 3dcfedb..0000000
--- a/ccny_asctec_firmware_2/src/system.c
+++ /dev/null
@@ -1,279 +0,0 @@
-#include "LPC214x.h"
-#include "system.h"
-#include "uart.h"
-#include "uart1.h"
-#include "main.h"
-#include "hardware.h"
-#include "LPC2k_ee.h"
-#include "type.h"
-#include "irq.h"
-#include "i2c.h"
-#include "ssp.h"
-#include "adc.h"
-
-#include "sdk.h"
-
-void init(void)
-{
-	MAMCR=0x00;
-	MAMTIM=0x03;
-	MAMCR=0x02;
-  VPBDIV = 0x01;  //0x01: peripheral frequency == cpu frequency, 0x00: per. freq. = crystal freq.
-  pll_init();
-  pll_feed();
-  init_ports();
-  UARTInitialize(57600);	//debug / command
-  UART1Initialize(57600);	//57600 Servo / GPS, 38400 "indoor GPS"
-  init_spi();
-  init_spi1();
-  init_timer0();
-  init_timer1();
-//  I2CInit(I2CMASTER);
-  PWM_Init();
-  ADCInit(ADC_CLK);
-  init_interrupts();
- }
-
-void init_interrupts(void)
-{
-  init_VIC();
-
-  //Timer0 interrupt
-  install_irq( TIMER0_INT, (void *) timer0ISR );
-
-  //Timer1 interrupt
-  install_irq( TIMER1_INT, (void *) timer1ISR );
-
-  //UART1 interrupt
-  install_irq( UART1_INT, (void *) uart1ISR );
-  U1IER = 3; //=3; enable THRE and RX interrupt
-
-  //UART0 interrupt
-  install_irq( UART0_INT, (void *) uart0ISR );
-  U0IER = 3; //=3; enable THRE and RX interrupt
-
-  //I2C0 interrupt
-//  install_irq( I2C0_INT, (void *) I2C0MasterHandler );
-//  I20CONSET = I2CONSET_I2EN;
-
-  //SSP interrupt
-  install_irq( SPI1_INT, (void *) SSPHandler );
-  /* Set SSPINMS registers to enable interrupts */
-  /* enable all interrupts, Rx overrun, Rx timeout, RX FIFO half full int,
-  TX FIFO half empty int */
-  SSPIMSC = SSPIMSC_TXIM | SSPIMSC_RXIM | SSPIMSC_RORIM;// | SSPIMSC_RTIM;
-  /* SSP Enabled */
-  SSPCR1 |= SSPCR1_SSE;
-}
-
-
-void init_ports(void)
-{
-/* PINSEL0
- *
- * PORT0:
- * P0.0: TXD0 -> 01
- * P0.1: RXD0 -> 01
- * P0.2: SCO0 -> 01
- * P0.3: SDA0 -> 01
- * Byte0_sel = 0b01010101 = 0x55
- *
- * P0.4: SCK0 -> 01
- * P0.5: MISO0 -> 01
- * P0.6: MOSI0 -> 01
- * P0.7: LL_NCS/IO_out -> 00
- * or: PWM2 -> 10
- * Byte1_sel = 0x00010101 = 0x15
- * Byte0_io_dir = 0x80
- *
- * P0.8: TXD1 -> 01
- * P0.9: RXD1 -> 01
- * P0.10: IO_in -> 00
- * P0.11: SCL1 -> 11
- * or Falcon8: IO_out -> 00
- * Byte2_sel = 0b11000101 = 0xC5
- *
- * P0.12: IO_in -> 00
- * P0.13: IO_in -> 00
- * P0.14: SDA1 -> 11
- * or IO_out (CS SD-Card) => SD_Logging
- * P0.15: IO_in -> 00
- * Byte3_sel = 0b00110000 = 0x30
- * Byte1_io_dir = 0x00
- * or SD_Logging => Byte1_io_dir=0x40
- */
-
- 	PINSEL0=0x30C51555;
-
- /* PINSEL1
-  *
-  * P0.16: IO_in -> 00
-  * P0.17: SCK1 -> 10
-  * P0.18: MISO1 -> 10
-  * P0.19: MOSI1-> 10
-  * Byte0: 0b10101000 = 0xA8
-  *
-  * P0.20: SSEL1 -> 10
-  * P0.21: PWM5 -> 01
-  * P0.22: IO_in -> 00
-  * P0.23: IO_in -> 00
-  * Byte1: 0b00000110 = 0x06
-  * Byte2_io_dir: 0x30 //0x11
-  *
-  * P0.24: 00
-  * P0.25: VOLTAGE_2: -> 01
-  * or IO_in (FALCON) -> 00
-  * P0.26: 00
-  * P0.27: 00
-  * Byte2: 0b00000100 = 0x04
-  *
-  * P0.28: CURRENT_2: -> 01
-  * P0.29: VOLTAGE_1: -> 01
-  * P0.30: CURRENT_1: -> 01
-  * P0.31: IO_in -> 00
-  * Byte3: 0b00010101 = 0x15
-  * Byte3_io_dir=0x00
-  */
- PINSEL1 = 0x150406A8;
-
- PINSEL2 = 0x00000004;
-
- IODIR0 = 0x0030B480;
-
- IOSET0 = (1<<EXT_NCS)|(1<<11); //all nCS high
- //IOSET0 = (1<<LL_nCS);	//CS LL_Controller
-
-/* P1.16: IO_1/IO_out	=> FET for camera power supply
- * P1.17: Beeper/IO_out
- * .
- * .
- * P1.24: LED1/IO_out
- * P1.25: LED2/IO_out
- *
- */
-
- IODIR1 = 0x03030000;
- IOSET1 = ((1<<24)|(1<<16)); //turn off LED1, turn beeper off
-
-}
-
-void init_timer0(void)
-{
-  T0TC=0;
-  T0TCR=0x0;    //Reset timer0
-  T0MCR=0x3;    //Interrupt on match MR0 and reset counter
-  T0PR=0;
-  T0PC=0;     //Prescale Counter = 0
-  T0MR0=peripheralClockFrequency()/ControllerCyclesPerSecond; // /200 => 200 Hz Period
-  T0TCR=0x1;   //Set timer0
-}
-
-//Weiss:{
-void init_timer1(void)
-{
-  T1TC=0;
-  T1TCR=0x0;    //disable timer1
-  T1MCR=0x3;    //Interrupt on match MR0 and reset counter
-  T1PR=0;
-  T1PC=0; 		//Prescale Counter = 0
-  T1MR0=processorClockFrequency(); // match every s
-  T1TCR=0x1;   //enable timer1
-}
-//}
-
-void PWM_Init( void )
-{
-  //  match_counter = 0;
-  //  PINSEL0 = 0x000A800A;	/* set GPIOs for all PWMs */
-  //  PINSEL1 = 0x00000400;
-    PWMTCR = TCR_RESET;		/* Counter Reset */
-
-    PWMPR = 0x00;		/* count frequency:Fpclk */
-    PWMMCR = PWMMR0R;	/* interrupt on PWMMR0, reset on PWMMR0, reset
-				TC if PWM0 matches */
-    PWMMR0 = 1179648 ;
-    PWMMR5 = 88470;
-
-    /* all PWM latch enabled */
-    PWMLER = LER5_EN;
-
-        /* All single edge, all enable */
-    PWMPCR = PWMENA1 | PWMENA2 | PWMENA3 | PWMENA4 | PWMENA5 | PWMENA6;
-    PWMTCR = TCR_CNT_EN | TCR_PWM_EN;	/* counter enable, PWM enable */
-}
-
-
-void init_spi(void)
-{
-  S0SPCCR=0x04; //30 clock-cycles (~60MHz) = 1 SPI cycle => SPI @ 2MHz
-  S0SPCR=0x20;  //LPC is Master
-}
-
-void init_spi1(void)
-{
-	unsigned char i, Dummy;
-
-    /* Set DSS data to 8-bit, Frame format SPI, CPOL = 0, CPHA = 0, and SCR is 3 */
-    SSPCR0 = 0x040F;
-
-    /* SSPCPSR clock prescale register, master mode, minimum divisor is 0x02 */
-    SSPCPSR = 0x1B;
-
-    for ( i = 0; i < FIFOSIZE; i++ )
-    {
-	Dummy = SSPDR;		/* clear the RxFIFO */
-    }
-
-    /*all ints deactivated*/
-	SSPIMSC = 0;
-
-    /* Device select as master, SSP Enabled */
-    SSPCR1 = 0x00;// | SSPCR1_SSE;
-
-    return;
-
-
-}
-
-void pll_init(void)
-{
-  PLLCFG=0x23;    //0b00100011; => M=4,0690; P=2;
-  PLLCON=0x03;    //PLLE=1, PLLC=1 => PLL enabled as system clock
-}
-
-void pll_feed(void)
-{
-  PLLFEED=0xAA;
-  PLLFEED=0x55;
-}
-
-unsigned int processorClockFrequency(void)
-{
-  return 58982400;
-}
-
-unsigned int peripheralClockFrequency(void)
-{
-  unsigned int divider;
-  switch (VPBDIV & 3)
-    {
-      case 0:
-        divider = 4;
-        break;
-      case 1:
-        divider = 1;
-        break;
-      case 2:
-        divider = 2;
-        break;
-    }
-  return processorClockFrequency() / divider;
-}
-
-void delay(int n)
-{
-  volatile int i;
-  for (i = 0; i < n; ++i);
-}
-
-
diff --git a/ccny_asctec_firmware_2/src/uart.c b/ccny_asctec_firmware_2/src/uart.c
deleted file mode 100644
index 2953f47..0000000
--- a/ccny_asctec_firmware_2/src/uart.c
+++ /dev/null
@@ -1,470 +0,0 @@
-#include <string.h>
-#include <mav_common/comm.h>
-
-#include "LPC214x.h"
-#include "interrupt_utils.h"
-#include "system.h"
-#include "main.h"
-#include "uart.h"
-#include "irq.h"
-#include "hardware.h"
-#include "gpsmath.h"
-#include "ssp.h"
-#include "lpcUART.h"
-
-volatile unsigned char transmission_running = 0;
-
-unsigned char UART_syncstate = 0;
-unsigned int UART_rxcount = 0;
-unsigned char *UART_rxptr;
-
-unsigned uart0_rx_cpsr;
-unsigned uart0_tx_cpsr;
-
-#define UART0_DISABLE_TX_INT uart0_tx_cpsr=disableIRQ();U0IER &= ~UIER_ETBEI;restoreIRQ(uart0_tx_cpsr);
-#define UART0_ENABLE_TX_INT  uart0_tx_cpsr=disableIRQ();U0IER |= UIER_ETBEI;restoreIRQ(uart0_tx_cpsr);
-#define UART0_DISABLE_RX_INT uart0_rx_cpsr=disableIRQ();U0IER &= ~UIER_ERBFI;restoreIRQ(uart0_rx_cpsr);
-#define UART0_ENABLE_RX_INT  uart0_rx_cpsr=disableIRQ();U0IER |= UIER_ERBFI;restoreIRQ(uart0_rx_cpsr);
-
-short uart0_min_tx_buffer = UART0_TX_BUFFERSIZE;
-short uart0_min_rx_buffer = UART0_RX_BUFFERSIZE;
-
-uint8_t rxBuffer[UART0_RX_BUFFERSIZE];
-uint8_t rxParseBuffer[UART0_RX_BUFFERSIZE];
-Fifo rxFifo;
-
-uint8_t txBuffer[UART0_TX_BUFFERSIZE];
-Fifo txFifo;
-
-volatile unsigned int UART_rxPacketCount = 0;
-volatile unsigned int UART_rxGoodPacketCount = 0;
-
-PacketInfo packetInfo[PACKET_INFO_SIZE];
-uint32_t registeredPacketCnt = 0;
-
-volatile char autobaud_in_progress = 0;
-
-void uart0ISR(void) __irq
-{
-  uint8_t t;
-  uint16_t iid;
-  short freemem = 0;
-
-  // Read IIR to clear interrupt and find out the cause
-  while (((iid = U0IIR) & UIIR_NO_INT) == 0)
-  {
-    if (iid & 0x100)
-    {
-      autobaud_in_progress = 1;
-      U0ACR |= 0x100; //clear ABEO interrupt
-      U0ACR &= ~0x01; // disable autobaud
-      U0IER &= ~((1 << 8) | (1 << 9)); //disable ABEO and ABTO interrupts
-
-      autobaud_in_progress = 0;
-    }
-
-    if (iid & 0x200)
-    {
-      autobaud_in_progress = 1;
-      U0ACR |= 0x200; //clear ABTO int
-
-      autobaud_in_progress = 0;
-    }
-
-    switch (iid & UIIR_ID_MASK)
-    {
-      case UIIR_RLS_INT: // Receive Line Status
-        U0LSR; // read LSR to clear
-        break;
-
-      case UIIR_CTI_INT: // <-- keep this together, in order to read remaining bytes below fifo threshold
-      case UIIR_RDA_INT:
-        // RDA interrupt
-        //receive handler
-        rxFifo.inUse = 1;
-        do
-        { // read from fifo as long as there is data available
-          t = U0RBR;
-          freemem = Fifo_availableMemory(&rxFifo);
-          if (freemem < uart0_min_rx_buffer)
-            uart0_min_rx_buffer = freemem;
-          if (!Fifo_writeByte(&rxFifo, t))
-            break;
-        } while (U0LSR & ULSR_RDR);
-        rxFifo.inUse = 0;
-
-        break;
-
-      case UIIR_THRE_INT:
-        // THRE interrupt
-        if(!(IOPIN0&(1<<CTS_RADIO))){
-          txFifo.inUse = 1;
-          while (U0LSR & ULSR_THRE)
-          {
-            if (Fifo_readByte(&txFifo, &t))
-            {
-              U0THR = t;
-            }
-            else
-            {
-              transmission_running = 0;
-              break;
-            }
-          }
-          txFifo.inUse = 0;
-        }
-        break;
-
-      default: // Unknown
-        U0LSR;
-        U0RBR;
-        break;
-    }
-  }
-  VICVectAddr = 0; // Acknowledge Interrupt
-}
-
-void Fifo_initialize(Fifo * fifo, uint8_t * buffer, uint32_t bufferSize)
-{
-  fifo->buffer = buffer;
-  fifo->bufferSize = bufferSize;
-  fifo->readIdx = 0;
-  fifo->writeIdx = 0;
-  fifo->tmp = 0;
-  fifo->mask = bufferSize - 1;
-  fifo->inUse = 0;
-}
-
-uint8_t Fifo_writeByte(Fifo * fifo, uint8_t byte)
-{
-  fifo->tmp = ((fifo->writeIdx + 1) & fifo->mask);
-  if (fifo->readIdx == fifo->tmp)
-    return 0;
-  fifo->buffer[fifo->writeIdx] = byte;
-  fifo->writeIdx = fifo->tmp;
-  return 1;
-}
-
-uint8_t Fifo_writeBlock(Fifo * fifo, void *data, uint32_t length)
-{
-  if (Fifo_availableMemory(fifo) <= length)
-    return 0;
-  uint8_t *ptr = (uint8_t *)data;
-  while (length--)
-  {
-    fifo->buffer[fifo->writeIdx] = *ptr++;
-    fifo->writeIdx = (fifo->writeIdx + 1) & fifo->mask;
-  }
-
-  //	//safe method
-  //	int i=0;
-  //	uint8_t *ptr = (uint8_t *)data;
-  //	for(i=0; i<length; i++){
-  //		if(!Fifo_writeByte(fifo, ptr[i]))
-  //			return 0;
-  //	}
-
-  return 1;
-}
-
-uint8_t Fifo_readByte(Fifo * fifo, uint8_t * byte)
-{
-  if (fifo->readIdx == fifo->writeIdx)
-    return 0;
-  *byte = fifo->buffer[fifo->readIdx];
-  fifo->readIdx = (fifo->readIdx + 1) & fifo->mask;
-  return 1;
-}
-
-uint16_t Fifo_availableMemory(Fifo * fifo)
-{
-  return (fifo->readIdx - fifo->writeIdx - 1) & fifo->mask;
-}
-
-void Fifo_reset(Fifo * fifo)
-{
-  fifo->writeIdx = 0;
-  fifo->readIdx = 0;
-}
-
-PacketInfo* registerPacket(uint8_t descriptor, void * data)
-{
-  //	if(registeredPacketCnt < PACKET_INFO_SIZE){
-  packetInfo[registeredPacketCnt].data = data;
-  packetInfo[registeredPacketCnt].descriptor = descriptor;
-  packetInfo[registeredPacketCnt].updated = 0;
-  registeredPacketCnt++;
-  return &packetInfo[registeredPacketCnt - 1];
-  //	}
-  // TODO: what if space for packets is exceeded??
-  //	return NULL;
-}
-
-void parseRxFifo(void)
-{
-  static uint8_t packetType;
-  static uint8_t flag;
-  static int packetSize = 0;
-  static int rxCount = 0;
-  static uint16_t checksum_computed = 0;
-  static uint16_t checksum_received = 0;
-  static uint32_t syncstate = 0;
-  static MAV_ACK_PKT packet_ack;
-  uint32_t i = 0;
-  uint8_t rxdata = 0;
-
-  if (rxFifo.inUse == 1)
-    return;
-
-  //	UART0_DISABLE_RX_INT;
-
-  while (Fifo_readByte(&rxFifo, &rxdata))
-  {
-
-    if (syncstate == 0)
-    {
-      if (rxdata == '>')
-        syncstate++;
-      else
-        syncstate = 0;
-
-      rxCount = 0;
-      checksum_received = 0;
-      UART_rxptr = rxParseBuffer;
-      packetSize = 0;
-      flag = 0;
-    }
-    else if (syncstate == 1)
-    {
-      if (rxdata == '*')
-        syncstate++;
-      else
-        syncstate = 0;
-    }
-    else if (syncstate == 2)
-    {
-      if (rxdata == '>')
-        syncstate++;
-      else
-        syncstate = 0;
-    }
-    else if (syncstate == 3)
-    {
-      packetSize = rxdata; // get size of packet
-      syncstate++;
-    }
-    else if (syncstate == 4)
-    {
-      packetType = rxdata; // get packet type
-      if (packetSize < 1)
-        syncstate = 0;
-      else
-      {
-        rxCount = packetSize;
-        syncstate++;
-      }
-    }
-    else if (syncstate == 5)
-    {
-      flag = rxdata;
-      syncstate++;
-    }
-    else if (syncstate == 6) // read data
-    {
-      rxParseBuffer[packetSize - rxCount] = rxdata;
-      rxCount--;
-
-      if (rxCount == 0)
-      {
-        syncstate++;
-      }
-    }
-    else if (syncstate == 7) // first byte of checksum
-    {
-      checksum_received = rxdata & 0xff;
-      syncstate++;
-    }
-    else if (syncstate == 8) // second byte of checksum + check (and dispatch?)
-    {
-      checksum_received |= ((unsigned short)rxdata << 8);
-      UART_rxPacketCount++;
-
-      checksum_computed = crc16(&packetType, 1, 0xff);
-      checksum_computed = crc16(&flag, 1, checksum_computed);
-      checksum_computed = crc16(rxParseBuffer, packetSize, checksum_computed);
-
-      if (checksum_received == checksum_computed)
-      {
-        UART_rxGoodPacketCount++;
-        for (i = 0; i < registeredPacketCnt; i++)
-        {
-          if (packetType == packetInfo[i].descriptor)
-          {
-            memcpy((packetInfo[i].data), rxParseBuffer, packetSize);
-            packetInfo[i].updated = 1;
-            if (flag & MAV_COMM_ACK)
-            {
-              packet_ack.ack_packet = flag;
-              writePacket2Ringbuffer(MAV_ACK_PKT_ID, &packet_ack, sizeof(packet_ack));
-            }
-            break;
-          }
-        }
-      }
-      syncstate = 0;
-    }
-    else
-      syncstate = 0;
-  }
-  //	UART0_ENABLE_RX_INT;
-}
-
-inline int writePacket2Ringbuffer(uint8_t descriptor, void * data, uint8_t length)
-{
-  static uint8_t header[] = {0xFF, 0x09, 0, 0};
-  uint16_t checksum = 0;
-  int state = 0;
-
-  header[2] = length;
-  header[3] = descriptor;
-  checksum = crc16(&descriptor, 1, 0xff);
-  checksum = crc16(data, length, checksum);
-
-  state = 1;
-  state &= UART0_writeFifo(header, sizeof(header));
-  state &= UART0_writeFifo(data, length);
-  state &= UART0_writeFifo(&checksum, sizeof(checksum));
-
-  return state;
-}
-
-uint8_t UART0_writeFifo(void * data, uint32_t length)
-{
-  uint8_t ret = 0;
-  short freemem;
-  //	while(txFifo.inUse);
-  //	UART0_DISABLE_TX_INT;
-  ret = Fifo_writeBlock(&txFifo, data, length);
-  freemem = Fifo_availableMemory(&txFifo);
-  if (freemem < uart0_min_tx_buffer)
-    uart0_min_tx_buffer = freemem;
-  //	UART0_ENABLE_TX_INT;
-  return ret;
-}
-
-void UARTInitialize(unsigned int baud)
-{
-  UART0_DISABLE_RX_INT;
-  UART0_DISABLE_TX_INT;
-
-  unsigned int divisor = peripheralClockFrequency() / (16 * baud);
-
-  //UART0
-  U0LCR = 0x83; /* 8 bit, 1 stop bit, no parity, enable DLAB */
-  U0DLL = divisor & 0xFF;
-  U0DLM = (divisor >> 8) & 0xFF;
-  U0LCR &= ~0x80; /* Disable DLAB */
-  U0FCR = UFCR_FIFO_ENABLE | UFCR_FIFO_TRIG8 | UFCR_RX_FIFO_RESET | UFCR_TX_FIFO_RESET;//1; fifo enable, trigger interrupt after 8 bytes in the fifo
-  Fifo_initialize(&rxFifo, rxBuffer, UART0_RX_BUFFERSIZE);
-  Fifo_initialize(&txFifo, txBuffer, UART0_TX_BUFFERSIZE);
-
-  UART0_ENABLE_RX_INT;
-  UART0_ENABLE_TX_INT;
-}
-
-void startAutoBaud(void)
-{
-  if (U0ACR & 0x01)
-    return;
-
-  U0ACR = 0x01 | 0x04;// start, mode 0, autorestart
-  U0IER |= ((1 << 8) | (1 << 9)); //enable ABEO and ABTO interrupts
-}
-
-void UART0_rxFlush(void)
-{
-  U0FCR |= UFCR_RX_FIFO_RESET;
-  Fifo_reset(&rxFifo);
-}
-void UART0_txFlush(void)
-{
-  U0FCR |= UFCR_TX_FIFO_RESET;
-}
-
-int UART0_txEmpty(void)
-{
-  return (U0LSR & (ULSR_THRE | ULSR_TEMT)) == (ULSR_THRE | ULSR_TEMT);
-}
-
-//Write to UART0
-void UARTWriteChar(unsigned char ch)
-{
-  while ((U0LSR & 0x20) == 0)
-    ;
-  U0THR = ch;
-}
-
-unsigned char UARTReadChar(void)
-{
-  while ((U0LSR & 0x01) == 0)
-    ;
-  return U0RBR;
-}
-
-void __putchar(int ch)
-{
-  if (ch == '\n')
-    UARTWriteChar('\r');
-  UARTWriteChar(ch);
-}
-
-void UART_send(char *buffer, unsigned char length)
-{
-  unsigned char cnt = 0;
-  while (!(U0LSR & 0x20))
-    ; //wait until U0THR and U0TSR are both empty
-  while (length--)
-  {
-    U0THR = buffer[cnt++];
-    if (cnt > 15)
-    {
-      while (!(U0LSR & 0x20))
-        ; //wait until U0THR is empty
-    }
-  }
-}
-
-void UART_send_ringbuffer(void)
-{
-  uint8_t t;
-  if (!transmission_running)
-  {
-    if (Fifo_readByte(&txFifo, &t))
-    {
-      transmission_running = 1;
-      UARTWriteChar(t);
-    }
-  }
-}
-
-uint16_t crc_update(uint16_t crc, uint8_t data)
-{
-  data ^= (crc & 0xff);
-  data ^= data << 4;
-
-  return ((((uint16_t)data << 8) | ((crc >> 8) & 0xff)) ^ (uint8_t)(data >> 4) ^ ((uint16_t)data << 3));
-}
-
-uint16_t crc16(void* data, uint16_t cnt, uint16_t crc)
-{
-  uint8_t * ptr = (uint8_t *)data;
-  int i;
-
-  for (i = 0; i < cnt; i++)
-  {
-    crc = crc_update(crc, *ptr);
-    ptr++;
-  }
-  return crc;
-}
-
diff --git a/ccny_asctec_firmware_2/src/uart1.c b/ccny_asctec_firmware_2/src/uart1.c
deleted file mode 100644
index 002863d..0000000
--- a/ccny_asctec_firmware_2/src/uart1.c
+++ /dev/null
@@ -1,731 +0,0 @@
-#include "LPC214x.h"
-#include "interrupt_utils.h"
-#include "system.h"
-#include "main.h"
-#include "uart1.h"
-#include "irq.h"
-#include "hardware.h"
-#include "gpsmath.h"
-#include "ssp.h"
-
-unsigned char packets;
-unsigned char DataOutputsPerSecond;
-unsigned int uart_cnt;
-
-unsigned char data_requested=0;
-extern int ZeroDepth;
-
-unsigned short current_chksum;
-unsigned char chksum_to_check=0;
-unsigned char chksum_trigger=1;
-
-unsigned char transmission1_running=0;
-unsigned char trigger_transmission=0;
-
-volatile unsigned char baudrate1_change=0;
-
-unsigned char send_buffer[16];
-unsigned char *tx_buff;
-unsigned char UART1_syncstate=0;
-unsigned int UART1_rxcount=0;
-unsigned char *UART1_rxptr;
-
-unsigned char UART_CalibDoneFlag = 0;
-
-static volatile unsigned char rb_busy=0;
-
-static volatile unsigned char GPS_ACK_received=0;
-
-/*
-//configuration commands for GPS
-const unsigned char GPS_CFG_PRT[26] =
-		{	0x06, 0x00, 0x14, 0x00, 0x01, 0x00, 0x00, 0x00, 0xd0, 0x08, 0x08, 0x00, 0x00,
-			0xe1, 0x00, 0x00, 0x07, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe4, 0x2d };
-const unsigned char GPS_CFG_ANT[10] =
-		{	0x06, 0x13, 0x04, 0x00, 0x0b, 0x00, 0x0f, 0x38, 0x6f, 0x4f };
-const unsigned char GPS_CFG_MSG[11][12] =
-		{	{0x06, 0x01, 0x06, 0x00, 0x01, 0x01, 0x00, 0x00, 0x00, 0x00, 0x0f, 0x80},
-			{0x06, 0x01, 0x06, 0x00, 0x01, 0x02, 0x00, 0x01, 0x00, 0x00, 0x11, 0x88},
-			{0x06, 0x01, 0x06, 0x00, 0x01, 0x03, 0x00, 0x01, 0x00, 0x00, 0x12, 0x8d},
-			{0x06, 0x01, 0x06, 0x00, 0x01, 0x04, 0x00, 0x00, 0x00, 0x00, 0x12, 0x8f},
-			{0x06, 0x01, 0x06, 0x00, 0x01, 0x06, 0x00, 0x01, 0x00, 0x00, 0x15, 0x9c},
-			{0x06, 0x01, 0x06, 0x00, 0x01, 0x11, 0x00, 0x00, 0x00, 0x00, 0x1f, 0xd0},
-			{0x06, 0x01, 0x06, 0x00, 0x01, 0x12, 0x00, 0x01, 0x00, 0x00, 0x21, 0xd8},
-			{0x06, 0x01, 0x06, 0x00, 0x01, 0x20, 0x00, 0x00, 0x00, 0x00, 0x2e, 0x1b},
-			{0x06, 0x01, 0x06, 0x00, 0x01, 0x21, 0x00, 0x00, 0x00, 0x00, 0x2f, 0x20},
-			{0x06, 0x01, 0x06, 0x00, 0x01, 0x22, 0x00, 0x00, 0x00, 0x00, 0x30, 0x25},
-			{0x06, 0x01, 0x06, 0x00, 0x01, 0x30, 0x00, 0x00, 0x00, 0x00, 0x3e, 0x6b} };
-const unsigned char GPS_CFG_NAV2[46] =
-		{	0x06, 0x1a, 0x28, 0x00, 0x05, 0x00, 0x00, 0x00, 0x04, 0x03, 0x10, 0x02,
-			0x50, 0xc3, 0x00, 0x00, 0x0f, 0x0a, 0x0a, 0x3c, 0x00, 0x01, 0x00, 0x00,
-			0xfa, 0x00, 0xfa, 0x00, 0x64, 0x00, 0x2c, 0x01, 0x00, 0x00, 0x00, 0x00,
-			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5e, 0x30 };
-const unsigned char GPS_CFG_RATE[12] =
-		{	0x06, 0x08, 0x06, 0x00, 0xc8, 0x00, 0x01, 0x00, 0x00, 0x00, 0xdd, 0x68 };
-const unsigned char GPS_CFG_SBAS[14] =
-		{	0x06, 0x16, 0x08, 0x00, 0x03, 0x07, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
-			0x2f, 0xd9 };
-const unsigned char GPS_CFG_CFG[19] =
-		{	0x06, 0x09, 0x0d, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0x00, 0x00,
-			0x00, 0x00, 0x00, 0x00, 0x07, 0x21, 0xaf };
-*/
-
-// new commands for gps, sbas disabled
-const unsigned char GPS_CFG_PRT[26] =
-                {       0x06, 0x00, 0x14, 0x00, 0x01, 0x00, 0x00, 0x00, 0xd0, 0x08, 0x08, 0x00, 0x00,
-                        0xe1, 0x00, 0x00, 0x07, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe4, 0x2d };
-const unsigned char GPS_CFG_ANT[10] =
-                {       0x06, 0x13, 0x04, 0x00, 0x0b, 0x00, 0x0f, 0x38, 0x6f, 0x4f };
-const unsigned char GPS_CFG_MSG[11][12] =
-                {       {0x06, 0x01, 0x06, 0x00, 0x01, 0x01, 0x00, 0x00, 0x00, 0x00, 0x0f, 0x80},
-                        {0x06, 0x01, 0x06, 0x00, 0x01, 0x02, 0x00, 0x01, 0x00, 0x00, 0x11, 0x88},
-                        {0x06, 0x01, 0x06, 0x00, 0x01, 0x03, 0x00, 0x01, 0x00, 0x00, 0x12, 0x8d},
-                        {0x06, 0x01, 0x06, 0x00, 0x01, 0x04, 0x00, 0x00, 0x00, 0x00, 0x12, 0x8f},
-                        {0x06, 0x01, 0x06, 0x00, 0x01, 0x06, 0x00, 0x01, 0x00, 0x00, 0x15, 0x9c},
-                        {0x06, 0x01, 0x06, 0x00, 0x01, 0x11, 0x00, 0x00, 0x00, 0x00, 0x1f, 0xd0},
-                        {0x06, 0x01, 0x06, 0x00, 0x01, 0x12, 0x00, 0x01, 0x00, 0x00, 0x21, 0xd8},
-                        {0x06, 0x01, 0x06, 0x00, 0x01, 0x20, 0x00, 0x00, 0x00, 0x00, 0x2e, 0x1b},
-                        {0x06, 0x01, 0x06, 0x00, 0x01, 0x21, 0x00, 0x00, 0x00, 0x00, 0x2f, 0x20},
-                        {0x06, 0x01, 0x06, 0x00, 0x01, 0x22, 0x00, 0x00, 0x00, 0x00, 0x30, 0x25},
-                        {0x06, 0x01, 0x06, 0x00, 0x01, 0x30, 0x00, 0x00, 0x00, 0x00, 0x3e, 0x6b} };
-const unsigned char GPS_CFG_SBAS[14] =
-            {     0x06, 0x16, 0x08, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
-                  0x25, 0x90 }; //SBAS OFF
-const unsigned char GPS_CFG_NAV2[46] =
-            {     0x06, 0x1a, 0x28, 0x00, 0x05, 0x00, 0x00, 0x00, 0x04, 0x03, 0x0A, 0x02,
-                  0x50, 0xc3, 0x00, 0x00, 0x0f, 0x0a, 0x0a, 0x3c, 0x00, 0x01, 0x00, 0x00,
-                  0xfa, 0x00, 0xfa, 0x00, 0x64, 0x00, 0x2c, 0x01, 0x00, 0x00, 0x00, 0x00,
-                  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x58, 0x64 }; //max SV=10
-const unsigned char GPS_CFG_RATE[12] =
-            {     0x06, 0x08, 0x06, 0x00, 0xc8, 0x00, 0x01, 0x00, 0x00, 0x00, 0xdd, 0x68 };      //5Hz
-const unsigned char GPS_CFG_CFG[19] =
-                {       0x06, 0x09, 0x0d, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0x00, 0x00,
-                        0x00, 0x00, 0x00, 0x00, 0x07, 0x21, 0xaf };
-
-/*
-
-//globals for NMEA parser
-	double latitudeDeg;
-	double longitudeDeg;
-	char gprmc_string[5]="GPRMC";
-	static unsigned char gpsState=GPS_IDLE;
-	static unsigned char gpsCnt=0;
-	static unsigned char gpsFieldStart=1;
-	static unsigned char gpsFieldCnt=0;
-	static unsigned char gpsInitString[5];
-	static unsigned char gpsValue[20];
-//<- globals
-*/
-unsigned char startstring[]={'>','*','>'};
-unsigned char stopstring[]={'<','#','<'};
-
-void parse_POSLLH(unsigned char, unsigned char);
-void parse_POSUTM(unsigned char, unsigned char);
-void parse_VELNED(unsigned char, unsigned char);
-void parse_STATUS(unsigned char, unsigned char);
-void parse_NAVSOL(unsigned char, unsigned char);
-
-inline void parse_VELNED(unsigned char c, unsigned char reset)
-{
-	static unsigned char cnt=0;
-	static int VE, VN, heading;
-	static unsigned int sacc;
-
-	if(reset) cnt=0;
-	else
-	{
-		if(cnt==0) VN=c;
-		else if(cnt==1) VN+=c<<8;
-		else if(cnt==2) VN+=c<<16;
-		else if(cnt==3) VN+=c<<24;
-		else if(cnt==4) VE=c;
-		else if(cnt==5) VE+=c<<8;
-		else if(cnt==6) VE+=c<<16;
-		else if(cnt==7) VE+=c<<24;
-		else if(cnt==20) heading=c;
-		else if(cnt==21) heading+=c<<8;
-		else if(cnt==22) heading+=c<<16;
-		else if(cnt==23) heading+=c<<24;
-		else if(cnt==24) sacc=c;
-		else if(cnt==25) sacc+=c<<8;
-		else if(cnt==26) sacc+=c<<16;
-		else if(cnt==27)
-		{
-			sacc+=c<<24;
-			GPS_Data.speed_x=VE*10;	//convert to mm/s
-			GPS_Data.speed_y=VN*10; //convert to mm/s
-			GPS_Data.heading=heading/100;	//convert to deg * 1000
-			GPS_Data.speed_accuracy=sacc*10;	//convert to mm/s
-			gpsDataOkTrigger=1;
-		}
-		cnt++;
-	}
-}
-inline void parse_POSLLH(unsigned char c, unsigned char reset)
-{
-	static unsigned char cnt=0;
-	static int lat, lon, height;
-	static unsigned int hacc, vacc;
-
-	if(reset) cnt=0;
-	else
-	{
-		if(cnt==0) lon=c;
-		else if(cnt==1) lon+=c<<8;
-		else if(cnt==2) lon+=c<<16;
-		else if(cnt==3) lon+=c<<24;
-		else if(cnt==4) lat=c;
-		else if(cnt==5) lat+=c<<8;
-		else if(cnt==6) lat+=c<<16;
-		else if(cnt==7) lat+=c<<24;
-		else if(cnt==12) height=c;
-		else if(cnt==13) height+=c<<8;
-		else if(cnt==14) height+=c<<16;
-		else if(cnt==15) height+=c<<24;
-		else if(cnt==16) hacc=c;
-		else if(cnt==17) hacc+=c<<8;
-		else if(cnt==18) hacc+=c<<16;
-		else if(cnt==19) hacc+=c<<24;
-		else if(cnt==20) vacc=c;
-		else if(cnt==21) vacc+=c<<8;
-		else if(cnt==22) vacc+=c<<16;
-		else if(cnt==23)
-		{
-			vacc+=c<<24;
-			GPS_Data.latitude=lat;
-			GPS_Data.longitude=lon;
-			GPS_Data.height=height;
-			GPS_Data.horizontal_accuracy=hacc;
-			GPS_Data.vertical_accuracy=vacc;
-		}
-		cnt++;
-	}
-}
-inline void parse_POSUTM(unsigned char c, unsigned char reset)
-{
-	static unsigned char cnt=0;
-	static int E, N;
-
-	if(reset) cnt=0;
-	else
-	{
-		if(cnt==0) E=c;
-		else if(cnt==1) E+=c<<8;
-		else if(cnt==2) E+=c<<16;
-		else if(cnt==3) E+=c<<24;
-		else if(cnt==4) N=c;
-		else if(cnt==5) N+=c<<8;
-		else if(cnt==6) N+=c<<16;
-		else if(cnt==7)
-		{
-			N+=c<<24;
-//			GPS_Data.x=E;
-//			GPS_Data.y=N;
-		}
-		cnt++;
-	}
-}
-
-//NAVSOL is the only packet where the first 4 bytes need to be parsed. Any other packet discardes the first 4 bytes!!!
-inline void parse_NAVSOL(unsigned char c, unsigned char reset)
-{
-	static unsigned char cnt=0;
-	static unsigned int tow;
-	static unsigned short week;
-
-	if(reset) cnt=0;
-	else
-	{
-		if(cnt==0) tow=c;
-		else if(cnt==1)	tow+=c<<8;
-		else if(cnt==2)	tow+=c<<16;
-		else if(cnt==3) tow+=c<<24;
-		else if(cnt==8) week=c;
-		else if(cnt==9)
-		{
-			week+=c<<8;
-			GPS_Time.time_of_week=tow;
-			GPS_Time.week=week;
-		}
-		else if(cnt==47)
-		{
-			GPS_Data.numSV=c;
-		}
-		cnt++;
-	}
-}
-
-inline void parse_STATUS(unsigned char c, unsigned char reset)
-{
-	static unsigned char cnt=0;
-	static unsigned char GPSfix, flags, diffs;
-
-	if(reset) cnt=0;
-	else
-	{
-		if(cnt==0) GPSfix=c;
-		else if(cnt==1) flags=c;
-		else if(cnt==2)
-		{
-			diffs=c;
-			GPS_Data.status=GPSfix|(flags<<8)|(diffs<<16);
-		}
-		cnt++;
-	}
-}
-
-void uart1ISR(void) __irq
-{
-  static unsigned char state;
-  static unsigned char current_packet;
-  static unsigned short cnt, length;
-  unsigned char t;
-  unsigned char c;
-  IENABLE;
-  unsigned iir = U1IIR;
-  // Handle UART interrupt
-  switch ((iir >> 1) & 0x7)
-    {
-      case 1:
-		  // THRE interrupt
-
-		 if (ringbuffer1(RBREAD, &t, 1))
-		 {
-		   transmission1_running=1;
-		   UART1WriteChar(t);
-		 }
-		 else
-		 {
-		   transmission1_running=0;
-		   if (baudrate1_change)		//baudrate change after first GPS config command
-		   {
-			   UART1Initialize(57600);
-			   baudrate1_change=0;
-		   }
-		 }
-        break;
-      case 2:
-		c=U1RBR;
-
-		//UARTWriteChar(c);
-
-#ifndef INDOOR_GPS	//run GPS statemachine
-
-        //parse UBX (U0RBR);
-
-	//SSP_trans_cnt++;
-		switch (state)
-		{
-			case 0:
-				if(c==0xB5)
-				{
-					state=1;
-				}
-			break;
-			case 1:
-				if(c==0x62)
-				{
-					state=2;
-				}
-				else state=0;
-			break;
-			case 2:
-				if(c==0x01)	//NAV message
-				{
-				 	state=3;
-				}
-				else if (c==0x05)	//ACK message
-					{
-						state=10;
-					}
-				else state=0;
-			break;
-			case 3:
-				current_packet=c;
-				cnt=0;
-				state=4;
-			break;
-			case 4:
-				if(!cnt) length=c;
-				if(current_packet==0x06) parse_NAVSOL(0,1);
-				if(++cnt==2)
-				{
-					cnt=0;
-					state=5;
-				}
-			break;
-			case 5:	//Four bytes ITOW
-				//NAVSOL is the only packets where the first 4 bytes need to be parsed. Any other packet discardes the first 4 bytes!!!
-				if(current_packet==0x06) parse_NAVSOL(c,0);
-				if(++cnt==4)
-				{
-					cnt=0;
-					state=6;
-					if(current_packet==0x02) parse_POSLLH(0,1);
-					//else if(current_packet==0x08) parse_POSUTM(0,1);
-					else if(current_packet==0x03) parse_STATUS(0,1);
-					else if(current_packet==0x12) parse_VELNED(0,1);
-				}
-			break;
-			case 6:
-				if(current_packet==0x02)
-				{
-					parse_POSLLH(c,0);
-				}
-		/*		else if(current_packet==0x08	//POSUTM currently not used
-				{
-					parse_POSUTM(c,0);
-				}
-			*/	else if(current_packet==0x03)
-				{
-					parse_STATUS(c,0);
-				}
-				else if(current_packet==0x12)
-				{
-					parse_VELNED(c,0);
-				}
-				else if(current_packet==0x06)
-				{
-					parse_NAVSOL(c,0);
-				}
-				else state=0;
-
-				if(++cnt>=length-4)
-				{
-					state=0;
-				}
-			break;
-			case 10:
-				if (c==0x01)
-				{
-					cnt=0;
-					state=11;
-				} else
-					state=0;
-			break;
-			case 11:
-				if (!cnt) length=c;
-				if (cnt++==1)
-				{
-					cnt=0;
-					state=12;
-				}
-			break;
-			case 12:
-				if (c==0x06)		//ACK of a CFG-message
-				{
-					state=13;
-				} else
-					state=0;
-			break;
-			case 13:
-				state=14;
-			break;
-			case 14:
-				if (!GPS_ACK_received)
-				{
-					GPS_ACK_received=1;
-					state=0;
-				}
-			break;
-			default:
-				state=0;
-			break;
-		}
-
-#else	//run optical tracking statemachine
-		switch (state)
-		{
-			case 0:
-				if(c=='>') state=1;
-			break;
-			case 1:
-				if(c=='*') state=2;
-				else state=0;
-			break;
-			case 2:
-				if(c=='>')	//Startstring received
-				{
-					UART1_rxcount=sizeof(OF_Data);
-					UART1_rxptr=(unsigned char *)&OF_Data_e;
-				 	state=3;
-				}
-				else state=0;
-			break;
-			case 3:
-				UART1_rxcount--;
-				*UART1_rxptr=c;
-				UART1_rxptr++;
-				if (UART1_rxcount==0)
-	        	{
-	             	state=0;
-	             	OF_data_updated=0;
-	        	}
-			break;
-			default:
-			state=0;
-			break;
-		}
-#endif
-
-        break;
-      case 3:
-        // RLS interrupt
-        break;
-      case 6:
-        // CTI interrupt
-        break;
-   }
-  IDISABLE;
-  VICVectAddr = 0;		/* Acknowledge Interrupt */
-}
-
-void UART1Initialize(unsigned int baud)
-{
-  unsigned int divisor = peripheralClockFrequency() / (16 * baud);
-//UART1
-  U1LCR = 0x83; /* 8 bit, 1 stop bit, no parity, enable DLAB */
-  U1DLL = divisor & 0xFF;
-  U1DLM = (divisor >> 8) & 0xFF;
-  U1LCR &= ~0x80; /* Disable DLAB */
-  U1FCR = 1;
-}
-
-//Write to UART1
-void UART1WriteChar(unsigned char ch)
-{
-  while ((U1LSR & 0x20) == 0);
-  U1THR = ch;
-}
-
-unsigned char UART1ReadChar(void)
-{
-  while ((U1LSR & 0x01) == 0);
-  return U1RBR;
-}
-
-void UART1_send(unsigned char *buffer, unsigned char length)
-{
-	unsigned char cnt=0;
-	while(length--)
-	{
-		while (!(U0LSR & 0x20)); //wait until U0THR is empty
-		U1THR = buffer[cnt++];
-	}
-}
-
-void UART1_send_ringbuffer(void)
-{
-  unsigned char t;
-  if(!transmission1_running)
-  {
-    if(ringbuffer1(RBREAD, &t, 1))
-    {
-      transmission1_running=1;
-      UART1WriteChar(t);
-    }
-  }
-}
-
-int ringbuffer1(unsigned char rw, unsigned char *data, unsigned int count)	//returns 1 when write/read was successful, 0 elsewise
-{
-    static volatile unsigned char buffer[RINGBUFFERSIZE];
-//	static volatile unsigned int pfirst=0, plast=0;	//Pointers to first and last to read byte
-	static volatile unsigned int read_pointer, write_pointer;
-	static volatile unsigned int content=0;
-	unsigned int p=0;
-    unsigned int p2=0;
-
-	if(rw==RBWRITE)
-	{
-		if(count<RINGBUFFERSIZE-content)	//enough space in buffer?
-		{
-			while(p<count)
-			{
-				buffer[write_pointer++]=data[p++];
-			}
-            content+=count;
-            return(1);
-		}
-	}
-	else if(rw==RBREAD)
-	{
-		if(content>=count)
-		{
-			while(p2<count)
-			{
-				data[p2++]=buffer[read_pointer++];
-			}
-            content-=count;
-            if(!content) //buffer empty
-            {
-            	write_pointer=0;
-            	read_pointer=0;
-            }
-			return(1);
-		}
-	}
-        else if(rw==RBFREE)
-        {
-          if(content) return 0;
-          else return(RINGBUFFERSIZE-11);
-        }
-
-	return(0);
-}
-
-void GPS_configure(void)
-{
-	const unsigned char gps_startstring[2]={ 0xb5, 0x62 };		//sync chars
-
-	static unsigned char gpsconf_state, gps_cfg_msg_counter;
-	int written;
-	static unsigned char gpsconfig_timeout;
-	static unsigned char StartWithHighBaudrate = 0;
-
-	switch (gpsconf_state)
-	{
-		case 0:
-			if (StartWithHighBaudrate)
-			{
-				UART1Initialize(57600);
-				StartWithHighBaudrate = 0;
-			}
-			else
-				UART1Initialize(9600);
-			if ((ringbuffer1(RBFREE, 0, 0))>28)
-			{
-				written=ringbuffer1(RBWRITE, (unsigned char*)gps_startstring, 2);
-				written=ringbuffer1(RBWRITE, (unsigned char*)GPS_CFG_PRT, 26);
-				UART1_send_ringbuffer();
-				baudrate1_change=1;
-				gpsconf_state++;
-			}
-			gpsconfig_timeout=0;
-		break;
-		case 1:
-			if (GPS_ACK_received)
-			{
-				GPS_ACK_received=0;
-				if (ringbuffer1(RBFREE, 0, 0)>12)
-				{
-					ringbuffer1(RBWRITE, (unsigned char*)gps_startstring, 2);
-					ringbuffer1(RBWRITE, (unsigned char*)GPS_CFG_ANT, 10);
-					UART1_send_ringbuffer();
-					gps_cfg_msg_counter=0;
-					gpsconf_state++;
-				}
-				gpsconfig_timeout=0;
-				StartWithHighBaudrate = 0;
-			} else
-			{
-				gpsconfig_timeout++;
-				StartWithHighBaudrate = 1;
-			}
-		break;
-		case 2:
-			if (GPS_ACK_received)
-			{
-				GPS_ACK_received=0;
-				if (ringbuffer1(RBFREE, 0, 0)>14)
-				{
-					ringbuffer1(RBWRITE, (unsigned char*)gps_startstring, 2);
-					ringbuffer1(RBWRITE, (unsigned char*)GPS_CFG_MSG[gps_cfg_msg_counter], 12);
-					UART1_send_ringbuffer();
-					if (++gps_cfg_msg_counter==11)
-					{
-						gpsconf_state++;
-					}
-				}
-				gpsconfig_timeout=0;
-			} else
-				gpsconfig_timeout++;
-		break;
-		case 3:
-			if (GPS_ACK_received)
-			{
-				GPS_ACK_received=0;
-				if (ringbuffer1(RBFREE, 0, 0)>48)
-				{
-					ringbuffer1(RBWRITE, (unsigned char*)gps_startstring, 2);
-					ringbuffer1(RBWRITE, (unsigned char*)GPS_CFG_NAV2, 46);
-					UART1_send_ringbuffer();
-					gpsconf_state++;
-				}
-				gpsconfig_timeout=0;
-			} else
-				gpsconfig_timeout++;
-		break;
-		case 4:
-			if (GPS_ACK_received)
-			{
-				GPS_ACK_received=0;
-				if (ringbuffer1(RBFREE, 0, 0)>14)
-				{
-					ringbuffer1(RBWRITE, (unsigned char*)gps_startstring, 2);
-					ringbuffer1(RBWRITE, (unsigned char*)GPS_CFG_RATE, 12);
-					UART1_send_ringbuffer();
-					gpsconf_state++;
-				}
-				gpsconfig_timeout=0;
-			} else
-				gpsconfig_timeout++;
-		break;
-		case 5:
-			if (GPS_ACK_received)
-			{
-				GPS_ACK_received=0;
-				if (ringbuffer1(RBFREE, 0, 0)>16)
-				{
-					ringbuffer1(RBWRITE, (unsigned char*)gps_startstring, 2);
-					ringbuffer1(RBWRITE, (unsigned char*)GPS_CFG_SBAS, 14);
-					UART1_send_ringbuffer();
-					gpsconf_state++;
-				}
-				gpsconfig_timeout=0;
-			} else
-				gpsconfig_timeout++;
-		break;
-		case 6:
-			if (GPS_ACK_received)
-			{
-				GPS_ACK_received=0;
-				if (ringbuffer1(RBFREE, 0, 0)>21)
-				{
-					ringbuffer1(RBWRITE, (unsigned char*)gps_startstring, 2);
-					ringbuffer1(RBWRITE, (unsigned char*)GPS_CFG_CFG, 19);
-					UART1_send_ringbuffer();
-					gpsconf_state++;
-				}
-				gpsconfig_timeout=0;
-			} else
-				gpsconfig_timeout++;
-		break;
-		case 7:
-			if (GPS_ACK_received)
-			{
-				GPS_ACK_received=0;
-				GPS_init_status=GPS_IS_CONFIGURED;
-				gpsconf_state=0;
-				gpsconfig_timeout=0;
-			} else
-				gpsconfig_timeout++;
-		break;
-		default:
-			gpsconf_state=0;
-		break;
-	}
-	if (gpsconfig_timeout>GPSCONF_TIMEOUT)				//timeout for ACK receiving
-	{
-		if (StartWithHighBaudrate)
-		{
-			gpsconf_state=0;
-			gpsconfig_timeout=0;
-		} else
-		{
-			gpsconf_state=0;
-			gpsconfig_timeout=0;
-			GPS_init_status=GPS_CONFIG_ERROR;
-		}
-	}
-}
diff --git a/ccny_asctec_firmware_2/src/util.c b/ccny_asctec_firmware_2/src/util.c
deleted file mode 100644
index 4054d69..0000000
--- a/ccny_asctec_firmware_2/src/util.c
+++ /dev/null
@@ -1,12 +0,0 @@
-#include "util.h"
-
-void wait(int usec)
-{
-    volatile int64_t time_start = g_timestamp;
-
-    while(g_timestamp < time_start + usec)
-    {
-        //do nothing
-    }
-}
-
diff --git a/pelican_urdf/CMakeLists.txt b/pelican_urdf/CMakeLists.txt
deleted file mode 100644
index f8f1c9c..0000000
--- a/pelican_urdf/CMakeLists.txt
+++ /dev/null
@@ -1,30 +0,0 @@
-cmake_minimum_required(VERSION 2.4.6)
-include($ENV{ROS_ROOT}/core/rosbuild/rosbuild.cmake)
-
-# Set the build type.  Options are:
-#  Coverage       : w/ debug symbols, w/o optimization, w/ code-coverage
-#  Debug          : w/ debug symbols, w/o optimization
-#  Release        : w/o debug symbols, w/ optimization
-#  RelWithDebInfo : w/ debug symbols, w/ optimization
-#  MinSizeRel     : w/o debug symbols, w/ optimization, stripped binaries
-#set(ROS_BUILD_TYPE RelWithDebInfo)
-
-rosbuild_init()
-
-#set the default path for built executables to the "bin" directory
-set(EXECUTABLE_OUTPUT_PATH ${PROJECT_SOURCE_DIR}/bin)
-#set the default path for built libraries to the "lib" directory
-set(LIBRARY_OUTPUT_PATH ${PROJECT_SOURCE_DIR}/lib)
-
-#uncomment if you have defined messages
-#rosbuild_genmsg()
-#uncomment if you have defined services
-#rosbuild_gensrv()
-
-#common commands for building c++ executables and libraries
-#rosbuild_add_library(${PROJECT_NAME} src/example.cpp)
-#target_link_libraries(${PROJECT_NAME} another_library)
-#rosbuild_add_boost_directories()
-#rosbuild_link_boost(${PROJECT_NAME} thread)
-#rosbuild_add_executable(example examples/example.cpp)
-#target_link_libraries(example ${PROJECT_NAME})
diff --git a/pelican_urdf/Makefile b/pelican_urdf/Makefile
deleted file mode 100644
index b75b928..0000000
--- a/pelican_urdf/Makefile
+++ /dev/null
@@ -1 +0,0 @@
-include $(shell rospack find mk)/cmake.mk
\ No newline at end of file
diff --git a/pelican_urdf/data/city_flyer.xml b/pelican_urdf/data/city_flyer.xml
deleted file mode 100644
index 27796ee..0000000
--- a/pelican_urdf/data/city_flyer.xml
+++ /dev/null
@@ -1,144 +0,0 @@
-<robot name="CityFlyer">
-  
-################################################################################
-# LINKS                                                                        #
-################################################################################
-
-  ##### base_link ##############################################################
-
-  <link name="base_link">
-    <visual>
-      <origin xyz="0.0 0.0 0.0" rpy="1.57 0.0 3.1415"/>
-      <geometry>
-        <mesh filename="package://pelican_urdf/data/pelican.stl" 
-              scale="0.001 0.001 0.001"/>
-      </geometry>
-      <material name="blue">
-        <color rgba="0.4 0.4 0.5 1.0"/>
-      </material>
-    </visual>
-  </link>
-
-  ##### base_footprint #########################################################
-
-  <link name="base_footprint"/>
-
-  ##### legs ###################################################################
-
-  <link name="leg_1">
-    <visual>
-      <geometry>
-       <box size="0.044 0.007 0.114"/>
-      </geometry>
-      <origin xyz="0.089 0.00 -0.057" rpy="0.0 0.0 0.0"/>
-      <material name="g">
-        <color rgba="0.2 0.25 0.25 1.0"/>
-      </material>
-    </visual>
-  </link>
-
-  <link name="leg_2">
-    <visual>
-      <geometry>
-       <box size="0.044 0.007 0.114"/>
-      </geometry>
-      <origin xyz="-0.089 0.00 -0.057" rpy="0.0 0.0 0.0"/>
-      <material name="g"/>
-    </visual>
-  </link>
-
-  <link name="leg_3">
-    <visual>
-      <geometry>
-       <box size="0.044 0.007 0.114"/>
-      </geometry>
-      <origin xyz="0.00 0.089 -0.057" rpy="0.0 0.0 1.5708"/>
-      <material name="g"/>
-    </visual>
-  </link>
-
-  <link name="leg_4">
-    <visual>
-      <geometry>
-       <box size="0.044 0.007 0.114"/>
-      </geometry>
-      <origin xyz="0.00 -0.089 -0.057" rpy="0.0 0.0 1.5708"/>
-      <material name="g"/>
-    </visual>
-  </link>
-
-  ##### lasers #################################################################
-
-  <link name="laser">
-    <visual>
-      <origin xyz="0.0 0.0 -0.056" rpy="1.5708 0.0 1.5708"/>
-      <geometry>
-        <mesh filename="package://pelican_urdf/data/hokuyo_utm30lx.stl" 
-              scale="0.001 0.001 0.001"/>
-      </geometry>
-      <material name="red">
-        <color rgba="0.4 0.2 0.2 1.0"/>
-      </material>
-    </visual>
-  </link>
-
-  <link name="rvl"/>
-
-
-################################################################################
-# JOINTS                                                                       #
-################################################################################
-
-  ##### base_footprint #########################################################
-
-  <joint name="base_link_to_base_footprint" type="fixed">
-    <parent link="base_link"/>
-    <child link="base_footprint"/>
-    <origin xyz="0.00 0.00 -0.195" rpy="0.0 0.0 0.0"/>
-  </joint>
-
-  ##### legs ###################################################################
-  
-  <joint name="base_link_to_leg_1" type="fixed">
-    <parent link="base_link"/>
-    <child link="leg_1"/>
-    <origin xyz="0.00 0.00 -0.083" rpy="0.0 0.0 0.0"/>
-  </joint>
-
-  <joint name="base_link_to_leg_2" type="fixed">
-    <parent link="base_link"/>
-    <child link="leg_2"/>
-    <origin xyz="0.00 0.00 -0.083" rpy="0.0 0.0 0.0"/>
-  </joint>
-
-  <joint name="base_link_to_leg_3" type="fixed">
-    <parent link="base_link"/>
-    <child link="leg_3"/>
-    <origin xyz="0.00 0.00 -0.083" rpy="0.0 0.0 0.0"/>
-  </joint>
-
-  <joint name="base_link_to_leg_4" type="fixed">
-    <parent link="base_link"/>
-    <child link="leg_4"/>
-    <origin xyz="0.00 0.00 -0.083" rpy="0.0 0.0 0.0"/>
-  </joint>
-
-  ##### laser ##################################################################
-
-  <joint name="base_link_to_laser" type="fixed">
-    <parent link="base_link"/>
-    <child link="laser"/>
-    <origin xyz="0.00 0.00 0.12" rpy="0.0 0.0 0.0"/>
-  </joint>
-
-  ##### right virtual laser ####################################################
-
-  <joint name="laser_to_rvl" type="fixed">
-    <parent link="laser"/>
-    <child link="rvl"/>
-    <origin xyz="-0.0474 -0.0474 0.0670" rpy="1.5708 -0.7854 -0.7854"/>
-  </joint>
-
-</robot>
-
-
diff --git a/pelican_urdf/data/city_flyer_rgbd.xml b/pelican_urdf/data/city_flyer_rgbd.xml
deleted file mode 100644
index 6460a31..0000000
--- a/pelican_urdf/data/city_flyer_rgbd.xml
+++ /dev/null
@@ -1,123 +0,0 @@
-<robot name="CityFlyer">
-  
-################################################################################
-# LINKS                                                                        #
-################################################################################
-
-  ##### base_link ##############################################################
-
-  <link name="base_link">
-    <visual>
-      <origin xyz="0.0 0.0 0.0" rpy="1.57 0.0 3.1415"/>
-      <geometry>
-        <mesh filename="package://pelican_urdf/data/pelican.stl" 
-              scale="0.001 0.001 0.001"/>
-      </geometry>
-      <material name="blue">
-        <color rgba="0.4 0.4 0.5 1.0"/>
-      </material>
-    </visual>
-  </link>
-
-  ##### base_footprint #########################################################
-
-  <link name="base_footprint"/>
-
-  ##### legs ###################################################################
-
-  <link name="leg_1">
-    <visual>
-      <geometry>
-       <box size="0.044 0.007 0.114"/>
-      </geometry>
-      <origin xyz="0.089 0.00 -0.057" rpy="0.0 0.0 0.0"/>
-      <material name="g">
-        <color rgba="0.2 0.25 0.25 1.0"/>
-      </material>
-    </visual>
-  </link>
-
-  <link name="leg_2">
-    <visual>
-      <geometry>
-       <box size="0.044 0.007 0.114"/>
-      </geometry>
-      <origin xyz="-0.089 0.00 -0.057" rpy="0.0 0.0 0.0"/>
-      <material name="g"/>
-    </visual>
-  </link>
-
-  <link name="leg_3">
-    <visual>
-      <geometry>
-       <box size="0.044 0.007 0.114"/>
-      </geometry>
-      <origin xyz="0.00 0.089 -0.057" rpy="0.0 0.0 1.5708"/>
-      <material name="g"/>
-    </visual>
-  </link>
-
-  <link name="leg_4">
-    <visual>
-      <geometry>
-       <box size="0.044 0.007 0.114"/>
-      </geometry>
-      <origin xyz="0.00 -0.089 -0.057" rpy="0.0 0.0 1.5708"/>
-      <material name="g"/>
-    </visual>
-  </link>
-
-  ##### camera #################################################################
-
-  <link name="camera_link"/>
-
-
-################################################################################
-# JOINTS                                                                       #
-################################################################################
-
-  ##### base_footprint #########################################################
-
-  <joint name="base_link_to_base_footprint" type="fixed">
-    <parent link="base_link"/>
-    <child link="base_footprint"/>
-    <origin xyz="0.00 0.00 -0.195" rpy="0.0 0.0 0.0"/>
-  </joint>
-
-  ##### legs ###################################################################
-  
-  <joint name="base_link_to_leg_1" type="fixed">
-    <parent link="base_link"/>
-    <child link="leg_1"/>
-    <origin xyz="0.00 0.00 -0.083" rpy="0.0 0.0 0.0"/>
-  </joint>
-
-  <joint name="base_link_to_leg_2" type="fixed">
-    <parent link="base_link"/>
-    <child link="leg_2"/>
-    <origin xyz="0.00 0.00 -0.083" rpy="0.0 0.0 0.0"/>
-  </joint>
-
-  <joint name="base_link_to_leg_3" type="fixed">
-    <parent link="base_link"/>
-    <child link="leg_3"/>
-    <origin xyz="0.00 0.00 -0.083" rpy="0.0 0.0 0.0"/>
-  </joint>
-
-  <joint name="base_link_to_leg_4" type="fixed">
-    <parent link="base_link"/>
-    <child link="leg_4"/>
-    <origin xyz="0.00 0.00 -0.083" rpy="0.0 0.0 0.0"/>
-  </joint>
-
-  ##### rgbd ##################################################################
-
-  <joint name="base_link_to_camera" type="fixed">
-    <parent link="base_link"/>
-    <child link="camera_link"/>
-    <origin xyz="0.00 0.00 0.20" rpy="0.0 0.23 0.0"/>
-  </joint>
-
-</robot>
-
-
diff --git a/pelican_urdf/data/hokuyo_utm30lx.stl b/pelican_urdf/data/hokuyo_utm30lx.stl
deleted file mode 100644
index 6eccd68..0000000
Binary files a/pelican_urdf/data/hokuyo_utm30lx.stl and /dev/null differ
diff --git a/pelican_urdf/data/pelican.ply b/pelican_urdf/data/pelican.ply
deleted file mode 100644
index cbeed39..0000000
Binary files a/pelican_urdf/data/pelican.ply and /dev/null differ
diff --git a/pelican_urdf/data/pelican.stl.old b/pelican_urdf/data/pelican.stl.old
deleted file mode 100644
index df95076..0000000
Binary files a/pelican_urdf/data/pelican.stl.old and /dev/null differ
diff --git a/pelican_urdf/data/pelican.xml b/pelican_urdf/data/pelican.xml
deleted file mode 100644
index 3d47c07..0000000
--- a/pelican_urdf/data/pelican.xml
+++ /dev/null
@@ -1,110 +0,0 @@
-<robot name="Asctec Pelican">
-  
-################################################################################
-# LINKS                                                                        #
-################################################################################
-
-  ##### base_link ##############################################################
-
-  <link name="base_link">
-    <visual>
-      <origin xyz="0.0 0.0 0.0" rpy="1.57 0.0 3.1415"/>
-      <geometry>
-        <mesh filename="package://pelican_urdf/data/pelican.stl" 
-              scale="0.001 0.001 0.001"/>
-      </geometry>
-      <material name="blue">
-        <color rgba="0.4 0.4 0.5 1.0"/>
-      </material>
-    </visual>
-  </link>
-
-  ##### base_footprint #########################################################
-
-  <link name="base_footprint"/>
-
-  ##### legs ###################################################################
-
-  <link name="leg_1">
-    <visual>
-      <geometry>
-       <box size="0.044 0.007 0.114"/>
-      </geometry>
-      <origin xyz="0.089 0.00 -0.057" rpy="0.0 0.0 0.0"/>
-      <material name="g">
-        <color rgba="0.2 0.25 0.25 1.0"/>
-      </material>
-    </visual>
-  </link>
-
-  <link name="leg_2">
-    <visual>
-      <geometry>
-       <box size="0.044 0.007 0.114"/>
-      </geometry>
-      <origin xyz="-0.089 0.00 -0.057" rpy="0.0 0.0 0.0"/>
-      <material name="g"/>
-    </visual>
-  </link>
-
-  <link name="leg_3">
-    <visual>
-      <geometry>
-       <box size="0.044 0.007 0.114"/>
-      </geometry>
-      <origin xyz="0.00 0.089 -0.057" rpy="0.0 0.0 1.5708"/>
-      <material name="g"/>
-    </visual>
-  </link>
-
-  <link name="leg_4">
-    <visual>
-      <geometry>
-       <box size="0.044 0.007 0.114"/>
-      </geometry>
-      <origin xyz="0.00 -0.089 -0.057" rpy="0.0 0.0 1.5708"/>
-      <material name="g"/>
-    </visual>
-  </link>
-
-################################################################################
-# JOINTS                                                                       #
-################################################################################
-
-  ##### base_footprint #########################################################
-
-  <joint name="base_link_to_base_footprint" type="fixed">
-    <parent link="base_link"/>
-    <child link="base_footprint"/>
-    <origin xyz="0.00 0.00 -0.195" rpy="0.0 0.0 0.0"/>
-  </joint>
-
-  ##### legs ###################################################################
-  
-  <joint name="base_link_to_leg_1" type="fixed">
-    <parent link="base_link"/>
-    <child link="leg_1"/>
-    <origin xyz="0.00 0.00 -0.083" rpy="0.0 0.0 0.0"/>
-  </joint>
-
-  <joint name="base_link_to_leg_2" type="fixed">
-    <parent link="base_link"/>
-    <child link="leg_2"/>
-    <origin xyz="0.00 0.00 -0.083" rpy="0.0 0.0 0.0"/>
-  </joint>
-
-  <joint name="base_link_to_leg_3" type="fixed">
-    <parent link="base_link"/>
-    <child link="leg_3"/>
-    <origin xyz="0.00 0.00 -0.083" rpy="0.0 0.0 0.0"/>
-  </joint>
-
-  <joint name="base_link_to_leg_4" type="fixed">
-    <parent link="base_link"/>
-    <child link="leg_4"/>
-    <origin xyz="0.00 0.00 -0.083" rpy="0.0 0.0 0.0"/>
-  </joint>
-
-</robot>
-
-
diff --git a/pelican_urdf/data/pelican_color.png b/pelican_urdf/data/pelican_color.png
deleted file mode 100644
index c3b919c..0000000
Binary files a/pelican_urdf/data/pelican_color.png and /dev/null differ
diff --git a/pelican_urdf/launch/city_flyer.launch b/pelican_urdf/launch/city_flyer.launch
deleted file mode 100644
index 8415961..0000000
--- a/pelican_urdf/launch/city_flyer.launch
+++ /dev/null
@@ -1,9 +0,0 @@
-<launch>
-
-  <param name="robot_description" command="cat $(find pelican_urdf)/data/city_flyer.xml" />
-  
-  <node name="robot_state_publisher" pkg="robot_state_publisher" type="state_publisher">
-    <param name="publish_frequency" value="100.0"/>
-  </node>
-
-</launch>
diff --git a/pelican_urdf/launch/pelican.launch b/pelican_urdf/launch/pelican.launch
deleted file mode 100644
index ed4bb69..0000000
--- a/pelican_urdf/launch/pelican.launch
+++ /dev/null
@@ -1,9 +0,0 @@
-<launch>
-
-  <param name="robot_description" command="cat $(find pelican_urdf)/data/pelican.xml" />
-  
-  <node name="robot_state_publisher" pkg="robot_state_publisher" type="state_publisher">
-    <param name="publish_frequency" value="100.0"/>
-  </node>
-
-</launch>
diff --git a/pelican_urdf/mainpage.dox b/pelican_urdf/mainpage.dox
deleted file mode 100644
index 656c9eb..0000000
--- a/pelican_urdf/mainpage.dox
+++ /dev/null
@@ -1,26 +0,0 @@
-/**
-\mainpage
-\htmlinclude manifest.html
-
-\b pelican_urdf is ... 
-
-<!-- 
-Provide an overview of your package.
--->
-
-
-\section codeapi Code API
-
-<!--
-Provide links to specific auto-generated API documentation within your
-package that is of particular interest to a reader. Doxygen will
-document pretty much every part of your code, so do your best here to
-point the reader to the actual API.
-
-If your codebase is fairly large or has different sets of APIs, you
-should use the doxygen 'group' tag to keep these APIs together. For
-example, the roscpp documentation has 'libros' group.
--->
-
-
-*/
diff --git a/pelican_urdf/manifest.xml b/pelican_urdf/manifest.xml
deleted file mode 100644
index 4a91971..0000000
--- a/pelican_urdf/manifest.xml
+++ /dev/null
@@ -1,14 +0,0 @@
-<package>
-  <description brief="pelican_urdf">
-
-     STL and URDF files for the AscTec Pelican quadrotor.
-
-  </description>
-  <author>William Morris, Ivan Dryanovski</author>
-  <license>GPL</license>
-  <review status="unreviewed" notes=""/>
-  <url>http://ros.org/wiki/pelican_urdf</url>
-
-</package>
-
-
diff --git a/stack.xml b/stack.xml
deleted file mode 100644
index 24af120..0000000
--- a/stack.xml
+++ /dev/null
@@ -1,15 +0,0 @@
-<stack>
-  <description brief="AscTec Quadrotor drivers">Driver stack for AscTec Quadrotors including the Pelican and Hummingbird</description>
-  <author>Maintained by Ivan Dryanovski, Roberto G. Valenti, William Morris, et al.</author>
-  <license>GPL</license>  
-  <review status="experimental" notes="Under active development"/>
-  <url>http://ros.org/wiki/asctec_drivers</url>
-  <version>0.1.0</version>
-  <depend stack="common_msgs" /> <!-- nav_msgs, geometry_msgs, sensor_msgs -->
-  <depend stack="diagnostics" /> <!-- diagnostic_updater -->
-  <depend stack="geometry" /> <!-- tf -->
-  <depend stack="mav_tools" /> <!-- mav_msgs -->
-  <depend stack="common" /> <!-- nodelet -->
-  <depend stack="ros" />
-  <depend stack="ros_comm" /> <!-- rospy, std_msgs, roscpp -->
-</stack>