diff --git a/src/lib.rs b/src/lib.rs index 0ab8f42..e68c666 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -125,6 +125,15 @@ where Ok(()) } + /// How many SW rows to enable + pub fn sw_enablement(&mut self, setting: SwSetting) -> Result<(), I2cError> { + let config_register = self.read_register(Page::Config, addresses::CONFIG_REGISTER)?; + + let new_val = (config_register & 0x0F) | (setting as u8) << 4; + self.write_register(Page::Config, addresses::CONFIG_REGISTER, new_val)?; + Ok(()) + } + /// Set the PWM frequency pub fn set_pwm_freq(&mut self, pwm: PwmFreq) -> Result<(), I2cError> { self.write_register(Page::Config, addresses::PWM_FREQ_REGISTER, pwm as u8) @@ -168,6 +177,40 @@ where ], ) } + + //pub fn check_open(&mut self, register: u8) -> Result { + pub fn check_open>( + &mut self, + delay: &mut DEL, + register: u8, + open: bool, + ) -> Result { + // Set low current before testing + self.write_register(Page::Config, addresses::CURRENT_REGISTER, 0x01)?; + if open { + self.write_register(Page::Config, addresses::PULL_UP_REGISTER, 0x00)?; + } + delay.delay_ms(10); + + // Trigger detection + // OSDE 01 => open detection + // OSDE 10 => short detection + let osde = if open { 0b010 } else { 0b100 }; + let reg = self.read_register(Page::Config, addresses::CONFIG_REGISTER)?; + let reg = reg & (!0b110); // Clear OSDE + self.write_register(Page::Config, addresses::CONFIG_REGISTER, reg)?; + delay.delay_ms(100); + self.write_register(Page::Config, addresses::CONFIG_REGISTER, reg | osde)?; + delay.delay_ms(100); + + // Read status + let status = self.read_register(Page::Config, register)?; + + // Reset high current again + //self.write_register(Page::Config, addresses::CURRENT_REGISTER, 0xFF)?; + delay.delay_ms(10); + Ok(status) + } } /// See the [data sheet](https://lumissil.com/assets/pdf/core/IS31FL3741A_DS.pdf) @@ -221,3 +264,25 @@ pub enum PwmFreq { /// 900Hz P900 = 0x0B, } + +#[repr(u8)] +pub enum SwSetting { + // SW1-SW9 active + Sw1Sw9 = 0b0000, + // SW1-SW8 active, SW9 not active + Sw1Sw8 = 0b0001, + // SW1-SW7 active, SW8-SW9 not active + Sw1Sw7 = 0b0010, + // SW1-SW6 active, SW7-SW9 not active + Sw1Sw6 = 0b0011, + // SW1-SW5 active, SW6-SW9 not active + Sw1Sw5 = 0b0100, + // SW1-SW4 active, SW5-SW9 not activee + Sw1Sw4 = 0b0101, + // SW1-SW3 active, SW4-SW9 not active + Sw1Sw3 = 0b0110, + // SW1-SW2 active, SW3-SW9 not active + Sw1Sw2 = 0b0111, + // All CSx pins only act as current sink, no scanning + NoScan = 0b1000, +}