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Apollo Findings and Fixes #87

@Informaticore

Description

@Informaticore
  • ATTENTION: R47 came with a 10k resistor but should be 100k!!!!!!

General

  • Change U8 Footprint from SOT23-6 to WSON (or exchange the component with the SOT version)
  • Connect U8 VIN to actual VIN (missing label on the sheet)
  • Replace the footprint used for the DMN3023L MOSFETs (Q3 & Q15) :
    Pin configuration : DGS (bad) -> GSD (good)
    https://www.diodes.com/assets/Datasheets/DMN3023L.pdf
  • swap protection ic with version supporting auto enable ("A" versions)
  • Remove SMBALERT wire between LTC4162-L chip (pin12) and the 2.54mm pitch 13pin connector (pin13). It will allow to use this pin for "one wire" RGB LED (RGB LED Out)
  • Update SMBALERT LED (LED2) and resistor (R12) to DNP (Do Not Populate). It will allow the usage for DEBUG as an option and optimize the board Iq by default.
  • Add a Solder Jumper (shorted by default) between Vbat+ and R1 (AP9101) to add the possibility to manually desactivate the battery protection feature when the battery has their own embedded chip. It will improve the board Iq.
  • Rename some power signal on Schematic to improve readability.
  • Increase QR Code Size (replace 5x5mm by 12x12mm)
  • Add a Test Point for Battery Charger Output (Vin for DC-DC regulator and RTC)
  • Flip JP3 (Top to bottom Layer)
  • Flip JP1 Cell Number Selection (Top to bottom Layer)
  • Add a new 0805 resistor in // to Rsns (R20) to improve resistor Max Power (0805 0.5W 130 mOhm x2 instead 0805 0.25W 68mOhm x1)

Board routing
LTC4162-L

  • C3 4.7µF capacitor should be closer to the chip. (LTC internal regulator output pin 2)

Power Tracks width

  • Increase Track width for Power lines (0.25mm is too small). Use at least 0.5mm for short tracks and more for longer tracks as possible to minimize power losses and keep a good voltage on DC-DC converters outputs. (Current can be >2A by track for DC-DC converters)
  • Add more vias for Power Lines as possible. A good rule is to use one via for 500mA.

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