RTC Control Reg Overwrite #1
Description
Issue:
Seemingly at random, certain registers of the RTC can be overwritten causing significant issues. The two examples experienced of this so far are: overwriting the control register and setting the square wave output bit (this causes the system to act like the alarm is constantly triggered), and overwriting the clock trim register (this causes the clock to run extremely fast as similarly behave as if the alarm is being constantly triggered).
Cause of this is unknown, and it has not been directly observed by viewing the bus, only the results of the erroneously set bits.
Workaround:
The RTC interface library has been modified to clear these potentially problematic bits in the registers since they are not used in current operations. However, this is not an acceptable long term solution, since these are desirable features to be able to utilize, especially the clock trimming feature.