From 02310f478cb77933d59dc1be59fee4eb2ea19a2b Mon Sep 17 00:00:00 2001 From: Ryan Vergel Date: Mon, 9 Jun 2025 14:29:37 -0600 Subject: [PATCH] Moved referenced file --- .../hardware_design_creation.rst | 2 +- .../hardware_design_creation}/genBd.tcl | 0 2 files changed, 1 insertion(+), 1 deletion(-) rename pciedebug/source/{_static => docs/PS_PCIe_PL_PCIe_Root_Port_Driver/MPSoC_PL_XDMA_Bridge_RC_Design_Bare_Metal/hardware_design_creation}/genBd.tcl (100%) diff --git a/pciedebug/source/docs/PS_PCIe_PL_PCIe_Root_Port_Driver/MPSoC_PL_XDMA_Bridge_RC_Design_Bare_Metal/hardware_design_creation.rst b/pciedebug/source/docs/PS_PCIe_PL_PCIe_Root_Port_Driver/MPSoC_PL_XDMA_Bridge_RC_Design_Bare_Metal/hardware_design_creation.rst index 89403fe1..dd062355 100644 --- a/pciedebug/source/docs/PS_PCIe_PL_PCIe_Root_Port_Driver/MPSoC_PL_XDMA_Bridge_RC_Design_Bare_Metal/hardware_design_creation.rst +++ b/pciedebug/source/docs/PS_PCIe_PL_PCIe_Root_Port_Driver/MPSoC_PL_XDMA_Bridge_RC_Design_Bare_Metal/hardware_design_creation.rst @@ -25,4 +25,4 @@ The design is configured with the following settings: Download the TCL script for generating the design from the link below: -:download:`genBd.tcl <_static/genBd.tcl>` +:download:`genBd.tcl <./hardware_design_creation/genBd.tcl>` diff --git a/pciedebug/source/_static/genBd.tcl b/pciedebug/source/docs/PS_PCIe_PL_PCIe_Root_Port_Driver/MPSoC_PL_XDMA_Bridge_RC_Design_Bare_Metal/hardware_design_creation/genBd.tcl similarity index 100% rename from pciedebug/source/_static/genBd.tcl rename to pciedebug/source/docs/PS_PCIe_PL_PCIe_Root_Port_Driver/MPSoC_PL_XDMA_Bridge_RC_Design_Bare_Metal/hardware_design_creation/genBd.tcl