diff --git a/crates/vm-device/src/device/virtio/virtio_balloon_traditional.rs b/crates/vm-device/src/device/virtio/virtio_balloon_traditional.rs
index c4fd3fd..62323fb 100644
--- a/crates/vm-device/src/device/virtio/virtio_balloon_traditional.rs
+++ b/crates/vm-device/src/device/virtio/virtio_balloon_traditional.rs
@@ -61,7 +61,7 @@ where
     C: MemoryContainer,
 {
     const NAME: &str = "virtio-balloon-tranditional";
-    const DEVICE_ID: u32 = DeviceId::Balloon as u32;
+    const DEVICE_ID: u16 = DeviceId::Balloon as u16;
     const DEVICE_FEATURES: u64 = (1 << VIRTIO_F_VERSION_1);
 
     fn virtqueues_size_max(&self) -> Vec<Option<u32>> {
diff --git a/crates/vm-device/src/device/virtio/virtio_blk.rs b/crates/vm-device/src/device/virtio/virtio_blk.rs
index 1e46450..56ee8eb 100644
--- a/crates/vm-device/src/device/virtio/virtio_blk.rs
+++ b/crates/vm-device/src/device/virtio/virtio_blk.rs
@@ -90,7 +90,7 @@ where
     C: MemoryContainer,
 {
     const NAME: &str = "virtio-blk";
-    const DEVICE_ID: u32 = DeviceId::Blk as u32;
+    const DEVICE_ID: u16 = DeviceId::Blk as u16;
     const DEVICE_FEATURES: u64 = (1 << VIRTIO_F_VERSION_1);
 
     fn virtqueues_size_max(&self) -> Vec<Option<u32>> {
diff --git a/crates/vm-virtio/src/device.rs b/crates/vm-virtio/src/device.rs
index 1c61cfc..0bbca94 100644
--- a/crates/vm-virtio/src/device.rs
+++ b/crates/vm-virtio/src/device.rs
@@ -78,11 +78,9 @@ where
             }
 
             if updated {
-                // update irq
                 let mut isr = dev.get_interrupt_status();
                 isr.insert(InterruptStatus::VIRTIO_MMIO_INT_VRING);
-                dev.set_interrupt_status(isr);
-                self.irq_chip.trigger_irq(self.irq_line, true);
+                dev.update_interrupt_status(isr);
             }
         }
     }
@@ -90,7 +88,7 @@ where
 
 pub trait VirtioDevice<C>: Sized + Send + Sync + 'static {
     const NAME: &str;
-    const DEVICE_ID: u32;
+    const DEVICE_ID: u16;
     const DEVICE_FEATURES: u64;
 
     fn virtqueues_size_max(&self) -> Vec<Option<u32>>;
diff --git a/crates/vm-virtio/src/device/pci.rs b/crates/vm-virtio/src/device/pci.rs
index 18f46b0..a3cd038 100644
--- a/crates/vm-virtio/src/device/pci.rs
+++ b/crates/vm-virtio/src/device/pci.rs
@@ -4,7 +4,7 @@ use vm_pci::device::pci_device::PciDevice;
 
 use crate::device::VirtioDevice;
 use crate::transport::VirtioDev;
-use crate::transport::pci::VirtioPciFunction;
+use crate::transport::pci::VirtioPciTransport;
 
 pub trait VirtioPciDevice<C>: VirtioDevice<C>
 where
@@ -15,7 +15,7 @@ where
     const IRQ_PIN: u8;
 
     fn into_pci_device(self) -> PciDevice {
-        let virtio_function = VirtioPciFunction::<C, _> {
+        let virtio_function = VirtioPciTransport::<C, _> {
             dev: VirtioDev::new(self),
         };
         let function = Type0Function::new(virtio_function).unwrap();
diff --git a/crates/vm-virtio/src/transport.rs b/crates/vm-virtio/src/transport.rs
index a8f24a1..1867c4e 100644
--- a/crates/vm-virtio/src/transport.rs
+++ b/crates/vm-virtio/src/transport.rs
@@ -14,10 +14,11 @@ use crate::types::interrupt_status::InterruptStatus;
 use crate::types::status::Status;
 use crate::virtqueue::Virtqueue;
 
-pub mod control_register;
 pub mod mmio;
 pub mod pci;
 
+mod control_register;
+
 pub struct VirtioDev<C, D> {
     device: D,
 
@@ -316,7 +317,9 @@ where
         self.interrupt_status
     }
 
-    pub fn set_interrupt_status(&mut self, is: InterruptStatus) {
+    pub fn update_interrupt_status(&mut self, is: InterruptStatus) {
         self.interrupt_status = is;
+
+        self.device.trigger_irq(!self.interrupt_status.is_empty());
     }
 }
diff --git a/crates/vm-virtio/src/transport/mmio/mmio_handler.rs b/crates/vm-virtio/src/transport/mmio/mmio_handler.rs
index b7c4eb0..7fd8c74 100644
--- a/crates/vm-virtio/src/transport/mmio/mmio_handler.rs
+++ b/crates/vm-virtio/src/transport/mmio/mmio_handler.rs
@@ -27,7 +27,7 @@ where
         match reg {
             MmioControlRegister::MagicValue => VIRTIO_MMIO_MAGIC_VALUE,
             MmioControlRegister::Version => VIRTIO_MMIO_VERSION,
-            MmioControlRegister::DeviceId => D::DEVICE_ID,
+            MmioControlRegister::DeviceId => D::DEVICE_ID as u32,
             MmioControlRegister::VendorId => VIRTIO_MMIO_VENDOR_ID,
             MmioControlRegister::DeviceFeatures => dev.read_reg(ControlRegister::DeviceFeatures),
             MmioControlRegister::QueueSizeMax => dev.read_reg(ControlRegister::QueueSizeMax),
@@ -66,14 +66,9 @@ where
             MmioControlRegister::QueueReady => dev.write_reg(ControlRegister::QueueReady, val),
             MmioControlRegister::QueueNotify => dev.write_reg(ControlRegister::QueueNotify, val),
             MmioControlRegister::InterruptAck => {
-                // TODO
-
-                dev.interrupt_status
-                    .remove(InterruptStatus::from_bits_truncate(val));
-
-                if dev.interrupt_status.is_empty() {
-                    dev.device.trigger_irq(false);
-                }
+                let mut is = dev.get_interrupt_status();
+                is.remove(InterruptStatus::from_bits_truncate(val));
+                dev.update_interrupt_status(is);
 
                 Ok(())
             }
diff --git a/crates/vm-virtio/src/transport/pci.rs b/crates/vm-virtio/src/transport/pci.rs
index b36732c..6a09cfd 100644
--- a/crates/vm-virtio/src/transport/pci.rs
+++ b/crates/vm-virtio/src/transport/pci.rs
@@ -11,105 +11,23 @@ use vm_pci::types::configuration_space::ConfigurationSpace;
 
 use crate::device::pci::VirtioPciDevice;
 use crate::transport::VirtioDev;
-use crate::transport::control_register::ControlRegister;
 use crate::transport::pci::common_config_handler::CommonConfigHandler;
-use crate::transport::pci::pci_header::VENDOR_ID;
+use crate::transport::pci::device_handler::DeviceHandler;
+use crate::transport::pci::isr_handler::IsrHandler;
+use crate::transport::pci::notify_handler::NotifyHandler;
 use crate::types::pci::VirtioPciCap;
 use crate::types::pci::VirtioPciCapCfgType;
 use crate::types::pci::VirtioPciCommonCfg;
 use crate::types::pci::VirtioPciNotifyCap;
 
-pub mod pci_header;
-
 mod common_config_handler;
+mod device_handler;
+mod isr_handler;
+mod notify_handler;
 
-struct NotifyHandler<C, D>
-where
-    C: MemoryContainer,
-    D: VirtioPciDevice<C>,
-{
-    dev: Arc<Mutex<VirtioDev<C, D>>>,
-}
+const VIRTIO_PCI_VENDOR_ID: u16 = 0x1AF4;
 
-impl<C, D> BarHandler for NotifyHandler<C, D>
-where
-    C: MemoryContainer,
-    D: VirtioPciDevice<C>,
-{
-    fn read(&self, _offset: u64, _data: &mut [u8]) {
-        unreachable!()
-    }
-
-    fn write(&self, _offset: u64, data: &[u8]) {
-        assert_eq!(data.len(), 2);
-        let queue_index = u16::from_le_bytes(data.try_into().unwrap());
-        let mut dev = self.dev.lock().unwrap();
-        dev.write_reg(ControlRegister::QueueNotify, queue_index.into())
-            .unwrap();
-    }
-}
-
-struct IsrHandler<C, D>
-where
-    C: MemoryContainer,
-    D: VirtioPciDevice<C>,
-{
-    dev: Arc<Mutex<VirtioDev<C, D>>>,
-}
-
-impl<C, D> BarHandler for IsrHandler<C, D>
-where
-    C: MemoryContainer,
-    D: VirtioPciDevice<C>,
-{
-    fn read(&self, _offset: u64, data: &mut [u8]) {
-        let mut dev = self.dev.lock().unwrap();
-
-        let isr = dev.read_reg(ControlRegister::InterruptStatus);
-        data[0] = isr as u8;
-
-        /*
-         * From `4.1.4.5.1 Device Requirements: ISR status capability`
-         * - The device MUST reset ISR status to 0 on driver read.
-         */
-        dev.write_reg(ControlRegister::InterruptStatus, 0).unwrap();
-        dev.device.trigger_irq(false);
-    }
-
-    fn write(&self, _offset: u64, _data: &[u8]) {
-        unreachable!()
-    }
-}
-
-struct DeviceHandler<C, D>
-where
-    C: MemoryContainer,
-    D: VirtioPciDevice<C>,
-{
-    dev: Arc<Mutex<VirtioDev<C, D>>>,
-}
-
-impl<C, D> BarHandler for DeviceHandler<C, D>
-where
-    C: MemoryContainer,
-    D: VirtioPciDevice<C>,
-{
-    fn read(&self, offset: u64, data: &mut [u8]) {
-        let dev = self.dev.lock().unwrap();
-
-        dev.read_config(offset.try_into().unwrap(), data.len(), data)
-            .unwrap();
-    }
-
-    fn write(&self, offset: u64, data: &[u8]) {
-        let mut dev = self.dev.lock().unwrap();
-
-        dev.write_config(offset.try_into().unwrap(), data.len(), data)
-            .unwrap();
-    }
-}
-
-pub struct VirtioPciFunction<C, D>
+pub struct VirtioPciTransport<C, D>
 where
     C: MemoryContainer,
     D: VirtioPciDevice<C>,
@@ -117,12 +35,12 @@ where
     pub dev: Arc<Mutex<VirtioDev<C, D>>>,
 }
 
-impl<C, D> PciTypeFunctionCommon for VirtioPciFunction<C, D>
+impl<C, D> PciTypeFunctionCommon for VirtioPciTransport<C, D>
 where
     C: MemoryContainer,
     D: VirtioPciDevice<C>,
 {
-    const VENDOR_ID: u16 = VENDOR_ID;
+    const VENDOR_ID: u16 = VIRTIO_PCI_VENDOR_ID;
     const DEVICE_ID: u16 = 0x1040 + D::DEVICE_ID as u16;
     const CLASS_CODE: u32 = D::CLASS_CODE;
 
@@ -144,7 +62,9 @@ where
                 bar: 0,
                 id: 0,
                 offset: 0,
-                length: size_of::<VirtioPciCommonCfg>().try_into().unwrap(),
+                length: size_of::<VirtioPciCommonCfg>()
+                    .try_into()
+                    .map_err(|_| Error::CapTooLarge)?,
                 ..Default::default()
             };
 
@@ -154,7 +74,9 @@ where
         {
             let virtio_pci_notify_cap = VirtioPciNotifyCap {
                 cap: VirtioPciCap {
-                    cap_len: size_of::<VirtioPciNotifyCap>().try_into().unwrap(),
+                    cap_len: size_of::<VirtioPciNotifyCap>()
+                        .try_into()
+                        .map_err(|_| Error::CapTooLarge)?,
                     cfg_type: VirtioPciCapCfgType::VirtioPciCapNotifyCfg as u8,
                     bar: 1,
                     id: 0,
@@ -190,7 +112,10 @@ where
                 length: 0x1000,
                 ..Default::default()
             };
-            assert!(D::DEVICE_SPECIFICATION_CONFIGURATION_LEN <= 0x1000);
+
+            if D::DEVICE_SPECIFICATION_CONFIGURATION_LEN > 0x1000 {
+                return Err(Error::CapTooLarge);
+            }
 
             cfg.alloc_capability(virtio_pci_device_cfg_cap.into())?;
         }
@@ -199,7 +124,7 @@ where
     }
 }
 
-impl<C, D> PciType0Function for VirtioPciFunction<C, D>
+impl<C, D> PciType0Function for VirtioPciTransport<C, D>
 where
     C: MemoryContainer,
     D: VirtioPciDevice<C>,
diff --git a/crates/vm-virtio/src/transport/pci/device_handler.rs b/crates/vm-virtio/src/transport/pci/device_handler.rs
new file mode 100644
index 0000000..b0cce4d
--- /dev/null
+++ b/crates/vm-virtio/src/transport/pci/device_handler.rs
@@ -0,0 +1,36 @@
+use std::sync::Arc;
+use std::sync::Mutex;
+
+use vm_mm::allocator::MemoryContainer;
+use vm_pci::device::function::BarHandler;
+
+use crate::device::pci::VirtioPciDevice;
+use crate::transport::VirtioDev;
+
+pub struct DeviceHandler<C, D>
+where
+    C: MemoryContainer,
+    D: VirtioPciDevice<C>,
+{
+    pub dev: Arc<Mutex<VirtioDev<C, D>>>,
+}
+
+impl<C, D> BarHandler for DeviceHandler<C, D>
+where
+    C: MemoryContainer,
+    D: VirtioPciDevice<C>,
+{
+    fn read(&self, offset: u64, data: &mut [u8]) {
+        let dev = self.dev.lock().unwrap();
+
+        dev.read_config(offset.try_into().unwrap(), data.len(), data)
+            .unwrap();
+    }
+
+    fn write(&self, offset: u64, data: &[u8]) {
+        let mut dev = self.dev.lock().unwrap();
+
+        dev.write_config(offset.try_into().unwrap(), data.len(), data)
+            .unwrap();
+    }
+}
diff --git a/crates/vm-virtio/src/transport/pci/isr_handler.rs b/crates/vm-virtio/src/transport/pci/isr_handler.rs
new file mode 100644
index 0000000..a137d16
--- /dev/null
+++ b/crates/vm-virtio/src/transport/pci/isr_handler.rs
@@ -0,0 +1,41 @@
+use std::sync::Arc;
+use std::sync::Mutex;
+
+use vm_mm::allocator::MemoryContainer;
+use vm_pci::device::function::BarHandler;
+
+use crate::device::pci::VirtioPciDevice;
+use crate::transport::VirtioDev;
+use crate::transport::control_register::ControlRegister;
+
+pub struct IsrHandler<C, D>
+where
+    C: MemoryContainer,
+    D: VirtioPciDevice<C>,
+{
+    pub dev: Arc<Mutex<VirtioDev<C, D>>>,
+}
+
+impl<C, D> BarHandler for IsrHandler<C, D>
+where
+    C: MemoryContainer,
+    D: VirtioPciDevice<C>,
+{
+    fn read(&self, _offset: u64, data: &mut [u8]) {
+        let mut dev = self.dev.lock().unwrap();
+
+        let isr = dev.read_reg(ControlRegister::InterruptStatus);
+        data[0] = isr as u8;
+
+        /*
+         * From `4.1.4.5.1 Device Requirements: ISR status capability`
+         * - The device MUST reset ISR status to 0 on driver read.
+         */
+        dev.write_reg(ControlRegister::InterruptStatus, 0).unwrap();
+        dev.device.trigger_irq(false);
+    }
+
+    fn write(&self, _offset: u64, _data: &[u8]) {
+        unreachable!()
+    }
+}
diff --git a/crates/vm-virtio/src/transport/pci/notify_handler.rs b/crates/vm-virtio/src/transport/pci/notify_handler.rs
new file mode 100644
index 0000000..37d9985
--- /dev/null
+++ b/crates/vm-virtio/src/transport/pci/notify_handler.rs
@@ -0,0 +1,35 @@
+use std::sync::Arc;
+use std::sync::Mutex;
+
+use vm_mm::allocator::MemoryContainer;
+use vm_pci::device::function::BarHandler;
+
+use crate::device::pci::VirtioPciDevice;
+use crate::transport::VirtioDev;
+use crate::transport::control_register::ControlRegister;
+
+pub struct NotifyHandler<C, D>
+where
+    C: MemoryContainer,
+    D: VirtioPciDevice<C>,
+{
+    pub dev: Arc<Mutex<VirtioDev<C, D>>>,
+}
+
+impl<C, D> BarHandler for NotifyHandler<C, D>
+where
+    C: MemoryContainer,
+    D: VirtioPciDevice<C>,
+{
+    fn read(&self, _offset: u64, _data: &mut [u8]) {
+        unreachable!()
+    }
+
+    fn write(&self, _offset: u64, data: &[u8]) {
+        assert_eq!(data.len(), 2);
+        let queue_index = u16::from_le_bytes(data.try_into().unwrap());
+        let mut dev = self.dev.lock().unwrap();
+        dev.write_reg(ControlRegister::QueueNotify, queue_index.into())
+            .unwrap();
+    }
+}
diff --git a/crates/vm-virtio/src/transport/pci/pci_header.rs b/crates/vm-virtio/src/transport/pci/pci_header.rs
deleted file mode 100644
index efc8fc0..0000000
--- a/crates/vm-virtio/src/transport/pci/pci_header.rs
+++ /dev/null
@@ -1,8 +0,0 @@
-use crate::types::device_id::DeviceId;
-
-pub const VENDOR_ID: u16 = 0x1AF4;
-
-#[repr(u16)]
-pub enum VirtioPciDeviceId {
-    Blk = 0x1040 + DeviceId::Blk as u16,
-}