diff --git a/Bender.lock b/Bender.lock
index 25bc5a0..05af98d 100644
--- a/Bender.lock
+++ b/Bender.lock
@@ -16,8 +16,8 @@ packages:
     dependencies:
     - common_cells
   common_cells:
-    revision: c27bce39ebb2e6bae52f60960814a2afca7bd4cb
-    version: 1.37.0
+    revision: c439813c28dda0d6b74e9b72539c546c9c15c5ae
+    version: null
     source:
       Git: https://github.com/pulp-platform/common_cells.git
     dependencies:
diff --git a/Bender.yml b/Bender.yml
index c65d197..02cdc6a 100644
--- a/Bender.yml
+++ b/Bender.yml
@@ -8,7 +8,7 @@ package:
     - "Michael Rogenmoser <michaero@iis.ee.ethz.ch>"
 
 dependencies:
-  common_cells:         { git: "https://github.com/pulp-platform/common_cells.git",         version: 1.37.0 }
+  common_cells:         { git: "https://github.com/pulp-platform/common_cells.git",         rev: c439813c28dda0d6b74e9b72539c546c9c15c5ae }
   tech_cells_generic:   { git: "https://github.com/pulp-platform/tech_cells_generic.git",   version: 0.2.13 }
   cluster_interconnect: { git: "https://github.com/pulp-platform/cluster_interconnect.git", version: 1.2.1  }
   axi:                  { git: "https://github.com/pulp-platform/axi.git",                  version: 0.39.4 }
diff --git a/test/synth/axi_memory_island_synth.sv b/test/synth/axi_memory_island_synth.sv
index 3762758..0a794ea 100644
--- a/test/synth/axi_memory_island_synth.sv
+++ b/test/synth/axi_memory_island_synth.sv
@@ -10,13 +10,13 @@
 module axi_memory_island_synth #(
   localparam int unsigned AddrWidth       = 32,
   localparam int unsigned NarrowDataWidth = 32,
-  localparam int unsigned WideDataWidth   = 512,
+  localparam int unsigned WideDataWidth   = 256,
 
-  localparam int unsigned AxiIdWidth      = 3,
+  localparam int unsigned AxiIdWidth      = 2,
 
-  localparam int unsigned NumNarrowReq    = 5,
+  localparam int unsigned NumNarrowReq    = 6,
   localparam int unsigned NumWideReq      = 4,
-  localparam int unsigned WordsPerBank    = 8192
+  localparam int unsigned WordsPerBank    = 2048
 ) (
   input  logic clk_i,
   input  logic rst_ni,
@@ -280,6 +280,7 @@ module axi_memory_island_synth #(
     .NumNarrowReq         ( NumNarrowReq      ),
     .NumWideReq           ( NumWideReq        ),
     .WordsPerBank         ( WordsPerBank      ),
+    .NumWideBanks        (4),
     .SpillNarrowReqEntry (0),
     .SpillNarrowRspEntry (0),
     .SpillNarrowReqRouted(0),