diff --git a/examples/stm32wb/stm32wb55xx_nucleo.c b/examples/stm32wb/stm32wb55xx_nucleo.c index 7688f4f..9f9bef7 100644 --- a/examples/stm32wb/stm32wb55xx_nucleo.c +++ b/examples/stm32wb/stm32wb55xx_nucleo.c @@ -146,3 +146,12 @@ whal_Spi g_whalSpi = { .clk = &(whal_Stm32wbRcc_Clk) {WHAL_STM32WB55_SPI1_CLOCK}, }, }; + +whal_Rng g_whalRng = { + WHAL_STM32WB55_RNG_DEVICE, + + .cfg = &(whal_Stm32wbRng_Cfg) { + .clkCtrl = &g_whalClock, + .clk = &(whal_Stm32wbRcc_Clk) {WHAL_STM32WB55_RNG_CLOCK}, + }, +}; diff --git a/examples/stm32wb/stm32wb55xx_nucleo.h b/examples/stm32wb/stm32wb55xx_nucleo.h index 4a3e1d9..34c393b 100644 --- a/examples/stm32wb/stm32wb55xx_nucleo.h +++ b/examples/stm32wb/stm32wb55xx_nucleo.h @@ -37,4 +37,7 @@ extern whal_Flash g_whalFlash; /* SPI controller instance. */ extern whal_Spi g_whalSpi; +/* RNG instance. */ +extern whal_Rng g_whalRng; + #endif /* STM32WB55XX_NUCLEO_H */ diff --git a/src/clock/stm32wb_rcc.c b/src/clock/stm32wb_rcc.c index 38eae7f..de33c34 100644 --- a/src/clock/stm32wb_rcc.c +++ b/src/clock/stm32wb_rcc.c @@ -18,6 +18,7 @@ /* Clock Control Register - oscillator enables and status */ #define ST_RCC_CR_REG 0x000 #define ST_RCC_CR_MSIRANGE WHAL_MASK_RANGE(7, 4) /* MSI frequency range */ +#define ST_RCC_CR_HSION_MASK WHAL_MASK(8) /* HSI enable */ #define ST_RCC_CR_PLLON_MASK WHAL_MASK(24) /* PLL enable */ /* Clock Configuration Register - clock source and prescaler selection */ @@ -73,6 +74,11 @@ #define ST_RCC_APB1ENR2_LPUART1EN WHAL_MASK(0) /* LPUART1 clock enable */ #define ST_RCC_APB1ENR2_LPTIM2EN WHAL_MASK(5) /* LPTIM2 clock enable */ +/* Clock Recovery RC Register - HSI48 oscillator control */ +#define ST_RCC_CRRCR_REG 0x098 +#define ST_RCC_CRRCR_HSI48ON_MASK WHAL_MASK(0) /* HSI48 oscillator enable */ +#define ST_RCC_CRRCR_HSI48RDY_MASK WHAL_MASK(1) /* HSI48 oscillator ready */ + whal_Error whal_Stm32wbRccPll_Init(whal_Clock *clkDev) { whal_Error err; @@ -303,6 +309,27 @@ whal_Error whal_Stm32wbRccMsi_GetRate(whal_Clock *clkDev, size_t *rateOut) return WHAL_SUCCESS; } + +whal_Error whal_Stm32wbRcc_Ext_EnableHsi48(whal_Clock *clkDev, uint8_t enable) +{ + if (!clkDev) { + return WHAL_EINVAL; + } + + whal_Reg_Update(clkDev->regmap.base, ST_RCC_CRRCR_REG, ST_RCC_CRRCR_HSI48ON_MASK, + whal_SetBits(ST_RCC_CRRCR_HSI48ON_MASK, enable)); + + if (enable) { + size_t rdy; + do { + whal_Reg_Get(clkDev->regmap.base, ST_RCC_CRRCR_REG, + ST_RCC_CRRCR_HSI48RDY_MASK, &rdy); + } while (!rdy); + } + + return WHAL_SUCCESS; +} + const whal_ClockDriver whal_Stm32wbRccPll_Driver = { .Init = whal_Stm32wbRccPll_Init, .Deinit = whal_Stm32wbRccPll_Deinit, diff --git a/src/rng/rng.c b/src/rng/rng.c new file mode 100644 index 0000000..65e46b5 --- /dev/null +++ b/src/rng/rng.c @@ -0,0 +1,30 @@ +#include +#include +#include + +inline whal_Error whal_Rng_Init(whal_Rng *rngDev) +{ + if (!rngDev || !rngDev->driver || !rngDev->driver->Init) { + return WHAL_EINVAL; + } + + return rngDev->driver->Init(rngDev); +} + +inline whal_Error whal_Rng_Deinit(whal_Rng *rngDev) +{ + if (!rngDev || !rngDev->driver || !rngDev->driver->Deinit) { + return WHAL_EINVAL; + } + + return rngDev->driver->Deinit(rngDev); +} + +inline whal_Error whal_Rng_Generate(whal_Rng *rngDev, uint8_t *rngData, size_t rngDataSz) +{ + if (!rngDev || !rngDev->driver || !rngDev->driver->Generate || !rngData) { + return WHAL_EINVAL; + } + + return rngDev->driver->Generate(rngDev, rngData, rngDataSz); +} diff --git a/src/rng/stm32wb_rng.c b/src/rng/stm32wb_rng.c new file mode 100644 index 0000000..265cedd --- /dev/null +++ b/src/rng/stm32wb_rng.c @@ -0,0 +1,124 @@ +#include +#include +#include +#include +#include +#include +#include + +/* + * STM32WB RNG Register Definitions + * + * The RNG peripheral uses an analog noise source to produce 32-bit + * random values. One value is available at a time in DR, signaled + * by the DRDY flag in SR. + */ + +/* Control Register */ +#define SRNG_CR_REG 0x00 +#define SRNG_CR_RNGEN WHAL_MASK(2) /* RNG enable */ +#define SRNG_CR_CED WHAL_MASK(5) /* Clock error detection disable */ + +/* Status Register */ +#define SRNG_SR_REG 0x04 +#define SRNG_SR_DRDY WHAL_MASK(0) /* Data ready */ +#define SRNG_SR_CECS WHAL_MASK(1) /* Clock error current status */ +#define SRNG_SR_SECS WHAL_MASK(2) /* Seed error current status */ +#define SRNG_SR_CEIS WHAL_MASK(5) /* Clock error interrupt status */ +#define SRNG_SR_SEIS WHAL_MASK(6) /* Seed error interrupt status */ + +/* Data Register - 32-bit random value */ +#define SRNG_DR_REG 0x08 + +whal_Error whal_Stm32wbRng_Init(whal_Rng *rngDev) +{ + whal_Error err; + whal_Stm32wbRng_Cfg *cfg; + + if (!rngDev || !rngDev->cfg) { + return WHAL_EINVAL; + } + + cfg = (whal_Stm32wbRng_Cfg *)rngDev->cfg; + + err = whal_Clock_Enable(cfg->clkCtrl, cfg->clk); + if (err != WHAL_SUCCESS) { + return err; + } + + return WHAL_SUCCESS; +} + +whal_Error whal_Stm32wbRng_Deinit(whal_Rng *rngDev) +{ + whal_Error err; + + if (!rngDev || !rngDev->cfg) { + return WHAL_EINVAL; + } + + whal_Stm32wbRng_Cfg *cfg = (whal_Stm32wbRng_Cfg *)rngDev->cfg; + + err = whal_Clock_Disable(cfg->clkCtrl, cfg->clk); + if (err) { + return err; + } + + return WHAL_SUCCESS; +} + +whal_Error whal_Stm32wbRng_Generate(whal_Rng *rngDev, uint8_t *rngData, size_t rngDataSz) +{ + if (!rngDev || !rngData) { + return WHAL_EINVAL; + } + + whal_Error err = WHAL_SUCCESS; + const whal_Regmap *reg = &rngDev->regmap; + size_t status; + size_t offset = 0; + + /* Enable the RNG peripheral */ + whal_Reg_Update(reg->base, SRNG_CR_REG, SRNG_CR_RNGEN, + whal_SetBits(SRNG_CR_RNGEN, 1)); + + while (offset < rngDataSz) { + /* Wait for a random value to be ready */ + do { + /* Check for seed or clock error */ + whal_Reg_Get(reg->base, SRNG_SR_REG, SRNG_SR_SECS, &status); + if (status) { + err = WHAL_EHARDWARE; + goto exit; + } + whal_Reg_Get(reg->base, SRNG_SR_REG, SRNG_SR_CECS, &status); + if (status) { + err = WHAL_EHARDWARE; + goto exit; + } + + whal_Reg_Get(reg->base, SRNG_SR_REG, SRNG_SR_DRDY, &status); + } while (!status); + + /* Read 32-bit random value */ + uint32_t rnd = *(volatile uint32_t *)(reg->base + SRNG_DR_REG); + + /* Copy bytes into output buffer */ + for (size_t i = 0; i < 4 && offset < rngDataSz; i++, offset++) { + rngData[offset] = (uint8_t)(rnd >> (i * 8)); + } + } + +exit: + /* Disable the RNG peripheral */ + whal_Reg_Update(reg->base, SRNG_CR_REG, SRNG_CR_RNGEN, + whal_SetBits(SRNG_CR_RNGEN, 0)); + + return err; +} + +const whal_RngDriver whal_Stm32wbRng_Driver = { + .Init = whal_Stm32wbRng_Init, + .Deinit = whal_Stm32wbRng_Deinit, + .Generate = whal_Stm32wbRng_Generate, +}; diff --git a/tests/sim/Makefile b/tests/sim/Makefile index 90734f3..c9220ff 100644 --- a/tests/sim/Makefile +++ b/tests/sim/Makefile @@ -13,6 +13,7 @@ WHAL_SRC = $(WHAL_DIR)/src/clock/clock.c \ $(WHAL_DIR)/src/flash/flash.c \ $(WHAL_DIR)/src/timer/timer.c \ $(WHAL_DIR)/src/spi/spi.c \ + $(WHAL_DIR)/src/rng/rng.c \ $(WHAL_DIR)/src/supply/supply.c SOURCE = $(TEST_SRC) $(WHAL_SRC) diff --git a/tests/sim/test_dispatch.c b/tests/sim/test_dispatch.c index a0a3ad5..dc0fced 100644 --- a/tests/sim/test_dispatch.c +++ b/tests/sim/test_dispatch.c @@ -1,6 +1,7 @@ #include #include #include +#include #include "../test.h" /* @@ -78,6 +79,16 @@ static const whal_TimerDriver mockTimerDriver = { .Reset = mockTimerReset, }; +static whal_Error mockRngInit(whal_Rng *d) { (void)d; return WHAL_SUCCESS; } +static whal_Error mockRngDeinit(whal_Rng *d) { (void)d; return WHAL_SUCCESS; } +static whal_Error mockRngGenerate(whal_Rng *d, uint8_t *data, size_t sz) { (void)d; (void)data; (void)sz; return WHAL_SUCCESS; } + +static const whal_RngDriver mockRngDriver = { + .Init = mockRngInit, + .Deinit = mockRngDeinit, + .Generate = mockRngGenerate, +}; + /* --- Clock dispatch tests --- */ static void test_clock_null_dev(void) @@ -222,6 +233,31 @@ static void test_timer_valid_dispatch(void) WHAL_ASSERT_EQ(whal_Timer_Reset(&dev), WHAL_SUCCESS); } +/* --- RNG dispatch tests --- */ + +static void test_rng_null_dev(void) +{ + uint8_t buf[1]; + WHAL_ASSERT_EQ(whal_Rng_Init(NULL), WHAL_EINVAL); + WHAL_ASSERT_EQ(whal_Rng_Deinit(NULL), WHAL_EINVAL); + WHAL_ASSERT_EQ(whal_Rng_Generate(NULL, buf, 1), WHAL_EINVAL); +} + +static void test_rng_null_driver(void) +{ + whal_Rng dev = { .driver = NULL }; + WHAL_ASSERT_EQ(whal_Rng_Init(&dev), WHAL_EINVAL); +} + +static void test_rng_valid_dispatch(void) +{ + whal_Rng dev = { .driver = &mockRngDriver }; + WHAL_ASSERT_EQ(whal_Rng_Init(&dev), WHAL_SUCCESS); + uint8_t buf[4] = {0}; + WHAL_ASSERT_EQ(whal_Rng_Generate(&dev, buf, sizeof(buf)), WHAL_SUCCESS); + WHAL_ASSERT_EQ(whal_Rng_Deinit(&dev), WHAL_SUCCESS); +} + void test_dispatch(void) { WHAL_TEST_SUITE_START("dispatch"); @@ -241,5 +277,8 @@ void test_dispatch(void) WHAL_TEST(test_timer_null_dev); WHAL_TEST(test_timer_null_driver); WHAL_TEST(test_timer_valid_dispatch); + WHAL_TEST(test_rng_null_dev); + WHAL_TEST(test_rng_null_driver); + WHAL_TEST(test_rng_valid_dispatch); WHAL_TEST_SUITE_END(); } diff --git a/tests/sim/test_sim b/tests/sim/test_sim index 5a6d570..b9b349a 100755 Binary files a/tests/sim/test_sim and b/tests/sim/test_sim differ diff --git a/tests/stm32wb/Makefile b/tests/stm32wb/Makefile index 8ec46a7..b6e8b21 100644 --- a/tests/stm32wb/Makefile +++ b/tests/stm32wb/Makefile @@ -10,7 +10,7 @@ LDFLAGS = --omagic -static DEPDIR = .deps/ # Test sources -TEST_SRC = test_main.c test_clock.c test_gpio.c test_flash.c test_timer.c +TEST_SRC = test_main.c test_clock.c test_gpio.c test_flash.c test_timer.c test_rng.c # Board config and IVT from the example BOARD_SRC = $(EXAMPLE_DIR)/stm32wb55xx_nucleo.c \ diff --git a/tests/stm32wb/test_main.c b/tests/stm32wb/test_main.c index c8ae895..f9d20d0 100644 --- a/tests/stm32wb/test_main.c +++ b/tests/stm32wb/test_main.c @@ -40,6 +40,7 @@ void test_clock(void); void test_gpio(void); void test_flash(void); void test_timer(void); +void test_rng(void); void main(void) { @@ -84,6 +85,7 @@ void main(void) test_gpio(); test_flash(); test_timer(); + test_rng(); WHAL_TEST_SUMMARY(); diff --git a/tests/stm32wb/test_rng.c b/tests/stm32wb/test_rng.c new file mode 100644 index 0000000..fed0a36 --- /dev/null +++ b/tests/stm32wb/test_rng.c @@ -0,0 +1,68 @@ +#include +#include +#include +#include +#include +#include "stm32wb55xx_nucleo.h" +#include "../test.h" + +static void test_rng_init_deinit(void) +{ + WHAL_ASSERT_EQ(whal_Rng_Init(&g_whalRng), WHAL_SUCCESS); + WHAL_ASSERT_EQ(whal_Rng_Deinit(&g_whalRng), WHAL_SUCCESS); +} + +static void test_rng_generate_nonzero(void) +{ + uint8_t buf[16] = {0}; + int allZero = 1; + + whal_Stm32wbRcc_Ext_EnableHsi48(&g_whalClock, 1); + WHAL_ASSERT_EQ(whal_Rng_Init(&g_whalRng), WHAL_SUCCESS); + WHAL_ASSERT_EQ(whal_Rng_Generate(&g_whalRng, buf, sizeof(buf)), WHAL_SUCCESS); + WHAL_ASSERT_EQ(whal_Rng_Deinit(&g_whalRng), WHAL_SUCCESS); + whal_Stm32wbRcc_Ext_EnableHsi48(&g_whalClock, 0); + + for (size_t i = 0; i < sizeof(buf); i++) { + if (buf[i] != 0) { + allZero = 0; + break; + } + } + + /* 16 zero bytes from a TRNG is astronomically unlikely */ + WHAL_ASSERT_EQ(allZero, 0); +} + +static void test_rng_generate_unique(void) +{ + uint8_t buf1[16] = {0}; + uint8_t buf2[16] = {0}; + int same = 1; + + whal_Stm32wbRcc_Ext_EnableHsi48(&g_whalClock, 1); + WHAL_ASSERT_EQ(whal_Rng_Init(&g_whalRng), WHAL_SUCCESS); + WHAL_ASSERT_EQ(whal_Rng_Generate(&g_whalRng, buf1, sizeof(buf1)), WHAL_SUCCESS); + WHAL_ASSERT_EQ(whal_Rng_Generate(&g_whalRng, buf2, sizeof(buf2)), WHAL_SUCCESS); + WHAL_ASSERT_EQ(whal_Rng_Deinit(&g_whalRng), WHAL_SUCCESS); + whal_Stm32wbRcc_Ext_EnableHsi48(&g_whalClock, 0); + + for (size_t i = 0; i < sizeof(buf1); i++) { + if (buf1[i] != buf2[i]) { + same = 0; + break; + } + } + + /* Two consecutive 16-byte outputs should differ */ + WHAL_ASSERT_EQ(same, 0); +} + +void test_rng(void) +{ + WHAL_TEST_SUITE_START("rng"); + WHAL_TEST(test_rng_init_deinit); + WHAL_TEST(test_rng_generate_nonzero); + WHAL_TEST(test_rng_generate_unique); + WHAL_TEST_SUITE_END(); +} diff --git a/wolfHAL/clock/stm32wb_rcc.h b/wolfHAL/clock/stm32wb_rcc.h index 8e65319..73893ff 100644 --- a/wolfHAL/clock/stm32wb_rcc.h +++ b/wolfHAL/clock/stm32wb_rcc.h @@ -212,5 +212,15 @@ whal_Error whal_Stm32wbRccPll_GetRate(whal_Clock *clkDev, size_t *rateOut); * @retval WHAL_EINVAL Invalid arguments. */ whal_Error whal_Stm32wbRccMsi_GetRate(whal_Clock *clkDev, size_t *rateOut); +/* + * @brief Enable or disable the HSI48 oscillator required by the RNG peripheral. + * + * @param clkDev Clock controller instance. + * @param enable 1 to enable, 0 to disable. + * + * @retval WHAL_SUCCESS HSI48 enabled and ready, or disabled. + * @retval WHAL_EINVAL Invalid arguments. + */ +whal_Error whal_Stm32wbRcc_Ext_EnableHsi48(whal_Clock *clkDev, uint8_t enable); #endif /* WHAL_STM32WB_RCC_H */ diff --git a/wolfHAL/error.h b/wolfHAL/error.h index 58368de..52c5c52 100644 --- a/wolfHAL/error.h +++ b/wolfHAL/error.h @@ -16,6 +16,8 @@ enum { /* Invalid argument or unsupported operation. */ WHAL_EINVAL = -4000, WHAL_ENOTREADY = -4001, + /* Hardware device error. */ + WHAL_EHARDWARE = -4002, }; #endif /* WHAL_ERROR_H */ diff --git a/wolfHAL/platform/st/stm32wb55xx.h b/wolfHAL/platform/st/stm32wb55xx.h index c6a3c5f..ebc44bc 100644 --- a/wolfHAL/platform/st/stm32wb55xx.h +++ b/wolfHAL/platform/st/stm32wb55xx.h @@ -8,6 +8,7 @@ #include #include #include +#include /* * @file stm32wb55xx.h @@ -56,6 +57,13 @@ }, \ .driver = &whal_Stm32wbRccPll_Driver +#define WHAL_STM32WB55_RNG_DEVICE \ + .regmap = { \ + .base = 0x58001000, \ + .size = 0x400, \ + }, \ + .driver = &whal_Stm32wbRng_Driver + #define WHAL_STM32WB55_FLASH_DEVICE \ .regmap = { \ .base = 0x58004000, \ @@ -76,6 +84,10 @@ .regOffset = 0x4C, \ .enableMask = (1 << 1) +#define WHAL_STM32WB55_RNG_CLOCK \ + .regOffset = 0x50, \ + .enableMask = (1 << 18) + #define WHAL_STM32WB55_FLASH_CLOCK \ .regOffset = 0x50, \ .enableMask = (1 << 25) diff --git a/wolfHAL/rng/rng.h b/wolfHAL/rng/rng.h new file mode 100644 index 0000000..f509b20 --- /dev/null +++ b/wolfHAL/rng/rng.h @@ -0,0 +1,82 @@ +#ifndef WHAL_RNG_H +#define WHAL_RNG_H + +#include +#include +#include +#include + +/* + * @file rng.h + * @brief Generic RNG abstraction and driver interface. + */ + +typedef struct whal_Rng whal_Rng; + +/* + * @brief Driver vtable for RNG devices. + */ +typedef struct { + /* Initialize the RNG hardware. */ + whal_Error (*Init)(whal_Rng *rngDev); + /* Deinitialize the RNG hardware. */ + whal_Error (*Deinit)(whal_Rng *rngDev); + /* Generate random data into a buffer. */ + whal_Error (*Generate)(whal_Rng *rngDev, uint8_t *rngData, size_t rngDataSz); +} whal_RngDriver; + +/* + * @brief RNG device instance tying a register map and driver. + */ +struct whal_Rng { + const whal_Regmap regmap; + const whal_RngDriver *driver; + void *cfg; +}; + +/* + * @brief Initialize an RNG device and its driver. + * + * @param rngDev RNG instance to initialize. + * + * @retval WHAL_SUCCESS Driver-specific init completed. + * @retval WHAL_EINVAL Null pointer or missing driver function. + */ +#ifdef WHAL_CFG_NO_CALLBACKS +#define whal_Rng_Init(rngDev) ((rngDev)->driver->Init((rngDev))) +#define whal_Rng_Deinit(rngDev) ((rngDev)->driver->Deinit((rngDev))) +#define whal_Rng_Generate(rngDev, rngData, rngDataSz) \ + ((rngDev)->driver->Generate((rngDev), (rngData), (rngDataSz))) +#else +/* + * @brief Initialize an RNG device and its driver. + * + * @param rngDev RNG instance to initialize. + * + * @retval WHAL_SUCCESS Driver-specific init completed. + * @retval WHAL_EINVAL Null pointer or missing driver function. + */ +whal_Error whal_Rng_Init(whal_Rng *rngDev); +/* + * @brief Deinitialize an RNG device and release resources. + * + * @param rngDev RNG instance to deinitialize. + * + * @retval WHAL_SUCCESS Driver-specific deinit completed. + * @retval WHAL_EINVAL Null pointer or missing driver function. + */ +whal_Error whal_Rng_Deinit(whal_Rng *rngDev); +/* + * @brief Generate random data into a buffer. + * + * @param rngDev RNG instance to use. + * @param rngData Destination buffer. + * @param rngDataSz Number of random bytes to generate. + * + * @retval WHAL_SUCCESS Buffer filled with random data. + * @retval WHAL_EINVAL Null pointer or missing driver function. + */ +whal_Error whal_Rng_Generate(whal_Rng *rngDev, uint8_t *rngData, size_t rngDataSz); +#endif + +#endif /* WHAL_RNG_H */ diff --git a/wolfHAL/rng/stm32wb_rng.h b/wolfHAL/rng/stm32wb_rng.h new file mode 100644 index 0000000..7c47284 --- /dev/null +++ b/wolfHAL/rng/stm32wb_rng.h @@ -0,0 +1,60 @@ +#ifndef WHAL_STM32WB_RNG_H +#define WHAL_STM32WB_RNG_H + +#include +#include +#include + +/* + * @file stm32wb_rng.h + * @brief STM32WB RNG driver configuration. + * + * The STM32WB true random number generator provides 32-bit random values + * from an analog noise source. The peripheral requires the RNG clock to + * be enabled and produces one 32-bit word at a time via the DR register. + */ + +/* + * @brief RNG device configuration. + */ +typedef struct whal_Stm32wbRng_Cfg { + whal_Clock *clkCtrl; /* Clock controller for RNG peripheral clock */ + const void *clk; /* Clock descriptor */ +} whal_Stm32wbRng_Cfg; + +/* + * @brief Driver instance for STM32WB RNG peripheral. + */ +extern const whal_RngDriver whal_Stm32wbRng_Driver; + +/* + * @brief Initialize the STM32WB RNG peripheral. + * + * @param rngDev RNG device instance. + * + * @retval WHAL_SUCCESS Initialization completed. + * @retval WHAL_EINVAL Invalid arguments. + */ +whal_Error whal_Stm32wbRng_Init(whal_Rng *rngDev); +/* + * @brief Deinitialize the STM32WB RNG peripheral. + * + * @param rngDev RNG device instance. + * + * @retval WHAL_SUCCESS Deinit completed. + * @retval WHAL_EINVAL Invalid arguments. + */ +whal_Error whal_Stm32wbRng_Deinit(whal_Rng *rngDev); +/* + * @brief Generate random data. + * + * @param rngDev RNG device instance. + * @param rngData Destination buffer. + * @param rngDataSz Number of random bytes to generate. + * + * @retval WHAL_SUCCESS Buffer filled with random data. + * @retval WHAL_EINVAL Invalid arguments or seed/clock error detected. + */ +whal_Error whal_Stm32wbRng_Generate(whal_Rng *rngDev, uint8_t *rngData, size_t rngDataSz); + +#endif /* WHAL_STM32WB_RNG_H */ diff --git a/wolfHAL/wolfHAL.h b/wolfHAL/wolfHAL.h index fa5e7d4..c8c90fe 100644 --- a/wolfHAL/wolfHAL.h +++ b/wolfHAL/wolfHAL.h @@ -13,6 +13,7 @@ #include #include #include +#include #include #endif /* WOLFHAL_H */