drivers/i2c: add ioexpander-based lower-half implementation for I2C bit-bang #17746
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Donny9
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acassis,
pkarashchenko,
raiden00pl and
simbit18
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@Donny9 this is really cool feature!!!
Please provide some basic Documentation
(optional, but desired) Please provide some basic board profile example that use it, ideally using sim and some low cost I/O Expander like the CJMCU-2233HL module.
…it-bang
This commit adds a new lower-half driver implementation for I2C bit-bang
that uses IO expander pins as the GPIO backend, enabling I2C bit-bang
functionality on systems where direct GPIO access is not available or
when I2C needs to be implemented using IO expander pins.
Background:
The existing I2C bit-bang driver (i2c_bitbang.c) provides a generic
upper-half implementation that requires a platform-specific lower-half
to control the SDA and SCL GPIO lines. Previously, each platform had to
implement its own lower-half using direct GPIO access.
Usage Example:
FAR struct ioexpander_dev_s *ioe = /* get IO expander */;
FAR struct i2c_master_s *i2c;
/* Initialize I2C bit-bang using IO expander pins 10 (SCL) and 11 (SDA) */
i2c = i2c_bitbang_ioexpander_initialize(ioe, 10, 11, 0);
if (i2c)
{
/* Use i2c master device normally */
}
Signed-off-by: dongjiuzhu1 <dongjiuzhu1@xiaomi.com>
This documentation helps users understand when and how to use IO expander pins for implementing additional I2C buses in their applications. Related commit: 06099d4 (drivers/i2c: Add IO expander-based I2C bit-bang) Signed-off-by: dongjiuzhu1 <dongjiuzhu1@xiaomi.com>
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Area: Documentation
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@Donny9 excellent documentation! Kudos!!! |
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@Donny9 for some reason the size of this config increased too much and CI is failing: Configuration/Tool: lm3s6432-s2e/nsh,CONFIG_ARM_TOOLCHAIN_GNU_EABI
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@acassis master is broken. All PRs fail on this configuration. Some change that increased flash usage was merged and CI didn't detect it. |
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@raiden00pl see #17751 according to @Donny9 it was recent network patches. The wapi also stopped to get DHCP correctly for WiFi: #17736 I didn't test Ethernet boards, but I suppose it could be broke as well. We need more reliable testing on our CI to avoid regressions like this. Espressif also has an internal CI using Robot framework, but it also failed to get this issue, probably because they are using static IP, please confirm @fdcavalcanti || @tmedicci || @eren-terzioglu |
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@Donny9 please rebase this PR as well |
4 participants
Summary
This commit adds a new lower-half driver implementation for I2C bit-bang that uses IO expander pins as the GPIO backend, enabling I2C bit-bang functionality on systems where direct GPIO access is not available or when I2C needs to be implemented using IO expander pins.
Background:
The existing I2C bit-bang driver (i2c_bitbang.c) provides a generic upper-half implementation that requires a platform-specific lower-half to control the SDA and SCL GPIO lines. Previously, each platform had to implement its own lower-half using direct GPIO access.
Usage Example:
Impact
This commit introduces a reusable lower-half implementation that:
Testing
test for tc4d9 evb,
