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MicroPython has quite a few ports now (20 of them), but not all are in the same stage of development. This commit attempts to define port Tier levels and assign a Tier to each of the existing ports. The main aim here is to set expectations for the level of support and development each port gets. And also lower the bar of entry for new ports so they can enter at a low Tier and gradually rise up to Tier 1. See prior art here: - https://peps.python.org/pep-0011/ - https://doc.rust-lang.org/rustc/target-tier-policy.html - https://docs.zephyrproject.org/latest/project/release_process.html#hardware-support-tiers Signed-off-by: Damien George <damien@micropython.org> Signed-off-by: Angus Gratton <angus@redyak.com.au>
Signed-off-by: Jeff Epler <jepler@unpythonic.net>
Assuming proper C99 language support, we can select "the int type as big as a pointer" (most of the time) or "the 64-bit int type" (nanboxing with REPR_D), and then define everything else automatically. This simplifies port configuration files. And the types can still be overridden if needed. Signed-off-by: Jeff Epler <jepler@unpythonic.net>
This is the case in arm-none-eabi-gcc 14.2.1 (debian trixie).
This fixes a diagnostic like:
../../lib/libm_dbl/libm.h:92:9: error:
"DBL_EPSILON" redefined [-Werror]
/usr/lib/gcc/arm-none-eabi/14.2.1/include/float.h:114:9: note:
this is the location of the previous definition
when building MPS2_AN500 (qemu port).
Signed-off-by: Jeff Epler <jepler@unpythonic.net>
This will show a line for both the reference and comparison, e.g.,
Reference: zephyr/boards: Add PocketBeagle 2 rev A1… [00a926e]
Comparison: metrics: Tersely show the commi… [merge of c7ac411]
When the comparison is a merge commit (as it is during CI) the second
parent of that commit is shown instead.
This will be helpful when checking which revision of the code size report
comment on a PR corresponds to which revision of the code.
Signed-off-by: Jeff Epler <jepler@unpythonic.net>
Now the default reference commit is the first parent of the selected commit, instead of the first parent of HEAD. Signed-off-by: Jeff Epler <jepler@unpythonic.net>
This makes the version string consistent with the one used in code, see commit 9e89c75. Signed-off-by: Daniël van de Giessen <daniel@dvdgiessen.nl>
So it can be used for polling. Signed-off-by: iabdalkader <i.abdalkader@gmail.com>
Signed-off-by: iabdalkader <i.abdalkader@gmail.com>
Signed-off-by: iabdalkader <i.abdalkader@gmail.com>
Using the newly added `uart_rx_any()` and system ticks functions. Signed-off-by: iabdalkader <i.abdalkader@gmail.com>
Signed-off-by: iabdalkader <i.abdalkader@gmail.com>
Signed-off-by: iabdalkader <i.abdalkader@gmail.com>
Signed-off-by: iabdalkader <i.abdalkader@gmail.com>
This is a Cortex-M55 board. Signed-off-by: iabdalkader <i.abdalkader@gmail.com>
Setting RTS/DTR raises "Inappropriate ioctl for device" for pts devices. Signed-off-by: iabdalkader <i.abdalkader@gmail.com>
This is consistent with the other ports (see py/mkrules.mk) and makes more sense overall because it makes everything which is compiled use the same flags; until now all compilation steps which ran before or in absence of FreezeModules (e.g. qstr generation, compiling a single file on the command line or in the IDE) would use different PP defs. This didn't happen to cause any issues apparently but it's just more consistent/safer to not do that. Signed-off-by: stijn <stijn@ignitron.net>
32-bit floats are needed for object representation C. Signed-off-by: iabdalkader <i.abdalkader@gmail.com>
Signed-off-by: Kwabena W. Agyeman <kwagyeman@live.com>
STM32H7A3 has 2MB internal flash and each sector size is 8KB. Signed-off-by: Yuuki NAGAO <wf.yn386@gmail.com>
For STM32H7, the following macro's value are different by ADC's version: * ADC_CAL_ADDRESS * ADC_CAL1 * TEMPSENSOR_CAL2_ADDR Using macros defined by HAL become less dependent on ADC's version. Signed-off-by: Yuuki NAGAO <wf.yn386@gmail.com>
STM32H7A3 uses PA11, PA12 to enable USB function via built-in USB OTG port on NUCLEO board. Signed-off-by: Yuuki NAGAO <wf.yn386@gmail.com>
This change adds NUCLEO_H7A3ZI_Q Core Board support to the STM32 port. NUCLEO_H7A3ZI_Q: https://www.st.com/en/evaluation-tools/nucleo-h7a3zi-q.html This board uses STM32H7A3ZI: https://www.st.com/en/microcontrollers-microprocessors/stm32h7a3zi.html Signed-off-by: Yuuki NAGAO <wf.yn386@gmail.com>
This commit extends the MPY file format in a backwards-compatible way to store an encoded form of architecture-specific flags that have been specified in the "mpy-cross" command line, or that have been explicitly set as part of a native emitter configuration. The file format changes are as follows: * The features byte, previously containing the target native architecture and the minor file format version, now claims bit 6 as a flag indicating the presence of an encoded architecture flags integer * If architecture flags need to be stored, they are placed right after the MPY file header. This means that properly-written MPY parsers, if encountering a MPY file containing encoded architecture flags, should raise an error since no architecture identifiers have been defined that make use of bits 6 and 7 in the referenced header byte. This should give enough guarantees of backwards compatibility when this feature is used (improper parsers were subjected to breakage anyway). The encoded architecture flags could have been placed at the end, but: * Having them right after the header makes the architecture compatibility checks occur before having read the whole file in memory (which still happens on certain platforms as the reader may be backed by a memory buffer), and prevents eventual memory allocations that do not take place if the module is rejected early * Properly-written MPY file parsers should have checked the upper two bits of the flags byte to be actually zero according to the format specification available right before this change, so no assumptions should have been made on the exact order of the chunks for an unexpected format. The meaning of the architecture flags value is backend-specific, with the only common characteristic of being a variable-encoded unsigned integer for the time being. The changes made to the file format effectively limit the number of possible target architectures to 16, of which 13 are already claimed. There aren't that many new architectures planned to be supported for the lifetime of the current MPY file format, so this change still leaves space for architecture updates if needed. Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
This commit introduces the MPY architecture flags checking code specific for the RV32 target, currently checking for the only additional extension that is supported by the runtime: Zba. The warnings inside "mpy-cross" have also been removed since now there is a way to reject incompatible MPY files at runtime. Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
This commit extends "mpy-tool.py"'s disassembly output of a given MPY file (triggered via the "-d" command line option) to include newly added fields. Now the target architecture for the chosen MPY file is printed out to screen in human-readable format and, if present, architecture-specific flags. Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
This commit extends "mpy-cross"'s parsing of the architecture flags value command line, allowing raw integer values as well as flag strings. Integers can be represented as either decimal, binary, or hexadecimal values, using the usual C language prefixes to mark non-base 10 values. Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
This commit adds the currently supported architecture flags value as the upper part of "sys.implementation._mpy". This had the side effect of perturbing quite a bit of testing infrastructure and invalidating documentation related to MPY files. To make the test suite run successfully and keep the documentation in sync the following changes have been made: * The target info feature check file now isolates eventual architecture flags and adds them as a separate field * The test runner now picks up the new architecture flags field, reports it to STDOUT if needed and stores it for future uses * Relevant test files for MPY files import code had to be updated to mask out the architecture flags bits in order to perform correctly * MPY file format documentation was updated to show how to mask off and properly display the architecture flags information. This works out of the box if the flag bits can fit in a smallint value once merged with the MPY file header value. Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
This commit extends the "micropython/import_mpy_native_gc" test with a pre-built serialised MPY file built for RV32. Before this commit, the test was skipped on said platform due to the lack of a known-good MPY file to test the import procedure against. Now the test is executed as part of the general CI test checks. The MPY file's Makefile script was also updated to cater for modern Linux environments where the required Python interpreter's command name isn't "python", but "python3" instead (this occurs when using the past two LTS Ubuntu releases for example). This is the same kind of change made in 31a008c. Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
This commit lets "run-tests.py" use the encoded architecture flags provided by the interpreter when invoking "mpy-cross". If architecture flags are detected, they're mapped into the necessary strings needed by "mpy-cross"'s "-march-flags" argument, so that tests will always use all available extensions reported by the target. Currently this is limited to the RV32 platform, as it is the only one that is making use of this facility as of now. This also lets the QEMU port remove forced arguments to "mpy-cross" when running the test suite. Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
P5_6 doesn't have that alt function, and only has 7 alt functions. This workaround was never really needed, it was introduced in DFP because the wrong P10_7 alt function was used, in original DFP sources. This has been removed from DFP starting with 1.3.4, so remove it here also. Signed-off-by: iabdalkader <i.abdalkader@gmail.com>
Update romfs partition to reflect the latest layout. Signed-off-by: iabdalkader <i.abdalkader@gmail.com>
Allows user control of JTAG pins on the AE3 which are exposed via the B2B header. Signed-off-by: Kwabena W. Agyeman <kwagyeman@live.com>
Default queue size is too small that it overflows easily if debugging printfs are enabled. Increase TinyUSB event queue size to 128. Signed-off-by: iabdalkader <i.abdalkader@gmail.com>
Bumps [actions/upload-artifact](https://github.com/actions/upload-artifact) from 4 to 6. - [Release notes](https://github.com/actions/upload-artifact/releases) - [Commits](actions/upload-artifact@v4...v6) --- updated-dependencies: - dependency-name: actions/upload-artifact dependency-version: '6' dependency-type: direct:production update-type: version-update:semver-major ... Signed-off-by: dependabot[bot] <support@github.com>
Bumps [actions/cache](https://github.com/actions/cache) from 4 to 5. - [Release notes](https://github.com/actions/cache/releases) - [Changelog](https://github.com/actions/cache/blob/main/RELEASES.md) - [Commits](actions/cache@v4...v5) --- updated-dependencies: - dependency-name: actions/cache dependency-version: '5' dependency-type: direct:production update-type: version-update:semver-major ... Signed-off-by: dependabot[bot] <support@github.com>
Signed-off-by: Jeff Epler <jepler@unpythonic.net>
Add an esp32 build (specifically ESP32_GENERIC) to the CI code-size check. Multiple new steps must be done to prepare for building esp32, and caching is used to speed up both the install of the IDF and the build process. Signed-off-by: Jeff Epler <jepler@unpythonic.net>
To make this CI step runnable locally by `ci.sh`. Signed-off-by: Jeff Epler <jepler@unpythonic.net>
This commit updates the Unix/MIPS target's environment to use the latest available LTS version of Ubuntu Linux (24.04). Since the new OS updated some key components used in the CI build process, a few modifications have been made to the setup and build procedure. Newer QEMU's sysroot location changed and the "static" variant of the QEMU emulators has to be used to make binfmt work, and updated autotools versions split some macros into an optional package that has to be manually installed. Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
This commit updates the Unix/Arm target's environment to use the latest available LTS version of Ubuntu Linux (24.04). Since the new OS updated some key components used in the CI build process, a few modifications have been made to the setup and build procedure. Newer QEMU's sysroot location changed and the "static" variant of the QEMU emulators has to be used to make binfmt work, and updated autotools versions split some macros into an optional package that has to be manually installed. Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
This commit forces the installation of CPython 3.11 instead of CPython 3.12 in the OS image for Unix/RV64 CI jobs. CPython 3.12 is not compatible with settrace tests, but it is the CPython version that is installed by default in "ubuntu-latest" (which is Ubuntu 24.04 LTS right now). Updating the base image for the RV64 tests also disabled settrace tests to work around its incompatibility, however turns out there is a way to force CI to set up a base OS image with an arbitrary CPython version. Now the RV64 CI jobs are now going to be executed using CPython 3.11, and thus the settrace tests can be removed from the ignore list. Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
Also make sure code_size runs when the esp32 port source changes, as per the other ports that are built as part of code_size. Signed-off-by: Jeff Epler <jepler@unpythonic.net> Signed-off-by: Damien George <damien@micropython.org>
This commit updates the Unix/x86 target's environment to use the latest available LTS version of Ubuntu Linux (24.04). Since the new OS updated some key components used in the CI build process, a few modifications have been made to the setup and build procedure. The new OS introduces a CPython version that is known to not be compatible with a subset of settrace tests, so even though the OS is updated, an older version of CPython is installed as part of the image provisioning process. Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
This commit changes the way native modules' trampoline code sequence is emitted, generating an optimised code sequence to jump to the entry symbol. Turns out the address of the entry point is known even before the segments are built and the address of the entry point doesn't change when processing the module on anything but Xtensa. This means that the jump trampoline doesn't have to be a dummy fixed-size block to be filled in later, but it can be the final trampoline being used in the module. On Xtensa the address of the symbol is offset by the length of the literals pool, but since the trampoline being generated is always the shortest one said platform is left alone (handling distances greater than 128KiB would require more extensive changes). Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
This commit lets "tools/mpy_ld.py" store architecture flags in generated
MPY files if explicitly requested, like "mpy-cross" does.
To achieve this, a new command-line option ("--arch-flags") was added to
receive the architecture flags value, accepting the same arguments'
format as "mpy-cross", and performing the same input validation.
The rest of the MPY toolchain was also modified to let the user pass the
arch flags to standard native module makefiles. Given that there's
already a well-established "ARCH" argument, "ARCH_FLAGS" was chosen to
pass the optional flags to "mpy_ld.py".
Finally, documentation was updated to mention the new variable.
Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
Bumps [actions/cache](https://github.com/actions/cache) from 4 to 5. - [Release notes](https://github.com/actions/cache/releases) - [Changelog](https://github.com/actions/cache/blob/main/RELEASES.md) - [Commits](actions/cache@v4...v5) --- updated-dependencies: - dependency-name: actions/cache dependency-version: '5' dependency-type: direct:production update-type: version-update:semver-major ... Signed-off-by: dependabot[bot] <support@github.com>
Signed-off-by: Damien George <damien@micropython.org>
"MicroPython" is sometimes misspelled as "Micropython". Add an explicit check for that as part of CI (note that codespell doesn't consider case when spelling, hence the need to do it this way). Signed-off-by: Damien George <damien@micropython.org>
Signed-off-by: Damien George <damien@micropython.org>
SPIRAM usually uses GPIO 9 and 10 on ESP32, so don't use them as default UART pins. Fixes issue #18544. Signed-off-by: Damien George <damien@micropython.org>
Signed-off-by: Elvis Pfutzenreuter <elvis.pfutzenreuter@gmail.com>
According to https://wiki.seeedstudio.com/xiao_esp32c6_getting_started/#demo1-deep-sleep-with-external-wake-up and https://docs.espressif.com/projects/esp-idf/en/stable/esp32c6/api-reference/peripherals/gpio.html ESP32C6 supports RTC/LP on Pins 0-7. Signed-off-by: FH <fh3095-gitcommit@yahoo.com>
The main functional change here is to make sure that the SDMMC1/2 clocks are enabled in low power mode; they were not previously enabled for SD card use, only WLAN. It doesn't hurt to unconditionally enable the clocks in low power, like all the other peripherals. Signed-off-by: Damien George <damien@micropython.org>
This doubles the speed of SD card transfers. Signed-off-by: Damien George <damien@micropython.org>
And fix typo in the usage string of plli2svalues.py. Signed-off-by: Oliver Joos <oliver.joos@hispeed.ch>
The existing linker script for F412 is renamed to separate F412xG (with 1MB RAM) from F412xE (with 512K). Signed-off-by: Oliver Joos <oliver.joos@hispeed.ch>
Configuration: - Clock is 8MHz from STLINK MCO, CPU runs at 400MHz - REPL on USB and on UART connected to ST-Link interface - Storage is configured for internal flash memory - 3x LEDs and 1x user button - Ethernet Product page: https://www.st.com/en/evaluation-tools/nucleo-h753zi.html Signed-off-by: Oliver Joos <oliver.joos@hispeed.ch>
To connect STM32H7 that is in SLEEPD1 state (e.g. during REPL) debuggers like st-flash or openocd must assert SRST. Signed-off-by: Oliver Joos <oliver.joos@hispeed.ch>
STM32CubeMX shows a conflict of UART5 with ETH MII. However UART1 can be used with TX and RX on the pin headers. PLL1Q is reduced from 200 to 100 MHz because it may be used for FDCAN or SDMMC. FDCAN needs <= 150 MHz, and 100 MHz is enough for an SDCard connected to pin headers to work reliably. Signed-off-by: Oliver Joos <oliver.joos@hispeed.ch>
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