SIMD: Add i64x2.all_true, i64x2.eq, i64x2.ne

crates/wasmparser/src/binary_reader.rs

@@ -1751,6 +1751,7 @@ impl<'a> BinaryReader<'a> {
             0xbd => Operator::I32x4ExtMulHighI16x8S,
             0xbe => Operator::I32x4ExtMulLowI16x8U,
             0xbf => Operator::I32x4ExtMulHighI16x8U,
+            0xc0 => Operator::I64x2Eq,
             0xc1 => Operator::I64x2Neg,
             0xc4 => Operator::I64x2Bitmask,
             0xc7 => Operator::I64x2WidenLowI32x4S,
@@ -1761,6 +1762,8 @@ impl<'a> BinaryReader<'a> {
             0xcc => Operator::I64x2ShrS,
             0xcd => Operator::I64x2ShrU,
             0xce => Operator::I64x2Add,
+            0xcf => Operator::I64x2AllTrue,
+            0xd0 => Operator::I64x2Ne,
             0xd1 => Operator::I64x2Sub,
             0xd2 => Operator::I64x2ExtMulLowI32x4S,
             0xd3 => Operator::I64x2ExtMulHighI32x4S,

crates/wasmparser/src/operators_validator.rs

@@ -1551,6 +1551,8 @@ impl OperatorValidator {
             | Operator::I32x4LeU
             | Operator::I32x4GeS
             | Operator::I32x4GeU
+            | Operator::I64x2Eq
+            | Operator::I64x2Ne
             | Operator::V128And
             | Operator::V128AndNot
             | Operator::V128Or
@@ -1672,6 +1674,7 @@ impl OperatorValidator {
             | Operator::I16x8Bitmask
             | Operator::I32x4AllTrue
             | Operator::I32x4Bitmask
+            | Operator::I64x2AllTrue
             | Operator::I64x2Bitmask => {
                 self.check_simd_enabled()?;
                 self.pop_operand(Some(Type::V128))?;

crates/wasmparser/src/primitives.rs

@@ -982,6 +982,8 @@ pub enum Operator<'a> {
     I32x4LeU,
     I32x4GeS,
     I32x4GeU,
+    I64x2Eq,
+    I64x2Ne,
     F32x4Eq,
     F32x4Ne,
     F32x4Lt,
@@ -1052,6 +1054,7 @@ pub enum Operator<'a> {
     I32x4MaxU,
     I32x4DotI16x8S,
     I64x2Neg,
+    I64x2AllTrue,
     I64x2Bitmask,
     I64x2Shl,
     I64x2ShrS,

crates/wasmprinter/src/lib.rs

@@ -1224,6 +1224,9 @@ impl Printer {
             I32x4GeS => self.result.push_str("i32x4.ge_s"),
             I32x4GeU => self.result.push_str("i32x4.ge_u"),
 
+            I64x2Eq => self.result.push_str("i64x2.eq"),
+            I64x2Ne => self.result.push_str("i64x2.ne"),
+
             F32x4Eq => self.result.push_str("f32x4.eq"),
             F32x4Ne => self.result.push_str("f32x4.ne"),
             F32x4Lt => self.result.push_str("f32x4.lt"),
@@ -1287,6 +1290,7 @@ impl Printer {
             I32x4Mul => self.result.push_str("i32x4.mul"),
 
             I64x2Neg => self.result.push_str("i64x2.neg"),
+            I64x2AllTrue => self.result.push_str("i64x2.all_true"),
             I64x2Bitmask => self.result.push_str("i64x2.bitmask"),
             I64x2Shl => self.result.push_str("i64x2.shl"),
             I64x2ShrU => self.result.push_str("i64x2.shr_u"),

crates/wast/src/ast/expr.rs

@@ -1022,6 +1022,7 @@ instructions! {
         I32x4ExtMulLowI16x8U : [0xfd, 0xbe] : "i32x4.extmul_low_i16x8_u",
         I32x4ExtMulHighI16x8U : [0xfd, 0xbf] : "i32x4.extmul_high_i16x8_u",
 
+        I64x2Eq : [0xfd, 0xc0] : "i64x2.eq",
         I64x2Neg : [0xfd, 0xc1] : "i64x2.neg",
         I64x2Shl : [0xfd, 0xcb] : "i64x2.shl",
         I64x2Bitmask : [0xfd, 0xc4] : "i64x2.bitmask",
@@ -1032,6 +1033,8 @@ instructions! {
         I64x2ShrS : [0xfd, 0xcc] : "i64x2.shr_s",
         I64x2ShrU : [0xfd, 0xcd] : "i64x2.shr_u",
         I64x2Add : [0xfd, 0xce] : "i64x2.add",
+        I64x2AllTrue : [0xfd, 0xcf] : "i64x2.all_true",
+        I64x2Ne : [0xfd, 0xd0] : "i64x2.ne",
         I64x2Sub : [0xfd, 0xd1] : "i64x2.sub",
         I64x2ExtMulLowI32x4S : [0xfd, 0xd2] : "i64x2.extmul_low_i32x4_s",
         I64x2ExtMulHighI32x4S : [0xfd, 0xd3] : "i64x2.extmul_high_i32x4_s",

tests/local/simd.wat

@@ -158,6 +158,11 @@
     i32.eqz
     drop
 
+    v128.const i32x4 1 2 3 4
+    i64x2.all_true
+    i32.eqz
+    drop
+
     v128.const i64x2 1 2
     i64x2.bitmask
     i32.eqz
@@ -183,6 +188,18 @@
     i8x16.neg
     drop
 
+    v128.const i32x4 0 0 0 0
+    v128.const i32x4 0 0 0 0
+    i64x2.eq
+    i8x16.neg
+    drop
+
+    v128.const i32x4 0 0 0 0
+    v128.const i32x4 0 0 0 0
+    i64x2.ne
+    i8x16.neg
+    drop
+
     v128.const i32x4 0 0 0 0
     v128.const i32x4 0 0 0 0
     i16x8.q15mulr_sat_s