Conversation
|
Thanks for your contribution! Can you create a new hdb where these are included as FU entries so it is possible to use them in new 64b designs? |
|
Hello Pekka, So sorry. That's my first time doing such a thing. Thanks |
pjaaskel
left a comment
There was a problem hiding this comment.
Can you add a new systemtest that generates a 64b TTA with proge and simulates+verifies the resulting RTL? There are similar systemtests which use ghdl optionally under systemtests and systemtests_long. Also be sure to run the old tests and make sure all of them pass. Did you see this page? https://github.com/cpc/tce/wiki/Contributor-Info
| @@ -0,0 +1,335 @@ | |||
| -- Copyright (c) 2002-2009 Tampere University of Technology. | |||
There was a problem hiding this comment.
Please check the copyright year, and the copyright also if you want to retain it. MIT license agreement is enough.
| @@ -0,0 +1,260 @@ | |||
| -- Copyright (c) 2002-2009 Tampere University of Technology. | |||
| @@ -0,0 +1,470 @@ | |||
| -- Copyright (c) 2002-2009 Tampere University of Technology. | |||
| -- Designer: Latif AKCAY | ||
| -- University: Bayburt University, Istanbul Technical University, TURKEY. | ||
|
|
||
| -- LSU64 Operations |
There was a problem hiding this comment.
Perhaps this comment is redundant thanks to the nice list of contants below.
| @@ -0,0 +1,166 @@ | |||
| -- Copyright (c) 2002-2009 Tampere University of Technology. | |||
| data_out1_out <= "00000000000000000000000000000000" & data_out1_reg(31 downto 0); -- result has to be compatible with the currrent version of the operation! | ||
|
|
||
| end architecture rtl; | ||
|
|
There was a problem hiding this comment.
pls remove the empty lines
| * @note rating: red | ||
| */ | ||
|
|
||
| /* |
There was a problem hiding this comment.
Please mind the 78 row size limit and also this type of comment belongs to git commit log, not in the source code. There you'd best describe what you did and preferably in more detail, why these changes were needed.
| *ifetchCyclecountPort, *ttaCyclecountPort); | ||
| NetlistPort* ifetchLockcountPort = new NetlistPort( | ||
| "db_lockcnt", "32", 32, ProGe::BIT_VECTOR, HDB::OUT, | ||
| "db_lockcnt", "64", 64, ProGe::BIT_VECTOR, HDB::OUT, |
There was a problem hiding this comment.
You force 64 here, does 32 RTL generation still work? Did you run tools/scripts/compiletest.sh to check the tests? Do you have 'ghdl' installed so it runs the RTL tests?
Hello,
The request contains 64-bit compatible sample functional units.
Latif Akçay