Skip to content

Developer Experience: improve clangd support #84

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Open
KooShnoo wants to merge 1 commit into
base: master
Choose a base branch
from
Open

Developer Experience: improve clangd support #84

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
1 commit
Select commit
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
2 changes: 2 additions & 0 deletions configure.py
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -175,6 +175,8 @@
# Can be overridden in libraries or objects
config.scratch_preset_id = None

config.extra_clang_flags = ["-D__INTELLISENSE__"]

# Base flags, common to most GC/Wii games.
# Generally leave untouched, with overrides added below.
cflags_base = [
Expand Down
21 changes: 18 additions & 3 deletions include/macros.h
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -16,17 +16,32 @@

#define ARRAY_SIZE(x) (sizeof((x)) / sizeof((x)[0]))

#define MEMCLR(x) __memclr((x), sizeof(*(x)))

#define ALIGN(x) __attribute__((aligned(x)))

#define DECL_SECTION(x) __declspec(section x)
#define DECL_WEAK __declspec(weak)

#ifdef __MWERKS__

#define DECLTYPE(x) __decltype__(x)
#define MEMCLR(x) __memclr((x), sizeof(*(x)))
#define ARRAY_AT_ADDRESS(addr) [] : (addr)
#define AT_ADDRESS(addr) : (addr)
#define PPC_ASM asm

// For VSCode
#ifdef __INTELLISENSE__
#elif defined(__INTELLISENSE__)
#ifdef __clang__
#define MEMCLR(x) __builtin_memset((x), 0, sizeof(*(x)));
#define DECLTYPE(x) __decltype(x)
#endif
// 'Zero Size Array' hack to avoid incomplete type like `u8 foo[];`.
// the real fix is to make the AT_ADDRESS macro work in clang.
#define ARRAY_AT_ADDRESS(addr) [0]
#define AT_ADDRESS(addr)
// this macro was created with the following regex:
// search `asm \{([^{}]*\n?)*\}` replace `PPC_ASM ($1)`
#define PPC_ASM(...)
#define asm
#define __attribute__(x)
#define __declspec(x)
Expand Down
12 changes: 6 additions & 6 deletions include/nw4r/g3d/platform/g3d_cpu.h
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -45,9 +45,9 @@ inline f32 S7_8ToF32(register const s16* pPtr) {
register f32 f;

// clang-format off
asm {
PPC_ASM (
psq_l f, 0(pPtr), 1, 7
}
)
// clang-format on

return f;
Expand All @@ -57,9 +57,9 @@ inline f32 S10_5ToF32(register const s16* pPtr) {
register f32 f;

// clang-format off
asm {
PPC_ASM (
psq_l f, 0(pPtr), 1, 6
}
)
// clang-format on

return f;
Expand All @@ -81,9 +81,9 @@ inline s16 F32ToS10_5(register f32 f) {
register s16* pPtr = &x;

// clang-format off
asm {
PPC_ASM (
psq_st f, 0(pPtr), 1, 6
}
)
// clang-format on

return x;
Expand Down
28 changes: 14 additions & 14 deletions include/nw4r/g3d/res/g3d_rescommon.h
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -85,49 +85,49 @@ template <typename T> class ResCommon {
return *mpData;
}

template <typename T> T* ofs_to_ptr_raw(s32 ofs) {
return reinterpret_cast<T*>((char*)mpData + ofs);
template <typename U> U* ofs_to_ptr_raw(s32 ofs) {
return reinterpret_cast<U*>((char*)mpData + ofs);
}
template <typename T> const T* ofs_to_ptr_raw(s32 ofs) const {
return reinterpret_cast<const T*>((char*)mpData + ofs);
template <typename U> const U* ofs_to_ptr_raw(s32 ofs) const {
return reinterpret_cast<const U*>((char*)mpData + ofs);
}

template <typename T> T* ofs_to_ptr(s32 ofs) {
template <typename U> U* ofs_to_ptr(s32 ofs) {
u8* pPtr = reinterpret_cast<u8*>(mpData);

if (ofs != 0) {
return reinterpret_cast<T*>(pPtr + ofs);
return reinterpret_cast<U*>(pPtr + ofs);
}

return NULL;
}
template <typename T> const T* ofs_to_ptr(s32 ofs) const {
template <typename U> const U* ofs_to_ptr(s32 ofs) const {
const u8* pPtr = reinterpret_cast<const u8*>(mpData);

if (ofs != 0) {
return reinterpret_cast<const T*>(pPtr + ofs);
return reinterpret_cast<const U*>(pPtr + ofs);
}

return NULL;
}

template <typename T> T ofs_to_obj(s32 ofs) {
template <typename U> U ofs_to_obj(s32 ofs) {
u8* pPtr = reinterpret_cast<u8*>(mpData);

if (ofs != 0) {
return T(pPtr + ofs);
return U(pPtr + ofs);
}

return T(NULL);
return U(NULL);
}
template <typename T> const T ofs_to_obj(s32 ofs) const {
template <typename U> const U ofs_to_obj(s32 ofs) const {
const u8* pPtr = reinterpret_cast<const u8*>(mpData);

if (ofs != 0) {
return T(const_cast<u8*>(pPtr + ofs));
return U(const_cast<u8*>(pPtr + ofs));
}

return T(NULL);
return U(NULL);
}

private:
Expand Down
12 changes: 6 additions & 6 deletions include/nw4r/math/math_arithmetic.h
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -34,9 +34,9 @@ inline f32 FAbs(register f32 x) {
register f32 ax;

// clang-format off
asm {
PPC_ASM (
fabs ax, x
}
)
// clang-format on

return ax;
Expand All @@ -58,15 +58,15 @@ inline f32 FInv(register f32 x) {
register f32 work0, work1, work2, work3;

// clang-format off
asm {
PPC_ASM (
fmr work1, x // x
fres work0, work1 // 1/x

// Refine estimate
ps_add work2, work0, work0 // 2/x
ps_mul work3, work0, work0 // 1/x^2
ps_nmsub work0, work1, work3, work2 // -(x * 1/x^2 - 2/x)
}
)
// clang-format on

return work0;
Expand Down Expand Up @@ -97,9 +97,9 @@ inline f32 FSelect(register f32 value, register f32 ge_zero,
register f32 ret;

// clang-format off
asm {
PPC_ASM (
fsel ret, value, ge_zero, lt_zero
}
)
// clang-format on

return ret;
Expand Down
24 changes: 12 additions & 12 deletions include/nw4r/math/math_types.h
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -317,7 +317,7 @@ inline VEC3* VEC3Add(register VEC3* pOut, register const VEC3* pA,
register f32 work0, work1, work2;

// clang-format off
asm {
PPC_ASM (
// Add XY
psq_l work0, VEC3.x(pA), 0, 0
psq_l work1, VEC3.x(pB), 0, 0
Expand All @@ -329,7 +329,7 @@ inline VEC3* VEC3Add(register VEC3* pOut, register const VEC3* pA,
psq_l work1, VEC3.z(pB), 1, 0
ps_add work2, work0, work1
psq_st work2, VEC3.z(pOut), 1, 0
}
)
// clang-format on

return pOut;
Expand All @@ -340,7 +340,7 @@ inline f32 VEC3Dot(register const VEC3* pA, register const VEC3* pB) {
register f32 work0, work1, work2, work3;

// clang-format off
asm {
PPC_ASM (
// YZ product
psq_l work0, VEC3.y(pA), 0, 0
psq_l work1, VEC3.y(pB), 0, 0
Expand All @@ -353,7 +353,7 @@ inline f32 VEC3Dot(register const VEC3* pA, register const VEC3* pB) {

// Dot product
ps_sum0 dot, work1, work0, work0
}
)
// clang-format on

return dot;
Expand All @@ -363,7 +363,7 @@ inline f32 VEC3LenSq(register const VEC3* pVec) {
register f32 work0, work1, work2;

// clang-format off
asm {
PPC_ASM (
// Square XY
psq_l work0, VEC3.x(pVec), 0, 0
ps_mul work0, work0, work0
Expand All @@ -374,7 +374,7 @@ inline f32 VEC3LenSq(register const VEC3* pVec) {

// Sum products
ps_sum0 work2, work2, work0, work0
}
)
// clang-format on

return work2;
Expand All @@ -385,7 +385,7 @@ inline VEC3* VEC3Lerp(register VEC3* pOut, register const VEC3* pVec1,
register f32 work0, work1, work2;

// clang-format off
asm {
PPC_ASM (
// X/Y delta
psq_l work0, VEC3.x(pVec1), 0, 0
psq_l work1, VEC3.x(pVec2), 0, 0
Expand All @@ -401,7 +401,7 @@ inline VEC3* VEC3Lerp(register VEC3* pOut, register const VEC3* pVec1,
// Scale with time and add to v0
ps_madds0 work2, work2, t, work0
psq_st work2, VEC3.z(pOut), 1, 0
}
)
// clang-format on

return pOut;
Expand All @@ -412,7 +412,7 @@ inline VEC3* VEC3Scale(register VEC3* pOut, register const VEC3* pIn,
register f32 work0, work1;

// clang-format off
asm {
PPC_ASM (
// Scale XY
psq_l work0, VEC3.x(pIn), 0, 0
ps_muls0 work1, work0, scale
Expand All @@ -422,7 +422,7 @@ inline VEC3* VEC3Scale(register VEC3* pOut, register const VEC3* pIn,
psq_l work0, VEC3.z(pIn), 1, 0
ps_muls0 work1, work0, scale
psq_st work1, VEC3.z(pOut), 1, 0
}
)
// clang-format on

return pOut;
Expand All @@ -433,7 +433,7 @@ inline VEC3* VEC3Sub(register VEC3* pOut, register const VEC3* pA,
register f32 work0, work1, work2;

// clang-format off
asm {
PPC_ASM (
// Sub XY
psq_l work0, VEC3.x(pA), 0, 0
psq_l work1, VEC3.x(pB), 0, 0
Expand All @@ -445,7 +445,7 @@ inline VEC3* VEC3Sub(register VEC3* pOut, register const VEC3* pA,
psq_l work1, VEC3.z(pB), 1, 0
ps_sub work2, work0, work1
psq_st work2, VEC3.z(pOut), 1, 0
}
)
// clang-format on

return pOut;
Expand Down
4 changes: 2 additions & 2 deletions include/nw4r/ut/ut_algorithm.h
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -32,9 +32,9 @@ template <> f32 inline Abs(register f32 x) {
register f32 ax;

// clang-format off
asm {
PPC_ASM (
fabs ax, x
}
)
// clang-format on

return ax;
Expand Down
2 changes: 1 addition & 1 deletion include/revolution/AI/ai_hardware.h
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -8,7 +8,7 @@ extern "C" {
/**
* AI hardware registers
*/
volatile u32 AI_HW_REGS[] : 0xCD006C00;
volatile u32 AI_HW_REGS ARRAY_AT_ADDRESS(0xCD006C00);

/**
* Hardware register indexes
Expand Down
2 changes: 1 addition & 1 deletion include/revolution/DSP/dsp_hardware.h
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -8,7 +8,7 @@ extern "C" {
/**
* DSP hardware registers
*/
volatile u16 DSP_HW_REGS[] : 0xCC005000;
volatile u16 DSP_HW_REGS ARRAY_AT_ADDRESS(0xCC005000);

/**
* Hardware register indexes
Expand Down
2 changes: 1 addition & 1 deletion include/revolution/EXI/EXIHardware.h
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -14,7 +14,7 @@ typedef struct EXIChannelParam {
u32 data; // at 0x10
} EXIChannelParam;

volatile EXIChannelParam EXI_CHAN_PARAMS[EXI_MAX_CHAN] : 0xCD006800;
volatile EXIChannelParam EXI_CHAN_PARAMS[EXI_MAX_CHAN] AT_ADDRESS(0xCD006800);

// CPR - Channel Parameter Register
#define EXI_CPR_EXIINTMASK (1 << 0)
Expand Down
2 changes: 1 addition & 1 deletion include/revolution/GX/GXHardware.h
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -43,7 +43,7 @@ extern volatile union {
unsigned int ui;
void* p;
float f;
} WGPIPE : 0xCC008000;
} WGPIPE AT_ADDRESS(0xCC008000);

/**
* FIFO commands
Expand Down
4 changes: 2 additions & 2 deletions include/revolution/IPC/ipcHardware.h
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -8,8 +8,8 @@ extern "C" {
/**
* IPC hardware registers
*/
volatile u32 IPC_HW_REGS_PPC[] : 0xCD000000;
volatile u32 IPC_HW_REGS[] : 0xCD800000;
volatile u32 IPC_HW_REGS_PPC ARRAY_AT_ADDRESS(0xCD000000);
volatile u32 IPC_HW_REGS ARRAY_AT_ADDRESS(0xCD800000);

/**
* Hardware register indexes
Expand Down
Loading