Feature VLSIR Netlisting

[ThomasPluck]

Summary

This PR adds VLSIR circuit netlisting support to gsim, enabling conversion of GDSFactory components to VLSIR protobuf circuit representations for SPICE simulation.

Key additions:

• New gsim.vlsir subpackage with to_vlsir_circuit() function
• Hierarchical netlisting with support for nested SUBCKTs
• Direct device-to-device connection handling
• BFS-based electrical node discovery algorithm
• Comprehensive test suite (38 tests) with real GDSFactory components

Changes

New Features

• VLSIR Netlister (src/gsim/vlsir/netlist.py) - Converts GDSFactory components to VLSIR circuit packages
  • Extracts connectivity from recursive netlists
  • Supports device instances (with vlsir metadata), routing instances, and subcircuit references
  • Handles direct device-to-device connections without intermediate routing
  • Recursive processing of nested components as SUBCKTs

Documentation

• src/gsim/vlsir/CONNECTIONs.md - Connection logic specification
• src/gsim/vlsir/METADATA_SPEC.md - VLSIR metadata format for device components
• src/gsim/vlsir/SIMULATION.md - Simulation workflow overview
• Updated README.md with just installation commands

Configuration

• Added vlsir>=7.0.0 and vlsirtools>=7.0.0 dependencies
• Updated Python requirement to >=3.12
• Added linter/type-checker exclusions for vlsir module (lacks type stubs)

Test plan

• Run just test - all 38 vlsir tests should pass
• Verify to_vlsir_circuit() with a sample GDSFactory component
• Confirm pre-commit passes with pre-commit run -a

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