32-bit ARM port

Makefile

@@ -39,7 +39,7 @@ USER_DIR = user
 ISO_DIR = $(BUILD_DIR)/iso_root
 
 # The ISO target.
-IMAGE_TARGET = $(BUILD_DIR)/../image.$(TARGETL).iso
+IMAGE_TARGET ?= $(BUILD_DIR)/../image.$(TARGETL).iso
 
 # The init ramdisk directory.
 INITRD_DIR = $(BUILD_DIR)/initrd_root

boron/Makefile

@@ -38,6 +38,14 @@ LINKER_FILE = linker.$(TARGETL).ld
 ISO_DIR=$(BUILD_DIR)/iso_root
 IMAGE_TARGET=$(BUILD_DIR)/image.iso
 
+ifeq ($(TARGET),AMD64)
+	GENERATE_SYMBOLS = 1
+else ifeq ($(TARGET),I386)
+	GENERATE_SYMBOLS = 1
+else
+	GENERATE_SYMBOLS = 0
+endif
+
 # This is the name that our final kernel executable will have.
 # Change as needed.
 override KERNEL := $(BUILD_DIR)/kernel.$(TARGETL).elf
@@ -150,10 +158,10 @@ NASMFLAGS += $(ARCH_ASFLAGS)
 
 # Use find to glob all *.c, *.S, and *.asm files in the directory and extract the object names.
 EXCLUDE_WRONG_ARCH = '(' '(' -path 'source/ke/$(TARGETL)/*' ')' -o '(' -path 'source/mm/$(TARGETL)/*' ')' -o '(' -not -path 'source/ke/*/*' -not -path 'source/mm/*/*' ')' ')'
-override CFILES      := $(shell find $(SRC_DIR) -not -path '*/.*' $(EXCLUDE_WRONG_ARCH) -type f -name '*.c')
-override CXXFILES    := $(shell find $(SRC_DIR) -not -path '*/.*' $(EXCLUDE_WRONG_ARCH) -type f -name '*.cpp')
-override ASFILES     := $(shell find $(SRC_DIR) -not -path '*/.*' $(EXCLUDE_WRONG_ARCH) -type f -name '*.S')
-override NASMFILES   := $(shell find $(SRC_DIR) -not -path '*/.*' $(EXCLUDE_WRONG_ARCH) -type f -name '*.asm')
+override CFILES      := $(shell find -L $(SRC_DIR) -not -path '*/.*' $(EXCLUDE_WRONG_ARCH) -type f -name '*.c')
+override CXXFILES    := $(shell find -L $(SRC_DIR) -not -path '*/.*' $(EXCLUDE_WRONG_ARCH) -type f -name '*.cpp')
+override ASFILES     := $(shell find -L $(SRC_DIR) -not -path '*/.*' $(EXCLUDE_WRONG_ARCH) -type f -name '*.S')
+override NASMFILES   := $(shell find -L $(SRC_DIR) -not -path '*/.*' $(EXCLUDE_WRONG_ARCH) -type f -name '*.asm')
 override OBJ         := $(patsubst %.o,%.$(TARGETL).o,$(patsubst $(SRC_DIR)/%,$(BUILD_DIR)/%,$(CFILES:.c=.o) $(CXXFILES:.cpp=.o) $(ASFILES:.S=.o) $(NASMFILES:.asm=.o)))
 override HEADER_DEPS := $(patsubst %.o,%.d,$(OBJ))
 
@@ -175,6 +183,8 @@ VER_BUILD = $(shell cat $(BUILD_NUMBER_FILE))
 CFLAGS += -D__BORON_MAJOR=$(VER_MAJOR) -D__BORON_MINOR=$(VER_MINOR) -D__BORON_BUILD=$(VER_BUILD)
 
 # Link rules for the final kernel executable.
+ifeq ($(GENERATE_SYMBOLS),1)
+
 $(KERNEL): $(SYMBOLS)
 	@echo "[LD]\tBuilding $(KERNEL)"
 	@$(BLD) $(OBJ) $(SYMBOLS) $(LDFLAGS) -o $@
@@ -193,6 +203,14 @@ $(KERNEL_PARTIAL): $(OBJ) $(LINKER_FILE)
 	@echo "[LD]\tPartially linking kernel"
 	@$(BLD) -m $(LINK_ARCH) -r $(OBJ) $(LDFLAGSBASE) -o $@
 
+else
+
+$(KERNEL): $(OBJ) $(LINKER_FILE)
+	@echo "[LD]\tLinking kernel"
+	@$(BLD) $(OBJ) $(LDFLAGS) -o $@
+
+endif
+
 $(BUILD_DIR)/ke/version.$(TARGETL).o: $(filter-out $(BUILD_DIR)/ke/version.$(TARGETL).o, $(OBJ)) $(SRC_DIR)/ke/version.c
 	@echo "[CC]\tCompiling $(SRC_DIR)/ke/version.c"
 	@mkdir -p $(dir $@)

boron/address_space_arm.txt

@@ -0,0 +1,62 @@
+BORON Operating System Address Space (i386)
+
+** Kernel Mode **
+
++------------------------------+ - 0xFFFFFFFF
+| virtually linear page tables |
++------------------------------+ - 0xFF800000
+|            unused            |
++------------------------------+ - 0xF0000000
+|   more dynamic pool space    |
++------------------------------+ - 0xE0000000
+|            unused            |
++------------------------------+ - 0xD8000000
+|     page frame data base     |
++------------------------------+ - 0xD4000000
+|      system module DLLs      |
++------------------------------+ - 0xD2000000
+|            unused            |
++------------------------------+ - 0xD1900000
+|      map of UART MMIO        |
++------------------------------+ - 0xD1800000
+|  pool header slab magazines  |
++------------------------------+ - 0xD1000000
+| fast mapping in 16MB windows |
++------------------------------+ - 0xD0000000
+|  map of first 256 MB of phys |
+|      kernel code & data      |
++------------------------------+ - 0xC0000000
+|      dynamic pool space      |
++------------------------------+ - 0x80000000
+|    higher half direct map    |
++------------------------------+ - 0x00000000
+
+Notes:
+- if we use the multiboot boot protocol, then "kernel code & data" really means "first 8MB of physical memory"
+
+** User Mode **
+
+Currently this is nothing more than a plan.
+Now, a user process has complete control over its own
+address space. (They will even be able to unmap the
+PEB/TEBs if they want as well!)
+
+However, this is the plan for normal user processes.
+
++-----------------------------+ - 0x80000000
+|  process environment block  |
++-----------------------------+ - 0x7ffe0000
+|  thread environment blocks  |
++-----------------------------+ - 0x7fe00000
+|    operating system DLLs    |
++-----------------------------+ - 0x78000000
+|        thread stacks        |
++-----------------------------+ - 0x70000000
+|          user DLLs          |
++-----------------------------+ - 0x60000000
+|     user heap + mappings    |
++-----------------------------+ - 0x10000000
+|      program executable     |
++-----------------------------+ - 0x00001000
+|                             |
++-----------------------------+ - 0x00000000

boron/include/arch.h

@@ -8,41 +8,20 @@
 #include <arch/amd64.h>
 #elif defined TARGET_I386
 #include <arch/i386.h>
+#elif defined TARGET_ARM
+#include <arch/arm.h>
+#else
+#error Define your architecture here!
 #endif
 
 // ==== Forward declarations. Depending on the platform, we'll include platform specific definitions. ====
 typedef struct KREGISTERS_tag KREGISTERS, *PKREGISTERS; // List of registers.
 
 // Functions that do different things based on architecture,
 // but exist everywhere
-#if defined TARGET_AMD64 || defined TARGET_I386
-
-FORCE_INLINE
-void KeWaitForNextInterrupt(void)
-{
-	ASM("hlt":::"memory");
-}
-
-FORCE_INLINE
-void KeSpinningHint(void)
-{
-	ASM("pause":::"memory");
-}
-
-FORCE_INLINE
-void KeInvalidatePage(void* Address)
-{
-	ASM("invlpg (%0)"::"r"((uintptr_t)Address):"memory");
-}
-
-#else
-
 void KeWaitForNextInterrupt(void);
 void KeSpinningHint(void);
 void KeInvalidatePage(void* Page);
-
-#endif
-
 void KeSetCPUPointer(void* CpuPointer);
 void* KeGetCPUPointer(void);
 uintptr_t KeGetCurrentPageTable(void);

boron/include/arch/amd64.h

@@ -71,25 +71,28 @@ MMADDRESS_CONVERT;
 #define MM_PTE_READWRITE  (1ULL <<  1)
 #define MM_PTE_USERACCESS (1ULL <<  2)
 #define MM_PTE_WRITETHRU  (1ULL <<  3)
-#define MM_PTE_CDISABLE   (1ULL <<  4)
+#define MM_PTE_NOCACHE    (1ULL <<  4)
 #define MM_PTE_ACCESSED   (1ULL <<  5)
 #define MM_PTE_DIRTY      (1ULL <<  6)
 #define MM_PTE_PAT        (1ULL <<  7)
 #define MM_PTE_PAGESIZE   (1ULL <<  7) // in terms of PML3/PML2 entries, for 1GB/2MB pages respectively. Not Used by the kernel
 #define MM_PTE_GLOBAL     (1ULL <<  8) // doesn't invalidate the pages from the TLB when CR3 is changed
 #define MM_PTE_ISFROMPMM  (1ULL <<  9) // if the allocated memory is managed by the PFN database
-#define MM_PTE_COW        (1ULL << 10) // if this page is to be copied after a write -- TODO: We are supposed to be phasing this one out.
+#define MM_PTE_COW        (1ULL << 10) // if this page is to be copied after a write (UNUSED)
 #define MM_PTE_TRANSITION (1ULL << 11) // if this page is in transition (3) (UNUSED)
 #define MM_PTE_NOEXEC     (1ULL << 63) // aka eXecute Disable
 #define MM_PTE_PKMASK     (15ULL<< 59) // protection key mask. We will not use it.
-#define MM_PTE_ISPOOLHDR  (1ULL << 58) // if the PTE actually contains the address of a pool entry (subtracted MM_KERNEL_SPACE_BASE from it) (NOTE: This is supposed to be MM_DPTE_ISPOOLHDR)
 
 #define MM_PTE_ADDRESSMASK (0x000FFFFFFFFFF000) // description of the other bits that aren't 1 in the mask:
 	// 63 - execute disable
 	// 62..59 - protection key (unused)
 	// 58..52 - more available bits
 
 #define MM_PTE_PFN(Pte) (((Pte) & MM_PTE_ADDRESSMASK) / PAGE_SIZE)
+#define MM_PTE_NEWPFN(Pfn) (((Pfn) * PAGE_SIZE) & MM_PTE_ADDRESSMASK)
+
+#define MM_PTE_CHECKFROMPMM(Pte) ((Pte) & MM_PTE_ISFROMPMM)
+#define MM_PTE_ISPRESENT(Pte) (((Pte) & MM_PTE_PRESENT) != 0)
 
 // Disabled PTE (present bit is zero):
 // bits 0..2 and 63 - Permission bits as usual
@@ -112,6 +115,7 @@ MMADDRESS_CONVERT;
 #define MM_DPTE_COMMITTED    (1ULL << 8)
 #define MM_DPTE_BACKEDBYFILE (1ULL << 9)
 #define MM_DPTE_SWAPPED      (1ULL << 10)
+#define MM_DPTE_ISPOOLHDR    (1ULL << 58) // if the PTE actually contains the address of a pool entry (subtracted MM_KERNEL_SPACE_BASE from it)
 #define MM_DPTE_WASPRESENT   (1ULL << 62)
 
 // Page fault reasons
@@ -294,4 +298,22 @@ KARCH_DATA, *PKARCH_DATA;
 #include <arch/x86cpuid.h>
 #include <arch/x86cr.h>
 
+FORCE_INLINE
+void KeWaitForNextInterrupt(void)
+{
+	ASM("hlt":::"memory");
+}
+
+FORCE_INLINE
+void KeSpinningHint(void)
+{
+	ASM("pause":::"memory");
+}
+
+FORCE_INLINE
+void KeInvalidatePage(void* Address)
+{
+	ASM("invlpg (%0)"::"r"((uintptr_t)Address):"memory");
+}
+
 #endif//NS64_ARCH_AMD64_H