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The repository is for a final project for a Computer Systems Architecture class. It is a Verilog implementation of a modified Simple-As-Possible computer based on Malvino and Brown's initial designs.
kfcampit/CSYSARC-FinalProject
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The repository is for a final project for a Computer Systems Architecture class. It is a Verilog implementation of a modified Simple-As-Possible computer based on Malvino and Brown's initial designs.
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