WIP: FP32 Pattern Support

[PhilippvK]

DO NOT MERGE.

This is untested and far away from complete. Just for reference.

TODOs:

• Support G_FMA to fix MAC example
• Pass-through register type (REG/FREG) to backend
• Support FLEN=64 (via cmdline & CDSL)
• Rebase/squash commits
• Add more tests
• Test generated patterns
• Eliminate unnecessary bitcasts in frontend

[PhilippvK]

Example Input:

MAC {
    encoding: 7'b0101000 :: rs2[4:0] :: rs1[4:0] :: 3'b011 :: rd[4:0] :: 7'b0101011;
    assembly: "{name(rd)}, {name(rs1)}, {name(rs2)}";
    behavior: {
        F[rd] = llvm_fmuladd_f32(F[rs1], F[rs2], F[rd]);
    }
}

MEAN {
    encoding: 7'b0101000 :: rs2[4:0] :: rs1[4:0] :: 3'b011 :: rd[4:0] :: 7'b0101011;
    assembly: "{name(rd)}, {name(rs1)}, {name(rs2)}";
    behavior: {
        F[rd] = llvm_fdiv_fp32(llvm_fadd_fp32(F[rs1], F[rs2]), llvm_uitofp_fp32(2));
    }
}

Command:

pattern-gen core_descs/ExampleFP32.core_desc --no-extend --print-ir --mattr=+f

LLVM-IR:

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite)
define void @implMAC(ptr nocapture readonly %rs2, ptr nocapture readonly %rs1, ptr noalias nocapture %rd) local_unnamed_addr #0 {
  %rs1.v1 = load float, ptr %rs1, align 4
  %rs2.v2 = load float, ptr %rs2, align 4
  %rd.v3 = load float, ptr %rd, align 4
  %1 = tail call float @llvm.fmuladd.f32(float %rd.v3, float %rs1.v1, float %rs2.v2)
  store float %1, ptr %rd, align 4
  ret void
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.fmuladd.f32(float, float, float) #1

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite)
define void @implMEAN(ptr nocapture readonly %rs2, ptr nocapture readonly %rs1, ptr noalias nocapture writeonly %rd) local_unnamed_addr #0 {
  %rs1.v1 = load float, ptr %rs1, align 4
  %rs2.v2 = load float, ptr %rs2, align 4
  %1 = fadd float %rs1.v1, %rs2.v2
  %2 = fmul float %1, 5.000000e-01
  store float %2, ptr %rd, align 4
  ret void
}

Output:

Pattern for MAC: (any_fma GPR:$rd, GPR:$rs1, GPR:$rs2)
Pattern for MEAN: (fmul (fadd GPR:$rs1, GPR:$rs2), (f32 0.500000))