Skip to content
Merged
Show file tree
Hide file tree
Changes from all commits
Commits
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
5 changes: 5 additions & 0 deletions bender_profile.mk
Original file line number Diff line number Diff line change
Expand Up @@ -17,6 +17,11 @@ profile_targs += -t rtl
profile_targs += -t test
profile_targs += -t idma_test


ifeq ($(mesh_dv), 0)
profile_targs += -t standalone_tile
endif

profile_targs += -t magia_tile_test

profile_targs += -t magia_dv
Expand Down
4 changes: 4 additions & 0 deletions target/sim/src/mesh/magia_vip.sv
Original file line number Diff line number Diff line change
Expand Up @@ -124,6 +124,10 @@ module magia_vip
irq[i] = '0;
fetch_enable = 1'b0;
boot_addr = entry_addr;
for (int i = 0; i < magia_tb_pkg::N_TILES; i++) begin
i_l2_mem.i_l2_mem.mem[32'hCCFF_0000 + 2*i] = 8'h00;
i_l2_mem.i_l2_mem.mem[32'hCCFF_0000 + 2*i+1] = 8'h00;
end
#1000;
endtask: init

Expand Down
2 changes: 2 additions & 0 deletions target/sim/src/tile/magia_tile_vip.sv
Original file line number Diff line number Diff line change
Expand Up @@ -160,6 +160,8 @@ module magia_tile_vip
irq = '0;
fetch_enable = 1'b0;
boot_addr = entry_addr;
i_l2_mem.i_l2_mem.mem[32'hCCFF_0000] = 8'h00;
i_l2_mem.i_l2_mem.mem[32'hCCFF_0001] = 8'h00;
#1000;
endtask: init

Expand Down