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Merged
n0thingNoob merged 16 commits into from
Feb 28, 2026
Merged

Squash reported bugs #36

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49a4c15
add exit delay
Jackcuii Jan 21, 2026
e726d8f
add sgt
Jackcuii Jan 21, 2026
026080a
add relu testbench
Jackcuii Jan 21, 2026
7ace20d
Merge remote-tracking branch 'origin/main' into safe-exit
Jackcuii Jan 28, 2026
5219f68
Merge remote-tracking branch 'origin/main' into fix-bugs
Jackcuii Jan 28, 2026
d2cfc59
squash bugs, add stable relu, add stable exit, add SEL and SGE
Jackcuii Jan 28, 2026
f7af359
Update test/testbench/histogram/main.go
n0thingNoob Jan 28, 2026
6b8199e
Update test/testbench/relu/main.go
n0thingNoob Jan 28, 2026
c3893a4
Fix exit unit test
Jackcuii Feb 13, 2026
c0c2510
add gemv testbench
Jackcuii Feb 25, 2026
456a2c1
allow write and read registers in a single cycle
Jackcuii Feb 25, 2026
d1c95b5
Merge branch 'fix-bugs' of https://github.com/sarchlab/zeonica into f…
Jackcuii Feb 25, 2026
a5490bd
fix send/receive
Jackcuii Feb 26, 2026
ac44932
Merge remote-tracking branch 'origin/main' into fix-bugs
Jackcuii Feb 28, 2026
937194a
exclude lint for testbench
Jackcuii Feb 28, 2026
37b6bae
fix lint
Jackcuii Feb 28, 2026
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7 changes: 7 additions & 0 deletions .golangci.yml
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Original file line number Diff line number Diff line change
Expand Up @@ -218,6 +218,13 @@ issues:
- dupl
- gosec

# Testbench main programs: skip strict checks to avoid unnecessary code churn
- path: test/testbench/
linters:
- errcheck
- funlen
- lll

# Exclude known linters from partially hard-vendored code,
# which is impossible to exclude via "nolint" comments.
- path: internal/hmac/
Expand Down
2 changes: 2 additions & 0 deletions config/config.go
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Original file line number Diff line number Diff line change
Expand Up @@ -176,6 +176,7 @@ func (d DeviceBuilder) createTiles(
) {
var exit = false
var retVal = uint32(0)
var exitReqTimestamp = float64(0)
for y := 0; y < d.height; y++ {
dev.Tiles[y] = make([]*tile, d.width)
for x := 0; x < d.width; x++ {
Expand All @@ -186,6 +187,7 @@ func (d DeviceBuilder) createTiles(
WithFreq(d.freq).
WithExitAddr(&exit).
WithRetValAddr(&retVal).
WithExitReqAddr(&exitReqTimestamp).
Build(coreName)

if d.monitor != nil {
Expand Down
25 changes: 15 additions & 10 deletions core/builder.go
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Original file line number Diff line number Diff line change
Expand Up @@ -7,10 +7,11 @@ import (

// Builder can create new cores.
type Builder struct {
engine sim.Engine
freq sim.Freq
exitAddr *bool
retValAddr *uint32
engine sim.Engine
freq sim.Freq
exitAddr *bool
retValAddr *uint32
exitReqAddr *float64
}

// WithEngine sets the engine.
Expand All @@ -37,6 +38,11 @@ func (b Builder) WithRetValAddr(retValAddr *uint32) Builder {
return b
}

func (b Builder) WithExitReqAddr(exitReqAddr *float64) Builder {
b.exitReqAddr = exitReqAddr
return b
}

// Build creates a core.
//
//nolint:funlen
Expand All @@ -48,10 +54,11 @@ func (b Builder) Build(name string) *Core {
CareFlags: true,
}
c.state = coreState{
exit: b.exitAddr,
retVal: b.retValAddr,
SelectedBlock: nil,
PCInBlock: -1,
exit: b.exitAddr,
retVal: b.retValAddr,
requestExitTimestamp: b.exitReqAddr,
SelectedBlock: nil,
Comment on lines 50 to +60
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Copilot AI Jan 28, 2026

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Build copies b.exitReqAddr into coreState.requestExitTimestamp, but exitReqAddr is optional and can be nil. Since runRet/RunInstructionGroup dereference this pointer, Build should ensure it is always non-nil (e.g., default to an internal float64 when nil) to avoid runtime panics for API consumers.

Copilot uses AI. Check for mistakes.
PCInBlock: -1,
Directions: map[string]bool{
"North": true,
"East": true,
Expand Down Expand Up @@ -87,8 +94,6 @@ func (b Builder) Build(name string) *Core {
c.state.SendBufHeadBusy[i] = make([]bool, 12)
}

c.state.States["Phiconst"] = false

c.ports = make(map[cgra.Side]*portPair)

b.makePort(c, cgra.North)
Expand Down
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