OPAE porting to Xilinx FPGA devices.
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Aug 5, 2020 - Coq
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partial-reconfiguration
Here are 11 public repositories matching this topic...
M.2 PCIe Artix 7 FPGA Accelerator Card
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Mar 17, 2025 - C
Framework based on Partial Reconfiguration for chip characterization utilizing ring-oscillator PUFs
fpga zynq publication xilinx-fpga zybo hardware-security puf partial-reconfiguration ring-oscillators measurement-control
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Apr 1, 2020 - Tcl
HLS-based Xilinx ICAP3 Controller (tested with VCU108)
fpga hls xilinx vivado icap partial-reconfiguration xilinx-hls icap3 lastweek-source hls-controller bitstream-readback
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Jan 18, 2020 - Tcl
A set of Vivado dev resources.
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Sep 17, 2020
some reusable scripts
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Jan 22, 2020 - Tcl
Tools for automating the Vivado project partial reconfiguration flow
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Sep 21, 2017 - ANTLR
Simulation framework for cloud FPGA resource management research. Evaluate deadline-aware schedulers, dynamic bitstream selection, and multi-tenant orchestration strategies with realistic workload patterns and detailed performance metrics.
fpga hls orchestration cloud-computing partial-reconfiguration partial-reconfiguration-quality-of-service
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Dec 2, 2025 - Python
Simulation framework for cloud FPGA resource management. Evaluate deadline-aware schedulers, dynamic bitstream selection, and multi-tenant orchestration strategies with realistic workload patterns and detailed performance metrics.
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Dec 2, 2025 - Python
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